// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.bwd_kernel_dq.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_bwd_kernel_dq__A9__F433

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 8, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
    int8_t  NUM_XCDS;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx120x/flash/bwd_kernel_dq.zip)xyzw" };
#else
{ R"xyzw(amd-gfx120x/flash/bwd_kernel_dq.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1201)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0xc38a0d9bu, 0x8f8eec88u, 650, 723 }, // c38a0d9b8f8eec88 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1201
    { 0xc645a3c5u, 0x64c06b85u, 650, 763 }, // c645a3c564c06b85 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=8;num_stages=1;;arch=gfx1201
    { 0x2a333f9eu, 0xec0e8313u, 650, 803 }, // 2a333f9eec0e8313 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=8;num_stages=1;;arch=gfx1201
    { 0x92269e1au, 0x564b6d29u, 843, 292 }, // 92269e1a564b6d29 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x70139ca7u, 0xbf4984deu, 843, 683 }, // 70139ca7bf4984de = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1201
    { 0x36a5dbd9u, 0xf27086feu, 843, 398 }, // 36a5dbd9f27086fe = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x005ee1cfu, 0x53bb86a1u, 843, 478 }, // 005ee1cf53bb86a1 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x9b2d5db6u, 0xae366977u, 843, 763 }, // 9b2d5db6ae366977 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=8;num_stages=1;;arch=gfx1201
    { 0xe66898d6u, 0xc4177e9bu, 843, 438 }, // e66898d6c4177e9b = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x004e21a6u, 0xa2ee49aeu, 518, 292 }, // 004e21a6a2ee49ae = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x2c935c6au, 0x284b057eu, 518, 683 }, // 2c935c6a284b057e = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1201
    { 0x021e7e51u, 0x277c348du, 518, 398 }, // 021e7e51277c348d = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x052ca496u, 0xa9c7878du, 518, 723 }, // 052ca496a9c7878d = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1201
    { 0x0e19757bu, 0x9a948cf6u, 518, 478 }, // 0e19757b9a948cf6 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x1033e6feu, 0x35bae7ccu, 518, 763 }, // 1033e6fe35bae7cc = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=8;num_stages=1;;arch=gfx1201
    { 0xb9778e2fu, 0xbd3a2feau, 518, 438 }, // b9778e2fbd3a2fea = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1201
    { 0xee945bc0u, 0x3649e7f0u, 518, 803 }, // ee945bc03649e7f0 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*fp32:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=8;num_stages=1;;arch=gfx1201
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::bwd_kernel_dq_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               bwd_kernel_dq_packed_string);

static int8_t lut[1][10][10] =
{
// GPU gfx1201_mod0
{{ 0, 1, 0, 1, 0, 2, 2, 1, 2, 2},
 { 1, 1, 1, 2, 0, 1, 2, 1, 1, 2},
 { 0, 2, 1, 0, 2, 2, 1, 2, 0, 2},
 { 0, 1, 0, 2, 2, 0, 2, 1, 2, 1},
 { 0, 1, 1, 1,14,12,14,14,12,12},
 { 5, 5, 3, 3, 8, 5, 8,16,10,14},
 { 0, 3, 3, 3, 8, 8, 3, 8,16, 9},
 { 7, 3, 8, 3,16,10,12, 9,13,13},
 { 4, 3, 8, 3, 8,14,13, 9,13,15},
 { 6, 3, 8, 8, 8, 8,15,11,13,11}}
// End of GPU gfx1201_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::BwdKernelDqContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(BwdKernelDqContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_bwd_kernel_dq__A9__F433 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(bwd_kernel_dq__lut_lambda__0(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = bwd_kernel_dq__lut_lambda__0(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 1;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    context.NUM_XCDS = perf.NUM_XCDS;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*fp32:16"
// sm_scale = "fp32"
// L = "*fp32:16"
// D = "*fp32:16"
// num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// num_seqlens = "i32"
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// Window_left = 0
// Window_right = 0
// BLOCK_DMODEL = 64
// CAUSAL_TYPE = 0
// ENABLE_DROPOUT = False
// PADDED_HEAD = False
// BIAS_TYPE = 1

// ('SELECT * FROM FLASH$bwd_kernel_dq WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$CAUSAL_TYPE = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$PADDED_HEAD = ? AND inputs$BIAS_TYPE = ?', ['gfx1201_mod0', 'torch.float32', 64, 0, False, False, 1])

// vim: set fileencoding=utf-8

