// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.bwd_kernel_fuse.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_bwd_kernel_fuse__A10__F209

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 64 },
    { .BLOCK_M = 64, .BLOCK_N = 64 }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx120x/flash/bwd_kernel_fuse.zip)xyzw" };
#else
{ R"xyzw(amd-gfx120x/flash/bwd_kernel_fuse.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1200)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0xf62cead7u, 0xac5d3cbcu, 0, 350 }, // f62cead7ac5d3cbc = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x31c7b763u, 0x647a5c88u, 0, 164 }, // 31c7b763647a5c88 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x7f58f862u, 0x57e78585u, 0, 244 }, // 7f58f86257e78585 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x62cb3b2bu, 0xfac3a320u, 0, 390 }, // 62cb3b2bfac3a320 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xaf985026u, 0x0c242e7bu, 430, 350 }, // af9850260c242e7b = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x64b7a43au, 0x177e23c5u, 430, 164 }, // 64b7a43a177e23c5 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x8a79692eu, 0x193a4f04u, 430, 244 }, // 8a79692e193a4f04 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xea334417u, 0x13c89546u, 430, 390 }, // ea33441713c89546 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xe605b1adu, 0x8985c08bu, 102, 350 }, // e605b1ad8985c08b = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xb70f7244u, 0xea63e07cu, 102, 572 }, // b70f7244ea63e07c = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0xc62abb43u, 0x71548be8u, 102, 164 }, // c62abb4371548be8 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xcf40c52eu, 0x47187e34u, 102, 492 }, // cf40c52e47187e34 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x4559d432u, 0xe4ffa2d0u, 102, 244 }, // 4559d432e4ffa2d0 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xd0e3b8d4u, 0x0010a8f4u, 102, 390 }, // d0e3b8d40010a8f4 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x4e153ed7u, 0xb586c982u, 284, 164 }, // 4e153ed7b586c982 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x48ab2df9u, 0xbcfef1f6u, 284, 244 }, // 48ab2df9bcfef1f6 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xfeed9123u, 0xdc02bf8cu, 284, 390 }, // feed9123dc02bf8c = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x0301daaau, 0x36b63549u, 306, 244 }, // 0301daaa36b63549 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=64;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x09c3927fu, 0xddc343a3u, 306, 390 }, // 09c3927fddc343a3 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=0;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=64;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::bwd_kernel_fuse_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               bwd_kernel_fuse_packed_string);

static int8_t lut[1][10][10] =
{
// GPU gfx1200_mod0
{{ 5, 7, 5, 0,15,16,18,15,13,12},
 { 5, 2, 3, 0, 0,15,18, 8,10, 8},
 { 6, 0, 1, 1, 2,14,18,15,10,10},
 { 1, 5, 4, 4, 3,14,14, 4, 6,13},
 {12, 8, 7, 5, 4,15,15, 7, 6, 4},
 {12,12,13,12, 2,14, 6,18, 7, 5},
 {11, 9,12, 8, 4,15,14, 5, 5, 7},
 {12,10,12,10,15,14,14,15,14,15},
 { 8, 8,13,12,15,15,15,14,15,14},
 { 8,12,12, 8,15,14,16,15,14,17}}
// End of GPU gfx1200_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::BwdKernelFuseContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(BwdKernelFuseContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_bwd_kernel_fuse__A10__F209 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(bwd_kernel_fuse__lut_lambda__0(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = bwd_kernel_fuse__lut_lambda__0(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 1;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*bf16:16"
// sm_scale = "fp32"
// L = "*fp32:16"
// num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// num_seqlens = "i32"
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// Window_left = 0
// Window_right = 0
// BLOCK_DMODEL = 48
// CAUSAL_TYPE = 0
// ENABLE_DROPOUT = False
// PADDED_HEAD = False
// BIAS_TYPE = 1

// ('SELECT * FROM FLASH$bwd_kernel_fuse WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$CAUSAL_TYPE = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$PADDED_HEAD = ? AND inputs$BIAS_TYPE = ?', ['gfx1201_mod0', 'torch.bfloat16', 48, 0, False, False, 1])

// vim: set fileencoding=utf-8

