// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.attn_fwd.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_attn_fwd__A10__F321

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
    int8_t  PERSISTENT_TYPE;
    int8_t  GRID_CU_MULTIP;
    int8_t  NUM_XCDS;
    bool    PRE_LOAD_V;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx120x/flash/attn_fwd.zip)xyzw" };
#else
{ R"xyzw(amd-gfx120x/flash/attn_fwd.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1200)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0xf32605dbu, 0x15701eabu, 4084, 664 }, // f32605db15701eab = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xbe28da8bu, 0x7c35b8b1u, 4084, 373 }, // be28da8b7c35b8b1 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xd1e3ea89u, 0xda9ae64fu, 3582, 664 }, // d1e3ea89da9ae64f = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x830e80f6u, 0x90396867u, 3582, 373 }, // 830e80f690396867 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x02422066u, 0x3d6f174cu, 3582, 1251 }, // 024220663d6f174c = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x9664fb84u, 0x38cbcefau, 3582, 537 }, // 9664fb8438cbcefa = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xd685a1b1u, 0xb4de4ef1u, 4169, 373 }, // d685a1b1b4de4ef1 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x2eb3aa71u, 0xa2b5eb79u, 4169, 537 }, // 2eb3aa71a2b5eb79 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xaddf5274u, 0x5049cab7u, 3160, 664 }, // addf52745049cab7 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x62fd6793u, 0x4cfe670bu, 3160, 373 }, // 62fd67934cfe670b = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x8a3dbd24u, 0x0e034410u, 3160, 1251 }, // 8a3dbd240e034410 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xac14f8b3u, 0xc6796a91u, 3160, 4338 }, // ac14f8b3c6796a91 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x799fad95u, 0xdd0fcfe9u, 3160, 537 }, // 799fad95dd0fcfe9 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xa894d926u, 0x45abc3c9u, 3244, 664 }, // a894d92645abc3c9 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x1cbc0a6cu, 0x2fcb8886u, 3244, 3666 }, // 1cbc0a6c2fcb8886 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x543369d7u, 0x687f6a28u, 3244, 537 }, // 543369d7687f6a28 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x2229fb95u, 0x2b0116a8u, 3329, 664 }, // 2229fb952b0116a8 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x37601cf4u, 0xc3d193e6u, 3329, 3666 }, // 37601cf4c3d193e6 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x5c842d35u, 0x5761aefeu, 3329, 373 }, // 5c842d355761aefe = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x2a952de3u, 0x769a353fu, 3329, 1251 }, // 2a952de3769a353f = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xca51ff96u, 0xd9a6d1a6u, 3329, 537 }, // ca51ff96d9a6d1a6 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x2c2b4553u, 0x11690719u, 3413, 3666 }, // 2c2b455311690719 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x2aa70070u, 0x638ecc15u, 3498, 664 }, // 2aa70070638ecc15 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xa3b156dfu, 0x829ff082u, 3498, 3666 }, // a3b156df829ff082 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x06f691cfu, 0xb571154cu, 3498, 373 }, // 06f691cfb571154c = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x95e4a89eu, 0x8e4c5941u, 3498, 1251 }, // 95e4a89e8e4c5941 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x5a7d60dcu, 0x99eb5396u, 3498, 4338 }, // 5a7d60dc99eb5396 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x92d6962au, 0xd801a4f8u, 3498, 537 }, // 92d6962ad801a4f8 = b2sum -l 64 <<< amd-gfx120x/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=192;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=1;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::attn_fwd_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               attn_fwd_packed_string);

static int8_t lut[1][10][10] =
{
// GPU gfx1200_mod0
{{11,14,14,18, 5, 2, 2, 4, 5, 3},
 { 1,21, 5, 3, 3, 5, 4, 5, 4, 4},
 { 4, 2, 2, 4, 4, 3, 3, 5, 4, 4},
 { 5, 0, 4, 5, 5, 2, 2, 5, 5, 5},
 { 2, 2, 4, 2, 4, 4, 2, 4, 5,17},
 {13, 3, 2, 2, 2, 2, 3, 5,18, 2},
 {13, 6, 7,10,19,26,18,23,20,19},
 {16, 6, 4, 4,23,23,25,25,20,24},
 {16,12, 2,12,18,19,19,20,20,24},
 {15, 8, 5, 9,18,19,27,22,20,22}}
// End of GPU gfx1200_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::AttnFwdContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(AttnFwdContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_attn_fwd__A10__F321 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(attn_fwd__lut_lambda__0(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = attn_fwd__lut_lambda__0(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 1;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.PERSISTENT_TYPE = perf.PERSISTENT_TYPE;
    context.GRID_CU_MULTIP = perf.GRID_CU_MULTIP;
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    context.PRE_LOAD_V = perf.PRE_LOAD_V;
    context.NUM_XCDS = perf.NUM_XCDS;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*bf16:16"
// Sm_scale = "fp32"
// L = "*fp32:16"
// Q_descale = 0
// stride_az = 0
// Num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// BLOCK_DMODEL = 192
// Hdim_qk = 192
// PADDED_HEAD = False
// ENABLE_DROPOUT = False
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// RETURN_ENCODED_SOFTMAX = False
// CAUSAL_TYPE = 0
// Window_left = 0
// Window_right = 0
// BIAS_TYPE = 1
// USE_ALIBI = False
// INT8 = False
// persistent_atomic_counter = 0
// Num_CU = "i32"

// ('SELECT * FROM FLASH$attn_fwd WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$PADDED_HEAD = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$CAUSAL_TYPE = ? AND inputs$BIAS_TYPE = ?', ['gfx1201_mod0', 'torch.bfloat16', 192, False, False, 0, 1])

// vim: set fileencoding=utf-8

