// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.bwd_kernel_fuse.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_bwd_kernel_fuse__A10__F238

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 64 },
    { .BLOCK_M = 64, .BLOCK_N = 64 },
    { .BLOCK_M = 64, .BLOCK_N = 64 }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx120x/flash/bwd_kernel_fuse.zip)xyzw" };
#else
{ R"xyzw(amd-gfx120x/flash/bwd_kernel_fuse.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1200)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0x1bcd052eu, 0x1b961783u, 328, 350 }, // 1bcd052e1b961783 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xd037b5a9u, 0x07df2c38u, 328, 164 }, // d037b5a907df2c38 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x7d0d9ec0u, 0xe1d2a32du, 328, 244 }, // 7d0d9ec0e1d2a32d = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xb8805623u, 0xf2f27ebeu, 328, 390 }, // b8805623f2f27ebe = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xa182a429u, 0x95663fbdu, 0, 350 }, // a182a42995663fbd = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x5ec7a064u, 0x92a653bau, 0, 164 }, // 5ec7a06492a653ba = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x4a4afcf7u, 0x4492c5a8u, 0, 244 }, // 4a4afcf74492c5a8 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x23585e51u, 0xd5e6892bu, 0, 390 }, // 23585e51d5e6892b = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x8639475cu, 0x8adb0761u, 430, 350 }, // 8639475c8adb0761 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xa1eb6a65u, 0xadf2ec7au, 430, 164 }, // a1eb6a65adf2ec7a = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xcaa5fdc4u, 0x940f8c71u, 102, 350 }, // caa5fdc4940f8c71 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x44b391afu, 0x19548ccfu, 102, 572 }, // 44b391af19548ccf = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x0f18c903u, 0xf57f1fcfu, 102, 164 }, // 0f18c903f57f1fcf = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xf2c0d39du, 0xffa76b0cu, 102, 492 }, // f2c0d39dffa76b0c = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1200
    { 0xbdc31701u, 0x2839b699u, 102, 244 }, // bdc317012839b699 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x3d07195fu, 0xb6d8bff1u, 102, 390 }, // 3d07195fb6d8bff1 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x044ff3e9u, 0x96547f77u, 284, 350 }, // 044ff3e996547f77 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xf6259a71u, 0x7be86ec5u, 284, 390 }, // f6259a717be86ec5 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x0002a0a4u, 0x4abb87c7u, 306, 350 }, // 0002a0a44abb87c7 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xc0ee3308u, 0x0e2dc2bau, 306, 244 }, // c0ee33080e2dc2ba = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x694ecbf1u, 0x2e288fb5u, 306, 390 }, // 694ecbf12e288fb5 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=3;ENABLE_DROPOUT=True;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::bwd_kernel_fuse_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               bwd_kernel_fuse_packed_string);

static int8_t lut[1][10][10] =
{
// GPU gfx1200_mod0
{{ 0, 3, 0, 0, 0, 1, 1, 0, 1, 2},
 { 0, 0, 2, 5, 3, 0, 0, 2, 1, 1},
 { 3, 1, 5, 4, 4, 4, 1, 0, 1, 0},
 { 5, 5, 4, 5, 5, 5, 6, 3, 0, 1},
 { 5, 5, 7, 6, 9,10, 6,12, 5, 1},
 {10,10,10,12,10, 8, 8, 9, 8, 8},
 {13,11,11,12, 9, 8,16, 8, 9, 8},
 {10,10,12,12,17,17,16,16,16,16},
 {14,14,15,12,12,17,17,16,18,20},
 {14,15,12,15,14,16,16,16,18,19}}
// End of GPU gfx1200_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::BwdKernelFuseContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(BwdKernelFuseContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_bwd_kernel_fuse__A10__F238 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(bwd_kernel_fuse__lut_lambda__0(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = bwd_kernel_fuse__lut_lambda__0(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 5;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*bf16:16"
// sm_scale = "fp32"
// L = "*fp32:16"
// stride_bz = 0
// stride_bh = 0
// stride_bm = 0
// stride_dbz = 0
// stride_dbh = 0
// stride_dbm = 0
// num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// num_seqlens = "i32"
// dropout_p = "fp32"
// philox_seed_ptr = "*u64"
// philox_offset2 = "u64"
// Window_left = "i32"
// Window_right = "i32"
// BLOCK_DMODEL = 64
// CAUSAL_TYPE = 3
// ENABLE_DROPOUT = True
// PADDED_HEAD = True
// BIAS_TYPE = 0

// ('SELECT * FROM FLASH$bwd_kernel_fuse WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$CAUSAL_TYPE = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$PADDED_HEAD = ? AND inputs$BIAS_TYPE = ?', ['gfx1201_mod0', 'torch.bfloat16', 64, 3, True, False, 0])

// vim: set fileencoding=utf-8

