// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.attn_fwd.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_attn_fwd__A2__F64

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 16, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 0, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 1})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
    int8_t  PERSISTENT_TYPE;
    int8_t  GRID_CU_MULTIP;
    int8_t  NUM_XCDS;
    bool    PRE_LOAD_V;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 16, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 0, .GRID_CU_MULTIP = 2, .NUM_XCDS = 1, .PRE_LOAD_V = true }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx110x/flash/attn_fwd.zip)xyzw" };
#else
{ R"xyzw(amd-gfx110x/flash/attn_fwd.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1101)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0x6a29b0bfu, 0x1c887b6bu, 4084, 664 }, // 6a29b0bf1c887b6b = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x7d779fa8u, 0x269685feu, 4084, 1251 }, // 7d779fa8269685fe = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1101
    { 0xbf98eb2bu, 0xfc6cd96cu, 4084, 537 }, // bf98eb2bfc6cd96c = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x1f7a31ebu, 0xae7c51b3u, 3582, 664 }, // 1f7a31ebae7c51b3 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1101
    { 0xf4db6f02u, 0xfbf9cec6u, 3582, 373 }, // f4db6f02fbf9cec6 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x1a787ee4u, 0xf82aa718u, 3582, 1251 }, // 1a787ee4f82aa718 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x72fa4f6du, 0x5dcc65f9u, 3582, 537 }, // 72fa4f6d5dcc65f9 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=16;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x25bdc7c1u, 0xb8084511u, 3160, 664 }, // 25bdc7c1b8084511 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1101
    { 0xd83f3c84u, 0x5b932687u, 3160, 373 }, // d83f3c845b932687 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x5547b008u, 0xad3a0723u, 3160, 537 }, // 5547b008ad3a0723 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x81519926u, 0xd93677c2u, 3244, 664 }, // 81519926d93677c2 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1101
    { 0xab9d4ae5u, 0xb1f3328au, 3244, 373 }, // ab9d4ae5b1f3328a = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x7cd8c1eau, 0x62e9f6dfu, 3244, 537 }, // 7cd8c1ea62e9f6df = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1101
    { 0xaa2a7d9du, 0x7420e3e9u, 3329, 664 }, // aa2a7d9d7420e3e9 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1101
    { 0xd8eb5794u, 0x7a772eacu, 3329, 3666 }, // d8eb57947a772eac = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1101
    { 0x19f95cfbu, 0x032d6320u, 3329, 373 }, // 19f95cfb032d6320 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x6b05e24fu, 0xdb8b9f7eu, 3329, 1251 }, // 6b05e24fdb8b9f7e = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x2020b4beu, 0xc770d133u, 3413, 3666 }, // 2020b4bec770d133 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1101
    { 0x590076b1u, 0xc1daa0b1u, 3413, 373 }, // 590076b1c1daa0b1 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x73921928u, 0x1e1202ddu, 3413, 1251 }, // 739219281e1202dd = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x52ffe743u, 0x695fe35du, 3413, 537 }, // 52ffe743695fe35d = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x20848cb1u, 0xad9cd5e9u, 3498, 664 }, // 20848cb1ad9cd5e9 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1101
    { 0xb3c35966u, 0x2afd551cu, 3498, 373 }, // b3c359662afd551c = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1101
    { 0x41aa9e0au, 0xc2c06590u, 3498, 1251 }, // 41aa9e0ac2c06590 = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1101
    { 0xb8137d4du, 0xb80b02edu, 3498, 537 }, // b8137d4db80b02ed = b2sum -l 64 <<< amd-gfx110x/flash/attn_fwd.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=80;PADDED_HEAD=False;ENABLE_DROPOUT=False;CAUSAL_TYPE=0;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=0;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1101
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::attn_fwd_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               attn_fwd_packed_string);

static int8_t lut[1][8][8] =
{
// GPU gfx1101_mod0
{{ 4,12,10,11,10,16,15,13},
 { 0, 2, 3, 6, 5, 4, 6, 4},
 { 3, 0, 6, 4, 3, 4, 4,14},
 { 6, 6, 0, 4, 2, 0,17,17},
 {13, 7, 9, 7, 1,13,24,22},
 {11, 8, 9,22,21,23,21,22},
 {12, 9, 9,20,24,23,21,22},
 {11, 8, 9,18,18,19,20,24}}
// End of GPU gfx1101_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::AttnFwdContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(AttnFwdContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_attn_fwd__A2__F64 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(attn_fwd__lut_lambda__1(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = attn_fwd__lut_lambda__1(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 0;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.PERSISTENT_TYPE = perf.PERSISTENT_TYPE;
    context.GRID_CU_MULTIP = perf.GRID_CU_MULTIP;
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    context.PRE_LOAD_V = perf.PRE_LOAD_V;
    context.NUM_XCDS = perf.NUM_XCDS;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*fp16:16"
// Sm_scale = "fp32"
// L = "*fp32:16"
// Q_descale = 0
// stride_bz = 0
// stride_bh = 0
// stride_bm = 0
// stride_az = 0
// Num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// BLOCK_DMODEL = 80
// Hdim_qk = 80
// PADDED_HEAD = False
// ENABLE_DROPOUT = False
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// RETURN_ENCODED_SOFTMAX = False
// CAUSAL_TYPE = 0
// Window_left = 0
// Window_right = 0
// BIAS_TYPE = 0
// USE_ALIBI = False
// INT8 = False
// persistent_atomic_counter = 0
// Num_CU = "i32"

// ('SELECT * FROM FLASH$attn_fwd WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$PADDED_HEAD = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$CAUSAL_TYPE = ? AND inputs$BIAS_TYPE = ?', ['gfx1100_mod0', 'torch.float16', 80, False, False, 0, 0])

// vim: set fileencoding=utf-8

