// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.bwd_kernel_fuse.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_bwd_kernel_fuse__A6__F184

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 64 },
    { .BLOCK_M = 64, .BLOCK_N = 64 }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx115x/flash/bwd_kernel_fuse.zip)xyzw" };
#else
{ R"xyzw(amd-gfx115x/flash/bwd_kernel_fuse.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1151)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0x7359afa3u, 0x5996a45du, 328, 350 }, // 7359afa35996a45d = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xeda7d1f4u, 0xe6117f6fu, 328, 390 }, // eda7d1f4e6117f6f = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x2faeea67u, 0x4009fb8cu, 0, 350 }, // 2faeea674009fb8c = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xcd880c77u, 0x829af563u, 0, 164 }, // cd880c77829af563 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x27f06350u, 0xbdcbf1ffu, 0, 244 }, // 27f06350bdcbf1ff = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x25e73c17u, 0x9d442899u, 0, 390 }, // 25e73c179d442899 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xf448958fu, 0x323ef1cfu, 430, 350 }, // f448958f323ef1cf = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x12cebee7u, 0x2265547bu, 430, 164 }, // 12cebee72265547b = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xbfc0a1cau, 0x6c0ab149u, 430, 244 }, // bfc0a1ca6c0ab149 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xe3801ec7u, 0xdece3c45u, 430, 390 }, // e3801ec7dece3c45 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x8b4a95c7u, 0x1ae479dfu, 102, 350 }, // 8b4a95c71ae479df = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xc01299abu, 0x3d750cceu, 102, 164 }, // c01299ab3d750cce = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xd976fd12u, 0x17d14483u, 102, 244 }, // d976fd1217d14483 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xd0598327u, 0xbc844de0u, 102, 390 }, // d0598327bc844de0 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x9013a7c8u, 0xde826584u, 284, 350 }, // 9013a7c8de826584 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x2fc5ada8u, 0xb3627329u, 284, 164 }, // 2fc5ada8b3627329 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x71d4baefu, 0x0309e49bu, 284, 244 }, // 71d4baef0309e49b = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x29b82cccu, 0x944ba9e6u, 284, 390 }, // 29b82ccc944ba9e6 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1151
    { 0x9e2ee69du, 0x61f61132u, 306, 164 }, // 9e2ee69d61f61132 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1151
    { 0xc03ac455u, 0xfaad8287u, 306, 390 }, // c03ac455faad8287 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_fuse.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=16;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1151
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::bwd_kernel_fuse_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               bwd_kernel_fuse_packed_string);

static int8_t lut[1][8][8] =
{
// GPU gfx1151_mod0
{{ 8, 5, 7, 0, 1, 1, 9, 7},
 { 5, 2, 9, 3, 6, 2, 9, 9},
 {12,10,10,10, 4, 8, 7,15},
 {11,13,11,12,12,13, 2, 6},
 {10,15,12,10,11,11,14,17},
 {13,14,14,15,14,17,14,14},
 {13,16,12,11,15,14,19,19},
 {13,10,14,15,15,14,19,18}}
// End of GPU gfx1151_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::BwdKernelFuseContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(BwdKernelFuseContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_bwd_kernel_fuse__A6__F184 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(bwd_kernel_fuse__lut_lambda__2(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = bwd_kernel_fuse__lut_lambda__2(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 4;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*bf16:16"
// sm_scale = "fp32"
// L = "*fp32:16"
// stride_bz = 0
// stride_bh = 0
// stride_bm = 0
// stride_dbz = 0
// stride_dbh = 0
// stride_dbm = 0
// num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// num_seqlens = "i32"
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// Window_left = "i32"
// Window_right = "i32"
// BLOCK_DMODEL = 16
// CAUSAL_TYPE = 3
// ENABLE_DROPOUT = False
// PADDED_HEAD = False
// BIAS_TYPE = 0

// ('SELECT * FROM FLASH$bwd_kernel_fuse WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$CAUSAL_TYPE = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$PADDED_HEAD = ? AND inputs$BIAS_TYPE = ?', ['gfx1100_mod0', 'torch.bfloat16', 16, 3, False, False, 0])

// vim: set fileencoding=utf-8

