/* Capstone Disassembly Engine, https://www.capstone-engine.org */
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
/*    Rot127 <unisono@quyllur.org> 2022-2024 */
/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */

/* LLVM-commit: <commit> */
/* LLVM-tag: <tag> */

/* Do not edit. */

/* Capstone's LLVM TableGen Backends: */
/* https://github.com/capstone-engine/llvm-capstone */

#include <capstone/platform.h>
#include "../../cs_priv.h"

/// getMnemonic - This method is automatically generated by tablegen
/// from the instruction set description.
static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
#ifndef CAPSTONE_DIET
  static const char AsmStrs[] = {
  /* 0 */ "ins \t\0"
  /* 6 */ "dmfc0\t\0"
  /* 13 */ "dmfgc0\t\0"
  /* 21 */ "mfhgc0\t\0"
  /* 29 */ "mthgc0\t\0"
  /* 37 */ "dmtgc0\t\0"
  /* 45 */ "mfhc0\t\0"
  /* 52 */ "mthc0\t\0"
  /* 59 */ "dmtc0\t\0"
  /* 66 */ "vmm0\t\0"
  /* 72 */ "mtm0\t\0"
  /* 78 */ "mtp0\t\0"
  /* 84 */ "bbit0\t\0"
  /* 91 */ "ldc1\t\0"
  /* 97 */ "sdc1\t\0"
  /* 103 */ "cfc1\t\0"
  /* 109 */ "dmfc1\t\0"
  /* 116 */ "mfhc1\t\0"
  /* 123 */ "mthc1\t\0"
  /* 130 */ "ctc1\t\0"
  /* 136 */ "dmtc1\t\0"
  /* 143 */ "lwc1\t\0"
  /* 149 */ "swc1\t\0"
  /* 155 */ "ldxc1\t\0"
  /* 162 */ "sdxc1\t\0"
  /* 169 */ "luxc1\t\0"
  /* 176 */ "suxc1\t\0"
  /* 183 */ "lwxc1\t\0"
  /* 190 */ "swxc1\t\0"
  /* 197 */ "mtm1\t\0"
  /* 203 */ "mtp1\t\0"
  /* 209 */ "bbit1\t\0"
  /* 216 */ "bbit032\t\0"
  /* 225 */ "bbit132\t\0"
  /* 234 */ "dsra32\t\0"
  /* 242 */ "bposge32\t\0"
  /* 252 */ "dsll32\t\0"
  /* 260 */ "dsrl32\t\0"
  /* 268 */ "lwm32\t\0"
  /* 275 */ "swm32\t\0"
  /* 282 */ "drotr32\t\0"
  /* 291 */ "cins32\t\0"
  /* 299 */ "exts32\t\0"
  /* 307 */ "ldc2\t\0"
  /* 313 */ "sdc2\t\0"
  /* 319 */ "cfc2\t\0"
  /* 325 */ "dmfc2\t\0"
  /* 332 */ "mfhc2\t\0"
  /* 339 */ "mthc2\t\0"
  /* 346 */ "ctc2\t\0"
  /* 352 */ "dmtc2\t\0"
  /* 359 */ "lwc2\t\0"
  /* 365 */ "swc2\t\0"
  /* 371 */ "mtm2\t\0"
  /* 377 */ "mtp2\t\0"
  /* 383 */ "addiur2\t\0"
  /* 392 */ "ldc3\t\0"
  /* 398 */ "sdc3\t\0"
  /* 404 */ "lwc3\t\0"
  /* 410 */ "swc3\t\0"
  /* 416 */ "addius5\t\0"
  /* 425 */ "sb16\t\0"
  /* 431 */ "bc16\t\0"
  /* 437 */ "jrc16\t\0"
  /* 444 */ "bnezc16\t\0"
  /* 453 */ "beqzc16\t\0"
  /* 462 */ "and16\t\0"
  /* 469 */ "move16\t\0"
  /* 477 */ "sh16\t\0"
  /* 483 */ "andi16\t\0"
  /* 491 */ "mfhi16\t\0"
  /* 499 */ "li16\t\0"
  /* 505 */ "break16\t\0"
  /* 514 */ "sll16\t\0"
  /* 521 */ "srl16\t\0"
  /* 528 */ "lwm16\t\0"
  /* 535 */ "swm16\t\0"
  /* 542 */ "mflo16\t\0"
  /* 550 */ "sdbbp16\t\0"
  /* 559 */ "jr16\t\0"
  /* 565 */ "xor16\t\0"
  /* 572 */ "jalrs16\t\0"
  /* 581 */ "not16\t\0"
  /* 588 */ "lbu16\t\0"
  /* 595 */ "subu16\t\0"
  /* 603 */ "addu16\t\0"
  /* 611 */ "lhu16\t\0"
  /* 618 */ "lw16\t\0"
  /* 624 */ "sw16\t\0"
  /* 630 */ "bnez16\t\0"
  /* 638 */ "beqz16\t\0"
  /* 646 */ "andi[32]\t\0"
  /* 656 */ "addiu[32]\t\0"
  /* 667 */ "addiu[r2]\t\0"
  /* 678 */ "addiu[rs5]\t\0"
  /* 690 */ "balc[16]\t\0"
  /* 700 */ "andi[16]\t\0"
  /* 710 */ "li[48]\t\0"
  /* 718 */ "addiu[48]\t\0"
  /* 729 */ "addiu[gp48]\t\0"
  /* 742 */ "addiu[gp.b]\t\0"
  /* 755 */ "addiu[neg]\t\0"
  /* 767 */ "addiu[r1.sp]\t\0"
  /* 781 */ "addiu[gp.w]\t\0"
  /* 794 */ "saa\t\0"
  /* 799 */ "preceu.ph.qbla\t\0"
  /* 815 */ "precequ.ph.qbla\t\0"
  /* 832 */ "dla\t\0"
  /* 837 */ "preceu.ph.qbra\t\0"
  /* 853 */ "precequ.ph.qbra\t\0"
  /* 870 */ "dsra\t\0"
  /* 876 */ "dlsa\t\0"
  /* 882 */ "cfcmsa\t\0"
  /* 890 */ "ctcmsa\t\0"
  /* 898 */ "add_a.b\t\0"
  /* 907 */ "min_a.b\t\0"
  /* 916 */ "adds_a.b\t\0"
  /* 926 */ "max_a.b\t\0"
  /* 935 */ "sra.b\t\0"
  /* 942 */ "nloc.b\t\0"
  /* 950 */ "lapc.b\t\0"
  /* 958 */ "nlzc.b\t\0"
  /* 966 */ "sld.b\t\0"
  /* 973 */ "pckod.b\t\0"
  /* 982 */ "ilvod.b\t\0"
  /* 991 */ "insve.b\t\0"
  /* 1000 */ "vshf.b\t\0"
  /* 1008 */ "bneg.b\t\0"
  /* 1016 */ "srai.b\t\0"
  /* 1024 */ "sldi.b\t\0"
  /* 1032 */ "andi.b\t\0"
  /* 1040 */ "bnegi.b\t\0"
  /* 1049 */ "bseli.b\t\0"
  /* 1058 */ "slli.b\t\0"
  /* 1066 */ "srli.b\t\0"
  /* 1074 */ "binsli.b\t\0"
  /* 1084 */ "ceqi.b\t\0"
  /* 1092 */ "srari.b\t\0"
  /* 1101 */ "bclri.b\t\0"
  /* 1110 */ "srlri.b\t\0"
  /* 1119 */ "nori.b\t\0"
  /* 1127 */ "xori.b\t\0"
  /* 1135 */ "binsri.b\t\0"
  /* 1145 */ "splati.b\t\0"
  /* 1155 */ "bseti.b\t\0"
  /* 1164 */ "subvi.b\t\0"
  /* 1173 */ "addvi.b\t\0"
  /* 1182 */ "bmzi.b\t\0"
  /* 1190 */ "bmnzi.b\t\0"
  /* 1199 */ "fill.b\t\0"
  /* 1207 */ "sll.b\t\0"
  /* 1214 */ "srl.b\t\0"
  /* 1221 */ "binsl.b\t\0"
  /* 1230 */ "ilvl.b\t\0"
  /* 1238 */ "ceq.b\t\0"
  /* 1245 */ "srar.b\t\0"
  /* 1253 */ "bclr.b\t\0"
  /* 1261 */ "srlr.b\t\0"
  /* 1269 */ "binsr.b\t\0"
  /* 1278 */ "ilvr.b\t\0"
  /* 1286 */ "asub_s.b\t\0"
  /* 1296 */ "mod_s.b\t\0"
  /* 1305 */ "cle_s.b\t\0"
  /* 1314 */ "ave_s.b\t\0"
  /* 1323 */ "clei_s.b\t\0"
  /* 1333 */ "mini_s.b\t\0"
  /* 1343 */ "clti_s.b\t\0"
  /* 1353 */ "maxi_s.b\t\0"
  /* 1363 */ "min_s.b\t\0"
  /* 1372 */ "aver_s.b\t\0"
  /* 1382 */ "subs_s.b\t\0"
  /* 1392 */ "adds_s.b\t\0"
  /* 1402 */ "sat_s.b\t\0"
  /* 1411 */ "clt_s.b\t\0"
  /* 1420 */ "subsuu_s.b\t\0"
  /* 1432 */ "div_s.b\t\0"
  /* 1441 */ "max_s.b\t\0"
  /* 1450 */ "copy_s.b\t\0"
  /* 1460 */ "splat.b\t\0"
  /* 1469 */ "bset.b\t\0"
  /* 1477 */ "pcnt.b\t\0"
  /* 1485 */ "insert.b\t\0"
  /* 1495 */ "st.b\t\0"
  /* 1501 */ "asub_u.b\t\0"
  /* 1511 */ "mod_u.b\t\0"
  /* 1520 */ "cle_u.b\t\0"
  /* 1529 */ "ave_u.b\t\0"
  /* 1538 */ "clei_u.b\t\0"
  /* 1548 */ "mini_u.b\t\0"
  /* 1558 */ "clti_u.b\t\0"
  /* 1568 */ "maxi_u.b\t\0"
  /* 1578 */ "min_u.b\t\0"
  /* 1587 */ "aver_u.b\t\0"
  /* 1597 */ "subs_u.b\t\0"
  /* 1607 */ "adds_u.b\t\0"
  /* 1617 */ "subsus_u.b\t\0"
  /* 1629 */ "sat_u.b\t\0"
  /* 1638 */ "clt_u.b\t\0"
  /* 1647 */ "div_u.b\t\0"
  /* 1656 */ "max_u.b\t\0"
  /* 1665 */ "copy_u.b\t\0"
  /* 1675 */ "msubv.b\t\0"
  /* 1684 */ "maddv.b\t\0"
  /* 1693 */ "pckev.b\t\0"
  /* 1702 */ "ilvev.b\t\0"
  /* 1711 */ "mulv.b\t\0"
  /* 1719 */ "bz.b\t\0"
  /* 1725 */ "bnz.b\t\0"
  /* 1732 */ "crc32b\t\0"
  /* 1740 */ "crc32cb\t\0"
  /* 1749 */ "seb\t\0"
  /* 1754 */ "jalrc.hb\t\0"
  /* 1764 */ "jr.hb\t\0"
  /* 1771 */ "jalr.hb\t\0"
  /* 1780 */ "lb\t\0"
  /* 1784 */ "shra.qb\t\0"
  /* 1793 */ "cmpgdu.le.qb\t\0"
  /* 1807 */ "cmpgu.le.qb\t\0"
  /* 1820 */ "cmpu.le.qb\t\0"
  /* 1832 */ "subuh.qb\t\0"
  /* 1842 */ "adduh.qb\t\0"
  /* 1852 */ "pick.qb\t\0"
  /* 1861 */ "shll.qb\t\0"
  /* 1870 */ "repl.qb\t\0"
  /* 1879 */ "shrl.qb\t\0"
  /* 1888 */ "cmpgdu.eq.qb\t\0"
  /* 1902 */ "cmpgu.eq.qb\t\0"
  /* 1915 */ "cmpu.eq.qb\t\0"
  /* 1927 */ "shra_r.qb\t\0"
  /* 1938 */ "subuh_r.qb\t\0"
  /* 1950 */ "adduh_r.qb\t\0"
  /* 1962 */ "shrav_r.qb\t\0"
  /* 1974 */ "absq_s.qb\t\0"
  /* 1985 */ "subu_s.qb\t\0"
  /* 1996 */ "addu_s.qb\t\0"
  /* 2007 */ "cmpgdu.lt.qb\t\0"
  /* 2021 */ "cmpgu.lt.qb\t\0"
  /* 2034 */ "cmpu.lt.qb\t\0"
  /* 2046 */ "subu.qb\t\0"
  /* 2055 */ "addu.qb\t\0"
  /* 2064 */ "shrav.qb\t\0"
  /* 2074 */ "shllv.qb\t\0"
  /* 2084 */ "replv.qb\t\0"
  /* 2094 */ "shrlv.qb\t\0"
  /* 2104 */ "raddu.w.qb\t\0"
  /* 2116 */ "sb\t\0"
  /* 2120 */ "modsub\t\0"
  /* 2128 */ "msub\t\0"
  /* 2134 */ "bposge32c\t\0"
  /* 2145 */ "bc\t\0"
  /* 2149 */ "bgec\t\0"
  /* 2155 */ "bnec\t\0"
  /* 2161 */ "bgeic\t\0"
  /* 2168 */ "bneic\t\0"
  /* 2175 */ "jic\t\0"
  /* 2180 */ "beqic\t\0"
  /* 2187 */ "bltic\t\0"
  /* 2194 */ "move.balc\t\0"
  /* 2205 */ "jialc\t\0"
  /* 2212 */ "bgezalc\t\0"
  /* 2221 */ "blezalc\t\0"
  /* 2230 */ "bnezalc\t\0"
  /* 2239 */ "beqzalc\t\0"
  /* 2248 */ "bgtzalc\t\0"
  /* 2257 */ "bltzalc\t\0"
  /* 2266 */ "sync\t\0"
  /* 2272 */ "ldpc\t\0"
  /* 2278 */ "auipc\t\0"
  /* 2285 */ "aluipc\t\0"
  /* 2293 */ "addiupc\t\0"
  /* 2302 */ "lwupc\t\0"
  /* 2309 */ "lwpc\t\0"
  /* 2315 */ "swpc\t\0"
  /* 2321 */ "beqc\t\0"
  /* 2327 */ "restore.jrc\t\0"
  /* 2340 */ "jalrc\t\0"
  /* 2347 */ "addsc\t\0"
  /* 2354 */ "brsc\t\0"
  /* 2360 */ "balrsc\t\0"
  /* 2368 */ "bltc\t\0"
  /* 2374 */ "bgeuc\t\0"
  /* 2381 */ "bgeiuc\t\0"
  /* 2389 */ "bltiuc\t\0"
  /* 2397 */ "bltuc\t\0"
  /* 2404 */ "bnvc\t\0"
  /* 2410 */ "bovc\t\0"
  /* 2416 */ "addwc\t\0"
  /* 2423 */ "bgezc\t\0"
  /* 2430 */ "blezc\t\0"
  /* 2437 */ "bc1nezc\t\0"
  /* 2446 */ "bc2nezc\t\0"
  /* 2455 */ "bbnezc\t\0"
  /* 2463 */ "bc1eqzc\t\0"
  /* 2472 */ "bc2eqzc\t\0"
  /* 2481 */ "bbeqzc\t\0"
  /* 2489 */ "bgtzc\t\0"
  /* 2496 */ "bltzc\t\0"
  /* 2503 */ "flog2.d\t\0"
  /* 2512 */ "fexp2.d\t\0"
  /* 2521 */ "add_a.d\t\0"
  /* 2530 */ "fmin_a.d\t\0"
  /* 2540 */ "adds_a.d\t\0"
  /* 2550 */ "fmax_a.d\t\0"
  /* 2560 */ "mina.d\t\0"
  /* 2568 */ "sra.d\t\0"
  /* 2575 */ "maxa.d\t\0"
  /* 2583 */ "fsub.d\t\0"
  /* 2591 */ "fmsub.d\t\0"
  /* 2600 */ "nmsub.d\t\0"
  /* 2609 */ "nloc.d\t\0"
  /* 2617 */ "nlzc.d\t\0"
  /* 2625 */ "fadd.d\t\0"
  /* 2633 */ "fmadd.d\t\0"
  /* 2642 */ "nmadd.d\t\0"
  /* 2651 */ "sld.d\t\0"
  /* 2658 */ "pckod.d\t\0"
  /* 2667 */ "ilvod.d\t\0"
  /* 2676 */ "c.nge.d\t\0"
  /* 2685 */ "c.le.d\t\0"
  /* 2693 */ "cmp.le.d\t\0"
  /* 2703 */ "fcle.d\t\0"
  /* 2711 */ "c.ngle.d\t\0"
  /* 2721 */ "c.ole.d\t\0"
  /* 2730 */ "cmp.sle.d\t\0"
  /* 2741 */ "fsle.d\t\0"
  /* 2749 */ "c.ule.d\t\0"
  /* 2758 */ "cmp.ule.d\t\0"
  /* 2769 */ "fcule.d\t\0"
  /* 2778 */ "cmp.sule.d\t\0"
  /* 2790 */ "fsule.d\t\0"
  /* 2799 */ "fcne.d\t\0"
  /* 2807 */ "fsne.d\t\0"
  /* 2815 */ "fcune.d\t\0"
  /* 2824 */ "fsune.d\t\0"
  /* 2833 */ "insve.d\t\0"
  /* 2842 */ "c.f.d\t\0"
  /* 2849 */ "cmp.af.d\t\0"
  /* 2859 */ "fcaf.d\t\0"
  /* 2867 */ "cmp.saf.d\t\0"
  /* 2878 */ "fsaf.d\t\0"
  /* 2886 */ "msubf.d\t\0"
  /* 2895 */ "maddf.d\t\0"
  /* 2904 */ "vshf.d\t\0"
  /* 2912 */ "c.sf.d\t\0"
  /* 2920 */ "movf.d\t\0"
  /* 2928 */ "bneg.d\t\0"
  /* 2936 */ "srai.d\t\0"
  /* 2944 */ "sldi.d\t\0"
  /* 2952 */ "bnegi.d\t\0"
  /* 2961 */ "slli.d\t\0"
  /* 2969 */ "srli.d\t\0"
  /* 2977 */ "binsli.d\t\0"
  /* 2987 */ "ceqi.d\t\0"
  /* 2995 */ "srari.d\t\0"
  /* 3004 */ "bclri.d\t\0"
  /* 3013 */ "srlri.d\t\0"
  /* 3022 */ "binsri.d\t\0"
  /* 3032 */ "splati.d\t\0"
  /* 3042 */ "bseti.d\t\0"
  /* 3051 */ "subvi.d\t\0"
  /* 3060 */ "addvi.d\t\0"
  /* 3069 */ "trunc.l.d\t\0"
  /* 3080 */ "round.l.d\t\0"
  /* 3091 */ "ceil.l.d\t\0"
  /* 3101 */ "floor.l.d\t\0"
  /* 3112 */ "cvt.l.d\t\0"
  /* 3121 */ "sel.d\t\0"
  /* 3128 */ "c.ngl.d\t\0"
  /* 3137 */ "fill.d\t\0"
  /* 3145 */ "sll.d\t\0"
  /* 3152 */ "fexupl.d\t\0"
  /* 3162 */ "ffql.d\t\0"
  /* 3170 */ "srl.d\t\0"
  /* 3177 */ "binsl.d\t\0"
  /* 3186 */ "fmul.d\t\0"
  /* 3194 */ "ilvl.d\t\0"
  /* 3202 */ "fmin.d\t\0"
  /* 3210 */ "c.un.d\t\0"
  /* 3218 */ "cmp.un.d\t\0"
  /* 3228 */ "fcun.d\t\0"
  /* 3236 */ "cmp.sun.d\t\0"
  /* 3247 */ "fsun.d\t\0"
  /* 3255 */ "movn.d\t\0"
  /* 3263 */ "frcp.d\t\0"
  /* 3271 */ "recip.d\t\0"
  /* 3280 */ "c.eq.d\t\0"
  /* 3288 */ "cmp.eq.d\t\0"
  /* 3298 */ "fceq.d\t\0"
  /* 3306 */ "c.seq.d\t\0"
  /* 3315 */ "cmp.seq.d\t\0"
  /* 3326 */ "fseq.d\t\0"
  /* 3334 */ "c.ueq.d\t\0"
  /* 3343 */ "cmp.ueq.d\t\0"
  /* 3354 */ "fcueq.d\t\0"
  /* 3363 */ "cmp.sueq.d\t\0"
  /* 3375 */ "fsueq.d\t\0"
  /* 3384 */ "srar.d\t\0"
  /* 3392 */ "bclr.d\t\0"
  /* 3400 */ "srlr.d\t\0"
  /* 3408 */ "fcor.d\t\0"
  /* 3416 */ "fsor.d\t\0"
  /* 3424 */ "fexupr.d\t\0"
  /* 3434 */ "ffqr.d\t\0"
  /* 3442 */ "binsr.d\t\0"
  /* 3451 */ "ilvr.d\t\0"
  /* 3459 */ "cvt.s.d\t\0"
  /* 3468 */ "asub_s.d\t\0"
  /* 3478 */ "hsub_s.d\t\0"
  /* 3488 */ "dpsub_s.d\t\0"
  /* 3499 */ "ftrunc_s.d\t\0"
  /* 3511 */ "hadd_s.d\t\0"
  /* 3521 */ "dpadd_s.d\t\0"
  /* 3532 */ "mod_s.d\t\0"
  /* 3541 */ "cle_s.d\t\0"
  /* 3550 */ "ave_s.d\t\0"
  /* 3559 */ "clei_s.d\t\0"
  /* 3569 */ "mini_s.d\t\0"
  /* 3579 */ "clti_s.d\t\0"
  /* 3589 */ "maxi_s.d\t\0"
  /* 3599 */ "min_s.d\t\0"
  /* 3608 */ "dotp_s.d\t\0"
  /* 3618 */ "aver_s.d\t\0"
  /* 3628 */ "subs_s.d\t\0"
  /* 3638 */ "adds_s.d\t\0"
  /* 3648 */ "sat_s.d\t\0"
  /* 3657 */ "clt_s.d\t\0"
  /* 3666 */ "ffint_s.d\t\0"
  /* 3677 */ "ftint_s.d\t\0"
  /* 3688 */ "subsuu_s.d\t\0"
  /* 3700 */ "div_s.d\t\0"
  /* 3709 */ "max_s.d\t\0"
  /* 3718 */ "copy_s.d\t\0"
  /* 3728 */ "abs.d\t\0"
  /* 3735 */ "fclass.d\t\0"
  /* 3745 */ "splat.d\t\0"
  /* 3754 */ "bset.d\t\0"
  /* 3762 */ "c.ngt.d\t\0"
  /* 3771 */ "c.lt.d\t\0"
  /* 3779 */ "cmp.lt.d\t\0"
  /* 3789 */ "fclt.d\t\0"
  /* 3797 */ "c.olt.d\t\0"
  /* 3806 */ "cmp.slt.d\t\0"
  /* 3817 */ "fslt.d\t\0"
  /* 3825 */ "c.ult.d\t\0"
  /* 3834 */ "cmp.ult.d\t\0"
  /* 3845 */ "fcult.d\t\0"
  /* 3854 */ "cmp.sult.d\t\0"
  /* 3866 */ "fsult.d\t\0"
  /* 3875 */ "pcnt.d\t\0"
  /* 3883 */ "frint.d\t\0"
  /* 3892 */ "insert.d\t\0"
  /* 3902 */ "fsqrt.d\t\0"
  /* 3911 */ "frsqrt.d\t\0"
  /* 3921 */ "st.d\t\0"
  /* 3927 */ "movt.d\t\0"
  /* 3935 */ "asub_u.d\t\0"
  /* 3945 */ "hsub_u.d\t\0"
  /* 3955 */ "dpsub_u.d\t\0"
  /* 3966 */ "ftrunc_u.d\t\0"
  /* 3978 */ "hadd_u.d\t\0"
  /* 3988 */ "dpadd_u.d\t\0"
  /* 3999 */ "mod_u.d\t\0"
  /* 4008 */ "cle_u.d\t\0"
  /* 4017 */ "ave_u.d\t\0"
  /* 4026 */ "clei_u.d\t\0"
  /* 4036 */ "mini_u.d\t\0"
  /* 4046 */ "clti_u.d\t\0"
  /* 4056 */ "maxi_u.d\t\0"
  /* 4066 */ "min_u.d\t\0"
  /* 4075 */ "dotp_u.d\t\0"
  /* 4085 */ "aver_u.d\t\0"
  /* 4095 */ "subs_u.d\t\0"
  /* 4105 */ "adds_u.d\t\0"
  /* 4115 */ "subsus_u.d\t\0"
  /* 4127 */ "sat_u.d\t\0"
  /* 4136 */ "clt_u.d\t\0"
  /* 4145 */ "ffint_u.d\t\0"
  /* 4156 */ "ftint_u.d\t\0"
  /* 4167 */ "div_u.d\t\0"
  /* 4176 */ "max_u.d\t\0"
  /* 4185 */ "msubv.d\t\0"
  /* 4194 */ "maddv.d\t\0"
  /* 4203 */ "pckev.d\t\0"
  /* 4212 */ "ilvev.d\t\0"
  /* 4221 */ "fdiv.d\t\0"
  /* 4229 */ "mulv.d\t\0"
  /* 4237 */ "mov.d\t\0"
  /* 4244 */ "trunc.w.d\t\0"
  /* 4255 */ "round.w.d\t\0"
  /* 4266 */ "ceil.w.d\t\0"
  /* 4276 */ "floor.w.d\t\0"
  /* 4287 */ "cvt.w.d\t\0"
  /* 4296 */ "fmax.d\t\0"
  /* 4304 */ "bz.d\t\0"
  /* 4310 */ "selnez.d\t\0"
  /* 4320 */ "bnz.d\t\0"
  /* 4327 */ "seleqz.d\t\0"
  /* 4337 */ "movz.d\t\0"
  /* 4345 */ "crc32d\t\0"
  /* 4353 */ "saad\t\0"
  /* 4359 */ "crc32cd\t\0"
  /* 4368 */ "scd\t\0"
  /* 4373 */ "dadd\t\0"
  /* 4379 */ "madd\t\0"
  /* 4385 */ "dshd\t\0"
  /* 4391 */ "yield\t\0"
  /* 4398 */ "lld\t\0"
  /* 4403 */ "and\t\0"
  /* 4408 */ "prepend\t\0"
  /* 4417 */ "append\t\0"
  /* 4425 */ "dmod\t\0"
  /* 4431 */ "sd\t\0"
  /* 4435 */ "lbe\t\0"
  /* 4440 */ "sbe\t\0"
  /* 4445 */ "sce\t\0"
  /* 4450 */ "cachee\t\0"
  /* 4458 */ "prefe\t\0"
  /* 4465 */ "bge\t\0"
  /* 4470 */ "sge\t\0"
  /* 4475 */ "tge\t\0"
  /* 4480 */ "cache\t\0"
  /* 4487 */ "lhe\t\0"
  /* 4492 */ "she\t\0"
  /* 4497 */ "sigrie\t\0"
  /* 4505 */ "ble\t\0"
  /* 4510 */ "lle\t\0"
  /* 4515 */ "sle\t\0"
  /* 4520 */ "lwle\t\0"
  /* 4526 */ "swle\t\0"
  /* 4532 */ "bne\t\0"
  /* 4537 */ "sne\t\0"
  /* 4542 */ "tne\t\0"
  /* 4547 */ "dvpe\t\0"
  /* 4553 */ "evpe\t\0"
  /* 4559 */ "restore\t\0"
  /* 4568 */ "lwre\t\0"
  /* 4574 */ "swre\t\0"
  /* 4580 */ "lbue\t\0"
  /* 4586 */ "lhue\t\0"
  /* 4592 */ "save\t\0"
  /* 4598 */ "move\t\0"
  /* 4604 */ "lwe\t\0"
  /* 4609 */ "swe\t\0"
  /* 4614 */ "bc1f\t\0"
  /* 4620 */ "pref\t\0"
  /* 4626 */ "movf\t\0"
  /* 4632 */ "neg\t\0"
  /* 4637 */ "add_a.h\t\0"
  /* 4646 */ "min_a.h\t\0"
  /* 4655 */ "adds_a.h\t\0"
  /* 4665 */ "max_a.h\t\0"
  /* 4674 */ "sra.h\t\0"
  /* 4681 */ "nloc.h\t\0"
  /* 4689 */ "lapc.h\t\0"
  /* 4697 */ "nlzc.h\t\0"
  /* 4705 */ "sld.h\t\0"
  /* 4712 */ "pckod.h\t\0"
  /* 4721 */ "ilvod.h\t\0"
  /* 4730 */ "insve.h\t\0"
  /* 4739 */ "vshf.h\t\0"
  /* 4747 */ "bneg.h\t\0"
  /* 4755 */ "srai.h\t\0"
  /* 4763 */ "sldi.h\t\0"
  /* 4771 */ "bnegi.h\t\0"
  /* 4780 */ "slli.h\t\0"
  /* 4788 */ "srli.h\t\0"
  /* 4796 */ "binsli.h\t\0"
  /* 4806 */ "ceqi.h\t\0"
  /* 4814 */ "srari.h\t\0"
  /* 4823 */ "bclri.h\t\0"
  /* 4832 */ "srlri.h\t\0"
  /* 4841 */ "binsri.h\t\0"
  /* 4851 */ "splati.h\t\0"
  /* 4861 */ "bseti.h\t\0"
  /* 4870 */ "subvi.h\t\0"
  /* 4879 */ "addvi.h\t\0"
  /* 4888 */ "fill.h\t\0"
  /* 4896 */ "sll.h\t\0"
  /* 4903 */ "srl.h\t\0"
  /* 4910 */ "binsl.h\t\0"
  /* 4919 */ "ilvl.h\t\0"
  /* 4927 */ "fexdo.h\t\0"
  /* 4936 */ "msub_q.h\t\0"
  /* 4946 */ "madd_q.h\t\0"
  /* 4956 */ "mul_q.h\t\0"
  /* 4965 */ "msubr_q.h\t\0"
  /* 4976 */ "maddr_q.h\t\0"
  /* 4987 */ "mulr_q.h\t\0"
  /* 4997 */ "ceq.h\t\0"
  /* 5004 */ "ftq.h\t\0"
  /* 5011 */ "srar.h\t\0"
  /* 5019 */ "bclr.h\t\0"
  /* 5027 */ "srlr.h\t\0"
  /* 5035 */ "binsr.h\t\0"
  /* 5044 */ "ilvr.h\t\0"
  /* 5052 */ "asub_s.h\t\0"
  /* 5062 */ "hsub_s.h\t\0"
  /* 5072 */ "dpsub_s.h\t\0"
  /* 5083 */ "hadd_s.h\t\0"
  /* 5093 */ "dpadd_s.h\t\0"
  /* 5104 */ "mod_s.h\t\0"
  /* 5113 */ "cle_s.h\t\0"
  /* 5122 */ "ave_s.h\t\0"
  /* 5131 */ "clei_s.h\t\0"
  /* 5141 */ "mini_s.h\t\0"
  /* 5151 */ "clti_s.h\t\0"
  /* 5161 */ "maxi_s.h\t\0"
  /* 5171 */ "min_s.h\t\0"
  /* 5180 */ "dotp_s.h\t\0"
  /* 5190 */ "aver_s.h\t\0"
  /* 5200 */ "extr_s.h\t\0"
  /* 5210 */ "subs_s.h\t\0"
  /* 5220 */ "adds_s.h\t\0"
  /* 5230 */ "sat_s.h\t\0"
  /* 5239 */ "clt_s.h\t\0"
  /* 5248 */ "subsuu_s.h\t\0"
  /* 5260 */ "div_s.h\t\0"
  /* 5269 */ "extrv_s.h\t\0"
  /* 5280 */ "max_s.h\t\0"
  /* 5289 */ "copy_s.h\t\0"
  /* 5299 */ "splat.h\t\0"
  /* 5308 */ "bset.h\t\0"
  /* 5316 */ "pcnt.h\t\0"
  /* 5324 */ "insert.h\t\0"
  /* 5334 */ "st.h\t\0"
  /* 5340 */ "asub_u.h\t\0"
  /* 5350 */ "hsub_u.h\t\0"
  /* 5360 */ "dpsub_u.h\t\0"
  /* 5371 */ "hadd_u.h\t\0"
  /* 5381 */ "dpadd_u.h\t\0"
  /* 5392 */ "mod_u.h\t\0"
  /* 5401 */ "cle_u.h\t\0"
  /* 5410 */ "ave_u.h\t\0"
  /* 5419 */ "clei_u.h\t\0"
  /* 5429 */ "mini_u.h\t\0"
  /* 5439 */ "clti_u.h\t\0"
  /* 5449 */ "maxi_u.h\t\0"
  /* 5459 */ "min_u.h\t\0"
  /* 5468 */ "dotp_u.h\t\0"
  /* 5478 */ "aver_u.h\t\0"
  /* 5488 */ "subs_u.h\t\0"
  /* 5498 */ "adds_u.h\t\0"
  /* 5508 */ "subsus_u.h\t\0"
  /* 5520 */ "sat_u.h\t\0"
  /* 5529 */ "clt_u.h\t\0"
  /* 5538 */ "div_u.h\t\0"
  /* 5547 */ "max_u.h\t\0"
  /* 5556 */ "copy_u.h\t\0"
  /* 5566 */ "msubv.h\t\0"
  /* 5575 */ "maddv.h\t\0"
  /* 5584 */ "pckev.h\t\0"
  /* 5593 */ "ilvev.h\t\0"
  /* 5602 */ "mulv.h\t\0"
  /* 5610 */ "bz.h\t\0"
  /* 5616 */ "bnz.h\t\0"
  /* 5623 */ "crc32h\t\0"
  /* 5631 */ "dsbh\t\0"
  /* 5637 */ "wsbh\t\0"
  /* 5643 */ "crc32ch\t\0"
  /* 5652 */ "seh\t\0"
  /* 5657 */ "ualh\t\0"
  /* 5663 */ "ulh\t\0"
  /* 5668 */ "shra.ph\t\0"
  /* 5677 */ "precrq.qb.ph\t\0"
  /* 5691 */ "precr.qb.ph\t\0"
  /* 5704 */ "precrqu_s.qb.ph\t\0"
  /* 5721 */ "cmp.le.ph\t\0"
  /* 5732 */ "subqh.ph\t\0"
  /* 5742 */ "addqh.ph\t\0"
  /* 5752 */ "pick.ph\t\0"
  /* 5761 */ "shll.ph\t\0"
  /* 5770 */ "repl.ph\t\0"
  /* 5779 */ "shrl.ph\t\0"
  /* 5788 */ "packrl.ph\t\0"
  /* 5799 */ "mul.ph\t\0"
  /* 5807 */ "subq.ph\t\0"
  /* 5816 */ "addq.ph\t\0"
  /* 5825 */ "cmp.eq.ph\t\0"
  /* 5836 */ "shra_r.ph\t\0"
  /* 5847 */ "subqh_r.ph\t\0"
  /* 5859 */ "addqh_r.ph\t\0"
  /* 5871 */ "shrav_r.ph\t\0"
  /* 5883 */ "shll_s.ph\t\0"
  /* 5894 */ "mul_s.ph\t\0"
  /* 5904 */ "subq_s.ph\t\0"
  /* 5915 */ "addq_s.ph\t\0"
  /* 5926 */ "mulq_s.ph\t\0"
  /* 5937 */ "absq_s.ph\t\0"
  /* 5948 */ "subu_s.ph\t\0"
  /* 5959 */ "addu_s.ph\t\0"
  /* 5970 */ "shllv_s.ph\t\0"
  /* 5982 */ "mulq_rs.ph\t\0"
  /* 5994 */ "cmp.lt.ph\t\0"
  /* 6005 */ "subu.ph\t\0"
  /* 6014 */ "addu.ph\t\0"
  /* 6023 */ "shrav.ph\t\0"
  /* 6033 */ "shllv.ph\t\0"
  /* 6043 */ "replv.ph\t\0"
  /* 6053 */ "shrlv.ph\t\0"
  /* 6063 */ "dpa.w.ph\t\0"
  /* 6073 */ "dpaqx_sa.w.ph\t\0"
  /* 6088 */ "dpsqx_sa.w.ph\t\0"
  /* 6103 */ "mulsa.w.ph\t\0"
  /* 6115 */ "dpaq_s.w.ph\t\0"
  /* 6128 */ "mulsaq_s.w.ph\t\0"
  /* 6143 */ "dpsq_s.w.ph\t\0"
  /* 6156 */ "dpaqx_s.w.ph\t\0"
  /* 6170 */ "dpsqx_s.w.ph\t\0"
  /* 6184 */ "dps.w.ph\t\0"
  /* 6194 */ "dpax.w.ph\t\0"
  /* 6205 */ "dpsx.w.ph\t\0"
  /* 6216 */ "uash\t\0"
  /* 6222 */ "ush\t\0"
  /* 6227 */ "dmuh\t\0"
  /* 6233 */ "synci\t\0"
  /* 6240 */ "daddi\t\0"
  /* 6247 */ "andi\t\0"
  /* 6253 */ "tgei\t\0"
  /* 6259 */ "snei\t\0"
  /* 6265 */ "tnei\t\0"
  /* 6271 */ "dahi\t\0"
  /* 6277 */ "mfhi\t\0"
  /* 6283 */ "mthi\t\0"
  /* 6289 */ ".align 2\n\tli\t\0"
  /* 6303 */ "dli\t\0"
  /* 6308 */ "cmpi\t\0"
  /* 6314 */ "seqi\t\0"
  /* 6320 */ "teqi\t\0"
  /* 6326 */ "xori\t\0"
  /* 6332 */ "dati\t\0"
  /* 6338 */ "slti\t\0"
  /* 6344 */ "tlti\t\0"
  /* 6350 */ "daui\t\0"
  /* 6356 */ "lui\t\0"
  /* 6361 */ "ginvi\t\0"
  /* 6368 */ "j\t\0"
  /* 6371 */ "break\t\0"
  /* 6378 */ "fork\t\0"
  /* 6384 */ "cvt.d.l\t\0"
  /* 6393 */ "cvt.s.l\t\0"
  /* 6402 */ "bal\t\0"
  /* 6407 */ "jal\t\0"
  /* 6412 */ "bgezal\t\0"
  /* 6420 */ "bltzal\t\0"
  /* 6428 */ "dpau.h.qbl\t\0"
  /* 6440 */ "dpsu.h.qbl\t\0"
  /* 6452 */ "muleu_s.ph.qbl\t\0"
  /* 6468 */ "preceu.ph.qbl\t\0"
  /* 6483 */ "precequ.ph.qbl\t\0"
  /* 6499 */ "ldl\t\0"
  /* 6504 */ "sdl\t\0"
  /* 6509 */ "bgel\t\0"
  /* 6515 */ "blel\t\0"
  /* 6521 */ "bnel\t\0"
  /* 6527 */ "bc1fl\t\0"
  /* 6534 */ "maq_sa.w.phl\t\0"
  /* 6548 */ "preceq.w.phl\t\0"
  /* 6562 */ "maq_s.w.phl\t\0"
  /* 6575 */ "muleq_s.w.phl\t\0"
  /* 6590 */ "hypcall\t\0"
  /* 6599 */ "syscall\t\0"
  /* 6608 */ "bgezall\t\0"
  /* 6617 */ "bltzall\t\0"
  /* 6626 */ "dsll\t\0"
  /* 6632 */ "drol\t\0"
  /* 6638 */ "cvt.s.pl\t\0"
  /* 6648 */ "beql\t\0"
  /* 6654 */ "dsrl\t\0"
  /* 6660 */ "bc1tl\t\0"
  /* 6667 */ "bgtl\t\0"
  /* 6673 */ "bltl\t\0"
  /* 6679 */ "bgeul\t\0"
  /* 6686 */ "bleul\t\0"
  /* 6693 */ "dmul\t\0"
  /* 6699 */ "bgtul\t\0"
  /* 6706 */ "bltul\t\0"
  /* 6713 */ "lwl\t\0"
  /* 6718 */ "swl\t\0"
  /* 6723 */ "bgezl\t\0"
  /* 6730 */ "blezl\t\0"
  /* 6737 */ "bgtzl\t\0"
  /* 6744 */ "bltzl\t\0"
  /* 6751 */ "drem\t\0"
  /* 6757 */ "dinsm\t\0"
  /* 6764 */ "dextm\t\0"
  /* 6771 */ "ualwm\t\0"
  /* 6778 */ "uaswm\t\0"
  /* 6785 */ "balign\t\0"
  /* 6793 */ "dalign\t\0"
  /* 6801 */ "movn\t\0"
  /* 6807 */ "dclo\t\0"
  /* 6813 */ "mflo\t\0"
  /* 6819 */ "shilo\t\0"
  /* 6826 */ "mtlo\t\0"
  /* 6832 */ "dmulo\t\0"
  /* 6839 */ "dbitswap\t\0"
  /* 6849 */ "sdbbp\t\0"
  /* 6856 */ "extpdp\t\0"
  /* 6864 */ "movep\t\0"
  /* 6871 */ "mthlip\t\0"
  /* 6879 */ "cmp\t\0"
  /* 6884 */ "dpop\t\0"
  /* 6890 */ "addiur1sp\t\0"
  /* 6901 */ "load_ccond_dsp\t\0"
  /* 6917 */ "store_ccond_dsp\t\0"
  /* 6934 */ "rddsp\t\0"
  /* 6941 */ "wrdsp\t\0"
  /* 6948 */ "jrcaddiusp\t\0"
  /* 6960 */ "jraddiusp\t\0"
  /* 6971 */ "swsp\t\0"
  /* 6977 */ "extp\t\0"
  /* 6983 */ "dvp\t\0"
  /* 6988 */ "evp\t\0"
  /* 6993 */ "lwp\t\0"
  /* 6998 */ "swp\t\0"
  /* 7003 */ "beq\t\0"
  /* 7008 */ "seq\t\0"
  /* 7013 */ "teq\t\0"
  /* 7018 */ "dpau.h.qbr\t\0"
  /* 7030 */ "dpsu.h.qbr\t\0"
  /* 7042 */ "muleu_s.ph.qbr\t\0"
  /* 7058 */ "preceu.ph.qbr\t\0"
  /* 7073 */ "precequ.ph.qbr\t\0"
  /* 7089 */ "ldr\t\0"
  /* 7094 */ "sdr\t\0"
  /* 7099 */ "maq_sa.w.phr\t\0"
  /* 7113 */ "preceq.w.phr\t\0"
  /* 7127 */ "maq_s.w.phr\t\0"
  /* 7140 */ "muleq_s.w.phr\t\0"
  /* 7155 */ "jr\t\0"
  /* 7159 */ "jalr\t\0"
  /* 7165 */ "nor\t\0"
  /* 7170 */ "dror\t\0"
  /* 7176 */ "xor\t\0"
  /* 7181 */ "rdpgpr\t\0"
  /* 7189 */ "wrpgpr\t\0"
  /* 7197 */ "mftr\t\0"
  /* 7203 */ "drotr\t\0"
  /* 7210 */ "mttr\t\0"
  /* 7216 */ "rdhwr\t\0"
  /* 7223 */ "lwr\t\0"
  /* 7228 */ "swr\t\0"
  /* 7233 */ "mina.s\t\0"
  /* 7241 */ "maxa.s\t\0"
  /* 7249 */ "nmsub.s\t\0"
  /* 7258 */ "cvt.d.s\t\0"
  /* 7267 */ "nmadd.s\t\0"
  /* 7276 */ "c.nge.s\t\0"
  /* 7285 */ "c.le.s\t\0"
  /* 7293 */ "cmp.le.s\t\0"
  /* 7303 */ "c.ngle.s\t\0"
  /* 7313 */ "c.ole.s\t\0"
  /* 7322 */ "cmp.sle.s\t\0"
  /* 7333 */ "c.ule.s\t\0"
  /* 7342 */ "cmp.ule.s\t\0"
  /* 7353 */ "cmp.sule.s\t\0"
  /* 7365 */ "c.f.s\t\0"
  /* 7372 */ "cmp.af.s\t\0"
  /* 7382 */ "cmp.saf.s\t\0"
  /* 7393 */ "msubf.s\t\0"
  /* 7402 */ "maddf.s\t\0"
  /* 7411 */ "c.sf.s\t\0"
  /* 7419 */ "movf.s\t\0"
  /* 7427 */ "neg.s\t\0"
  /* 7434 */ "li.s\t\0"
  /* 7440 */ "trunc.l.s\t\0"
  /* 7451 */ "round.l.s\t\0"
  /* 7462 */ "ceil.l.s\t\0"
  /* 7472 */ "floor.l.s\t\0"
  /* 7483 */ "cvt.l.s\t\0"
  /* 7492 */ "sel.s\t\0"
  /* 7499 */ "c.ngl.s\t\0"
  /* 7508 */ "mul.s\t\0"
  /* 7515 */ "min.s\t\0"
  /* 7522 */ "c.un.s\t\0"
  /* 7530 */ "cmp.un.s\t\0"
  /* 7540 */ "cmp.sun.s\t\0"
  /* 7551 */ "movn.s\t\0"
  /* 7559 */ "recip.s\t\0"
  /* 7568 */ "c.eq.s\t\0"
  /* 7576 */ "cmp.eq.s\t\0"
  /* 7586 */ "c.seq.s\t\0"
  /* 7595 */ "cmp.seq.s\t\0"
  /* 7606 */ "c.ueq.s\t\0"
  /* 7615 */ "cmp.ueq.s\t\0"
  /* 7626 */ "cmp.sueq.s\t\0"
  /* 7638 */ "abs.s\t\0"
  /* 7645 */ "cvt.ps.s\t\0"
  /* 7655 */ "class.s\t\0"
  /* 7664 */ "c.ngt.s\t\0"
  /* 7673 */ "c.lt.s\t\0"
  /* 7681 */ "cmp.lt.s\t\0"
  /* 7691 */ "c.olt.s\t\0"
  /* 7700 */ "cmp.slt.s\t\0"
  /* 7711 */ "c.ult.s\t\0"
  /* 7720 */ "cmp.ult.s\t\0"
  /* 7731 */ "cmp.sult.s\t\0"
  /* 7743 */ "rint.s\t\0"
  /* 7751 */ "rsqrt.s\t\0"
  /* 7760 */ "movt.s\t\0"
  /* 7768 */ "div.s\t\0"
  /* 7775 */ "mov.s\t\0"
  /* 7782 */ "trunc.w.s\t\0"
  /* 7793 */ "round.w.s\t\0"
  /* 7804 */ "ceil.w.s\t\0"
  /* 7814 */ "floor.w.s\t\0"
  /* 7825 */ "cvt.w.s\t\0"
  /* 7834 */ "max.s\t\0"
  /* 7841 */ "selnez.s\t\0"
  /* 7851 */ "seleqz.s\t\0"
  /* 7861 */ "movz.s\t\0"
  /* 7869 */ "abs\t\0"
  /* 7874 */ "jals\t\0"
  /* 7880 */ "bgezals\t\0"
  /* 7889 */ "bltzals\t\0"
  /* 7898 */ "cins\t\0"
  /* 7904 */ "dins\t\0"
  /* 7910 */ "sub.ps\t\0"
  /* 7918 */ "add.ps\t\0"
  /* 7926 */ "pll.ps\t\0"
  /* 7934 */ "mul.ps\t\0"
  /* 7942 */ "pul.ps\t\0"
  /* 7950 */ "addr.ps\t\0"
  /* 7959 */ "mulr.ps\t\0"
  /* 7968 */ "plu.ps\t\0"
  /* 7976 */ "puu.ps\t\0"
  /* 7984 */ "cvt.pw.ps\t\0"
  /* 7995 */ "jalrs\t\0"
  /* 8002 */ "exts\t\0"
  /* 8008 */ "lhxs\t\0"
  /* 8014 */ "shxs\t\0"
  /* 8020 */ "lhuxs\t\0"
  /* 8027 */ "lwxs\t\0"
  /* 8033 */ "swxs\t\0"
  /* 8039 */ "bc1t\t\0"
  /* 8045 */ "bgt\t\0"
  /* 8050 */ "sgt\t\0"
  /* 8055 */ "wait\t\0"
  /* 8061 */ "blt\t\0"
  /* 8066 */ "slt\t\0"
  /* 8071 */ "tlt\t\0"
  /* 8076 */ "dmult\t\0"
  /* 8083 */ "dmt\t\0"
  /* 8088 */ "emt\t\0"
  /* 8093 */ "not\t\0"
  /* 8098 */ "ginvt\t\0"
  /* 8105 */ "movt\t\0"
  /* 8111 */ "dext\t\0"
  /* 8117 */ "lbu\t\0"
  /* 8122 */ "dsubu\t\0"
  /* 8129 */ "msubu\t\0"
  /* 8136 */ "baddu\t\0"
  /* 8143 */ "daddu\t\0"
  /* 8150 */ "maddu\t\0"
  /* 8157 */ "dmodu\t\0"
  /* 8164 */ "bgeu\t\0"
  /* 8170 */ "sgeu\t\0"
  /* 8176 */ "tgeu\t\0"
  /* 8182 */ "bleu\t\0"
  /* 8188 */ "sleu\t\0"
  /* 8194 */ "ulhu\t\0"
  /* 8200 */ "dmuhu\t\0"
  /* 8207 */ "daddiu\t\0"
  /* 8215 */ "tgeiu\t\0"
  /* 8222 */ "sltiu\t\0"
  /* 8229 */ "tltiu\t\0"
  /* 8236 */ "v3mulu\t\0"
  /* 8244 */ "dmulu\t\0"
  /* 8251 */ "vmulu\t\0"
  /* 8258 */ "dremu\t\0"
  /* 8265 */ "dmulou\t\0"
  /* 8273 */ "cvt.s.pu\t\0"
  /* 8283 */ "dinsu\t\0"
  /* 8290 */ "bgtu\t\0"
  /* 8296 */ "sgtu\t\0"
  /* 8302 */ "bltu\t\0"
  /* 8308 */ "sltu\t\0"
  /* 8314 */ "tltu\t\0"
  /* 8320 */ "dmultu\t\0"
  /* 8328 */ "dextu\t\0"
  /* 8335 */ "ddivu\t\0"
  /* 8342 */ "lwu\t\0"
  /* 8347 */ "and.v\t\0"
  /* 8354 */ "move.v\t\0"
  /* 8362 */ "bsel.v\t\0"
  /* 8370 */ "nor.v\t\0"
  /* 8377 */ "xor.v\t\0"
  /* 8384 */ "bz.v\t\0"
  /* 8390 */ "bmz.v\t\0"
  /* 8397 */ "bnz.v\t\0"
  /* 8404 */ "bmnz.v\t\0"
  /* 8412 */ "dsrav\t\0"
  /* 8419 */ "bitrev\t\0"
  /* 8427 */ "ddiv\t\0"
  /* 8433 */ "dsllv\t\0"
  /* 8440 */ "dsrlv\t\0"
  /* 8447 */ "shilov\t\0"
  /* 8455 */ "sov\t\0"
  /* 8460 */ "extpdpv\t\0"
  /* 8469 */ "extpv\t\0"
  /* 8476 */ "drotrv\t\0"
  /* 8484 */ "insv\t\0"
  /* 8490 */ "flog2.w\t\0"
  /* 8499 */ "fexp2.w\t\0"
  /* 8508 */ "add_a.w\t\0"
  /* 8517 */ "fmin_a.w\t\0"
  /* 8527 */ "adds_a.w\t\0"
  /* 8537 */ "fmax_a.w\t\0"
  /* 8547 */ "sra.w\t\0"
  /* 8554 */ "fsub.w\t\0"
  /* 8562 */ "fmsub.w\t\0"
  /* 8571 */ "nloc.w\t\0"
  /* 8579 */ "nlzc.w\t\0"
  /* 8587 */ "cvt.d.w\t\0"
  /* 8596 */ "fadd.w\t\0"
  /* 8604 */ "fmadd.w\t\0"
  /* 8613 */ "sld.w\t\0"
  /* 8620 */ "pckod.w\t\0"
  /* 8629 */ "ilvod.w\t\0"
  /* 8638 */ "fcle.w\t\0"
  /* 8646 */ "fsle.w\t\0"
  /* 8654 */ "fcule.w\t\0"
  /* 8663 */ "fsule.w\t\0"
  /* 8672 */ "fcne.w\t\0"
  /* 8680 */ "fsne.w\t\0"
  /* 8688 */ "fcune.w\t\0"
  /* 8697 */ "fsune.w\t\0"
  /* 8706 */ "insve.w\t\0"
  /* 8715 */ "fcaf.w\t\0"
  /* 8723 */ "fsaf.w\t\0"
  /* 8731 */ "vshf.w\t\0"
  /* 8739 */ "bneg.w\t\0"
  /* 8747 */ "precr_sra.ph.w\t\0"
  /* 8763 */ "precrq.ph.w\t\0"
  /* 8776 */ "precr_sra_r.ph.w\t\0"
  /* 8794 */ "precrq_rs.ph.w\t\0"
  /* 8810 */ "subqh.w\t\0"
  /* 8819 */ "addqh.w\t\0"
  /* 8828 */ "srai.w\t\0"
  /* 8836 */ "sldi.w\t\0"
  /* 8844 */ "bnegi.w\t\0"
  /* 8853 */ "slli.w\t\0"
  /* 8861 */ "srli.w\t\0"
  /* 8869 */ "binsli.w\t\0"
  /* 8879 */ "ceqi.w\t\0"
  /* 8887 */ "srari.w\t\0"
  /* 8896 */ "bclri.w\t\0"
  /* 8905 */ "srlri.w\t\0"
  /* 8914 */ "binsri.w\t\0"
  /* 8924 */ "splati.w\t\0"
  /* 8934 */ "bseti.w\t\0"
  /* 8943 */ "subvi.w\t\0"
  /* 8952 */ "addvi.w\t\0"
  /* 8961 */ "dpaq_sa.l.w\t\0"
  /* 8974 */ "dpsq_sa.l.w\t\0"
  /* 8987 */ "fill.w\t\0"
  /* 8995 */ "sll.w\t\0"
  /* 9002 */ "fexupl.w\t\0"
  /* 9012 */ "ffql.w\t\0"
  /* 9020 */ "srl.w\t\0"
  /* 9027 */ "binsl.w\t\0"
  /* 9036 */ "fmul.w\t\0"
  /* 9044 */ "ilvl.w\t\0"
  /* 9052 */ "fmin.w\t\0"
  /* 9060 */ "fcun.w\t\0"
  /* 9068 */ "fsun.w\t\0"
  /* 9076 */ "fexdo.w\t\0"
  /* 9085 */ "frcp.w\t\0"
  /* 9093 */ "msub_q.w\t\0"
  /* 9103 */ "madd_q.w\t\0"
  /* 9113 */ "mul_q.w\t\0"
  /* 9122 */ "msubr_q.w\t\0"
  /* 9133 */ "maddr_q.w\t\0"
  /* 9144 */ "mulr_q.w\t\0"
  /* 9154 */ "fceq.w\t\0"
  /* 9162 */ "fseq.w\t\0"
  /* 9170 */ "fcueq.w\t\0"
  /* 9179 */ "fsueq.w\t\0"
  /* 9188 */ "ftq.w\t\0"
  /* 9195 */ "shra_r.w\t\0"
  /* 9205 */ "subqh_r.w\t\0"
  /* 9216 */ "addqh_r.w\t\0"
  /* 9227 */ "extr_r.w\t\0"
  /* 9237 */ "shrav_r.w\t\0"
  /* 9248 */ "extrv_r.w\t\0"
  /* 9259 */ "srar.w\t\0"
  /* 9267 */ "bclr.w\t\0"
  /* 9275 */ "srlr.w\t\0"
  /* 9283 */ "fcor.w\t\0"
  /* 9291 */ "fsor.w\t\0"
  /* 9299 */ "fexupr.w\t\0"
  /* 9309 */ "ffqr.w\t\0"
  /* 9317 */ "binsr.w\t\0"
  /* 9326 */ "extr.w\t\0"
  /* 9334 */ "ilvr.w\t\0"
  /* 9342 */ "cvt.s.w\t\0"
  /* 9351 */ "asub_s.w\t\0"
  /* 9361 */ "hsub_s.w\t\0"
  /* 9371 */ "dpsub_s.w\t\0"
  /* 9382 */ "ftrunc_s.w\t\0"
  /* 9394 */ "hadd_s.w\t\0"
  /* 9404 */ "dpadd_s.w\t\0"
  /* 9415 */ "mod_s.w\t\0"
  /* 9424 */ "cle_s.w\t\0"
  /* 9433 */ "ave_s.w\t\0"
  /* 9442 */ "clei_s.w\t\0"
  /* 9452 */ "mini_s.w\t\0"
  /* 9462 */ "clti_s.w\t\0"
  /* 9472 */ "maxi_s.w\t\0"
  /* 9482 */ "shll_s.w\t\0"
  /* 9492 */ "min_s.w\t\0"
  /* 9501 */ "dotp_s.w\t\0"
  /* 9511 */ "subq_s.w\t\0"
  /* 9521 */ "addq_s.w\t\0"
  /* 9531 */ "mulq_s.w\t\0"
  /* 9541 */ "absq_s.w\t\0"
  /* 9551 */ "aver_s.w\t\0"
  /* 9561 */ "subs_s.w\t\0"
  /* 9571 */ "adds_s.w\t\0"
  /* 9581 */ "sat_s.w\t\0"
  /* 9590 */ "clt_s.w\t\0"
  /* 9599 */ "ffint_s.w\t\0"
  /* 9610 */ "ftint_s.w\t\0"
  /* 9621 */ "subsuu_s.w\t\0"
  /* 9633 */ "div_s.w\t\0"
  /* 9642 */ "shllv_s.w\t\0"
  /* 9653 */ "max_s.w\t\0"
  /* 9662 */ "copy_s.w\t\0"
  /* 9672 */ "mulq_rs.w\t\0"
  /* 9683 */ "extr_rs.w\t\0"
  /* 9694 */ "extrv_rs.w\t\0"
  /* 9706 */ "fclass.w\t\0"
  /* 9716 */ "splat.w\t\0"
  /* 9725 */ "bset.w\t\0"
  /* 9733 */ "fclt.w\t\0"
  /* 9741 */ "fslt.w\t\0"
  /* 9749 */ "fcult.w\t\0"
  /* 9758 */ "fsult.w\t\0"
  /* 9767 */ "pcnt.w\t\0"
  /* 9775 */ "frint.w\t\0"
  /* 9784 */ "insert.w\t\0"
  /* 9794 */ "fsqrt.w\t\0"
  /* 9803 */ "frsqrt.w\t\0"
  /* 9813 */ "st.w\t\0"
  /* 9819 */ "asub_u.w\t\0"
  /* 9829 */ "hsub_u.w\t\0"
  /* 9839 */ "dpsub_u.w\t\0"
  /* 9850 */ "ftrunc_u.w\t\0"
  /* 9862 */ "hadd_u.w\t\0"
  /* 9872 */ "dpadd_u.w\t\0"
  /* 9883 */ "mod_u.w\t\0"
  /* 9892 */ "cle_u.w\t\0"
  /* 9901 */ "ave_u.w\t\0"
  /* 9910 */ "clei_u.w\t\0"
  /* 9920 */ "mini_u.w\t\0"
  /* 9930 */ "clti_u.w\t\0"
  /* 9940 */ "maxi_u.w\t\0"
  /* 9950 */ "min_u.w\t\0"
  /* 9959 */ "dotp_u.w\t\0"
  /* 9969 */ "aver_u.w\t\0"
  /* 9979 */ "subs_u.w\t\0"
  /* 9989 */ "adds_u.w\t\0"
  /* 9999 */ "subsus_u.w\t\0"
  /* 10011 */ "sat_u.w\t\0"
  /* 10020 */ "clt_u.w\t\0"
  /* 10029 */ "ffint_u.w\t\0"
  /* 10040 */ "ftint_u.w\t\0"
  /* 10051 */ "div_u.w\t\0"
  /* 10060 */ "max_u.w\t\0"
  /* 10069 */ "copy_u.w\t\0"
  /* 10079 */ "msubv.w\t\0"
  /* 10088 */ "maddv.w\t\0"
  /* 10097 */ "pckev.w\t\0"
  /* 10106 */ "ilvev.w\t\0"
  /* 10115 */ "fdiv.w\t\0"
  /* 10123 */ "mulv.w\t\0"
  /* 10131 */ "extrv.w\t\0"
  /* 10140 */ "fmax.w\t\0"
  /* 10148 */ "bz.w\t\0"
  /* 10154 */ "bnz.w\t\0"
  /* 10161 */ "crc32w\t\0"
  /* 10169 */ "crc32cw\t\0"
  /* 10178 */ "ualw\t\0"
  /* 10184 */ "ulw\t\0"
  /* 10189 */ "cvt.ps.pw\t\0"
  /* 10200 */ "uasw\t\0"
  /* 10206 */ "usw\t\0"
  /* 10211 */ "extw\t\0"
  /* 10217 */ "byterevw\t\0"
  /* 10227 */ "bitrevw\t\0"
  /* 10236 */ "lbx\t\0"
  /* 10241 */ "sbx\t\0"
  /* 10246 */ "prefx\t\0"
  /* 10253 */ "lhx\t\0"
  /* 10258 */ "shx\t\0"
  /* 10263 */ "jalx\t\0"
  /* 10269 */ "rotx\t\0"
  /* 10275 */ "lbux\t\0"
  /* 10281 */ "lhux\t\0"
  /* 10287 */ "lwx\t\0"
  /* 10292 */ "swx\t\0"
  /* 10297 */ "bgez\t\0"
  /* 10303 */ "blez\t\0"
  /* 10309 */ "bnez\t\0"
  /* 10315 */ "selnez\t\0"
  /* 10323 */ "btnez\t\0"
  /* 10330 */ "dclz\t\0"
  /* 10336 */ "beqz\t\0"
  /* 10342 */ "seleqz\t\0"
  /* 10350 */ "bteqz\t\0"
  /* 10357 */ "bgtz\t\0"
  /* 10363 */ "bltz\t\0"
  /* 10369 */ "movz\t\0"
  /* 10375 */ "seb\t \0"
  /* 10381 */ "seh\t \0"
  /* 10387 */ "ddivu\t$zero, \0"
  /* 10401 */ "ddiv\t$zero, \0"
  /* 10414 */ "addiu\t$sp, \0"
  /* 10426 */ "mftc0 \0"
  /* 10433 */ "mttc0 \0"
  /* 10440 */ "mfthc1 \0"
  /* 10448 */ "mtthc1 \0"
  /* 10456 */ "cftc1 \0"
  /* 10463 */ "mftc1 \0"
  /* 10470 */ "cttc1 \0"
  /* 10477 */ "mttc1 \0"
  /* 10484 */ "sync \0"
  /* 10490 */ "ld \0"
  /* 10494 */ "\t.word \0"
  /* 10502 */ "sd \0"
  /* 10506 */ "sne \0"
  /* 10511 */ "mfthi \0"
  /* 10518 */ "mtthi \0"
  /* 10525 */ "mftlo \0"
  /* 10532 */ "mttlo \0"
  /* 10539 */ "mftdsp \0"
  /* 10547 */ "mttdsp \0"
  /* 10555 */ "scwp \0"
  /* 10561 */ "llwp \0"
  /* 10567 */ "seq \0"
  /* 10572 */ "mftgpr \0"
  /* 10580 */ "mttgpr \0"
  /* 10588 */ "dext \0"
  /* 10594 */ "mftacx \0"
  /* 10602 */ "mttacx \0"
  /* 10610 */ "bc1nez \0"
  /* 10618 */ "bc2nez \0"
  /* 10626 */ "bc1eqz \0"
  /* 10634 */ "bc2eqz \0"
  /* 10642 */ "# XRay Function Patchable RET.\0"
  /* 10673 */ "c.\0"
  /* 10676 */ "# XRay Typed Event Log.\0"
  /* 10700 */ "# XRay Custom Event Log.\0"
  /* 10725 */ "# XRay Function Enter.\0"
  /* 10748 */ "# XRay Tail Call Exit.\0"
  /* 10771 */ "# XRay Function Exit.\0"
  /* 10793 */ "break 0\0"
  /* 10801 */ "nop32\0"
  /* 10807 */ "LIFETIME_END\0"
  /* 10820 */ "PSEUDO_PROBE\0"
  /* 10833 */ "BUNDLE\0"
  /* 10840 */ "DBG_VALUE\0"
  /* 10850 */ "DBG_INSTR_REF\0"
  /* 10864 */ "DBG_PHI\0"
  /* 10872 */ "DBG_LABEL\0"
  /* 10882 */ "LIFETIME_START\0"
  /* 10897 */ "DBG_VALUE_LIST\0"
  /* 10912 */ "jrc\t$ra\0"
  /* 10920 */ "jr\t$ra\0"
  /* 10927 */ "ehb\0"
  /* 10931 */ "eretnc\0"
  /* 10938 */ "pause\0"
  /* 10944 */ "tlbinvf\0"
  /* 10952 */ "tlbginvf\0"
  /* 10961 */ "tlbwi\0"
  /* 10967 */ "tlbgwi\0"
  /* 10974 */ "# FEntry call\0"
  /* 10988 */ "foo\0"
  /* 10992 */ "tlbp\0"
  /* 10997 */ "tlbgp\0"
  /* 11003 */ "ssnop\0"
  /* 11009 */ "tlbr\0"
  /* 11014 */ "tlbgr\0"
  /* 11020 */ "tlbwr\0"
  /* 11026 */ "tlbgwr\0"
  /* 11033 */ "deret\0"
  /* 11039 */ "wait\0"
  /* 11044 */ "tlbinv\0"
  /* 11051 */ "tlbginv\0"
};
#endif // CAPSTONE_DIET

  static const uint32_t OpInfo0[] = {
    0U,	// PHI
    0U,	// INLINEASM
    0U,	// INLINEASM_BR
    0U,	// CFI_INSTRUCTION
    0U,	// EH_LABEL
    0U,	// GC_LABEL
    0U,	// ANNOTATION_LABEL
    0U,	// KILL
    0U,	// EXTRACT_SUBREG
    0U,	// INSERT_SUBREG
    0U,	// IMPLICIT_DEF
    0U,	// SUBREG_TO_REG
    0U,	// COPY_TO_REGCLASS
    10841U,	// DBG_VALUE
    10898U,	// DBG_VALUE_LIST
    10851U,	// DBG_INSTR_REF
    10865U,	// DBG_PHI
    10873U,	// DBG_LABEL
    0U,	// REG_SEQUENCE
    0U,	// COPY
    10834U,	// BUNDLE
    10883U,	// LIFETIME_START
    10808U,	// LIFETIME_END
    10821U,	// PSEUDO_PROBE
    0U,	// ARITH_FENCE
    0U,	// STACKMAP
    10975U,	// FENTRY_CALL
    0U,	// PATCHPOINT
    0U,	// LOAD_STACK_GUARD
    0U,	// PREALLOCATED_SETUP
    0U,	// PREALLOCATED_ARG
    0U,	// STATEPOINT
    0U,	// LOCAL_ESCAPE
    0U,	// FAULTING_OP
    0U,	// PATCHABLE_OP
    10726U,	// PATCHABLE_FUNCTION_ENTER
    10643U,	// PATCHABLE_RET
    10772U,	// PATCHABLE_FUNCTION_EXIT
    10749U,	// PATCHABLE_TAIL_CALL
    10701U,	// PATCHABLE_EVENT_CALL
    10677U,	// PATCHABLE_TYPED_EVENT_CALL
    0U,	// ICALL_BRANCH_FUNNEL
    0U,	// MEMBARRIER
    0U,	// JUMP_TABLE_DEBUG_INFO
    0U,	// G_ASSERT_SEXT
    0U,	// G_ASSERT_ZEXT
    0U,	// G_ASSERT_ALIGN
    0U,	// G_ADD
    0U,	// G_SUB
    0U,	// G_MUL
    0U,	// G_SDIV
    0U,	// G_UDIV
    0U,	// G_SREM
    0U,	// G_UREM
    0U,	// G_SDIVREM
    0U,	// G_UDIVREM
    0U,	// G_AND
    0U,	// G_OR
    0U,	// G_XOR
    0U,	// G_IMPLICIT_DEF
    0U,	// G_PHI
    0U,	// G_FRAME_INDEX
    0U,	// G_GLOBAL_VALUE
    0U,	// G_CONSTANT_POOL
    0U,	// G_EXTRACT
    0U,	// G_UNMERGE_VALUES
    0U,	// G_INSERT
    0U,	// G_MERGE_VALUES
    0U,	// G_BUILD_VECTOR
    0U,	// G_BUILD_VECTOR_TRUNC
    0U,	// G_CONCAT_VECTORS
    0U,	// G_PTRTOINT
    0U,	// G_INTTOPTR
    0U,	// G_BITCAST
    0U,	// G_FREEZE
    0U,	// G_CONSTANT_FOLD_BARRIER
    0U,	// G_INTRINSIC_FPTRUNC_ROUND
    0U,	// G_INTRINSIC_TRUNC
    0U,	// G_INTRINSIC_ROUND
    0U,	// G_INTRINSIC_LRINT
    0U,	// G_INTRINSIC_ROUNDEVEN
    0U,	// G_READCYCLECOUNTER
    0U,	// G_LOAD
    0U,	// G_SEXTLOAD
    0U,	// G_ZEXTLOAD
    0U,	// G_INDEXED_LOAD
    0U,	// G_INDEXED_SEXTLOAD
    0U,	// G_INDEXED_ZEXTLOAD
    0U,	// G_STORE
    0U,	// G_INDEXED_STORE
    0U,	// G_ATOMIC_CMPXCHG_WITH_SUCCESS
    0U,	// G_ATOMIC_CMPXCHG
    0U,	// G_ATOMICRMW_XCHG
    0U,	// G_ATOMICRMW_ADD
    0U,	// G_ATOMICRMW_SUB
    0U,	// G_ATOMICRMW_AND
    0U,	// G_ATOMICRMW_NAND
    0U,	// G_ATOMICRMW_OR
    0U,	// G_ATOMICRMW_XOR
    0U,	// G_ATOMICRMW_MAX
    0U,	// G_ATOMICRMW_MIN
    0U,	// G_ATOMICRMW_UMAX
    0U,	// G_ATOMICRMW_UMIN
    0U,	// G_ATOMICRMW_FADD
    0U,	// G_ATOMICRMW_FSUB
    0U,	// G_ATOMICRMW_FMAX
    0U,	// G_ATOMICRMW_FMIN
    0U,	// G_ATOMICRMW_UINC_WRAP
    0U,	// G_ATOMICRMW_UDEC_WRAP
    0U,	// G_FENCE
    0U,	// G_PREFETCH
    0U,	// G_BRCOND
    0U,	// G_BRINDIRECT
    0U,	// G_INVOKE_REGION_START
    0U,	// G_INTRINSIC
    0U,	// G_INTRINSIC_W_SIDE_EFFECTS
    0U,	// G_INTRINSIC_CONVERGENT
    0U,	// G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
    0U,	// G_ANYEXT
    0U,	// G_TRUNC
    0U,	// G_CONSTANT
    0U,	// G_FCONSTANT
    0U,	// G_VASTART
    0U,	// G_VAARG
    0U,	// G_SEXT
    0U,	// G_SEXT_INREG
    0U,	// G_ZEXT
    0U,	// G_SHL
    0U,	// G_LSHR
    0U,	// G_ASHR
    0U,	// G_FSHL
    0U,	// G_FSHR
    0U,	// G_ROTR
    0U,	// G_ROTL
    0U,	// G_ICMP
    0U,	// G_FCMP
    0U,	// G_SELECT
    0U,	// G_UADDO
    0U,	// G_UADDE
    0U,	// G_USUBO
    0U,	// G_USUBE
    0U,	// G_SADDO
    0U,	// G_SADDE
    0U,	// G_SSUBO
    0U,	// G_SSUBE
    0U,	// G_UMULO
    0U,	// G_SMULO
    0U,	// G_UMULH
    0U,	// G_SMULH
    0U,	// G_UADDSAT
    0U,	// G_SADDSAT
    0U,	// G_USUBSAT
    0U,	// G_SSUBSAT
    0U,	// G_USHLSAT
    0U,	// G_SSHLSAT
    0U,	// G_SMULFIX
    0U,	// G_UMULFIX
    0U,	// G_SMULFIXSAT
    0U,	// G_UMULFIXSAT
    0U,	// G_SDIVFIX
    0U,	// G_UDIVFIX
    0U,	// G_SDIVFIXSAT
    0U,	// G_UDIVFIXSAT
    0U,	// G_FADD
    0U,	// G_FSUB
    0U,	// G_FMUL
    0U,	// G_FMA
    0U,	// G_FMAD
    0U,	// G_FDIV
    0U,	// G_FREM
    0U,	// G_FPOW
    0U,	// G_FPOWI
    0U,	// G_FEXP
    0U,	// G_FEXP2
    0U,	// G_FEXP10
    0U,	// G_FLOG
    0U,	// G_FLOG2
    0U,	// G_FLOG10
    0U,	// G_FLDEXP
    0U,	// G_FFREXP
    0U,	// G_FNEG
    0U,	// G_FPEXT
    0U,	// G_FPTRUNC
    0U,	// G_FPTOSI
    0U,	// G_FPTOUI
    0U,	// G_SITOFP
    0U,	// G_UITOFP
    0U,	// G_FABS
    0U,	// G_FCOPYSIGN
    0U,	// G_IS_FPCLASS
    0U,	// G_FCANONICALIZE
    0U,	// G_FMINNUM
    0U,	// G_FMAXNUM
    0U,	// G_FMINNUM_IEEE
    0U,	// G_FMAXNUM_IEEE
    0U,	// G_FMINIMUM
    0U,	// G_FMAXIMUM
    0U,	// G_GET_FPENV
    0U,	// G_SET_FPENV
    0U,	// G_RESET_FPENV
    0U,	// G_GET_FPMODE
    0U,	// G_SET_FPMODE
    0U,	// G_RESET_FPMODE
    0U,	// G_PTR_ADD
    0U,	// G_PTRMASK
    0U,	// G_SMIN
    0U,	// G_SMAX
    0U,	// G_UMIN
    0U,	// G_UMAX
    0U,	// G_ABS
    0U,	// G_LROUND
    0U,	// G_LLROUND
    0U,	// G_BR
    0U,	// G_BRJT
    0U,	// G_INSERT_VECTOR_ELT
    0U,	// G_EXTRACT_VECTOR_ELT
    0U,	// G_SHUFFLE_VECTOR
    0U,	// G_CTTZ
    0U,	// G_CTTZ_ZERO_UNDEF
    0U,	// G_CTLZ
    0U,	// G_CTLZ_ZERO_UNDEF
    0U,	// G_CTPOP
    0U,	// G_BSWAP
    0U,	// G_BITREVERSE
    0U,	// G_FCEIL
    0U,	// G_FCOS
    0U,	// G_FSIN
    0U,	// G_FSQRT
    0U,	// G_FFLOOR
    0U,	// G_FRINT
    0U,	// G_FNEARBYINT
    0U,	// G_ADDRSPACE_CAST
    0U,	// G_BLOCK_ADDR
    0U,	// G_JUMP_TABLE
    0U,	// G_DYN_STACKALLOC
    0U,	// G_STACKSAVE
    0U,	// G_STACKRESTORE
    0U,	// G_STRICT_FADD
    0U,	// G_STRICT_FSUB
    0U,	// G_STRICT_FMUL
    0U,	// G_STRICT_FDIV
    0U,	// G_STRICT_FREM
    0U,	// G_STRICT_FMA
    0U,	// G_STRICT_FSQRT
    0U,	// G_STRICT_FLDEXP
    0U,	// G_READ_REGISTER
    0U,	// G_WRITE_REGISTER
    0U,	// G_MEMCPY
    0U,	// G_MEMCPY_INLINE
    0U,	// G_MEMMOVE
    0U,	// G_MEMSET
    0U,	// G_BZERO
    0U,	// G_VECREDUCE_SEQ_FADD
    0U,	// G_VECREDUCE_SEQ_FMUL
    0U,	// G_VECREDUCE_FADD
    0U,	// G_VECREDUCE_FMUL
    0U,	// G_VECREDUCE_FMAX
    0U,	// G_VECREDUCE_FMIN
    0U,	// G_VECREDUCE_FMAXIMUM
    0U,	// G_VECREDUCE_FMINIMUM
    0U,	// G_VECREDUCE_ADD
    0U,	// G_VECREDUCE_MUL
    0U,	// G_VECREDUCE_AND
    0U,	// G_VECREDUCE_OR
    0U,	// G_VECREDUCE_XOR
    0U,	// G_VECREDUCE_SMAX
    0U,	// G_VECREDUCE_SMIN
    0U,	// G_VECREDUCE_UMAX
    0U,	// G_VECREDUCE_UMIN
    0U,	// G_SBFX
    0U,	// G_UBFX
    24254U,	// ABSMacro
    0U,	// ADJCALLSTACKDOWN
    0U,	// ADJCALLSTACKDOWN_NM
    0U,	// ADJCALLSTACKUP
    0U,	// ADJCALLSTACKUP_NM
    536894083U,	// ALIGN_NM
    0U,	// AND_V_D_PSEUDO
    0U,	// AND_V_H_PSEUDO
    0U,	// AND_V_W_PSEUDO
    0U,	// ATOMIC_CMP_SWAP_I16
    0U,	// ATOMIC_CMP_SWAP_I16_POSTRA
    0U,	// ATOMIC_CMP_SWAP_I32
    0U,	// ATOMIC_CMP_SWAP_I32_POSTRA
    0U,	// ATOMIC_CMP_SWAP_I64
    0U,	// ATOMIC_CMP_SWAP_I64_POSTRA
    0U,	// ATOMIC_CMP_SWAP_I8
    0U,	// ATOMIC_CMP_SWAP_I8_POSTRA
    0U,	// ATOMIC_LOAD_ADD_I16
    0U,	// ATOMIC_LOAD_ADD_I16_POSTRA
    0U,	// ATOMIC_LOAD_ADD_I32
    0U,	// ATOMIC_LOAD_ADD_I32_POSTRA
    0U,	// ATOMIC_LOAD_ADD_I64
    0U,	// ATOMIC_LOAD_ADD_I64_POSTRA
    0U,	// ATOMIC_LOAD_ADD_I8
    0U,	// ATOMIC_LOAD_ADD_I8_POSTRA
    0U,	// ATOMIC_LOAD_AND_I16
    0U,	// ATOMIC_LOAD_AND_I16_POSTRA
    0U,	// ATOMIC_LOAD_AND_I32
    0U,	// ATOMIC_LOAD_AND_I32_POSTRA
    0U,	// ATOMIC_LOAD_AND_I64
    0U,	// ATOMIC_LOAD_AND_I64_POSTRA
    0U,	// ATOMIC_LOAD_AND_I8
    0U,	// ATOMIC_LOAD_AND_I8_POSTRA
    0U,	// ATOMIC_LOAD_MAX_I16
    0U,	// ATOMIC_LOAD_MAX_I16_POSTRA
    0U,	// ATOMIC_LOAD_MAX_I32
    0U,	// ATOMIC_LOAD_MAX_I32_POSTRA
    0U,	// ATOMIC_LOAD_MAX_I64
    0U,	// ATOMIC_LOAD_MAX_I64_POSTRA
    0U,	// ATOMIC_LOAD_MAX_I8
    0U,	// ATOMIC_LOAD_MAX_I8_POSTRA
    0U,	// ATOMIC_LOAD_MIN_I16
    0U,	// ATOMIC_LOAD_MIN_I16_POSTRA
    0U,	// ATOMIC_LOAD_MIN_I32
    0U,	// ATOMIC_LOAD_MIN_I32_POSTRA
    0U,	// ATOMIC_LOAD_MIN_I64
    0U,	// ATOMIC_LOAD_MIN_I64_POSTRA
    0U,	// ATOMIC_LOAD_MIN_I8
    0U,	// ATOMIC_LOAD_MIN_I8_POSTRA
    0U,	// ATOMIC_LOAD_NAND_I16
    0U,	// ATOMIC_LOAD_NAND_I16_POSTRA
    0U,	// ATOMIC_LOAD_NAND_I32
    0U,	// ATOMIC_LOAD_NAND_I32_POSTRA
    0U,	// ATOMIC_LOAD_NAND_I64
    0U,	// ATOMIC_LOAD_NAND_I64_POSTRA
    0U,	// ATOMIC_LOAD_NAND_I8
    0U,	// ATOMIC_LOAD_NAND_I8_POSTRA
    0U,	// ATOMIC_LOAD_OR_I16
    0U,	// ATOMIC_LOAD_OR_I16_POSTRA
    0U,	// ATOMIC_LOAD_OR_I32
    0U,	// ATOMIC_LOAD_OR_I32_POSTRA
    0U,	// ATOMIC_LOAD_OR_I64
    0U,	// ATOMIC_LOAD_OR_I64_POSTRA
    0U,	// ATOMIC_LOAD_OR_I8
    0U,	// ATOMIC_LOAD_OR_I8_POSTRA
    0U,	// ATOMIC_LOAD_SUB_I16
    0U,	// ATOMIC_LOAD_SUB_I16_POSTRA
    0U,	// ATOMIC_LOAD_SUB_I32
    0U,	// ATOMIC_LOAD_SUB_I32_POSTRA
    0U,	// ATOMIC_LOAD_SUB_I64
    0U,	// ATOMIC_LOAD_SUB_I64_POSTRA
    0U,	// ATOMIC_LOAD_SUB_I8
    0U,	// ATOMIC_LOAD_SUB_I8_POSTRA
    0U,	// ATOMIC_LOAD_UMAX_I16
    0U,	// ATOMIC_LOAD_UMAX_I16_POSTRA
    0U,	// ATOMIC_LOAD_UMAX_I32
    0U,	// ATOMIC_LOAD_UMAX_I32_POSTRA
    0U,	// ATOMIC_LOAD_UMAX_I64
    0U,	// ATOMIC_LOAD_UMAX_I64_POSTRA
    0U,	// ATOMIC_LOAD_UMAX_I8
    0U,	// ATOMIC_LOAD_UMAX_I8_POSTRA
    0U,	// ATOMIC_LOAD_UMIN_I16
    0U,	// ATOMIC_LOAD_UMIN_I16_POSTRA
    0U,	// ATOMIC_LOAD_UMIN_I32
    0U,	// ATOMIC_LOAD_UMIN_I32_POSTRA
    0U,	// ATOMIC_LOAD_UMIN_I64
    0U,	// ATOMIC_LOAD_UMIN_I64_POSTRA
    0U,	// ATOMIC_LOAD_UMIN_I8
    0U,	// ATOMIC_LOAD_UMIN_I8_POSTRA
    0U,	// ATOMIC_LOAD_XOR_I16
    0U,	// ATOMIC_LOAD_XOR_I16_POSTRA
    0U,	// ATOMIC_LOAD_XOR_I32
    0U,	// ATOMIC_LOAD_XOR_I32_POSTRA
    0U,	// ATOMIC_LOAD_XOR_I64
    0U,	// ATOMIC_LOAD_XOR_I64_POSTRA
    0U,	// ATOMIC_LOAD_XOR_I8
    0U,	// ATOMIC_LOAD_XOR_I8_POSTRA
    0U,	// ATOMIC_SWAP_I16
    0U,	// ATOMIC_SWAP_I16_POSTRA
    0U,	// ATOMIC_SWAP_I32
    0U,	// ATOMIC_SWAP_I32_POSTRA
    0U,	// ATOMIC_SWAP_I64
    0U,	// ATOMIC_SWAP_I64_POSTRA
    0U,	// ATOMIC_SWAP_I8
    0U,	// ATOMIC_SWAP_I8_POSTRA
    0U,	// B
    0U,	// BAL_BR
    0U,	// BAL_BR_MM
    536893945U,	// BEQLImmMacro
    536891762U,	// BGE
    536891762U,	// BGEImmMacro
    536893806U,	// BGEL
    536893806U,	// BGELImmMacro
    536895461U,	// BGEU
    536895461U,	// BGEUImmMacro
    536893976U,	// BGEUL
    536893976U,	// BGEULImmMacro
    536895342U,	// BGT
    536895342U,	// BGTImmMacro
    536893964U,	// BGTL
    536893964U,	// BGTLImmMacro
    536895587U,	// BGTU
    536895587U,	// BGTUImmMacro
    536893996U,	// BGTUL
    536893996U,	// BGTULImmMacro
    536891802U,	// BLE
    536891802U,	// BLEImmMacro
    536893812U,	// BLEL
    536893812U,	// BLELImmMacro
    536895479U,	// BLEU
    536895479U,	// BLEUImmMacro
    536893983U,	// BLEUL
    536893983U,	// BLEULImmMacro
    536895358U,	// BLT
    536895358U,	// BLTImmMacro
    536893970U,	// BLTL
    536893970U,	// BLTLImmMacro
    536895599U,	// BLTU
    536895599U,	// BLTUImmMacro
    536894003U,	// BLTUL
    536894003U,	// BLTULImmMacro
    536893818U,	// BNELImmMacro
    0U,	// BPOSGE32_PSEUDO
    0U,	// BSEL_D_PSEUDO
    0U,	// BSEL_FD_PSEUDO
    0U,	// BSEL_FW_PSEUDO
    0U,	// BSEL_H_PSEUDO
    0U,	// BSEL_W_PSEUDO
    0U,	// B_MM
    557961U,	// B_MMR6_Pseudo
    557961U,	// B_MM_Pseudo
    536894300U,	// BeqImm
    536891829U,	// BneImm
    1073765088U,	// BteqzT8CmpX16
    1073764517U,	// BteqzT8CmpiX16
    1073766275U,	// BteqzT8SltX16
    1073764547U,	// BteqzT8SltiX16
    1073766431U,	// BteqzT8SltiuX16
    1073766517U,	// BteqzT8SltuX16
    1610636000U,	// BtnezT8CmpX16
    1610635429U,	// BtnezT8CmpiX16
    1610637187U,	// BtnezT8SltX16
    1610635459U,	// BtnezT8SltiX16
    1610637343U,	// BtnezT8SltiuX16
    1610637429U,	// BtnezT8SltuX16
    0U,	// BuildPairF64
    0U,	// BuildPairF64_64
    26841U,	// CFTC1
    10989U,	// CONSTPOOL_ENTRY
    0U,	// COPY_FD_PSEUDO
    0U,	// COPY_FW_PSEUDO
    17885415U,	// CTTC1
    551167U,	// Constant32
    536893990U,	// DMULImmMacro
    536893990U,	// DMULMacro
    536894129U,	// DMULOMacro
    536895562U,	// DMULOUMacro
    536893929U,	// DROL
    536893929U,	// DROLImm
    536894467U,	// DROR
    536894467U,	// DRORImm
    536895724U,	// DSDivIMacro
    536895724U,	// DSDivMacro
    536894048U,	// DSRemIMacro
    536894048U,	// DSRemMacro
    536895632U,	// DUDivIMacro
    536895632U,	// DUDivMacro
    536895555U,	// DURemIMacro
    536895555U,	// DURemMacro
    0U,	// ERet
    0U,	// ExtractElementF64
    0U,	// ExtractElementF64_64
    0U,	// FABS_D
    0U,	// FABS_W
    0U,	// FEXP2_D_1_PSEUDO
    0U,	// FEXP2_W_1_PSEUDO
    0U,	// FILL_FD_PSEUDO
    0U,	// FILL_FW_PSEUDO
    2181060764U,	// GotPrologue16
    0U,	// INSERT_B_VIDX64_PSEUDO
    0U,	// INSERT_B_VIDX_PSEUDO
    0U,	// INSERT_D_VIDX64_PSEUDO
    0U,	// INSERT_D_VIDX_PSEUDO
    0U,	// INSERT_FD_PSEUDO
    0U,	// INSERT_FD_VIDX64_PSEUDO
    0U,	// INSERT_FD_VIDX_PSEUDO
    0U,	// INSERT_FW_PSEUDO
    0U,	// INSERT_FW_VIDX64_PSEUDO
    0U,	// INSERT_FW_VIDX_PSEUDO
    0U,	// INSERT_H_VIDX64_PSEUDO
    0U,	// INSERT_H_VIDX_PSEUDO
    0U,	// INSERT_W_VIDX64_PSEUDO
    0U,	// INSERT_W_VIDX_PSEUDO
    0U,	// JALR64Pseudo
    0U,	// JALRCPseudo
    0U,	// JALRHB64Pseudo
    0U,	// JALRHBPseudo
    0U,	// JALRPseudo
    0U,	// JAL_MMR6
    547080U,	// JalOneReg
    22792U,	// JalTwoReg
    50358523U,	// LDMacro
    0U,	// LDR_D
    0U,	// LDR_W
    0U,	// LD_F16
    50348037U,	// LOAD_ACC128
    50348037U,	// LOAD_ACC64
    50348037U,	// LOAD_ACC64DSP
    50354934U,	// LOAD_CCOND_DSP
    0U,	// LONG_BRANCH_ADDiu
    0U,	// LONG_BRANCH_ADDiu2Op
    0U,	// LONG_BRANCH_DADDiu
    0U,	// LONG_BRANCH_DADDiu2Op
    0U,	// LONG_BRANCH_LUi
    0U,	// LONG_BRANCH_LUi2Op
    0U,	// LONG_BRANCH_LUi2Op_64
    72310U,	// LWM_MM
    17196U,	// LoadAddrImm32
    17217U,	// LoadAddrImm64
    50348844U,	// LoadAddrReg32
    50348865U,	// LoadAddrReg64
    22684U,	// LoadImm32
    22688U,	// LoadImm64
    19348U,	// LoadImmDoubleFGR
    19348U,	// LoadImmDoubleFGR_32
    19348U,	// LoadImmDoubleGPR
    23819U,	// LoadImmSingleFGR
    23819U,	// LoadImmSingleGPR
    0U,	// LoadJumpTableOffset
    1599429U,	// LwConstant32
    26979U,	// MFTACX
    26979U,	// MFTACX_NM
    536897723U,	// MFTC0
    536897723U,	// MFTC0_NM
    26848U,	// MFTC1
    551212U,	// MFTDSP
    551212U,	// MFTDSP_NM
    26957U,	// MFTGPR
    26957U,	// MFTGPR_NM
    26825U,	// MFTHC1
    26896U,	// MFTHI
    26896U,	// MFTHI_NM
    26910U,	// MFTLO
    26910U,	// MFTLO_NM
    0U,	// MIPSeh_return32
    0U,	// MIPSeh_return64
    0U,	// MSA_FP_EXTEND_D_PSEUDO
    0U,	// MSA_FP_EXTEND_W_PSEUDO
    0U,	// MSA_FP_ROUND_D_PSEUDO
    0U,	// MSA_FP_ROUND_W_PSEUDO
    17885547U,	// MTTACX
    17885547U,	// MTTACX_NM
    2752571586U,	// MTTC0
    2752571586U,	// MTTC0_NM
    17885422U,	// MTTC1
    551220U,	// MTTDSP
    551220U,	// MTTDSP_NM
    17885525U,	// MTTGPR
    17885525U,	// MTTGPR_NM
    17885393U,	// MTTHC1
    17885463U,	// MTTHI
    17885463U,	// MTTHI_NM
    17885477U,	// MTTLO
    17885477U,	// MTTLO_NM
    536893991U,	// MULImmMacro
    536894130U,	// MULOMacro
    536895563U,	// MULOUMacro
    0U,	// MUSTTAILCALLREG_NM
    0U,	// MUSTTAILCALL_NM
    24462U,	// MultRxRy16
    86040462U,	// MultRxRyRz16
    24706U,	// MultuRxRy16
    86040706U,	// MultuRxRyRz16
    0U,	// NOP
    536894462U,	// NORImm
    536894462U,	// NORImm64
    0U,	// NOR_V_D_PSEUDO
    0U,	// NOR_V_H_PSEUDO
    0U,	// NOR_V_W_PSEUDO
    0U,	// OR_V_D_PSEUDO
    0U,	// OR_V_H_PSEUDO
    0U,	// OR_V_W_PSEUDO
    536895505U,	// PseudoADDIU_NM
    536893544U,	// PseudoANDI_NM
    0U,	// PseudoCMPU_EQ_QB
    0U,	// PseudoCMPU_LE_QB
    0U,	// PseudoCMPU_LT_QB
    0U,	// PseudoCMP_EQ_PH
    0U,	// PseudoCMP_LE_PH
    0U,	// PseudoCMP_LT_PH
    16389U,	// PseudoCVT_D32_W
    16389U,	// PseudoCVT_D64_L
    16389U,	// PseudoCVT_D64_W
    16389U,	// PseudoCVT_S_L
    16389U,	// PseudoCVT_S_W
    0U,	// PseudoDMULT
    0U,	// PseudoDMULTu
    0U,	// PseudoDSDIV
    0U,	// PseudoDUDIV
    0U,	// PseudoD_SELECT_I
    0U,	// PseudoD_SELECT_I64
    0U,	// PseudoIndirectBranch
    0U,	// PseudoIndirectBranch64
    0U,	// PseudoIndirectBranch64R6
    0U,	// PseudoIndirectBranchNM
    0U,	// PseudoIndirectBranchR6
    0U,	// PseudoIndirectBranch_MM
    0U,	// PseudoIndirectBranch_MMR6
    0U,	// PseudoIndirectHazardBranch
    0U,	// PseudoIndirectHazardBranch64
    0U,	// PseudoIndrectHazardBranch64R6
    0U,	// PseudoIndrectHazardBranchR6
    100680492U,	// PseudoLA_NM
    100685980U,	// PseudoLI_NM
    0U,	// PseudoMADD
    0U,	// PseudoMADDU
    0U,	// PseudoMADDU_MM
    0U,	// PseudoMADD_MM
    0U,	// PseudoMFHI
    0U,	// PseudoMFHI64
    0U,	// PseudoMFHI_MM
    0U,	// PseudoMFLO
    0U,	// PseudoMFLO64
    0U,	// PseudoMFLO_MM
    0U,	// PseudoMSUB
    0U,	// PseudoMSUBU
    0U,	// PseudoMSUBU_MM
    0U,	// PseudoMSUB_MM
    0U,	// PseudoMTLOHI
    0U,	// PseudoMTLOHI64
    0U,	// PseudoMTLOHI_DSP
    0U,	// PseudoMTLOHI_MM
    0U,	// PseudoMULT
    0U,	// PseudoMULT_MM
    0U,	// PseudoMULTu
    0U,	// PseudoMULTu_MM
    0U,	// PseudoPICK_PH
    0U,	// PseudoPICK_QB
    0U,	// PseudoReturn
    0U,	// PseudoReturn64
    0U,	// PseudoReturnNM
    0U,	// PseudoSDIV
    0U,	// PseudoSELECTFP_F_D32
    0U,	// PseudoSELECTFP_F_D64
    0U,	// PseudoSELECTFP_F_I
    0U,	// PseudoSELECTFP_F_I64
    0U,	// PseudoSELECTFP_F_S
    0U,	// PseudoSELECTFP_T_D32
    0U,	// PseudoSELECTFP_T_D64
    0U,	// PseudoSELECTFP_T_I
    0U,	// PseudoSELECTFP_T_I64
    0U,	// PseudoSELECTFP_T_S
    0U,	// PseudoSELECT_D32
    0U,	// PseudoSELECT_D64
    0U,	// PseudoSELECT_I
    0U,	// PseudoSELECT_I64
    0U,	// PseudoSELECT_S
    536895420U,	// PseudoSUBU_NM
    536891541U,	// PseudoTRUNC_W_D
    536891541U,	// PseudoTRUNC_W_D32
    536895079U,	// PseudoTRUNC_W_S
    0U,	// PseudoUDIV
    536893930U,	// ROL
    536893930U,	// ROLImm
    536894468U,	// ROR
    536894468U,	// RORImm
    0U,	// RetRA
    0U,	// RetRA16
    50351496U,	// SDC1_M1
    0U,	// SDIV_MM_Pseudo
    50358535U,	// SDMacro
    536895725U,	// SDivIMacro
    536895725U,	// SDivMacro
    536897864U,	// SEQIMacro
    536897864U,	// SEQMacro
    536891767U,	// SGE
    536891767U,	// SGEImm
    536891767U,	// SGEImm64
    536895467U,	// SGEU
    536895467U,	// SGEUImm
    536895467U,	// SGEUImm64
    536895347U,	// SGTImm
    536895347U,	// SGTImm64
    536895593U,	// SGTUImm
    536895593U,	// SGTUImm64
    536891812U,	// SLE
    536891812U,	// SLEImm
    536891812U,	// SLEImm64
    536895485U,	// SLEU
    536895485U,	// SLEUImm
    536895485U,	// SLEUImm64
    536895363U,	// SLTImm64
    536895605U,	// SLTUImm64
    536897803U,	// SNEIMacro
    536897803U,	// SNEMacro
    0U,	// SNZ_B_PSEUDO
    0U,	// SNZ_D_PSEUDO
    0U,	// SNZ_H_PSEUDO
    0U,	// SNZ_V_PSEUDO
    0U,	// SNZ_W_PSEUDO
    536894049U,	// SRemIMacro
    536894049U,	// SRemMacro
    50348037U,	// STORE_ACC128
    50348037U,	// STORE_ACC64
    50348037U,	// STORE_ACC64DSP
    50354950U,	// STORE_CCOND_DSP
    0U,	// STR_D
    0U,	// STR_W
    0U,	// ST_F16
    72317U,	// SWM_MM
    0U,	// SZ_B_PSEUDO
    0U,	// SZ_D_PSEUDO
    0U,	// SZ_H_PSEUDO
    0U,	// SZ_V_PSEUDO
    0U,	// SZ_W_PSEUDO
    50348827U,	// SaaAddr
    50352386U,	// SaadAddr
    2713697U,	// SelBeqZ
    2713670U,	// SelBneZ
    3338754784U,	// SelTBteqZCmp
    3338754213U,	// SelTBteqZCmpi
    3338755971U,	// SelTBteqZSlt
    3338754243U,	// SelTBteqZSlti
    3338756127U,	// SelTBteqZSltiu
    3338756213U,	// SelTBteqZSltu
    3875625696U,	// SelTBtneZCmp
    3875625125U,	// SelTBtneZCmpi
    3875626883U,	// SelTBtneZSlt
    3875625155U,	// SelTBtneZSlti
    3875627039U,	// SelTBtneZSltiu
    3875627125U,	// SelTBtneZSltu
    136372099U,	// SltCCRxRy16
    136370371U,	// SltiCCRxImmX16
    136372255U,	// SltiuCCRxImmX16
    136372341U,	// SltuCCRxRy16
    136372341U,	// SltuRxRyRz16
    0U,	// TAILCALL
    0U,	// TAILCALL64R6REG
    0U,	// TAILCALLHB64R6REG
    0U,	// TAILCALLHBR6REG
    0U,	// TAILCALLR6REG
    0U,	// TAILCALLREG
    0U,	// TAILCALLREG64
    0U,	// TAILCALLREGHB
    0U,	// TAILCALLREGHB64
    0U,	// TAILCALLREG_MM
    0U,	// TAILCALLREG_MMR6
    0U,	// TAILCALLREG_NM
    0U,	// TAILCALL_MM
    0U,	// TAILCALL_MMR6
    0U,	// TAILCALL_NM
    0U,	// TRAP
    0U,	// TRAP_MM
    0U,	// UDIV_MM_Pseudo
    536895633U,	// UDivIMacro
    536895633U,	// UDivMacro
    536895556U,	// URemIMacro
    536895556U,	// URemMacro
    50353696U,	// Ulh
    50356227U,	// Ulhu
    50358217U,	// Ulw
    50354255U,	// Ush
    50358239U,	// Usw
    0U,	// XOR_V_D_PSEUDO
    0U,	// XOR_V_H_PSEUDO
    0U,	// XOR_V_W_PSEUDO
    22322U,	// ABSQ_S_PH
    22322U,	// ABSQ_S_PH_MM
    18359U,	// ABSQ_S_QB
    18359U,	// ABSQ_S_QB_MMR2
    25926U,	// ABSQ_S_W
    25926U,	// ABSQ_S_W_MM
    536891671U,	// ADD
    536888015U,	// ADDIU48_NM
    536888026U,	// ADDIUGP48_NM
    536888039U,	// ADDIUGPB_NM
    536888078U,	// ADDIUGPW_NM
    536888052U,	// ADDIUNEG_NM
    18678U,	// ADDIUPC
    18678U,	// ADDIUPC_MM
    18678U,	// ADDIUPC_MMR6
    23275U,	// ADDIUR1SP_MM
    536888064U,	// ADDIUR1SP_NM
    536887680U,	// ADDIUR2_MM
    536887964U,	// ADDIUR2_NM
    536887975U,	// ADDIURS5_NM
    18923937U,	// ADDIUS5_MM
    547624U,	// ADDIUSP_MM
    536895505U,	// ADDIU_MMR6
    536887953U,	// ADDIU_NM
    536893039U,	// ADDQH_PH
    536893039U,	// ADDQH_PH_MMR2
    536893156U,	// ADDQH_R_PH
    536893156U,	// ADDQH_R_PH_MMR2
    536896513U,	// ADDQH_R_W
    536896513U,	// ADDQH_R_W_MMR2
    536896116U,	// ADDQH_W
    536896116U,	// ADDQH_W_MMR2
    536893113U,	// ADDQ_PH
    536893113U,	// ADDQ_PH_MM
    536893212U,	// ADDQ_S_PH
    536893212U,	// ADDQ_S_PH_MM
    536896818U,	// ADDQ_S_W
    536896818U,	// ADDQ_S_W_MM
    536895247U,	// ADDR_PS64
    536889644U,	// ADDSC
    536889644U,	// ADDSC_MM
    536888213U,	// ADDS_A_B
    536889837U,	// ADDS_A_D
    536891952U,	// ADDS_A_H
    536895824U,	// ADDS_A_W
    536888689U,	// ADDS_S_B
    536890935U,	// ADDS_S_D
    536892517U,	// ADDS_S_H
    536896868U,	// ADDS_S_W
    536888904U,	// ADDS_U_B
    536891402U,	// ADDS_U_D
    536892795U,	// ADDS_U_H
    536897286U,	// ADDS_U_W
    536887900U,	// ADDU16_MM
    536887900U,	// ADDU16_MMR6
    536889139U,	// ADDUH_QB
    536889139U,	// ADDUH_QB_MMR2
    536889247U,	// ADDUH_R_QB
    536889247U,	// ADDUH_R_QB_MMR2
    536895434U,	// ADDU_MMR6
    536893311U,	// ADDU_PH
    536893311U,	// ADDU_PH_MMR2
    536889352U,	// ADDU_QB
    536889352U,	// ADDU_QB_MM
    536893256U,	// ADDU_S_PH
    536893256U,	// ADDU_S_PH_MMR2
    536889293U,	// ADDU_S_QB
    536889293U,	// ADDU_S_QB_MM
    536888470U,	// ADDVI_B
    536890357U,	// ADDVI_D
    536892176U,	// ADDVI_H
    536896249U,	// ADDVI_W
    536888982U,	// ADDV_B
    536891492U,	// ADDV_D
    536892873U,	// ADDV_H
    536897386U,	// ADDV_W
    536889713U,	// ADDWC
    536889713U,	// ADDWC_MM
    536888195U,	// ADD_A_B
    536889818U,	// ADD_A_D
    536891934U,	// ADD_A_H
    536895805U,	// ADD_A_W
    536891671U,	// ADD_MM
    536891671U,	// ADD_MMR6
    536891671U,	// ADD_NM
    536893538U,	// ADDi
    536893538U,	// ADDi_MM
    536895505U,	// ADDiu
    536895505U,	// ADDiu_MM
    536895434U,	// ADDu
    536895434U,	// ADDu16_NM
    536895434U,	// ADDu4x4_NM
    536895434U,	// ADDu_MM
    536895434U,	// ADDu_NM
    536894083U,	// ALIGN
    536894083U,	// ALIGN_MMR6
    18670U,	// ALUIPC
    18670U,	// ALUIPC_MMR6
    151013614U,	// ALUIPC_NM
    536891700U,	// AND
    20021711U,	// AND16_MM
    20021711U,	// AND16_MMR6
    536891700U,	// AND16_NM
    536891700U,	// AND64
    536887780U,	// ANDI16_MM
    536887780U,	// ANDI16_MMR6
    536887997U,	// ANDI16_NM
    536888329U,	// ANDI_B
    536893544U,	// ANDI_MMR6
    536887943U,	// ANDI_NM
    536891700U,	// AND_MM
    536891700U,	// AND_MMR6
    536891700U,	// AND_NM
    536895644U,	// AND_V
    536893544U,	// ANDi
    536893544U,	// ANDi64
    536893544U,	// ANDi_MM
    536891714U,	// APPEND
    536891714U,	// APPEND_MMR2
    536888583U,	// ASUB_S_B
    536890765U,	// ASUB_S_D
    536892349U,	// ASUB_S_H
    536896648U,	// ASUB_S_W
    536888798U,	// ASUB_U_B
    536891232U,	// ASUB_U_D
    536892637U,	// ASUB_U_H
    536897116U,	// ASUB_U_W
    536893648U,	// AUI
    18663U,	// AUIPC
    18663U,	// AUIPC_MMR6
    536893648U,	// AUI_MMR6
    536888669U,	// AVER_S_B
    536890915U,	// AVER_S_D
    536892487U,	// AVER_S_H
    536896848U,	// AVER_S_W
    536888884U,	// AVER_U_B
    536891382U,	// AVER_U_D
    536892775U,	// AVER_U_H
    536897266U,	// AVER_U_W
    536888611U,	// AVE_S_B
    536890847U,	// AVE_S_D
    536892419U,	// AVE_S_H
    536896730U,	// AVE_S_W
    536888826U,	// AVE_U_B
    536891314U,	// AVE_U_D
    536892707U,	// AVE_U_H
    536897198U,	// AVE_U_W
    24593U,	// AddiuRxImmX16
    3694609U,	// AddiuRxPcImmX16
    33579025U,	// AddiuRxRxImm16
    33579025U,	// AddiuRxRxImmX16
    167796753U,	// AddiuRxRyOffMemX16
    4221103U,	// AddiuSpImm16
    551087U,	// AddiuSpImmX16
    536895434U,	// AdduRxRyRz16
    33575220U,	// AndRxRxRy16
    557483U,	// B16_MM
    536895433U,	// BADDu
    563459U,	// BAL
    559256U,	// BALC
    115379U,	// BALC16_NM
    559256U,	// BALC_MMR6
    116888U,	// BALC_NM
    536894082U,	// BALIGN
    536894082U,	// BALIGN_MMR2
    18745U,	// BALRSC_NM
    536889778U,	// BBEQZC_NM
    184565845U,	// BBIT0
    184565977U,	// BBIT032
    184565970U,	// BBIT1
    184565986U,	// BBIT132
    536889752U,	// BBNEZC_NM
    559202U,	// BC
    557488U,	// BC16_MMR6
    559202U,	// BC16_NM
    201353603U,	// BC1EQZ
    201345440U,	// BC1EQZC_MMR6
    201347591U,	// BC1F
    201349504U,	// BC1FL
    201347591U,	// BC1F_MM
    201353587U,	// BC1NEZ
    201345414U,	// BC1NEZC_MMR6
    201351016U,	// BC1T
    201349637U,	// BC1TL
    201351016U,	// BC1T_MM
    201353611U,	// BC2EQZ
    201345449U,	// BC2EQZC_MMR6
    201353595U,	// BC2NEZ
    201345423U,	// BC2NEZC_MMR6
    536888398U,	// BCLRI_B
    536890301U,	// BCLRI_D
    536892120U,	// BCLRI_H
    536896193U,	// BCLRI_W
    536888550U,	// BCLR_B
    536890689U,	// BCLR_D
    536892316U,	// BCLR_H
    536896564U,	// BCLR_W
    559202U,	// BC_MMR6
    559202U,	// BC_NM
    536894300U,	// BEQ
    536894300U,	// BEQ64
    536889618U,	// BEQC
    536889618U,	// BEQC16_NM
    536889618U,	// BEQC64
    536889618U,	// BEQC_MMR6
    536889618U,	// BEQC_NM
    536889618U,	// BEQCzero_NM
    754993285U,	// BEQIC_NM
    536893945U,	// BEQL
    201343615U,	// BEQZ16_MM
    201345216U,	// BEQZALC
    201345216U,	// BEQZALC_MMR6
    201345459U,	// BEQZC
    201343430U,	// BEQZC16_MMR6
    201345459U,	// BEQZC16_NM
    201345459U,	// BEQZC64
    201345459U,	// BEQZC_MM
    201345459U,	// BEQZC_MMR6
    201345459U,	// BEQZC_NM
    536894300U,	// BEQ_MM
    536889446U,	// BGEC
    536889446U,	// BGEC64
    536889446U,	// BGEC_MMR6
    536889446U,	// BGEC_NM
    754993266U,	// BGEIC_NM
    754993486U,	// BGEIUC_NM
    536889671U,	// BGEUC
    536889671U,	// BGEUC64
    536889671U,	// BGEUC_MMR6
    536889671U,	// BGEUC_NM
    201353274U,	// BGEZ
    201353274U,	// BGEZ64
    201349389U,	// BGEZAL
    201345189U,	// BGEZALC
    201345189U,	// BGEZALC_MMR6
    201349585U,	// BGEZALL
    201350857U,	// BGEZALS_MM
    201349389U,	// BGEZAL_MM
    201345400U,	// BGEZC
    201345400U,	// BGEZC64
    201345400U,	// BGEZC_MMR6
    201349700U,	// BGEZL
    201353274U,	// BGEZ_MM
    201353334U,	// BGTZ
    201353334U,	// BGTZ64
    201345225U,	// BGTZALC
    201345225U,	// BGTZALC_MMR6
    201345466U,	// BGTZC
    201345466U,	// BGTZC64
    201345466U,	// BGTZC_MMR6
    201349714U,	// BGTZL
    201353334U,	// BGTZ_MM
    570442803U,	// BINSLI_B
    570444706U,	// BINSLI_D
    570446525U,	// BINSLI_H
    570450598U,	// BINSLI_W
    570442950U,	// BINSL_B
    570444906U,	// BINSL_D
    570446639U,	// BINSL_H
    570450756U,	// BINSL_W
    570442864U,	// BINSRI_B
    570444751U,	// BINSRI_D
    570446570U,	// BINSRI_H
    570450643U,	// BINSRI_W
    570442998U,	// BINSR_B
    570445171U,	// BINSR_D
    570446764U,	// BINSR_H
    570451046U,	// BINSR_W
    24804U,	// BITREV
    26612U,	// BITREVW_NM
    24804U,	// BITREV_MM
    23225U,	// BITSWAP
    23225U,	// BITSWAP_MMR6
    201353280U,	// BLEZ
    201353280U,	// BLEZ64
    201345198U,	// BLEZALC
    201345198U,	// BLEZALC_MMR6
    201345407U,	// BLEZC
    201345407U,	// BLEZC64
    201345407U,	// BLEZC_MMR6
    201349707U,	// BLEZL
    201353280U,	// BLEZ_MM
    536889665U,	// BLTC
    536889665U,	// BLTC64
    536889665U,	// BLTC_MMR6
    536889665U,	// BLTC_NM
    754993292U,	// BLTIC_NM
    754993494U,	// BLTIUC_NM
    536889694U,	// BLTUC
    536889694U,	// BLTUC64
    536889694U,	// BLTUC_MMR6
    536889694U,	// BLTUC_NM
    201353340U,	// BLTZ
    201353340U,	// BLTZ64
    201349397U,	// BLTZAL
    201345234U,	// BLTZALC
    201345234U,	// BLTZALC_MMR6
    201349594U,	// BLTZALL
    201350866U,	// BLTZALS_MM
    201349397U,	// BLTZAL_MM
    201345473U,	// BLTZC
    201345473U,	// BLTZC64
    201345473U,	// BLTZC_MMR6
    201349721U,	// BLTZL
    201353340U,	// BLTZ_MM
    570442919U,	// BMNZI_B
    570450133U,	// BMNZ_V
    570442911U,	// BMZI_B
    570450119U,	// BMZ_V
    536891829U,	// BNE
    536891829U,	// BNE64
    536889452U,	// BNEC
    536889452U,	// BNEC16_NM
    536889452U,	// BNEC64
    536889452U,	// BNEC_MMR6
    536889452U,	// BNEC_NM
    536889452U,	// BNECzero_NM
    536888337U,	// BNEGI_B
    536890249U,	// BNEGI_D
    536892068U,	// BNEGI_H
    536896141U,	// BNEGI_W
    536888305U,	// BNEG_B
    536890225U,	// BNEG_D
    536892044U,	// BNEG_H
    536896036U,	// BNEG_W
    754993273U,	// BNEIC_NM
    536893818U,	// BNEL
    201343607U,	// BNEZ16_MM
    201345207U,	// BNEZALC
    201345207U,	// BNEZALC_MMR6
    201345433U,	// BNEZC
    201343421U,	// BNEZC16_MMR6
    201345433U,	// BNEZC16_NM
    201345433U,	// BNEZC64
    201345433U,	// BNEZC_MM
    201345433U,	// BNEZC_MMR6
    201345433U,	// BNEZC_NM
    536891829U,	// BNE_MM
    536889701U,	// BNVC
    536889701U,	// BNVC_MMR6
    201344702U,	// BNZ_B
    201347297U,	// BNZ_D
    201348593U,	// BNZ_H
    201351374U,	// BNZ_V
    201353131U,	// BNZ_W
    536889707U,	// BOVC
    536889707U,	// BOVC_MMR6
    557299U,	// BPOSGE32
    559191U,	// BPOSGE32C_MMR3
    557299U,	// BPOSGE32_MM
    235018468U,	// BREAK
    147962U,	// BREAK16_MM
    147962U,	// BREAK16_MMR6
    547044U,	// BREAK16_NM
    235018468U,	// BREAK_MM
    235018468U,	// BREAK_MMR6
    547044U,	// BREAK_NM
    543027U,	// BRSC_NM
    570442778U,	// BSELI_B
    570450091U,	// BSEL_V
    536888452U,	// BSETI_B
    536890339U,	// BSETI_D
    536892158U,	// BSETI_H
    536896231U,	// BSETI_W
    536888766U,	// BSET_B
    536891051U,	// BSET_D
    536892605U,	// BSET_H
    536897022U,	// BSET_W
    26602U,	// BYTEREVW_NM
    201344696U,	// BZ_B
    201347281U,	// BZ_D
    201348587U,	// BZ_H
    201351361U,	// BZ_V
    201353125U,	// BZ_W
    738224225U,	// BeqzRxImm16
    201353313U,	// BeqzRxImmX16
    4227977U,	// Bimm16
    557961U,	// BimmX16
    738224198U,	// BnezRxImm16
    201353286U,	// BnezRxImmX16
    10794U,	// Break16
    4745327U,	// Bteqz16
    551023U,	// BteqzX16
    4745300U,	// Btnez16
    550996U,	// BtnezX16
    5411201U,	// CACHE
    5411171U,	// CACHEE
    5411171U,	// CACHEE_MM
    5411201U,	// CACHE_MM
    5411201U,	// CACHE_MMR6
    50516353U,	// CACHE_NM
    5411201U,	// CACHE_R6
    19476U,	// CEIL_L_D64
    19476U,	// CEIL_L_D_MMR6
    23847U,	// CEIL_L_S
    23847U,	// CEIL_L_S_MMR6
    20651U,	// CEIL_W_D32
    20651U,	// CEIL_W_D64
    20651U,	// CEIL_W_D_MMR6
    20651U,	// CEIL_W_MM
    24189U,	// CEIL_W_S
    24189U,	// CEIL_W_S_MM
    24189U,	// CEIL_W_S_MMR6
    536888381U,	// CEQI_B
    536890284U,	// CEQI_D
    536892103U,	// CEQI_H
    536896176U,	// CEQI_W
    536888535U,	// CEQ_B
    536890596U,	// CEQ_D
    536892294U,	// CEQ_H
    536896452U,	// CEQ_W
    16488U,	// CFC1
    16488U,	// CFC1_MM
    16704U,	// CFC2_MM
    17267U,	// CFCMSA
    536895195U,	// CINS
    536887588U,	// CINS32
    536895195U,	// CINS64_32
    536895195U,	// CINS_i32
    20121U,	// CLASS_D
    20121U,	// CLASS_D_MMR6
    24040U,	// CLASS_S
    24040U,	// CLASS_S_MMR6
    536888620U,	// CLEI_S_B
    536890856U,	// CLEI_S_D
    536892428U,	// CLEI_S_H
    536896739U,	// CLEI_S_W
    536888835U,	// CLEI_U_B
    536891323U,	// CLEI_U_D
    536892716U,	// CLEI_U_H
    536897207U,	// CLEI_U_W
    536888602U,	// CLE_S_B
    536890838U,	// CLE_S_D
    536892410U,	// CLE_S_H
    536896721U,	// CLE_S_W
    536888817U,	// CLE_U_B
    536891305U,	// CLE_U_D
    536892698U,	// CLE_U_H
    536897189U,	// CLE_U_W
    23193U,	// CLO
    23193U,	// CLO_MM
    23193U,	// CLO_MMR6
    23193U,	// CLO_NM
    23193U,	// CLO_R6
    536888640U,	// CLTI_S_B
    536890876U,	// CLTI_S_D
    536892448U,	// CLTI_S_H
    536896759U,	// CLTI_S_W
    536888855U,	// CLTI_U_B
    536891343U,	// CLTI_U_D
    536892736U,	// CLTI_U_H
    536897227U,	// CLTI_U_W
    536888708U,	// CLT_S_B
    536890954U,	// CLT_S_D
    536892536U,	// CLT_S_H
    536896887U,	// CLT_S_W
    536888935U,	// CLT_U_B
    536891433U,	// CLT_U_D
    536892826U,	// CLT_U_H
    536897317U,	// CLT_U_W
    26716U,	// CLZ
    26716U,	// CLZ_MM
    26716U,	// CLZ_MMR6
    26716U,	// CLZ_NM
    26716U,	// CLZ_R6
    536889185U,	// CMPGDU_EQ_QB
    536889185U,	// CMPGDU_EQ_QB_MMR2
    536889090U,	// CMPGDU_LE_QB
    536889090U,	// CMPGDU_LE_QB_MMR2
    536889304U,	// CMPGDU_LT_QB
    536889304U,	// CMPGDU_LT_QB_MMR2
    536889199U,	// CMPGU_EQ_QB
    536889199U,	// CMPGU_EQ_QB_MM
    536889104U,	// CMPGU_LE_QB
    536889104U,	// CMPGU_LE_QB_MM
    536889318U,	// CMPGU_LT_QB
    536889318U,	// CMPGU_LT_QB_MM
    18300U,	// CMPU_EQ_QB
    18300U,	// CMPU_EQ_QB_MM
    18205U,	// CMPU_LE_QB
    18205U,	// CMPU_LE_QB_MM
    18419U,	// CMPU_LT_QB
    18419U,	// CMPU_LT_QB_MM
    536890146U,	// CMP_AF_D_MMR6
    536894669U,	// CMP_AF_S_MMR6
    536890585U,	// CMP_EQ_D
    536890585U,	// CMP_EQ_D_MMR6
    22210U,	// CMP_EQ_PH
    22210U,	// CMP_EQ_PH_MM
    536894873U,	// CMP_EQ_S
    536894873U,	// CMP_EQ_S_MMR6
    536890146U,	// CMP_F_D
    536894669U,	// CMP_F_S
    536889990U,	// CMP_LE_D
    536889990U,	// CMP_LE_D_MMR6
    22106U,	// CMP_LE_PH
    22106U,	// CMP_LE_PH_MM
    536894590U,	// CMP_LE_S
    536894590U,	// CMP_LE_S_MMR6
    536891076U,	// CMP_LT_D
    536891076U,	// CMP_LT_D_MMR6
    22379U,	// CMP_LT_PH
    22379U,	// CMP_LT_PH_MM
    536894978U,	// CMP_LT_S
    536894978U,	// CMP_LT_S_MMR6
    536890164U,	// CMP_SAF_D
    536890164U,	// CMP_SAF_D_MMR6
    536894679U,	// CMP_SAF_S
    536894679U,	// CMP_SAF_S_MMR6
    536890612U,	// CMP_SEQ_D
    536890612U,	// CMP_SEQ_D_MMR6
    536894892U,	// CMP_SEQ_S
    536894892U,	// CMP_SEQ_S_MMR6
    536890027U,	// CMP_SLE_D
    536890027U,	// CMP_SLE_D_MMR6
    536894619U,	// CMP_SLE_S
    536894619U,	// CMP_SLE_S_MMR6
    536891103U,	// CMP_SLT_D
    536891103U,	// CMP_SLT_D_MMR6
    536894997U,	// CMP_SLT_S
    536894997U,	// CMP_SLT_S_MMR6
    536890660U,	// CMP_SUEQ_D
    536890660U,	// CMP_SUEQ_D_MMR6
    536894923U,	// CMP_SUEQ_S
    536894923U,	// CMP_SUEQ_S_MMR6
    536890075U,	// CMP_SULE_D
    536890075U,	// CMP_SULE_D_MMR6
    536894650U,	// CMP_SULE_S
    536894650U,	// CMP_SULE_S_MMR6
    536891151U,	// CMP_SULT_D
    536891151U,	// CMP_SULT_D_MMR6
    536895028U,	// CMP_SULT_S
    536895028U,	// CMP_SULT_S_MMR6
    536890533U,	// CMP_SUN_D
    536890533U,	// CMP_SUN_D_MMR6
    536894837U,	// CMP_SUN_S
    536894837U,	// CMP_SUN_S_MMR6
    536890640U,	// CMP_UEQ_D
    536890640U,	// CMP_UEQ_D_MMR6
    536894912U,	// CMP_UEQ_S
    536894912U,	// CMP_UEQ_S_MMR6
    536890055U,	// CMP_ULE_D
    536890055U,	// CMP_ULE_D_MMR6
    536894639U,	// CMP_ULE_S
    536894639U,	// CMP_ULE_S_MMR6
    536891131U,	// CMP_ULT_D
    536891131U,	// CMP_ULT_D_MMR6
    536895017U,	// CMP_ULT_S
    536895017U,	// CMP_ULT_S_MMR6
    536890515U,	// CMP_UN_D
    536890515U,	// CMP_UN_D_MMR6
    536894827U,	// CMP_UN_S
    536894827U,	// CMP_UN_S_MMR6
    1073759659U,	// COPY_S_B
    1073761927U,	// COPY_S_D
    1073763498U,	// COPY_S_H
    1073767871U,	// COPY_S_W
    1073759874U,	// COPY_U_B
    1073763765U,	// COPY_U_H
    1073768278U,	// COPY_U_W
    536889029U,	// CRC32B
    33572549U,	// CRC32B_NM
    536889037U,	// CRC32CB
    33572557U,	// CRC32CB_NM
    536891656U,	// CRC32CD
    536892940U,	// CRC32CH
    33576460U,	// CRC32CH_NM
    536897466U,	// CRC32CW
    33580986U,	// CRC32CW_NM
    536891642U,	// CRC32D
    536892920U,	// CRC32H
    33576440U,	// CRC32H_NM
    536897458U,	// CRC32W
    33580978U,	// CRC32W_NM
    17875075U,	// CTC1
    17875075U,	// CTC1_MM
    17875291U,	// CTC2_MM
    17275U,	// CTCMSA
    23643U,	// CVT_D32_S
    23643U,	// CVT_D32_S_MM
    24972U,	// CVT_D32_W
    24972U,	// CVT_D32_W_MM
    22769U,	// CVT_D64_L
    23643U,	// CVT_D64_S
    23643U,	// CVT_D64_S_MM
    24972U,	// CVT_D64_W
    24972U,	// CVT_D64_W_MM
    22769U,	// CVT_D_L_MMR6
    19497U,	// CVT_L_D64
    19497U,	// CVT_L_D64_MM
    19497U,	// CVT_L_D_MMR6
    23868U,	// CVT_L_S
    23868U,	// CVT_L_S_MM
    23868U,	// CVT_L_S_MMR6
    26574U,	// CVT_PS_PW64
    536894942U,	// CVT_PS_S64
    24369U,	// CVT_PW_PS64
    19844U,	// CVT_S_D32
    19844U,	// CVT_S_D32_MM
    19844U,	// CVT_S_D64
    19844U,	// CVT_S_D64_MM
    22778U,	// CVT_S_L
    22778U,	// CVT_S_L_MMR6
    23023U,	// CVT_S_PL64
    24658U,	// CVT_S_PU64
    25727U,	// CVT_S_W
    25727U,	// CVT_S_W_MM
    25727U,	// CVT_S_W_MMR6
    20672U,	// CVT_W_D32
    20672U,	// CVT_W_D32_MM
    20672U,	// CVT_W_D64
    20672U,	// CVT_W_D64_MM
    24210U,	// CVT_W_S
    24210U,	// CVT_W_S_MM
    24210U,	// CVT_W_S_MMR6
    536890577U,	// C_EQ_D32
    536890577U,	// C_EQ_D32_MM
    536890577U,	// C_EQ_D64
    536890577U,	// C_EQ_D64_MM
    536894865U,	// C_EQ_S
    536894865U,	// C_EQ_S_MM
    536890139U,	// C_F_D32
    536890139U,	// C_F_D32_MM
    536890139U,	// C_F_D64
    536890139U,	// C_F_D64_MM
    536894662U,	// C_F_S
    536894662U,	// C_F_S_MM
    536889982U,	// C_LE_D32
    536889982U,	// C_LE_D32_MM
    536889982U,	// C_LE_D64
    536889982U,	// C_LE_D64_MM
    536894582U,	// C_LE_S
    536894582U,	// C_LE_S_MM
    536891068U,	// C_LT_D32
    536891068U,	// C_LT_D32_MM
    536891068U,	// C_LT_D64
    536891068U,	// C_LT_D64_MM
    536894970U,	// C_LT_S
    536894970U,	// C_LT_S_MM
    536889973U,	// C_NGE_D32
    536889973U,	// C_NGE_D32_MM
    536889973U,	// C_NGE_D64
    536889973U,	// C_NGE_D64_MM
    536894573U,	// C_NGE_S
    536894573U,	// C_NGE_S_MM
    536890008U,	// C_NGLE_D32
    536890008U,	// C_NGLE_D32_MM
    536890008U,	// C_NGLE_D64
    536890008U,	// C_NGLE_D64_MM
    536894600U,	// C_NGLE_S
    536894600U,	// C_NGLE_S_MM
    536890425U,	// C_NGL_D32
    536890425U,	// C_NGL_D32_MM
    536890425U,	// C_NGL_D64
    536890425U,	// C_NGL_D64_MM
    536894796U,	// C_NGL_S
    536894796U,	// C_NGL_S_MM
    536891059U,	// C_NGT_D32
    536891059U,	// C_NGT_D32_MM
    536891059U,	// C_NGT_D64
    536891059U,	// C_NGT_D64_MM
    536894961U,	// C_NGT_S
    536894961U,	// C_NGT_S_MM
    536890018U,	// C_OLE_D32
    536890018U,	// C_OLE_D32_MM
    536890018U,	// C_OLE_D64
    536890018U,	// C_OLE_D64_MM
    536894610U,	// C_OLE_S
    536894610U,	// C_OLE_S_MM
    536891094U,	// C_OLT_D32
    536891094U,	// C_OLT_D32_MM
    536891094U,	// C_OLT_D64
    536891094U,	// C_OLT_D64_MM
    536894988U,	// C_OLT_S
    536894988U,	// C_OLT_S_MM
    536890603U,	// C_SEQ_D32
    536890603U,	// C_SEQ_D32_MM
    536890603U,	// C_SEQ_D64
    536890603U,	// C_SEQ_D64_MM
    536894883U,	// C_SEQ_S
    536894883U,	// C_SEQ_S_MM
    536890209U,	// C_SF_D32
    536890209U,	// C_SF_D32_MM
    536890209U,	// C_SF_D64
    536890209U,	// C_SF_D64_MM
    536894708U,	// C_SF_S
    536894708U,	// C_SF_S_MM
    536890631U,	// C_UEQ_D32
    536890631U,	// C_UEQ_D32_MM
    536890631U,	// C_UEQ_D64
    536890631U,	// C_UEQ_D64_MM
    536894903U,	// C_UEQ_S
    536894903U,	// C_UEQ_S_MM
    536890046U,	// C_ULE_D32
    536890046U,	// C_ULE_D32_MM
    536890046U,	// C_ULE_D64
    536890046U,	// C_ULE_D64_MM
    536894630U,	// C_ULE_S
    536894630U,	// C_ULE_S_MM
    536891122U,	// C_ULT_D32
    536891122U,	// C_ULT_D32_MM
    536891122U,	// C_ULT_D64
    536891122U,	// C_ULT_D64_MM
    536895008U,	// C_ULT_S
    536895008U,	// C_ULT_S_MM
    536890507U,	// C_UN_D32
    536890507U,	// C_UN_D32_MM
    536890507U,	// C_UN_D64
    536890507U,	// C_UN_D64_MM
    536894819U,	// C_UN_S
    536894819U,	// C_UN_S_MM
    23264U,	// CmpRxRy16
    1610635429U,	// CmpiRxImm16
    22693U,	// CmpiRxImmX16
    536891670U,	// DADD
    536893537U,	// DADDi
    536895504U,	// DADDiu
    536895440U,	// DADDu
    536893568U,	// DAHI
    536894090U,	// DALIGN
    536893629U,	// DATI
    536893647U,	// DAUI
    23224U,	// DBITSWAP
    23192U,	// DCLO
    23192U,	// DCLO_R6
    26715U,	// DCLZ
    26715U,	// DCLZ_R6
    536895724U,	// DDIV
    536895632U,	// DDIVU
    11034U,	// DERET
    11034U,	// DERET_MM
    11034U,	// DERET_MMR6
    11034U,	// DERET_NM
    536895408U,	// DEXT
    536897885U,	// DEXT64_32
    536894061U,	// DEXTM
    536895625U,	// DEXTU
    546916U,	// DI
    536895201U,	// DINS
    536894054U,	// DINSM
    536895580U,	// DINSU
    536895725U,	// DIV
    536895633U,	// DIVU
    536895633U,	// DIVU_MMR6
    536895633U,	// DIVU_NM
    536895725U,	// DIV_MMR6
    536895725U,	// DIV_NM
    536888729U,	// DIV_S_B
    536890997U,	// DIV_S_D
    536892557U,	// DIV_S_H
    536896930U,	// DIV_S_W
    536888944U,	// DIV_U_B
    536891464U,	// DIV_U_D
    536892835U,	// DIV_U_H
    536897348U,	// DIV_U_W
    546916U,	// DI_MM
    546916U,	// DI_MMR6
    546916U,	// DI_NM
    536888173U,	// DLSA
    536888173U,	// DLSA_R6
    536887303U,	// DMFC0
    16494U,	// DMFC1
    536887622U,	// DMFC2
    251674950U,	// DMFC2_OCTEON
    536887310U,	// DMFGC0
    536891722U,	// DMOD
    536895454U,	// DMODU
    548756U,	// DMT
    2752561212U,	// DMTC0
    17875081U,	// DMTC1
    2752561505U,	// DMTC2
    251674977U,	// DMTC2_OCTEON
    2752561190U,	// DMTGC0
    548756U,	// DMT_NM
    536893524U,	// DMUH
    536895497U,	// DMUHU
    536893990U,	// DMUL
    24461U,	// DMULT
    24705U,	// DMULTu
    536895541U,	// DMULU
    536893990U,	// DMUL_R6
    536890905U,	// DOTP_S_D
    536892477U,	// DOTP_S_H
    536896798U,	// DOTP_S_W
    536891372U,	// DOTP_U_D
    536892765U,	// DOTP_U_H
    536897256U,	// DOTP_U_W
    570445250U,	// DPADD_S_D
    570446822U,	// DPADD_S_H
    570451133U,	// DPADD_S_W
    570445717U,	// DPADD_U_D
    570447110U,	// DPADD_U_H
    570451601U,	// DPADD_U_W
    536893370U,	// DPAQX_SA_W_PH
    536893370U,	// DPAQX_SA_W_PH_MMR2
    536893453U,	// DPAQX_S_W_PH
    536893453U,	// DPAQX_S_W_PH_MMR2
    536896258U,	// DPAQ_SA_L_W
    536896258U,	// DPAQ_SA_L_W_MM
    536893412U,	// DPAQ_S_W_PH
    536893412U,	// DPAQ_S_W_PH_MM
    536893725U,	// DPAU_H_QBL
    536893725U,	// DPAU_H_QBL_MM
    536894315U,	// DPAU_H_QBR
    536894315U,	// DPAU_H_QBR_MM
    536893491U,	// DPAX_W_PH
    536893491U,	// DPAX_W_PH_MMR2
    536893360U,	// DPA_W_PH
    536893360U,	// DPA_W_PH_MMR2
    23269U,	// DPOP
    536893385U,	// DPSQX_SA_W_PH
    536893385U,	// DPSQX_SA_W_PH_MMR2
    536893467U,	// DPSQX_S_W_PH
    536893467U,	// DPSQX_S_W_PH_MMR2
    536896271U,	// DPSQ_SA_L_W
    536896271U,	// DPSQ_SA_L_W_MM
    536893440U,	// DPSQ_S_W_PH
    536893440U,	// DPSQ_S_W_PH_MM
    570445217U,	// DPSUB_S_D
    570446801U,	// DPSUB_S_H
    570451100U,	// DPSUB_S_W
    570445684U,	// DPSUB_U_D
    570447089U,	// DPSUB_U_H
    570451568U,	// DPSUB_U_W
    536893737U,	// DPSU_H_QBL
    536893737U,	// DPSU_H_QBL_MM
    536894327U,	// DPSU_H_QBR
    536894327U,	// DPSU_H_QBR_MM
    536893502U,	// DPSX_W_PH
    536893502U,	// DPSX_W_PH_MMR2
    536893481U,	// DPS_W_PH
    536893481U,	// DPS_W_PH_MMR2
    536894500U,	// DROTR
    536887579U,	// DROTR32
    536895773U,	// DROTRV
    22016U,	// DSBH
    26786U,	// DSDIV
    20770U,	// DSHD
    536893923U,	// DSLL
    536887549U,	// DSLL32
    2147506659U,	// DSLL64_32
    536895730U,	// DSLLV
    536888167U,	// DSRA
    536887531U,	// DSRA32
    536895709U,	// DSRAV
    536893951U,	// DSRL
    536887557U,	// DSRL32
    536895737U,	// DSRLV
    536889419U,	// DSUB
    536895419U,	// DSUBu
    26772U,	// DUDIV
    547656U,	// DVP
    545220U,	// DVPE
    545220U,	// DVPE_NM
    547656U,	// DVP_MMR6
    26787U,	// DivRxRy16
    26773U,	// DivuRxRy16
    10928U,	// EHB
    10928U,	// EHB_MM
    10928U,	// EHB_MMR6
    10928U,	// EHB_NM
    546928U,	// EI
    546928U,	// EI_MM
    546928U,	// EI_MMR6
    546928U,	// EI_NM
    548761U,	// EMT
    548761U,	// EMT_NM
    11035U,	// ERET
    10932U,	// ERETNC
    10932U,	// ERETNC_MMR6
    10932U,	// ERETNC_NM
    11035U,	// ERET_MM
    11035U,	// ERET_MMR6
    11035U,	// ERET_NM
    547661U,	// EVP
    545226U,	// EVPE
    545226U,	// EVPE_NM
    547661U,	// EVP_MMR6
    536895409U,	// EXT
    536894274U,	// EXTP
    536894153U,	// EXTPDP
    536895757U,	// EXTPDPV
    536895757U,	// EXTPDPV_MM
    536894153U,	// EXTPDP_MM
    536895766U,	// EXTPV
    536895766U,	// EXTPV_MM
    536894274U,	// EXTP_MM
    536896991U,	// EXTRV_RS_W
    536896991U,	// EXTRV_RS_W_MM
    536896545U,	// EXTRV_R_W
    536896545U,	// EXTRV_R_W_MM
    536892566U,	// EXTRV_S_H
    536892566U,	// EXTRV_S_H_MM
    536897428U,	// EXTRV_W
    536897428U,	// EXTRV_W_MM
    536896980U,	// EXTR_RS_W
    536896980U,	// EXTR_RS_W_MM
    536896524U,	// EXTR_R_W
    536896524U,	// EXTR_R_W_MM
    536892497U,	// EXTR_S_H
    536892497U,	// EXTR_S_H_MM
    536896623U,	// EXTR_W
    536896623U,	// EXTR_W_MM
    536895299U,	// EXTS
    536887596U,	// EXTS32
    536897508U,	// EXTW_NM
    536895409U,	// EXT_MM
    536895409U,	// EXT_MMR6
    536895409U,	// EXT_NM
    20113U,	// FABS_D32
    20113U,	// FABS_D32_MM
    20113U,	// FABS_D64
    20113U,	// FABS_D64_MM
    24023U,	// FABS_S
    24023U,	// FABS_S_MM
    536889922U,	// FADD_D
    536889923U,	// FADD_D32
    536889923U,	// FADD_D32_MM
    536889923U,	// FADD_D64
    536889923U,	// FADD_D64_MM
    536895215U,	// FADD_PS64
    536894566U,	// FADD_S
    536894566U,	// FADD_S_MM
    570448998U,	// FADD_S_MMR6
    536895893U,	// FADD_W
    536890156U,	// FCAF_D
    536896012U,	// FCAF_W
    536890595U,	// FCEQ_D
    536896451U,	// FCEQ_W
    20120U,	// FCLASS_D
    26091U,	// FCLASS_W
    536890000U,	// FCLE_D
    536895935U,	// FCLE_W
    536891086U,	// FCLT_D
    536897030U,	// FCLT_W
    5974450U,	// FCMP_D32
    5974450U,	// FCMP_D32_MM
    5974450U,	// FCMP_D64
    6498738U,	// FCMP_S32
    6498738U,	// FCMP_S32_MM
    536890096U,	// FCNE_D
    536895969U,	// FCNE_W
    536890705U,	// FCOR_D
    536896580U,	// FCOR_W
    536890651U,	// FCUEQ_D
    536896467U,	// FCUEQ_W
    536890066U,	// FCULE_D
    536895951U,	// FCULE_W
    536891142U,	// FCULT_D
    536897046U,	// FCULT_W
    536890112U,	// FCUNE_D
    536895985U,	// FCUNE_W
    536890525U,	// FCUN_D
    536896357U,	// FCUN_W
    536891518U,	// FDIV_D
    536891519U,	// FDIV_D32
    536891519U,	// FDIV_D32_MM
    536891519U,	// FDIV_D64
    536891519U,	// FDIV_D64_MM
    536895065U,	// FDIV_S
    536895065U,	// FDIV_S_MM
    570449497U,	// FDIV_S_MMR6
    536897412U,	// FDIV_W
    536892224U,	// FEXDO_H
    536896373U,	// FEXDO_W
    536889809U,	// FEXP2_D
    536895796U,	// FEXP2_W
    19537U,	// FEXUPL_D
    25387U,	// FEXUPL_W
    19809U,	// FEXUPR_D
    25684U,	// FEXUPR_W
    20051U,	// FFINT_S_D
    25984U,	// FFINT_S_W
    20530U,	// FFINT_U_D
    26414U,	// FFINT_U_W
    19547U,	// FFQL_D
    25397U,	// FFQL_W
    19819U,	// FFQR_D
    25694U,	// FFQR_W
    17584U,	// FILL_B
    19522U,	// FILL_D
    21273U,	// FILL_H
    25372U,	// FILL_W
    18888U,	// FLOG2_D
    24875U,	// FLOG2_W
    19486U,	// FLOOR_L_D64
    19486U,	// FLOOR_L_D_MMR6
    23857U,	// FLOOR_L_S
    23857U,	// FLOOR_L_S_MMR6
    20661U,	// FLOOR_W_D32
    20661U,	// FLOOR_W_D64
    20661U,	// FLOOR_W_D_MMR6
    20661U,	// FLOOR_W_MM
    24199U,	// FLOOR_W_S
    24199U,	// FLOOR_W_S_MM
    24199U,	// FLOOR_W_S_MMR6
    570444362U,	// FMADD_D
    570450333U,	// FMADD_W
    536889847U,	// FMAX_A_D
    536895834U,	// FMAX_A_W
    536891593U,	// FMAX_D
    536897437U,	// FMAX_W
    536889827U,	// FMIN_A_D
    536895814U,	// FMIN_A_W
    536890499U,	// FMIN_D
    536896349U,	// FMIN_W
    20622U,	// FMOV_D32
    20622U,	// FMOV_D32_MM
    20622U,	// FMOV_D64
    20622U,	// FMOV_D64_MM
    20622U,	// FMOV_D_MMR6
    24160U,	// FMOV_S
    24160U,	// FMOV_S_MM
    24160U,	// FMOV_S_MMR6
    570444320U,	// FMSUB_D
    570450291U,	// FMSUB_W
    536890483U,	// FMUL_D
    536890484U,	// FMUL_D32
    536890484U,	// FMUL_D32_MM
    536890484U,	// FMUL_D64
    536890484U,	// FMUL_D64_MM
    536895231U,	// FMUL_PS64
    536894805U,	// FMUL_S
    536894805U,	// FMUL_S_MM
    570449237U,	// FMUL_S_MMR6
    536896333U,	// FMUL_W
    19314U,	// FNEG_D32
    19314U,	// FNEG_D32_MM
    19314U,	// FNEG_D64
    19314U,	// FNEG_D64_MM
    23812U,	// FNEG_S
    23812U,	// FNEG_S_MM
    23812U,	// FNEG_S_MMR6
    2752567531U,	// FORK
    2752567531U,	// FORK_NM
    19648U,	// FRCP_D
    25470U,	// FRCP_W
    20268U,	// FRINT_D
    26160U,	// FRINT_W
    20296U,	// FRSQRT_D
    26188U,	// FRSQRT_W
    536890175U,	// FSAF_D
    536896020U,	// FSAF_W
    536890623U,	// FSEQ_D
    536896459U,	// FSEQ_W
    536890038U,	// FSLE_D
    536895943U,	// FSLE_W
    536891114U,	// FSLT_D
    536897038U,	// FSLT_W
    536890104U,	// FSNE_D
    536895977U,	// FSNE_W
    536890713U,	// FSOR_D
    536896588U,	// FSOR_W
    20287U,	// FSQRT_D
    20288U,	// FSQRT_D32
    20288U,	// FSQRT_D32_MM
    20288U,	// FSQRT_D64
    20288U,	// FSQRT_D64_MM
    24137U,	// FSQRT_S
    24137U,	// FSQRT_S_MM
    26179U,	// FSQRT_W
    536889880U,	// FSUB_D
    536889881U,	// FSUB_D32
    536889881U,	// FSUB_D32_MM
    536889881U,	// FSUB_D64
    536889881U,	// FSUB_D64_MM
    536895207U,	// FSUB_PS64
    536894548U,	// FSUB_S
    536894548U,	// FSUB_S_MM
    570448980U,	// FSUB_S_MMR6
    536895851U,	// FSUB_W
    536890672U,	// FSUEQ_D
    536896476U,	// FSUEQ_W
    536890087U,	// FSULE_D
    536895960U,	// FSULE_W
    536891163U,	// FSULT_D
    536897055U,	// FSULT_W
    536890121U,	// FSUNE_D
    536895994U,	// FSUNE_W
    536890544U,	// FSUN_D
    536896365U,	// FSUN_W
    20062U,	// FTINT_S_D
    25995U,	// FTINT_S_W
    20541U,	// FTINT_U_D
    26425U,	// FTINT_U_W
    536892301U,	// FTQ_H
    536896485U,	// FTQ_W
    19884U,	// FTRUNC_S_D
    25767U,	// FTRUNC_S_W
    20351U,	// FTRUNC_U_D
    26235U,	// FTRUNC_U_W
    547034U,	// GINVI
    547034U,	// GINVI_MMR6
    547034U,	// GINVI_NM
    268459939U,	// GINVT
    268459939U,	// GINVT_MMR6
    268459939U,	// GINVT_NM
    536890808U,	// HADD_S_D
    536892380U,	// HADD_S_H
    536896691U,	// HADD_S_W
    536891275U,	// HADD_U_D
    536892668U,	// HADD_U_H
    536897159U,	// HADD_U_W
    536890775U,	// HSUB_S_D
    536892359U,	// HSUB_S_H
    536896658U,	// HSUB_S_W
    536891242U,	// HSUB_U_D
    536892647U,	// HSUB_U_H
    536897126U,	// HSUB_U_W
    661951U,	// HYPCALL
    661951U,	// HYPCALL_MM
    536888999U,	// ILVEV_B
    536891509U,	// ILVEV_D
    536892890U,	// ILVEV_H
    536897403U,	// ILVEV_W
    536888527U,	// ILVL_B
    536890491U,	// ILVL_D
    536892216U,	// ILVL_H
    536896341U,	// ILVL_W
    536888279U,	// ILVOD_B
    536889964U,	// ILVOD_D
    536892018U,	// ILVOD_H
    536895926U,	// ILVOD_W
    536888575U,	// ILVR_B
    536890748U,	// ILVR_D
    536892341U,	// ILVR_H
    536896631U,	// ILVR_W
    536895196U,	// INS
    292046286U,	// INSERT_B
    308825909U,	// INSERT_D
    325604557U,	// INSERT_H
    342386233U,	// INSERT_W
    33579301U,	// INSV
    359154656U,	// INSVE_B
    375933714U,	// INSVE_D
    392712827U,	// INSVE_H
    409494019U,	// INSVE_W
    33579301U,	// INSV_MM
    536895196U,	// INS_MM
    536895196U,	// INS_MMR6
    536887297U,	// INS_NM
    219361U,	// J
    219400U,	// JAL
    23544U,	// JALR
    547832U,	// JALR16_MM
    23544U,	// JALR64
    547832U,	// JALRC16_MMR6
    18725U,	// JALRC16_NM
    18139U,	// JALRCHB_NM
    18139U,	// JALRC_HB_MMR6
    18725U,	// JALRC_MMR6
    18725U,	// JALRC_NM
    541245U,	// JALRS16_MM
    24380U,	// JALRS_MM
    18156U,	// JALR_HB
    18156U,	// JALR_HB64
    23544U,	// JALR_MM
    220867U,	// JALS_MM
    223256U,	// JALX
    223256U,	// JALX_MM
    219400U,	// JAL_MM
    18590U,	// JIALC
    18590U,	// JIALC64
    18590U,	// JIALC_MMR6
    18560U,	// JIC
    18560U,	// JIC64
    18560U,	// JIC_MMR6
    547828U,	// JR
    541232U,	// JR16_MM
    547828U,	// JR64
    547633U,	// JRADDIUSP
    543008U,	// JRC16_MM
    541110U,	// JRC16_MMR6
    547621U,	// JRCADDIUSP_MMR6
    543008U,	// JRC_NM
    542437U,	// JR_HB
    542437U,	// JR_HB64
    542437U,	// JR_HB64_R6
    542437U,	// JR_HB_R6
    547828U,	// JR_MM
    219361U,	// J_MM
    7575816U,	// Jal16
    8100104U,	// JalB16
    10921U,	// JrRa16
    10913U,	// JrcRa16
    543008U,	// JrcRx16
    543013U,	// JumpLinkReg16
    419451474U,	// LAPC32_NM
    419447735U,	// LAPC48_NM
    50349813U,	// LB
    50349813U,	// LB16_NM
    50349813U,	// LB64
    50352468U,	// LBE
    50352468U,	// LBE_MM
    50349813U,	// LBGP_NM
    50348621U,	// LBU16_MM
    50356150U,	// LBU16_NM
    50356150U,	// LBUGP_NM
    3254806564U,	// LBUX
    3254806564U,	// LBUX_MM
    50358308U,	// LBUX_NM
    50356150U,	// LBU_MMR6
    50356150U,	// LBU_NM
    50356150U,	// LBUs9_NM
    50358269U,	// LBX_NM
    50349813U,	// LB_MM
    50349813U,	// LB_MMR6
    50349813U,	// LB_NM
    50349813U,	// LBs9_NM
    50356150U,	// LBu
    50356150U,	// LBu64
    50352613U,	// LBuE
    50352613U,	// LBuE_MM
    50356150U,	// LBu_MM
    50352427U,	// LD
    50348124U,	// LDC1
    50348124U,	// LDC164
    50348124U,	// LDC1_D64_MMR6
    50348124U,	// LDC1_MM_D32
    50348124U,	// LDC1_MM_D64
    50348340U,	// LDC2
    50348340U,	// LDC2_MMR6
    50348340U,	// LDC2_R6
    50348425U,	// LDC3
    17410U,	// LDI_B
    19330U,	// LDI_D
    21149U,	// LDI_H
    25222U,	// LDI_W
    50354532U,	// LDL
    18657U,	// LDPC
    50355122U,	// LDR
    3254796444U,	// LDXC1
    3254796444U,	// LDXC164
    50349000U,	// LD_B
    50350685U,	// LD_D
    50352739U,	// LD_H
    50356647U,	// LD_W
    167796753U,	// LEA_ADDIU_NM
    167796753U,	// LEA_ADDiu
    167796752U,	// LEA_ADDiu64
    167796753U,	// LEA_ADDiu_MM
    50353692U,	// LH
    50353692U,	// LH16_NM
    50353692U,	// LH64
    50352520U,	// LHE
    50352520U,	// LHE_MM
    50353692U,	// LHGP_NM
    50348644U,	// LHU16_MM
    50356228U,	// LHU16_NM
    50356228U,	// LHUGP_NM
    50356053U,	// LHUXS_NM
    50358314U,	// LHUX_NM
    50356228U,	// LHU_NM
    50356228U,	// LHUs9_NM
    3254806542U,	// LHX
    50356041U,	// LHXS_NM
    3254806542U,	// LHX_MM
    50358286U,	// LHX_NM
    50353692U,	// LH_MM
    50353692U,	// LH_NM
    50353692U,	// LHs9_NM
    50356228U,	// LHu
    50356228U,	// LHu64
    50352619U,	// LHuE
    50352619U,	// LHuE_MM
    50356228U,	// LHu_MM
    16884U,	// LI16_MM
    16884U,	// LI16_MMR6
    218126492U,	// LI16_NM
    100680391U,	// LI48_NM
    50354628U,	// LL
    50354628U,	// LL64
    50354628U,	// LL64_R6
    50352431U,	// LLD
    50352431U,	// LLD_R6
    50352543U,	// LLE
    50352543U,	// LLE_MM
    536897858U,	// LLWP_NM
    50354628U,	// LL_MM
    50354628U,	// LL_MMR6
    50354628U,	// LL_NM
    50354628U,	// LL_R6
    536888174U,	// LSA
    3828450158U,	// LSA_MMR6
    536888174U,	// LSA_NM
    536888174U,	// LSA_R6
    251680981U,	// LUI_MMR6
    436230357U,	// LUI_NM
    3254796458U,	// LUXC1
    3254796458U,	// LUXC164
    3254796458U,	// LUXC1_MM
    251680981U,	// LUi
    251680981U,	// LUi64
    251680981U,	// LUi_MM
    50358213U,	// LW
    50348651U,	// LW16_MM
    50358213U,	// LW16_NM
    50358213U,	// LW4x4_NM
    50358213U,	// LW64
    50348176U,	// LWC1
    50348176U,	// LWC1_MM
    50348392U,	// LWC2
    50348392U,	// LWC2_MMR6
    50348392U,	// LWC2_R6
    50348437U,	// LWC3
    50358213U,	// LWDSP
    50358213U,	// LWDSP_MM
    50352637U,	// LWE
    50352637U,	// LWE_MM
    50358213U,	// LWGP16_NM
    50358213U,	// LWGP_MM
    50358213U,	// LWGP_NM
    50354746U,	// LWL
    50354746U,	// LWL64
    50352553U,	// LWLE
    50352553U,	// LWLE_MM
    50354746U,	// LWL_MM
    66065U,	// LWM16_MM
    66065U,	// LWM16_MMR6
    65805U,	// LWM32_MM
    587225718U,	// LWM_NM
    18694U,	// LWPC
    18694U,	// LWPC_MMR6
    419449094U,	// LWPC_NM
    453008210U,	// LWP_MM
    50355256U,	// LWR
    50355256U,	// LWR64
    50352601U,	// LWRE
    50352601U,	// LWRE_MM
    50355256U,	// LWR_MM
    50358213U,	// LWSP16_NM
    50358213U,	// LWSP_MM
    18687U,	// LWUPC
    50356375U,	// LWU_MM
    3254806576U,	// LWX
    3254796472U,	// LWXC1
    3254796472U,	// LWXC1_MM
    50356060U,	// LWXS16_NM
    3254804316U,	// LWXS_MM
    50356060U,	// LWXS_NM
    3254806576U,	// LWX_MM
    50358320U,	// LWX_NM
    50358213U,	// LW_MM
    50358213U,	// LW_MMR6
    50358213U,	// LW_NM
    50358213U,	// LWs9_NM
    50356375U,	// LWu
    50349813U,	// LbRxRyOffMemX16
    50356150U,	// LbuRxRyOffMemX16
    50353692U,	// LhRxRyOffMemX16
    50356228U,	// LhuRxRyOffMemX16
    1610635420U,	// LiRxImm16
    22674U,	// LiRxImmAlignX16
    22684U,	// LiRxImmX16
    26565U,	// LwRxPcTcp16
    26565U,	// LwRxPcTcpX16
    50358213U,	// LwRxRyOffMemX16
    50358213U,	// LwRxSpImmX16
    20764U,	// MADD
    570444624U,	// MADDF_D
    570444624U,	// MADDF_D_MMR6
    570449131U,	// MADDF_S
    570449131U,	// MADDF_S_MMR6
    570446705U,	// MADDR_Q_H
    570450862U,	// MADDR_Q_W
    24535U,	// MADDU
    536895447U,	// MADDU_DSP
    536895447U,	// MADDU_DSP_MM
    24535U,	// MADDU_MM
    570443413U,	// MADDV_B
    570445923U,	// MADDV_D
    570447304U,	// MADDV_H
    570451817U,	// MADDV_W
    536889931U,	// MADD_D32
    536889931U,	// MADD_D32_MM
    536889931U,	// MADD_D64
    536891676U,	// MADD_DSP
    536891676U,	// MADD_DSP_MM
    20764U,	// MADD_MM
    570446675U,	// MADD_Q_H
    570450832U,	// MADD_Q_W
    536894565U,	// MADD_S
    536894565U,	// MADD_S_MM
    536893831U,	// MAQ_SA_W_PHL
    536893831U,	// MAQ_SA_W_PHL_MM
    536894396U,	// MAQ_SA_W_PHR
    536894396U,	// MAQ_SA_W_PHR_MM
    536893859U,	// MAQ_S_W_PHL
    536893859U,	// MAQ_S_W_PHL_MM
    536894424U,	// MAQ_S_W_PHR
    536894424U,	// MAQ_S_W_PHR_MM
    536889872U,	// MAXA_D
    536889872U,	// MAXA_D_MMR6
    536894538U,	// MAXA_S
    536894538U,	// MAXA_S_MMR6
    536888650U,	// MAXI_S_B
    536890886U,	// MAXI_S_D
    536892458U,	// MAXI_S_H
    536896769U,	// MAXI_S_W
    536888865U,	// MAXI_U_B
    536891353U,	// MAXI_U_D
    536892746U,	// MAXI_U_H
    536897237U,	// MAXI_U_W
    536888223U,	// MAX_A_B
    536889848U,	// MAX_A_D
    536891962U,	// MAX_A_H
    536895835U,	// MAX_A_W
    536891594U,	// MAX_D
    536891594U,	// MAX_D_MMR6
    536895131U,	// MAX_S
    536888738U,	// MAX_S_B
    536891006U,	// MAX_S_D
    536892577U,	// MAX_S_H
    536895131U,	// MAX_S_MMR6
    536896950U,	// MAX_S_W
    536888953U,	// MAX_U_B
    536891473U,	// MAX_U_D
    536892844U,	// MAX_U_H
    536897357U,	// MAX_U_W
    536887304U,	// MFC0
    16392U,	// MFC0Sel_NM
    536887304U,	// MFC0_MMR6
    536887304U,	// MFC0_NM
    16495U,	// MFC1
    16495U,	// MFC1_D64
    16495U,	// MFC1_MM
    16495U,	// MFC1_MMR6
    536887623U,	// MFC2
    16711U,	// MFC2_MMR6
    536887311U,	// MFGC0
    536887311U,	// MFGC0_MM
    16430U,	// MFHC0Sel_NM
    536887342U,	// MFHC0_MMR6
    536887342U,	// MFHC0_NM
    16501U,	// MFHC1_D32
    16501U,	// MFHC1_D32_MM
    16501U,	// MFHC1_D64
    16501U,	// MFHC1_D64_MM
    16717U,	// MFHC2_MMR6
    536887318U,	// MFHGC0
    536887318U,	// MFHGC0_MM
    546950U,	// MFHI
    541164U,	// MFHI16_MM
    546950U,	// MFHI64
    22662U,	// MFHI_DSP
    22662U,	// MFHI_DSP_MM
    546950U,	// MFHI_MM
    547486U,	// MFLO
    541215U,	// MFLO16_MM
    547486U,	// MFLO64
    23198U,	// MFLO_DSP
    23198U,	// MFLO_DSP_MM
    547486U,	// MFLO_MM
    536894494U,	// MFTR
    536894494U,	// MFTR_NM
    536889857U,	// MINA_D
    536889857U,	// MINA_D_MMR6
    536894530U,	// MINA_S
    536894530U,	// MINA_S_MMR6
    536888630U,	// MINI_S_B
    536890866U,	// MINI_S_D
    536892438U,	// MINI_S_H
    536896749U,	// MINI_S_W
    536888845U,	// MINI_U_B
    536891333U,	// MINI_U_D
    536892726U,	// MINI_U_H
    536897217U,	// MINI_U_W
    536888204U,	// MIN_A_B
    536889828U,	// MIN_A_D
    536891943U,	// MIN_A_H
    536895815U,	// MIN_A_W
    536890500U,	// MIN_D
    536890500U,	// MIN_D_MMR6
    536894812U,	// MIN_S
    536888660U,	// MIN_S_B
    536890896U,	// MIN_S_D
    536892468U,	// MIN_S_H
    536894812U,	// MIN_S_MMR6
    536896789U,	// MIN_S_W
    536888875U,	// MIN_U_B
    536891363U,	// MIN_U_D
    536892756U,	// MIN_U_H
    536897247U,	// MIN_U_W
    536891723U,	// MOD
    536889417U,	// MODSUB
    536889417U,	// MODSUB_MM
    536895455U,	// MODU
    536895455U,	// MODU_MMR6
    536895455U,	// MODU_NM
    536891723U,	// MOD_MMR6
    536891723U,	// MOD_NM
    536888593U,	// MOD_S_B
    536890829U,	// MOD_S_D
    536892401U,	// MOD_S_H
    536896712U,	// MOD_S_W
    536888808U,	// MOD_U_B
    536891296U,	// MOD_U_D
    536892689U,	// MOD_U_H
    536897180U,	// MOD_U_W
    20983U,	// MOVE16_MM
    16854U,	// MOVE16_MMR6
    536889491U,	// MOVEBALC_NM
    536894161U,	// MOVEPREV_NM
    536894161U,	// MOVEP_MM
    536894161U,	// MOVEP_MMR6
    536894161U,	// MOVEP_NM
    20983U,	// MOVE_NM
    24739U,	// MOVE_V
    536890217U,	// MOVF_D32
    536890217U,	// MOVF_D32_MM
    536890217U,	// MOVF_D64
    536891923U,	// MOVF_I
    536891923U,	// MOVF_I64
    536891923U,	// MOVF_I_MM
    536894716U,	// MOVF_S
    536894716U,	// MOVF_S_MM
    536890552U,	// MOVN_I64_D64
    536894098U,	// MOVN_I64_I
    536894098U,	// MOVN_I64_I64
    536894848U,	// MOVN_I64_S
    536890552U,	// MOVN_I_D32
    536890552U,	// MOVN_I_D32_MM
    536890552U,	// MOVN_I_D64
    536894098U,	// MOVN_I_I
    536894098U,	// MOVN_I_I64
    536894098U,	// MOVN_I_MM
    536894848U,	// MOVN_I_S
    536894848U,	// MOVN_I_S_MM
    536894098U,	// MOVN_NM
    536891224U,	// MOVT_D32
    536891224U,	// MOVT_D32_MM
    536891224U,	// MOVT_D64
    536895402U,	// MOVT_I
    536895402U,	// MOVT_I64
    536895402U,	// MOVT_I_MM
    536895057U,	// MOVT_S
    536895057U,	// MOVT_S_MM
    536891634U,	// MOVZ_I64_D64
    536897666U,	// MOVZ_I64_I
    536897666U,	// MOVZ_I64_I64
    536895158U,	// MOVZ_I64_S
    536891634U,	// MOVZ_I_D32
    536891634U,	// MOVZ_I_D32_MM
    536891634U,	// MOVZ_I_D64
    536897666U,	// MOVZ_I_I
    536897666U,	// MOVZ_I_I64
    536897666U,	// MOVZ_I_MM
    536895158U,	// MOVZ_I_S
    536895158U,	// MOVZ_I_S_MM
    536897666U,	// MOVZ_NM
    18513U,	// MSUB
    570444615U,	// MSUBF_D
    570444615U,	// MSUBF_D_MMR6
    570449122U,	// MSUBF_S
    570449122U,	// MSUBF_S_MMR6
    570446694U,	// MSUBR_Q_H
    570450851U,	// MSUBR_Q_W
    24514U,	// MSUBU
    536895426U,	// MSUBU_DSP
    536895426U,	// MSUBU_DSP_MM
    24514U,	// MSUBU_MM
    570443404U,	// MSUBV_B
    570445914U,	// MSUBV_D
    570447295U,	// MSUBV_H
    570451808U,	// MSUBV_W
    536889889U,	// MSUB_D32
    536889889U,	// MSUB_D32_MM
    536889889U,	// MSUB_D64
    536889425U,	// MSUB_DSP
    536889425U,	// MSUB_DSP_MM
    18513U,	// MSUB_MM
    570446665U,	// MSUB_Q_H
    570450822U,	// MSUB_Q_W
    536894547U,	// MSUB_S
    536894547U,	// MSUB_S_MM
    2752561213U,	// MTC0
    16445U,	// MTC0Sel_NM
    2752561213U,	// MTC0_MMR6
    536887357U,	// MTC0_NM
    17875082U,	// MTC1
    17875082U,	// MTC1_D64
    17875082U,	// MTC1_D64_MM
    17875082U,	// MTC1_MM
    17875082U,	// MTC1_MMR6
    2752561506U,	// MTC2
    17875298U,	// MTC2_MMR6
    2752561191U,	// MTGC0
    2752561191U,	// MTGC0_MM
    16437U,	// MTHC0Sel_NM
    2752561205U,	// MTHC0_MMR6
    536887349U,	// MTHC0_NM
    17924220U,	// MTHC1_D32
    17924220U,	// MTHC1_D32_MM
    17924220U,	// MTHC1_D64
    17924220U,	// MTHC1_D64_MM
    17875284U,	// MTHC2_MMR6
    2752561182U,	// MTHGC0
    2752561182U,	// MTHGC0_MM
    546956U,	// MTHI
    546956U,	// MTHI64
    17881228U,	// MTHI_DSP
    17881228U,	// MTHI_DSP_MM
    546956U,	// MTHI_MM
    17881816U,	// MTHLIP
    17881816U,	// MTHLIP_MM
    547499U,	// MTLO
    547499U,	// MTLO64
    17881771U,	// MTLO_DSP
    17881771U,	// MTLO_DSP_MM
    547499U,	// MTLO_MM
    540745U,	// MTM0
    540870U,	// MTM1
    541044U,	// MTM2
    540751U,	// MTP0
    540876U,	// MTP1
    541050U,	// MTP2
    68213803U,	// MTTR
    68213803U,	// MTTR_NM
    536893525U,	// MUH
    536895498U,	// MUHU
    536895498U,	// MUHU_MMR6
    536895498U,	// MUHU_NM
    536893525U,	// MUH_MMR6
    536893525U,	// MUH_NM
    536893991U,	// MUL
    536893991U,	// MUL4x4_NM
    536893872U,	// MULEQ_S_W_PHL
    536893872U,	// MULEQ_S_W_PHL_MM
    536894437U,	// MULEQ_S_W_PHR
    536894437U,	// MULEQ_S_W_PHR_MM
    536893749U,	// MULEU_S_PH_QBL
    536893749U,	// MULEU_S_PH_QBL_MM
    536894339U,	// MULEU_S_PH_QBR
    536894339U,	// MULEU_S_PH_QBR_MM
    536893279U,	// MULQ_RS_PH
    536893279U,	// MULQ_RS_PH_MM
    536896969U,	// MULQ_RS_W
    536896969U,	// MULQ_RS_W_MMR2
    536893223U,	// MULQ_S_PH
    536893223U,	// MULQ_S_PH_MMR2
    536896828U,	// MULQ_S_W
    536896828U,	// MULQ_S_W_MMR2
    536895256U,	// MULR_PS64
    536892284U,	// MULR_Q_H
    536896441U,	// MULR_Q_W
    536893425U,	// MULSAQ_S_W_PH
    536893425U,	// MULSAQ_S_W_PH_MM
    536893400U,	// MULSA_W_PH
    536893400U,	// MULSA_W_PH_MMR2
    24462U,	// MULT
    536895618U,	// MULTU_DSP
    536895618U,	// MULTU_DSP_MM
    536895374U,	// MULT_DSP
    536895374U,	// MULT_DSP_MM
    24462U,	// MULT_MM
    24706U,	// MULTu
    24706U,	// MULTu_MM
    536895535U,	// MULU
    536895535U,	// MULU_MMR6
    536895535U,	// MULU_NM
    536889008U,	// MULV_B
    536891526U,	// MULV_D
    536892899U,	// MULV_H
    536897420U,	// MULV_W
    536893991U,	// MUL_MM
    536893991U,	// MUL_MMR6
    536893991U,	// MUL_NM
    536893096U,	// MUL_PH
    536893096U,	// MUL_PH_MMR2
    536892253U,	// MUL_Q_H
    536896410U,	// MUL_Q_W
    536893991U,	// MUL_R6
    536893191U,	// MUL_S_PH
    536893191U,	// MUL_S_PH_MMR2
    546950U,	// Mfhi16
    547486U,	// Mflo16
    20983U,	// Move32R16
    20983U,	// MoveR3216
    17327U,	// NLOC_B
    18994U,	// NLOC_D
    21066U,	// NLOC_H
    24956U,	// NLOC_W
    17343U,	// NLZC_B
    19002U,	// NLZC_D
    21082U,	// NLZC_H
    24964U,	// NLZC_W
    536889939U,	// NMADD_D32
    536889939U,	// NMADD_D32_MM
    536889939U,	// NMADD_D64
    536894564U,	// NMADD_S
    536894564U,	// NMADD_S_MM
    536889897U,	// NMSUB_D32
    536889897U,	// NMSUB_D32_MM
    536889897U,	// NMSUB_D64
    536894546U,	// NMSUB_S
    536894546U,	// NMSUB_S_MM
    10802U,	// NOP32_NM
    11006U,	// NOP_NM
    536894462U,	// NOR
    536894462U,	// NOR64
    536888416U,	// NORI_B
    536894462U,	// NOR_MM
    536894462U,	// NOR_MMR6
    536894462U,	// NOR_NM
    536895667U,	// NOR_V
    16966U,	// NOT16_MM
    16966U,	// NOT16_MMR6
    24478U,	// NOT16_NM
    21017U,	// NegRxRy16
    24478U,	// NotRxRy16
    536894463U,	// OR
    20021815U,	// OR16_MM
    20021815U,	// OR16_MMR6
    536894463U,	// OR16_NM
    536894463U,	// OR64
    536888417U,	// ORI_B
    536893624U,	// ORI_MMR6
    536893624U,	// ORI_NM
    536894463U,	// OR_MM
    536894463U,	// OR_MMR6
    536894463U,	// OR_NM
    536895668U,	// OR_V
    536893624U,	// ORi
    536893624U,	// ORi64
    536893624U,	// ORi_MM
    33577983U,	// OrRxRxRy16
    536893085U,	// PACKRL_PH
    536893085U,	// PACKRL_PH_MM
    10939U,	// PAUSE
    10939U,	// PAUSE_MM
    10939U,	// PAUSE_MMR6
    10939U,	// PAUSE_NM
    536888990U,	// PCKEV_B
    536891500U,	// PCKEV_D
    536892881U,	// PCKEV_H
    536897394U,	// PCKEV_W
    536888270U,	// PCKOD_B
    536889955U,	// PCKOD_D
    536892009U,	// PCKOD_H
    536895917U,	// PCKOD_W
    17862U,	// PCNT_B
    20260U,	// PCNT_D
    21701U,	// PCNT_H
    26152U,	// PCNT_W
    536893049U,	// PICK_PH
    536893049U,	// PICK_PH_MM
    536889149U,	// PICK_QB
    536889149U,	// PICK_QB_MM
    536895223U,	// PLL_PS64
    536895265U,	// PLU_PS64
    23270U,	// POP
    22868U,	// PRECEQU_PH_QBL
    17200U,	// PRECEQU_PH_QBLA
    17200U,	// PRECEQU_PH_QBLA_MM
    22868U,	// PRECEQU_PH_QBL_MM
    23458U,	// PRECEQU_PH_QBR
    17238U,	// PRECEQU_PH_QBRA
    17238U,	// PRECEQU_PH_QBRA_MM
    23458U,	// PRECEQU_PH_QBR_MM
    22933U,	// PRECEQ_W_PHL
    22933U,	// PRECEQ_W_PHL_MM
    23498U,	// PRECEQ_W_PHR
    23498U,	// PRECEQ_W_PHR_MM
    22853U,	// PRECEU_PH_QBL
    17184U,	// PRECEU_PH_QBLA
    17184U,	// PRECEU_PH_QBLA_MM
    22853U,	// PRECEU_PH_QBL_MM
    23443U,	// PRECEU_PH_QBR
    17222U,	// PRECEU_PH_QBRA
    17222U,	// PRECEU_PH_QBRA_MM
    23443U,	// PRECEU_PH_QBR_MM
    536893001U,	// PRECRQU_S_QB_PH
    536893001U,	// PRECRQU_S_QB_PH_MM
    536896060U,	// PRECRQ_PH_W
    536896060U,	// PRECRQ_PH_W_MM
    536892974U,	// PRECRQ_QB_PH
    536892974U,	// PRECRQ_QB_PH_MM
    536896091U,	// PRECRQ_RS_PH_W
    536896091U,	// PRECRQ_RS_PH_W_MM
    536892988U,	// PRECR_QB_PH
    536892988U,	// PRECR_QB_PH_MMR2
    536896044U,	// PRECR_SRA_PH_W
    536896044U,	// PRECR_SRA_PH_W_MMR2
    536896073U,	// PRECR_SRA_R_PH_W
    536896073U,	// PRECR_SRA_R_PH_W_MMR2
    5411341U,	// PREF
    5411179U,	// PREFE
    5411179U,	// PREFE_MM
    473081863U,	// PREFX_MM
    5411341U,	// PREF_MM
    5411341U,	// PREF_MMR6
    50516493U,	// PREF_NM
    5411341U,	// PREF_R6
    50516493U,	// PREFs9_NM
    536891705U,	// PREPEND
    536891705U,	// PREPEND_MMR2
    536895239U,	// PUL_PS64
    536895273U,	// PUU_PS64
    18489U,	// RADDU_W_QB
    18489U,	// RADDU_W_QB_MM
    234904343U,	// RDDSP
    218127127U,	// RDDSP_MM
    536894513U,	// RDHWR
    536894513U,	// RDHWR64
    536894513U,	// RDHWR_MM
    536894513U,	// RDHWR_MMR6
    536894513U,	// RDHWR_NM
    23566U,	// RDPGPR_MMR6
    23566U,	// RDPGPR_NM
    19656U,	// RECIP_D32
    19656U,	// RECIP_D32_MM
    19656U,	// RECIP_D64
    19656U,	// RECIP_D64_MM
    23944U,	// RECIP_S
    23944U,	// RECIP_S_MM
    22428U,	// REPLV_PH
    22428U,	// REPLV_PH_MM
    18469U,	// REPLV_QB
    18469U,	// REPLV_QB_MM
    22155U,	// REPL_PH
    22155U,	// REPL_PH_MM
    486557519U,	// REPL_QB
    486557519U,	// REPL_QB_MM
    248088U,	// RESTOREJRC16_NM
    264472U,	// RESTOREJRC_NM
    266704U,	// RESTORE_NM
    20269U,	// RINT_D
    20269U,	// RINT_D_MMR6
    24128U,	// RINT_S
    24128U,	// RINT_S_MMR6
    536894501U,	// ROTR
    536895774U,	// ROTRV
    536895774U,	// ROTRV_MM
    536895774U,	// ROTRV_NM
    536894501U,	// ROTR_MM
    536894501U,	// ROTR_NM
    536897566U,	// ROTX_NM
    19465U,	// ROUND_L_D64
    19465U,	// ROUND_L_D_MMR6
    23836U,	// ROUND_L_S
    23836U,	// ROUND_L_S_MMR6
    20640U,	// ROUND_W_D32
    20640U,	// ROUND_W_D64
    20640U,	// ROUND_W_D_MMR6
    20640U,	// ROUND_W_MM
    24178U,	// ROUND_W_S
    24178U,	// ROUND_W_S_MM
    24178U,	// ROUND_W_S_MMR6
    20297U,	// RSQRT_D32
    20297U,	// RSQRT_D32_MM
    20297U,	// RSQRT_D64
    20297U,	// RSQRT_D64_MM
    24136U,	// RSQRT_S
    24136U,	// RSQRT_S_MM
    0U,	// Restore16
    0U,	// RestoreX16
    8405787U,	// SAA
    8409346U,	// SAAD
    536888699U,	// SAT_S_B
    536890945U,	// SAT_S_D
    536892527U,	// SAT_S_H
    536896878U,	// SAT_S_W
    536888926U,	// SAT_U_B
    536891424U,	// SAT_U_D
    536892817U,	// SAT_U_H
    536897308U,	// SAT_U_W
    250353U,	// SAVE16_NM
    266737U,	// SAVE_NM
    50350149U,	// SB
    50348458U,	// SB16_MM
    50348458U,	// SB16_MMR6
    50350149U,	// SB16_NM
    50350149U,	// SB64
    50352473U,	// SBE
    50352473U,	// SBE_MM
    50350149U,	// SBGP_NM
    50358274U,	// SBX_NM
    50350149U,	// SB_MM
    50350149U,	// SB_MMR6
    50350149U,	// SB_NM
    50350149U,	// SBs9_NM
    8964399U,	// SC
    8964399U,	// SC64
    8964399U,	// SC64_R6
    8966417U,	// SCD
    8966417U,	// SCD_R6
    8966494U,	// SCE
    8966494U,	// SCE_MM
    606136636U,	// SCWP_NM
    8964399U,	// SC_MM
    8964399U,	// SC_MMR6
    8964399U,	// SC_NM
    8964399U,	// SC_R6
    50352464U,	// SD
    285378U,	// SDBBP
    148007U,	// SDBBP16_MM
    148007U,	// SDBBP16_MMR6
    547522U,	// SDBBP16_NM
    662210U,	// SDBBP_MM
    285378U,	// SDBBP_MMR6
    547522U,	// SDBBP_NM
    285378U,	// SDBBP_R6
    50348130U,	// SDC1
    50348130U,	// SDC164
    50348130U,	// SDC1_D64_MMR6
    50348130U,	// SDC1_MM_D32
    50348130U,	// SDC1_MM_D64
    50348346U,	// SDC2
    50348346U,	// SDC2_MMR6
    50348346U,	// SDC2_R6
    50348431U,	// SDC3
    26787U,	// SDIV
    26787U,	// SDIV_MM
    50354537U,	// SDL
    50355127U,	// SDR
    3254796451U,	// SDXC1
    3254796451U,	// SDXC164
    18134U,	// SEB
    18134U,	// SEB64
    18134U,	// SEB_MM
    18134U,	// SEB_NM
    22037U,	// SEH
    22037U,	// SEH64
    22037U,	// SEH_MM
    22037U,	// SEH_NM
    536897639U,	// SELEQZ
    536897639U,	// SELEQZ64
    536891624U,	// SELEQZ_D
    536891624U,	// SELEQZ_D_MMR6
    536897639U,	// SELEQZ_MMR6
    536895148U,	// SELEQZ_S
    536895148U,	// SELEQZ_S_MMR6
    536897612U,	// SELNEZ
    536897612U,	// SELNEZ64
    536891607U,	// SELNEZ_D
    536891607U,	// SELNEZ_D_MMR6
    536897612U,	// SELNEZ_MMR6
    536895138U,	// SELNEZ_S
    536895138U,	// SELNEZ_S_MMR6
    570444850U,	// SEL_D
    570444850U,	// SEL_D_MMR6
    570449221U,	// SEL_S
    570449221U,	// SEL_S_MMR6
    536894305U,	// SEQ
    536893611U,	// SEQI_NM
    536893611U,	// SEQi
    50354251U,	// SH
    50348510U,	// SH16_MM
    50348510U,	// SH16_MMR6
    50354251U,	// SH16_NM
    50354251U,	// SH64
    50352525U,	// SHE
    50352525U,	// SHE_MM
    536888298U,	// SHF_B
    536892037U,	// SHF_H
    536896029U,	// SHF_W
    50354251U,	// SHGP_NM
    23204U,	// SHILO
    24832U,	// SHILOV
    24832U,	// SHILOV_MM
    23204U,	// SHILO_MM
    536893330U,	// SHLLV_PH
    536893330U,	// SHLLV_PH_MM
    536889371U,	// SHLLV_QB
    536889371U,	// SHLLV_QB_MM
    536893267U,	// SHLLV_S_PH
    536893267U,	// SHLLV_S_PH_MM
    536896939U,	// SHLLV_S_W
    536896939U,	// SHLLV_S_W_MM
    536893058U,	// SHLL_PH
    536893058U,	// SHLL_PH_MM
    536889158U,	// SHLL_QB
    536889158U,	// SHLL_QB_MM
    536893180U,	// SHLL_S_PH
    536893180U,	// SHLL_S_PH_MM
    536896779U,	// SHLL_S_W
    536896779U,	// SHLL_S_W_MM
    536893320U,	// SHRAV_PH
    536893320U,	// SHRAV_PH_MM
    536889361U,	// SHRAV_QB
    536889361U,	// SHRAV_QB_MMR2
    536893168U,	// SHRAV_R_PH
    536893168U,	// SHRAV_R_PH_MM
    536889259U,	// SHRAV_R_QB
    536889259U,	// SHRAV_R_QB_MMR2
    536896534U,	// SHRAV_R_W
    536896534U,	// SHRAV_R_W_MM
    536892965U,	// SHRA_PH
    536892965U,	// SHRA_PH_MM
    536889081U,	// SHRA_QB
    536889081U,	// SHRA_QB_MMR2
    536893133U,	// SHRA_R_PH
    536893133U,	// SHRA_R_PH_MM
    536889224U,	// SHRA_R_QB
    536889224U,	// SHRA_R_QB_MMR2
    536896492U,	// SHRA_R_W
    536896492U,	// SHRA_R_W_MM
    536893350U,	// SHRLV_PH
    536893350U,	// SHRLV_PH_MMR2
    536889391U,	// SHRLV_QB
    536889391U,	// SHRLV_QB_MM
    536893076U,	// SHRL_PH
    536893076U,	// SHRL_PH_MMR2
    536889176U,	// SHRL_QB
    536889176U,	// SHRL_QB_MM
    50356047U,	// SHXS_NM
    50358291U,	// SHX_NM
    50354251U,	// SH_MM
    50354251U,	// SH_MMR6
    50354251U,	// SH_NM
    50354251U,	// SHs9_NM
    299410U,	// SIGRIE
    299410U,	// SIGRIE_MMR6
    545170U,	// SIGRIE_NM
    1107313665U,	// SLDI_B
    1107315585U,	// SLDI_D
    1107317404U,	// SLDI_H
    1107321477U,	// SLDI_W
    1107313607U,	// SLD_B
    1107315292U,	// SLD_D
    1107317346U,	// SLD_H
    1107321254U,	// SLD_W
    536893924U,	// SLL
    536887811U,	// SLL16_MM
    536887811U,	// SLL16_MMR6
    536893924U,	// SLL16_NM
    1073764836U,	// SLL64_32
    1073764836U,	// SLL64_64
    536888355U,	// SLLI_B
    536890258U,	// SLLI_D
    536892077U,	// SLLI_H
    536896150U,	// SLLI_W
    536895731U,	// SLLV
    536895731U,	// SLLV_MM
    536895731U,	// SLLV_NM
    536888504U,	// SLL_B
    536890442U,	// SLL_D
    536892193U,	// SLL_H
    536893924U,	// SLL_MM
    536893924U,	// SLL_MMR6
    536893924U,	// SLL_NM
    536896292U,	// SLL_W
    536895363U,	// SLT
    536895363U,	// SLT64
    536895519U,	// SLTIU_NM
    536893635U,	// SLTI_NM
    536895605U,	// SLTU_NM
    536895363U,	// SLT_MM
    536895363U,	// SLT_NM
    536893635U,	// SLTi
    536893635U,	// SLTi64
    536893635U,	// SLTi_MM
    536895519U,	// SLTiu
    536895519U,	// SLTiu64
    536895519U,	// SLTiu_MM
    536895605U,	// SLTu
    536895605U,	// SLTu64
    536895605U,	// SLTu_MM
    536891834U,	// SNE
    536893556U,	// SNEi
    536895752U,	// SOV_NM
    1073759354U,	// SPLATI_B
    1073761241U,	// SPLATI_D
    1073763060U,	// SPLATI_H
    1073767133U,	// SPLATI_W
    1073759669U,	// SPLAT_B
    1073761954U,	// SPLAT_D
    1073763508U,	// SPLAT_H
    1073767925U,	// SPLAT_W
    536888168U,	// SRA
    536888313U,	// SRAI_B
    536890233U,	// SRAI_D
    536892052U,	// SRAI_H
    536896125U,	// SRAI_W
    536888389U,	// SRARI_B
    536890292U,	// SRARI_D
    536892111U,	// SRARI_H
    536896184U,	// SRARI_W
    536888542U,	// SRAR_B
    536890681U,	// SRAR_D
    536892308U,	// SRAR_H
    536896556U,	// SRAR_W
    536895710U,	// SRAV
    536895710U,	// SRAV_MM
    536895710U,	// SRAV_NM
    536888232U,	// SRA_B
    536889865U,	// SRA_D
    536891971U,	// SRA_H
    536888168U,	// SRA_MM
    536888168U,	// SRA_NM
    536895844U,	// SRA_W
    536893952U,	// SRL
    536887818U,	// SRL16_MM
    536887818U,	// SRL16_MMR6
    536893952U,	// SRL16_NM
    536888363U,	// SRLI_B
    536890266U,	// SRLI_D
    536892085U,	// SRLI_H
    536896158U,	// SRLI_W
    536888407U,	// SRLRI_B
    536890310U,	// SRLRI_D
    536892129U,	// SRLRI_H
    536896202U,	// SRLRI_W
    536888558U,	// SRLR_B
    536890697U,	// SRLR_D
    536892324U,	// SRLR_H
    536896572U,	// SRLR_W
    536895738U,	// SRLV
    536895738U,	// SRLV_MM
    536895738U,	// SRLV_NM
    536888511U,	// SRL_B
    536890467U,	// SRL_D
    536892200U,	// SRL_H
    536893952U,	// SRL_MM
    536893952U,	// SRL_NM
    536896317U,	// SRL_W
    11004U,	// SSNOP
    11004U,	// SSNOP_MM
    11004U,	// SSNOP_MMR6
    50349528U,	// ST_B
    50351954U,	// ST_D
    50353367U,	// ST_H
    50357846U,	// ST_W
    536889420U,	// SUB
    536893029U,	// SUBQH_PH
    536893029U,	// SUBQH_PH_MMR2
    536893144U,	// SUBQH_R_PH
    536893144U,	// SUBQH_R_PH_MMR2
    536896502U,	// SUBQH_R_W
    536896502U,	// SUBQH_R_W_MMR2
    536896107U,	// SUBQH_W
    536896107U,	// SUBQH_W_MMR2
    536893104U,	// SUBQ_PH
    536893104U,	// SUBQ_PH_MM
    536893201U,	// SUBQ_S_PH
    536893201U,	// SUBQ_S_PH_MM
    536896808U,	// SUBQ_S_W
    536896808U,	// SUBQ_S_W_MM
    536888914U,	// SUBSUS_U_B
    536891412U,	// SUBSUS_U_D
    536892805U,	// SUBSUS_U_H
    536897296U,	// SUBSUS_U_W
    536888717U,	// SUBSUU_S_B
    536890985U,	// SUBSUU_S_D
    536892545U,	// SUBSUU_S_H
    536896918U,	// SUBSUU_S_W
    536888679U,	// SUBS_S_B
    536890925U,	// SUBS_S_D
    536892507U,	// SUBS_S_H
    536896858U,	// SUBS_S_W
    536888894U,	// SUBS_U_B
    536891392U,	// SUBS_U_D
    536892785U,	// SUBS_U_H
    536897276U,	// SUBS_U_W
    536887892U,	// SUBU16_MM
    536887892U,	// SUBU16_MMR6
    536889129U,	// SUBUH_QB
    536889129U,	// SUBUH_QB_MMR2
    536889235U,	// SUBUH_R_QB
    536889235U,	// SUBUH_R_QB_MMR2
    536895420U,	// SUBU_MMR6
    536893302U,	// SUBU_PH
    536893302U,	// SUBU_PH_MMR2
    536889343U,	// SUBU_QB
    536889343U,	// SUBU_QB_MM
    536893245U,	// SUBU_S_PH
    536893245U,	// SUBU_S_PH_MMR2
    536889282U,	// SUBU_S_QB
    536889282U,	// SUBU_S_QB_MM
    536888461U,	// SUBVI_B
    536890348U,	// SUBVI_D
    536892167U,	// SUBVI_H
    536896240U,	// SUBVI_W
    536888973U,	// SUBV_B
    536891483U,	// SUBV_D
    536892864U,	// SUBV_H
    536897377U,	// SUBV_W
    536889420U,	// SUB_MM
    536889420U,	// SUB_MMR6
    536889420U,	// SUB_NM
    536895420U,	// SUBu
    536895420U,	// SUBu16_NM
    536895420U,	// SUBu_MM
    536895420U,	// SUBu_NM
    3254796465U,	// SUXC1
    3254796465U,	// SUXC164
    3254796465U,	// SUXC1_MM
    50358235U,	// SW
    50348657U,	// SW16_MM
    50348657U,	// SW16_MMR6
    50358235U,	// SW16_NM
    50358235U,	// SW4x4_NM
    50358235U,	// SW64
    50348182U,	// SWC1
    50348182U,	// SWC1_MM
    50348398U,	// SWC2
    50348398U,	// SWC2_MMR6
    50348398U,	// SWC2_R6
    50348443U,	// SWC3
    50358235U,	// SWDSP
    50358235U,	// SWDSP_MM
    50352642U,	// SWE
    50352642U,	// SWE_MM
    50358235U,	// SWGP16_NM
    50358235U,	// SWGP_NM
    50354751U,	// SWL
    50354751U,	// SWL64
    50352559U,	// SWLE
    50352559U,	// SWLE_MM
    50354751U,	// SWL_MM
    66072U,	// SWM16_MM
    66072U,	// SWM16_MMR6
    65812U,	// SWM32_MM
    587225725U,	// SWM_NM
    419449100U,	// SWPC_NM
    453008215U,	// SWP_MM
    50355261U,	// SWR
    50355261U,	// SWR64
    50352607U,	// SWRE
    50352607U,	// SWRE_MM
    50355261U,	// SWR_MM
    50358235U,	// SWSP16_NM
    50355004U,	// SWSP_MM
    50358235U,	// SWSP_MMR6
    3254796479U,	// SWXC1
    3254796479U,	// SWXC1_MM
    50356066U,	// SWXS_NM
    50358325U,	// SWX_NM
    50358235U,	// SW_MM
    50358235U,	// SW_MMR6
    50358235U,	// SW_NM
    50358235U,	// SWs9_NM
    714997U,	// SYNC
    317530U,	// SYNCI
    317530U,	// SYNCI_MM
    317530U,	// SYNCI_MMR6
    317530U,	// SYNCI_NM
    317530U,	// SYNCIs9_NM
    714997U,	// SYNC_MM
    706779U,	// SYNC_MMR6
    706779U,	// SYNC_NM
    285128U,	// SYSCALL
    547272U,	// SYSCALL16_NM
    661960U,	// SYSCALL_MM
    547272U,	// SYSCALL_NM
    0U,	// Save16
    0U,	// SaveX16
    50350149U,	// SbRxRyOffMemX16
    551048U,	// SebRx16
    551054U,	// SehRx16
    50354251U,	// ShRxRyOffMemX16
    536893924U,	// SllX16
    33579251U,	// SllvRxRy16
    24451U,	// SltRxRy16
    1610635459U,	// SltiRxImm16
    22723U,	// SltiRxImmX16
    1610637343U,	// SltiuRxImm16
    24607U,	// SltiuRxImmX16
    24693U,	// SltuRxRy16
    536888168U,	// SraX16
    33579230U,	// SravRxRy16
    536893952U,	// SrlX16
    33579258U,	// SrlvRxRy16
    536895420U,	// SubuRxRyRz16
    50358235U,	// SwRxRyOffMemX16
    50358235U,	// SwRxSpImmX16
    536894310U,	// TEQ
    22705U,	// TEQI
    22705U,	// TEQI_MM
    536894310U,	// TEQ_MM
    536894310U,	// TEQ_NM
    536891772U,	// TGE
    22638U,	// TGEI
    24600U,	// TGEIU
    24600U,	// TGEIU_MM
    22638U,	// TGEI_MM
    536895473U,	// TGEU
    536895473U,	// TGEU_MM
    536891772U,	// TGE_MM
    11052U,	// TLBGINV
    10953U,	// TLBGINVF
    10953U,	// TLBGINVF_MM
    11052U,	// TLBGINV_MM
    10998U,	// TLBGP
    10998U,	// TLBGP_MM
    11015U,	// TLBGR
    11015U,	// TLBGR_MM
    10968U,	// TLBGWI
    10968U,	// TLBGWI_MM
    11027U,	// TLBGWR
    11027U,	// TLBGWR_MM
    11045U,	// TLBINV
    10945U,	// TLBINVF
    10945U,	// TLBINVF_MMR6
    10945U,	// TLBINVF_NM
    11045U,	// TLBINV_MMR6
    11045U,	// TLBINV_NM
    10993U,	// TLBP
    10993U,	// TLBP_MM
    10993U,	// TLBP_NM
    11010U,	// TLBR
    11010U,	// TLBR_MM
    11010U,	// TLBR_NM
    10962U,	// TLBWI
    10962U,	// TLBWI_MM
    10962U,	// TLBWI_NM
    11021U,	// TLBWR
    11021U,	// TLBWR_MM
    11021U,	// TLBWR_NM
    536895368U,	// TLT
    22729U,	// TLTI
    24614U,	// TLTIU_MM
    22729U,	// TLTI_MM
    536895611U,	// TLTU
    536895611U,	// TLTU_MM
    536895368U,	// TLT_MM
    536891839U,	// TNE
    22650U,	// TNEI
    22650U,	// TNEI_MM
    536891839U,	// TNE_MM
    536891839U,	// TNE_NM
    19454U,	// TRUNC_L_D64
    19454U,	// TRUNC_L_D_MMR6
    23825U,	// TRUNC_L_S
    23825U,	// TRUNC_L_S_MMR6
    20629U,	// TRUNC_W_D32
    20629U,	// TRUNC_W_D64
    20629U,	// TRUNC_W_D_MMR6
    20629U,	// TRUNC_W_MM
    24167U,	// TRUNC_W_S
    24167U,	// TRUNC_W_S_MM
    24167U,	// TRUNC_W_S_MMR6
    24614U,	// TTLTIU
    50353690U,	// UALH_NM
    587225716U,	// UALWM_NM
    50358211U,	// UALW_NM
    50354249U,	// UASH_NM
    587225723U,	// UASWM_NM
    50358233U,	// UASW_NM
    26773U,	// UDIV
    26773U,	// UDIV_MM
    536895533U,	// V3MULU
    536887363U,	// VMM0
    536895548U,	// VMULU
    570442729U,	// VSHF_B
    570444633U,	// VSHF_D
    570446468U,	// VSHF_H
    570450460U,	// VSHF_W
    11040U,	// WAIT
    663416U,	// WAIT_MM
    663416U,	// WAIT_MMR6
    663416U,	// WAIT_NM
    234904350U,	// WRDSP
    218127134U,	// WRDSP_MM
    23574U,	// WRPGPR_MMR6
    23574U,	// WRPGPR_NM
    22022U,	// WSBH
    22022U,	// WSBH_MM
    22022U,	// WSBH_MMR6
    536894473U,	// XOR
    20021814U,	// XOR16_MM
    20021814U,	// XOR16_MMR6
    536894473U,	// XOR16_NM
    536894473U,	// XOR64
    536888424U,	// XORI_B
    536893623U,	// XORI_MMR6
    536893623U,	// XORI_NM
    536894473U,	// XOR_MM
    536894473U,	// XOR_MMR6
    536894473U,	// XOR_NM
    536895674U,	// XOR_V
    536893623U,	// XORi
    536893623U,	// XORi64
    536893623U,	// XORi_MM
    33577993U,	// XorRxRxRy16
    20776U,	// YIELD
    20776U,	// YIELD_NM
  };

  static const uint16_t OpInfo1[] = {
    0U,	// PHI
    0U,	// INLINEASM
    0U,	// INLINEASM_BR
    0U,	// CFI_INSTRUCTION
    0U,	// EH_LABEL
    0U,	// GC_LABEL
    0U,	// ANNOTATION_LABEL
    0U,	// KILL
    0U,	// EXTRACT_SUBREG
    0U,	// INSERT_SUBREG
    0U,	// IMPLICIT_DEF
    0U,	// SUBREG_TO_REG
    0U,	// COPY_TO_REGCLASS
    0U,	// DBG_VALUE
    0U,	// DBG_VALUE_LIST
    0U,	// DBG_INSTR_REF
    0U,	// DBG_PHI
    0U,	// DBG_LABEL
    0U,	// REG_SEQUENCE
    0U,	// COPY
    0U,	// BUNDLE
    0U,	// LIFETIME_START
    0U,	// LIFETIME_END
    0U,	// PSEUDO_PROBE
    0U,	// ARITH_FENCE
    0U,	// STACKMAP
    0U,	// FENTRY_CALL
    0U,	// PATCHPOINT
    0U,	// LOAD_STACK_GUARD
    0U,	// PREALLOCATED_SETUP
    0U,	// PREALLOCATED_ARG
    0U,	// STATEPOINT
    0U,	// LOCAL_ESCAPE
    0U,	// FAULTING_OP
    0U,	// PATCHABLE_OP
    0U,	// PATCHABLE_FUNCTION_ENTER
    0U,	// PATCHABLE_RET
    0U,	// PATCHABLE_FUNCTION_EXIT
    0U,	// PATCHABLE_TAIL_CALL
    0U,	// PATCHABLE_EVENT_CALL
    0U,	// PATCHABLE_TYPED_EVENT_CALL
    0U,	// ICALL_BRANCH_FUNNEL
    0U,	// MEMBARRIER
    0U,	// JUMP_TABLE_DEBUG_INFO
    0U,	// G_ASSERT_SEXT
    0U,	// G_ASSERT_ZEXT
    0U,	// G_ASSERT_ALIGN
    0U,	// G_ADD
    0U,	// G_SUB
    0U,	// G_MUL
    0U,	// G_SDIV
    0U,	// G_UDIV
    0U,	// G_SREM
    0U,	// G_UREM
    0U,	// G_SDIVREM
    0U,	// G_UDIVREM
    0U,	// G_AND
    0U,	// G_OR
    0U,	// G_XOR
    0U,	// G_IMPLICIT_DEF
    0U,	// G_PHI
    0U,	// G_FRAME_INDEX
    0U,	// G_GLOBAL_VALUE
    0U,	// G_CONSTANT_POOL
    0U,	// G_EXTRACT
    0U,	// G_UNMERGE_VALUES
    0U,	// G_INSERT
    0U,	// G_MERGE_VALUES
    0U,	// G_BUILD_VECTOR
    0U,	// G_BUILD_VECTOR_TRUNC
    0U,	// G_CONCAT_VECTORS
    0U,	// G_PTRTOINT
    0U,	// G_INTTOPTR
    0U,	// G_BITCAST
    0U,	// G_FREEZE
    0U,	// G_CONSTANT_FOLD_BARRIER
    0U,	// G_INTRINSIC_FPTRUNC_ROUND
    0U,	// G_INTRINSIC_TRUNC
    0U,	// G_INTRINSIC_ROUND
    0U,	// G_INTRINSIC_LRINT
    0U,	// G_INTRINSIC_ROUNDEVEN
    0U,	// G_READCYCLECOUNTER
    0U,	// G_LOAD
    0U,	// G_SEXTLOAD
    0U,	// G_ZEXTLOAD
    0U,	// G_INDEXED_LOAD
    0U,	// G_INDEXED_SEXTLOAD
    0U,	// G_INDEXED_ZEXTLOAD
    0U,	// G_STORE
    0U,	// G_INDEXED_STORE
    0U,	// G_ATOMIC_CMPXCHG_WITH_SUCCESS
    0U,	// G_ATOMIC_CMPXCHG
    0U,	// G_ATOMICRMW_XCHG
    0U,	// G_ATOMICRMW_ADD
    0U,	// G_ATOMICRMW_SUB
    0U,	// G_ATOMICRMW_AND
    0U,	// G_ATOMICRMW_NAND
    0U,	// G_ATOMICRMW_OR
    0U,	// G_ATOMICRMW_XOR
    0U,	// G_ATOMICRMW_MAX
    0U,	// G_ATOMICRMW_MIN
    0U,	// G_ATOMICRMW_UMAX
    0U,	// G_ATOMICRMW_UMIN
    0U,	// G_ATOMICRMW_FADD
    0U,	// G_ATOMICRMW_FSUB
    0U,	// G_ATOMICRMW_FMAX
    0U,	// G_ATOMICRMW_FMIN
    0U,	// G_ATOMICRMW_UINC_WRAP
    0U,	// G_ATOMICRMW_UDEC_WRAP
    0U,	// G_FENCE
    0U,	// G_PREFETCH
    0U,	// G_BRCOND
    0U,	// G_BRINDIRECT
    0U,	// G_INVOKE_REGION_START
    0U,	// G_INTRINSIC
    0U,	// G_INTRINSIC_W_SIDE_EFFECTS
    0U,	// G_INTRINSIC_CONVERGENT
    0U,	// G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
    0U,	// G_ANYEXT
    0U,	// G_TRUNC
    0U,	// G_CONSTANT
    0U,	// G_FCONSTANT
    0U,	// G_VASTART
    0U,	// G_VAARG
    0U,	// G_SEXT
    0U,	// G_SEXT_INREG
    0U,	// G_ZEXT
    0U,	// G_SHL
    0U,	// G_LSHR
    0U,	// G_ASHR
    0U,	// G_FSHL
    0U,	// G_FSHR
    0U,	// G_ROTR
    0U,	// G_ROTL
    0U,	// G_ICMP
    0U,	// G_FCMP
    0U,	// G_SELECT
    0U,	// G_UADDO
    0U,	// G_UADDE
    0U,	// G_USUBO
    0U,	// G_USUBE
    0U,	// G_SADDO
    0U,	// G_SADDE
    0U,	// G_SSUBO
    0U,	// G_SSUBE
    0U,	// G_UMULO
    0U,	// G_SMULO
    0U,	// G_UMULH
    0U,	// G_SMULH
    0U,	// G_UADDSAT
    0U,	// G_SADDSAT
    0U,	// G_USUBSAT
    0U,	// G_SSUBSAT
    0U,	// G_USHLSAT
    0U,	// G_SSHLSAT
    0U,	// G_SMULFIX
    0U,	// G_UMULFIX
    0U,	// G_SMULFIXSAT
    0U,	// G_UMULFIXSAT
    0U,	// G_SDIVFIX
    0U,	// G_UDIVFIX
    0U,	// G_SDIVFIXSAT
    0U,	// G_UDIVFIXSAT
    0U,	// G_FADD
    0U,	// G_FSUB
    0U,	// G_FMUL
    0U,	// G_FMA
    0U,	// G_FMAD
    0U,	// G_FDIV
    0U,	// G_FREM
    0U,	// G_FPOW
    0U,	// G_FPOWI
    0U,	// G_FEXP
    0U,	// G_FEXP2
    0U,	// G_FEXP10
    0U,	// G_FLOG
    0U,	// G_FLOG2
    0U,	// G_FLOG10
    0U,	// G_FLDEXP
    0U,	// G_FFREXP
    0U,	// G_FNEG
    0U,	// G_FPEXT
    0U,	// G_FPTRUNC
    0U,	// G_FPTOSI
    0U,	// G_FPTOUI
    0U,	// G_SITOFP
    0U,	// G_UITOFP
    0U,	// G_FABS
    0U,	// G_FCOPYSIGN
    0U,	// G_IS_FPCLASS
    0U,	// G_FCANONICALIZE
    0U,	// G_FMINNUM
    0U,	// G_FMAXNUM
    0U,	// G_FMINNUM_IEEE
    0U,	// G_FMAXNUM_IEEE
    0U,	// G_FMINIMUM
    0U,	// G_FMAXIMUM
    0U,	// G_GET_FPENV
    0U,	// G_SET_FPENV
    0U,	// G_RESET_FPENV
    0U,	// G_GET_FPMODE
    0U,	// G_SET_FPMODE
    0U,	// G_RESET_FPMODE
    0U,	// G_PTR_ADD
    0U,	// G_PTRMASK
    0U,	// G_SMIN
    0U,	// G_SMAX
    0U,	// G_UMIN
    0U,	// G_UMAX
    0U,	// G_ABS
    0U,	// G_LROUND
    0U,	// G_LLROUND
    0U,	// G_BR
    0U,	// G_BRJT
    0U,	// G_INSERT_VECTOR_ELT
    0U,	// G_EXTRACT_VECTOR_ELT
    0U,	// G_SHUFFLE_VECTOR
    0U,	// G_CTTZ
    0U,	// G_CTTZ_ZERO_UNDEF
    0U,	// G_CTLZ
    0U,	// G_CTLZ_ZERO_UNDEF
    0U,	// G_CTPOP
    0U,	// G_BSWAP
    0U,	// G_BITREVERSE
    0U,	// G_FCEIL
    0U,	// G_FCOS
    0U,	// G_FSIN
    0U,	// G_FSQRT
    0U,	// G_FFLOOR
    0U,	// G_FRINT
    0U,	// G_FNEARBYINT
    0U,	// G_ADDRSPACE_CAST
    0U,	// G_BLOCK_ADDR
    0U,	// G_JUMP_TABLE
    0U,	// G_DYN_STACKALLOC
    0U,	// G_STACKSAVE
    0U,	// G_STACKRESTORE
    0U,	// G_STRICT_FADD
    0U,	// G_STRICT_FSUB
    0U,	// G_STRICT_FMUL
    0U,	// G_STRICT_FDIV
    0U,	// G_STRICT_FREM
    0U,	// G_STRICT_FMA
    0U,	// G_STRICT_FSQRT
    0U,	// G_STRICT_FLDEXP
    0U,	// G_READ_REGISTER
    0U,	// G_WRITE_REGISTER
    0U,	// G_MEMCPY
    0U,	// G_MEMCPY_INLINE
    0U,	// G_MEMMOVE
    0U,	// G_MEMSET
    0U,	// G_BZERO
    0U,	// G_VECREDUCE_SEQ_FADD
    0U,	// G_VECREDUCE_SEQ_FMUL
    0U,	// G_VECREDUCE_FADD
    0U,	// G_VECREDUCE_FMUL
    0U,	// G_VECREDUCE_FMAX
    0U,	// G_VECREDUCE_FMIN
    0U,	// G_VECREDUCE_FMAXIMUM
    0U,	// G_VECREDUCE_FMINIMUM
    0U,	// G_VECREDUCE_ADD
    0U,	// G_VECREDUCE_MUL
    0U,	// G_VECREDUCE_AND
    0U,	// G_VECREDUCE_OR
    0U,	// G_VECREDUCE_XOR
    0U,	// G_VECREDUCE_SMAX
    0U,	// G_VECREDUCE_SMIN
    0U,	// G_VECREDUCE_UMAX
    0U,	// G_VECREDUCE_UMIN
    0U,	// G_SBFX
    0U,	// G_UBFX
    0U,	// ABSMacro
    0U,	// ADJCALLSTACKDOWN
    0U,	// ADJCALLSTACKDOWN_NM
    0U,	// ADJCALLSTACKUP
    0U,	// ADJCALLSTACKUP_NM
    0U,	// ALIGN_NM
    0U,	// AND_V_D_PSEUDO
    0U,	// AND_V_H_PSEUDO
    0U,	// AND_V_W_PSEUDO
    0U,	// ATOMIC_CMP_SWAP_I16
    0U,	// ATOMIC_CMP_SWAP_I16_POSTRA
    0U,	// ATOMIC_CMP_SWAP_I32
    0U,	// ATOMIC_CMP_SWAP_I32_POSTRA
    0U,	// ATOMIC_CMP_SWAP_I64
    0U,	// ATOMIC_CMP_SWAP_I64_POSTRA
    0U,	// ATOMIC_CMP_SWAP_I8
    0U,	// ATOMIC_CMP_SWAP_I8_POSTRA
    0U,	// ATOMIC_LOAD_ADD_I16
    0U,	// ATOMIC_LOAD_ADD_I16_POSTRA
    0U,	// ATOMIC_LOAD_ADD_I32
    0U,	// ATOMIC_LOAD_ADD_I32_POSTRA
    0U,	// ATOMIC_LOAD_ADD_I64
    0U,	// ATOMIC_LOAD_ADD_I64_POSTRA
    0U,	// ATOMIC_LOAD_ADD_I8
    0U,	// ATOMIC_LOAD_ADD_I8_POSTRA
    0U,	// ATOMIC_LOAD_AND_I16
    0U,	// ATOMIC_LOAD_AND_I16_POSTRA
    0U,	// ATOMIC_LOAD_AND_I32
    0U,	// ATOMIC_LOAD_AND_I32_POSTRA
    0U,	// ATOMIC_LOAD_AND_I64
    0U,	// ATOMIC_LOAD_AND_I64_POSTRA
    0U,	// ATOMIC_LOAD_AND_I8
    0U,	// ATOMIC_LOAD_AND_I8_POSTRA
    0U,	// ATOMIC_LOAD_MAX_I16
    0U,	// ATOMIC_LOAD_MAX_I16_POSTRA
    0U,	// ATOMIC_LOAD_MAX_I32
    0U,	// ATOMIC_LOAD_MAX_I32_POSTRA
    0U,	// ATOMIC_LOAD_MAX_I64
    0U,	// ATOMIC_LOAD_MAX_I64_POSTRA
    0U,	// ATOMIC_LOAD_MAX_I8
    0U,	// ATOMIC_LOAD_MAX_I8_POSTRA
    0U,	// ATOMIC_LOAD_MIN_I16
    0U,	// ATOMIC_LOAD_MIN_I16_POSTRA
    0U,	// ATOMIC_LOAD_MIN_I32
    0U,	// ATOMIC_LOAD_MIN_I32_POSTRA
    0U,	// ATOMIC_LOAD_MIN_I64
    0U,	// ATOMIC_LOAD_MIN_I64_POSTRA
    0U,	// ATOMIC_LOAD_MIN_I8
    0U,	// ATOMIC_LOAD_MIN_I8_POSTRA
    0U,	// ATOMIC_LOAD_NAND_I16
    0U,	// ATOMIC_LOAD_NAND_I16_POSTRA
    0U,	// ATOMIC_LOAD_NAND_I32
    0U,	// ATOMIC_LOAD_NAND_I32_POSTRA
    0U,	// ATOMIC_LOAD_NAND_I64
    0U,	// ATOMIC_LOAD_NAND_I64_POSTRA
    0U,	// ATOMIC_LOAD_NAND_I8
    0U,	// ATOMIC_LOAD_NAND_I8_POSTRA
    0U,	// ATOMIC_LOAD_OR_I16
    0U,	// ATOMIC_LOAD_OR_I16_POSTRA
    0U,	// ATOMIC_LOAD_OR_I32
    0U,	// ATOMIC_LOAD_OR_I32_POSTRA
    0U,	// ATOMIC_LOAD_OR_I64
    0U,	// ATOMIC_LOAD_OR_I64_POSTRA
    0U,	// ATOMIC_LOAD_OR_I8
    0U,	// ATOMIC_LOAD_OR_I8_POSTRA
    0U,	// ATOMIC_LOAD_SUB_I16
    0U,	// ATOMIC_LOAD_SUB_I16_POSTRA
    0U,	// ATOMIC_LOAD_SUB_I32
    0U,	// ATOMIC_LOAD_SUB_I32_POSTRA
    0U,	// ATOMIC_LOAD_SUB_I64
    0U,	// ATOMIC_LOAD_SUB_I64_POSTRA
    0U,	// ATOMIC_LOAD_SUB_I8
    0U,	// ATOMIC_LOAD_SUB_I8_POSTRA
    0U,	// ATOMIC_LOAD_UMAX_I16
    0U,	// ATOMIC_LOAD_UMAX_I16_POSTRA
    0U,	// ATOMIC_LOAD_UMAX_I32
    0U,	// ATOMIC_LOAD_UMAX_I32_POSTRA
    0U,	// ATOMIC_LOAD_UMAX_I64
    0U,	// ATOMIC_LOAD_UMAX_I64_POSTRA
    0U,	// ATOMIC_LOAD_UMAX_I8
    0U,	// ATOMIC_LOAD_UMAX_I8_POSTRA
    0U,	// ATOMIC_LOAD_UMIN_I16
    0U,	// ATOMIC_LOAD_UMIN_I16_POSTRA
    0U,	// ATOMIC_LOAD_UMIN_I32
    0U,	// ATOMIC_LOAD_UMIN_I32_POSTRA
    0U,	// ATOMIC_LOAD_UMIN_I64
    0U,	// ATOMIC_LOAD_UMIN_I64_POSTRA
    0U,	// ATOMIC_LOAD_UMIN_I8
    0U,	// ATOMIC_LOAD_UMIN_I8_POSTRA
    0U,	// ATOMIC_LOAD_XOR_I16
    0U,	// ATOMIC_LOAD_XOR_I16_POSTRA
    0U,	// ATOMIC_LOAD_XOR_I32
    0U,	// ATOMIC_LOAD_XOR_I32_POSTRA
    0U,	// ATOMIC_LOAD_XOR_I64
    0U,	// ATOMIC_LOAD_XOR_I64_POSTRA
    0U,	// ATOMIC_LOAD_XOR_I8
    0U,	// ATOMIC_LOAD_XOR_I8_POSTRA
    0U,	// ATOMIC_SWAP_I16
    0U,	// ATOMIC_SWAP_I16_POSTRA
    0U,	// ATOMIC_SWAP_I32
    0U,	// ATOMIC_SWAP_I32_POSTRA
    0U,	// ATOMIC_SWAP_I64
    0U,	// ATOMIC_SWAP_I64_POSTRA
    0U,	// ATOMIC_SWAP_I8
    0U,	// ATOMIC_SWAP_I8_POSTRA
    0U,	// B
    0U,	// BAL_BR
    0U,	// BAL_BR_MM
    4U,	// BEQLImmMacro
    4U,	// BGE
    4U,	// BGEImmMacro
    4U,	// BGEL
    4U,	// BGELImmMacro
    4U,	// BGEU
    4U,	// BGEUImmMacro
    4U,	// BGEUL
    4U,	// BGEULImmMacro
    4U,	// BGT
    4U,	// BGTImmMacro
    4U,	// BGTL
    4U,	// BGTLImmMacro
    4U,	// BGTU
    4U,	// BGTUImmMacro
    4U,	// BGTUL
    4U,	// BGTULImmMacro
    4U,	// BLE
    4U,	// BLEImmMacro
    4U,	// BLEL
    4U,	// BLELImmMacro
    4U,	// BLEU
    4U,	// BLEUImmMacro
    4U,	// BLEUL
    4U,	// BLEULImmMacro
    4U,	// BLT
    4U,	// BLTImmMacro
    4U,	// BLTL
    4U,	// BLTLImmMacro
    4U,	// BLTU
    4U,	// BLTUImmMacro
    4U,	// BLTUL
    4U,	// BLTULImmMacro
    4U,	// BNELImmMacro
    0U,	// BPOSGE32_PSEUDO
    0U,	// BSEL_D_PSEUDO
    0U,	// BSEL_FD_PSEUDO
    0U,	// BSEL_FW_PSEUDO
    0U,	// BSEL_H_PSEUDO
    0U,	// BSEL_W_PSEUDO
    0U,	// B_MM
    0U,	// B_MMR6_Pseudo
    0U,	// B_MM_Pseudo
    4U,	// BeqImm
    4U,	// BneImm
    0U,	// BteqzT8CmpX16
    0U,	// BteqzT8CmpiX16
    0U,	// BteqzT8SltX16
    0U,	// BteqzT8SltiX16
    0U,	// BteqzT8SltiuX16
    0U,	// BteqzT8SltuX16
    0U,	// BtnezT8CmpX16
    0U,	// BtnezT8CmpiX16
    0U,	// BtnezT8SltX16
    0U,	// BtnezT8SltiX16
    0U,	// BtnezT8SltiuX16
    0U,	// BtnezT8SltuX16
    0U,	// BuildPairF64
    0U,	// BuildPairF64_64
    0U,	// CFTC1
    0U,	// CONSTPOOL_ENTRY
    0U,	// COPY_FD_PSEUDO
    0U,	// COPY_FW_PSEUDO
    0U,	// CTTC1
    0U,	// Constant32
    128U,	// DMULImmMacro
    128U,	// DMULMacro
    128U,	// DMULOMacro
    128U,	// DMULOUMacro
    128U,	// DROL
    128U,	// DROLImm
    128U,	// DROR
    128U,	// DRORImm
    128U,	// DSDivIMacro
    128U,	// DSDivMacro
    128U,	// DSRemIMacro
    128U,	// DSRemMacro
    128U,	// DUDivIMacro
    128U,	// DUDivMacro
    128U,	// DURemIMacro
    128U,	// DURemMacro
    0U,	// ERet
    0U,	// ExtractElementF64
    0U,	// ExtractElementF64_64
    0U,	// FABS_D
    0U,	// FABS_W
    0U,	// FEXP2_D_1_PSEUDO
    0U,	// FEXP2_W_1_PSEUDO
    0U,	// FILL_FD_PSEUDO
    0U,	// FILL_FW_PSEUDO
    0U,	// GotPrologue16
    0U,	// INSERT_B_VIDX64_PSEUDO
    0U,	// INSERT_B_VIDX_PSEUDO
    0U,	// INSERT_D_VIDX64_PSEUDO
    0U,	// INSERT_D_VIDX_PSEUDO
    0U,	// INSERT_FD_PSEUDO
    0U,	// INSERT_FD_VIDX64_PSEUDO
    0U,	// INSERT_FD_VIDX_PSEUDO
    0U,	// INSERT_FW_PSEUDO
    0U,	// INSERT_FW_VIDX64_PSEUDO
    0U,	// INSERT_FW_VIDX_PSEUDO
    0U,	// INSERT_H_VIDX64_PSEUDO
    0U,	// INSERT_H_VIDX_PSEUDO
    0U,	// INSERT_W_VIDX64_PSEUDO
    0U,	// INSERT_W_VIDX_PSEUDO
    0U,	// JALR64Pseudo
    0U,	// JALRCPseudo
    0U,	// JALRHB64Pseudo
    0U,	// JALRHBPseudo
    0U,	// JALRPseudo
    0U,	// JAL_MMR6
    0U,	// JalOneReg
    0U,	// JalTwoReg
    0U,	// LDMacro
    0U,	// LDR_D
    0U,	// LDR_W
    0U,	// LD_F16
    0U,	// LOAD_ACC128
    0U,	// LOAD_ACC64
    0U,	// LOAD_ACC64DSP
    0U,	// LOAD_CCOND_DSP
    0U,	// LONG_BRANCH_ADDiu
    0U,	// LONG_BRANCH_ADDiu2Op
    0U,	// LONG_BRANCH_DADDiu
    0U,	// LONG_BRANCH_DADDiu2Op
    0U,	// LONG_BRANCH_LUi
    0U,	// LONG_BRANCH_LUi2Op
    0U,	// LONG_BRANCH_LUi2Op_64
    0U,	// LWM_MM
    0U,	// LoadAddrImm32
    0U,	// LoadAddrImm64
    0U,	// LoadAddrReg32
    0U,	// LoadAddrReg64
    0U,	// LoadImm32
    0U,	// LoadImm64
    0U,	// LoadImmDoubleFGR
    0U,	// LoadImmDoubleFGR_32
    0U,	// LoadImmDoubleGPR
    0U,	// LoadImmSingleFGR
    0U,	// LoadImmSingleGPR
    0U,	// LoadJumpTableOffset
    0U,	// LwConstant32
    0U,	// MFTACX
    0U,	// MFTACX_NM
    136U,	// MFTC0
    136U,	// MFTC0_NM
    0U,	// MFTC1
    0U,	// MFTDSP
    0U,	// MFTDSP_NM
    0U,	// MFTGPR
    0U,	// MFTGPR_NM
    0U,	// MFTHC1
    0U,	// MFTHI
    0U,	// MFTHI_NM
    0U,	// MFTLO
    0U,	// MFTLO_NM
    0U,	// MIPSeh_return32
    0U,	// MIPSeh_return64
    0U,	// MSA_FP_EXTEND_D_PSEUDO
    0U,	// MSA_FP_EXTEND_W_PSEUDO
    0U,	// MSA_FP_ROUND_D_PSEUDO
    0U,	// MSA_FP_ROUND_W_PSEUDO
    0U,	// MTTACX
    0U,	// MTTACX_NM
    0U,	// MTTC0
    0U,	// MTTC0_NM
    0U,	// MTTC1
    0U,	// MTTDSP
    0U,	// MTTDSP_NM
    0U,	// MTTGPR
    0U,	// MTTGPR_NM
    0U,	// MTTHC1
    0U,	// MTTHI
    0U,	// MTTHI_NM
    0U,	// MTTLO
    0U,	// MTTLO_NM
    128U,	// MULImmMacro
    128U,	// MULOMacro
    128U,	// MULOUMacro
    0U,	// MUSTTAILCALLREG_NM
    0U,	// MUSTTAILCALL_NM
    0U,	// MultRxRy16
    0U,	// MultRxRyRz16
    0U,	// MultuRxRy16
    0U,	// MultuRxRyRz16
    0U,	// NOP
    128U,	// NORImm
    128U,	// NORImm64
    0U,	// NOR_V_D_PSEUDO
    0U,	// NOR_V_H_PSEUDO
    0U,	// NOR_V_W_PSEUDO
    0U,	// OR_V_D_PSEUDO
    0U,	// OR_V_H_PSEUDO
    0U,	// OR_V_W_PSEUDO
    12U,	// PseudoADDIU_NM
    16U,	// PseudoANDI_NM
    0U,	// PseudoCMPU_EQ_QB
    0U,	// PseudoCMPU_LE_QB
    0U,	// PseudoCMPU_LT_QB
    0U,	// PseudoCMP_EQ_PH
    0U,	// PseudoCMP_LE_PH
    0U,	// PseudoCMP_LT_PH
    0U,	// PseudoCVT_D32_W
    0U,	// PseudoCVT_D64_L
    0U,	// PseudoCVT_D64_W
    0U,	// PseudoCVT_S_L
    0U,	// PseudoCVT_S_W
    0U,	// PseudoDMULT
    0U,	// PseudoDMULTu
    0U,	// PseudoDSDIV
    0U,	// PseudoDUDIV
    0U,	// PseudoD_SELECT_I
    0U,	// PseudoD_SELECT_I64
    0U,	// PseudoIndirectBranch
    0U,	// PseudoIndirectBranch64
    0U,	// PseudoIndirectBranch64R6
    0U,	// PseudoIndirectBranchNM
    0U,	// PseudoIndirectBranchR6
    0U,	// PseudoIndirectBranch_MM
    0U,	// PseudoIndirectBranch_MMR6
    0U,	// PseudoIndirectHazardBranch
    0U,	// PseudoIndirectHazardBranch64
    0U,	// PseudoIndrectHazardBranch64R6
    0U,	// PseudoIndrectHazardBranchR6
    0U,	// PseudoLA_NM
    0U,	// PseudoLI_NM
    0U,	// PseudoMADD
    0U,	// PseudoMADDU
    0U,	// PseudoMADDU_MM
    0U,	// PseudoMADD_MM
    0U,	// PseudoMFHI
    0U,	// PseudoMFHI64
    0U,	// PseudoMFHI_MM
    0U,	// PseudoMFLO
    0U,	// PseudoMFLO64
    0U,	// PseudoMFLO_MM
    0U,	// PseudoMSUB
    0U,	// PseudoMSUBU
    0U,	// PseudoMSUBU_MM
    0U,	// PseudoMSUB_MM
    0U,	// PseudoMTLOHI
    0U,	// PseudoMTLOHI64
    0U,	// PseudoMTLOHI_DSP
    0U,	// PseudoMTLOHI_MM
    0U,	// PseudoMULT
    0U,	// PseudoMULT_MM
    0U,	// PseudoMULTu
    0U,	// PseudoMULTu_MM
    0U,	// PseudoPICK_PH
    0U,	// PseudoPICK_QB
    0U,	// PseudoReturn
    0U,	// PseudoReturn64
    0U,	// PseudoReturnNM
    0U,	// PseudoSDIV
    0U,	// PseudoSELECTFP_F_D32
    0U,	// PseudoSELECTFP_F_D64
    0U,	// PseudoSELECTFP_F_I
    0U,	// PseudoSELECTFP_F_I64
    0U,	// PseudoSELECTFP_F_S
    0U,	// PseudoSELECTFP_T_D32
    0U,	// PseudoSELECTFP_T_D64
    0U,	// PseudoSELECTFP_T_I
    0U,	// PseudoSELECTFP_T_I64
    0U,	// PseudoSELECTFP_T_S
    0U,	// PseudoSELECT_D32
    0U,	// PseudoSELECT_D64
    0U,	// PseudoSELECT_I
    0U,	// PseudoSELECT_I64
    0U,	// PseudoSELECT_S
    128U,	// PseudoSUBU_NM
    128U,	// PseudoTRUNC_W_D
    128U,	// PseudoTRUNC_W_D32
    128U,	// PseudoTRUNC_W_S
    0U,	// PseudoUDIV
    128U,	// ROL
    128U,	// ROLImm
    128U,	// ROR
    128U,	// RORImm
    0U,	// RetRA
    0U,	// RetRA16
    0U,	// SDC1_M1
    0U,	// SDIV_MM_Pseudo
    0U,	// SDMacro
    128U,	// SDivIMacro
    128U,	// SDivMacro
    128U,	// SEQIMacro
    128U,	// SEQMacro
    128U,	// SGE
    128U,	// SGEImm
    128U,	// SGEImm64
    128U,	// SGEU
    128U,	// SGEUImm
    128U,	// SGEUImm64
    128U,	// SGTImm
    128U,	// SGTImm64
    128U,	// SGTUImm
    128U,	// SGTUImm64
    128U,	// SLE
    128U,	// SLEImm
    128U,	// SLEImm64
    128U,	// SLEU
    128U,	// SLEUImm
    128U,	// SLEUImm64
    128U,	// SLTImm64
    128U,	// SLTUImm64
    128U,	// SNEIMacro
    128U,	// SNEMacro
    0U,	// SNZ_B_PSEUDO
    0U,	// SNZ_D_PSEUDO
    0U,	// SNZ_H_PSEUDO
    0U,	// SNZ_V_PSEUDO
    0U,	// SNZ_W_PSEUDO
    128U,	// SRemIMacro
    128U,	// SRemMacro
    0U,	// STORE_ACC128
    0U,	// STORE_ACC64
    0U,	// STORE_ACC64DSP
    0U,	// STORE_CCOND_DSP
    0U,	// STR_D
    0U,	// STR_W
    0U,	// ST_F16
    0U,	// SWM_MM
    0U,	// SZ_B_PSEUDO
    0U,	// SZ_D_PSEUDO
    0U,	// SZ_H_PSEUDO
    0U,	// SZ_V_PSEUDO
    0U,	// SZ_W_PSEUDO
    0U,	// SaaAddr
    0U,	// SaadAddr
    0U,	// SelBeqZ
    0U,	// SelBneZ
    0U,	// SelTBteqZCmp
    0U,	// SelTBteqZCmpi
    0U,	// SelTBteqZSlt
    0U,	// SelTBteqZSlti
    0U,	// SelTBteqZSltiu
    0U,	// SelTBteqZSltu
    0U,	// SelTBtneZCmp
    0U,	// SelTBtneZCmpi
    0U,	// SelTBtneZSlt
    0U,	// SelTBtneZSlti
    0U,	// SelTBtneZSltiu
    0U,	// SelTBtneZSltu
    0U,	// SltCCRxRy16
    0U,	// SltiCCRxImmX16
    0U,	// SltiuCCRxImmX16
    0U,	// SltuCCRxRy16
    0U,	// SltuRxRyRz16
    0U,	// TAILCALL
    0U,	// TAILCALL64R6REG
    0U,	// TAILCALLHB64R6REG
    0U,	// TAILCALLHBR6REG
    0U,	// TAILCALLR6REG
    0U,	// TAILCALLREG
    0U,	// TAILCALLREG64
    0U,	// TAILCALLREGHB
    0U,	// TAILCALLREGHB64
    0U,	// TAILCALLREG_MM
    0U,	// TAILCALLREG_MMR6
    0U,	// TAILCALLREG_NM
    0U,	// TAILCALL_MM
    0U,	// TAILCALL_MMR6
    0U,	// TAILCALL_NM
    0U,	// TRAP
    0U,	// TRAP_MM
    0U,	// UDIV_MM_Pseudo
    128U,	// UDivIMacro
    128U,	// UDivMacro
    128U,	// URemIMacro
    128U,	// URemMacro
    0U,	// Ulh
    0U,	// Ulhu
    0U,	// Ulw
    0U,	// Ush
    0U,	// Usw
    0U,	// XOR_V_D_PSEUDO
    0U,	// XOR_V_H_PSEUDO
    0U,	// XOR_V_W_PSEUDO
    0U,	// ABSQ_S_PH
    0U,	// ABSQ_S_PH_MM
    0U,	// ABSQ_S_QB
    0U,	// ABSQ_S_QB_MMR2
    0U,	// ABSQ_S_W
    0U,	// ABSQ_S_W_MM
    128U,	// ADD
    12U,	// ADDIU48_NM
    128U,	// ADDIUGP48_NM
    128U,	// ADDIUGPB_NM
    128U,	// ADDIUGPW_NM
    128U,	// ADDIUNEG_NM
    0U,	// ADDIUPC
    0U,	// ADDIUPC_MM
    0U,	// ADDIUPC_MMR6
    0U,	// ADDIUR1SP_MM
    20U,	// ADDIUR1SP_NM
    128U,	// ADDIUR2_MM
    152U,	// ADDIUR2_NM
    128U,	// ADDIURS5_NM
    0U,	// ADDIUS5_MM
    0U,	// ADDIUSP_MM
    128U,	// ADDIU_MMR6
    16U,	// ADDIU_NM
    128U,	// ADDQH_PH
    128U,	// ADDQH_PH_MMR2
    128U,	// ADDQH_R_PH
    128U,	// ADDQH_R_PH_MMR2
    128U,	// ADDQH_R_W
    128U,	// ADDQH_R_W_MMR2
    128U,	// ADDQH_W
    128U,	// ADDQH_W_MMR2
    128U,	// ADDQ_PH
    128U,	// ADDQ_PH_MM
    128U,	// ADDQ_S_PH
    128U,	// ADDQ_S_PH_MM
    128U,	// ADDQ_S_W
    128U,	// ADDQ_S_W_MM
    128U,	// ADDR_PS64
    128U,	// ADDSC
    128U,	// ADDSC_MM
    128U,	// ADDS_A_B
    128U,	// ADDS_A_D
    128U,	// ADDS_A_H
    128U,	// ADDS_A_W
    128U,	// ADDS_S_B
    128U,	// ADDS_S_D
    128U,	// ADDS_S_H
    128U,	// ADDS_S_W
    128U,	// ADDS_U_B
    128U,	// ADDS_U_D
    128U,	// ADDS_U_H
    128U,	// ADDS_U_W
    128U,	// ADDU16_MM
    128U,	// ADDU16_MMR6
    128U,	// ADDUH_QB
    128U,	// ADDUH_QB_MMR2
    128U,	// ADDUH_R_QB
    128U,	// ADDUH_R_QB_MMR2
    128U,	// ADDU_MMR6
    128U,	// ADDU_PH
    128U,	// ADDU_PH_MMR2
    128U,	// ADDU_QB
    128U,	// ADDU_QB_MM
    128U,	// ADDU_S_PH
    128U,	// ADDU_S_PH_MMR2
    128U,	// ADDU_S_QB
    128U,	// ADDU_S_QB_MM
    152U,	// ADDVI_B
    152U,	// ADDVI_D
    152U,	// ADDVI_H
    152U,	// ADDVI_W
    128U,	// ADDV_B
    128U,	// ADDV_D
    128U,	// ADDV_H
    128U,	// ADDV_W
    128U,	// ADDWC
    128U,	// ADDWC_MM
    128U,	// ADD_A_B
    128U,	// ADD_A_D
    128U,	// ADD_A_H
    128U,	// ADD_A_W
    128U,	// ADD_MM
    128U,	// ADD_MMR6
    128U,	// ADD_NM
    128U,	// ADDi
    128U,	// ADDi_MM
    128U,	// ADDiu
    128U,	// ADDiu_MM
    128U,	// ADDu
    128U,	// ADDu16_NM
    128U,	// ADDu4x4_NM
    128U,	// ADDu_MM
    128U,	// ADDu_NM
    1024U,	// ALIGN
    1024U,	// ALIGN_MMR6
    0U,	// ALUIPC
    0U,	// ALUIPC_MMR6
    0U,	// ALUIPC_NM
    128U,	// AND
    0U,	// AND16_MM
    0U,	// AND16_MMR6
    128U,	// AND16_NM
    128U,	// AND64
    128U,	// ANDI16_MM
    128U,	// ANDI16_MMR6
    16U,	// ANDI16_NM
    20U,	// ANDI_B
    16U,	// ANDI_MMR6
    128U,	// ANDI_NM
    128U,	// AND_MM
    128U,	// AND_MMR6
    128U,	// AND_NM
    128U,	// AND_V
    16U,	// ANDi
    16U,	// ANDi64
    16U,	// ANDi_MM
    152U,	// APPEND
    152U,	// APPEND_MMR2
    128U,	// ASUB_S_B
    128U,	// ASUB_S_D
    128U,	// ASUB_S_H
    128U,	// ASUB_S_W
    128U,	// ASUB_U_B
    128U,	// ASUB_U_D
    128U,	// ASUB_U_H
    128U,	// ASUB_U_W
    16U,	// AUI
    0U,	// AUIPC
    0U,	// AUIPC_MMR6
    16U,	// AUI_MMR6
    128U,	// AVER_S_B
    128U,	// AVER_S_D
    128U,	// AVER_S_H
    128U,	// AVER_S_W
    128U,	// AVER_U_B
    128U,	// AVER_U_D
    128U,	// AVER_U_H
    128U,	// AVER_U_W
    128U,	// AVE_S_B
    128U,	// AVE_S_D
    128U,	// AVE_S_H
    128U,	// AVE_S_W
    128U,	// AVE_U_B
    128U,	// AVE_U_D
    128U,	// AVE_U_H
    128U,	// AVE_U_W
    0U,	// AddiuRxImmX16
    0U,	// AddiuRxPcImmX16
    1U,	// AddiuRxRxImm16
    0U,	// AddiuRxRxImmX16
    0U,	// AddiuRxRyOffMemX16
    0U,	// AddiuSpImm16
    0U,	// AddiuSpImmX16
    128U,	// AdduRxRyRz16
    0U,	// AndRxRxRy16
    0U,	// B16_MM
    128U,	// BADDu
    0U,	// BAL
    0U,	// BALC
    0U,	// BALC16_NM
    0U,	// BALC_MMR6
    0U,	// BALC_NM
    156U,	// BALIGN
    156U,	// BALIGN_MMR2
    0U,	// BALRSC_NM
    4U,	// BBEQZC_NM
    0U,	// BBIT0
    0U,	// BBIT032
    0U,	// BBIT1
    0U,	// BBIT132
    4U,	// BBNEZC_NM
    0U,	// BC
    0U,	// BC16_MMR6
    0U,	// BC16_NM
    0U,	// BC1EQZ
    0U,	// BC1EQZC_MMR6
    0U,	// BC1F
    0U,	// BC1FL
    0U,	// BC1F_MM
    0U,	// BC1NEZ
    0U,	// BC1NEZC_MMR6
    0U,	// BC1T
    0U,	// BC1TL
    0U,	// BC1T_MM
    0U,	// BC2EQZ
    0U,	// BC2EQZC_MMR6
    0U,	// BC2NEZ
    0U,	// BC2NEZC_MMR6
    136U,	// BCLRI_B
    160U,	// BCLRI_D
    164U,	// BCLRI_H
    152U,	// BCLRI_W
    128U,	// BCLR_B
    128U,	// BCLR_D
    128U,	// BCLR_H
    128U,	// BCLR_W
    0U,	// BC_MMR6
    0U,	// BC_NM
    4U,	// BEQ
    4U,	// BEQ64
    4U,	// BEQC
    4U,	// BEQC16_NM
    4U,	// BEQC64
    4U,	// BEQC_MMR6
    4U,	// BEQC_NM
    4U,	// BEQCzero_NM
    4U,	// BEQIC_NM
    4U,	// BEQL
    0U,	// BEQZ16_MM
    0U,	// BEQZALC
    0U,	// BEQZALC_MMR6
    0U,	// BEQZC
    0U,	// BEQZC16_MMR6
    0U,	// BEQZC16_NM
    0U,	// BEQZC64
    0U,	// BEQZC_MM
    0U,	// BEQZC_MMR6
    0U,	// BEQZC_NM
    4U,	// BEQ_MM
    4U,	// BGEC
    4U,	// BGEC64
    4U,	// BGEC_MMR6
    4U,	// BGEC_NM
    4U,	// BGEIC_NM
    4U,	// BGEIUC_NM
    4U,	// BGEUC
    4U,	// BGEUC64
    4U,	// BGEUC_MMR6
    4U,	// BGEUC_NM
    0U,	// BGEZ
    0U,	// BGEZ64
    0U,	// BGEZAL
    0U,	// BGEZALC
    0U,	// BGEZALC_MMR6
    0U,	// BGEZALL
    0U,	// BGEZALS_MM
    0U,	// BGEZAL_MM
    0U,	// BGEZC
    0U,	// BGEZC64
    0U,	// BGEZC_MMR6
    0U,	// BGEZL
    0U,	// BGEZ_MM
    0U,	// BGTZ
    0U,	// BGTZ64
    0U,	// BGTZALC
    0U,	// BGTZALC_MMR6
    0U,	// BGTZC
    0U,	// BGTZC64
    0U,	// BGTZC_MMR6
    0U,	// BGTZL
    0U,	// BGTZ_MM
    168U,	// BINSLI_B
    44U,	// BINSLI_D
    176U,	// BINSLI_H
    52U,	// BINSLI_W
    184U,	// BINSL_B
    184U,	// BINSL_D
    184U,	// BINSL_H
    184U,	// BINSL_W
    168U,	// BINSRI_B
    44U,	// BINSRI_D
    176U,	// BINSRI_H
    52U,	// BINSRI_W
    184U,	// BINSR_B
    184U,	// BINSR_D
    184U,	// BINSR_H
    184U,	// BINSR_W
    0U,	// BITREV
    0U,	// BITREVW_NM
    0U,	// BITREV_MM
    0U,	// BITSWAP
    0U,	// BITSWAP_MMR6
    0U,	// BLEZ
    0U,	// BLEZ64
    0U,	// BLEZALC
    0U,	// BLEZALC_MMR6
    0U,	// BLEZC
    0U,	// BLEZC64
    0U,	// BLEZC_MMR6
    0U,	// BLEZL
    0U,	// BLEZ_MM
    4U,	// BLTC
    4U,	// BLTC64
    4U,	// BLTC_MMR6
    4U,	// BLTC_NM
    4U,	// BLTIC_NM
    4U,	// BLTIUC_NM
    4U,	// BLTUC
    4U,	// BLTUC64
    4U,	// BLTUC_MMR6
    4U,	// BLTUC_NM
    0U,	// BLTZ
    0U,	// BLTZ64
    0U,	// BLTZAL
    0U,	// BLTZALC
    0U,	// BLTZALC_MMR6
    0U,	// BLTZALL
    0U,	// BLTZALS_MM
    0U,	// BLTZAL_MM
    0U,	// BLTZC
    0U,	// BLTZC64
    0U,	// BLTZC_MMR6
    0U,	// BLTZL
    0U,	// BLTZ_MM
    60U,	// BMNZI_B
    184U,	// BMNZ_V
    60U,	// BMZI_B
    184U,	// BMZ_V
    4U,	// BNE
    4U,	// BNE64
    4U,	// BNEC
    4U,	// BNEC16_NM
    4U,	// BNEC64
    4U,	// BNEC_MMR6
    4U,	// BNEC_NM
    4U,	// BNECzero_NM
    136U,	// BNEGI_B
    160U,	// BNEGI_D
    164U,	// BNEGI_H
    152U,	// BNEGI_W
    128U,	// BNEG_B
    128U,	// BNEG_D
    128U,	// BNEG_H
    128U,	// BNEG_W
    4U,	// BNEIC_NM
    4U,	// BNEL
    0U,	// BNEZ16_MM
    0U,	// BNEZALC
    0U,	// BNEZALC_MMR6
    0U,	// BNEZC
    0U,	// BNEZC16_MMR6
    0U,	// BNEZC16_NM
    0U,	// BNEZC64
    0U,	// BNEZC_MM
    0U,	// BNEZC_MMR6
    0U,	// BNEZC_NM
    4U,	// BNE_MM
    4U,	// BNVC
    4U,	// BNVC_MMR6
    0U,	// BNZ_B
    0U,	// BNZ_D
    0U,	// BNZ_H
    0U,	// BNZ_V
    0U,	// BNZ_W
    4U,	// BOVC
    4U,	// BOVC_MMR6
    0U,	// BPOSGE32
    0U,	// BPOSGE32C_MMR3
    0U,	// BPOSGE32_MM
    0U,	// BREAK
    0U,	// BREAK16_MM
    0U,	// BREAK16_MMR6
    0U,	// BREAK16_NM
    0U,	// BREAK_MM
    0U,	// BREAK_MMR6
    0U,	// BREAK_NM
    0U,	// BRSC_NM
    60U,	// BSELI_B
    184U,	// BSEL_V
    136U,	// BSETI_B
    160U,	// BSETI_D
    164U,	// BSETI_H
    152U,	// BSETI_W
    128U,	// BSET_B
    128U,	// BSET_D
    128U,	// BSET_H
    128U,	// BSET_W
    0U,	// BYTEREVW_NM
    0U,	// BZ_B
    0U,	// BZ_D
    0U,	// BZ_H
    0U,	// BZ_V
    0U,	// BZ_W
    1U,	// BeqzRxImm16
    0U,	// BeqzRxImmX16
    0U,	// Bimm16
    0U,	// BimmX16
    1U,	// BnezRxImm16
    0U,	// BnezRxImmX16
    0U,	// Break16
    0U,	// Bteqz16
    0U,	// BteqzX16
    0U,	// Btnez16
    0U,	// BtnezX16
    0U,	// CACHE
    0U,	// CACHEE
    0U,	// CACHEE_MM
    0U,	// CACHE_MM
    0U,	// CACHE_MMR6
    0U,	// CACHE_NM
    0U,	// CACHE_R6
    0U,	// CEIL_L_D64
    0U,	// CEIL_L_D_MMR6
    0U,	// CEIL_L_S
    0U,	// CEIL_L_S_MMR6
    0U,	// CEIL_W_D32
    0U,	// CEIL_W_D64
    0U,	// CEIL_W_D_MMR6
    0U,	// CEIL_W_MM
    0U,	// CEIL_W_S
    0U,	// CEIL_W_S_MM
    0U,	// CEIL_W_S_MMR6
    128U,	// CEQI_B
    128U,	// CEQI_D
    128U,	// CEQI_H
    128U,	// CEQI_W
    128U,	// CEQ_B
    128U,	// CEQ_D
    128U,	// CEQ_H
    128U,	// CEQ_W
    0U,	// CFC1
    0U,	// CFC1_MM
    0U,	// CFC2_MM
    0U,	// CFCMSA
    2072U,	// CINS
    2072U,	// CINS32
    2072U,	// CINS64_32
    2072U,	// CINS_i32
    0U,	// CLASS_D
    0U,	// CLASS_D_MMR6
    0U,	// CLASS_S
    0U,	// CLASS_S_MMR6
    128U,	// CLEI_S_B
    128U,	// CLEI_S_D
    128U,	// CLEI_S_H
    128U,	// CLEI_S_W
    152U,	// CLEI_U_B
    152U,	// CLEI_U_D
    152U,	// CLEI_U_H
    152U,	// CLEI_U_W
    128U,	// CLE_S_B
    128U,	// CLE_S_D
    128U,	// CLE_S_H
    128U,	// CLE_S_W
    128U,	// CLE_U_B
    128U,	// CLE_U_D
    128U,	// CLE_U_H
    128U,	// CLE_U_W
    0U,	// CLO
    0U,	// CLO_MM
    0U,	// CLO_MMR6
    0U,	// CLO_NM
    0U,	// CLO_R6
    128U,	// CLTI_S_B
    128U,	// CLTI_S_D
    128U,	// CLTI_S_H
    128U,	// CLTI_S_W
    152U,	// CLTI_U_B
    152U,	// CLTI_U_D
    152U,	// CLTI_U_H
    152U,	// CLTI_U_W
    128U,	// CLT_S_B
    128U,	// CLT_S_D
    128U,	// CLT_S_H
    128U,	// CLT_S_W
    128U,	// CLT_U_B
    128U,	// CLT_U_D
    128U,	// CLT_U_H
    128U,	// CLT_U_W
    0U,	// CLZ
    0U,	// CLZ_MM
    0U,	// CLZ_MMR6
    0U,	// CLZ_NM
    0U,	// CLZ_R6
    128U,	// CMPGDU_EQ_QB
    128U,	// CMPGDU_EQ_QB_MMR2
    128U,	// CMPGDU_LE_QB
    128U,	// CMPGDU_LE_QB_MMR2
    128U,	// CMPGDU_LT_QB
    128U,	// CMPGDU_LT_QB_MMR2
    128U,	// CMPGU_EQ_QB
    128U,	// CMPGU_EQ_QB_MM
    128U,	// CMPGU_LE_QB
    128U,	// CMPGU_LE_QB_MM
    128U,	// CMPGU_LT_QB
    128U,	// CMPGU_LT_QB_MM
    0U,	// CMPU_EQ_QB
    0U,	// CMPU_EQ_QB_MM
    0U,	// CMPU_LE_QB
    0U,	// CMPU_LE_QB_MM
    0U,	// CMPU_LT_QB
    0U,	// CMPU_LT_QB_MM
    128U,	// CMP_AF_D_MMR6
    128U,	// CMP_AF_S_MMR6
    128U,	// CMP_EQ_D
    128U,	// CMP_EQ_D_MMR6
    0U,	// CMP_EQ_PH
    0U,	// CMP_EQ_PH_MM
    128U,	// CMP_EQ_S
    128U,	// CMP_EQ_S_MMR6
    128U,	// CMP_F_D
    128U,	// CMP_F_S
    128U,	// CMP_LE_D
    128U,	// CMP_LE_D_MMR6
    0U,	// CMP_LE_PH
    0U,	// CMP_LE_PH_MM
    128U,	// CMP_LE_S
    128U,	// CMP_LE_S_MMR6
    128U,	// CMP_LT_D
    128U,	// CMP_LT_D_MMR6
    0U,	// CMP_LT_PH
    0U,	// CMP_LT_PH_MM
    128U,	// CMP_LT_S
    128U,	// CMP_LT_S_MMR6
    128U,	// CMP_SAF_D
    128U,	// CMP_SAF_D_MMR6
    128U,	// CMP_SAF_S
    128U,	// CMP_SAF_S_MMR6
    128U,	// CMP_SEQ_D
    128U,	// CMP_SEQ_D_MMR6
    128U,	// CMP_SEQ_S
    128U,	// CMP_SEQ_S_MMR6
    128U,	// CMP_SLE_D
    128U,	// CMP_SLE_D_MMR6
    128U,	// CMP_SLE_S
    128U,	// CMP_SLE_S_MMR6
    128U,	// CMP_SLT_D
    128U,	// CMP_SLT_D_MMR6
    128U,	// CMP_SLT_S
    128U,	// CMP_SLT_S_MMR6
    128U,	// CMP_SUEQ_D
    128U,	// CMP_SUEQ_D_MMR6
    128U,	// CMP_SUEQ_S
    128U,	// CMP_SUEQ_S_MMR6
    128U,	// CMP_SULE_D
    128U,	// CMP_SULE_D_MMR6
    128U,	// CMP_SULE_S
    128U,	// CMP_SULE_S_MMR6
    128U,	// CMP_SULT_D
    128U,	// CMP_SULT_D_MMR6
    128U,	// CMP_SULT_S
    128U,	// CMP_SULT_S_MMR6
    128U,	// CMP_SUN_D
    128U,	// CMP_SUN_D_MMR6
    128U,	// CMP_SUN_S
    128U,	// CMP_SUN_S_MMR6
    128U,	// CMP_UEQ_D
    128U,	// CMP_UEQ_D_MMR6
    128U,	// CMP_UEQ_S
    128U,	// CMP_UEQ_S_MMR6
    128U,	// CMP_ULE_D
    128U,	// CMP_ULE_D_MMR6
    128U,	// CMP_ULE_S
    128U,	// CMP_ULE_S_MMR6
    128U,	// CMP_ULT_D
    128U,	// CMP_ULT_D_MMR6
    128U,	// CMP_ULT_S
    128U,	// CMP_ULT_S_MMR6
    128U,	// CMP_UN_D
    128U,	// CMP_UN_D_MMR6
    128U,	// CMP_UN_S
    128U,	// CMP_UN_S_MMR6
    293U,	// COPY_S_B
    321U,	// COPY_S_D
    265U,	// COPY_S_H
    285U,	// COPY_S_W
    293U,	// COPY_U_B
    265U,	// COPY_U_H
    285U,	// COPY_U_W
    128U,	// CRC32B
    0U,	// CRC32B_NM
    128U,	// CRC32CB
    0U,	// CRC32CB_NM
    128U,	// CRC32CD
    128U,	// CRC32CH
    0U,	// CRC32CH_NM
    128U,	// CRC32CW
    0U,	// CRC32CW_NM
    128U,	// CRC32D
    128U,	// CRC32H
    0U,	// CRC32H_NM
    128U,	// CRC32W
    0U,	// CRC32W_NM
    0U,	// CTC1
    0U,	// CTC1_MM
    0U,	// CTC2_MM
    0U,	// CTCMSA
    0U,	// CVT_D32_S
    0U,	// CVT_D32_S_MM
    0U,	// CVT_D32_W
    0U,	// CVT_D32_W_MM
    0U,	// CVT_D64_L
    0U,	// CVT_D64_S
    0U,	// CVT_D64_S_MM
    0U,	// CVT_D64_W
    0U,	// CVT_D64_W_MM
    0U,	// CVT_D_L_MMR6
    0U,	// CVT_L_D64
    0U,	// CVT_L_D64_MM
    0U,	// CVT_L_D_MMR6
    0U,	// CVT_L_S
    0U,	// CVT_L_S_MM
    0U,	// CVT_L_S_MMR6
    0U,	// CVT_PS_PW64
    128U,	// CVT_PS_S64
    0U,	// CVT_PW_PS64
    0U,	// CVT_S_D32
    0U,	// CVT_S_D32_MM
    0U,	// CVT_S_D64
    0U,	// CVT_S_D64_MM
    0U,	// CVT_S_L
    0U,	// CVT_S_L_MMR6
    0U,	// CVT_S_PL64
    0U,	// CVT_S_PU64
    0U,	// CVT_S_W
    0U,	// CVT_S_W_MM
    0U,	// CVT_S_W_MMR6
    0U,	// CVT_W_D32
    0U,	// CVT_W_D32_MM
    0U,	// CVT_W_D64
    0U,	// CVT_W_D64_MM
    0U,	// CVT_W_S
    0U,	// CVT_W_S_MM
    0U,	// CVT_W_S_MMR6
    128U,	// C_EQ_D32
    128U,	// C_EQ_D32_MM
    128U,	// C_EQ_D64
    128U,	// C_EQ_D64_MM
    128U,	// C_EQ_S
    128U,	// C_EQ_S_MM
    128U,	// C_F_D32
    128U,	// C_F_D32_MM
    128U,	// C_F_D64
    128U,	// C_F_D64_MM
    128U,	// C_F_S
    128U,	// C_F_S_MM
    128U,	// C_LE_D32
    128U,	// C_LE_D32_MM
    128U,	// C_LE_D64
    128U,	// C_LE_D64_MM
    128U,	// C_LE_S
    128U,	// C_LE_S_MM
    128U,	// C_LT_D32
    128U,	// C_LT_D32_MM
    128U,	// C_LT_D64
    128U,	// C_LT_D64_MM
    128U,	// C_LT_S
    128U,	// C_LT_S_MM
    128U,	// C_NGE_D32
    128U,	// C_NGE_D32_MM
    128U,	// C_NGE_D64
    128U,	// C_NGE_D64_MM
    128U,	// C_NGE_S
    128U,	// C_NGE_S_MM
    128U,	// C_NGLE_D32
    128U,	// C_NGLE_D32_MM
    128U,	// C_NGLE_D64
    128U,	// C_NGLE_D64_MM
    128U,	// C_NGLE_S
    128U,	// C_NGLE_S_MM
    128U,	// C_NGL_D32
    128U,	// C_NGL_D32_MM
    128U,	// C_NGL_D64
    128U,	// C_NGL_D64_MM
    128U,	// C_NGL_S
    128U,	// C_NGL_S_MM
    128U,	// C_NGT_D32
    128U,	// C_NGT_D32_MM
    128U,	// C_NGT_D64
    128U,	// C_NGT_D64_MM
    128U,	// C_NGT_S
    128U,	// C_NGT_S_MM
    128U,	// C_OLE_D32
    128U,	// C_OLE_D32_MM
    128U,	// C_OLE_D64
    128U,	// C_OLE_D64_MM
    128U,	// C_OLE_S
    128U,	// C_OLE_S_MM
    128U,	// C_OLT_D32
    128U,	// C_OLT_D32_MM
    128U,	// C_OLT_D64
    128U,	// C_OLT_D64_MM
    128U,	// C_OLT_S
    128U,	// C_OLT_S_MM
    128U,	// C_SEQ_D32
    128U,	// C_SEQ_D32_MM
    128U,	// C_SEQ_D64
    128U,	// C_SEQ_D64_MM
    128U,	// C_SEQ_S
    128U,	// C_SEQ_S_MM
    128U,	// C_SF_D32
    128U,	// C_SF_D32_MM
    128U,	// C_SF_D64
    128U,	// C_SF_D64_MM
    128U,	// C_SF_S
    128U,	// C_SF_S_MM
    128U,	// C_UEQ_D32
    128U,	// C_UEQ_D32_MM
    128U,	// C_UEQ_D64
    128U,	// C_UEQ_D64_MM
    128U,	// C_UEQ_S
    128U,	// C_UEQ_S_MM
    128U,	// C_ULE_D32
    128U,	// C_ULE_D32_MM
    128U,	// C_ULE_D64
    128U,	// C_ULE_D64_MM
    128U,	// C_ULE_S
    128U,	// C_ULE_S_MM
    128U,	// C_ULT_D32
    128U,	// C_ULT_D32_MM
    128U,	// C_ULT_D64
    128U,	// C_ULT_D64_MM
    128U,	// C_ULT_S
    128U,	// C_ULT_S_MM
    128U,	// C_UN_D32
    128U,	// C_UN_D32_MM
    128U,	// C_UN_D64
    128U,	// C_UN_D64_MM
    128U,	// C_UN_S
    128U,	// C_UN_S_MM
    0U,	// CmpRxRy16
    1U,	// CmpiRxImm16
    0U,	// CmpiRxImmX16
    128U,	// DADD
    128U,	// DADDi
    128U,	// DADDiu
    128U,	// DADDu
    16U,	// DAHI
    3072U,	// DALIGN
    16U,	// DATI
    16U,	// DAUI
    0U,	// DBITSWAP
    0U,	// DCLO
    0U,	// DCLO_R6
    0U,	// DCLZ
    0U,	// DCLZ_R6
    128U,	// DDIV
    128U,	// DDIVU
    0U,	// DERET
    0U,	// DERET_MM
    0U,	// DERET_MMR6
    0U,	// DERET_NM
    4128U,	// DEXT
    5152U,	// DEXT64_32
    6168U,	// DEXTM
    452U,	// DEXTU
    0U,	// DI
    7200U,	// DINS
    8216U,	// DINSM
    580U,	// DINSU
    128U,	// DIV
    128U,	// DIVU
    128U,	// DIVU_MMR6
    128U,	// DIVU_NM
    128U,	// DIV_MMR6
    128U,	// DIV_NM
    128U,	// DIV_S_B
    128U,	// DIV_S_D
    128U,	// DIV_S_H
    128U,	// DIV_S_W
    128U,	// DIV_U_B
    128U,	// DIV_U_D
    128U,	// DIV_U_H
    128U,	// DIV_U_W
    0U,	// DI_MM
    0U,	// DI_MMR6
    0U,	// DI_NM
    9216U,	// DLSA
    9216U,	// DLSA_R6
    136U,	// DMFC0
    0U,	// DMFC1
    136U,	// DMFC2
    0U,	// DMFC2_OCTEON
    136U,	// DMFGC0
    128U,	// DMOD
    128U,	// DMODU
    0U,	// DMT
    0U,	// DMTC0
    0U,	// DMTC1
    0U,	// DMTC2
    0U,	// DMTC2_OCTEON
    0U,	// DMTGC0
    0U,	// DMT_NM
    128U,	// DMUH
    128U,	// DMUHU
    128U,	// DMUL
    0U,	// DMULT
    0U,	// DMULTu
    128U,	// DMULU
    128U,	// DMUL_R6
    128U,	// DOTP_S_D
    128U,	// DOTP_S_H
    128U,	// DOTP_S_W
    128U,	// DOTP_U_D
    128U,	// DOTP_U_H
    128U,	// DOTP_U_W
    184U,	// DPADD_S_D
    184U,	// DPADD_S_H
    184U,	// DPADD_S_W
    184U,	// DPADD_U_D
    184U,	// DPADD_U_H
    184U,	// DPADD_U_W
    128U,	// DPAQX_SA_W_PH
    128U,	// DPAQX_SA_W_PH_MMR2
    128U,	// DPAQX_S_W_PH
    128U,	// DPAQX_S_W_PH_MMR2
    128U,	// DPAQ_SA_L_W
    128U,	// DPAQ_SA_L_W_MM
    128U,	// DPAQ_S_W_PH
    128U,	// DPAQ_S_W_PH_MM
    128U,	// DPAU_H_QBL
    128U,	// DPAU_H_QBL_MM
    128U,	// DPAU_H_QBR
    128U,	// DPAU_H_QBR_MM
    128U,	// DPAX_W_PH
    128U,	// DPAX_W_PH_MMR2
    128U,	// DPA_W_PH
    128U,	// DPA_W_PH_MMR2
    0U,	// DPOP
    128U,	// DPSQX_SA_W_PH
    128U,	// DPSQX_SA_W_PH_MMR2
    128U,	// DPSQX_S_W_PH
    128U,	// DPSQX_S_W_PH_MMR2
    128U,	// DPSQ_SA_L_W
    128U,	// DPSQ_SA_L_W_MM
    128U,	// DPSQ_S_W_PH
    128U,	// DPSQ_S_W_PH_MM
    184U,	// DPSUB_S_D
    184U,	// DPSUB_S_H
    184U,	// DPSUB_S_W
    184U,	// DPSUB_U_D
    184U,	// DPSUB_U_H
    184U,	// DPSUB_U_W
    128U,	// DPSU_H_QBL
    128U,	// DPSU_H_QBL_MM
    128U,	// DPSU_H_QBR
    128U,	// DPSU_H_QBR_MM
    128U,	// DPSX_W_PH
    128U,	// DPSX_W_PH_MMR2
    128U,	// DPS_W_PH
    128U,	// DPS_W_PH_MMR2
    160U,	// DROTR
    152U,	// DROTR32
    128U,	// DROTRV
    0U,	// DSBH
    0U,	// DSDIV
    0U,	// DSHD
    160U,	// DSLL
    152U,	// DSLL32
    1U,	// DSLL64_32
    128U,	// DSLLV
    160U,	// DSRA
    152U,	// DSRA32
    128U,	// DSRAV
    160U,	// DSRL
    152U,	// DSRL32
    128U,	// DSRLV
    128U,	// DSUB
    128U,	// DSUBu
    0U,	// DUDIV
    0U,	// DVP
    0U,	// DVPE
    0U,	// DVPE_NM
    0U,	// DVP_MMR6
    0U,	// DivRxRy16
    0U,	// DivuRxRy16
    0U,	// EHB
    0U,	// EHB_MM
    0U,	// EHB_MMR6
    0U,	// EHB_NM
    0U,	// EI
    0U,	// EI_MM
    0U,	// EI_MMR6
    0U,	// EI_NM
    0U,	// EMT
    0U,	// EMT_NM
    0U,	// ERET
    0U,	// ERETNC
    0U,	// ERETNC_MMR6
    0U,	// ERETNC_NM
    0U,	// ERET_MM
    0U,	// ERET_MMR6
    0U,	// ERET_NM
    0U,	// EVP
    0U,	// EVPE
    0U,	// EVPE_NM
    0U,	// EVP_MMR6
    5144U,	// EXT
    152U,	// EXTP
    152U,	// EXTPDP
    128U,	// EXTPDPV
    128U,	// EXTPDPV_MM
    152U,	// EXTPDP_MM
    128U,	// EXTPV
    128U,	// EXTPV_MM
    152U,	// EXTP_MM
    128U,	// EXTRV_RS_W
    128U,	// EXTRV_RS_W_MM
    128U,	// EXTRV_R_W
    128U,	// EXTRV_R_W_MM
    128U,	// EXTRV_S_H
    128U,	// EXTRV_S_H_MM
    128U,	// EXTRV_W
    128U,	// EXTRV_W_MM
    152U,	// EXTR_RS_W
    152U,	// EXTR_RS_W_MM
    152U,	// EXTR_R_W
    152U,	// EXTR_R_W_MM
    152U,	// EXTR_S_H
    152U,	// EXTR_S_H_MM
    152U,	// EXTR_W
    152U,	// EXTR_W_MM
    2072U,	// EXTS
    2072U,	// EXTS32
    2048U,	// EXTW_NM
    5144U,	// EXT_MM
    5144U,	// EXT_MMR6
    5144U,	// EXT_NM
    0U,	// FABS_D32
    0U,	// FABS_D32_MM
    0U,	// FABS_D64
    0U,	// FABS_D64_MM
    0U,	// FABS_S
    0U,	// FABS_S_MM
    128U,	// FADD_D
    128U,	// FADD_D32
    128U,	// FADD_D32_MM
    128U,	// FADD_D64
    128U,	// FADD_D64_MM
    128U,	// FADD_PS64
    128U,	// FADD_S
    128U,	// FADD_S_MM
    72U,	// FADD_S_MMR6
    128U,	// FADD_W
    128U,	// FCAF_D
    128U,	// FCAF_W
    128U,	// FCEQ_D
    128U,	// FCEQ_W
    0U,	// FCLASS_D
    0U,	// FCLASS_W
    128U,	// FCLE_D
    128U,	// FCLE_W
    128U,	// FCLT_D
    128U,	// FCLT_W
    0U,	// FCMP_D32
    0U,	// FCMP_D32_MM
    0U,	// FCMP_D64
    0U,	// FCMP_S32
    0U,	// FCMP_S32_MM
    128U,	// FCNE_D
    128U,	// FCNE_W
    128U,	// FCOR_D
    128U,	// FCOR_W
    128U,	// FCUEQ_D
    128U,	// FCUEQ_W
    128U,	// FCULE_D
    128U,	// FCULE_W
    128U,	// FCULT_D
    128U,	// FCULT_W
    128U,	// FCUNE_D
    128U,	// FCUNE_W
    128U,	// FCUN_D
    128U,	// FCUN_W
    128U,	// FDIV_D
    128U,	// FDIV_D32
    128U,	// FDIV_D32_MM
    128U,	// FDIV_D64
    128U,	// FDIV_D64_MM
    128U,	// FDIV_S
    128U,	// FDIV_S_MM
    72U,	// FDIV_S_MMR6
    128U,	// FDIV_W
    128U,	// FEXDO_H
    128U,	// FEXDO_W
    128U,	// FEXP2_D
    128U,	// FEXP2_W
    0U,	// FEXUPL_D
    0U,	// FEXUPL_W
    0U,	// FEXUPR_D
    0U,	// FEXUPR_W
    0U,	// FFINT_S_D
    0U,	// FFINT_S_W
    0U,	// FFINT_U_D
    0U,	// FFINT_U_W
    0U,	// FFQL_D
    0U,	// FFQL_W
    0U,	// FFQR_D
    0U,	// FFQR_W
    0U,	// FILL_B
    0U,	// FILL_D
    0U,	// FILL_H
    0U,	// FILL_W
    0U,	// FLOG2_D
    0U,	// FLOG2_W
    0U,	// FLOOR_L_D64
    0U,	// FLOOR_L_D_MMR6
    0U,	// FLOOR_L_S
    0U,	// FLOOR_L_S_MMR6
    0U,	// FLOOR_W_D32
    0U,	// FLOOR_W_D64
    0U,	// FLOOR_W_D_MMR6
    0U,	// FLOOR_W_MM
    0U,	// FLOOR_W_S
    0U,	// FLOOR_W_S_MM
    0U,	// FLOOR_W_S_MMR6
    184U,	// FMADD_D
    184U,	// FMADD_W
    128U,	// FMAX_A_D
    128U,	// FMAX_A_W
    128U,	// FMAX_D
    128U,	// FMAX_W
    128U,	// FMIN_A_D
    128U,	// FMIN_A_W
    128U,	// FMIN_D
    128U,	// FMIN_W
    0U,	// FMOV_D32
    0U,	// FMOV_D32_MM
    0U,	// FMOV_D64
    0U,	// FMOV_D64_MM
    0U,	// FMOV_D_MMR6
    0U,	// FMOV_S
    0U,	// FMOV_S_MM
    0U,	// FMOV_S_MMR6
    184U,	// FMSUB_D
    184U,	// FMSUB_W
    128U,	// FMUL_D
    128U,	// FMUL_D32
    128U,	// FMUL_D32_MM
    128U,	// FMUL_D64
    128U,	// FMUL_D64_MM
    128U,	// FMUL_PS64
    128U,	// FMUL_S
    128U,	// FMUL_S_MM
    72U,	// FMUL_S_MMR6
    128U,	// FMUL_W
    0U,	// FNEG_D32
    0U,	// FNEG_D32_MM
    0U,	// FNEG_D64
    0U,	// FNEG_D64_MM
    0U,	// FNEG_S
    0U,	// FNEG_S_MM
    0U,	// FNEG_S_MMR6
    1U,	// FORK
    1U,	// FORK_NM
    0U,	// FRCP_D
    0U,	// FRCP_W
    0U,	// FRINT_D
    0U,	// FRINT_W
    0U,	// FRSQRT_D
    0U,	// FRSQRT_W
    128U,	// FSAF_D
    128U,	// FSAF_W
    128U,	// FSEQ_D
    128U,	// FSEQ_W
    128U,	// FSLE_D
    128U,	// FSLE_W
    128U,	// FSLT_D
    128U,	// FSLT_W
    128U,	// FSNE_D
    128U,	// FSNE_W
    128U,	// FSOR_D
    128U,	// FSOR_W
    0U,	// FSQRT_D
    0U,	// FSQRT_D32
    0U,	// FSQRT_D32_MM
    0U,	// FSQRT_D64
    0U,	// FSQRT_D64_MM
    0U,	// FSQRT_S
    0U,	// FSQRT_S_MM
    0U,	// FSQRT_W
    128U,	// FSUB_D
    128U,	// FSUB_D32
    128U,	// FSUB_D32_MM
    128U,	// FSUB_D64
    128U,	// FSUB_D64_MM
    128U,	// FSUB_PS64
    128U,	// FSUB_S
    128U,	// FSUB_S_MM
    72U,	// FSUB_S_MMR6
    128U,	// FSUB_W
    128U,	// FSUEQ_D
    128U,	// FSUEQ_W
    128U,	// FSULE_D
    128U,	// FSULE_W
    128U,	// FSULT_D
    128U,	// FSULT_W
    128U,	// FSUNE_D
    128U,	// FSUNE_W
    128U,	// FSUN_D
    128U,	// FSUN_W
    0U,	// FTINT_S_D
    0U,	// FTINT_S_W
    0U,	// FTINT_U_D
    0U,	// FTINT_U_W
    128U,	// FTQ_H
    128U,	// FTQ_W
    0U,	// FTRUNC_S_D
    0U,	// FTRUNC_S_W
    0U,	// FTRUNC_U_D
    0U,	// FTRUNC_U_W
    0U,	// GINVI
    0U,	// GINVI_MMR6
    0U,	// GINVI_NM
    0U,	// GINVT
    0U,	// GINVT_MMR6
    0U,	// GINVT_NM
    128U,	// HADD_S_D
    128U,	// HADD_S_H
    128U,	// HADD_S_W
    128U,	// HADD_U_D
    128U,	// HADD_U_H
    128U,	// HADD_U_W
    128U,	// HSUB_S_D
    128U,	// HSUB_S_H
    128U,	// HSUB_S_W
    128U,	// HSUB_U_D
    128U,	// HSUB_U_H
    128U,	// HSUB_U_W
    0U,	// HYPCALL
    0U,	// HYPCALL_MM
    128U,	// ILVEV_B
    128U,	// ILVEV_D
    128U,	// ILVEV_H
    128U,	// ILVEV_W
    128U,	// ILVL_B
    128U,	// ILVL_D
    128U,	// ILVL_H
    128U,	// ILVL_W
    128U,	// ILVOD_B
    128U,	// ILVOD_D
    128U,	// ILVOD_H
    128U,	// ILVOD_W
    128U,	// ILVR_B
    128U,	// ILVR_D
    128U,	// ILVR_H
    128U,	// ILVR_W
    7192U,	// INS
    0U,	// INSERT_B
    0U,	// INSERT_D
    0U,	// INSERT_H
    0U,	// INSERT_W
    0U,	// INSV
    0U,	// INSVE_B
    0U,	// INSVE_D
    0U,	// INSVE_H
    0U,	// INSVE_W
    0U,	// INSV_MM
    7192U,	// INS_MM
    7192U,	// INS_MMR6
    7192U,	// INS_NM
    0U,	// J
    0U,	// JAL
    0U,	// JALR
    0U,	// JALR16_MM
    0U,	// JALR64
    0U,	// JALRC16_MMR6
    0U,	// JALRC16_NM
    0U,	// JALRCHB_NM
    0U,	// JALRC_HB_MMR6
    0U,	// JALRC_MMR6
    0U,	// JALRC_NM
    0U,	// JALRS16_MM
    0U,	// JALRS_MM
    0U,	// JALR_HB
    0U,	// JALR_HB64
    0U,	// JALR_MM
    0U,	// JALS_MM
    0U,	// JALX
    0U,	// JALX_MM
    0U,	// JAL_MM
    0U,	// JIALC
    0U,	// JIALC64
    0U,	// JIALC_MMR6
    0U,	// JIC
    0U,	// JIC64
    0U,	// JIC_MMR6
    0U,	// JR
    0U,	// JR16_MM
    0U,	// JR64
    0U,	// JRADDIUSP
    0U,	// JRC16_MM
    0U,	// JRC16_MMR6
    0U,	// JRCADDIUSP_MMR6
    0U,	// JRC_NM
    0U,	// JR_HB
    0U,	// JR_HB64
    0U,	// JR_HB64_R6
    0U,	// JR_HB_R6
    0U,	// JR_MM
    0U,	// J_MM
    0U,	// Jal16
    0U,	// JalB16
    0U,	// JrRa16
    0U,	// JrcRa16
    0U,	// JrcRx16
    0U,	// JumpLinkReg16
    0U,	// LAPC32_NM
    0U,	// LAPC48_NM
    0U,	// LB
    0U,	// LB16_NM
    0U,	// LB64
    0U,	// LBE
    0U,	// LBE_MM
    0U,	// LBGP_NM
    0U,	// LBU16_MM
    0U,	// LBU16_NM
    0U,	// LBUGP_NM
    1U,	// LBUX
    1U,	// LBUX_MM
    0U,	// LBUX_NM
    0U,	// LBU_MMR6
    0U,	// LBU_NM
    0U,	// LBUs9_NM
    0U,	// LBX_NM
    0U,	// LB_MM
    0U,	// LB_MMR6
    0U,	// LB_NM
    0U,	// LBs9_NM
    0U,	// LBu
    0U,	// LBu64
    0U,	// LBuE
    0U,	// LBuE_MM
    0U,	// LBu_MM
    0U,	// LD
    0U,	// LDC1
    0U,	// LDC164
    0U,	// LDC1_D64_MMR6
    0U,	// LDC1_MM_D32
    0U,	// LDC1_MM_D64
    0U,	// LDC2
    0U,	// LDC2_MMR6
    0U,	// LDC2_R6
    0U,	// LDC3
    0U,	// LDI_B
    0U,	// LDI_D
    0U,	// LDI_H
    0U,	// LDI_W
    0U,	// LDL
    0U,	// LDPC
    0U,	// LDR
    1U,	// LDXC1
    1U,	// LDXC164
    0U,	// LD_B
    0U,	// LD_D
    0U,	// LD_H
    0U,	// LD_W
    0U,	// LEA_ADDIU_NM
    0U,	// LEA_ADDiu
    0U,	// LEA_ADDiu64
    0U,	// LEA_ADDiu_MM
    0U,	// LH
    0U,	// LH16_NM
    0U,	// LH64
    0U,	// LHE
    0U,	// LHE_MM
    0U,	// LHGP_NM
    0U,	// LHU16_MM
    0U,	// LHU16_NM
    0U,	// LHUGP_NM
    0U,	// LHUXS_NM
    0U,	// LHUX_NM
    0U,	// LHU_NM
    0U,	// LHUs9_NM
    1U,	// LHX
    0U,	// LHXS_NM
    1U,	// LHX_MM
    0U,	// LHX_NM
    0U,	// LH_MM
    0U,	// LH_NM
    0U,	// LHs9_NM
    0U,	// LHu
    0U,	// LHu64
    0U,	// LHuE
    0U,	// LHuE_MM
    0U,	// LHu_MM
    0U,	// LI16_MM
    0U,	// LI16_MMR6
    0U,	// LI16_NM
    0U,	// LI48_NM
    0U,	// LL
    0U,	// LL64
    0U,	// LL64_R6
    0U,	// LLD
    0U,	// LLD_R6
    0U,	// LLE
    0U,	// LLE_MM
    76U,	// LLWP_NM
    0U,	// LL_MM
    0U,	// LL_MMR6
    0U,	// LL_NM
    0U,	// LL_R6
    9216U,	// LSA
    1U,	// LSA_MMR6
    1024U,	// LSA_NM
    9216U,	// LSA_R6
    0U,	// LUI_MMR6
    0U,	// LUI_NM
    1U,	// LUXC1
    1U,	// LUXC164
    1U,	// LUXC1_MM
    0U,	// LUi
    0U,	// LUi64
    0U,	// LUi_MM
    0U,	// LW
    0U,	// LW16_MM
    0U,	// LW16_NM
    0U,	// LW4x4_NM
    0U,	// LW64
    0U,	// LWC1
    0U,	// LWC1_MM
    0U,	// LWC2
    0U,	// LWC2_MMR6
    0U,	// LWC2_R6
    0U,	// LWC3
    0U,	// LWDSP
    0U,	// LWDSP_MM
    0U,	// LWE
    0U,	// LWE_MM
    0U,	// LWGP16_NM
    0U,	// LWGP_MM
    0U,	// LWGP_NM
    0U,	// LWL
    0U,	// LWL64
    0U,	// LWLE
    0U,	// LWLE_MM
    0U,	// LWL_MM
    0U,	// LWM16_MM
    0U,	// LWM16_MMR6
    0U,	// LWM32_MM
    184U,	// LWM_NM
    0U,	// LWPC
    0U,	// LWPC_MMR6
    0U,	// LWPC_NM
    0U,	// LWP_MM
    0U,	// LWR
    0U,	// LWR64
    0U,	// LWRE
    0U,	// LWRE_MM
    0U,	// LWR_MM
    0U,	// LWSP16_NM
    0U,	// LWSP_MM
    0U,	// LWUPC
    0U,	// LWU_MM
    1U,	// LWX
    1U,	// LWXC1
    1U,	// LWXC1_MM
    0U,	// LWXS16_NM
    1U,	// LWXS_MM
    0U,	// LWXS_NM
    1U,	// LWX_MM
    0U,	// LWX_NM
    0U,	// LW_MM
    0U,	// LW_MMR6
    0U,	// LW_NM
    0U,	// LWs9_NM
    0U,	// LWu
    0U,	// LbRxRyOffMemX16
    0U,	// LbuRxRyOffMemX16
    0U,	// LhRxRyOffMemX16
    0U,	// LhuRxRyOffMemX16
    1U,	// LiRxImm16
    0U,	// LiRxImmAlignX16
    0U,	// LiRxImmX16
    1U,	// LwRxPcTcp16
    0U,	// LwRxPcTcpX16
    0U,	// LwRxRyOffMemX16
    0U,	// LwRxSpImmX16
    0U,	// MADD
    184U,	// MADDF_D
    184U,	// MADDF_D_MMR6
    184U,	// MADDF_S
    184U,	// MADDF_S_MMR6
    184U,	// MADDR_Q_H
    184U,	// MADDR_Q_W
    0U,	// MADDU
    128U,	// MADDU_DSP
    128U,	// MADDU_DSP_MM
    0U,	// MADDU_MM
    184U,	// MADDV_B
    184U,	// MADDV_D
    184U,	// MADDV_H
    184U,	// MADDV_W
    0U,	// MADD_D32
    0U,	// MADD_D32_MM
    0U,	// MADD_D64
    128U,	// MADD_DSP
    128U,	// MADD_DSP_MM
    0U,	// MADD_MM
    184U,	// MADD_Q_H
    184U,	// MADD_Q_W
    0U,	// MADD_S
    0U,	// MADD_S_MM
    128U,	// MAQ_SA_W_PHL
    128U,	// MAQ_SA_W_PHL_MM
    128U,	// MAQ_SA_W_PHR
    128U,	// MAQ_SA_W_PHR_MM
    128U,	// MAQ_S_W_PHL
    128U,	// MAQ_S_W_PHL_MM
    128U,	// MAQ_S_W_PHR
    128U,	// MAQ_S_W_PHR_MM
    128U,	// MAXA_D
    128U,	// MAXA_D_MMR6
    128U,	// MAXA_S
    128U,	// MAXA_S_MMR6
    128U,	// MAXI_S_B
    128U,	// MAXI_S_D
    128U,	// MAXI_S_H
    128U,	// MAXI_S_W
    152U,	// MAXI_U_B
    152U,	// MAXI_U_D
    152U,	// MAXI_U_H
    152U,	// MAXI_U_W
    128U,	// MAX_A_B
    128U,	// MAX_A_D
    128U,	// MAX_A_H
    128U,	// MAX_A_W
    128U,	// MAX_D
    128U,	// MAX_D_MMR6
    128U,	// MAX_S
    128U,	// MAX_S_B
    128U,	// MAX_S_D
    128U,	// MAX_S_H
    128U,	// MAX_S_MMR6
    128U,	// MAX_S_W
    128U,	// MAX_U_B
    128U,	// MAX_U_D
    128U,	// MAX_U_H
    128U,	// MAX_U_W
    136U,	// MFC0
    0U,	// MFC0Sel_NM
    136U,	// MFC0_MMR6
    152U,	// MFC0_NM
    0U,	// MFC1
    0U,	// MFC1_D64
    0U,	// MFC1_MM
    0U,	// MFC1_MMR6
    136U,	// MFC2
    0U,	// MFC2_MMR6
    136U,	// MFGC0
    136U,	// MFGC0_MM
    0U,	// MFHC0Sel_NM
    136U,	// MFHC0_MMR6
    152U,	// MFHC0_NM
    0U,	// MFHC1_D32
    0U,	// MFHC1_D32_MM
    0U,	// MFHC1_D64
    0U,	// MFHC1_D64_MM
    0U,	// MFHC2_MMR6
    136U,	// MFHGC0
    136U,	// MFHGC0_MM
    0U,	// MFHI
    0U,	// MFHI16_MM
    0U,	// MFHI64
    0U,	// MFHI_DSP
    0U,	// MFHI_DSP_MM
    0U,	// MFHI_MM
    0U,	// MFLO
    0U,	// MFLO16_MM
    0U,	// MFLO64
    0U,	// MFLO_DSP
    0U,	// MFLO_DSP_MM
    0U,	// MFLO_MM
    19520U,	// MFTR
    19520U,	// MFTR_NM
    128U,	// MINA_D
    128U,	// MINA_D_MMR6
    128U,	// MINA_S
    128U,	// MINA_S_MMR6
    128U,	// MINI_S_B
    128U,	// MINI_S_D
    128U,	// MINI_S_H
    128U,	// MINI_S_W
    152U,	// MINI_U_B
    152U,	// MINI_U_D
    152U,	// MINI_U_H
    152U,	// MINI_U_W
    128U,	// MIN_A_B
    128U,	// MIN_A_D
    128U,	// MIN_A_H
    128U,	// MIN_A_W
    128U,	// MIN_D
    128U,	// MIN_D_MMR6
    128U,	// MIN_S
    128U,	// MIN_S_B
    128U,	// MIN_S_D
    128U,	// MIN_S_H
    128U,	// MIN_S_MMR6
    128U,	// MIN_S_W
    128U,	// MIN_U_B
    128U,	// MIN_U_D
    128U,	// MIN_U_H
    128U,	// MIN_U_W
    128U,	// MOD
    128U,	// MODSUB
    128U,	// MODSUB_MM
    128U,	// MODU
    128U,	// MODU_MMR6
    128U,	// MODU_NM
    128U,	// MOD_MMR6
    128U,	// MOD_NM
    128U,	// MOD_S_B
    128U,	// MOD_S_D
    128U,	// MOD_S_H
    128U,	// MOD_S_W
    128U,	// MOD_U_B
    128U,	// MOD_U_D
    128U,	// MOD_U_H
    128U,	// MOD_U_W
    0U,	// MOVE16_MM
    0U,	// MOVE16_MMR6
    80U,	// MOVEBALC_NM
    0U,	// MOVEPREV_NM
    0U,	// MOVEP_MM
    0U,	// MOVEP_MMR6
    0U,	// MOVEP_NM
    0U,	// MOVE_NM
    0U,	// MOVE_V
    128U,	// MOVF_D32
    128U,	// MOVF_D32_MM
    128U,	// MOVF_D64
    128U,	// MOVF_I
    128U,	// MOVF_I64
    128U,	// MOVF_I_MM
    128U,	// MOVF_S
    128U,	// MOVF_S_MM
    128U,	// MOVN_I64_D64
    128U,	// MOVN_I64_I
    128U,	// MOVN_I64_I64
    128U,	// MOVN_I64_S
    128U,	// MOVN_I_D32
    128U,	// MOVN_I_D32_MM
    128U,	// MOVN_I_D64
    128U,	// MOVN_I_I
    128U,	// MOVN_I_I64
    128U,	// MOVN_I_MM
    128U,	// MOVN_I_S
    128U,	// MOVN_I_S_MM
    128U,	// MOVN_NM
    128U,	// MOVT_D32
    128U,	// MOVT_D32_MM
    128U,	// MOVT_D64
    128U,	// MOVT_I
    128U,	// MOVT_I64
    128U,	// MOVT_I_MM
    128U,	// MOVT_S
    128U,	// MOVT_S_MM
    128U,	// MOVZ_I64_D64
    128U,	// MOVZ_I64_I
    128U,	// MOVZ_I64_I64
    128U,	// MOVZ_I64_S
    128U,	// MOVZ_I_D32
    128U,	// MOVZ_I_D32_MM
    128U,	// MOVZ_I_D64
    128U,	// MOVZ_I_I
    128U,	// MOVZ_I_I64
    128U,	// MOVZ_I_MM
    128U,	// MOVZ_I_S
    128U,	// MOVZ_I_S_MM
    128U,	// MOVZ_NM
    0U,	// MSUB
    184U,	// MSUBF_D
    184U,	// MSUBF_D_MMR6
    184U,	// MSUBF_S
    184U,	// MSUBF_S_MMR6
    184U,	// MSUBR_Q_H
    184U,	// MSUBR_Q_W
    0U,	// MSUBU
    128U,	// MSUBU_DSP
    128U,	// MSUBU_DSP_MM
    0U,	// MSUBU_MM
    184U,	// MSUBV_B
    184U,	// MSUBV_D
    184U,	// MSUBV_H
    184U,	// MSUBV_W
    0U,	// MSUB_D32
    0U,	// MSUB_D32_MM
    0U,	// MSUB_D64
    128U,	// MSUB_DSP
    128U,	// MSUB_DSP_MM
    0U,	// MSUB_MM
    184U,	// MSUB_Q_H
    184U,	// MSUB_Q_W
    0U,	// MSUB_S
    0U,	// MSUB_S_MM
    0U,	// MTC0
    0U,	// MTC0Sel_NM
    0U,	// MTC0_MMR6
    152U,	// MTC0_NM
    0U,	// MTC1
    0U,	// MTC1_D64
    0U,	// MTC1_D64_MM
    0U,	// MTC1_MM
    0U,	// MTC1_MMR6
    0U,	// MTC2
    0U,	// MTC2_MMR6
    0U,	// MTGC0
    0U,	// MTGC0_MM
    0U,	// MTHC0Sel_NM
    0U,	// MTHC0_MMR6
    152U,	// MTHC0_NM
    0U,	// MTHC1_D32
    0U,	// MTHC1_D32_MM
    0U,	// MTHC1_D64
    0U,	// MTHC1_D64_MM
    0U,	// MTHC2_MMR6
    0U,	// MTHGC0
    0U,	// MTHGC0_MM
    0U,	// MTHI
    0U,	// MTHI64
    0U,	// MTHI_DSP
    0U,	// MTHI_DSP_MM
    0U,	// MTHI_MM
    0U,	// MTHLIP
    0U,	// MTHLIP_MM
    0U,	// MTLO
    0U,	// MTLO64
    0U,	// MTLO_DSP
    0U,	// MTLO_DSP_MM
    0U,	// MTLO_MM
    0U,	// MTM0
    0U,	// MTM1
    0U,	// MTM2
    0U,	// MTP0
    0U,	// MTP1
    0U,	// MTP2
    2U,	// MTTR
    2U,	// MTTR_NM
    128U,	// MUH
    128U,	// MUHU
    128U,	// MUHU_MMR6
    128U,	// MUHU_NM
    128U,	// MUH_MMR6
    128U,	// MUH_NM
    128U,	// MUL
    128U,	// MUL4x4_NM
    128U,	// MULEQ_S_W_PHL
    128U,	// MULEQ_S_W_PHL_MM
    128U,	// MULEQ_S_W_PHR
    128U,	// MULEQ_S_W_PHR_MM
    128U,	// MULEU_S_PH_QBL
    128U,	// MULEU_S_PH_QBL_MM
    128U,	// MULEU_S_PH_QBR
    128U,	// MULEU_S_PH_QBR_MM
    128U,	// MULQ_RS_PH
    128U,	// MULQ_RS_PH_MM
    128U,	// MULQ_RS_W
    128U,	// MULQ_RS_W_MMR2
    128U,	// MULQ_S_PH
    128U,	// MULQ_S_PH_MMR2
    128U,	// MULQ_S_W
    128U,	// MULQ_S_W_MMR2
    128U,	// MULR_PS64
    128U,	// MULR_Q_H
    128U,	// MULR_Q_W
    128U,	// MULSAQ_S_W_PH
    128U,	// MULSAQ_S_W_PH_MM
    128U,	// MULSA_W_PH
    128U,	// MULSA_W_PH_MMR2
    0U,	// MULT
    128U,	// MULTU_DSP
    128U,	// MULTU_DSP_MM
    128U,	// MULT_DSP
    128U,	// MULT_DSP_MM
    0U,	// MULT_MM
    0U,	// MULTu
    0U,	// MULTu_MM
    128U,	// MULU
    128U,	// MULU_MMR6
    128U,	// MULU_NM
    128U,	// MULV_B
    128U,	// MULV_D
    128U,	// MULV_H
    128U,	// MULV_W
    128U,	// MUL_MM
    128U,	// MUL_MMR6
    128U,	// MUL_NM
    128U,	// MUL_PH
    128U,	// MUL_PH_MMR2
    128U,	// MUL_Q_H
    128U,	// MUL_Q_W
    128U,	// MUL_R6
    128U,	// MUL_S_PH
    128U,	// MUL_S_PH_MMR2
    0U,	// Mfhi16
    0U,	// Mflo16
    0U,	// Move32R16
    0U,	// MoveR3216
    0U,	// NLOC_B
    0U,	// NLOC_D
    0U,	// NLOC_H
    0U,	// NLOC_W
    0U,	// NLZC_B
    0U,	// NLZC_D
    0U,	// NLZC_H
    0U,	// NLZC_W
    0U,	// NMADD_D32
    0U,	// NMADD_D32_MM
    0U,	// NMADD_D64
    0U,	// NMADD_S
    0U,	// NMADD_S_MM
    0U,	// NMSUB_D32
    0U,	// NMSUB_D32_MM
    0U,	// NMSUB_D64
    0U,	// NMSUB_S
    0U,	// NMSUB_S_MM
    0U,	// NOP32_NM
    0U,	// NOP_NM
    128U,	// NOR
    128U,	// NOR64
    20U,	// NORI_B
    128U,	// NOR_MM
    128U,	// NOR_MMR6
    128U,	// NOR_NM
    128U,	// NOR_V
    0U,	// NOT16_MM
    0U,	// NOT16_MMR6
    0U,	// NOT16_NM
    0U,	// NegRxRy16
    0U,	// NotRxRy16
    128U,	// OR
    0U,	// OR16_MM
    0U,	// OR16_MMR6
    128U,	// OR16_NM
    128U,	// OR64
    20U,	// ORI_B
    16U,	// ORI_MMR6
    128U,	// ORI_NM
    128U,	// OR_MM
    128U,	// OR_MMR6
    128U,	// OR_NM
    128U,	// OR_V
    16U,	// ORi
    16U,	// ORi64
    16U,	// ORi_MM
    0U,	// OrRxRxRy16
    128U,	// PACKRL_PH
    128U,	// PACKRL_PH_MM
    0U,	// PAUSE
    0U,	// PAUSE_MM
    0U,	// PAUSE_MMR6
    0U,	// PAUSE_NM
    128U,	// PCKEV_B
    128U,	// PCKEV_D
    128U,	// PCKEV_H
    128U,	// PCKEV_W
    128U,	// PCKOD_B
    128U,	// PCKOD_D
    128U,	// PCKOD_H
    128U,	// PCKOD_W
    0U,	// PCNT_B
    0U,	// PCNT_D
    0U,	// PCNT_H
    0U,	// PCNT_W
    128U,	// PICK_PH
    128U,	// PICK_PH_MM
    128U,	// PICK_QB
    128U,	// PICK_QB_MM
    128U,	// PLL_PS64
    128U,	// PLU_PS64
    0U,	// POP
    0U,	// PRECEQU_PH_QBL
    0U,	// PRECEQU_PH_QBLA
    0U,	// PRECEQU_PH_QBLA_MM
    0U,	// PRECEQU_PH_QBL_MM
    0U,	// PRECEQU_PH_QBR
    0U,	// PRECEQU_PH_QBRA
    0U,	// PRECEQU_PH_QBRA_MM
    0U,	// PRECEQU_PH_QBR_MM
    0U,	// PRECEQ_W_PHL
    0U,	// PRECEQ_W_PHL_MM
    0U,	// PRECEQ_W_PHR
    0U,	// PRECEQ_W_PHR_MM
    0U,	// PRECEU_PH_QBL
    0U,	// PRECEU_PH_QBLA
    0U,	// PRECEU_PH_QBLA_MM
    0U,	// PRECEU_PH_QBL_MM
    0U,	// PRECEU_PH_QBR
    0U,	// PRECEU_PH_QBRA
    0U,	// PRECEU_PH_QBRA_MM
    0U,	// PRECEU_PH_QBR_MM
    128U,	// PRECRQU_S_QB_PH
    128U,	// PRECRQU_S_QB_PH_MM
    128U,	// PRECRQ_PH_W
    128U,	// PRECRQ_PH_W_MM
    128U,	// PRECRQ_QB_PH
    128U,	// PRECRQ_QB_PH_MM
    128U,	// PRECRQ_RS_PH_W
    128U,	// PRECRQ_RS_PH_W_MM
    128U,	// PRECR_QB_PH
    128U,	// PRECR_QB_PH_MMR2
    152U,	// PRECR_SRA_PH_W
    152U,	// PRECR_SRA_PH_W_MMR2
    152U,	// PRECR_SRA_R_PH_W
    152U,	// PRECR_SRA_R_PH_W_MMR2
    0U,	// PREF
    0U,	// PREFE
    0U,	// PREFE_MM
    0U,	// PREFX_MM
    0U,	// PREF_MM
    0U,	// PREF_MMR6
    0U,	// PREF_NM
    0U,	// PREF_R6
    0U,	// PREFs9_NM
    152U,	// PREPEND
    152U,	// PREPEND_MMR2
    128U,	// PUL_PS64
    128U,	// PUU_PS64
    0U,	// RADDU_W_QB
    0U,	// RADDU_W_QB_MM
    0U,	// RDDSP
    0U,	// RDDSP_MM
    20U,	// RDHWR
    20U,	// RDHWR64
    20U,	// RDHWR_MM
    136U,	// RDHWR_MMR6
    152U,	// RDHWR_NM
    0U,	// RDPGPR_MMR6
    0U,	// RDPGPR_NM
    0U,	// RECIP_D32
    0U,	// RECIP_D32_MM
    0U,	// RECIP_D64
    0U,	// RECIP_D64_MM
    0U,	// RECIP_S
    0U,	// RECIP_S_MM
    0U,	// REPLV_PH
    0U,	// REPLV_PH_MM
    0U,	// REPLV_QB
    0U,	// REPLV_QB_MM
    0U,	// REPL_PH
    0U,	// REPL_PH_MM
    0U,	// REPL_QB
    0U,	// REPL_QB_MM
    0U,	// RESTOREJRC16_NM
    0U,	// RESTOREJRC_NM
    0U,	// RESTORE_NM
    0U,	// RINT_D
    0U,	// RINT_D_MMR6
    0U,	// RINT_S
    0U,	// RINT_S_MMR6
    152U,	// ROTR
    128U,	// ROTRV
    128U,	// ROTRV_MM
    128U,	// ROTRV_NM
    152U,	// ROTR_MM
    152U,	// ROTR_NM
    18456U,	// ROTX_NM
    0U,	// ROUND_L_D64
    0U,	// ROUND_L_D_MMR6
    0U,	// ROUND_L_S
    0U,	// ROUND_L_S_MMR6
    0U,	// ROUND_W_D32
    0U,	// ROUND_W_D64
    0U,	// ROUND_W_D_MMR6
    0U,	// ROUND_W_MM
    0U,	// ROUND_W_S
    0U,	// ROUND_W_S_MM
    0U,	// ROUND_W_S_MMR6
    0U,	// RSQRT_D32
    0U,	// RSQRT_D32_MM
    0U,	// RSQRT_D64
    0U,	// RSQRT_D64_MM
    0U,	// RSQRT_S
    0U,	// RSQRT_S_MM
    0U,	// Restore16
    0U,	// RestoreX16
    0U,	// SAA
    0U,	// SAAD
    136U,	// SAT_S_B
    160U,	// SAT_S_D
    164U,	// SAT_S_H
    152U,	// SAT_S_W
    136U,	// SAT_U_B
    160U,	// SAT_U_D
    164U,	// SAT_U_H
    152U,	// SAT_U_W
    0U,	// SAVE16_NM
    0U,	// SAVE_NM
    0U,	// SB
    0U,	// SB16_MM
    0U,	// SB16_MMR6
    0U,	// SB16_NM
    0U,	// SB64
    0U,	// SBE
    0U,	// SBE_MM
    0U,	// SBGP_NM
    0U,	// SBX_NM
    0U,	// SB_MM
    0U,	// SB_MMR6
    0U,	// SB_NM
    0U,	// SBs9_NM
    0U,	// SC
    0U,	// SC64
    0U,	// SC64_R6
    0U,	// SCD
    0U,	// SCD_R6
    0U,	// SCE
    0U,	// SCE_MM
    2U,	// SCWP_NM
    0U,	// SC_MM
    0U,	// SC_MMR6
    0U,	// SC_NM
    0U,	// SC_R6
    0U,	// SD
    0U,	// SDBBP
    0U,	// SDBBP16_MM
    0U,	// SDBBP16_MMR6
    0U,	// SDBBP16_NM
    0U,	// SDBBP_MM
    0U,	// SDBBP_MMR6
    0U,	// SDBBP_NM
    0U,	// SDBBP_R6
    0U,	// SDC1
    0U,	// SDC164
    0U,	// SDC1_D64_MMR6
    0U,	// SDC1_MM_D32
    0U,	// SDC1_MM_D64
    0U,	// SDC2
    0U,	// SDC2_MMR6
    0U,	// SDC2_R6
    0U,	// SDC3
    0U,	// SDIV
    0U,	// SDIV_MM
    0U,	// SDL
    0U,	// SDR
    1U,	// SDXC1
    1U,	// SDXC164
    0U,	// SEB
    0U,	// SEB64
    0U,	// SEB_MM
    0U,	// SEB_NM
    0U,	// SEH
    0U,	// SEH64
    0U,	// SEH_MM
    0U,	// SEH_NM
    128U,	// SELEQZ
    128U,	// SELEQZ64
    128U,	// SELEQZ_D
    128U,	// SELEQZ_D_MMR6
    128U,	// SELEQZ_MMR6
    128U,	// SELEQZ_S
    128U,	// SELEQZ_S_MMR6
    128U,	// SELNEZ
    128U,	// SELNEZ64
    128U,	// SELNEZ_D
    128U,	// SELNEZ_D_MMR6
    128U,	// SELNEZ_MMR6
    128U,	// SELNEZ_S
    128U,	// SELNEZ_S_MMR6
    184U,	// SEL_D
    184U,	// SEL_D_MMR6
    184U,	// SEL_S
    184U,	// SEL_S_MMR6
    128U,	// SEQ
    128U,	// SEQI_NM
    128U,	// SEQi
    0U,	// SH
    0U,	// SH16_MM
    0U,	// SH16_MMR6
    0U,	// SH16_NM
    0U,	// SH64
    0U,	// SHE
    0U,	// SHE_MM
    20U,	// SHF_B
    20U,	// SHF_H
    20U,	// SHF_W
    0U,	// SHGP_NM
    0U,	// SHILO
    0U,	// SHILOV
    0U,	// SHILOV_MM
    0U,	// SHILO_MM
    128U,	// SHLLV_PH
    128U,	// SHLLV_PH_MM
    128U,	// SHLLV_QB
    128U,	// SHLLV_QB_MM
    128U,	// SHLLV_S_PH
    128U,	// SHLLV_S_PH_MM
    128U,	// SHLLV_S_W
    128U,	// SHLLV_S_W_MM
    164U,	// SHLL_PH
    164U,	// SHLL_PH_MM
    136U,	// SHLL_QB
    136U,	// SHLL_QB_MM
    164U,	// SHLL_S_PH
    164U,	// SHLL_S_PH_MM
    152U,	// SHLL_S_W
    152U,	// SHLL_S_W_MM
    128U,	// SHRAV_PH
    128U,	// SHRAV_PH_MM
    128U,	// SHRAV_QB
    128U,	// SHRAV_QB_MMR2
    128U,	// SHRAV_R_PH
    128U,	// SHRAV_R_PH_MM
    128U,	// SHRAV_R_QB
    128U,	// SHRAV_R_QB_MMR2
    128U,	// SHRAV_R_W
    128U,	// SHRAV_R_W_MM
    164U,	// SHRA_PH
    164U,	// SHRA_PH_MM
    136U,	// SHRA_QB
    136U,	// SHRA_QB_MMR2
    164U,	// SHRA_R_PH
    164U,	// SHRA_R_PH_MM
    136U,	// SHRA_R_QB
    136U,	// SHRA_R_QB_MMR2
    152U,	// SHRA_R_W
    152U,	// SHRA_R_W_MM
    128U,	// SHRLV_PH
    128U,	// SHRLV_PH_MMR2
    128U,	// SHRLV_QB
    128U,	// SHRLV_QB_MM
    164U,	// SHRL_PH
    164U,	// SHRL_PH_MMR2
    136U,	// SHRL_QB
    136U,	// SHRL_QB_MM
    0U,	// SHXS_NM
    0U,	// SHX_NM
    0U,	// SH_MM
    0U,	// SH_MMR6
    0U,	// SH_NM
    0U,	// SHs9_NM
    0U,	// SIGRIE
    0U,	// SIGRIE_MMR6
    0U,	// SIGRIE_NM
    305U,	// SLDI_B
    85U,	// SLDI_D
    297U,	// SLDI_H
    89U,	// SLDI_W
    313U,	// SLD_B
    313U,	// SLD_D
    313U,	// SLD_H
    313U,	// SLD_W
    152U,	// SLL
    128U,	// SLL16_MM
    128U,	// SLL16_MMR6
    164U,	// SLL16_NM
    2U,	// SLL64_32
    2U,	// SLL64_64
    136U,	// SLLI_B
    160U,	// SLLI_D
    164U,	// SLLI_H
    152U,	// SLLI_W
    128U,	// SLLV
    128U,	// SLLV_MM
    128U,	// SLLV_NM
    128U,	// SLL_B
    128U,	// SLL_D
    128U,	// SLL_H
    152U,	// SLL_MM
    152U,	// SLL_MMR6
    152U,	// SLL_NM
    128U,	// SLL_W
    128U,	// SLT
    128U,	// SLT64
    128U,	// SLTIU_NM
    128U,	// SLTI_NM
    128U,	// SLTU_NM
    128U,	// SLT_MM
    128U,	// SLT_NM
    128U,	// SLTi
    128U,	// SLTi64
    128U,	// SLTi_MM
    128U,	// SLTiu
    128U,	// SLTiu64
    128U,	// SLTiu_MM
    128U,	// SLTu
    128U,	// SLTu64
    128U,	// SLTu_MM
    128U,	// SNE
    128U,	// SNEi
    128U,	// SOV_NM
    293U,	// SPLATI_B
    321U,	// SPLATI_D
    265U,	// SPLATI_H
    285U,	// SPLATI_W
    257U,	// SPLAT_B
    257U,	// SPLAT_D
    257U,	// SPLAT_H
    257U,	// SPLAT_W
    152U,	// SRA
    136U,	// SRAI_B
    160U,	// SRAI_D
    164U,	// SRAI_H
    152U,	// SRAI_W
    136U,	// SRARI_B
    160U,	// SRARI_D
    164U,	// SRARI_H
    152U,	// SRARI_W
    128U,	// SRAR_B
    128U,	// SRAR_D
    128U,	// SRAR_H
    128U,	// SRAR_W
    128U,	// SRAV
    128U,	// SRAV_MM
    128U,	// SRAV_NM
    128U,	// SRA_B
    128U,	// SRA_D
    128U,	// SRA_H
    152U,	// SRA_MM
    152U,	// SRA_NM
    128U,	// SRA_W
    152U,	// SRL
    128U,	// SRL16_MM
    128U,	// SRL16_MMR6
    164U,	// SRL16_NM
    136U,	// SRLI_B
    160U,	// SRLI_D
    164U,	// SRLI_H
    152U,	// SRLI_W
    136U,	// SRLRI_B
    160U,	// SRLRI_D
    164U,	// SRLRI_H
    152U,	// SRLRI_W
    128U,	// SRLR_B
    128U,	// SRLR_D
    128U,	// SRLR_H
    128U,	// SRLR_W
    128U,	// SRLV
    128U,	// SRLV_MM
    128U,	// SRLV_NM
    128U,	// SRL_B
    128U,	// SRL_D
    128U,	// SRL_H
    152U,	// SRL_MM
    152U,	// SRL_NM
    128U,	// SRL_W
    0U,	// SSNOP
    0U,	// SSNOP_MM
    0U,	// SSNOP_MMR6
    0U,	// ST_B
    0U,	// ST_D
    0U,	// ST_H
    0U,	// ST_W
    128U,	// SUB
    128U,	// SUBQH_PH
    128U,	// SUBQH_PH_MMR2
    128U,	// SUBQH_R_PH
    128U,	// SUBQH_R_PH_MMR2
    128U,	// SUBQH_R_W
    128U,	// SUBQH_R_W_MMR2
    128U,	// SUBQH_W
    128U,	// SUBQH_W_MMR2
    128U,	// SUBQ_PH
    128U,	// SUBQ_PH_MM
    128U,	// SUBQ_S_PH
    128U,	// SUBQ_S_PH_MM
    128U,	// SUBQ_S_W
    128U,	// SUBQ_S_W_MM
    128U,	// SUBSUS_U_B
    128U,	// SUBSUS_U_D
    128U,	// SUBSUS_U_H
    128U,	// SUBSUS_U_W
    128U,	// SUBSUU_S_B
    128U,	// SUBSUU_S_D
    128U,	// SUBSUU_S_H
    128U,	// SUBSUU_S_W
    128U,	// SUBS_S_B
    128U,	// SUBS_S_D
    128U,	// SUBS_S_H
    128U,	// SUBS_S_W
    128U,	// SUBS_U_B
    128U,	// SUBS_U_D
    128U,	// SUBS_U_H
    128U,	// SUBS_U_W
    128U,	// SUBU16_MM
    128U,	// SUBU16_MMR6
    128U,	// SUBUH_QB
    128U,	// SUBUH_QB_MMR2
    128U,	// SUBUH_R_QB
    128U,	// SUBUH_R_QB_MMR2
    128U,	// SUBU_MMR6
    128U,	// SUBU_PH
    128U,	// SUBU_PH_MMR2
    128U,	// SUBU_QB
    128U,	// SUBU_QB_MM
    128U,	// SUBU_S_PH
    128U,	// SUBU_S_PH_MMR2
    128U,	// SUBU_S_QB
    128U,	// SUBU_S_QB_MM
    152U,	// SUBVI_B
    152U,	// SUBVI_D
    152U,	// SUBVI_H
    152U,	// SUBVI_W
    128U,	// SUBV_B
    128U,	// SUBV_D
    128U,	// SUBV_H
    128U,	// SUBV_W
    128U,	// SUB_MM
    128U,	// SUB_MMR6
    128U,	// SUB_NM
    128U,	// SUBu
    128U,	// SUBu16_NM
    128U,	// SUBu_MM
    128U,	// SUBu_NM
    1U,	// SUXC1
    1U,	// SUXC164
    1U,	// SUXC1_MM
    0U,	// SW
    0U,	// SW16_MM
    0U,	// SW16_MMR6
    0U,	// SW16_NM
    0U,	// SW4x4_NM
    0U,	// SW64
    0U,	// SWC1
    0U,	// SWC1_MM
    0U,	// SWC2
    0U,	// SWC2_MMR6
    0U,	// SWC2_R6
    0U,	// SWC3
    0U,	// SWDSP
    0U,	// SWDSP_MM
    0U,	// SWE
    0U,	// SWE_MM
    0U,	// SWGP16_NM
    0U,	// SWGP_NM
    0U,	// SWL
    0U,	// SWL64
    0U,	// SWLE
    0U,	// SWLE_MM
    0U,	// SWL_MM
    0U,	// SWM16_MM
    0U,	// SWM16_MMR6
    0U,	// SWM32_MM
    184U,	// SWM_NM
    0U,	// SWPC_NM
    0U,	// SWP_MM
    0U,	// SWR
    0U,	// SWR64
    0U,	// SWRE
    0U,	// SWRE_MM
    0U,	// SWR_MM
    0U,	// SWSP16_NM
    0U,	// SWSP_MM
    0U,	// SWSP_MMR6
    1U,	// SWXC1
    1U,	// SWXC1_MM
    0U,	// SWXS_NM
    0U,	// SWX_NM
    0U,	// SW_MM
    0U,	// SW_MMR6
    0U,	// SW_NM
    0U,	// SWs9_NM
    0U,	// SYNC
    0U,	// SYNCI
    0U,	// SYNCI_MM
    0U,	// SYNCI_MMR6
    0U,	// SYNCI_NM
    0U,	// SYNCIs9_NM
    0U,	// SYNC_MM
    0U,	// SYNC_MMR6
    0U,	// SYNC_NM
    0U,	// SYSCALL
    0U,	// SYSCALL16_NM
    0U,	// SYSCALL_MM
    0U,	// SYSCALL_NM
    0U,	// Save16
    0U,	// SaveX16
    0U,	// SbRxRyOffMemX16
    0U,	// SebRx16
    0U,	// SehRx16
    0U,	// ShRxRyOffMemX16
    152U,	// SllX16
    0U,	// SllvRxRy16
    0U,	// SltRxRy16
    1U,	// SltiRxImm16
    0U,	// SltiRxImmX16
    1U,	// SltiuRxImm16
    0U,	// SltiuRxImmX16
    0U,	// SltuRxRy16
    152U,	// SraX16
    0U,	// SravRxRy16
    152U,	// SrlX16
    0U,	// SrlvRxRy16
    128U,	// SubuRxRyRz16
    0U,	// SwRxRyOffMemX16
    0U,	// SwRxSpImmX16
    92U,	// TEQ
    0U,	// TEQI
    0U,	// TEQI_MM
    164U,	// TEQ_MM
    152U,	// TEQ_NM
    92U,	// TGE
    0U,	// TGEI
    0U,	// TGEIU
    0U,	// TGEIU_MM
    0U,	// TGEI_MM
    92U,	// TGEU
    164U,	// TGEU_MM
    164U,	// TGE_MM
    0U,	// TLBGINV
    0U,	// TLBGINVF
    0U,	// TLBGINVF_MM
    0U,	// TLBGINV_MM
    0U,	// TLBGP
    0U,	// TLBGP_MM
    0U,	// TLBGR
    0U,	// TLBGR_MM
    0U,	// TLBGWI
    0U,	// TLBGWI_MM
    0U,	// TLBGWR
    0U,	// TLBGWR_MM
    0U,	// TLBINV
    0U,	// TLBINVF
    0U,	// TLBINVF_MMR6
    0U,	// TLBINVF_NM
    0U,	// TLBINV_MMR6
    0U,	// TLBINV_NM
    0U,	// TLBP
    0U,	// TLBP_MM
    0U,	// TLBP_NM
    0U,	// TLBR
    0U,	// TLBR_MM
    0U,	// TLBR_NM
    0U,	// TLBWI
    0U,	// TLBWI_MM
    0U,	// TLBWI_NM
    0U,	// TLBWR
    0U,	// TLBWR_MM
    0U,	// TLBWR_NM
    92U,	// TLT
    0U,	// TLTI
    0U,	// TLTIU_MM
    0U,	// TLTI_MM
    92U,	// TLTU
    164U,	// TLTU_MM
    164U,	// TLT_MM
    92U,	// TNE
    0U,	// TNEI
    0U,	// TNEI_MM
    164U,	// TNE_MM
    152U,	// TNE_NM
    0U,	// TRUNC_L_D64
    0U,	// TRUNC_L_D_MMR6
    0U,	// TRUNC_L_S
    0U,	// TRUNC_L_S_MMR6
    0U,	// TRUNC_W_D32
    0U,	// TRUNC_W_D64
    0U,	// TRUNC_W_D_MMR6
    0U,	// TRUNC_W_MM
    0U,	// TRUNC_W_S
    0U,	// TRUNC_W_S_MM
    0U,	// TRUNC_W_S_MMR6
    0U,	// TTLTIU
    0U,	// UALH_NM
    184U,	// UALWM_NM
    0U,	// UALW_NM
    0U,	// UASH_NM
    184U,	// UASWM_NM
    0U,	// UASW_NM
    0U,	// UDIV
    0U,	// UDIV_MM
    128U,	// V3MULU
    128U,	// VMM0
    128U,	// VMULU
    184U,	// VSHF_B
    184U,	// VSHF_D
    184U,	// VSHF_H
    184U,	// VSHF_W
    0U,	// WAIT
    0U,	// WAIT_MM
    0U,	// WAIT_MMR6
    0U,	// WAIT_NM
    0U,	// WRDSP
    0U,	// WRDSP_MM
    0U,	// WRPGPR_MMR6
    0U,	// WRPGPR_NM
    0U,	// WSBH
    0U,	// WSBH_MM
    0U,	// WSBH_MMR6
    128U,	// XOR
    0U,	// XOR16_MM
    0U,	// XOR16_MMR6
    128U,	// XOR16_NM
    128U,	// XOR64
    20U,	// XORI_B
    16U,	// XORI_MMR6
    128U,	// XORI_NM
    128U,	// XOR_MM
    128U,	// XOR_MMR6
    128U,	// XOR_NM
    128U,	// XOR_V
    16U,	// XORi
    16U,	// XORi64
    16U,	// XORi_MM
    0U,	// XorRxRxRy16
    0U,	// YIELD
    0U,	// YIELD_NM
  };

  // Emit the opcode for the instruction.
  uint64_t Bits = 0;
  Bits |= (uint64_t)OpInfo0[MCInst_getOpcode(MI)] << 0;
  Bits |= (uint64_t)OpInfo1[MCInst_getOpcode(MI)] << 32;
  MnemonicBitsInfo MBI = {
#ifndef CAPSTONE_DIET
    AsmStrs+(Bits & 16383)-1,
#else
    NULL,
#endif // CAPSTONE_DIET
    Bits
  };
  return MBI;
}

/// printInstruction - This method is automatically generated by tablegen
/// from the instruction set description.
static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
  SStream_concat0(O, "");
  MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O);

  SStream_concat0(O, MnemonicInfo.first);

  uint64_t Bits = MnemonicInfo.second;
  CS_ASSERT_RET(Bits != 0 && "Cannot print this instruction.");

  // Fragment 0 encoded into 5 bits for 20 unique commands.
  switch ((Bits >> 14) & 31) {
  default: CS_ASSERT_RET(0 && "Invalid command number.");
  case 0:
    // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...
    return;
    break;
  case 1:
    // ABSMacro, ALIGN_NM, BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro...
    printOperand(MI, 0, O);
    break;
  case 2:
    // B_MMR6_Pseudo, B_MM_Pseudo, B16_MM, BAL, BALC, BALC_MMR6, BC, BC16_MMR...
    printBranchOperand(MI, Address, 0, O);
    break;
  case 3:
    // CTTC1, MTTACX, MTTACX_NM, MTTC0, MTTC0_NM, MTTC1, MTTGPR, MTTGPR_NM, M...
    printOperand(MI, 1, O);
    SStream_concat0(O, ", ");
    break;
  case 4:
    // LWM_MM, SWM_MM, LWM16_MM, LWM16_MMR6, LWM32_MM, SWM16_MM, SWM16_MMR6, ...
    printRegisterList(MI, 0, O);
    SStream_concat0(O, ", ");
    printMemOperand(MI, 1, O);
    return;
    break;
  case 5:
    // SelBeqZ, SelBneZ, SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZ...
    printOperand(MI, 3, O);
    break;
  case 6:
    // AND16_MM, AND16_MMR6, LSA_MMR6, MTHC1_D32, MTHC1_D32_MM, MTHC1_D64, MT...
    printOperand(MI, 2, O);
    SStream_concat0(O, ", ");
    break;
  case 7:
    // BALC16_NM, BALC_NM
    printPCRel(MI, Address, 0, O);
    return;
    break;
  case 8:
    // BREAK, BREAK_MM, BREAK_MMR6, HYPCALL, HYPCALL_MM, SDBBP_MM, SYSCALL_MM...
    printUImm_10_0(MI, 0, O);
    break;
  case 9:
    // BREAK16_MM, BREAK16_MMR6, SDBBP16_MM, SDBBP16_MMR6
    printUImm_4_0(MI, 0, O);
    return;
    break;
  case 10:
    // CACHE, CACHEE, CACHEE_MM, CACHE_MM, CACHE_MMR6, CACHE_R6, PREF, PREFE,...
    printUImm_5_0(MI, 2, O);
    SStream_concat0(O, ", ");
    break;
  case 11:
    // CACHE_NM, PREF_NM, PREFs9_NM, SYNC, SYNC_MM, SYNC_MMR6, SYNC_NM
    printUImm_5_0(MI, 0, O);
    break;
  case 12:
    // FCMP_D32, FCMP_D32_MM, FCMP_D64, FCMP_S32, FCMP_S32_MM
    printFCCOperand(MI, 2, O);
    break;
  case 13:
    // J, JAL, JALS_MM, JALX, JALX_MM, JAL_MM, J_MM
    printJumpOperand(MI, 0, O);
    return;
    break;
  case 14:
    // Jal16, JalB16
    printUImm_26_0(MI, 0, O);
    break;
  case 15:
    // RESTOREJRC16_NM, SAVE16_NM
    printUImm_8_0(MI, 0, O);
    printNanoMipsRegisterList(MI, 1, O);
    return;
    break;
  case 16:
    // RESTOREJRC_NM, RESTORE_NM, SAVE_NM
    printUImm_12_0(MI, 0, O);
    printNanoMipsRegisterList(MI, 1, O);
    return;
    break;
  case 17:
    // SDBBP, SDBBP_MMR6, SDBBP_R6, SYSCALL
    printUImm_20_0(MI, 0, O);
    return;
    break;
  case 18:
    // SIGRIE, SIGRIE_MMR6
    printUImm_16_0(MI, 0, O);
    return;
    break;
  case 19:
    // SYNCI, SYNCI_MM, SYNCI_MMR6, SYNCI_NM, SYNCIs9_NM
    printMemOperand(MI, 0, O);
    return;
    break;
  }


  // Fragment 1 encoded into 5 bits for 18 unique commands.
  switch ((Bits >> 19) & 31) {
  default: CS_ASSERT_RET(0 && "Invalid command number.");
  case 0:
    // ABSMacro, ALIGN_NM, BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro...
    SStream_concat0(O, ", ");
    break;
  case 1:
    // B_MMR6_Pseudo, B_MM_Pseudo, Constant32, JalOneReg, MFTDSP, MFTDSP_NM, ...
    return;
    break;
  case 2:
    // CTTC1, MTTACX, MTTACX_NM, MTTC0, MTTC0_NM, MTTC1, MTTGPR, MTTGPR_NM, M...
    printOperand(MI, 0, O);
    break;
  case 3:
    // LwConstant32
    SStream_concat0(O, ", 1f\n\tb\t2f\n\t.align\t2\n1: \t.word\t");
    printOperand(MI, 1, O);
    SStream_concat0(O, "\n2:");
    return;
    break;
  case 4:
    // MultRxRyRz16, MultuRxRyRz16, SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImm...
    printOperand(MI, 2, O);
    break;
  case 5:
    // SelBeqZ, SelBneZ
    SStream_concat0(O, ", .+4\n\t\n\tmove ");
    printOperand(MI, 1, O);
    SStream_concat0(O, ", ");
    printOperand(MI, 2, O);
    return;
    break;
  case 6:
    // AND16_MM, AND16_MMR6, LSA_MMR6, OR16_MM, OR16_MMR6, PREFX_MM, XOR16_MM...
    printOperand(MI, 1, O);
    break;
  case 7:
    // AddiuRxPcImmX16
    SStream_concat0(O, ", $pc, ");
    printOperand(MI, 1, O);
    return;
    break;
  case 8:
    // AddiuSpImm16, Bimm16
    SStream_concat0(O, " # 16 bit inst");
    return;
    break;
  case 9:
    // Bteqz16, Btnez16
    SStream_concat0(O, "  # 16 bit inst");
    return;
    break;
  case 10:
    // CACHE, CACHEE, CACHEE_MM, CACHE_MM, CACHE_MMR6, CACHE_R6, PREF, PREFE,...
    printMemOperand(MI, 0, O);
    return;
    break;
  case 11:
    // FCMP_D32, FCMP_D32_MM, FCMP_D64
    SStream_concat0(O, ".d\t");
    printOperand(MI, 0, O);
    SStream_concat0(O, ", ");
    printOperand(MI, 1, O);
    return;
    break;
  case 12:
    // FCMP_S32, FCMP_S32_MM
    SStream_concat0(O, ".s\t");
    printOperand(MI, 0, O);
    SStream_concat0(O, ", ");
    printOperand(MI, 1, O);
    return;
    break;
  case 13:
    // INSERT_B, INSERT_D, INSERT_H, INSERT_W, INSVE_B, INSVE_D, INSVE_H, INS...
    SStream_concat1(O, '[');
    break;
  case 14:
    // Jal16
    SStream_concat0(O, "\n\tnop");
    return;
    break;
  case 15:
    // JalB16
    SStream_concat0(O, "\t# branch\n\tnop");
    return;
    break;
  case 16:
    // SAA, SAAD
    SStream_concat0(O, ", (");
    printOperand(MI, 1, O);
    SStream_concat1(O, ')');
    return;
    break;
  case 17:
    // SC, SC64, SC64_R6, SCD, SCD_R6, SCE, SCE_MM, SC_MM, SC_MMR6, SC_NM, SC...
    printMemOperand(MI, 2, O);
    return;
    break;
  }


  // Fragment 2 encoded into 5 bits for 30 unique commands.
  switch ((Bits >> 24) & 31) {
  default: CS_ASSERT_RET(0 && "Invalid command number.");
  case 0:
    // ABSMacro, ALIGN_NM, BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro...
    printOperand(MI, 1, O);
    break;
  case 1:
    // CTTC1, MTTACX, MTTACX_NM, MTTC1, MTTGPR, MTTGPR_NM, MTTHC1, MTTHI, MTT...
    return;
    break;
  case 2:
    // GotPrologue16, AddiuRxRxImm16, AddiuRxRxImmX16, AndRxRxRy16, BINSLI_B,...
    printOperand(MI, 2, O);
    break;
  case 3:
    // LDMacro, LOAD_ACC128, LOAD_ACC64, LOAD_ACC64DSP, LOAD_CCOND_DSP, LoadA...
    printMemOperand(MI, 1, O);
    break;
  case 4:
    // MTTC0, MTTC0_NM, DMTC0, DMTC2, DMTGC0, FORK, FORK_NM, LSA_MMR6, MTC0, ...
    SStream_concat0(O, ", ");
    break;
  case 5:
    // MultRxRyRz16, MultuRxRyRz16
    SStream_concat0(O, "\n\tmflo\t");
    printOperand(MI, 0, O);
    return;
    break;
  case 6:
    // PseudoLA_NM, PseudoLI_NM, LI48_NM
    printUImm_32_0(MI, 1, O);
    return;
    break;
  case 7:
    // SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZSlti, SelTBteqZSlt...
    printOperand(MI, 4, O);
    break;
  case 8:
    // SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16, SltuRxRyRz...
    SStream_concat0(O, "\n\tmove\t");
    printOperand(MI, 0, O);
    SStream_concat0(O, ", $t8");
    return;
    break;
  case 9:
    // ALUIPC_NM
    printHi20PCRel(MI, Address, 1, O);
    return;
    break;
  case 10:
    // AddiuRxRyOffMemX16, LEA_ADDIU_NM, LEA_ADDiu, LEA_ADDiu64, LEA_ADDiu_MM
    printMemOperandEA(MI, 1, O);
    return;
    break;
  case 11:
    // BBIT0, BBIT032, BBIT1, BBIT132
    printUImm_5_0(MI, 1, O);
    SStream_concat0(O, ", ");
    printBranchOperand(MI, Address, 2, O);
    return;
    break;
  case 12:
    // BC1EQZ, BC1EQZC_MMR6, BC1F, BC1FL, BC1F_MM, BC1NEZ, BC1NEZC_MMR6, BC1T...
    printBranchOperand(MI, Address, 1, O);
    break;
  case 13:
    // BEQIC_NM, BGEIC_NM, BGEIUC_NM, BLTIC_NM, BLTIUC_NM, BNEIC_NM, LI16_NM,...
    printUImm_7_0(MI, 1, O);
    break;
  case 14:
    // BREAK, BREAK_MM, BREAK_MMR6, RDDSP, WRDSP
    printUImm_10_0(MI, 1, O);
    return;
    break;
  case 15:
    // DMFC2_OCTEON, DMTC2_OCTEON, LUI_MMR6, LUi, LUi64, LUi_MM
    printUImm_16_0(MI, 1, O);
    return;
    break;
  case 16:
    // GINVT, GINVT_MMR6, GINVT_NM
    printUImm_2_0(MI, 1, O);
    return;
    break;
  case 17:
    // INSERT_B
    printUImm_4_0(MI, 3, O);
    SStream_concat0(O, "], ");
    printOperand(MI, 2, O);
    return;
    break;
  case 18:
    // INSERT_D
    printUImm_1_0(MI, 3, O);
    SStream_concat0(O, "], ");
    printOperand(MI, 2, O);
    return;
    break;
  case 19:
    // INSERT_H
    printUImm_3_0(MI, 3, O);
    SStream_concat0(O, "], ");
    printOperand(MI, 2, O);
    return;
    break;
  case 20:
    // INSERT_W
    printUImm_2_0(MI, 3, O);
    SStream_concat0(O, "], ");
    printOperand(MI, 2, O);
    return;
    break;
  case 21:
    // INSVE_B
    printUImm_4_0(MI, 2, O);
    SStream_concat0(O, "], ");
    printOperand(MI, 3, O);
    SStream_concat1(O, '[');
    printUImm_0_0(MI, 4, O);
    SStream_concat1(O, ']');
    return;
    break;
  case 22:
    // INSVE_D
    printUImm_1_0(MI, 2, O);
    SStream_concat0(O, "], ");
    printOperand(MI, 3, O);
    SStream_concat1(O, '[');
    printUImm_0_0(MI, 4, O);
    SStream_concat1(O, ']');
    return;
    break;
  case 23:
    // INSVE_H
    printUImm_3_0(MI, 2, O);
    SStream_concat0(O, "], ");
    printOperand(MI, 3, O);
    SStream_concat1(O, '[');
    printUImm_0_0(MI, 4, O);
    SStream_concat1(O, ']');
    return;
    break;
  case 24:
    // INSVE_W
    printUImm_2_0(MI, 2, O);
    SStream_concat0(O, "], ");
    printOperand(MI, 3, O);
    SStream_concat1(O, '[');
    printUImm_0_0(MI, 4, O);
    SStream_concat1(O, ']');
    return;
    break;
  case 25:
    // LAPC32_NM, LAPC48_NM, LWPC_NM, SWPC_NM
    printPCRel(MI, Address, 1, O);
    return;
    break;
  case 26:
    // LUI_NM
    printHi20(MI, 1, O);
    return;
    break;
  case 27:
    // LWP_MM, SWP_MM
    printMemOperand(MI, 2, O);
    return;
    break;
  case 28:
    // PREFX_MM
    SStream_concat1(O, '(');
    printOperand(MI, 0, O);
    SStream_concat1(O, ')');
    return;
    break;
  case 29:
    // REPL_QB, REPL_QB_MM
    printUImm_8_0(MI, 1, O);
    return;
    break;
  }


  // Fragment 3 encoded into 5 bits for 19 unique commands.
  switch ((Bits >> 29) & 31) {
  default: CS_ASSERT_RET(0 && "Invalid command number.");
  case 0:
    // ABSMacro, CFTC1, JalTwoReg, LDMacro, LOAD_ACC128, LOAD_ACC64, LOAD_ACC...
    return;
    break;
  case 1:
    // ALIGN_NM, BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro, BGEU, BG...
    SStream_concat0(O, ", ");
    break;
  case 2:
    // BteqzT8CmpX16, BteqzT8CmpiX16, BteqzT8SltX16, BteqzT8SltiX16, BteqzT8S...
    SStream_concat0(O, "\n\tbteqz\t");
    printBranchOperand(MI, Address, 2, O);
    return;
    break;
  case 3:
    // BtnezT8CmpX16, BtnezT8CmpiX16, BtnezT8SltX16, BtnezT8SltiX16, BtnezT8S...
    SStream_concat0(O, "\n\tbtnez\t");
    printBranchOperand(MI, Address, 2, O);
    return;
    break;
  case 4:
    // GotPrologue16
    SStream_concat0(O, "\n\taddiu\t");
    printOperand(MI, 1, O);
    SStream_concat0(O, ", $pc, ");
    printOperand(MI, 3, O);
    SStream_concat0(O, "\n ");
    return;
    break;
  case 5:
    // MTTC0, MTTC0_NM, DMTC0, DMTC2, DMTGC0, MTC0, MTC0_MMR6, MTC2, MTGC0, M...
    printUImm_3_0(MI, 2, O);
    return;
    break;
  case 6:
    // SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZSlti, SelTBteqZSlt...
    SStream_concat0(O, "\n\tbteqz\t.+4\n\tmove ");
    printOperand(MI, 1, O);
    SStream_concat0(O, ", ");
    printOperand(MI, 2, O);
    return;
    break;
  case 7:
    // SelTBtneZCmp, SelTBtneZCmpi, SelTBtneZSlt, SelTBtneZSlti, SelTBtneZSlt...
    SStream_concat0(O, "\n\tbtnez\t.+4\n\tmove ");
    printOperand(MI, 1, O);
    SStream_concat0(O, ", ");
    printOperand(MI, 2, O);
    return;
    break;
  case 8:
    // AddiuRxRxImm16, LwRxPcTcp16
    SStream_concat0(O, "\t# 16 bit inst");
    return;
    break;
  case 9:
    // BeqzRxImm16, BnezRxImm16
    SStream_concat0(O, "  # 16 bit inst");
    return;
    break;
  case 10:
    // COPY_S_B, COPY_S_D, COPY_S_H, COPY_S_W, COPY_U_B, COPY_U_H, COPY_U_W, ...
    SStream_concat1(O, '[');
    break;
  case 11:
    // CmpiRxImm16, LiRxImm16, SltiRxImm16, SltiuRxImm16
    SStream_concat0(O, " \t# 16 bit inst");
    return;
    break;
  case 12:
    // DSLL64_32
    SStream_concat0(O, ", 32");
    return;
    break;
  case 13:
    // FORK, FORK_NM
    printOperand(MI, 2, O);
    return;
    break;
  case 14:
    // LBUX, LBUX_MM, LDXC1, LDXC164, LHX, LHX_MM, LUXC1, LUXC164, LUXC1_MM, ...
    SStream_concat1(O, '(');
    printOperand(MI, 1, O);
    SStream_concat1(O, ')');
    return;
    break;
  case 15:
    // LSA_MMR6
    printOperand(MI, 0, O);
    SStream_concat0(O, ", ");
    printUImm_2_1(MI, 3, O);
    return;
    break;
  case 16:
    // MTTR, MTTR_NM
    printUImm_1_0(MI, 2, O);
    SStream_concat0(O, ", ");
    printUImm_3_0(MI, 3, O);
    SStream_concat0(O, ", ");
    printUImm_1_0(MI, 4, O);
    return;
    break;
  case 17:
    // SCWP_NM
    printMemOperand(MI, 3, O);
    return;
    break;
  case 18:
    // SLL64_32, SLL64_64
    SStream_concat0(O, ", 0");
    return;
    break;
  }


  // Fragment 4 encoded into 5 bits for 24 unique commands.
  switch ((Bits >> 34) & 31) {
  default: CS_ASSERT_RET(0 && "Invalid command number.");
  case 0:
    // ALIGN_NM, DMULImmMacro, DMULMacro, DMULOMacro, DMULOUMacro, DROL, DROL...
    printOperand(MI, 2, O);
    break;
  case 1:
    // BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro, BGEU, BGEUImmMacro...
    printBranchOperand(MI, Address, 2, O);
    return;
    break;
  case 2:
    // MFTC0, MFTC0_NM, BCLRI_B, BNEGI_B, BSETI_B, COPY_S_H, COPY_U_H, DMFC0,...
    printUImm_3_0(MI, 2, O);
    break;
  case 3:
    // PseudoADDIU_NM, ADDIU48_NM
    printUImm_32_0(MI, 2, O);
    return;
    break;
  case 4:
    // PseudoANDI_NM, ADDIU_NM, ANDI16_NM, ANDI_MMR6, ANDi, ANDi64, ANDi_MM, ...
    printUImm_16_0(MI, 2, O);
    return;
    break;
  case 5:
    // ADDIUR1SP_NM, ANDI_B, NORI_B, ORI_B, RDHWR, RDHWR64, RDHWR_MM, SHF_B, ...
    printUImm_8_0(MI, 2, O);
    return;
    break;
  case 6:
    // ADDIUR2_NM, ADDVI_B, ADDVI_D, ADDVI_H, ADDVI_W, APPEND, APPEND_MMR2, B...
    printUImm_5_0(MI, 2, O);
    break;
  case 7:
    // BALIGN, BALIGN_MMR2, COPY_S_W, COPY_U_W, SPLATI_W
    printUImm_2_0(MI, 2, O);
    break;
  case 8:
    // BCLRI_D, BNEGI_D, BSETI_D, DEXT, DEXT64_32, DINS, DROTR, DSLL, DSRA, D...
    printUImm_6_0(MI, 2, O);
    break;
  case 9:
    // BCLRI_H, BNEGI_H, BSETI_H, COPY_S_B, COPY_U_B, SAT_S_H, SAT_U_H, SHLL_...
    printUImm_4_0(MI, 2, O);
    break;
  case 10:
    // BINSLI_B, BINSRI_B, SLDI_H
    printUImm_3_0(MI, 3, O);
    break;
  case 11:
    // BINSLI_D, BINSRI_D
    printUImm_6_0(MI, 3, O);
    return;
    break;
  case 12:
    // BINSLI_H, BINSRI_H, SLDI_B
    printUImm_4_0(MI, 3, O);
    break;
  case 13:
    // BINSLI_W, BINSRI_W
    printUImm_5_0(MI, 3, O);
    return;
    break;
  case 14:
    // BINSL_B, BINSL_D, BINSL_H, BINSL_W, BINSR_B, BINSR_D, BINSR_H, BINSR_W...
    printOperand(MI, 3, O);
    break;
  case 15:
    // BMNZI_B, BMZI_B, BSELI_B
    printUImm_8_0(MI, 3, O);
    return;
    break;
  case 16:
    // COPY_S_D, MFTR, MFTR_NM, SPLATI_D
    printUImm_1_0(MI, 2, O);
    break;
  case 17:
    // DEXTU, DINSU
    printUImm_5_32(MI, 2, O);
    SStream_concat0(O, ", ");
    break;
  case 18:
    // FADD_S_MMR6, FDIV_S_MMR6, FMUL_S_MMR6, FSUB_S_MMR6
    printOperand(MI, 1, O);
    return;
    break;
  case 19:
    // LLWP_NM
    printMemOperand(MI, 2, O);
    return;
    break;
  case 20:
    // MOVEBALC_NM
    printPCRel(MI, Address, 2, O);
    return;
    break;
  case 21:
    // SLDI_D
    printUImm_1_0(MI, 3, O);
    SStream_concat1(O, ']');
    return;
    break;
  case 22:
    // SLDI_W
    printUImm_2_0(MI, 3, O);
    SStream_concat1(O, ']');
    return;
    break;
  case 23:
    // TEQ, TGE, TGEU, TLT, TLTU, TNE
    printUImm_10_0(MI, 2, O);
    return;
    break;
  }


  // Fragment 5 encoded into 3 bits for 5 unique commands.
  switch ((Bits >> 39) & 7) {
  default: CS_ASSERT_RET(0 && "Invalid command number.");
  case 0:
    // ALIGN_NM, ALIGN, ALIGN_MMR6, CINS, CINS32, CINS64_32, CINS_i32, DALIGN...
    SStream_concat0(O, ", ");
    break;
  case 1:
    // DMULImmMacro, DMULMacro, DMULOMacro, DMULOUMacro, DROL, DROLImm, DROR,...
    return;
    break;
  case 2:
    // COPY_S_B, COPY_S_D, COPY_S_H, COPY_S_W, COPY_U_B, COPY_U_H, COPY_U_W, ...
    SStream_concat1(O, ']');
    return;
    break;
  case 3:
    // DEXTU
    printUImm_5_1(MI, 3, O);
    return;
    break;
  case 4:
    // DINSU
    printUImm_6_0(MI, 3, O);
    return;
    break;
  }


  // Fragment 6 encoded into 4 bits for 10 unique commands.
  switch ((Bits >> 42) & 15) {
  default: CS_ASSERT_RET(0 && "Invalid command number.");
  case 0:
    // ALIGN_NM, MADD_D32, MADD_D32_MM, MADD_D64, MADD_S, MADD_S_MM, MOVEPREV...
    printOperand(MI, 3, O);
    return;
    break;
  case 1:
    // ALIGN, ALIGN_MMR6, LSA_NM
    printUImm_2_0(MI, 3, O);
    return;
    break;
  case 2:
    // CINS, CINS32, CINS64_32, CINS_i32, EXTS, EXTS32, EXTW_NM, ROTX_NM
    printUImm_5_0(MI, 3, O);
    break;
  case 3:
    // DALIGN, MFTR, MFTR_NM
    printUImm_3_0(MI, 3, O);
    break;
  case 4:
    // DEXT
    printUImm_6_1(MI, 3, O);
    return;
    break;
  case 5:
    // DEXT64_32, EXT, EXT_MM, EXT_MMR6, EXT_NM
    printUImm_5_1(MI, 3, O);
    return;
    break;
  case 6:
    // DEXTM
    printUImm_5_33(MI, 3, O);
    return;
    break;
  case 7:
    // DINS, INS, INS_MM, INS_MMR6, INS_NM
    printUImm_6_0(MI, 3, O);
    return;
    break;
  case 8:
    // DINSM
    printUImm_6_2(MI, 3, O);
    return;
    break;
  case 9:
    // DLSA, DLSA_R6, LSA, LSA_R6
    printUImm_2_1(MI, 3, O);
    return;
    break;
  }


  // Fragment 7 encoded into 1 bits for 2 unique commands.
  if ((Bits >> 46) & 1) {
    // MFTR, MFTR_NM, ROTX_NM
    SStream_concat0(O, ", ");
    printUImm_1_0(MI, 4, O);
    return;
  } else {
    // CINS, CINS32, CINS64_32, CINS_i32, DALIGN, EXTS, EXTS32, EXTW_NM
    return;
  }

}


/// getRegisterName - This method is automatically generated by tblgen
/// from the register set description.  This returns the assembler name
/// for the specified register.
static const char *getRegisterName(unsigned RegNo) {
#ifndef CAPSTONE_DIET
  CS_ASSERT_RET_VAL(RegNo && RegNo < 635 && "Invalid register number!", NULL);

  static const char AsmStrs[] = {
  /* 0 */ "f10\0"
  /* 4 */ "watchhi10\0"
  /* 14 */ "watchlo10\0"
  /* 24 */ "w10\0"
  /* 28 */ "f20\0"
  /* 32 */ "DSPOutFlag20\0"
  /* 45 */ "w20\0"
  /* 49 */ "f30\0"
  /* 53 */ "w30\0"
  /* 57 */ "a0\0"
  /* 60 */ "ac0\0"
  /* 64 */ "fcc0\0"
  /* 69 */ "vpeconf0\0"
  /* 78 */ "mvpconf0\0"
  /* 87 */ "srsconf0\0"
  /* 96 */ "watchhi0\0"
  /* 105 */ "k0\0"
  /* 108 */ "mpl0\0"
  /* 113 */ "perfctl0\0"
  /* 122 */ "segctl0\0"
  /* 130 */ "guestctl0\0"
  /* 140 */ "watchlo0\0"
  /* 149 */ "entrylo0\0"
  /* 158 */ "p0\0"
  /* 161 */ "s0\0"
  /* 164 */ "perfcnt0\0"
  /* 173 */ "w0\0"
  /* 176 */ "f11\0"
  /* 180 */ "watchhi11\0"
  /* 190 */ "watchlo11\0"
  /* 200 */ "w11\0"
  /* 204 */ "f21\0"
  /* 208 */ "DSPOutFlag21\0"
  /* 221 */ "w21\0"
  /* 225 */ "f31\0"
  /* 229 */ "w31\0"
  /* 233 */ "usertracedata1\0"
  /* 248 */ "ac1\0"
  /* 252 */ "fcc1\0"
  /* 257 */ "vpeconf1\0"
  /* 266 */ "mvpconf1\0"
  /* 275 */ "srsconf1\0"
  /* 284 */ "config1\0"
  /* 292 */ "kscratch1\0"
  /* 302 */ "watchhi1\0"
  /* 311 */ "k1\0"
  /* 314 */ "mpl1\0"
  /* 319 */ "perfctl1\0"
  /* 328 */ "segctl1\0"
  /* 336 */ "guestctl1\0"
  /* 346 */ "watchlo1\0"
  /* 355 */ "entrylo1\0"
  /* 364 */ "p1\0"
  /* 367 */ "s1\0"
  /* 370 */ "perfcnt1\0"
  /* 379 */ "w1\0"
  /* 382 */ "f12\0"
  /* 386 */ "watchhi12\0"
  /* 396 */ "watchlo12\0"
  /* 406 */ "w12\0"
  /* 410 */ "f22\0"
  /* 414 */ "DSPOutFlag22\0"
  /* 427 */ "w22\0"
  /* 431 */ "usertracedata2\0"
  /* 446 */ "ac2\0"
  /* 450 */ "fcc2\0"
  /* 455 */ "srsconf2\0"
  /* 464 */ "config2\0"
  /* 472 */ "debug2\0"
  /* 479 */ "kscratch2\0"
  /* 489 */ "watchhi2\0"
  /* 498 */ "tracecontrol2\0"
  /* 512 */ "mpl2\0"
  /* 517 */ "perfctl2\0"
  /* 526 */ "segctl2\0"
  /* 534 */ "guestctl2\0"
  /* 544 */ "watchlo2\0"
  /* 553 */ "srsmap2\0"
  /* 561 */ "s2\0"
  /* 564 */ "perfcnt2\0"
  /* 573 */ "w2\0"
  /* 576 */ "f13\0"
  /* 580 */ "watchhi13\0"
  /* 590 */ "watchlo13\0"
  /* 600 */ "w13\0"
  /* 604 */ "f23\0"
  /* 608 */ "DSPOutFlag23\0"
  /* 621 */ "w23\0"
  /* 625 */ "a3\0"
  /* 628 */ "ac3\0"
  /* 632 */ "fcc3\0"
  /* 637 */ "srsconf3\0"
  /* 646 */ "config3\0"
  /* 654 */ "kscratch3\0"
  /* 664 */ "watchhi3\0"
  /* 673 */ "tracecontrol3\0"
  /* 687 */ "perfctl3\0"
  /* 696 */ "guestctl3\0"
  /* 706 */ "watchlo3\0"
  /* 715 */ "s3\0"
  /* 718 */ "perfcnt3\0"
  /* 727 */ "w3\0"
  /* 730 */ "f14\0"
  /* 734 */ "watchhi14\0"
  /* 744 */ "watchlo14\0"
  /* 754 */ "w14\0"
  /* 758 */ "f24\0"
  /* 762 */ "w24\0"
  /* 766 */ "a4\0"
  /* 769 */ "fcc4\0"
  /* 774 */ "srsconf4\0"
  /* 783 */ "config4\0"
  /* 791 */ "kscratch4\0"
  /* 801 */ "watchhi4\0"
  /* 810 */ "perfctl4\0"
  /* 819 */ "watchlo4\0"
  /* 828 */ "s4\0"
  /* 831 */ "perfcnt4\0"
  /* 840 */ "w4\0"
  /* 843 */ "f15\0"
  /* 847 */ "watchhi15\0"
  /* 857 */ "watchlo15\0"
  /* 867 */ "w15\0"
  /* 871 */ "f25\0"
  /* 875 */ "w25\0"
  /* 879 */ "a5\0"
  /* 882 */ "fcc5\0"
  /* 887 */ "f5\0"
  /* 890 */ "config5\0"
  /* 898 */ "kscratch5\0"
  /* 908 */ "watchhi5\0"
  /* 917 */ "perfctl5\0"
  /* 926 */ "watchlo5\0"
  /* 935 */ "s5\0"
  /* 938 */ "perfcnt5\0"
  /* 947 */ "w5\0"
  /* 950 */ "f16\0"
  /* 954 */ "w16\0"
  /* 958 */ "f26\0"
  /* 962 */ "w26\0"
  /* 966 */ "a6\0"
  /* 969 */ "fcc6\0"
  /* 974 */ "f6\0"
  /* 977 */ "kscratch6\0"
  /* 987 */ "watchhi6\0"
  /* 996 */ "perfctl6\0"
  /* 1005 */ "watchlo6\0"
  /* 1014 */ "s6\0"
  /* 1017 */ "perfcnt6\0"
  /* 1026 */ "w6\0"
  /* 1029 */ "f17\0"
  /* 1033 */ "w17\0"
  /* 1037 */ "f27\0"
  /* 1041 */ "w27\0"
  /* 1045 */ "a7\0"
  /* 1048 */ "fcc7\0"
  /* 1053 */ "f7\0"
  /* 1056 */ "watchhi7\0"
  /* 1065 */ "perfctl7\0"
  /* 1074 */ "watchlo7\0"
  /* 1083 */ "s7\0"
  /* 1086 */ "perfcnt7\0"
  /* 1095 */ "w7\0"
  /* 1098 */ "f18\0"
  /* 1102 */ "w18\0"
  /* 1106 */ "f28\0"
  /* 1110 */ "w28\0"
  /* 1114 */ "f8\0"
  /* 1117 */ "watchhi8\0"
  /* 1126 */ "watchlo8\0"
  /* 1135 */ "t8\0"
  /* 1138 */ "w8\0"
  /* 1141 */ "DSPOutFlag16_19\0"
  /* 1157 */ "f19\0"
  /* 1161 */ "w19\0"
  /* 1165 */ "f29\0"
  /* 1169 */ "w29\0"
  /* 1173 */ "f9\0"
  /* 1176 */ "watchhi9\0"
  /* 1185 */ "watchlo9\0"
  /* 1194 */ "t9\0"
  /* 1197 */ "w9\0"
  /* 1200 */ "DSPEFI\0"
  /* 1207 */ "hwrena\0"
  /* 1214 */ "ra\0"
  /* 1217 */ "bevva\0"
  /* 1223 */ "hwr_cc\0"
  /* 1230 */ "tracedbpc\0"
  /* 1240 */ "traceibpc\0"
  /* 1250 */ "nestedepc\0"
  /* 1260 */ "errorepc\0"
  /* 1269 */ "nestedexc\0"
  /* 1279 */ "wired\0"
  /* 1285 */ "memorymapid\0"
  /* 1297 */ "prid\0"
  /* 1302 */ "debugcontextid\0"
  /* 1317 */ "pwfield\0"
  /* 1325 */ "tcbind\0"
  /* 1332 */ "DSPCCond\0"
  /* 1341 */ "tcschedule\0"
  /* 1352 */ "vpeschedule\0"
  /* 1364 */ "compare\0"
  /* 1372 */ "ebase\0"
  /* 1378 */ "cdmmbase\0"
  /* 1387 */ "cmgcrbase\0"
  /* 1397 */ "pwbase\0"
  /* 1404 */ "cause\0"
  /* 1410 */ "desave\0"
  /* 1417 */ "pwsize\0"
  /* 1424 */ "DSPOutFlag\0"
  /* 1435 */ "xcontextconfig\0"
  /* 1450 */ "debug\0"
  /* 1456 */ "ddatahi\0"
  /* 1464 */ "idatahi\0"
  /* 1472 */ "dtaghi\0"
  /* 1479 */ "itaghi\0"
  /* 1486 */ "entryhi\0"
  /* 1494 */ "maari\0"
  /* 1500 */ "tcschefback\0"
  /* 1512 */ "vpeschefback\0"
  /* 1525 */ "pagemask\0"
  /* 1534 */ "yqmask\0"
  /* 1541 */ "userlocal\0"
  /* 1551 */ "tracecontrol\0"
  /* 1564 */ "vpecontrol\0"
  /* 1575 */ "mvpcontrol\0"
  /* 1586 */ "view_ipl\0"
  /* 1595 */ "view_ripl\0"
  /* 1605 */ "errctl\0"
  /* 1612 */ "srsctl\0"
  /* 1619 */ "intctl\0"
  /* 1626 */ "pwctl\0"
  /* 1632 */ "random\0"
  /* 1639 */ "hwr_cpunum\0"
  /* 1650 */ "pagegrain\0"
  /* 1660 */ "ddatalo\0"
  /* 1668 */ "idatalo\0"
  /* 1676 */ "dtaglo\0"
  /* 1683 */ "itaglo\0"
  /* 1690 */ "zero\0"
  /* 1695 */ "srsmap\0"
  /* 1702 */ "hwr_synci_step\0"
  /* 1717 */ "fp\0"
  /* 1720 */ "gp\0"
  /* 1723 */ "badinstrp\0"
  /* 1733 */ "sp\0"
  /* 1736 */ "maar\0"
  /* 1741 */ "lladdr\0"
  /* 1748 */ "badvaddr\0"
  /* 1757 */ "globalnumber\0"
  /* 1770 */ "cacheerr\0"
  /* 1779 */ "hwr_ccres\0"
  /* 1789 */ "DSPPos\0"
  /* 1796 */ "tcstatus\0"
  /* 1805 */ "at\0"
  /* 1808 */ "gtoffset\0"
  /* 1817 */ "tchalt\0"
  /* 1824 */ "DSPSCount\0"
  /* 1834 */ "count\0"
  /* 1840 */ "tcopt\0"
  /* 1846 */ "vpeopt\0"
  /* 1853 */ "tcrestart\0"
  /* 1863 */ "badinst\0"
  /* 1871 */ "guestctl0ext\0"
  /* 1884 */ "tccontext\0"
  /* 1894 */ "xcontext\0"
  /* 1903 */ "index\0"
  /* 1909 */ "badinstrx\0"
  /* 1919 */ "DSPCarry\0"
};
  static const uint16_t RegAsmOffset[] = {
    178, 1805, 1332, 1919, 1200, 1424, 1789, 1824, 1717, 1717, 1720, 1720, 384, 178, 
    2, 952, 732, 845, 578, 1031, 1237, 1214, 1214, 1733, 1733, 1690, 1690, 732, 
    845, 952, 1031, 60, 248, 446, 628, 178, 2, 178, 384, 578, 732, 845, 
    952, 1031, 1100, 1155, 2, 178, 384, 578, 732, 845, 952, 1031, 1100, 1155, 
    2, 178, 384, 578, 732, 845, 952, 1031, 1100, 1155, 1, 177, 383, 577, 
    731, 844, 951, 1030, 1099, 1154, 29, 205, 411, 605, 759, 872, 959, 1038, 
    1107, 1166, 50, 226, 1, 177, 383, 577, 731, 844, 951, 1030, 1099, 1154, 
    29, 205, 411, 605, 759, 872, 959, 1038, 1107, 1166, 50, 226, 1, 177, 
    383, 577, 731, 844, 951, 1030, 1099, 1154, 29, 205, 411, 605, 759, 872, 
    959, 1038, 1107, 1166, 50, 226, 75, 461, 780, 974, 1114, 0, 382, 730, 
    950, 1098, 28, 410, 758, 958, 1106, 49, 32, 208, 414, 608, 75, 263, 
    461, 643, 780, 887, 974, 1053, 1114, 1173, 0, 176, 382, 576, 730, 843, 
    950, 1029, 1098, 1157, 28, 204, 410, 604, 758, 871, 958, 1037, 1106, 1165, 
    49, 225, 64, 252, 450, 632, 769, 882, 969, 1048, 2, 178, 384, 578, 
    732, 845, 952, 1031, 1100, 1155, 1, 177, 383, 577, 731, 844, 951, 1030, 
    1099, 1154, 29, 205, 411, 605, 759, 872, 959, 1038, 1107, 1166, 50, 226, 
    1717, 75, 263, 461, 643, 780, 887, 974, 1053, 1114, 1173, 0, 176, 382, 
    576, 730, 843, 950, 1029, 1098, 1157, 28, 204, 410, 604, 758, 871, 958, 
    1037, 1106, 1165, 49, 225, 1720, 60, 248, 446, 628, 1639, 1702, 1223, 1779, 
    732, 845, 952, 1031, 1100, 1155, 1, 177, 383, 577, 731, 844, 951, 1030, 
    1099, 1154, 29, 205, 411, 605, 759, 872, 959, 1038, 1107, 1166, 50, 226, 
    959, 1038, 60, 248, 446, 628, 108, 314, 512, 1100, 1155, 1, 177, 383, 
    577, 731, 844, 951, 1030, 1099, 1154, 29, 205, 411, 605, 759, 872, 959, 
    1038, 1107, 1166, 50, 226, 158, 364, 558, 1214, 951, 1030, 1099, 1154, 29, 
    205, 411, 605, 1733, 1100, 1155, 1, 177, 383, 577, 731, 844, 759, 872, 
    384, 578, 173, 379, 573, 727, 840, 947, 1026, 1095, 1138, 1197, 24, 200, 
    406, 600, 754, 867, 954, 1033, 1102, 1161, 45, 221, 427, 621, 762, 875, 
    962, 1041, 1110, 1169, 53, 229, 1690, 57, 245, 443, 625, 766, 879, 966, 
    1045, 1863, 1723, 1909, 1748, 1217, 1770, 1404, 1378, 1387, 1364, 1443, 1886, 1436, 
    1834, 1456, 1660, 1450, 1302, 1255, 1410, 1472, 1676, 1372, 1486, 1256, 1605, 1260, 
    1757, 1808, 1207, 1464, 1668, 1903, 1619, 1479, 1683, 1741, 1736, 1494, 1285, 1575, 
    1250, 1269, 1650, 1525, 1297, 1397, 1626, 1317, 1417, 1632, 1612, 1695, 1798, 1325, 
    1884, 1817, 1840, 1853, 1341, 1500, 1796, 1551, 1230, 1240, 1541, 1586, 1595, 1576, 
    1564, 1846, 1352, 1512, 1279, 1894, 1435, 1534, 105, 311, 161, 367, 561, 715, 
    828, 935, 1014, 1083, 170, 376, 570, 724, 837, 944, 1135, 1194, 732, 845, 
    952, 1031, 60, 284, 464, 646, 783, 890, 472, 149, 355, 130, 336, 534, 
    696, 292, 479, 654, 791, 898, 977, 78, 266, 164, 370, 564, 718, 831, 
    938, 1017, 1086, 113, 319, 517, 687, 810, 917, 996, 1065, 122, 328, 526, 
    87, 275, 455, 637, 774, 553, 498, 673, 233, 431, 69, 257, 96, 302, 
    489, 664, 801, 908, 987, 1056, 1117, 1176, 4, 180, 386, 580, 734, 847, 
    140, 346, 544, 706, 819, 926, 1005, 1074, 1126, 1185, 14, 190, 396, 590, 
    744, 857, 75, 263, 461, 643, 780, 887, 974, 1053, 1114, 1173, 0, 176, 
    382, 576, 730, 843, 950, 1029, 1098, 1157, 28, 204, 410, 604, 758, 871, 
    958, 1037, 1106, 1165, 49, 225, 1141, 1461, 959, 1038, 1665, 951, 1030, 1099, 
    1154, 29, 205, 411, 605, 1100, 1155, 1, 177, 383, 577, 731, 844, 759, 
    872, 384, 578, 1871, 
  };

  CS_ASSERT_RET_VAL(*(AsmStrs+RegAsmOffset[RegNo-1]) &&
          "Invalid alt name index for register!", NULL);
  return AsmStrs+RegAsmOffset[RegNo-1];
#else
  return NULL;
#endif // CAPSTONE_DIET
}
#ifdef PRINT_ALIAS_INSTR
#undef PRINT_ALIAS_INSTR

static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) {
#ifndef CAPSTONE_DIET
  static const PatternsForOpcode OpToPatterns[] = {
    {Mips_MFTACX, 0, 1 },
    {Mips_MFTACX_NM, 1, 1 },
    {Mips_MFTC0, 2, 1 },
    {Mips_MFTC0_NM, 3, 1 },
    {Mips_MFTHI, 4, 1 },
    {Mips_MFTHI_NM, 5, 1 },
    {Mips_MFTLO, 6, 1 },
    {Mips_MFTLO_NM, 7, 1 },
    {Mips_MTTACX, 8, 1 },
    {Mips_MTTACX_NM, 9, 1 },
    {Mips_MTTC0, 10, 1 },
    {Mips_MTTC0_NM, 11, 1 },
    {Mips_MTTHI, 12, 1 },
    {Mips_MTTHI_NM, 13, 1 },
    {Mips_MTTLO, 14, 1 },
    {Mips_MTTLO_NM, 15, 1 },
    {Mips_NORImm, 16, 1 },
    {Mips_NORImm64, 17, 1 },
    {Mips_SLTImm64, 18, 1 },
    {Mips_SLTUImm64, 19, 1 },
    {Mips_ADDIUGP48_NM, 20, 1 },
    {Mips_ADDIUGPB_NM, 21, 1 },
    {Mips_ADDIUGPW_NM, 22, 1 },
    {Mips_ADDIUPC, 23, 1 },
    {Mips_ADDIUPC_MMR6, 24, 1 },
    {Mips_ADDu, 25, 1 },
    {Mips_BC1F, 26, 1 },
    {Mips_BC1FL, 27, 1 },
    {Mips_BC1F_MM, 28, 1 },
    {Mips_BC1T, 29, 1 },
    {Mips_BC1TL, 30, 1 },
    {Mips_BC1T_MM, 31, 1 },
    {Mips_BEQC16_NM, 32, 1 },
    {Mips_BEQC_NM, 33, 2 },
    {Mips_BEQL, 35, 1 },
    {Mips_BGEZAL, 36, 1 },
    {Mips_BGEZAL_MM, 37, 1 },
    {Mips_BNEC16_NM, 38, 1 },
    {Mips_BNEC_NM, 39, 2 },
    {Mips_BNEL, 41, 1 },
    {Mips_BREAK, 42, 2 },
    {Mips_BREAK_MM, 44, 2 },
    {Mips_C_EQ_D32, 46, 1 },
    {Mips_C_EQ_D32_MM, 47, 1 },
    {Mips_C_EQ_D64, 48, 1 },
    {Mips_C_EQ_D64_MM, 49, 1 },
    {Mips_C_EQ_S, 50, 1 },
    {Mips_C_EQ_S_MM, 51, 1 },
    {Mips_C_F_D32, 52, 1 },
    {Mips_C_F_D32_MM, 53, 1 },
    {Mips_C_F_D64, 54, 1 },
    {Mips_C_F_D64_MM, 55, 1 },
    {Mips_C_F_S, 56, 1 },
    {Mips_C_F_S_MM, 57, 1 },
    {Mips_C_LE_D32, 58, 1 },
    {Mips_C_LE_D32_MM, 59, 1 },
    {Mips_C_LE_D64, 60, 1 },
    {Mips_C_LE_D64_MM, 61, 1 },
    {Mips_C_LE_S, 62, 1 },
    {Mips_C_LE_S_MM, 63, 1 },
    {Mips_C_LT_D32, 64, 1 },
    {Mips_C_LT_D32_MM, 65, 1 },
    {Mips_C_LT_D64, 66, 1 },
    {Mips_C_LT_D64_MM, 67, 1 },
    {Mips_C_LT_S, 68, 1 },
    {Mips_C_LT_S_MM, 69, 1 },
    {Mips_C_NGE_D32, 70, 1 },
    {Mips_C_NGE_D32_MM, 71, 1 },
    {Mips_C_NGE_D64, 72, 1 },
    {Mips_C_NGE_D64_MM, 73, 1 },
    {Mips_C_NGE_S, 74, 1 },
    {Mips_C_NGE_S_MM, 75, 1 },
    {Mips_C_NGLE_D32, 76, 1 },
    {Mips_C_NGLE_D32_MM, 77, 1 },
    {Mips_C_NGLE_D64, 78, 1 },
    {Mips_C_NGLE_D64_MM, 79, 1 },
    {Mips_C_NGLE_S, 80, 1 },
    {Mips_C_NGLE_S_MM, 81, 1 },
    {Mips_C_NGL_D32, 82, 1 },
    {Mips_C_NGL_D32_MM, 83, 1 },
    {Mips_C_NGL_D64, 84, 1 },
    {Mips_C_NGL_D64_MM, 85, 1 },
    {Mips_C_NGL_S, 86, 1 },
    {Mips_C_NGL_S_MM, 87, 1 },
    {Mips_C_NGT_D32, 88, 1 },
    {Mips_C_NGT_D32_MM, 89, 1 },
    {Mips_C_NGT_D64, 90, 1 },
    {Mips_C_NGT_D64_MM, 91, 1 },
    {Mips_C_NGT_S, 92, 1 },
    {Mips_C_NGT_S_MM, 93, 1 },
    {Mips_C_OLE_D32, 94, 1 },
    {Mips_C_OLE_D32_MM, 95, 1 },
    {Mips_C_OLE_D64, 96, 1 },
    {Mips_C_OLE_D64_MM, 97, 1 },
    {Mips_C_OLE_S, 98, 1 },
    {Mips_C_OLE_S_MM, 99, 1 },
    {Mips_C_OLT_D32, 100, 1 },
    {Mips_C_OLT_D32_MM, 101, 1 },
    {Mips_C_OLT_D64, 102, 1 },
    {Mips_C_OLT_D64_MM, 103, 1 },
    {Mips_C_OLT_S, 104, 1 },
    {Mips_C_OLT_S_MM, 105, 1 },
    {Mips_C_SEQ_D32, 106, 1 },
    {Mips_C_SEQ_D32_MM, 107, 1 },
    {Mips_C_SEQ_D64, 108, 1 },
    {Mips_C_SEQ_D64_MM, 109, 1 },
    {Mips_C_SEQ_S, 110, 1 },
    {Mips_C_SEQ_S_MM, 111, 1 },
    {Mips_C_SF_D32, 112, 1 },
    {Mips_C_SF_D32_MM, 113, 1 },
    {Mips_C_SF_D64, 114, 1 },
    {Mips_C_SF_D64_MM, 115, 1 },
    {Mips_C_SF_S, 116, 1 },
    {Mips_C_SF_S_MM, 117, 1 },
    {Mips_C_UEQ_D32, 118, 1 },
    {Mips_C_UEQ_D32_MM, 119, 1 },
    {Mips_C_UEQ_D64, 120, 1 },
    {Mips_C_UEQ_D64_MM, 121, 1 },
    {Mips_C_UEQ_S, 122, 1 },
    {Mips_C_UEQ_S_MM, 123, 1 },
    {Mips_C_ULE_D32, 124, 1 },
    {Mips_C_ULE_D32_MM, 125, 1 },
    {Mips_C_ULE_D64, 126, 1 },
    {Mips_C_ULE_D64_MM, 127, 1 },
    {Mips_C_ULE_S, 128, 1 },
    {Mips_C_ULE_S_MM, 129, 1 },
    {Mips_C_ULT_D32, 130, 1 },
    {Mips_C_ULT_D32_MM, 131, 1 },
    {Mips_C_ULT_D64, 132, 1 },
    {Mips_C_ULT_D64_MM, 133, 1 },
    {Mips_C_ULT_S, 134, 1 },
    {Mips_C_ULT_S_MM, 135, 1 },
    {Mips_C_UN_D32, 136, 1 },
    {Mips_C_UN_D32_MM, 137, 1 },
    {Mips_C_UN_D64, 138, 1 },
    {Mips_C_UN_D64_MM, 139, 1 },
    {Mips_C_UN_S, 140, 1 },
    {Mips_C_UN_S_MM, 141, 1 },
    {Mips_DADDu, 142, 1 },
    {Mips_DI, 143, 1 },
    {Mips_DIV, 144, 1 },
    {Mips_DIVU, 145, 1 },
    {Mips_DI_MM, 146, 1 },
    {Mips_DI_MMR6, 147, 1 },
    {Mips_DI_NM, 148, 1 },
    {Mips_DMT, 149, 1 },
    {Mips_DMT_NM, 150, 1 },
    {Mips_DSUB, 151, 2 },
    {Mips_DSUBu, 153, 2 },
    {Mips_DVPE, 155, 1 },
    {Mips_DVPE_NM, 156, 1 },
    {Mips_EI, 157, 1 },
    {Mips_EI_MM, 158, 1 },
    {Mips_EI_MMR6, 159, 1 },
    {Mips_EI_NM, 160, 1 },
    {Mips_EMT, 161, 1 },
    {Mips_EMT_NM, 162, 1 },
    {Mips_EVPE, 163, 1 },
    {Mips_EVPE_NM, 164, 1 },
    {Mips_HYPCALL, 165, 1 },
    {Mips_HYPCALL_MM, 166, 1 },
    {Mips_JALR, 167, 1 },
    {Mips_JALR64, 168, 1 },
    {Mips_JALRCHB_NM, 169, 1 },
    {Mips_JALRC_HB_MMR6, 170, 1 },
    {Mips_JALRC_MMR6, 171, 1 },
    {Mips_JALR_HB, 172, 1 },
    {Mips_JALR_HB64, 173, 1 },
    {Mips_JIALC, 174, 1 },
    {Mips_JIALC64, 175, 1 },
    {Mips_JIC, 176, 1 },
    {Mips_JIC64, 177, 1 },
    {Mips_MFC0_NM, 178, 1 },
    {Mips_MFHC0_NM, 179, 1 },
    {Mips_MOVE16_MM, 180, 1 },
    {Mips_MTC0_NM, 181, 1 },
    {Mips_MTHC0_NM, 182, 1 },
    {Mips_Move32R16, 183, 1 },
    {Mips_NOR_NM, 184, 1 },
    {Mips_OR, 185, 1 },
    {Mips_OR64, 186, 1 },
    {Mips_RDHWR, 187, 1 },
    {Mips_RDHWR64, 188, 1 },
    {Mips_RDHWR_MM, 189, 1 },
    {Mips_RDHWR_MMR6, 190, 1 },
    {Mips_RESTOREJRC16_NM, 191, 1 },
    {Mips_RESTOREJRC_NM, 192, 1 },
    {Mips_RESTORE_NM, 193, 1 },
    {Mips_ROTX_NM, 194, 3 },
    {Mips_SAVE16_NM, 197, 1 },
    {Mips_SAVE_NM, 198, 1 },
    {Mips_SDBBP, 199, 1 },
    {Mips_SDBBP_MMR6, 200, 1 },
    {Mips_SDBBP_R6, 201, 1 },
    {Mips_SIGRIE, 202, 1 },
    {Mips_SIGRIE_MMR6, 203, 1 },
    {Mips_SLL, 204, 1 },
    {Mips_SLL_MM, 205, 1 },
    {Mips_SLL_MMR6, 206, 1 },
    {Mips_SUB, 207, 2 },
    {Mips_SUBU_MMR6, 209, 2 },
    {Mips_SUB_MM, 211, 2 },
    {Mips_SUB_MMR6, 213, 2 },
    {Mips_SUBu, 215, 2 },
    {Mips_SUBu_MM, 217, 2 },
    {Mips_SWSP_MM, 219, 1 },
    {Mips_SYNC, 220, 1 },
    {Mips_SYNC_MM, 221, 1 },
    {Mips_SYNC_MMR6, 222, 1 },
    {Mips_SYNC_NM, 223, 6 },
    {Mips_SYSCALL, 229, 1 },
    {Mips_SYSCALL_MM, 230, 1 },
    {Mips_TEQ, 231, 1 },
    {Mips_TEQ_MM, 232, 1 },
    {Mips_TGE, 233, 1 },
    {Mips_TGEU, 234, 1 },
    {Mips_TGEU_MM, 235, 1 },
    {Mips_TGE_MM, 236, 1 },
    {Mips_TLT, 237, 1 },
    {Mips_TLTU, 238, 1 },
    {Mips_TLTU_MM, 239, 1 },
    {Mips_TLT_MM, 240, 1 },
    {Mips_TNE, 241, 1 },
    {Mips_TNE_MM, 242, 1 },
    {Mips_WAIT_MM, 243, 1 },
    {Mips_WAIT_NM, 244, 1 },
    {Mips_WRDSP, 245, 1 },
    {Mips_WRDSP_MM, 246, 1 },
    {Mips_YIELD, 247, 1 },
    {Mips_YIELD_NM, 248, 1 },
  {0},  };

  static const AliasPattern Patterns[] = {
    // Mips_MFTACX - 0
    {0, 0, 2, 5 },
    // Mips_MFTACX_NM - 1
    {0, 5, 2, 4 },
    // Mips_MFTC0 - 2
    {10, 9, 3, 6 },
    // Mips_MFTC0_NM - 3
    {10, 15, 3, 5 },
    // Mips_MFTHI - 4
    {23, 20, 2, 5 },
    // Mips_MFTHI_NM - 5
    {23, 25, 2, 4 },
    // Mips_MFTLO - 6
    {32, 29, 2, 5 },
    // Mips_MFTLO_NM - 7
    {32, 34, 2, 4 },
    // Mips_MTTACX - 8
    {41, 38, 2, 5 },
    // Mips_MTTACX_NM - 9
    {41, 43, 2, 4 },
    // Mips_MTTC0 - 10
    {51, 47, 3, 6 },
    // Mips_MTTC0_NM - 11
    {51, 53, 3, 5 },
    // Mips_MTTHI - 12
    {64, 58, 2, 5 },
    // Mips_MTTHI_NM - 13
    {64, 63, 2, 4 },
    // Mips_MTTLO - 14
    {73, 67, 2, 5 },
    // Mips_MTTLO_NM - 15
    {73, 72, 2, 4 },
    // Mips_NORImm - 16
    {82, 76, 3, 3 },
    // Mips_NORImm64 - 17
    {82, 79, 3, 3 },
    // Mips_SLTImm64 - 18
    {93, 82, 3, 3 },
    // Mips_SLTUImm64 - 19
    {104, 85, 3, 3 },
    // Mips_ADDIUGP48_NM - 20
    {116, 88, 3, 3 },
    // Mips_ADDIUGPB_NM - 21
    {137, 91, 3, 3 },
    // Mips_ADDIUGPW_NM - 22
    {156, 94, 3, 3 },
    // Mips_ADDIUPC - 23
    {175, 97, 2, 3 },
    // Mips_ADDIUPC_MMR6 - 24
    {175, 100, 2, 3 },
    // Mips_ADDu - 25
    {187, 103, 3, 7 },
    // Mips_BC1F - 26
    {199, 110, 2, 6 },
    // Mips_BC1FL - 27
    {209, 116, 2, 7 },
    // Mips_BC1F_MM - 28
    {199, 123, 2, 4 },
    // Mips_BC1T - 29
    {220, 127, 2, 6 },
    // Mips_BC1TL - 30
    {230, 133, 2, 7 },
    // Mips_BC1T_MM - 31
    {220, 140, 2, 4 },
    // Mips_BEQC16_NM - 32
    {241, 144, 3, 3 },
    // Mips_BEQC_NM - 33
    {259, 147, 3, 3 },
    {274, 150, 3, 3 },
    // Mips_BEQL - 35
    {289, 153, 3, 6 },
    // Mips_BGEZAL - 36
    {304, 159, 2, 6 },
    // Mips_BGEZAL_MM - 37
    {304, 165, 2, 3 },
    // Mips_BNEC16_NM - 38
    {313, 168, 3, 3 },
    // Mips_BNEC_NM - 39
    {331, 171, 3, 3 },
    {346, 174, 3, 3 },
    // Mips_BNEL - 41
    {361, 177, 3, 6 },
    // Mips_BREAK - 42
    {376, 183, 2, 5 },
    {382, 188, 2, 5 },
    // Mips_BREAK_MM - 44
    {376, 193, 2, 3 },
    {382, 196, 2, 3 },
    // Mips_C_EQ_D32 - 46
    {393, 199, 3, 9 },
    // Mips_C_EQ_D32_MM - 47
    {393, 208, 3, 7 },
    // Mips_C_EQ_D64 - 48
    {393, 215, 3, 9 },
    // Mips_C_EQ_D64_MM - 49
    {393, 224, 3, 7 },
    // Mips_C_EQ_S - 50
    {407, 231, 3, 8 },
    // Mips_C_EQ_S_MM - 51
    {407, 239, 3, 6 },
    // Mips_C_F_D32 - 52
    {421, 245, 3, 9 },
    // Mips_C_F_D32_MM - 53
    {421, 254, 3, 7 },
    // Mips_C_F_D64 - 54
    {421, 261, 3, 9 },
    // Mips_C_F_D64_MM - 55
    {421, 270, 3, 7 },
    // Mips_C_F_S - 56
    {434, 277, 3, 8 },
    // Mips_C_F_S_MM - 57
    {434, 285, 3, 6 },
    // Mips_C_LE_D32 - 58
    {447, 291, 3, 9 },
    // Mips_C_LE_D32_MM - 59
    {447, 300, 3, 7 },
    // Mips_C_LE_D64 - 60
    {447, 307, 3, 9 },
    // Mips_C_LE_D64_MM - 61
    {447, 316, 3, 7 },
    // Mips_C_LE_S - 62
    {461, 323, 3, 8 },
    // Mips_C_LE_S_MM - 63
    {461, 331, 3, 6 },
    // Mips_C_LT_D32 - 64
    {475, 337, 3, 9 },
    // Mips_C_LT_D32_MM - 65
    {475, 346, 3, 7 },
    // Mips_C_LT_D64 - 66
    {475, 353, 3, 9 },
    // Mips_C_LT_D64_MM - 67
    {475, 362, 3, 7 },
    // Mips_C_LT_S - 68
    {489, 369, 3, 8 },
    // Mips_C_LT_S_MM - 69
    {489, 377, 3, 6 },
    // Mips_C_NGE_D32 - 70
    {503, 383, 3, 9 },
    // Mips_C_NGE_D32_MM - 71
    {503, 392, 3, 7 },
    // Mips_C_NGE_D64 - 72
    {503, 399, 3, 9 },
    // Mips_C_NGE_D64_MM - 73
    {503, 408, 3, 7 },
    // Mips_C_NGE_S - 74
    {518, 415, 3, 8 },
    // Mips_C_NGE_S_MM - 75
    {518, 423, 3, 6 },
    // Mips_C_NGLE_D32 - 76
    {533, 429, 3, 9 },
    // Mips_C_NGLE_D32_MM - 77
    {533, 438, 3, 7 },
    // Mips_C_NGLE_D64 - 78
    {533, 445, 3, 9 },
    // Mips_C_NGLE_D64_MM - 79
    {533, 454, 3, 7 },
    // Mips_C_NGLE_S - 80
    {549, 461, 3, 8 },
    // Mips_C_NGLE_S_MM - 81
    {549, 469, 3, 6 },
    // Mips_C_NGL_D32 - 82
    {565, 475, 3, 9 },
    // Mips_C_NGL_D32_MM - 83
    {565, 484, 3, 7 },
    // Mips_C_NGL_D64 - 84
    {565, 491, 3, 9 },
    // Mips_C_NGL_D64_MM - 85
    {565, 500, 3, 7 },
    // Mips_C_NGL_S - 86
    {580, 507, 3, 8 },
    // Mips_C_NGL_S_MM - 87
    {580, 515, 3, 6 },
    // Mips_C_NGT_D32 - 88
    {595, 521, 3, 9 },
    // Mips_C_NGT_D32_MM - 89
    {595, 530, 3, 7 },
    // Mips_C_NGT_D64 - 90
    {595, 537, 3, 9 },
    // Mips_C_NGT_D64_MM - 91
    {595, 546, 3, 7 },
    // Mips_C_NGT_S - 92
    {610, 553, 3, 8 },
    // Mips_C_NGT_S_MM - 93
    {610, 561, 3, 6 },
    // Mips_C_OLE_D32 - 94
    {625, 567, 3, 9 },
    // Mips_C_OLE_D32_MM - 95
    {625, 576, 3, 7 },
    // Mips_C_OLE_D64 - 96
    {625, 583, 3, 9 },
    // Mips_C_OLE_D64_MM - 97
    {625, 592, 3, 7 },
    // Mips_C_OLE_S - 98
    {640, 599, 3, 8 },
    // Mips_C_OLE_S_MM - 99
    {640, 607, 3, 6 },
    // Mips_C_OLT_D32 - 100
    {655, 613, 3, 9 },
    // Mips_C_OLT_D32_MM - 101
    {655, 622, 3, 7 },
    // Mips_C_OLT_D64 - 102
    {655, 629, 3, 9 },
    // Mips_C_OLT_D64_MM - 103
    {655, 638, 3, 7 },
    // Mips_C_OLT_S - 104
    {670, 645, 3, 8 },
    // Mips_C_OLT_S_MM - 105
    {670, 653, 3, 6 },
    // Mips_C_SEQ_D32 - 106
    {685, 659, 3, 9 },
    // Mips_C_SEQ_D32_MM - 107
    {685, 668, 3, 7 },
    // Mips_C_SEQ_D64 - 108
    {685, 675, 3, 9 },
    // Mips_C_SEQ_D64_MM - 109
    {685, 684, 3, 7 },
    // Mips_C_SEQ_S - 110
    {700, 691, 3, 8 },
    // Mips_C_SEQ_S_MM - 111
    {700, 699, 3, 6 },
    // Mips_C_SF_D32 - 112
    {715, 705, 3, 9 },
    // Mips_C_SF_D32_MM - 113
    {715, 714, 3, 7 },
    // Mips_C_SF_D64 - 114
    {715, 721, 3, 9 },
    // Mips_C_SF_D64_MM - 115
    {715, 730, 3, 7 },
    // Mips_C_SF_S - 116
    {729, 737, 3, 8 },
    // Mips_C_SF_S_MM - 117
    {729, 745, 3, 6 },
    // Mips_C_UEQ_D32 - 118
    {743, 751, 3, 9 },
    // Mips_C_UEQ_D32_MM - 119
    {743, 760, 3, 7 },
    // Mips_C_UEQ_D64 - 120
    {743, 767, 3, 9 },
    // Mips_C_UEQ_D64_MM - 121
    {743, 776, 3, 7 },
    // Mips_C_UEQ_S - 122
    {758, 783, 3, 8 },
    // Mips_C_UEQ_S_MM - 123
    {758, 791, 3, 6 },
    // Mips_C_ULE_D32 - 124
    {773, 797, 3, 9 },
    // Mips_C_ULE_D32_MM - 125
    {773, 806, 3, 7 },
    // Mips_C_ULE_D64 - 126
    {773, 813, 3, 9 },
    // Mips_C_ULE_D64_MM - 127
    {773, 822, 3, 7 },
    // Mips_C_ULE_S - 128
    {788, 829, 3, 8 },
    // Mips_C_ULE_S_MM - 129
    {788, 837, 3, 6 },
    // Mips_C_ULT_D32 - 130
    {803, 843, 3, 9 },
    // Mips_C_ULT_D32_MM - 131
    {803, 852, 3, 7 },
    // Mips_C_ULT_D64 - 132
    {803, 859, 3, 9 },
    // Mips_C_ULT_D64_MM - 133
    {803, 868, 3, 7 },
    // Mips_C_ULT_S - 134
    {818, 875, 3, 8 },
    // Mips_C_ULT_S_MM - 135
    {818, 883, 3, 6 },
    // Mips_C_UN_D32 - 136
    {833, 889, 3, 9 },
    // Mips_C_UN_D32_MM - 137
    {833, 898, 3, 7 },
    // Mips_C_UN_D64 - 138
    {833, 905, 3, 9 },
    // Mips_C_UN_D64_MM - 139
    {833, 914, 3, 7 },
    // Mips_C_UN_S - 140
    {847, 921, 3, 8 },
    // Mips_C_UN_S_MM - 141
    {847, 929, 3, 6 },
    // Mips_DADDu - 142
    {187, 935, 3, 5 },
    // Mips_DI - 143
    {861, 940, 1, 5 },
    // Mips_DIV - 144
    {864, 945, 3, 5 },
    // Mips_DIVU - 145
    {875, 950, 3, 5 },
    // Mips_DI_MM - 146
    {861, 955, 1, 2 },
    // Mips_DI_MMR6 - 147
    {861, 957, 1, 3 },
    // Mips_DI_NM - 148
    {861, 960, 1, 2 },
    // Mips_DMT - 149
    {887, 962, 1, 4 },
    // Mips_DMT_NM - 150
    {887, 966, 1, 3 },
    // Mips_DSUB - 151
    {891, 969, 3, 6 },
    {903, 975, 3, 6 },
    // Mips_DSUBu - 153
    {911, 981, 3, 6 },
    {924, 987, 3, 6 },
    // Mips_DVPE - 155
    {933, 993, 1, 4 },
    // Mips_DVPE_NM - 156
    {933, 997, 1, 3 },
    // Mips_EI - 157
    {938, 1000, 1, 5 },
    // Mips_EI_MM - 158
    {938, 1005, 1, 2 },
    // Mips_EI_MMR6 - 159
    {938, 1007, 1, 3 },
    // Mips_EI_NM - 160
    {938, 1010, 1, 2 },
    // Mips_EMT - 161
    {941, 1012, 1, 4 },
    // Mips_EMT_NM - 162
    {941, 1016, 1, 3 },
    // Mips_EVPE - 163
    {945, 1019, 1, 4 },
    // Mips_EVPE_NM - 164
    {945, 1023, 1, 3 },
    // Mips_HYPCALL - 165
    {950, 1026, 1, 6 },
    // Mips_HYPCALL_MM - 166
    {950, 1032, 1, 4 },
    // Mips_JALR - 167
    {958, 1036, 2, 6 },
    // Mips_JALR64 - 168
    {958, 1042, 2, 4 },
    // Mips_JALRCHB_NM - 169
    {964, 1046, 2, 3 },
    // Mips_JALRC_HB_MMR6 - 170
    {974, 1049, 2, 4 },
    // Mips_JALRC_MMR6 - 171
    {986, 1053, 2, 4 },
    // Mips_JALR_HB - 172
    {995, 1057, 2, 6 },
    // Mips_JALR_HB64 - 173
    {995, 1063, 2, 5 },
    // Mips_JIALC - 174
    {1006, 1068, 2, 6 },
    // Mips_JIALC64 - 175
    {1006, 1074, 2, 4 },
    // Mips_JIC - 176
    {1015, 1078, 2, 5 },
    // Mips_JIC64 - 177
    {1015, 1083, 2, 4 },
    // Mips_MFC0_NM - 178
    {1022, 1087, 3, 4 },
    // Mips_MFHC0_NM - 179
    {1034, 1091, 3, 4 },
    // Mips_MOVE16_MM - 180
    {1047, 1095, 2, 3 },
    // Mips_MTC0_NM - 181
    {1051, 1098, 3, 4 },
    // Mips_MTHC0_NM - 182
    {1063, 1102, 3, 4 },
    // Mips_Move32R16 - 183
    {1047, 1106, 2, 3 },
    // Mips_NOR_NM - 184
    {1076, 1109, 3, 4 },
    // Mips_OR - 185
    {187, 1113, 3, 7 },
    // Mips_OR64 - 186
    {187, 1120, 3, 5 },
    // Mips_RDHWR - 187
    {1087, 1125, 3, 6 },
    // Mips_RDHWR64 - 188
    {1087, 1131, 3, 4 },
    // Mips_RDHWR_MM - 189
    {1087, 1135, 3, 5 },
    // Mips_RDHWR_MMR6 - 190
    {1087, 1140, 3, 5 },
    // Mips_RESTOREJRC16_NM - 191
    {1100, 1145, 2, 2 },
    // Mips_RESTOREJRC_NM - 192
    {1117, 1147, 2, 2 },
    // Mips_RESTORE_NM - 193
    {1134, 1149, 2, 2 },
    // Mips_ROTX_NM - 194
    {1147, 1151, 5, 6 },
    {1162, 1157, 5, 6 },
    {1177, 1163, 5, 6 },
    // Mips_SAVE16_NM - 197
    {1193, 1169, 2, 2 },
    // Mips_SAVE_NM - 198
    {1203, 1171, 2, 2 },
    // Mips_SDBBP - 199
    {1213, 1173, 1, 5 },
    // Mips_SDBBP_MMR6 - 200
    {1213, 1178, 1, 3 },
    // Mips_SDBBP_R6 - 201
    {1213, 1181, 1, 4 },
    // Mips_SIGRIE - 202
    {1219, 1185, 1, 4 },
    // Mips_SIGRIE_MMR6 - 203
    {1219, 1189, 1, 3 },
    // Mips_SLL - 204
    {1047, 1192, 3, 6 },
    // Mips_SLL_MM - 205
    {1047, 1198, 3, 4 },
    // Mips_SLL_MMR6 - 206
    {1047, 1202, 3, 5 },
    // Mips_SUB - 207
    {1226, 1207, 3, 6 },
    {1237, 1213, 3, 6 },
    // Mips_SUBU_MMR6 - 209
    {1244, 1219, 3, 5 },
    {1256, 1224, 3, 5 },
    // Mips_SUB_MM - 211
    {1226, 1229, 3, 5 },
    {1237, 1234, 3, 5 },
    // Mips_SUB_MMR6 - 213
    {1226, 1239, 3, 5 },
    {1237, 1244, 3, 5 },
    // Mips_SUBu - 215
    {1244, 1249, 3, 6 },
    {1256, 1255, 3, 6 },
    // Mips_SUBu_MM - 217
    {1244, 1261, 3, 5 },
    {1256, 1266, 3, 5 },
    // Mips_SWSP_MM - 219
    {1264, 1271, 3, 2 },
    // Mips_SYNC - 220
    {1276, 1273, 1, 5 },
    // Mips_SYNC_MM - 221
    {1276, 1278, 1, 2 },
    // Mips_SYNC_MMR6 - 222
    {1276, 1280, 1, 3 },
    // Mips_SYNC_NM - 223
    {1276, 1283, 1, 2 },
    {1281, 1285, 1, 2 },
    {1290, 1287, 1, 2 },
    {1298, 1289, 1, 2 },
    {1311, 1291, 1, 2 },
    {1324, 1293, 1, 2 },
    // Mips_SYSCALL - 229
    {1333, 1295, 1, 4 },
    // Mips_SYSCALL_MM - 230
    {1333, 1299, 1, 2 },
    // Mips_TEQ - 231
    {1341, 1301, 3, 7 },
    // Mips_TEQ_MM - 232
    {1341, 1308, 3, 4 },
    // Mips_TGE - 233
    {1352, 1312, 3, 7 },
    // Mips_TGEU - 234
    {1363, 1319, 3, 7 },
    // Mips_TGEU_MM - 235
    {1363, 1326, 3, 4 },
    // Mips_TGE_MM - 236
    {1352, 1330, 3, 4 },
    // Mips_TLT - 237
    {1375, 1334, 3, 7 },
    // Mips_TLTU - 238
    {1386, 1341, 3, 7 },
    // Mips_TLTU_MM - 239
    {1386, 1348, 3, 4 },
    // Mips_TLT_MM - 240
    {1375, 1352, 3, 4 },
    // Mips_TNE - 241
    {1398, 1356, 3, 7 },
    // Mips_TNE_MM - 242
    {1398, 1363, 3, 4 },
    // Mips_WAIT_MM - 243
    {1409, 1367, 1, 2 },
    // Mips_WAIT_NM - 244
    {1409, 1369, 1, 2 },
    // Mips_WRDSP - 245
    {1414, 1371, 2, 4 },
    // Mips_WRDSP_MM - 246
    {1414, 1375, 2, 4 },
    // Mips_YIELD - 247
    {1423, 1379, 2, 5 },
    // Mips_YIELD_NM - 248
    {1423, 1384, 2, 4 },
  {0},  };

  static const AliasPatternCond Conds[] = {
    // (MFTACX GPR32Opnd:$rt, AC0) - 0
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (MFTACX_NM GPRNM32Opnd:$rt, AC0) - 5
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (MFTC0 GPR32Opnd:$rd, COP0Opnd:$rt, 0) - 9
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_COP0RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (MFTC0_NM GPRNM32Opnd:$rd, COP0Opnd:$rt, 0) - 15
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_COP0RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (MFTHI GPR32Opnd:$rt, AC0) - 20
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (MFTHI_NM GPRNM32Opnd:$rt, AC0) - 25
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (MFTLO GPR32Opnd:$rt, AC0) - 29
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (MFTLO_NM GPRNM32Opnd:$rt, AC0) - 34
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (MTTACX AC0, GPR32Opnd:$rt) - 38
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (MTTACX_NM AC0, GPRNM32Opnd:$rt) - 43
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (MTTC0 COP0Opnd:$rt, GPR32Opnd:$rd, 0) - 47
    {AliasPatternCond_K_RegClass, Mips_COP0RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (MTTC0_NM COP0Opnd:$rt, GPRNM32Opnd:$rd, 0) - 53
    {AliasPatternCond_K_RegClass, Mips_COP0RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (MTTHI AC0, GPR32Opnd:$rt) - 58
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (MTTHI_NM AC0, GPRNM32Opnd:$rt) - 63
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (MTTLO AC0, GPR32Opnd:$rt) - 67
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (MTTLO_NM AC0, GPRNM32Opnd:$rt) - 72
    {AliasPatternCond_K_Reg, Mips_AC0},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (NORImm GPR32Opnd:$rs, GPR32Opnd:$rs, simm32_relaxed:$imm) - 76
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit},
    // (NORImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, imm64:$imm) - 79
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit},
    // (SLTImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, imm64:$imm) - 82
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit},
    // (SLTUImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, imm64:$imm) - 85
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit},
    // (ADDIUGP48_NM GPRNM48Opnd:$rt, GPRNMGPOpnd:$rs, sym32_gp_nm:$addr) - 88
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNMGPRegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (ADDIUGPB_NM GPRNM32Opnd:$rt, GPRNMGPOpnd:$rs, sym32_gp_nm:$offset) - 91
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNMGPRegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (ADDIUGPW_NM GPRNM32Opnd:$rt, GPRNMGPOpnd:$rs, sym32_gp_nm:$offset) - 94
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNMGPRegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (ADDIUPC GPR32Opnd:$rd, simm19_lsl2:$imm) - 97
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (ADDIUPC_MMR6 GPR32Opnd:$rd, simm19_lsl2:$imm) - 100
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (ADDu GPR32Opnd:$dst, GPR32Opnd:$src, ZERO) - 103
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (BC1F FCC0, brtarget:$offset) - 110
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (BC1FL FCC0, brtarget:$offset) - 116
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (BC1F_MM FCC0, brtarget:$offset) - 123
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (BC1T FCC0, brtarget:$offset) - 127
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (BC1TL FCC0, brtarget:$offset) - 133
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (BC1T_MM FCC0, brtarget:$offset) - 140
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (BEQC16_NM GPRNM16R3Opnd:$rs, GPRNM16R3Opnd:$rt, brtarget4s1_nm:$offset) - 144
    {AliasPatternCond_K_RegClass, Mips_GPRNM3RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNM3RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (BEQC_NM GPRNM32Opnd:$rt, ZERO_NM, brtarget14_nm:$offset) - 147
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (BEQC_NM ZERO_NM, GPRNM32Opnd:$rt, brtarget14_nm:$offset) - 150
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (BEQL GPR32Opnd:$rs, ZERO, brtarget:$offset) - 153
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (BGEZAL ZERO, brtarget:$offset) - 159
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (BGEZAL_MM ZERO, brtarget_mm:$offset) - 165
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    // (BNEC16_NM GPRNM16R3Opnd:$rs, GPRNM16R3Opnd:$rt, brtarget4s1_nm:$offset) - 168
    {AliasPatternCond_K_RegClass, Mips_GPRNM3RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNM3RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (BNEC_NM GPRNM32Opnd:$rt, ZERO_NM, brtarget14_nm:$offset) - 171
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (BNEC_NM ZERO_NM, GPRNM32Opnd:$rt, brtarget14_nm:$offset) - 174
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (BNEL GPR32Opnd:$rs, ZERO, brtarget:$offset) - 177
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (BREAK 0, 0) - 183
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (BREAK uimm10:$imm, 0) - 188
    {AliasPatternCond_K_Ignore, 0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (BREAK_MM 0, 0) - 193
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (BREAK_MM uimm10:$imm, 0) - 196
    {AliasPatternCond_K_Ignore, 0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (C_EQ_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 199
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_EQ_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 208
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_EQ_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 215
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_EQ_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 224
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_EQ_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 231
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_EQ_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 239
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_F_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 245
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_F_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 254
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_F_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 261
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_F_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 270
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_F_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 277
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_F_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 285
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_LE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 291
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_LE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 300
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_LE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 307
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_LE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 316
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_LE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 323
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_LE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 331
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_LT_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 337
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_LT_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 346
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_LT_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 353
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_LT_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 362
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_LT_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 369
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_LT_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 377
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 383
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 392
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 399
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 408
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 415
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 423
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGLE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 429
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGLE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 438
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGLE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 445
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGLE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 454
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGLE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 461
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGLE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 469
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGL_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 475
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGL_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 484
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGL_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 491
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGL_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 500
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGL_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 507
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGL_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 515
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGT_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 521
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGT_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 530
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGT_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 537
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGT_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 546
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_NGT_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 553
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_NGT_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 561
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_OLE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 567
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_OLE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 576
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_OLE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 583
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_OLE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 592
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_OLE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 599
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_OLE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 607
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_OLT_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 613
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_OLT_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 622
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_OLT_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 629
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_OLT_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 638
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_OLT_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 645
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_OLT_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 653
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_SEQ_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 659
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_SEQ_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 668
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_SEQ_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 675
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_SEQ_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 684
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_SEQ_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 691
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_SEQ_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 699
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_SF_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 705
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_SF_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 714
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_SF_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 721
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_SF_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 730
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_SF_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 737
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_SF_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 745
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_UEQ_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 751
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_UEQ_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 760
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_UEQ_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 767
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_UEQ_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 776
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_UEQ_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 783
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_UEQ_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 791
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_ULE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 797
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_ULE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 806
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_ULE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 813
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_ULE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 822
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_ULE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 829
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_ULE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 837
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_ULT_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 843
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_ULT_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 852
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_ULT_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 859
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_ULT_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 868
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_ULT_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 875
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_ULT_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 883
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_UN_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 889
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_UN_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 898
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_UN_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 905
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_UN_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 914
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (C_UN_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 921
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (C_UN_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 929
    {AliasPatternCond_K_Reg, Mips_FCC0},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat},
    // (DADDu GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64) - 935
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_64},
    {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (DI ZERO) - 940
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (DIV GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt) - 945
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (DIVU GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt) - 950
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (DI_MM ZERO) - 955
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (DI_MMR6 ZERO) - 957
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (DI_NM ZERO_NM) - 960
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (DMT ZERO) - 962
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (DMT_NM ZERO_NM) - 966
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs) - 969
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_64},
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips3},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt) - 975
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_64},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips3},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (DSUBu GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs) - 981
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_64},
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips3},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (DSUBu GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt) - 987
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_64},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips3},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (DVPE ZERO) - 993
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (DVPE_NM ZERO_NM) - 997
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (EI ZERO) - 1000
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (EI_MM ZERO) - 1005
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (EI_MMR6 ZERO) - 1007
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (EI_NM ZERO_NM) - 1010
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (EMT ZERO) - 1012
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (EMT_NM ZERO_NM) - 1016
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (EVPE ZERO) - 1019
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (EVPE_NM ZERO_NM) - 1023
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    // (HYPCALL 0) - 1026
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r5},
    {AliasPatternCond_K_Feature, Mips_FeatureVirt},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (HYPCALL_MM 0) - 1032
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r5},
    {AliasPatternCond_K_Feature, Mips_FeatureVirt},
    // (JALR ZERO, GPR32Opnd:$rs) - 1036
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (JALR64 ZERO_64, GPR64Opnd:$rs) - 1042
    {AliasPatternCond_K_Reg, Mips_ZERO_64},
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips64r6},
    // (JALRCHB_NM ZERO_NM, GPRNM32Opnd:$rs) - 1046
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (JALRC_HB_MMR6 RA, GPR32Opnd:$rs) - 1049
    {AliasPatternCond_K_Reg, Mips_RA},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (JALRC_MMR6 RA, GPR32Opnd:$rs) - 1053
    {AliasPatternCond_K_Reg, Mips_RA},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (JALR_HB RA, GPR32Opnd:$rs) - 1057
    {AliasPatternCond_K_Reg, Mips_RA},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (JALR_HB64 RA_64, GPR64Opnd:$rs) - 1063
    {AliasPatternCond_K_Reg, Mips_RA_64},
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips64},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (JIALC GPR32Opnd:$rs, 0) - 1068
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (JIALC64 GPR64Opnd:$rs, 0) - 1074
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips64r6},
    // (JIC GPR32Opnd:$rs, 0) - 1078
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (JIC64 GPR64Opnd:$rs, 0) - 1083
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips64r6},
    // (MFC0_NM GPRNM32Opnd:$rt, COP0Opnd:$c0s, 0) - 1087
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_COP0RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (MFHC0_NM GPRNM32Opnd:$rt, COP0Opnd:$c0s, 0) - 1091
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_COP0RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (MOVE16_MM ZERO, ZERO) - 1095
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (MTC0_NM GPRNM32Opnd:$rt, COP0Opnd:$c0s, 0) - 1098
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_COP0RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (MTHC0_NM GPRNM32Opnd:$rt, COP0Opnd:$c0s, 0) - 1102
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_COP0RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (Move32R16 ZERO, S0) - 1106
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Reg, Mips_S0},
    {AliasPatternCond_K_Feature, Mips_FeatureMips16},
    // (NOR_NM GPRNM32Opnd:$rt, GPRNM32Opnd:$rs, ZERO_NM) - 1109
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (OR GPR32Opnd:$dst, GPR32Opnd:$src, ZERO) - 1113
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (OR64 GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64) - 1120
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO_64},
    {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (RDHWR GPR32Opnd:$rt, HWRegsOpnd:$rs, 0) - 1125
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_HWRegsRegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (RDHWR64 GPR64Opnd:$rt, HWRegsOpnd:$rs, 0) - 1131
    {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID},
    {AliasPatternCond_K_RegClass, Mips_HWRegsRegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit},
    // (RDHWR_MM GPR32Opnd:$rt, HWRegsOpnd:$rs, 0) - 1135
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_HWRegsRegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    // (RDHWR_MMR6 GPR32Opnd:$rt, HWRegsOpnd:$rs, 0) - 1140
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_HWRegsRegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (RESTOREJRC16_NM uimm8s4_nm:$adj, 0) - 1145
    {AliasPatternCond_K_Ignore, 0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    // (RESTOREJRC_NM uimm12s3_nm:$adj, 0) - 1147
    {AliasPatternCond_K_Ignore, 0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    // (RESTORE_NM uimm12s3_nm:$adj, 0) - 1149
    {AliasPatternCond_K_Ignore, 0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    // (ROTX_NM GPRNM32Opnd:$rt, GPRNM32Opnd:$rs, 7, 8, 1) - 1151
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)7},
    {AliasPatternCond_K_Imm, (uint32_t)8},
    {AliasPatternCond_K_Imm, (uint32_t)1},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (ROTX_NM GPRNM32Opnd:$rt, GPRNM32Opnd:$rs, 15, 16, 0) - 1157
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)15},
    {AliasPatternCond_K_Imm, (uint32_t)16},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (ROTX_NM GPRNM32Opnd:$rt, GPRNM32Opnd:$rs, 8, 24, 0) - 1163
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)8},
    {AliasPatternCond_K_Imm, (uint32_t)24},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (SAVE16_NM uimm8s4_nm:$adj, 0) - 1169
    {AliasPatternCond_K_Ignore, 0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    // (SAVE_NM uimm12s3_nm:$adj, 0) - 1171
    {AliasPatternCond_K_Ignore, 0},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    // (SDBBP 0) - 1173
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6},
    // (SDBBP_MMR6 0) - 1178
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (SDBBP_R6 0) - 1181
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (SIGRIE 0) - 1185
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (SIGRIE_MMR6 0) - 1189
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (SLL ZERO, ZERO, 0) - 1192
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (SLL_MM ZERO, ZERO, 0) - 1198
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (SLL_MMR6 ZERO, ZERO, 0) - 1202
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1207
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1213
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (SUBU_MMR6 GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1219
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (SUBU_MMR6 GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1224
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (SUB_MM GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1229
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    // (SUB_MM GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1234
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    // (SUB_MMR6 GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1239
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (SUB_MMR6 GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1244
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1249
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1255
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (SUBu_MM GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1261
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    // (SUBu_MM GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1266
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_TiedReg, 0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6},
    // (SWSP_MM GPR32Opnd:$rt, mem_mm_sp_imm5_lsl2:$offset) - 1271
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (SYNC 0) - 1273
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (SYNC_MM 0) - 1278
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (SYNC_MMR6 0) - 1280
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMips32r6},
    // (SYNC_NM 0) - 1283
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (SYNC_NM 4) - 1285
    {AliasPatternCond_K_Imm, (uint32_t)4},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (SYNC_NM 16) - 1287
    {AliasPatternCond_K_Imm, (uint32_t)16},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (SYNC_NM 17) - 1289
    {AliasPatternCond_K_Imm, (uint32_t)17},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (SYNC_NM 18) - 1291
    {AliasPatternCond_K_Imm, (uint32_t)18},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (SYNC_NM 19) - 1293
    {AliasPatternCond_K_Imm, (uint32_t)19},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (SYSCALL 0) - 1295
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (SYSCALL_MM 0) - 1299
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (TEQ GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1301
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (TEQ_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1308
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (TGE GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1312
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (TGEU GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1319
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (TGEU_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1326
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (TGE_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1330
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (TLT GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1334
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (TLTU GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1341
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (TLTU_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1348
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (TLT_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1352
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (TNE GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1356
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMips16},
    {AliasPatternCond_K_Feature, Mips_FeatureMips2},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (TNE_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1363
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (WAIT_MM 0) - 1367
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (WAIT_NM 0) - 1369
    {AliasPatternCond_K_Imm, (uint32_t)0},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    // (WRDSP GPR32Opnd:$rt, 31) - 1371
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)31},
    {AliasPatternCond_K_Feature, Mips_FeatureDSP},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    // (WRDSP_MM GPR32Opnd:$rt, 31) - 1375
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Imm, (uint32_t)31},
    {AliasPatternCond_K_Feature, Mips_FeatureDSP},
    {AliasPatternCond_K_Feature, Mips_FeatureMicroMips},
    // (YIELD ZERO, GPR32Opnd:$rs) - 1379
    {AliasPatternCond_K_Reg, Mips_ZERO},
    {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
    {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips},
    {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips},
    // (YIELD_NM ZERO_NM, GPRNM32Opnd:$rs) - 1384
    {AliasPatternCond_K_Reg, Mips_ZERO_NM},
    {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID},
    {AliasPatternCond_K_Feature, Mips_FeatureNanoMips},
    {AliasPatternCond_K_Feature, Mips_FeatureMT},
  {0},  };

  static const char AsmStrings[] =
    /* 0 */ "mftacx $\x01\0"
    /* 10 */ "mftc0 $\x01, $\x02\0"
    /* 23 */ "mfthi $\x01\0"
    /* 32 */ "mftlo $\x01\0"
    /* 41 */ "mttacx $\x02\0"
    /* 51 */ "mttc0 $\x02, $\x01\0"
    /* 64 */ "mtthi $\x02\0"
    /* 73 */ "mttlo $\x02\0"
    /* 82 */ "nor	$\x01, $\x03\0"
    /* 93 */ "slt	$\x01, $\x03\0"
    /* 104 */ "sltu	$\x01, $\x03\0"
    /* 116 */ "addiu.b32 $\x01, $\x02, $\x03\0"
    /* 137 */ "addiu.b $\x01, $\x02, $\x03\0"
    /* 156 */ "addiu.w $\x01, $\x02, $\x03\0"
    /* 175 */ "lapc $\x01, $\x02\0"
    /* 187 */ "move $\x01, $\x02\0"
    /* 199 */ "bc1f $\xFF\x02\x01\0"
    /* 209 */ "bc1fl $\xFF\x02\x01\0"
    /* 220 */ "bc1t $\xFF\x02\x01\0"
    /* 230 */ "bc1tl $\xFF\x02\x01\0"
    /* 241 */ "beqc $\x02, $\x01, $\xFF\x03\x01\0"
    /* 259 */ "beqzc $\x01, $\xFF\x03\x01\0"
    /* 274 */ "beqzc $\x02, $\xFF\x03\x01\0"
    /* 289 */ "beqzl $\x01, $\xFF\x03\x01\0"
    /* 304 */ "bal $\xFF\x02\x01\0"
    /* 313 */ "bnec $\x02, $\x01, $\xFF\x03\x01\0"
    /* 331 */ "bnezc $\x01, $\xFF\x03\x01\0"
    /* 346 */ "bnezc $\x02, $\xFF\x03\x01\0"
    /* 361 */ "bnezl $\x01, $\xFF\x03\x01\0"
    /* 376 */ "break\0"
    /* 382 */ "break $\xFF\x01\x02\0"
    /* 393 */ "c.eq.d $\x02, $\x03\0"
    /* 407 */ "c.eq.s $\x02, $\x03\0"
    /* 421 */ "c.f.d $\x02, $\x03\0"
    /* 434 */ "c.f.s $\x02, $\x03\0"
    /* 447 */ "c.le.d $\x02, $\x03\0"
    /* 461 */ "c.le.s $\x02, $\x03\0"
    /* 475 */ "c.lt.d $\x02, $\x03\0"
    /* 489 */ "c.lt.s $\x02, $\x03\0"
    /* 503 */ "c.nge.d $\x02, $\x03\0"
    /* 518 */ "c.nge.s $\x02, $\x03\0"
    /* 533 */ "c.ngle.d $\x02, $\x03\0"
    /* 549 */ "c.ngle.s $\x02, $\x03\0"
    /* 565 */ "c.ngl.d $\x02, $\x03\0"
    /* 580 */ "c.ngl.s $\x02, $\x03\0"
    /* 595 */ "c.ngt.d $\x02, $\x03\0"
    /* 610 */ "c.ngt.s $\x02, $\x03\0"
    /* 625 */ "c.ole.d $\x02, $\x03\0"
    /* 640 */ "c.ole.s $\x02, $\x03\0"
    /* 655 */ "c.olt.d $\x02, $\x03\0"
    /* 670 */ "c.olt.s $\x02, $\x03\0"
    /* 685 */ "c.seq.d $\x02, $\x03\0"
    /* 700 */ "c.seq.s $\x02, $\x03\0"
    /* 715 */ "c.sf.d $\x02, $\x03\0"
    /* 729 */ "c.sf.s $\x02, $\x03\0"
    /* 743 */ "c.ueq.d $\x02, $\x03\0"
    /* 758 */ "c.ueq.s $\x02, $\x03\0"
    /* 773 */ "c.ule.d $\x02, $\x03\0"
    /* 788 */ "c.ule.s $\x02, $\x03\0"
    /* 803 */ "c.ult.d $\x02, $\x03\0"
    /* 818 */ "c.ult.s $\x02, $\x03\0"
    /* 833 */ "c.un.d $\x02, $\x03\0"
    /* 847 */ "c.un.s $\x02, $\x03\0"
    /* 861 */ "di\0"
    /* 864 */ "div $\x01, $\x03\0"
    /* 875 */ "divu $\x01, $\x03\0"
    /* 887 */ "dmt\0"
    /* 891 */ "dneg $\x01, $\x03\0"
    /* 903 */ "dneg $\x01\0"
    /* 911 */ "dnegu $\x01, $\x03\0"
    /* 924 */ "dnegu $\x01\0"
    /* 933 */ "dvpe\0"
    /* 938 */ "ei\0"
    /* 941 */ "emt\0"
    /* 945 */ "evpe\0"
    /* 950 */ "hypcall\0"
    /* 958 */ "jr $\x02\0"
    /* 964 */ "jrc.hb $\x02\0"
    /* 974 */ "jalrc.hb $\x02\0"
    /* 986 */ "jalrc $\x02\0"
    /* 995 */ "jalr.hb $\x02\0"
    /* 1006 */ "jalrc $\x01\0"
    /* 1015 */ "jrc $\x01\0"
    /* 1022 */ "mfc0 $\x01, $\x02\0"
    /* 1034 */ "mfhc0 $\x01, $\x02\0"
    /* 1047 */ "nop\0"
    /* 1051 */ "mtc0 $\x01, $\x02\0"
    /* 1063 */ "mthc0 $\x01, $\x02\0"
    /* 1076 */ "not $\x01, $\x02\0"
    /* 1087 */ "rdhwr $\x01, $\x02\0"
    /* 1100 */ "restore.jrc $\xFF\x01\x03\0"
    /* 1117 */ "restore.jrc $\xFF\x01\x04\0"
    /* 1134 */ "restore $\xFF\x01\x04\0"
    /* 1147 */ "bitrevb $\x01, $\x02\0"
    /* 1162 */ "bitrevh $\x01, $\x02\0"
    /* 1177 */ "byterevh $\x01, $\x02\0"
    /* 1193 */ "save $\xFF\x01\x03\0"
    /* 1203 */ "save $\xFF\x01\x04\0"
    /* 1213 */ "sdbbp\0"
    /* 1219 */ "sigrie\0"
    /* 1226 */ "neg $\x01, $\x03\0"
    /* 1237 */ "neg $\x01\0"
    /* 1244 */ "negu $\x01, $\x03\0"
    /* 1256 */ "negu $\x01\0"
    /* 1264 */ "sw $\x01, $\xFF\x02\x05\0"
    /* 1276 */ "sync\0"
    /* 1281 */ "sync_wmb\0"
    /* 1290 */ "sync_mb\0"
    /* 1298 */ "sync_acquire\0"
    /* 1311 */ "sync_release\0"
    /* 1324 */ "sync_rmb\0"
    /* 1333 */ "syscall\0"
    /* 1341 */ "teq $\x01, $\x02\0"
    /* 1352 */ "tge $\x01, $\x02\0"
    /* 1363 */ "tgeu $\x01, $\x02\0"
    /* 1375 */ "tlt $\x01, $\x02\0"
    /* 1386 */ "tltu $\x01, $\x02\0"
    /* 1398 */ "tne $\x01, $\x02\0"
    /* 1409 */ "wait\0"
    /* 1414 */ "wrdsp $\x01\0"
    /* 1423 */ "yield $\x02\0"
  ;

#ifndef NDEBUG
  //static struct SortCheck {
  //  SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) {
  //    assert(std::is_sorted(
  //               OpToPatterns.begin(), OpToPatterns.end(),
  //               [](const PatternsForOpcode &L, const //PatternsForOpcode &R) {
  //                 return L.Opcode < R.Opcode;
  //               }) &&
  //           "tablegen failed to sort opcode patterns");
  //  }
  //} sortCheckVar(OpToPatterns);
#endif

  AliasMatchingData M = {
    OpToPatterns,
    Patterns,
    Conds,
    AsmStrings,
    NULL,
  };
  const char *AsmString = matchAliasPatterns(MI, &M);
  if (!AsmString) return false;

  unsigned I = 0;
  while (AsmString[I] != ' ' && AsmString[I] != '\t' &&
         AsmString[I] != '$' && AsmString[I] != '\0')
    ++I;
  SStream_concat1(OS, '\t');
  char *substr = malloc(I+1);
  memcpy(substr, AsmString, I);
  substr[I] = '\0';
  SStream_concat0(OS, substr);
  free(substr);
  if (AsmString[I] != '\0') {
    if (AsmString[I] == ' ' || AsmString[I] == '\t') {
      SStream_concat1(OS, '\t');
      ++I;
    }
    do {
      if (AsmString[I] == '$') {
        ++I;
        if (AsmString[I] == (char)0xff) {
          ++I;
          int OpIdx = AsmString[I++] - 1;
          int PrintMethodIdx = AsmString[I++] - 1;
          printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, OS);
        } else
          printOperand(MI, ((unsigned)AsmString[I++]) - 1, OS);
      } else {
        SStream_concat1(OS, AsmString[I++]);
      }
    } while (AsmString[I] != '\0');
  }

  return true;
#else
  return false;
#endif // CAPSTONE_DIET
}

static void printCustomAliasOperand(
         MCInst *MI, uint64_t Address, unsigned OpIdx,
         unsigned PrintMethodIdx,
         SStream *OS) {
#ifndef CAPSTONE_DIET
  switch (PrintMethodIdx) {
  default:
    CS_ASSERT_RET(0 && "Unknown PrintMethod kind");
    break;
  case 0:
    printBranchOperand(MI, Address, OpIdx, OS);
    break;
  case 1:
    printUImm_10_0(MI, OpIdx, OS);
    break;
  case 2:
    printUImm_8_0(MI, OpIdx, OS);
    break;
  case 3:
    printUImm_12_0(MI, OpIdx, OS);
    break;
  case 4:
    printMemOperand(MI, OpIdx, OS);
    break;
  }
#endif // CAPSTONE_DIET
}

#endif // PRINT_ALIAS_INSTR
