## Automatically generated incremental diff
## From:   linux-2.2.18-pre22
## To:     linux-2.2.18-pre23
## Robot:  $Id: make-incremental-diff,v 1.6 2001/12/04 04:41:15 hpa Exp $

diff -urN linux-2.2.18-pre22/CREDITS linux/CREDITS
--- linux-2.2.18-pre22/CREDITS	Mon Dec  3 20:43:04 2001
+++ linux/CREDITS	Mon Dec  3 20:43:35 2001
@@ -2413,9 +2413,10 @@
 D: some Alpha platform porting from 2.0, Memory Technology Devices,
 D: Acquire watchdog timer, PC speaker driver maintenance,
 D: various other stuff that annoyed me by not working.
-S: c/o Red Hat UK Limited
-S: 35-36 Cambridge Place
-S: Cambridge. CB2 1NS
+S: c/o Red Hat Engineering
+S: Rustat House
+S: 60 Clifton Road
+S: Cambridge. CB1 7EG
 S: England
 
 N: Frank Xia
diff -urN linux-2.2.18-pre22/MAINTAINERS linux/MAINTAINERS
--- linux-2.2.18-pre22/MAINTAINERS	Mon Dec  3 20:43:04 2001
+++ linux/MAINTAINERS	Mon Dec  3 20:43:36 2001
@@ -109,8 +109,10 @@
 
 ADVANSYS SCSI DRIVER
 P:	Bob Frey
-M:	linux@advansys.com
+M:	bfrey@turbolinux.com.cn
+M:	linux@connectcom.net
 W:	http://www.advansys.com/linux.html
+W:      http://www.connectcom.net/downloads/software/os/linux.html
 L:	linux-scsi@vger.kernel.org
 S:	Maintained
 
diff -urN linux-2.2.18-pre22/Makefile linux/Makefile
--- linux-2.2.18-pre22/Makefile	Mon Dec  3 20:43:04 2001
+++ linux/Makefile	Mon Dec  3 20:43:36 2001
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 2
 SUBLEVEL = 18
-EXTRAVERSION = pre22
+EXTRAVERSION = pre23
 
 ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
 
diff -urN linux-2.2.18-pre22/arch/i386/kernel/Makefile linux/arch/i386/kernel/Makefile
--- linux-2.2.18-pre22/arch/i386/kernel/Makefile	Mon Dec  3 20:43:04 2001
+++ linux/arch/i386/kernel/Makefile	Mon Dec  3 20:43:36 2001
@@ -15,7 +15,7 @@
 O_TARGET := kernel.o
 O_OBJS   := process.o signal.o entry.o traps.o irq.o vm86.o \
             ptrace.o ioport.o ldt.o setup.o time.o sys_i386.o \
-	    bluesmoke.o
+	    bluesmoke.o dmi_scan.o
 OX_OBJS  := i386_ksyms.o
 MX_OBJS  :=
 
diff -urN linux-2.2.18-pre22/arch/i386/kernel/apm.c linux/arch/i386/kernel/apm.c
--- linux-2.2.18-pre22/arch/i386/kernel/apm.c	Mon Dec  3 20:43:04 2001
+++ linux/arch/i386/kernel/apm.c	Mon Dec  3 20:43:36 2001
@@ -129,6 +129,7 @@
  *   1.13: Fix the Thinkpad (again) :-( (CONFIG_APM_IGNORE_MULTIPLE_SUSPENDS
  *         is now the way life works). 
  *         Fix thinko in suspend() (wrong return).
+ *   1.13ac: Added apm_battery_horked() for Compal boards (Dell 5000e etc)
  *
  * APM 1.1 Reference:
  *
@@ -325,6 +326,7 @@
 #else
 static int			power_off_enabled = 1;
 #endif
+static int 			dell_crap = 0;	/*Set if we find a 5000e */
 
 static DECLARE_WAIT_QUEUE_HEAD(apm_waitqueue);
 static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue);
@@ -1242,6 +1244,18 @@
 	return 0;
 }
 
+/*
+ *	This is called by the DMI code when it finds an Inspiron 5000e
+ *	(aka compal reference board). We actually do the check by the BIOS
+ *	vendor name, version and serial so we can extend it to try and catch
+ *	non Dell stuff later.
+ */
+ 
+void apm_battery_horked(void)
+{
+	dell_crap = 1;
+}
+
 static int apm_get_info(char *buf, char **start, off_t fpos, int length, int dummy)
 {
 	char *		p;
@@ -1258,7 +1272,7 @@
 
 	p = buf;
 
-	if ((smp_num_cpus == 1) &&
+	if ((smp_num_cpus == 1) && (!dell_crap) && 
 	    !(error = apm_get_power_status(&bx, &cx, &dx))) {
 		ac_line_status = (bx >> 8) & 0xff;
 		battery_status = bx & 0xff;
diff -urN linux-2.2.18-pre22/arch/i386/kernel/dmi_scan.c linux/arch/i386/kernel/dmi_scan.c
--- linux-2.2.18-pre22/arch/i386/kernel/dmi_scan.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/i386/kernel/dmi_scan.c	Mon Dec  3 20:43:36 2001
@@ -0,0 +1,176 @@
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <asm/io.h>
+
+struct dmi_header
+{
+	u8	type;
+	u8	length;
+	u16	handle;
+};
+
+static char * __init dmi_string(struct dmi_header *dm, u8 s)
+{
+	u8 *bp=(u8 *)dm;
+	bp+=dm->length;
+	s--;
+	while(s>0)
+	{
+		bp+=strlen(bp);
+		bp++;
+		s--;
+	}
+	return bp;
+}
+
+static int __init dmi_table(u32 base, int len, int num, void (*decode)(struct dmi_header *))
+{
+	char *buf;
+	struct dmi_header *dm;
+	u8 *data;
+	int i=0;
+		
+		
+	buf = ioremap(base, len);
+	if(buf==NULL)
+		return -1;
+
+	data = buf;
+	while(i<num)
+	{
+		dm=(struct dmi_header *)data;
+		decode(dm);		
+		data+=dm->length;
+		while(*data || data[1])
+			data++;
+		data+=2;
+		i++;
+	}
+	iounmap(buf);
+	return 0;
+}
+
+
+int __init dmi_iterate(void (*decode)(struct dmi_header *))
+{
+	unsigned char buf[20];
+	long fp=0xE0000L;
+	fp -= 16;
+	
+	while( fp < 0xFFFFF)
+	{
+		fp+=16;
+		memcpy_fromio(buf, fp, 20);
+		if(memcmp(buf, "_DMI_", 5)==0)
+		{
+			u16 num=buf[13]<<8|buf[12];
+			u16 len=buf[7]<<8|buf[6];
+			u32 base=buf[11]<<24|buf[10]<<16|buf[9]<<8|buf[8];
+
+			printk(KERN_INFO "DMI %d.%d present.\n",
+				buf[14]>>4, buf[14]&0x0F);
+			printk(KERN_INFO "%d structures occupying %d bytes.\n",
+				buf[13]<<8|buf[12],
+				buf[7]<<8|buf[6]);
+			printk(KERN_INFO "DMI table at 0x%08X.\n",
+				buf[11]<<24|buf[10]<<16|buf[9]<<8|buf[8]);
+			if(dmi_table(base,len, num, decode)==0)
+				return 0;
+		}
+	}
+	return -1;
+}
+
+
+/*
+ *	Process a DMI table entry. Right now all we care about are the BIOS
+ *	and machine entries. For 2.4 we should pull the smbus controller info
+ *	out of here.
+ */
+
+static void __init dmi_decode(struct dmi_header *dm)
+{
+	u8 *data = (u8 *)dm;
+	char *p;
+	
+	switch(dm->type)
+	{
+		case  0:
+			p=dmi_string(dm,data[4]);
+
+			if(*p && *p!=' ')
+			{
+				printk("BIOS Vendor: %s\n", p);
+				printk("BIOS Version: %s\n", 
+					dmi_string(dm, data[5]));
+				printk("BIOS Release: %s\n",
+					dmi_string(dm, data[8]));
+			}
+				
+			/*
+			 *  Check for clue free BIOS implementations who use
+			 *  the following QA technique
+			 *
+			 *      [ Write BIOS Code ]<------
+			 *               |                ^
+			 *      < Does it Compile >----N--
+			 *               |Y               ^
+			 *	< Does it Boot Win98 >-N--
+			 *               |Y
+			 *           [Ship It]
+			 */
+			 
+			if(strcmp(dmi_string(dm, data[4]), "Phoenix Technologies LTD")==0 &&
+			   strcmp(dmi_string(dm, data[5]), "A04")==0)
+//			   &&strcmp(dmi_string(dm, data[8]), "???")==0)
+			{
+#ifdef CONFIG_APM
+				extern void apm_battery_horked(void);
+			   	apm_battery_horked();			   	
+			   	printk(KERN_WARNING "BIOS strings suggest APM bugs, disabling battery reporting.\n");
+#endif			   	
+			}
+			break;
+		case 1:
+			p=dmi_string(dm,data[4]);
+
+			if(*p && *p!=' ')
+			{
+				printk("System Vendor: %s.\n",p);
+				printk("Product Name: %s.\n",
+					dmi_string(dm, data[5]));
+				printk("Version %s.\n",
+					dmi_string(dm, data[6]));
+				printk("Serial Number %s.\n",
+					dmi_string(dm, data[7]));
+			}
+			break;
+		case 2:
+			p=dmi_string(dm,data[4]);
+
+			if(*p && *p!=' ')
+			{
+				printk("Board Vendor: %s.\n",p);
+				printk("Board Name: %s.\n",
+				dmi_string(dm, data[5]));
+				printk("Board Version: %s.\n",
+					dmi_string(dm, data[6]));
+			}
+			break;
+		case 3:
+			p=dmi_string(dm,data[8]);
+			if(*p && *p!=' ')
+				printk("Asset Tag: %s.\n", p);
+			break;
+	}
+}
+
+int __init dmi_scan_machine(void)
+{
+	return dmi_iterate(dmi_decode);
+}
+
+__initcall(dmi_scan_machine);
diff -urN linux-2.2.18-pre22/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c
--- linux-2.2.18-pre22/arch/i386/kernel/setup.c	Mon Dec  3 20:43:04 2001
+++ linux/arch/i386/kernel/setup.c	Mon Dec  3 20:43:36 2001
@@ -969,6 +969,7 @@
 		int l1c=0, l1d=0, l2=0, l3=0;	/* Cache sizes */
 
 		cpuid(2, &regs[0], &regs[1], &regs[2], &regs[3]);
+
 		/* Least significant byte of eax says how many times
 		 * to call cpuid with value 2 to get cache and TLB
 		 * info.
@@ -978,96 +979,95 @@
 
 		c->x86_cache_size = 0;
 
-		for ( i = 0 ; i < 4 ; i++ ) 
-		{
+		for ( i = 0 ; i < 4 ; i++ ) {
+
 			int j;
 
-	                 if ( regs[i] < 0 )
-	                         continue; /* no useful data */
+			if ( regs[i] < 0 )
+				continue; /* no useful data */
+
+			/* look at all the bytes returned */
 
-	                 /* look at all the bytes returned */
+			for ( j = ( i == 0 ? 8:0 ) ; j < 25 ; j+=8 ) {
 
-	                 for ( j = ( i == 0 ? 8:0 ) ; j < 25 ; j+=8 )
-	                 {
 				unsigned char rh = regs[i]>>j;
 				unsigned char rl;
-				
+
 				rl = rh & 0x0F;
 				rh >>=4;
-				
-				switch(rh)
-				{
+
+				switch(rh) {
+
 					case 2:
-						if(rl)
-						{
+						if(rl) {
 							printk("%dK L3 cache\n", (rl-1)*512);
 							l3 += (rl-1)*512;
 						}
 						break;
+
 					case 4:
 					case 8:
-						if(rl)
-						{
+						if(rl) {
 							printk("%dK L2 cache (%d way)\n",128<<(rl-1), rh);
 							l2 += 128<<(rl-1);
 						}
 						break;
-					
+
 					/*
 					 *	L1 caches do not count for SMP switching weights,
 					 *	they are shadowed by L2.
 					 */
-					 
+
 					case 6:
-		                 		if(rh==6 && rl > 5)
-		                 		{
+						if(rh==6 && rl > 5) {
 							printk("%dK L1 data cache\n", 8<<(rl - 6));
 							l1d+=8<<(rl-6);
 						}
 						break;
+
 					case 7:
-		                 		printk("%dK L1 instruction cache\n",
-		                 			rl?(16<<(rl-1)):12);
-		                 		l1c+=rl?(16<<(rl-1)):12;
-		                 		break;
+						printk("%dK L1 instruction cache\n",
+						rl?(16<<(rl-1)):12);
+						l1c+=rl?(16<<(rl-1)):12;
+						break;
 				}	              
 			}   			
 		}
+
 		if(l1c && l1d)
-			printk("CPU: L1 I Cache: %dK  L1 D Cache: %dK\n",
-				l1c, l1d);
+			printk("CPU: L1 I Cache: %dK  L1 D Cache: %dK\n", l1c, l1d);
 		if(l2)
 			printk("CPU: L2 Cache: %dK\n", l2);
 		if(l3)
 			printk("CPU: L3 Cache: %dK\n", l3);
-			
+
 		/*
 		 *	Assuming L3 is shared. The L1 cache is shadowed by L2
 		 *	so doesn't need to be included.
 		 */
-		 
+
 		c->x86_cache_size += l2;
 	}
-	
+
 	/*
 	 *	Intel finally adopted the AMD/Cyrix extended id naming
 	 *	stuff for the 'Pentium IV'
 	 */
-	 
+
 	if(c->x86_vendor ==X86_VENDOR_INTEL && c->x86 == 15)
 	{
 		intel_model(c);
 		return;
 	}
-	
+
 	for (i = 0; i < sizeof(cpu_models)/sizeof(struct cpu_model_info); i++) {
 		if (cpu_models[i].vendor == c->x86_vendor &&
 		    cpu_models[i].x86 == c->x86) {
 			if (c->x86_model <= 16)
 				p = cpu_models[i].model_names[c->x86_model];
 
-			/* Names for the Pentium II Celeron processors 
-                           detectable only by also checking the cache size */
+			/* Names for the Pentium II Celeron processors
+			   detectable only by also checking the cache size */
 			if ((cpu_models[i].vendor == X86_VENDOR_INTEL)
 			    && (cpu_models[i].x86 == 6)){ 
 				if(c->x86_model == 6 && c->x86_cache_size == 128) {
diff -urN linux-2.2.18-pre22/drivers/block/cpqarray.c linux/drivers/block/cpqarray.c
--- linux-2.2.18-pre22/drivers/block/cpqarray.c	Mon Dec  3 20:43:05 2001
+++ linux/drivers/block/cpqarray.c	Mon Dec  3 20:43:36 2001
@@ -41,8 +41,8 @@
 
 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
 
-#define DRIVER_NAME "Compaq SMART2 Driver (v 1.0.10)"
-#define DRIVER_VERSION SMART2_DRIVER_VERSION(1,0,10)
+#define DRIVER_NAME "Compaq SMART2 Driver (v 1.0.11)"
+#define DRIVER_VERSION SMART2_DRIVER_VERSION(1,0,11)
 
 /* Embedded module documentation macros - see modules.h */
 /* Original author Chris Frantz - Compaq Computer Corporation */
@@ -1650,6 +1650,7 @@
 	int ret_code, size;
 	drv_info_t *drv;
 	ctlr_info_t *info_p = hba[ctlr];
+	int i;
 
 	info_p->log_drv_map = 0;	
 	
@@ -1714,7 +1715,8 @@
         }
 
 	info_p->log_drives = id_ctlr_buf->nr_drvs;;
-	*(__u32*)(info_p->firm_rev) = *(__u32*)(id_ctlr_buf->firm_rev);
+	for(i=0;i<4;i++)
+		info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
 	info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
 
 	printk(" (%s)\n", info_p->product_name);
diff -urN linux-2.2.18-pre22/drivers/net/acenic.c linux/drivers/net/acenic.c
--- linux-2.2.18-pre22/drivers/net/acenic.c	Mon Dec  3 20:43:05 2001
+++ linux/drivers/net/acenic.c	Mon Dec  3 20:43:44 2001
@@ -37,9 +37,8 @@
  *                                       make the driver work on RS/6000.
  *   Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
  *                                       endian systems.
- *   Val Hensson <vhenson@esscom.com>:   Reset Jumbo skb producer and
- *                                       rx producer index when
- *                                       flushing the Jumbo ring.
+ *   Val Henson <val@nmt.edu>: Reset Jumbo skb producer and rx producer
+ *                             index when flushing the Jumbo ring.
  */
 
 #include <linux/config.h>
diff -urN linux-2.2.18-pre22/drivers/scsi/advansys.c linux/drivers/scsi/advansys.c
--- linux-2.2.18-pre22/drivers/scsi/advansys.c	Tue Jan  4 10:12:19 2000
+++ linux/drivers/scsi/advansys.c	Mon Dec  3 20:43:46 2001
@@ -1,10 +1,10 @@
-/* $Id: advansys.c,v 1.69 1999/11/29 18:37:53 bobf Exp bobf $ */
-#define ASC_VERSION "3.2M"    /* AdvanSys Driver Version */
+#define ASC_VERSION "3.3D"    /* AdvanSys Driver Version */
 
 /*
  * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
  * 
- * Copyright (c) 1995-1999 Advanced System Products, Inc.
+ * Copyright (c) 1995-2000 Advanced System Products, Inc.
+ * Copyright (c) 2000 ConnectCom Solutions, Inc.
  * All Rights Reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,19 @@
  * code retain the above copyright notice and this comment without
  * modification.
  *
+ * As of March 8, 2000 Advanced System Products, Inc. (AdvanSys)
+ * changed its name to name to ConnectCom Solutions, Inc.
+ *
  * There is an AdvanSys Linux WWW page at:
+ *  http://www.connectcom.net/downloads/software/os/linux.html
  *  http://www.advansys.com/linux.html
  *
- * The latest version of the AdvanSys driver is available at:
+ * The latest released version of the AdvanSys driver is available at:
  *  ftp://ftp.advansys.com/pub/linux/linux.tgz
+ *  ftp://ftp.connectcom.net/pub/linux/linux.tgz
  *
  * Please send questions, comments, bug reports to:
- *  linux@advansys.com
+ *  linux@connectcom.net or bfrey@turbolinux.com.cn
  */
 
 /*
@@ -37,18 +42,16 @@
   I. Release History
   J. Known Problems/Fix List
   K. Credits
-  L. AdvanSys Contact Information
+  L. ConnectCom (AdvanSys) Contact Information
 
   A. Linux Kernel Testing
 
-     This driver has been tested in the following Linux kernels: v1.2.13,
-     v1.3.57, v2.0.38, v2.2.13, and v2.3.28. These kernel versions are major
-     releases of Linux or the latest Linux kernel versions available when
-     this version of the driver was released. The driver should also work
-     in earlier versions of the Linux kernel. Beginning with v1.3.58 the
-     AdvanSys driver is included with all Linux kernels. Please refer to
-     sections C, D, and E for instructions on adding or upgrading the
-     AdvanSys driver. The driver is supported for x86 and alpha systems.
+     This driver has been tested in the following Linux kernels: v2.2.17
+     v2.4.0-test9. The driver should also work in earlier versions of the
+     Linux kernel. Beginning with v1.3.58 the AdvanSys driver was included
+     with all Linux kernels. Please refer to sections C, D, and E for
+     instructions on adding or upgrading the AdvanSys driver. The driver is
+     supported for x86 and alpha systems.
 
   B. Adapters Supported by this Driver
  
@@ -65,6 +68,9 @@
      adapter detected. The number of CDBs used by the driver can be
      lowered in the BIOS by changing the 'Host Queue Size' adapter setting.
 
+     Laptop Products:
+        ABP-480 - Bus-Master CardBus (16 CDB) (2.4 kernel and greater)
+
      Connectivity Products:
         ABP510/5150 - Bus-Master ISA (240 CDB)
         ABP5140 - Bus-Master ISA PnP (16 CDB)
@@ -104,6 +110,7 @@
         ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel)
         ABP980UA/3980UA - Four Channel Bus-Master PCI Ultra (16 CDB Per Chan.)
         ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide and Ultra-Wide (253 CDB)
+        ABP3950U3W - Bus-Master PCI Dual LVD2/Ultra3-Wide (253 CDB)
      
   C. Linux v1.2.X - Directions for Adding the AdvanSys Driver
 
@@ -677,6 +684,43 @@
          1. Really fix bug in adv_get_sglist().
          2. Incorporate v2.3.29 changes into driver.
 
+     3.2N (4/1/00):
+         1. Add CONFIG_ISA ifdef code.
+         2. Include advansys_interrupts_enabled name change patch.
+         3. For >= v2.3.28 use new SCSI error handling with new function
+            advansys_eh_bus_reset(). Don't include an abort function
+            because of base library limitations.
+         4. For >= v2.3.28 use per board asc_lock instead of io_request_lock.
+         5. For >= v2.3.28 eliminate advansys_command() and
+            advansys_command_done().
+         6. Add some changes for PowerPC (Big Endian) support, but it isn't
+            working yet.
+         7. Fix "nonexistent resource free" problem that occurred on a module
+            unload for boards with an I/O space >= 255. The 'n_io_port' field
+            is only one byte and can not be used to hold an ioport length more
+            than 255.
+
+     3.3A (4/4/00):
+         1. Update to Adv Library 5.8.
+         2. For wide cards add support for CDBs up to 16 bytes.
+         3. Eliminate warnings when CONFIG_PROC_FS is not defined.
+
+     3.3B (5/1/00):
+         1. Support for PowerPC (Big Endian) wide cards. Narrow cards
+            still need work.
+	 2. Change bitfields to shift and mask access for endian
+	    portability.
+
+     3.3C (10/13/00):
+         1. Update for latest 2.4 kernel.
+         2. Test ABP-480 CardBus support in 2.4 kernel - works!
+         3. Update to Asc Library S123.
+         4. Update to Adv Library 5.12.
+
+     3.3D (11/22/00):
+         1. Update for latest 2.4 kernel.
+         2. Create patches for 2.2 and 2.4 kernels.
+
   J. Known Problems/Fix List (XXX)
 
      1. Need to add memory mapping workaround. Test the memory mapping.
@@ -687,13 +731,14 @@
         has not occurred then print a message and run in polled mode.
      3. Allow bus type scanning order to be changed.
      4. Need to add support for target mode commands, cf. CAM XPT.
-     5  Need to add support for new Linux SCSI error handling method.
-     6. Need to fix sti/cli code in Asc Library.
-     7. Need to fix abort code in Adv Library.
-     8. Reduce io_request_lock hold time.
+     5. Add PowerPC (Big Endian) support for narrow cards.
 
   K. Credits
 
+     Bob Frey <bfrey@turbolinux.com.cn> wrote the AdvanSys SCSI driver.
+     I no longer work for AdvanSys, but continue to maintain and support
+     the driver.
+
      Nathan Hartwell <mage@cdc3.cdc.net> provided the directions and
      basis for the Linux v1.3.X changes which were included in the
      1.2 release.
@@ -712,22 +757,35 @@
      support in the 3.1A driver.
 
      Doug Gilbert <dgilbert@interlog.com> has made changes and
-     suggestions to improve the driver and done testing.
+     suggestions to improve the driver and done a lot of testing.
 
      Ken Mort <ken@mort.net> reported a DEBUG compile bug fixed
      in 3.2K.
 
-  L. AdvanSys Contact Information
+     Tom Rini <trini@kernel.crashing.org> provided the CONFIG_ISA
+     patch and helped with PowerPC support.
+
+     Philip Blundell <philip.blundell@pobox.com> provided an
+     advansys_interrupts_enabled patch.
+
+     Dave Jones <dave@denial.force9.co.uk> reported the compiler
+     warnings generated when CONFIG_PROC_FS was not defined in
+     the 3.2M driver.
+
+     Jerry Quinn <jlquinn@us.ibm.com> fixed PowerPC support (endian
+     problems) for wide cards.
+
+  L. ConnectCom (AdvanSys) Contact Information
  
-     Mail:                   Advanced System Products, Inc.
+     Mail:                   ConnectCom Solutions, Inc.
                              1150 Ringwood Court
                              San Jose, CA 95131
      Operator/Sales:         1-408-383-9400
      FAX:                    1-408-383-9612
      Tech Support:           1-408-467-2930
-     Tech Support E-Mail:    support@advansys.com
-     FTP Site:               ftp.advansys.com (login: anonymous)
-     Web Site:               http://www.advansys.com
+     Tech Support E-Mail:    support@connectcom.net
+     FTP Site:               ftp.connectcom.net (login: anonymous)
+     Web Site:               http://www.connectcom.net
 
 */
 
@@ -754,6 +812,15 @@
 #include <linux/module.h>
 #endif /* MODULE */
 #endif /* version >= v1.3.0 */
+
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(2,2,0)
+#if defined(CONFIG_X86) && !defined(CONFIG_ISA)
+#define CONFIG_ISA
+#endif /* CONFIG_X86 && !CONFIG_ISA */
+#else /* version < 2.2.0 */
+#define CONFIG_ISA
+#endif /* version < 2.2.0 */
+
 #include <linux/string.h>
 #include <linux/sched.h>
 #include <linux/kernel.h>
@@ -848,7 +915,7 @@
 
 #define ASC_LIB_VERSION_MAJOR  1
 #define ASC_LIB_VERSION_MINOR  24
-#define ASC_LIB_SERIAL_NUMBER  121
+#define ASC_LIB_SERIAL_NUMBER  123
 
 /*
  * Portable Data Types
@@ -1578,8 +1645,8 @@
     ASC_SCSI_BIT_ID_TYPE cmd_qng_enabled;
     ASC_SCSI_BIT_ID_TYPE disc_enable;
     ASC_SCSI_BIT_ID_TYPE sdtr_enable;
-    uchar               chip_scsi_id:4;
-    uchar               isa_dma_speed:4;
+    uchar               chip_scsi_id;
+    uchar               isa_dma_speed;
     uchar               isa_dma_channel;
     uchar               chip_version;
     ushort              pci_device_id;
@@ -1703,6 +1770,29 @@
 #define ASC_MAX_INIT_BUSY_RETRY   8
 #define ASC_EEP_ISA_PNP_WSIZE    16
 
+/*
+ * This struct is filled in by reading ushorts from the board in
+ * order.  Therefore, order of fields matters.
+ * ASCEEP_Config_Field_IsChar indicates when a ushort actually
+ * contains two chars.  On big_endian machines, the byte-swap needs to
+ * be undone to put the chars in order.  When an entry in
+ * ASCEEP_Config_Field_IsChar is 1, it indicates that the swap is
+ * needed.
+ */
+
+/*
+ * These macros allow us to keep the chip scsi id and isa dma speed
+ * bitfields in board order.  C bitfields aren't portable across
+ * endianness. 
+ */
+
+#define ASC_EEP_GET_CHIP_ID(cfg)    ((cfg)->id_speed & 0x0f)
+#define ASC_EEP_GET_DMA_SPD(cfg)    (((cfg)->id_speed & 0xf0) >> 4)
+#define ASC_EEP_SET_CHIP_ID(cfg, sid) \
+   ((cfg)->id_speed = ((cfg)->id_speed & 0xf0) | ((sid) & ASC_MAX_TID))
+#define ASC_EEP_SET_DMA_SPD(cfg, spd) \
+   ((cfg)->id_speed = ((cfg)->id_speed & 0x0f) | ((spd) & 0x0f) << 4)
+
 typedef struct asceep_config {
     ushort              cfg_lsw;
     ushort              cfg_msw;
@@ -1715,14 +1805,33 @@
     uchar               bios_scan;
     uchar               power_up_wait;
     uchar               no_scam;
-    uchar               chip_scsi_id:4;
-    uchar               isa_dma_speed:4;
+    uchar               id_speed; /* low order 4 bits is chip scsi id */
+				  /* high order 4 bits is isa dma speed */
     uchar               dos_int13_table[ASC_MAX_TID + 1];
     uchar               adapter_info[6];
     ushort              cntl;
     ushort              chksum;
 } ASCEEP_CONFIG;
 
+STATIC ASCEEP_CONFIG ASCEEP_Config_Field_IsChar = {
+    0,                  /* cfg_lsw */
+    0,              	/* cfg_msw */
+    1,                  /* init_sdtr */
+    1,		        /* disc_enable */
+    1,		        /* use_cmd_qng */
+    1,		        /* start_motor */
+    1,		        /* max_total_qng */
+    1,		        /* max_tag_qng */
+    1,		        /* bios_scan */
+    1,		        /* power_up_wait */
+    1,		        /* no_scam */
+    1,		        /* id_speed */
+    { 1,1,1,1,1,1,1,1 }, /* dos_int13_table[ASC_MAX_TID + 1] */
+    { 1,1,1,1,1,1 },    /* adapter_info[6] */
+    0,                  /* cntl */
+    0,                  /* chksum */
+};
+
 #define ASC_PCI_CFG_LSW_SCSI_PARITY  0x0800
 #define ASC_PCI_CFG_LSW_BURST_MODE   0x0080
 #define ASC_PCI_CFG_LSW_INTR_ABLE    0x0020
@@ -2021,10 +2130,12 @@
 STATIC void      AscEnableInterrupt(PortAddr);
 STATIC void      AscSetBank(PortAddr, uchar);
 STATIC int       AscResetChipAndScsiBus(ASC_DVC_VAR *);
+#ifdef CONFIG_ISA
 STATIC ushort    AscGetIsaDmaChannel(PortAddr);
 STATIC ushort    AscSetIsaDmaChannel(PortAddr, ushort);
 STATIC uchar     AscSetIsaDmaSpeed(PortAddr, uchar);
 STATIC uchar     AscGetIsaDmaSpeed(PortAddr);
+#endif /* CONFIG_ISA */
 STATIC uchar     AscReadLramByte(PortAddr, ushort);
 STATIC ushort    AscReadLramWord(PortAddr, ushort);
 STATIC ASC_DCNT  AscReadLramDWord(PortAddr, ushort);
@@ -2047,17 +2158,21 @@
 STATIC uchar     AscGetSynPeriodIndex(ASC_DVC_VAR *, uchar);
 STATIC uchar     AscAllocFreeQueue(PortAddr, uchar);
 STATIC uchar     AscAllocMultipleFreeQueue(PortAddr, uchar, uchar);
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int       AscRiscHaltedAbortSRB(ASC_DVC_VAR *, ASC_DCNT);
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89)
 STATIC int       AscRiscHaltedAbortTIX(ASC_DVC_VAR *, uchar);
 #endif /* version >= v1.3.89 */
+#endif /* version < v2.3.28 */
 STATIC int       AscHostReqRiscHalt(PortAddr);
 STATIC int       AscStopQueueExe(PortAddr);
 STATIC int       AscStartQueueExe(PortAddr);
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89)
 STATIC int       AscCleanUpDiscQueue(PortAddr);
 #endif /* version >= v1.3.89 */
 STATIC int       AscCleanUpBusyQueue(PortAddr);
+#endif /* version < v2.3.28 */
 STATIC int       AscWaitTixISRDone(ASC_DVC_VAR *, uchar);
 STATIC int       AscWaitISRDone(ASC_DVC_VAR *);
 STATIC ASC_PADDR AscGetOnePhyAddr(ASC_DVC_VAR *, uchar *,
@@ -2075,26 +2190,30 @@
 STATIC int       AscReInitLram(ASC_DVC_VAR *);
 STATIC ushort    AscInitQLinkVar(ASC_DVC_VAR *);
 STATIC int       AscSetLibErrorCode(ASC_DVC_VAR *, ushort);
-#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89)
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89) && \
+    LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int       _AscWaitQDone(PortAddr, ASC_SCSI_Q *);
-#endif /* version >= v1.3.89 */
+#endif /* version >= v1.3.89 && version < v2.3.28 */
 STATIC int       AscIsrChipHalted(ASC_DVC_VAR *);
 STATIC uchar     _AscCopyLramScsiDoneQ(PortAddr, ushort,
                     ASC_QDONE_INFO *, ASC_DCNT);
 STATIC int       AscIsrQDone(ASC_DVC_VAR *);
 STATIC int       AscCompareString(uchar *, uchar *, int);
+#ifdef CONFIG_ISA
 STATIC ushort    AscGetEisaChipCfg(PortAddr);
 STATIC ASC_DCNT  AscGetEisaProductID(PortAddr);
 STATIC PortAddr  AscSearchIOPortAddrEISA(PortAddr);
+STATIC PortAddr  AscSearchIOPortAddr11(PortAddr);
+STATIC PortAddr  AscSearchIOPortAddr(PortAddr, ushort);
+STATIC void      AscSetISAPNPWaitForKey(void);
+#endif /* CONFIG_ISA */
 STATIC uchar     AscGetChipScsiCtrl(PortAddr);
 STATIC uchar     AscSetChipScsiID(PortAddr, uchar);
 STATIC uchar     AscGetChipVersion(PortAddr, ushort);
 STATIC ushort    AscGetChipBusType(PortAddr);
 STATIC ASC_DCNT  AscLoadMicroCode(PortAddr, ushort, ushort *, ushort);
 STATIC int       AscFindSignature(PortAddr);
-STATIC PortAddr  AscSearchIOPortAddr11(PortAddr);
 STATIC void      AscToggleIRQAct(PortAddr);
-STATIC void      AscSetISAPNPWaitForKey(void);
 STATIC uchar     AscGetChipIRQ(PortAddr, ushort);
 STATIC uchar     AscSetChipIRQ(PortAddr, uchar, ushort);
 STATIC ushort    AscGetChipBiosAddress(PortAddr, ushort);
@@ -2113,7 +2232,6 @@
                     ASC_DCNT, ASC_SG_HEAD *);
 STATIC void      DvcPutScsiQ(PortAddr, ushort, ushort *, int);
 STATIC void      DvcGetQinfo(PortAddr, ushort, ushort *, int);
-STATIC PortAddr  AscSearchIOPortAddr(PortAddr, ushort);
 STATIC ushort    AscInitGetConfig(ASC_DVC_VAR *);
 STATIC ushort    AscInitSetConfig(ASC_DVC_VAR *);
 STATIC ushort    AscInitAsc1000Driver(ASC_DVC_VAR *);
@@ -2127,12 +2245,16 @@
 STATIC uint      AscGetNumOfFreeQueue(ASC_DVC_VAR *, uchar,
                     uchar);
 STATIC int       AscSgListToQueue(int);
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int       AscAbortSRB(ASC_DVC_VAR *, ASC_VADDR);
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89)
 STATIC int       AscResetDevice(ASC_DVC_VAR *, uchar);
 #endif /* version >= v1.3.89 */
+#endif /* version < v2.3.28 */
 STATIC int       AscResetSB(ASC_DVC_VAR *);
+#ifdef CONFIG_ISA
 STATIC void      AscEnableIsaDma(uchar);
+#endif /* CONFIG_ISA */
 STATIC ASC_DCNT  AscGetMaxDmaCount(ushort);
 
 
@@ -2141,7 +2263,7 @@
  */
 
 #define ADV_LIB_VERSION_MAJOR  5
-#define ADV_LIB_VERSION_MINOR  5
+#define ADV_LIB_VERSION_MINOR  12
 
 /* d_os_dep.h */
 #define ADV_OS_LINUX
@@ -2188,6 +2310,7 @@
 #define ADV_MEM_READW(addr) readw(addr)
 #define ADV_MEM_WRITEB(addr, byte) writeb(byte, addr)
 #define ADV_MEM_WRITEW(addr, word) writew(word, addr)
+#define ADV_MEM_WRITEDW(addr, dword) writel(dword, addr)
 
 /*
  * The I/O memory mapping function names changed in 2.1.X.
@@ -2200,6 +2323,12 @@
 #define ADV_CARRIER_COUNT (ASC_DEF_MAX_HOST_QNG + 15)
 
 /*
+ * For wide  boards a CDB length maximum of 16 bytes
+ * is supported.
+ */
+#define ADV_MAX_CDB_LEN     16
+
+/*
  * Define total number of simultaneous maximum element scatter-gather
  * request blocks per wide adapter. ASC_DEF_MAX_HOST_QNG (253) is the
  * maximum number of outstanding commands per wide host adapter. Each
@@ -2252,6 +2381,18 @@
  */
 #define ADV_EEPROM_TERM_POL            0x2000   /* EEPROM Bit 13 */
 #define ADV_EEPROM_CIS_LD              0x2000   /* EEPROM Bit 13 */
+/*
+ * ASC38C1600 Bit 11
+ *
+ * If EEPROM Bit 11 is 0 for Function 0, then Function 0 will specify
+ * INT A in the PCI Configuration Space Int Pin field. If it is 1, then
+ * Function 0 will specify INT B.
+ *
+ * If EEPROM Bit 11 is 0 for Function 1, then Function 1 will specify
+ * INT B in the PCI Configuration Space Int Pin field. If it is 1, then
+ * Function 1 will specify INT A.
+ */
+#define ADV_EEPROM_INTAB               0x0800   /* EEPROM Bit 11 */
 
 typedef struct adveep_3550_config
 {
@@ -2287,22 +2428,22 @@
   uchar  reserved1;             /*    reserved byte (not used) */                                  
 
   ushort bios_ctrl;             /* 12 BIOS control bits */
-                                /*  bit 0  set: BIOS don't act as initiator. */
-                                /*  bit 1  set: BIOS > 1 GB support */
-                                /*  bit 2  set: BIOS > 2 Disk Support */
-                                /*  bit 3  set: BIOS don't support removables */
-                                /*  bit 4  set: BIOS support bootable CD */
-                                /*  bit 5  set: */
-                                /*  bit 6  set: BIOS support multiple LUNs */
-                                /*  bit 7  set: BIOS display of message */
-                                /*  bit 8  set: */
-                                /*  bit 9  set: Reset SCSI bus during init. */
-                                /*  bit 10 set: */
-                                /*  bit 11 set: No verbose initialization. */
-                                /*  bit 12 set: SCSI parity enabled */
-                                /*  bit 13 set: */
-                                /*  bit 14 set: */
-                                /*  bit 15 set: */
+                                /*  bit 0  BIOS don't act as initiator. */
+                                /*  bit 1  BIOS > 1 GB support */
+                                /*  bit 2  BIOS > 2 Disk Support */
+                                /*  bit 3  BIOS don't support removables */
+                                /*  bit 4  BIOS support bootable CD */
+                                /*  bit 5  BIOS scan enabled */
+                                /*  bit 6  BIOS support multiple LUNs */
+                                /*  bit 7  BIOS display of message */
+                                /*  bit 8  SCAM disabled */
+                                /*  bit 9  Reset SCSI bus during init. */
+                                /*  bit 10 */
+                                /*  bit 11 No verbose initialization. */
+                                /*  bit 12 SCSI parity enabled */
+                                /*  bit 13 */
+                                /*  bit 14 */
+                                /*  bit 15 */
   ushort  ultra_able;           /* 13 ULTRA speed able */ 
   ushort  reserved2;            /* 14 reserved */
   uchar   max_host_qng;         /* 15 maximum host queuing */
@@ -2361,22 +2502,22 @@
                                 /*    There is no low on  / high off */
 
   ushort bios_ctrl;             /* 12 BIOS control bits */
-                                /*  bit 0  set: BIOS don't act as initiator. */
-                                /*  bit 1  set: BIOS > 1 GB support */
-                                /*  bit 2  set: BIOS > 2 Disk Support */
-                                /*  bit 3  set: BIOS don't support removables */
-                                /*  bit 4  set: BIOS support bootable CD */
-                                /*  bit 5  set: BIOS scan enabled */
-                                /*  bit 6  set: BIOS support multiple LUNs */
-                                /*  bit 7  set: BIOS display of message */
-                                /*  bit 8  set: */
-                                /*  bit 9  set: Reset SCSI bus during init. */
-                                /*  bit 10 set: */
-                                /*  bit 11 set: No verbose initialization. */
-                                /*  bit 12 set: SCSI parity enabled */
-                                /*  bit 13 set: */
-                                /*  bit 14 set: */
-                                /*  bit 15 set: */
+                                /*  bit 0  BIOS don't act as initiator. */
+                                /*  bit 1  BIOS > 1 GB support */
+                                /*  bit 2  BIOS > 2 Disk Support */
+                                /*  bit 3  BIOS don't support removables */
+                                /*  bit 4  BIOS support bootable CD */
+                                /*  bit 5  BIOS scan enabled */
+                                /*  bit 6  BIOS support multiple LUNs */
+                                /*  bit 7  BIOS display of message */
+                                /*  bit 8  SCAM disabled */
+                                /*  bit 9  Reset SCSI bus during init. */
+                                /*  bit 10 */
+                                /*  bit 11 No verbose initialization. */
+                                /*  bit 12 SCSI parity enabled */
+                                /*  bit 13 */
+                                /*  bit 14 */
+                                /*  bit 15 */
   ushort  sdtr_speed2;          /* 13 SDTR speed TID 4-7 */
   ushort  sdtr_speed3;          /* 14 SDTR speed TID 8-11 */
   uchar   max_host_qng;         /* 15 maximum host queueing */
@@ -2424,6 +2565,109 @@
   ushort  reserved63;           /* 63 reserved */
 } ADVEEP_38C0800_CONFIG;
 
+typedef struct adveep_38C1600_config
+{
+                                /* Word Offset, Description */
+
+  ushort cfg_lsw;               /* 00 power up initialization */
+                                /*  bit 11 set - Func. 0 INTB, Func. 1 INTA */
+                                /*       clear - Func. 0 INTA, Func. 1 INTB */
+                                /*  bit 13 set - Load CIS */
+                                /*  bit 14 set - BIOS Enable */
+                                /*  bit 15 set - Big Endian Mode */
+  ushort cfg_msw;               /* 01 unused */
+  ushort disc_enable;           /* 02 disconnect enable */
+  ushort wdtr_able;             /* 03 Wide DTR able */
+  ushort sdtr_speed1;           /* 04 SDTR Speed TID 0-3 */
+  ushort start_motor;           /* 05 send start up motor */
+  ushort tagqng_able;           /* 06 tag queuing able */
+  ushort bios_scan;             /* 07 BIOS device control */
+  ushort scam_tolerant;         /* 08 no scam */
+
+  uchar  adapter_scsi_id;       /* 09 Host Adapter ID */
+  uchar  bios_boot_delay;       /*    power up wait */
+
+  uchar  scsi_reset_delay;      /* 10 reset delay */
+  uchar  bios_id_lun;           /*    first boot device scsi id & lun */
+                                /*    high nibble is lun */
+                                /*    low nibble is scsi id */
+
+  uchar  termination_se;        /* 11 0 - automatic */
+                                /*    1 - low off / high off */
+                                /*    2 - low off / high on */
+                                /*    3 - low on  / high on */
+                                /*    There is no low on  / high off */
+
+  uchar  termination_lvd;       /* 11 0 - automatic */
+                                /*    1 - low off / high off */
+                                /*    2 - low off / high on */
+                                /*    3 - low on  / high on */
+                                /*    There is no low on  / high off */
+
+  ushort bios_ctrl;             /* 12 BIOS control bits */
+                                /*  bit 0  BIOS don't act as initiator. */
+                                /*  bit 1  BIOS > 1 GB support */
+                                /*  bit 2  BIOS > 2 Disk Support */
+                                /*  bit 3  BIOS don't support removables */
+                                /*  bit 4  BIOS support bootable CD */
+                                /*  bit 5  BIOS scan enabled */
+                                /*  bit 6  BIOS support multiple LUNs */
+                                /*  bit 7  BIOS display of message */
+                                /*  bit 8  SCAM disabled */
+                                /*  bit 9  Reset SCSI bus during init. */
+                                /*  bit 10 Basic Integrity Checking disabled */
+                                /*  bit 11 No verbose initialization. */
+                                /*  bit 12 SCSI parity enabled */
+                                /*  bit 13 AIPP (Asyn. Info. Ph. Prot.) dis. */
+                                /*  bit 14 */
+                                /*  bit 15 */
+  ushort  sdtr_speed2;          /* 13 SDTR speed TID 4-7 */
+  ushort  sdtr_speed3;          /* 14 SDTR speed TID 8-11 */
+  uchar   max_host_qng;         /* 15 maximum host queueing */
+  uchar   max_dvc_qng;          /*    maximum per device queuing */
+  ushort  dvc_cntl;             /* 16 control bit for driver */
+  ushort  sdtr_speed4;          /* 17 SDTR speed 4 TID 12-15 */
+  ushort  serial_number_word1;  /* 18 Board serial number word 1 */
+  ushort  serial_number_word2;  /* 19 Board serial number word 2 */
+  ushort  serial_number_word3;  /* 20 Board serial number word 3 */
+  ushort  check_sum;            /* 21 EEP check sum */
+  uchar   oem_name[16];         /* 22 OEM name */
+  ushort  dvc_err_code;         /* 30 last device driver error code */
+  ushort  adv_err_code;         /* 31 last uc and Adv Lib error code */
+  ushort  adv_err_addr;         /* 32 last uc error address */
+  ushort  saved_dvc_err_code;   /* 33 saved last dev. driver error code   */
+  ushort  saved_adv_err_code;   /* 34 saved last uc and Adv Lib error code */
+  ushort  saved_adv_err_addr;   /* 35 saved last uc error address         */
+  ushort  reserved36;           /* 36 reserved */
+  ushort  reserved37;           /* 37 reserved */
+  ushort  reserved38;           /* 38 reserved */
+  ushort  reserved39;           /* 39 reserved */
+  ushort  reserved40;           /* 40 reserved */
+  ushort  reserved41;           /* 41 reserved */
+  ushort  reserved42;           /* 42 reserved */
+  ushort  reserved43;           /* 43 reserved */
+  ushort  reserved44;           /* 44 reserved */
+  ushort  reserved45;           /* 45 reserved */
+  ushort  reserved46;           /* 46 reserved */
+  ushort  reserved47;           /* 47 reserved */
+  ushort  reserved48;           /* 48 reserved */
+  ushort  reserved49;           /* 49 reserved */
+  ushort  reserved50;           /* 50 reserved */
+  ushort  reserved51;           /* 51 reserved */
+  ushort  reserved52;           /* 52 reserved */
+  ushort  reserved53;           /* 53 reserved */
+  ushort  reserved54;           /* 54 reserved */
+  ushort  reserved55;           /* 55 reserved */
+  ushort  cisptr_lsw;           /* 56 CIS PTR LSW */
+  ushort  cisprt_msw;           /* 57 CIS PTR MSW */
+  ushort  subsysvid;            /* 58 SubSystem Vendor ID */
+  ushort  subsysid;             /* 59 SubSystem ID */
+  ushort  reserved60;           /* 60 reserved */
+  ushort  reserved61;           /* 61 reserved */
+  ushort  reserved62;           /* 62 reserved */
+  ushort  reserved63;           /* 63 reserved */
+} ADVEEP_38C1600_CONFIG;
+
 /*
  * EEPROM Commands
  */
@@ -2445,6 +2689,7 @@
 #define BIOS_CTRL_RESET_SCSI_BUS     0x0200
 #define BIOS_CTRL_INIT_VERBOSE       0x0800
 #define BIOS_CTRL_SCSI_PARITY        0x1000
+#define BIOS_CTRL_AIPP_DIS           0x2000
 
 #define ADV_3550_MEMSIZE   0x2000       /* 8 KB Internal Memory */
 #define ADV_3550_IOLEN     0x40         /* I/O Port Range in bytes */
@@ -2452,7 +2697,16 @@
 #define ADV_38C0800_MEMSIZE  0x4000     /* 16 KB Internal Memory */
 #define ADV_38C0800_IOLEN    0x100      /* I/O Port Range in bytes */
 
-#define ADV_38C1600_MEMSIZE  0x4000    /* 16 KB Internal Memory */
+/*
+ *
+ * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come out
+ * a special 16K Adv Library and Microcode version. After the issue resolved,
+ * we should turn back to the 32K support. Both a_init.c and mcode.sas files
+ * also need to be updated.
+ *
+ * #define ADV_38C1600_MEMSIZE  0x8000L   * 32 KB Internal Memory *
+ */
+#define ADV_38C1600_MEMSIZE  0x4000   /* 16 KB Internal Memory */
 #define ADV_38C1600_IOLEN    0x100     /* I/O Port Range 256 bytes */
 #define ADV_38C1600_MEMLEN   0x1000    /* Memory Range 4KB bytes */
 
@@ -2666,6 +2920,14 @@
 
 /*
  * Addendum for ASC-38C0800 Chip
+ *
+ * The ASC-38C1600 Chip uses the same definitions except that the
+ * bus mode override bits [12:10] have been moved to byte register
+ * offset 0xE (IOPB_SOFT_OVER_WR) bits [12:10]. The [12:10] bits in
+ * SCSI_CFG1 are read-only and always available. Bit 14 (DIS_TERM_DRV)
+ * is not needed. The [12:10] bits in IOPB_SOFT_OVER_WR are write-only.
+ * Also each ASC-38C1600 function or channel uses only cable bits [5:4]
+ * and [1:0]. Bits [14], [7:6], [3:2] are unused.
  */
 #define DIS_TERM_DRV    0x4000  /* 1: Read c_det[3:0], 0: cannot read */
 #define HVD_LVD_SE      0x1C00  /* Device Detect Bits */
@@ -2745,6 +3007,33 @@
 #define PRE_TEST_VALUE        0x05
 #define NORMAL_VALUE          0x00
 
+/*
+ * ASC38C1600 Definitions
+ *
+ * IOPB_PCI_INT_CFG Bit Field Definitions
+ */
+
+#define INTAB_LD        0x80    /* Value loaded from EEPROM Bit 11. */
+
+/*
+ * Bit 1 can be set to change the interrupt for the Function to operate in
+ * Totem Pole mode. By default Bit 1 is 0 and the interrupt operates in
+ * Open Drain mode. Both functions of the ASC38C1600 must be set to the same
+ * mode, otherwise the operating mode is undefined.
+ */
+#define TOTEMPOLE       0x02
+
+/*
+ * Bit 0 can be used to change the Int Pin for the Function. The value is
+ * 0 by default for both Functions with Function 0 using INT A and Function
+ * B using INT B. For Function 0 if set, INT B is used. For Function 1 if set,
+ * INT A is used.
+ *
+ * EEPROM Word 0 Bit 11 for each Function may change the initial Int Pin
+ * value specified in the PCI Configuration Space.
+ */
+#define INTAB           0x01
+
 /* a_advlib.h */
 
 /*
@@ -2829,6 +3118,7 @@
 #define ASC_MC_CAM_MODE_MASK            0x015E /* CAM mode TID bitmask. */
 #define ASC_MC_ICQ                      0x0160
 #define ASC_MC_IRQ                      0x0164
+#define ASC_MC_PPR_ABLE                 0x017A
 
 /*
  * BIOS LRAM variable absolute offsets.
@@ -2845,6 +3135,7 @@
  * and handled by the microcode.
  */
 #define CONTROL_FLAG_IGNORE_PERR        0x0001 /* Ignore DMA Parity Errors */
+#define CONTROL_FLAG_ENABLE_AIPP        0x0002 /* Enabled AIPP checking. */
 
 /*
  * ASC_MC_DEVICE_HSHK_CFG_TABLE microcode table or HSHK_CFG register format
@@ -2876,6 +3167,10 @@
 #define ASC_QSC_HEAD_TAG    0x40 /* Use Head Tag Message (0x21). */
 #define ASC_QSC_ORDERED_TAG 0x80 /* Use Ordered Tag Message (0x22). */
 
+/*
+ * All fields here are accessed by the board microcode and need to be
+ * little-endian.
+ */
 typedef struct adv_carr_t
 {
     ADV_VADDR   carr_va;       /* Carrier Virtual Address */
@@ -2896,6 +3191,7 @@
 #define ASC_NEXT_VPA_MASK       0xFFFFFFF0
 
 #define ASC_RQ_DONE             0x00000001
+#define ASC_RQ_GOOD             0x00000002
 #define ASC_CQ_STOPPER          0x00000000
 
 #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK)
@@ -2986,6 +3282,7 @@
   ushort sdtr_speed3;     /* EEPROM SDTR Speed for TID 8-11  */
   ushort sdtr_speed4;     /* EEPROM SDTR Speed for TID 12-15 */
   ushort tagqng_able;     /* try tagged queuing with a device */
+  ushort ppr_able;        /* PPR message capable per TID bitmask. */
   uchar  max_dvc_qng;     /* maximum number of tagged commands per device */
   ushort start_motor;     /* start motor command allowed */
   uchar  scsi_reset_wait; /* delay in seconds after scsi bus reset */
@@ -3030,6 +3327,9 @@
  * The microcode makes assumptions about the size and ordering of fields
  * in this structure. Do not change the structure definition here without
  * coordinating the change with the microcode.
+ *
+ * All fields accessed by microcode must be maintained in little_endian
+ * order.
  */
 typedef struct adv_scsi_req_q {
     uchar       cntl;           /* Ucode flags and state (ASC_MC_QC_*). */
@@ -3042,16 +3342,16 @@
     ADV_PADDR   carr_pa;
     uchar       mflag;
     uchar       sense_len;
-    uchar       cdb_len;        /* SCSI CDB length. */
+    uchar       cdb_len;        /* SCSI CDB length. Must <= 16 bytes. */
     uchar       scsi_cntl;
     uchar       done_status;    /* Completion status. */
     uchar       scsi_status;    /* SCSI status byte. */
     uchar       host_status;    /* Ucode host status. */
     uchar       sg_working_ix;
-    uchar       cdb[12];        /* SCSI command block. */
+    uchar       cdb[12];        /* SCSI CDB bytes 0-11. */
     ADV_PADDR   sg_real_addr;   /* SG list physical address. */
     ADV_PADDR   scsiq_rptr;
-    ADV_DCNT    sg_working_data_cnt;
+    uchar       cdb16[4];       /* SCSI CDB bytes 12-15. */
     ADV_VADDR   scsiq_ptr;
     ADV_VADDR   carr_va;
     /*
@@ -3062,6 +3362,7 @@
     ADV_SG_BLOCK *sg_list_ptr; /* SG list virtual address. */
     char        *vdata_addr;   /* Data buffer virtual address. */
     uchar       a_flag;
+    uchar	pad[2];		/* Pad out to a word boundary. */
 } ADV_SCSI_REQ_Q;
 
 /*
@@ -3097,6 +3398,8 @@
 #define ADV_ASYNC_RDMA_FAILURE          0x01 /* Fatal RDMA failure. */
 #define ADV_ASYNC_SCSI_BUS_RESET_DET    0x02 /* Detected SCSI Bus Reset. */
 #define ADV_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */
+#define ADV_RDMA_IN_CARR_AND_Q_INVALID  0x04 /* RDMAed-in data invalid. */
+
 
 #define ADV_HOST_SCSI_BUS_RESET      0x80 /* Host Initiated SCSI Bus Reset. */
 
@@ -3120,6 +3423,7 @@
 STATIC int     AdvInitGetConfig(ADV_DVC_VAR *);
 STATIC int     AdvInitAsc3550Driver(ADV_DVC_VAR *);
 STATIC int     AdvInitAsc38C0800Driver(ADV_DVC_VAR *);
+STATIC int     AdvInitAsc38C1600Driver(ADV_DVC_VAR *);
 STATIC int     AdvResetChipAndSB(ADV_DVC_VAR *);
 STATIC int     AdvResetSB(ADV_DVC_VAR *asc_dvc);
 
@@ -3130,10 +3434,13 @@
 STATIC void   AdvInquiryHandling(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *);
 STATIC int    AdvInitFrom3550EEP(ADV_DVC_VAR *);
 STATIC int    AdvInitFrom38C0800EEP(ADV_DVC_VAR *);
+STATIC int    AdvInitFrom38C1600EEP(ADV_DVC_VAR *);
 STATIC ushort AdvGet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *);
 STATIC void   AdvSet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *);
 STATIC ushort AdvGet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *);
 STATIC void   AdvSet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *);
+STATIC ushort AdvGet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *);
+STATIC void   AdvSet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *);
 STATIC void   AdvWaitEEPCmd(AdvPortAddr);
 STATIC ushort AdvReadEEPWord(AdvPortAddr, int);
 
@@ -3215,11 +3522,15 @@
 
 /* Read word (2 bytes) from a register. */
 #define AdvReadWordRegister(iop_base, reg_off) \
-     le16_to_cpu(ADV_MEM_READW((iop_base) + (reg_off)))
+     (ADV_MEM_READW((iop_base) + (reg_off)))
 
 /* Write word (2 bytes) to a register. */
 #define AdvWriteWordRegister(iop_base, reg_off, word) \
-     (ADV_MEM_WRITEW((iop_base) + (reg_off), cpu_to_le16(word)))
+     (ADV_MEM_WRITEW((iop_base) + (reg_off), (word)))
+
+/* Write dword (4 bytes) to a register. */
+#define AdvWriteDWordRegister(iop_base, reg_off, dword) \
+     (ADV_MEM_WRITEDW((iop_base) + (reg_off), (dword)))
 
 /* Read byte from LRAM. */
 #define AdvReadByteLram(iop_base, addr, byte) \
@@ -3237,31 +3548,31 @@
 #define AdvReadWordLram(iop_base, addr, word) \
 do { \
     ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
-    (word) = le16_to_cpu(ADV_MEM_READW((iop_base) + IOPW_RAM_DATA)); \
+    (word) = (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA)); \
 } while (0)
 
 /* Write word (2 bytes) to LRAM. */
 #define AdvWriteWordLram(iop_base, addr, word) \
     (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
-     ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, cpu_to_le16(word)))
+     ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
 
 /* Write double word (4 bytes) to LRAM */
 /* Because of unspecified C language ordering don't use auto-increment. */
 #define AdvWriteDWordLram(iop_base, addr, dword) \
     ((ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
       ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
-                     cpu_to_le16((ushort) ((dword) & 0xFFFF)))), \
+                     ((ushort) ((dword) & 0xFFFF)))), \
      (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr) + 2), \
       ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
-                     cpu_to_le16((ushort) ((dword >> 16) & 0xFFFF)))))
+                     ((ushort) ((dword >> 16) & 0xFFFF)))))
 
 /* Read word (2 bytes) from LRAM assuming that the address is already set. */
 #define AdvReadWordAutoIncLram(iop_base) \
-     le16_to_cpu(ADV_MEM_READW((iop_base) + IOPW_RAM_DATA))
+     (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA))
 
 /* Write word (2 bytes) to LRAM assuming that the address is already set. */
 #define AdvWriteWordAutoIncLram(iop_base, word) \
-     (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, cpu_to_le16(word)))
+     (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
 
 #endif /* version >= v1,3,0 */
 
@@ -3376,6 +3687,7 @@
  */
 extern ADVEEP_3550_CONFIG Default_3550_EEPROM_Config;
 extern ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config;
+extern ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config;
 
 /*
  * DvcGetPhyAddr() flag arguments
@@ -3388,7 +3700,7 @@
 #define ADV_IS_CARRIER_FLAG     0x20 /* 'addr' is ADV_CARR_T pointer */
 
 /* Return the address that is aligned at the next doubleword >= to 'addr'. */
-#define ADV_DWALIGN(addr)       (((ulong) (addr) + 0x3) & ~0x3)
+#define ADV_8BALIGN(addr)      (((ulong) (addr) + 0x7) & ~0x7)
 #define ADV_16BALIGN(addr)     (((ulong) (addr) + 0xF) & ~0xF)
 
 /*
@@ -3407,41 +3719,71 @@
          (sizeof(ADV_SG_BLOCK) * \
           ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK))
 
+/* 
+ * Inquiry data structure and bitfield accessor macros
+ *
+ * Using bitfields to access the subchar data isn't portable across
+ * endianness, so instead mask and shift.  Only quantities of more
+ * than 1 bit are shifted, since the others are just tested for true
+ * or false.
+ */
+
+#define INQ_DVC_TYPE(inq)	((inq).periph & 0x1f)
+#define INQ_QUALIFIER(inq)	(((inq).periph & 0xe0) >> 5)
+#define INQ_DVC_TYPE_MOD(inq)	((inq).devtype & 0x7f)
+#define INQ_REMOVABLE(inq)	((inq).devtype & 0x80)
+#define INQ_ANSI_VER(inq)	((inq).ver & 0x07)
+#define INQ_ECMA_VER(inq)	(((inq).ver & 0x38) >> 3)
+#define INQ_ISO_VER(inq)	(((inq).ver & 0xc0) >> 6)
+#define INQ_RESPONSE_FMT(inq)	((inq).byte3 & 0x0f)
+#define INQ_TERM_IO(inq)	((inq).byte3 & 0x40)
+#define INQ_ASYNC_NOTIF(inq)	((inq).byte3 & 0x80)
+#define INQ_SOFT_RESET(inq)	((inq).flags & 0x01)
+#define INQ_CMD_QUEUE(inq)	((inq).flags & 0x02)
+#define INQ_LINK_CMD(inq)	((inq).flags & 0x08)
+#define INQ_SYNC(inq)		((inq).flags & 0x10)
+#define INQ_WIDE16(inq)		((inq).flags & 0x20)
+#define INQ_WIDE32(inq)		((inq).flags & 0x40)
+#define INQ_REL_ADDR(inq)	((inq).flags & 0x80)
+#define INQ_INFO_UNIT(inq)	((inq).info & 0x01)
+#define INQ_QUICK_ARB(inq)	((inq).info & 0x02)
+#define INQ_CLOCKING(inq)	(((inq).info & 0x0c) >> 2)
+
 typedef struct {
-  uchar peri_dvc_type   : 5;    /* peripheral device type */
-  uchar peri_qualifier  : 3;    /* peripheral qualifier */
-  uchar dvc_type_modifier : 7;  /* device type modifier (for SCSI I) */
-  uchar rmb      : 1;           /* RMB - removable medium bit */
-  uchar ansi_apr_ver : 3;       /* ANSI approved version */
-  uchar ecma_ver : 3;           /* ECMA version */
-  uchar iso_ver  : 2;           /* ISO version */
-  uchar rsp_data_fmt : 4;       /* response data format */
+  uchar periph;			/* peripheral device type [0:4] */
+				/* peripheral qualifier [5:7] */
+  uchar devtype;		/* device type modifier (for SCSI I) [0:6] */
+				/* RMB - removable medium bit [7] */
+  uchar ver;			/* ANSI approved version [0:2] */
+				/* ECMA version [3:5] */
+				/* ISO version [6:7] */
+  uchar byte3;			/* response data format [0:3] */
                                 /* 0 SCSI 1 */
                                 /* 1 CCS */
                                 /* 2 SCSI-2 */
                                 /* 3-F reserved */
-  uchar res1     : 2;           /* reserved */
-  uchar TemIOP   : 1;           /* terminate I/O process bit (see 5.6.22) */
-  uchar aenc     : 1;           /* asynch. event notification (processor) */
+				/* reserved [4:5] */
+				/* terminate I/O process bit (see 5.6.22) [6] */
+				/* asynch. event notification (processor) [7] */
   uchar add_len;                /* additional length */
   uchar res2;                   /* reserved */
   uchar res3;                   /* reserved */
-  uchar StfRe   : 1;            /* soft reset implemented */
-  uchar CmdQue  : 1;            /* command queuing */
-  uchar res4    : 1;            /* reserved */
-  uchar Linked  : 1;            /* linked command for this logical unit */
-  uchar Sync    : 1;            /* synchronous data transfer */
-  uchar WBus16  : 1;            /* wide bus 16 bit data transfer */
-  uchar WBus32  : 1;            /* wide bus 32 bit data transfer */
-  uchar RelAdr  : 1;            /* relative addressing mode */
+  uchar flags;			/* soft reset implemented [0] */
+				/* command queuing [1] */
+				/* reserved [2] */
+				/* linked command for this logical unit [3] */
+				/* synchronous data transfer [4] */
+				/* wide bus 16 bit data transfer [5] */
+				/* wide bus 32 bit data transfer [6] */
+				/* relative addressing mode [7] */
   uchar vendor_id[8];           /* vendor identification */
   uchar product_id[16];         /* product identification */
   uchar product_rev_level[4];   /* product revision level */
   uchar vendor_specific[20];    /* vendor specific */
-  uchar IUS      : 1;           /* information unit supported */
-  uchar QAS      : 1;           /* quick arbitrate supported */
-  uchar Clocking : 2;           /* clocking field */
-  uchar res5     : 4;           /* reserved */
+  uchar info;			/* information unit supported [0] */
+				/* quick arbitrate supported [1] */
+				/* clocking field [2:3] */
+				/* reserved [4:7] */
   uchar res6;                   /* reserved */
 } ADV_SCSI_INQUIRY; /* 58 bytes */
 
@@ -3627,12 +3969,13 @@
 #define PCI_MAX_BUS             0xFF
 #define PCI_IOADDRESS_MASK      0xFFFE
 #define ASC_PCI_VENDORID        0x10CD
-#define ASC_PCI_DEVICE_ID_CNT   5       /* PCI Device ID count. */
+#define ASC_PCI_DEVICE_ID_CNT   6       /* PCI Device ID count. */
 #define ASC_PCI_DEVICE_ID_1100  0x1100
 #define ASC_PCI_DEVICE_ID_1200  0x1200
 #define ASC_PCI_DEVICE_ID_1300  0x1300
 #define ASC_PCI_DEVICE_ID_2300  0x2300  /* ASC-3550 */
 #define ASC_PCI_DEVICE_ID_2500  0x2500  /* ASC-38C0800 */
+#define ASC_PCI_DEVICE_ID_2700  0x2700  /* ASC-38C1600 */
 
 /* PCI IO Port Addresses to generate special cycle */
 
@@ -3843,10 +4186,16 @@
 /* Per board statistics structure */
 struct asc_stats {
     /* Driver Entrypoint Statistics */
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
     ADV_DCNT command;         /* # calls to advansys_command() */
+#endif /* version < v2.3.28 */
     ADV_DCNT queuecommand;    /* # calls to advansys_queuecommand() */
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
     ADV_DCNT abort;           /* # calls to advansys_abort() */
     ADV_DCNT reset;           /* # calls to advansys_reset() */
+#else /* version >= v2.3.28 */
+    ADV_DCNT eh_bus_reset;    /* # calls to advansys_eh_bus_reset() */
+#endif /* version >= v2.3.28 */
     ADV_DCNT biosparam;       /* # calls to advansys_biosparam() */
     ADV_DCNT interrupt;       /* # advansys_interrupt() calls */
     ADV_DCNT callback;        /* # calls to asc/adv_isr_callback() */
@@ -3899,16 +4248,18 @@
  * ADV_SG_BLOCK structure holds 15 scatter-gather elements. Under Linux
  * up to 255 scatter-gather elements may be used per request or
  * ADV_SCSI_REQ_Q.
+ *
+ * Both structures must be 8 byte aligned.
  */
 typedef struct adv_sgblk {
-    ADV_SG_BLOCK        sg_block;        /* Sgblock structure. */
-    uchar               align2[4];       /* Sgblock structure padding. */
-    struct adv_sgblk    *next_sgblkp;    /* Next scatter-gather structure. */
+    ADV_SG_BLOCK        sg_block;     /* Sgblock structure. */
+    uchar               align[8];     /* Sgblock structure padding. */
+    struct adv_sgblk    *next_sgblkp; /* Next scatter-gather structure. */
 } adv_sgblk_t;
 
 typedef struct adv_req {
     ADV_SCSI_REQ_Q      scsi_req_q;   /* Adv Library request structure. */
-    uchar               align1[4];    /* Request structure padding. */
+    uchar               align[8];     /* Request structure padding. */
     Scsi_Cmnd           *cmndp;       /* Mid-Level SCSI command pointer. */
     adv_sgblk_t         *sgblkp;      /* Adv Library scatter-gather pointer. */
     struct adv_req      *next_reqp;   /* Next Request Structure. */
@@ -3932,6 +4283,7 @@
         ASC_DVC_CFG      asc_dvc_cfg;           /* Narrow board */
         ADV_DVC_CFG      adv_dvc_cfg;           /* Wide board */
     } dvc_cfg;
+    ushort               asc_n_io_port;         /* Number I/O ports. */
     asc_queue_t          active;                /* Active command queue */
     asc_queue_t          waiting;               /* Waiting command queue */
     asc_queue_t          done;                  /* Done command queue */
@@ -3944,8 +4296,12 @@
         ASCEEP_CONFIG         asc_eep;          /* Narrow EEPROM config. */
         ADVEEP_3550_CONFIG    adv_3550_eep;     /* 3550 EEPROM config. */
         ADVEEP_38C0800_CONFIG adv_38C0800_eep;  /* 38C0800 EEPROM config. */
+        ADVEEP_38C1600_CONFIG adv_38C1600_eep;  /* 38C1600 EEPROM config. */
     } eep_config;
     ulong                last_reset;            /* Saved last reset time */
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(2,3,28)
+    spinlock_t lock;                            /* Board spinlock */
+#endif /* version >= v2.3.28 */
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
     /* /proc/scsi/advansys/[0...] */
     char                 *prtbuf;               /* Statistics Print Buffer */
@@ -4100,7 +4456,7 @@
     "ASC_IS_PCI",
 };
 
-STATIC int          asc_dbglvl = 2;
+STATIC int          asc_dbglvl = 3;
 #endif /* ADVANSYS_DEBUG */
 
 /* Declaration for Asc Library internal data referenced by driver. */
@@ -4114,7 +4470,9 @@
  */
 
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
+#ifdef CONFIG_PROC_FS
 STATIC int          asc_proc_copy(off_t, off_t, char *, int , char *, int);
+#endif /* CONFIG_PROC_FS */
 #endif /* version >= v1.3.0 */
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(1,3,70)
 STATIC void         advansys_interrupt(int, struct pt_regs *);
@@ -4125,7 +4483,9 @@
 STATIC void         advansys_select_queue_depths(struct Scsi_Host *,
                                                 Scsi_Device *);
 #endif /* version >= v1.3.89 */
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC void       advansys_command_done(Scsi_Cmnd *);
+#endif /* version < v2.3.28 */
 STATIC void       asc_scsi_done_list(Scsi_Cmnd *);
 STATIC int        asc_execute_scsi_cmnd(Scsi_Cmnd *);
 STATIC int        asc_build_req(asc_board_t *, Scsi_Cmnd *);
@@ -4149,9 +4509,12 @@
 STATIC REQP       asc_dequeue(asc_queue_t *, int);
 STATIC REQP       asc_dequeue_list(asc_queue_t *, REQP *, int);
 STATIC int        asc_rmqueue(asc_queue_t *, REQP);
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int        asc_isqueued(asc_queue_t *, REQP);
+#endif /* version < v2.3.28 */
 STATIC void       asc_execute_queue(asc_queue_t *);
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
+#ifdef CONFIG_PROC_FS
 STATIC int        asc_prt_board_devices(struct Scsi_Host *, char *, int);
 STATIC int        asc_prt_adv_bios(struct Scsi_Host *, char *, int);
 STATIC int        asc_get_eeprom_string(ushort *serialnum, uchar *cp);
@@ -4161,6 +4524,7 @@
 STATIC int        asc_prt_asc_board_info(struct Scsi_Host *, char *, int);
 STATIC int        asc_prt_adv_board_info(struct Scsi_Host *, char *, int);
 STATIC int        asc_prt_line(char *, int, char *fmt, ...);
+#endif /* CONFIG_PROC_FS */
 #endif /* version >= v1.3.0 */
 
 /* Declaration for Asc Library internal functions referenced by driver. */
@@ -4168,7 +4532,10 @@
 STATIC ushort       AscGetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort);
 
 #ifdef ADVANSYS_STATS
+#ifdef CONFIG_PROC_FS
 STATIC int          asc_prt_board_stats(struct Scsi_Host *, char *, int);
+STATIC int          asc_prt_target_stats(struct Scsi_Host *, int, char *, int);
+#endif /* CONFIG_PROC_FS */
 #endif /* ADVANSYS_STATS */
 
 #ifdef ADVANSYS_DEBUG
@@ -4186,7 +4553,7 @@
 #endif /* ADVANSYS_DEBUG */
 
 #ifdef ADVANSYS_ASSERT
-STATIC int             interrupts_enabled(void);
+STATIC int             advansys_interrupts_enabled(void);
 #endif /* ADVANSYS_ASSERT */
 
 
@@ -4231,6 +4598,7 @@
     char                *curbuf;
     off_t               advoffset;
     Scsi_Device         *scd;
+    int                 tgt_id;
 
     ASC_DBG(1, "advansys_proc_info: begin\n");
 
@@ -4390,7 +4758,7 @@
      */
     cp = boardp->prtbuf;
     cplen = asc_prt_board_stats(shp, cp, ASC_PRTBUF_SIZE);
-    ASC_ASSERT(cplen < ASC_PRTBUF_SIZE);
+    ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE);
     cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
     totcnt += cnt;
     leftlen -= cnt;
@@ -4400,6 +4768,24 @@
     }
     advoffset += cplen;
     curbuf += cnt;
+
+    /*
+     * Display driver statistics for each target.
+     */
+    for (tgt_id = 0; tgt_id <= ADV_MAX_TID; tgt_id++) {
+      cp = boardp->prtbuf;
+      cplen = asc_prt_target_stats(shp, tgt_id, cp, ASC_PRTBUF_SIZE);
+      ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE);
+      cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
+      totcnt += cnt;
+      leftlen -= cnt;
+      if (leftlen == 0) {
+        ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
+        return totcnt;
+      }
+      advoffset += cplen;
+      curbuf += cnt;
+    }
 #endif /* ADVANSYS_STATS */
 
     /*
@@ -4486,7 +4872,8 @@
                                     ASC_PCI_DEVICE_ID_1200,
                                     ASC_PCI_DEVICE_ID_1300,
                                     ASC_PCI_DEVICE_ID_2300,
-                                    ASC_PCI_DEVICE_ID_2500
+                                    ASC_PCI_DEVICE_ID_2500,
+                                    ASC_PCI_DEVICE_ID_2700
                         };
     ADV_PADDR           pci_memory_address;
 #endif /* CONFIG_PCI */
@@ -4559,6 +4946,7 @@
             switch (asc_bus[bus]) {
             case ASC_IS_ISA:
             case ASC_IS_VL:
+#ifdef CONFIG_ISA
                 if (asc_iopflag == ASC_FALSE) {
                     iop = AscSearchIOPortAddr(iop, asc_bus[bus]);
                 } else {
@@ -4618,10 +5006,13 @@
                         asc_ioport[ioport++] = 0;
                     }
                 }
+#endif /* CONFIG_ISA */
                 break;
 
             case ASC_IS_EISA:
+#ifdef CONFIG_ISA
                 iop = AscSearchIOPortAddr(iop, asc_bus[bus]);
+#endif /* CONFIG_ISA */
                 break;
 
             case ASC_IS_PCI:
@@ -4699,7 +5090,13 @@
                             NULL) {
                             pci_device_id_cnt++;
                         } else {
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,4,0)
                             pci_devicep[pci_card_cnt_max++] = pci_devp;
+#else /* version >= v2.4.0 */
+                            if (pci_enable_device(pci_devp) == 0) {
+                                pci_devicep[pci_card_cnt_max++] = pci_devp;
+                            }
+#endif /* version >= v2.4.0 */
                         }
                     }
 
@@ -4738,9 +5135,11 @@
                         pci_devp->devfn, pci_devp->bus->number);
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,13)
                     iop = pci_devp->base_address[0] & PCI_IOADDRESS_MASK;
-#else /* version >= v2.3.13 */ 
+#elif LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,4,0)
                     iop = pci_devp->resource[0].start & PCI_IOADDRESS_MASK;
-#endif /* version >= v2.3.13 */ 
+#else /* version >= v2.4.0 */
+                    iop = pci_resource_start(pci_devp, 0);
+#endif /* version >= v2.4.0 */
                     ASC_DBG2(1,
                         "advansys_detect: vendorID %X, deviceID %X\n",
                         pci_devp->vendor, pci_devp->device);
@@ -4773,6 +5172,10 @@
              */
             ASC_DBG(2, "advansys_detect: scsi_register()\n");
             shp = scsi_register(tpnt, sizeof(asc_board_t));
+            
+            if(shp == NULL) {
+            	continue;
+            }
 
             /* Save a pointer to the Scsi_host of each board found. */
             asc_host[asc_board_count++] = shp;
@@ -4782,6 +5185,11 @@
             memset(boardp, 0, sizeof(asc_board_t));
             boardp->id = asc_board_count - 1;
 
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(2,3,28)
+            /* Initialize spinlock. */
+	    boardp->lock = SPIN_LOCK_UNLOCKED;
+#endif /* version >= v2.3.28 */
+
             /*
              * Handle both narrow and wide boards.
              *
@@ -4793,7 +5201,8 @@
 #ifdef ASC_CONFIG_PCI
             if (asc_bus[bus] == ASC_IS_PCI &&
                 (pciConfig.deviceID == ASC_PCI_DEVICE_ID_2300 ||
-                 pciConfig.deviceID == ASC_PCI_DEVICE_ID_2500))
+                 pciConfig.deviceID == ASC_PCI_DEVICE_ID_2500 ||
+                 pciConfig.deviceID == ASC_PCI_DEVICE_ID_2700))
             {
                 boardp->flags |= ASC_IS_WIDE_BOARD;
             }
@@ -4802,7 +5211,8 @@
 #ifdef CONFIG_PCI
             if (asc_bus[bus] == ASC_IS_PCI &&
                 (pci_devp->device == ASC_PCI_DEVICE_ID_2300 ||
-                 pci_devp->device == ASC_PCI_DEVICE_ID_2500))
+                 pci_devp->device == ASC_PCI_DEVICE_ID_2500 ||
+                 pci_devp->device == ASC_PCI_DEVICE_ID_2700))
             {
                 boardp->flags |= ASC_IS_WIDE_BOARD;
             }
@@ -4832,10 +5242,14 @@
                 {
                     ASC_DBG(1, "advansys_detect: ASC-3550\n");
                     adv_dvc_varp->chip_type = ADV_CHIP_ASC3550;
-                } else
+                } else if (pciConfig.deviceID == ASC_PCI_DEVICE_ID_2500)
                 {
                     ASC_DBG(1, "advansys_detect: ASC-38C0800\n");
                     adv_dvc_varp->chip_type = ADV_CHIP_ASC38C0800;
+                } else
+                {
+                    ASC_DBG(1, "advansys_detect: ASC-38C1600\n");
+                    adv_dvc_varp->chip_type = ADV_CHIP_ASC38C1600;
                 }
 #endif /* ASC_CONFIG_PCI */
 #else /* version >= v2.1.93 */ 
@@ -4844,10 +5258,14 @@
                 {
                     ASC_DBG(1, "advansys_detect: ASC-3550\n");
                     adv_dvc_varp->chip_type = ADV_CHIP_ASC3550;
-                } else
+                } else if (pci_devp->device == ASC_PCI_DEVICE_ID_2500)
                 {
                     ASC_DBG(1, "advansys_detect: ASC-38C0800\n");
                     adv_dvc_varp->chip_type = ADV_CHIP_ASC38C0800;
+                } else
+                {
+                    ASC_DBG(1, "advansys_detect: ASC-38C1600\n");
+                    adv_dvc_varp->chip_type = ADV_CHIP_ASC38C1600;
                 }
 #endif /* CONFIG_PCI */
 #endif /* version >= v2.1.93 */ 
@@ -4869,8 +5287,12 @@
                 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550)
                 {
                     iolen = ADV_3550_IOLEN;
-                } else {
+                } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
+                {
                     iolen = ADV_38C0800_IOLEN;
+                } else
+                {
+                    iolen = ADV_38C1600_IOLEN;
                 }
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,1,93)
 #ifdef ASC_CONFIG_PCI
@@ -4899,9 +5321,11 @@
 #ifdef CONFIG_PCI
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,13)
                 pci_memory_address = pci_devp->base_address[1];
-#else /* version >= v2.3.13 */ 
+#elif LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,4,0)
                 pci_memory_address = pci_devp->resource[1].start;
-#endif /* version >= v2.3.13 */ 
+#else /* version >= v2.4.0 */
+                pci_memory_address = pci_resource_start(pci_devp, 1);
+#endif /* version >= v2.4.0 */
                 ASC_DBG1(1, "advansys_detect: pci_memory_address: %x\n",
                     pci_memory_address);
                 if ((boardp->ioremap_addr =
@@ -4960,6 +5384,7 @@
                  * calling AscInitGetConfig().
                  */
                 switch (asc_dvc_varp->bus_type) {
+#ifdef CONFIG_ISA
                 case ASC_IS_ISA:
                     shp->unchecked_isa_dma = TRUE;
                     share_irq = FALSE;
@@ -4972,6 +5397,7 @@
                     shp->unchecked_isa_dma = FALSE;
                     share_irq = TRUE;
                     break;
+#endif /* CONFIG_ISA */
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,1,93)
 #ifdef ASC_CONFIG_PCI
                 case ASC_IS_PCI:
@@ -5132,12 +5558,12 @@
                 ep->init_sdtr = asc_dvc_varp->cfg->sdtr_enable;
                 ep->disc_enable = asc_dvc_varp->cfg->disc_enable;
                 ep->use_cmd_qng = asc_dvc_varp->cfg->cmd_qng_enabled;
-                ep->isa_dma_speed = asc_dvc_varp->cfg->isa_dma_speed;
+                ASC_EEP_SET_DMA_SPD(ep, asc_dvc_varp->cfg->isa_dma_speed);
                 ep->start_motor = asc_dvc_varp->start_motor;
                 ep->cntl = asc_dvc_varp->dvc_cntl;
                 ep->no_scam = asc_dvc_varp->no_scam;
                 ep->max_total_qng = asc_dvc_varp->max_total_qng;
-                ep->chip_scsi_id = asc_dvc_varp->cfg->chip_scsi_id;
+                ASC_EEP_SET_CHIP_ID(ep, asc_dvc_varp->cfg->chip_scsi_id);
                 /* 'max_tag_qng' is set to the same value for every device. */
                 ep->max_tag_qng = asc_dvc_varp->cfg->max_tag_qng[0];
                 ep->adapter_info[0] = asc_dvc_varp->cfg->adapter_info[0];
@@ -5209,6 +5635,7 @@
             } else {
                 ADVEEP_3550_CONFIG      *ep_3550;
                 ADVEEP_38C0800_CONFIG   *ep_38C0800;
+                ADVEEP_38C1600_CONFIG   *ep_38C1600;
 
                 /*
                  * Save Wide EEP Configuration Information.
@@ -5235,7 +5662,7 @@
                         adv_dvc_varp->cfg->serial2;
                     ep_3550->serial_number_word3 =
                         adv_dvc_varp->cfg->serial3;
-                } else
+                } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
                 {
                     ep_38C0800 = &boardp->eep_config.adv_38C0800_eep;
 
@@ -5262,6 +5689,33 @@
                         adv_dvc_varp->cfg->serial2;
                     ep_38C0800->serial_number_word3 =
                         adv_dvc_varp->cfg->serial3;
+                } else
+                {
+                    ep_38C1600 = &boardp->eep_config.adv_38C1600_eep;
+
+                    ep_38C1600->adapter_scsi_id = adv_dvc_varp->chip_scsi_id;
+                    ep_38C1600->max_host_qng = adv_dvc_varp->max_host_qng;
+                    ep_38C1600->max_dvc_qng = adv_dvc_varp->max_dvc_qng;
+                    ep_38C1600->termination_lvd =
+                        adv_dvc_varp->cfg->termination;
+                    ep_38C1600->disc_enable = adv_dvc_varp->cfg->disc_enable;
+                    ep_38C1600->bios_ctrl = adv_dvc_varp->bios_ctrl;
+                    ep_38C1600->wdtr_able = adv_dvc_varp->wdtr_able;
+                    ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able;
+                    ep_38C1600->sdtr_speed1 = adv_dvc_varp->sdtr_speed1;
+                    ep_38C1600->sdtr_speed2 = adv_dvc_varp->sdtr_speed2;
+                    ep_38C1600->sdtr_speed3 = adv_dvc_varp->sdtr_speed3;
+                    ep_38C1600->sdtr_speed4 = adv_dvc_varp->sdtr_speed4;
+                    ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able;
+                    ep_38C1600->start_motor = adv_dvc_varp->start_motor;
+                    ep_38C1600->scsi_reset_delay =
+                        adv_dvc_varp->scsi_reset_wait;
+                    ep_38C1600->serial_number_word1 =
+                        adv_dvc_varp->cfg->serial1;
+                    ep_38C1600->serial_number_word2 =
+                        adv_dvc_varp->cfg->serial2;
+                    ep_38C1600->serial_number_word3 =
+                        adv_dvc_varp->cfg->serial3;
                 }
 
                 /*
@@ -5278,7 +5732,7 @@
 
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89)
             /*
-             * Channels are numbered beginning with 0. For AdvanSys One host
+             * Channels are numbered beginning with 0. For AdvanSys one host
              * structure supports one channel. Multi-channel boards have a
              * separate host structure for each channel. 
              */
@@ -5289,7 +5743,7 @@
                 shp->max_lun = ASC_MAX_LUN + 1;
 
                 shp->io_port = asc_dvc_varp->iop_base;
-                shp->n_io_port = ASC_IOADR_GAP;
+                boardp->asc_n_io_port = ASC_IOADR_GAP;
                 shp->this_id = asc_dvc_varp->cfg->chip_scsi_id;
 
                 /* Set maximum number of queues the adapter can handle. */
@@ -5305,7 +5759,7 @@
                  * Memory Mapped I/O.
                  */
                 shp->io_port = iop;
-                shp->n_io_port = iolen;
+                boardp->asc_n_io_port = iolen;
 
                 shp->this_id = adv_dvc_varp->chip_scsi_id;
 
@@ -5313,6 +5767,10 @@
                 shp->can_queue = adv_dvc_varp->max_host_qng;
             }
 
+            /* 'n_io_port' currently is one byte. */
+            shp->n_io_port = boardp->asc_n_io_port <= 255 ?
+                boardp->asc_n_io_port : 255;
+
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(1,3,89)
             /*
              * In old kernels without tag queuing support and with memory
@@ -5449,10 +5907,11 @@
 
             /* Register I/O port range. */
             ASC_DBG(2, "advansys_detect: request_region()\n");
-            request_region(shp->io_port, shp->n_io_port, "advansys");
+            request_region(shp->io_port, boardp->asc_n_io_port, "advansys");
 
             /* Register DMA Channel for Narrow boards. */
             shp->dma_channel = NO_ISA_DMA; /* Default to no ISA DMA. */
+#ifdef CONFIG_ISA
             if (ASC_NARROW_BOARD(boardp)) {
                 /* Register DMA channel for ISA bus. */
                 if (asc_dvc_varp->bus_type & ASC_IS_ISA) {
@@ -5462,7 +5921,7 @@
                         ASC_PRINT3(
 "advansys_detect: board %d: request_dma() %d failed %d\n",
                             boardp->id, shp->dma_channel, ret);
-                        release_region(shp->io_port, shp->n_io_port);
+                        release_region(shp->io_port, boardp->asc_n_io_port);
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
                         kfree(boardp->prtbuf);
 #endif /* version >= v1.3.0 */
@@ -5473,6 +5932,7 @@
                     AscEnableIsaDma(shp->dma_channel);
                 }
             }
+#endif /* CONFIG_ISA */
 
             /* Register IRQ Number. */
             ASC_DBG1(2, "advansys_detect: request_irq() %d\n", shp->irq);
@@ -5510,7 +5970,7 @@
 "advansys_detect: board %d: request_irq(): IRQ %d failed with %d\n",
                         boardp->id, shp->irq, ret);
                 }
-                release_region(shp->io_port, shp->n_io_port);
+                release_region(shp->io_port, boardp->asc_n_io_port);
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
                 iounmap(boardp->ioremap_addr);
 #endif /* version >= v1,3,0 */
@@ -5673,16 +6133,20 @@
                         ASC_DBG(2,
                             "advansys_detect: AdvInitAsc3550Driver()\n");
                         warn_code = AdvInitAsc3550Driver(adv_dvc_varp);
-                    } else {
+                    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
                         ASC_DBG(2,
                             "advansys_detect: AdvInitAsc38C0800Driver()\n");
                         warn_code = AdvInitAsc38C0800Driver(adv_dvc_varp);
+                    } else {
+                        ASC_DBG(2,
+                            "advansys_detect: AdvInitAsc38C1600Driver()\n");
+                        warn_code = AdvInitAsc38C1600Driver(adv_dvc_varp);
                     }
                     err_code = adv_dvc_varp->err_code;
 
                     if (warn_code || err_code) {
                         ASC_PRINT3(
-"AdvInitAsc3550/38C0800Driver: board %d: error: warn %x, error %x\n",
+"AdvInitAsc3550/38C0800/38C1600Driver: board %d: error: warn %x, error %x\n",
                             boardp->id, warn_code, err_code);
                     }
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
@@ -5691,7 +6155,7 @@
             }
 
             if (err_code != 0) {
-                release_region(shp->io_port, shp->n_io_port);
+                release_region(shp->io_port, boardp->asc_n_io_port);
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
                 if (ASC_WIDE_BOARD(boardp)) {
                     iounmap(boardp->ioremap_addr);
@@ -5753,7 +6217,7 @@
         ASC_DBG(1, "advansys_release: free_dma()\n");
         free_dma(shp->dma_channel);
     }
-    release_region(shp->io_port, shp->n_io_port);
+    release_region(shp->io_port, boardp->asc_n_io_port);
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
     if (ASC_WIDE_BOARD(boardp)) {
         adv_sgblk_t    *sgp = NULL;
@@ -5819,7 +6283,7 @@
 #endif /* version >= v2.1.92 */ 
                 ASC_VERSION, busname, asc_dvc_varp->max_total_qng,
                 (ulong) shp->base,
-                (ulong) shp->io_port, shp->n_io_port - 1,
+                (ulong) shp->io_port, boardp->asc_n_io_port - 1,
                 shp->irq, shp->dma_channel);
         } else if (asc_dvc_varp->bus_type & ASC_IS_PCI) {
             if ((asc_dvc_varp->bus_type & ASC_IS_PCI_ULTRA)
@@ -5835,7 +6299,7 @@
                 "AdvanSys SCSI %s: %s %u CDB: IO %lX/%X, IRQ %u",
 #endif /* version >= v2.1.92 */ 
                 ASC_VERSION, busname, asc_dvc_varp->max_total_qng,
-                shp->io_port, shp->n_io_port - 1, shp->irq);
+                shp->io_port, boardp->asc_n_io_port - 1, shp->irq);
         } else {
             if (asc_dvc_varp->bus_type & ASC_IS_VL) {
                 busname = "VL";
@@ -5855,7 +6319,7 @@
 #endif /* version >= v2.1.92 */ 
                 ASC_VERSION, busname, asc_dvc_varp->max_total_qng,
                 (ulong) shp->base, shp->io_port - 1,
-                shp->n_io_port, shp->irq);
+                boardp->asc_n_io_port, shp->irq);
         }
     } else {
         /*
@@ -5870,9 +6334,14 @@
         {
             iolen = ADV_3550_IOLEN;
             widename = "Ultra-Wide";
-        } else {
+        } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
+        {
             iolen = ADV_38C0800_IOLEN;
             widename = "Ultra2-Wide";
+        } else
+        {
+            iolen = ADV_38C1600_IOLEN;
+            widename = "Ultra3-Wide";
         }
         if (boardp->bios_signature == 0x55AA) {
             sprintf(info,
@@ -5899,6 +6368,7 @@
     return info;
 }
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 /*
  * advansys_command() - polled I/O entrypoint.
  *
@@ -5922,6 +6392,7 @@
     ASC_DBG1(1, "advansys_command: result %x\n", scp->result);
     return scp->result;
 }
+#endif /* version < v2.3.28 */
 
 /*
  * advansys_queuecommand() - interrupt-driven I/O entrypoint.
@@ -5941,6 +6412,7 @@
     boardp = ASC_BOARDP(shp);
     ASC_STATS(shp, queuecommand);
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
     /*
      * Disable interrupts to preserve request ordering and provide
      * mutually exclusive access to global structures used to initiate
@@ -5948,6 +6420,9 @@
      */
     save_flags(flags);
     cli();
+#else /* version >= v2.3.28 */
+    spin_lock_irqsave(&boardp->lock, flags);
+#endif /* version >= v2.3.28 */
 
     /*
      * Block new commands while handling a reset or abort request.
@@ -5971,7 +6446,11 @@
          * handling.
          */
         asc_enqueue(&boardp->done, scp, ASC_BACK);
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
         restore_flags(flags);
+#else /* version >= v2.3.28 */
+        spin_unlock_irqrestore(&boardp->lock, flags);
+#endif /* version >= v2.3.28 */
         return 0;
     }
 
@@ -6013,10 +6492,15 @@
         break;
     }
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
     restore_flags(flags);
+#else /* version >= v2.3.28 */
+    spin_unlock_irqrestore(&boardp->lock, flags);
+#endif /* version >= v2.3.28 */
     return 0;
 }
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 /*
  * advansys_abort()
  *
@@ -6654,47 +7138,236 @@
     ASC_ASSERT(ret != ASC_ERROR);
     return ret;
 }
-
+#else /* version >= v2.3.28 */
 /*
- * advansys_biosparam()
+ * advansys_eh_bus_reset()
  *
- * Translate disk drive geometry if the "BIOS greater than 1 GB"
- * support is enabled for a drive.
+ * Reset the bus associated with the command 'scp'.
  *
- * ip (information pointer) is an int array with the following definition:
- * ip[0]: heads
- * ip[1]: sectors
- * ip[2]: cylinders
+ * This function runs its own thread. Interrupts must be blocked but
+ * sleeping is allowed and no locking other than for host structures is
+ * required. Returns SUCCESS or FAILED.
  */
 int
-#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(1,3,0)
-advansys_biosparam(Disk *dp, int dep, int ip[])
-#else /* version >= v1.3.0 */
-advansys_biosparam(Disk *dp, kdev_t dep, int ip[])
-#endif /* version >= v1.3.0 */
+advansys_eh_bus_reset(Scsi_Cmnd *scp)
 {
-    asc_board_t     *boardp;
+    struct Scsi_Host     *shp;
+    asc_board_t          *boardp;
+    ASC_DVC_VAR          *asc_dvc_varp;
+    ADV_DVC_VAR          *adv_dvc_varp;
+    int                  flags;
+    Scsi_Cmnd            *done_scp = NULL, *last_scp = NULL;
+    Scsi_Cmnd            *tscp, *new_last_scp;
+    int                  status;
+    int                  ret;
+
+    ASC_DBG1(1, "advansys_eh_bus_reset: %lx\n", (ulong) scp);
+
+#ifdef ADVANSYS_STATS
+    if (scp->host != NULL) {
+        ASC_STATS(scp->host, eh_bus_reset);
+    }    
+#endif /* ADVANSYS_STATS */
+
+    if ((shp = scp->host) == NULL) {
+        scp->result = HOST_BYTE(DID_ERROR);
+        return FAILED;
+    }
+
+    boardp = ASC_BOARDP(shp);
+
+    /*
+     * Check for re-entrancy.
+     */
+    spin_lock_irqsave(&boardp->lock, flags);
+    if (boardp->flags & ASC_HOST_IN_RESET) {
+        spin_unlock_irqrestore(&boardp->lock, flags);
+        return FAILED;
+    }
+    boardp->flags |= ASC_HOST_IN_RESET;
+    spin_unlock_irqrestore(&boardp->lock, flags);
 
-    ASC_DBG(1, "advansys_biosparam: begin\n");
-    ASC_STATS(dp->device->host, biosparam);
-    boardp = ASC_BOARDP(dp->device->host);
     if (ASC_NARROW_BOARD(boardp)) {
-        if ((boardp->dvc_var.asc_dvc_var.dvc_cntl &
-             ASC_CNTL_BIOS_GT_1GB) && dp->capacity > 0x200000) {
-                ip[0] = 255;
-                ip[1] = 63;
-        } else {
-                ip[0] = 64;
-                ip[1] = 32;
+        /*
+         * Narrow Board
+         *
+         * If the suggest reset bus flags are set, then reset the bus.
+         * Otherwise only reset the device.
+         */
+        asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
+
+        /*
+         * Reset the target's SCSI bus.
+         */
+        ASC_DBG(1, "advansys_eh_bus_reset: before AscResetSB()\n");
+        status = AscResetSB(asc_dvc_varp);
+        switch (status) {
+        case ASC_TRUE:
+            ASC_DBG(1, "advansys_eh_bus_reset: AscResetSB() success\n");
+            ret = SUCCESS;
+            break;
+        case ASC_ERROR:
+        default:
+            ASC_DBG(1, "advansys_eh_bus_reset: AscResetSB() failed\n");
+            ret = FAILED;
+            break;
         }
+
+        /*
+         * Acquire the board lock.
+         */
+        spin_lock_irqsave(&boardp->lock, flags);
+
     } else {
-        if ((boardp->dvc_var.adv_dvc_var.bios_ctrl &
-             BIOS_CTRL_EXTENDED_XLAT) && dp->capacity > 0x200000) {
-                ip[0] = 255;
-                ip[1] = 63;
-        } else {
-                ip[0] = 64;
-                ip[1] = 32;
+        /*
+         * Wide Board
+         *
+         * If the suggest reset bus flags are set, then reset the bus.
+         * Otherwise only reset the device.
+         */
+        adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
+
+        /*
+         * Reset the target's SCSI bus.
+         */
+        ASC_DBG(1, "advansys_eh_bus_reset: before AdvResetChipAndSB()\n");
+        switch (AdvResetChipAndSB(adv_dvc_varp)) {
+        case ASC_TRUE:
+            ASC_DBG(1,
+                "advansys_eh_bus_reset: AdvResetChipAndSB() success\n");
+            ret = SUCCESS;
+            break;
+        case ASC_FALSE:
+        default:
+            ASC_DBG(1, "advansys_eh_bus_reset: AdvResetChipAndSB() failed\n");
+            ret = FAILED;
+            break;
+        }
+        /*
+         * Acquire the board lock and ensure all requests completed by the
+         * microcode have been processed by calling AdvISR().
+         */
+        spin_lock_irqsave(&boardp->lock, flags);
+        (void) AdvISR(adv_dvc_varp);
+    }
+
+    /* Board lock is held. */
+
+    /*
+     * Dequeue all board 'done' requests. A pointer to the last request
+     * is returned in 'last_scp'.
+     */
+    done_scp = asc_dequeue_list(&boardp->done, &last_scp, ASC_TID_ALL);
+
+    /*
+     * Dequeue all board 'active' requests for all devices and set
+     * the request status to DID_RESET. A pointer to the last request
+     * is returned in 'last_scp'.
+     */
+    if (done_scp == NULL) {
+        done_scp = asc_dequeue_list(&boardp->active, &last_scp, ASC_TID_ALL);
+        for (tscp = done_scp; tscp; tscp = REQPNEXT(tscp)) {
+            tscp->result = HOST_BYTE(DID_RESET);
+        }
+    } else {
+        /* Append to 'done_scp' at the end with 'last_scp'. */
+        ASC_ASSERT(last_scp != NULL);
+        REQPNEXT(last_scp) = asc_dequeue_list(&boardp->active,
+            &new_last_scp, ASC_TID_ALL);
+        if (new_last_scp != NULL) {
+            ASC_ASSERT(REQPNEXT(last_scp) != NULL);
+            for (tscp = REQPNEXT(last_scp); tscp; tscp = REQPNEXT(tscp)) {
+                tscp->result = HOST_BYTE(DID_RESET);
+            }
+            last_scp = new_last_scp;
+        }
+    }
+
+    /*
+     * Dequeue all 'waiting' requests and set the request status
+     * to DID_RESET.
+     */
+    if (done_scp == NULL) {
+        done_scp = asc_dequeue_list(&boardp->waiting, &last_scp, ASC_TID_ALL);
+        for (tscp = done_scp; tscp; tscp = REQPNEXT(tscp)) {
+            tscp->result = HOST_BYTE(DID_RESET);
+        }
+    } else {
+        /* Append to 'done_scp' at the end with 'last_scp'. */
+        ASC_ASSERT(last_scp != NULL);
+        REQPNEXT(last_scp) = asc_dequeue_list(&boardp->waiting,
+            &new_last_scp, ASC_TID_ALL);
+        if (new_last_scp != NULL) {
+            ASC_ASSERT(REQPNEXT(last_scp) != NULL);
+            for (tscp = REQPNEXT(last_scp); tscp; tscp = REQPNEXT(tscp)) {
+                tscp->result = HOST_BYTE(DID_RESET);
+            }
+            last_scp = new_last_scp;
+        }
+    }
+
+    /* Save the time of the most recently completed reset. */
+    boardp->last_reset = jiffies;
+
+    /* Clear reset flag. */
+    boardp->flags &= ~ASC_HOST_IN_RESET;
+
+    /* Release the board. */
+    spin_unlock_irqrestore(&boardp->lock, flags);
+
+    /*
+     * Complete all the 'done_scp' requests.
+     */
+    if (done_scp != NULL) {
+        asc_scsi_done_list(done_scp);
+    }
+
+    ASC_DBG1(1, "advansys_eh_bus_reset: ret %d\n", ret);
+
+    return ret;
+}
+#endif /* version >= v2.3.28 */
+
+/*
+ * advansys_biosparam()
+ *
+ * Translate disk drive geometry if the "BIOS greater than 1 GB"
+ * support is enabled for a drive.
+ *
+ * ip (information pointer) is an int array with the following definition:
+ * ip[0]: heads
+ * ip[1]: sectors
+ * ip[2]: cylinders
+ */
+int
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(1,3,0)
+advansys_biosparam(Disk *dp, int dep, int ip[])
+#else /* version >= v1.3.0 */
+advansys_biosparam(Disk *dp, kdev_t dep, int ip[])
+#endif /* version >= v1.3.0 */
+{
+    asc_board_t     *boardp;
+
+    ASC_DBG(1, "advansys_biosparam: begin\n");
+    ASC_STATS(dp->device->host, biosparam);
+    boardp = ASC_BOARDP(dp->device->host);
+    if (ASC_NARROW_BOARD(boardp)) {
+        if ((boardp->dvc_var.asc_dvc_var.dvc_cntl &
+             ASC_CNTL_BIOS_GT_1GB) && dp->capacity > 0x200000) {
+                ip[0] = 255;
+                ip[1] = 63;
+        } else {
+                ip[0] = 64;
+                ip[1] = 32;
+        }
+    } else {
+        if ((boardp->dvc_var.adv_dvc_var.bios_ctrl &
+             BIOS_CTRL_EXTENDED_XLAT) && dp->capacity > 0x200000) {
+                ip[0] = 255;
+                ip[1] = 63;
+        } else {
+                ip[0] = 64;
+                ip[1] = 32;
         }
     }
     ip[2] = dp->capacity / (ip[0] * ip[1]);
@@ -6784,10 +7457,15 @@
  * --- Loadable Driver Support
  */
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,4,0)
 #ifdef MODULE
 Scsi_Host_Template driver_template = ADVANSYS;
 # include "scsi_module.c"
 #endif /* MODULE */
+#else /* version >= v2.4.0 */
+static Scsi_Host_Template driver_template = ADVANSYS;
+# include "scsi_module.c"
+#endif /* version >= v2.4.0 */
 
 
 /*
@@ -6824,13 +7502,13 @@
     /* Disable interrupts, if they aren't already disabled. */
     save_flags(flags);
     cli();
-#else /* version >= v2.1.95 */
+#elif LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
     /*
      * Disable interrupts, if they aren't already disabled and acquire
      * the I/O spinlock.
      */
     spin_lock_irqsave(&io_request_lock, flags);
-#endif /* version >= v2.1.95 */
+#endif /* version < v2.3.28 */
 
     ASC_DBG(1, "advansys_interrupt: begin\n");
 
@@ -6842,6 +7520,9 @@
         boardp = ASC_BOARDP(asc_host[i]);
         ASC_DBG2(2, "advansys_interrupt: i %d, boardp %lx\n",
             i, (ulong) boardp)            
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(2,3,28)
+        spin_lock_irqsave(&boardp->lock, flags);
+#endif /* version >= v2.3.28 */
         if (ASC_NARROW_BOARD(boardp)) {
             /*
              * Narrow Board
@@ -6898,6 +7579,9 @@
                 }
             }
         }
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(2,3,28)
+        spin_unlock_irqrestore(&boardp->lock, flags);
+#endif /* version >= v2.3.28 */
     }
 
     /* Interrupts could be enabled here. */
@@ -6916,14 +7600,14 @@
      * if and only if they were enabled on entry.
      */
     restore_flags(flags);
-#else /* version >= v2.1.95 */
+#elif LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
     /*
      * Release the I/O spinlock and restore the original flags
      * which will enable interrupts if and only if they were
      * enabled on entry.
      */
     spin_unlock_irqrestore(&io_request_lock, flags);
-#endif /* version >= v2.1.95 */
+#endif /* version < v2.3.28 */
 
     ASC_DBG(1, "advansys_interrupt: end\n");
     return;
@@ -6964,6 +7648,7 @@
 }
 #endif /* version >= v1.3.89 */
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 /*
  * Function used only with polled I/O requests that are initiated by
  * advansys_command().
@@ -6974,6 +7659,7 @@
     ASC_DBG1(1, "advansys_command_done: scp %lx\n", (ulong) scp);
     scp->SCp.Status = 1;
 }
+#endif /* version < v2.3.28 */
 
 /*
  * Complete all requests on the singly linked list pointed
@@ -7053,7 +7739,7 @@
     Scsi_Device        *device;
     int                ret;
 
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     ASC_DBG2(1, "asc_execute_scsi_cmnd: scp %lx, done %lx\n",
         (ulong) scp, (ulong) scp->scsi_done);
 
@@ -7182,7 +7868,7 @@
     }
 
     ASC_DBG(1, "asc_execute_scsi_cmnd: end\n");
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     return ret;
 }
 
@@ -7210,6 +7896,9 @@
 
     /*
      * Build the ASC_SCSI_Q request.
+     *
+     * For narrow boards a CDB length maximum of 12 bytes
+     * is supported.
      */
     ASC_ASSERT(scp->cmd_len <= ASC_MAX_CDB_LEN);
     if (scp->cmd_len > ASC_MAX_CDB_LEN) {
@@ -7354,7 +8043,7 @@
     /*
      * Get 4-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers.
      */
-    scsiqp = (ADV_SCSI_REQ_Q *) ADV_DWALIGN(&reqp->scsi_req_q);
+    scsiqp = (ADV_SCSI_REQ_Q *) ADV_8BALIGN(&reqp->scsi_req_q);
 
     /*
      * Initialize the structure.
@@ -7377,15 +8066,22 @@
 
     /*
      * Set CDB length and copy it to the request structure.
+     * For wide  boards a CDB length maximum of 16 bytes
+     * is supported.
      */
-    ASC_ASSERT(scp->cmd_len <= ASC_MAX_CDB_LEN);
-    if (scp->cmd_len > ASC_MAX_CDB_LEN) {
-        scp->cmd_len = ASC_MAX_CDB_LEN;
+    ASC_ASSERT(scp->cmd_len <= ADV_MAX_CDB_LEN);
+    if (scp->cmd_len > ADV_MAX_CDB_LEN) {
+        scp->cmd_len = ADV_MAX_CDB_LEN;
     }
     scsiqp->cdb_len = scp->cmd_len;
-    for (i = 0; i < scp->cmd_len; i++) {
+    /* Copy first 12 CDB bytes to cdb[]. */
+    for (i = 0; i < scp->cmd_len && i < 12; i++) {
         scsiqp->cdb[i] = scp->cmnd[i];
     }
+    /* Copy last 4 CDB bytes, if present, to cdb16[]. */
+    for (; i < scp->cmd_len; i++) {
+        scsiqp->cdb16[i - 12] = scp->cmnd[i];
+    }
 
     scsiqp->target_id = scp->target;
     scsiqp->target_lun = scp->lun;
@@ -7486,7 +8182,7 @@
     ADV_PADDR           sg_block_paddr;
     int                 i;
 
-    scsiqp = (ADV_SCSI_REQ_Q *) ADV_DWALIGN(&reqp->scsi_req_q);
+    scsiqp = (ADV_SCSI_REQ_Q *) ADV_8BALIGN(&reqp->scsi_req_q);
     slp = (struct scatterlist *) scp->request_buffer;
     sg_elem_cnt = scp->use_sg;
     prev_sg_block = NULL;
@@ -7523,10 +8219,10 @@
             sgblkp->next_sgblkp = NULL;
 
             /*
-             * Get 4 byte aligned virtual and physical addresses for
+             * Get 8 byte aligned virtual and physical addresses for
              * the allocated ADV_SG_BLOCK structure.
              */
-            sg_block = (ADV_SG_BLOCK *) ADV_DWALIGN(&sgblkp->sg_block);
+            sg_block = (ADV_SG_BLOCK *) ADV_8BALIGN(&sgblkp->sg_block);
             sg_block_paddr =
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,0,0)
                 (ADV_PADDR) sg_block;
@@ -7602,7 +8298,7 @@
     struct Scsi_Host    *shp;
     int                 i;
 
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     ASC_DBG2(1, "asc_isr_callback: asc_dvc_varp %lx, qdonep %lx\n",
         (ulong) asc_dvc_varp, (ulong) qdonep);
     ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep);
@@ -7773,7 +8469,7 @@
     struct Scsi_Host    *shp;
     int                 i;
 
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     ASC_DBG2(1, "adv_isr_callback: adv_dvc_varp %lx, scsiqp %lx\n",
         (ulong) adv_dvc_varp, (ulong) scsiqp);
     ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp);
@@ -7863,10 +8559,10 @@
          * then return the number of underrun bytes.
          */
         if (scp->request_bufflen != 0 && scsiqp->data_cnt != 0 &&
-            scsiqp->data_cnt <= scp->request_bufflen) {
+            le32_to_cpu(scsiqp->data_cnt) <= scp->request_bufflen) {
             ASC_DBG1(1, "adv_isr_callback: underrun condition %lu bytes\n",
-            (ulong) scsiqp->data_cnt);
-            scp->resid = scsiqp->data_cnt;
+            (ulong) le32_to_cpu(scsiqp->data_cnt));
+            scp->resid = le32_to_cpu(scsiqp->data_cnt);
         }
 #endif /* version >= v2.3.19 */
         break;
@@ -8422,7 +9118,7 @@
 
     ASC_DBG3(3, "asc_enqueue: ascq %lx, reqp %lx, flag %d\n",
         (ulong) ascq, (ulong) reqp, flag);
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     ASC_ASSERT(reqp != NULL);
     ASC_ASSERT(flag == ASC_FRONT || flag == ASC_BACK);
     tid = REQPTID(reqp);
@@ -8475,7 +9171,7 @@
     REQP    reqp;
 
     ASC_DBG2(3, "asc_dequeue: ascq %lx, tid %d\n", (ulong) ascq, tid);
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID);
     if ((reqp = ascq->q_first[tid]) != NULL) {
         ASC_ASSERT(ascq->q_tidmask & ADV_TID_TO_TIDMASK(tid));
@@ -8524,7 +9220,7 @@
     int     i;
 
     ASC_DBG2(3, "asc_dequeue_list: ascq %lx, tid %d\n", (ulong) ascq, tid);
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     ASC_ASSERT((tid == ASC_TID_ALL) || (tid >= 0 && tid <= ADV_MAX_TID));
 
     /*
@@ -8607,7 +9303,7 @@
 
     ASC_DBG2(3, "asc_rmqueue: ascq %lx, reqp %lx\n",
         (ulong) ascq, (ulong) reqp);
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     ASC_ASSERT(reqp != NULL);
 
     tid = REQPTID(reqp);
@@ -8662,6 +9358,7 @@
     return ret;
 }
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 /*
  * If the specified 'REQP' is queued on the specified queue for
  * the specified target device, return ASC_TRUE.
@@ -8675,7 +9372,7 @@
 
     ASC_DBG2(3, "asc_isqueued: ascq %lx, reqp %lx\n",
         (ulong) ascq, (ulong) reqp);
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     ASC_ASSERT(reqp != NULL);
 
     tid = REQPTID(reqp);
@@ -8691,6 +9388,7 @@
     ASC_DBG1(3, "asc_isqueued: ret %x\n", ret);
     return ret;
 }
+#endif /* version < v2.3.28 */
 
 /*
  * Execute as many queued requests as possible for the specified queue.
@@ -8705,7 +9403,7 @@
     int                     i;
 
     ASC_DBG1(1, "asc_execute_queue: ascq %lx\n", (ulong) ascq);
-    ASC_ASSERT(interrupts_enabled() == ASC_FALSE);
+    ASC_ASSERT(advansys_interrupts_enabled() == ASC_FALSE);
     /*
      * Execute queued commands for devices attached to
      * the current board in round-robin fashion.
@@ -8729,6 +9427,7 @@
 }
 
 #if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,0)
+#ifdef CONFIG_PROC_FS
 /*
  * asc_prt_board_devices()
  *
@@ -8958,7 +9657,9 @@
     int                len;
     ASCEEP_CONFIG      *ep;
     int                i;
+#ifdef CONFIG_ISA
     int                isa_dma_speed[] = { 10, 8, 7, 6, 5, 4, 3, 2 };
+#endif /* CONFIG_ISA */
     uchar              serialstr[13];
 
     boardp = ASC_BOARDP(shp);
@@ -8990,7 +9691,7 @@
 
     len = asc_prt_line(cp, leftlen,
 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
-        ep->chip_scsi_id, ep->max_total_qng, ep->max_tag_qng);
+        ASC_EEP_GET_CHIP_ID(ep), ep->max_total_qng, ep->max_tag_qng);
     ASC_PRT_NEXT();
 
     len = asc_prt_line(cp, leftlen,
@@ -9052,12 +9753,14 @@
     len = asc_prt_line(cp, leftlen, "\n");
     ASC_PRT_NEXT();
 
+#ifdef CONFIG_ISA
     if (asc_dvc_varp->bus_type & ASC_IS_ISA) {
         len = asc_prt_line(cp, leftlen,
 " Host ISA DMA speed:   %d MB/S\n",
-            isa_dma_speed[ep->isa_dma_speed]);
+            isa_dma_speed[ASC_EEP_GET_DMA_SPD(ep)]);
         ASC_PRT_NEXT();
     }
+#endif /* CONFIG_ISA */
 
      return totlen;
 }
@@ -9086,6 +9789,7 @@
     uchar                       serialstr[13];
     ADVEEP_3550_CONFIG          *ep_3550 = NULL;
     ADVEEP_38C0800_CONFIG       *ep_38C0800 = NULL;
+    ADVEEP_38C1600_CONFIG       *ep_38C1600 = NULL;
     ushort                      word;
     ushort                      *wordp;
     ushort                      sdtr_speed = 0;
@@ -9095,9 +9799,12 @@
     if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550)
     {
         ep_3550 = &boardp->eep_config.adv_3550_eep;
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         ep_38C0800 = &boardp->eep_config.adv_38C0800_eep;
+    } else
+    {
+        ep_38C1600 = &boardp->eep_config.adv_38C1600_eep;
     }
 
     leftlen = cplen;
@@ -9110,9 +9817,12 @@
     if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550)
     {
         wordp = &ep_3550->serial_number_word1;
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         wordp = &ep_38C0800->serial_number_word1;
+    } else
+    {
+        wordp = &ep_38C1600->serial_number_word1;
     }
 
     if (asc_get_eeprom_string(wordp, serialstr) == ASC_TRUE) {
@@ -9131,20 +9841,30 @@
             ep_3550->adapter_scsi_id, ep_3550->max_host_qng,
             ep_3550->max_dvc_qng);
         ASC_PRT_NEXT();
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         len = asc_prt_line(cp, leftlen,
 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
             ep_38C0800->adapter_scsi_id, ep_38C0800->max_host_qng,
             ep_38C0800->max_dvc_qng);
         ASC_PRT_NEXT();
+    } else
+    {
+        len = asc_prt_line(cp, leftlen,
+" Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
+            ep_38C1600->adapter_scsi_id, ep_38C1600->max_host_qng,
+            ep_38C1600->max_dvc_qng);
+        ASC_PRT_NEXT();
     }
     if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550)
     {
         word = ep_3550->termination;
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         word = ep_38C0800->termination_lvd;
+    } else
+    {
+        word = ep_38C1600->termination_lvd;
     }
     switch (word) {
         case 1:
@@ -9168,12 +9888,18 @@
 " termination: %u (%s), bios_ctrl: %x\n",
             ep_3550->termination, termstr, ep_3550->bios_ctrl);
         ASC_PRT_NEXT();
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         len = asc_prt_line(cp, leftlen,
 " termination: %u (%s), bios_ctrl: %x\n",
             ep_38C0800->termination_lvd, termstr, ep_38C0800->bios_ctrl);
         ASC_PRT_NEXT();
+    } else
+    {
+        len = asc_prt_line(cp, leftlen,
+" termination: %u (%s), bios_ctrl: %x\n",
+            ep_38C1600->termination_lvd, termstr, ep_38C1600->bios_ctrl);
+        ASC_PRT_NEXT();
     }
 
     len = asc_prt_line(cp, leftlen,
@@ -9189,9 +9915,12 @@
     if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550)
     {
         word = ep_3550->disc_enable;
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         word = ep_38C0800->disc_enable;
+    } else
+    {
+        word = ep_38C1600->disc_enable;
     }
     len = asc_prt_line(cp, leftlen,
 " Disconnects:         ");
@@ -9207,9 +9936,12 @@
     if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550)
     {
         word = ep_3550->tagqng_able;
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         word = ep_38C0800->tagqng_able;
+    } else
+    {
+        word = ep_38C1600->tagqng_able;
     }
     len = asc_prt_line(cp, leftlen,
 " Command Queuing:     ");
@@ -9225,9 +9957,12 @@
     if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550)
     {
         word = ep_3550->start_motor;
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         word = ep_38C0800->start_motor;
+    } else
+    {
+        word = ep_38C1600->start_motor;
     }
     len = asc_prt_line(cp, leftlen,
 " Start Motor:         ");
@@ -9271,9 +10006,12 @@
     if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550)
     {
         word = ep_3550->wdtr_able;
-    } else
+    } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
     {
         word = ep_38C0800->wdtr_able;
+    } else
+    {
+        word = ep_38C1600->wdtr_able;
     }
     len = asc_prt_line(cp, leftlen,
 " Wide Transfer:       ");
@@ -9286,7 +10024,8 @@
     len = asc_prt_line(cp, leftlen, "\n");
     ASC_PRT_NEXT();
 
-    if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800)
+    if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800 ||
+        adv_dvc_varp->chip_type == ADV_CHIP_ASC38C1600)
     {
         len = asc_prt_line(cp, leftlen,
 " Synchronous Transfer Speed (Mhz):\n  ");
@@ -9922,6 +10661,7 @@
     va_end(args);
     return ret;
 }
+#endif /* CONFIG_PROC_FS */
 #endif /* version >= v1.3.0 */
 
 
@@ -10190,6 +10930,7 @@
         return(0);
     }
 
+#ifdef CONFIG_ISA
     if((bus_type & ASC_IS_EISA) != 0)
     {
         cfg_lsw = AscGetEisaChipCfg(iop_base);
@@ -10198,6 +10939,7 @@
                                 (cfg_lsw * ASC_BIOS_BANK_SIZE));
         return(bios_addr);
     }/* if */
+#endif /* CONFIG_ISA */
 
     cfg_lsw = AscGetChipCfgLsw(iop_base);
 
@@ -10323,6 +11065,7 @@
  */
 
 #ifdef ADVANSYS_STATS
+#ifdef CONFIG_PROC_FS
 /*
  * asc_prt_board_stats()
  *
@@ -10339,11 +11082,7 @@
     int                    totlen;
     int                    len;
     struct asc_stats       *s;
-    int                    i;
-    ushort                 chip_scsi_id;
     asc_board_t            *boardp;
-    asc_queue_t            *active;
-    asc_queue_t            *waiting;
 
     leftlen = cplen;
     totlen = len = 0;
@@ -10355,9 +11094,15 @@
 "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n", shp->host_no);
     ASC_PRT_NEXT();
     
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
     len = asc_prt_line(cp, leftlen,
 " command %lu, queuecommand %lu, abort %lu, reset %lu, biosparam %lu\n",
         s->command, s->queuecommand, s->abort, s->reset, s->biosparam);
+#else /* version >= v2.3.28 */
+    len = asc_prt_line(cp, leftlen,
+" queuecommand %lu, eh_bus_reset %lu, biosparam %lu\n",
+        s->queuecommand, s->eh_bus_reset, s->biosparam);
+#endif /* version >= v2.3.28 */
     ASC_PRT_NEXT();
 
     len = asc_prt_line(cp, leftlen,
@@ -10435,6 +11180,41 @@
 " Active and Waiting Request Queues (Time Unit: %d HZ):\n", HZ);
     ASC_PRT_NEXT();
 
+
+     return totlen;
+}
+
+
+/*
+ * asc_prt_target_stats()
+ *
+ * Note: no single line should be greater than ASC_PRTLINE_SIZE,
+ * cf. asc_prt_line().
+ *
+ * This is separated from asc_prt_board_stats because a full set
+ * of targets will overflow ASC_PRTBUF_SIZE.
+ *
+ * Return the number of characters copied into 'cp'. No more than
+ * 'cplen' characters will be copied to 'cp'.
+ */
+STATIC int
+asc_prt_target_stats(struct Scsi_Host *shp, int tgt_id, char *cp, int cplen)
+{
+    int                    leftlen;
+    int                    totlen;
+    int                    len;
+    struct asc_stats       *s;
+    ushort                 chip_scsi_id;
+    asc_board_t            *boardp;
+    asc_queue_t            *active;
+    asc_queue_t            *waiting;
+
+    leftlen = cplen;
+    totlen = len = 0;
+
+    boardp = ASC_BOARDP(shp);
+    s = &boardp->asc_stats;
+
     active = &ASC_BOARDP(shp)->active;
     waiting = &ASC_BOARDP(shp)->waiting;
 
@@ -10444,43 +11224,43 @@
         chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id;
     }
 
-    for (i = 0; i <= ADV_MAX_TID; i++) {
-
-        if ((chip_scsi_id == i) ||
-            ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
-            continue;
-        }
+    if ((chip_scsi_id == tgt_id) ||
+        ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(tgt_id)) == 0)) {
+        return 0;
+    }
 
-        if (active->q_tot_cnt[i] > 0 || waiting->q_tot_cnt[i] > 0) {
-            len = asc_prt_line(cp, leftlen, " target %d\n", i);
-            ASC_PRT_NEXT();
+    do {
+    	if (active->q_tot_cnt[tgt_id] > 0 || waiting->q_tot_cnt[tgt_id] > 0) {
+    	    len = asc_prt_line(cp, leftlen, " target %d\n", tgt_id);
+    	    ASC_PRT_NEXT();
 
-            len = asc_prt_line(cp, leftlen,
+    	    len = asc_prt_line(cp, leftlen,
 "   active: cnt [cur %d, max %d, tot %u], time [min %d, max %d, avg %lu.%01lu]\n",
-                active->q_cur_cnt[i], active->q_max_cnt[i],
-                active->q_tot_cnt[i],
-                active->q_min_tim[i], active->q_max_tim[i],
-                (active->q_tot_cnt[i] == 0) ? 0 :
-                (active->q_tot_tim[i]/active->q_tot_cnt[i]),
-                (active->q_tot_cnt[i] == 0) ? 0 :
-                ASC_TENTHS(active->q_tot_tim[i], active->q_tot_cnt[i]));
-            ASC_PRT_NEXT();
+    		active->q_cur_cnt[tgt_id], active->q_max_cnt[tgt_id],
+    		active->q_tot_cnt[tgt_id],
+    		active->q_min_tim[tgt_id], active->q_max_tim[tgt_id],
+    		(active->q_tot_cnt[tgt_id] == 0) ? 0 :
+    		(active->q_tot_tim[tgt_id]/active->q_tot_cnt[tgt_id]),
+    		(active->q_tot_cnt[tgt_id] == 0) ? 0 :
+    		ASC_TENTHS(active->q_tot_tim[tgt_id], active->q_tot_cnt[tgt_id]));
+    	    ASC_PRT_NEXT();
 
-            len = asc_prt_line(cp, leftlen,
+    	    len = asc_prt_line(cp, leftlen,
 "   waiting: cnt [cur %d, max %d, tot %u], time [min %u, max %u, avg %lu.%01lu]\n",
-                waiting->q_cur_cnt[i], waiting->q_max_cnt[i],
-                waiting->q_tot_cnt[i],
-                waiting->q_min_tim[i], waiting->q_max_tim[i],
-                (waiting->q_tot_cnt[i] == 0) ? 0 :
-                (waiting->q_tot_tim[i]/waiting->q_tot_cnt[i]),
-                (waiting->q_tot_cnt[i] == 0) ? 0 :
-                ASC_TENTHS(waiting->q_tot_tim[i], waiting->q_tot_cnt[i]));
-            ASC_PRT_NEXT();
+    		waiting->q_cur_cnt[tgt_id], waiting->q_max_cnt[tgt_id],
+    		waiting->q_tot_cnt[tgt_id],
+    		waiting->q_min_tim[tgt_id], waiting->q_max_tim[tgt_id],
+    		(waiting->q_tot_cnt[tgt_id] == 0) ? 0 :
+    		(waiting->q_tot_tim[tgt_id]/waiting->q_tot_cnt[tgt_id]),
+    		(waiting->q_tot_cnt[tgt_id] == 0) ? 0 :
+    		ASC_TENTHS(waiting->q_tot_tim[tgt_id], waiting->q_tot_cnt[tgt_id]));
+    	    ASC_PRT_NEXT();
         }
-    }
+    } while (0);
 
      return totlen;
 }
+#endif /* CONFIG_PROC_FS */
 #endif /* ADVANSYS_STATS */
 
 #ifdef ADVANSYS_DEBUG
@@ -10505,9 +11285,8 @@
         (ulong) s->host_queue, (ulong) s->hostt, (ulong) s->block);
 
     printk(
-" wish_block %d, base %lu, io_port %lu, n_io_port %u, irq %d,\n",
-        s->wish_block, (ulong) s->base, (ulong) s->io_port, s->n_io_port,
-        s->irq);
+" base %lu, io_port %lu, n_io_port %u, irq %d,\n",
+        (ulong) s->base, (ulong) s->io_port, s->n_io_port, s->irq);
 
     printk(
 " dma_channel %d, this_id %d, can_queue %d,\n",
@@ -10721,8 +11500,8 @@
 
     printk(
 "  isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%x\n",
-        (ulong) h->isr_callback, (unsigned) h->wdtr_able,
-        (unsigned) h->sdtr_able);
+        (ulong) h->isr_callback, (unsigned) h->sdtr_able,
+        (unsigned) h->wdtr_able);
 
     printk(
 "  start_motor 0x%x, scsi_reset_wait 0x%x, irq_no 0x%x,\n",
@@ -10792,23 +11571,24 @@
             q->target_id, q->target_lun, (ulong) q->srb_ptr, q->a_flag);
 
     printk("  cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n",
-            q->cntl, (ulong) q->data_addr, (ulong) q->vdata_addr);
+            q->cntl, (ulong)le32_to_cpu(q->data_addr), (ulong) q->vdata_addr);
 
     printk(
 "  data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
-            (ulong) q->data_cnt, (ulong) q->sense_addr, q->sense_len);
+            (ulong) le32_to_cpu(q->data_cnt), (ulong) le32_to_cpu(q->sense_addr),
+            q->sense_len);
 
     printk(
 "  cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n",
             q->cdb_len, q->done_status, q->host_status, q->scsi_status);
 
     printk(
-"  sg_working_ix %x, sg_working_data_cnt %lx, target_cmd %u\n",
-            q->sg_working_ix, (ulong) q->sg_working_data_cnt, q->target_cmd);
+"  sg_working_ix %x, target_cmd %u\n",
+            q->sg_working_ix, q->target_cmd);
 
     printk(
 "  scsiq_rptr %lx, sg_real_addr %lx, sg_list_ptr %lx\n",
-            (ulong) q->scsiq_rptr, (ulong) q->sg_real_addr,
+            (ulong) le32_to_cpu(q->scsiq_rptr), (ulong) le32_to_cpu(q->sg_real_addr),
             (ulong) q->sg_list_ptr);
 
     /* Display the request's ADV_SG_BLOCK structures. */
@@ -10847,7 +11627,7 @@
     printk(" ASC_SG_BLOCK at addr %lx (sgblockno %d)\n",
         (ulong) b, sgblockno);
     printk("  sg_cnt %u, sg_ptr %lx\n",
-        b->sg_cnt, (ulong) b->sg_ptr);
+        b->sg_cnt, (ulong) le32_to_cpu(b->sg_ptr));
     ASC_ASSERT(b->sg_cnt <= NO_OF_SG_PER_BLOCK);
     if (b->sg_ptr != 0)
     {
@@ -10919,12 +11699,12 @@
 
 #ifdef ADVANSYS_ASSERT
 /*
- * interrupts_enabled()
+ * advansys_interrupts_enabled()
  *
  * Return 1 if interrupts are enabled, otherwise return 0.
  */
 STATIC int
-interrupts_enabled(void)
+advansys_interrupts_enabled(void)
 {
     int flags;
 
@@ -11090,13 +11870,15 @@
     return (0);
 }
 
-STATIC uchar _isa_pnp_inited ASC_INITDATA = 0;
 STATIC PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] ASC_INITDATA =
 {
     0x100, ASC_IOADR_1, 0x120, ASC_IOADR_2, 0x140, ASC_IOADR_3, ASC_IOADR_4,
     ASC_IOADR_5, ASC_IOADR_6, ASC_IOADR_7, ASC_IOADR_8
 };
 
+#ifdef CONFIG_ISA
+STATIC uchar _isa_pnp_inited ASC_INITDATA = 0;
+
 ASC_INITFUNC(
 STATIC PortAddr,
 AscSearchIOPortAddr(
@@ -11167,24 +11949,25 @@
 
 ASC_INITFUNC(
 STATIC void,
-AscToggleIRQAct(
-                   PortAddr iop_base
-)
+AscSetISAPNPWaitForKey(
+    void)
 )
 {
-    AscSetChipStatus(iop_base, CIW_IRQ_ACT);
-    AscSetChipStatus(iop_base, 0);
+    outp(ASC_ISA_PNP_PORT_ADDR, 0x02);
+    outp(ASC_ISA_PNP_PORT_WRITE, 0x02);
     return;
 }
+#endif /* CONFIG_ISA */
 
 ASC_INITFUNC(
 STATIC void,
-AscSetISAPNPWaitForKey(
-    void)
+AscToggleIRQAct(
+                   PortAddr iop_base
+)
 )
 {
-    outp(ASC_ISA_PNP_PORT_ADDR, 0x02);
-    outp(ASC_ISA_PNP_PORT_WRITE, 0x02);
+    AscSetChipStatus(iop_base, CIW_IRQ_ACT);
+    AscSetChipStatus(iop_base, 0);
     return;
 }
 
@@ -11265,6 +12048,7 @@
     return (0);
 }
 
+#ifdef CONFIG_ISA
 ASC_INITFUNC(
 STATIC void,
 AscEnableIsaDma(
@@ -11281,6 +12065,7 @@
     }
     return;
 }
+#endif /* CONFIG_ISA */
 
 STATIC int 
 AscIsrChipHalted(
@@ -12233,6 +13018,7 @@
 #if !CC_VERY_LONG_SG_LIST
         if (sg_entry_cnt > ASC_MAX_SG_LIST)
         {
+            asc_dvc->in_critical_cnt--;
             return(ERR);
         }
 #endif /* !CC_VERY_LONG_SG_LIST */
@@ -12277,7 +13063,7 @@
         scsiq->q2.tag_code |= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX |
                                ASC_TAG_FLAG_DISABLE_DISCONNECT);
     } else {
-        scsiq->q2.tag_code &= 0x23;
+        scsiq->q2.tag_code &= 0x27;
     }
     if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) {
         if (asc_dvc->bug_fix_cntl) {
@@ -12637,6 +13423,7 @@
     return (sta);
 }
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int
 AscAbortSRB(
                ASC_DVC_VAR *asc_dvc,
@@ -12665,8 +13452,10 @@
     asc_dvc->unit_not_ready = saved_unit_not_ready;
     return (sta);
 }
+#endif /* version < v2.3.28 */
 
-#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89)
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89) && \
+    LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int
 AscResetDevice(
                   ASC_DVC_VAR *asc_dvc,
@@ -12738,7 +13527,7 @@
     asc_dvc->unit_not_ready = saved_unit_not_ready;
     return (sta);
 }
-#endif /* version >= v1.3.89 */
+#endif /* version >= v1.3.89 && version <= v2.3.28 */
 
 STATIC int
 AscResetSB(
@@ -12940,7 +13729,8 @@
 }
 
 
-#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89)
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89) && \
+    LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int
 _AscWaitQDone(
                  PortAddr iop_base,
@@ -12962,7 +13752,7 @@
     } while ((q_status & QS_READY) != 0);
     return (1);
 }
-#endif /* version >= v1.3.89 */
+#endif /* version >= v1.3.89 && version < v2.3.28 */
 
 STATIC uchar 
 AscMsgOutSDTR(
@@ -13098,6 +13888,7 @@
     return (free_q_head);
 }
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int
 AscRiscHaltedAbortSRB(
                          ASC_DVC_VAR *asc_dvc,
@@ -13142,8 +13933,10 @@
     DvcLeaveCritical(last_int_level);
     return (0);
 }
+#endif /* version < v2.3.28 */
 
-#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89)
+#if LINUX_VERSION_CODE >= ASC_LINUX_VERSION(1,3,89) && \
+    LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int
 AscRiscHaltedAbortTIX(
                          ASC_DVC_VAR *asc_dvc,
@@ -13185,7 +13978,7 @@
     DvcLeaveCritical(last_int_level);
     return (1);
 }
-#endif /* version >= v1.3.89 */
+#endif /* version >= v1.3.89 && version < v2.3.28 */
 
 STATIC int
 AscHostReqRiscHalt(
@@ -13246,6 +14039,7 @@
     return (1);
 }
 
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 STATIC int
 AscCleanUpBusyQueue(
                        PortAddr iop_base
@@ -13291,6 +14085,7 @@
     return (1);
 }
 #endif /* version >= v1.3.89 */
+#endif /* version < v2.3.28 */
 
 STATIC int
 AscWaitTixISRDone(
@@ -13360,6 +14155,7 @@
     udelay((nano_sec + 999)/1000);
 }
 
+#ifdef CONFIG_ISA
 ASC_INITFUNC(
 STATIC ASC_DCNT,
 AscGetEisaProductID(
@@ -13418,6 +14214,7 @@
     }
     return (0);
 }
+#endif /* CONFIG_ISA */
 
 STATIC int
 AscStartChip(
@@ -13591,6 +14388,7 @@
     return (ASC_MAX_PCI_DMA_COUNT);
 }
 
+#ifdef CONFIG_ISA
 ASC_INITFUNC(
 STATIC ushort,
 AscGetIsaDmaChannel(
@@ -13662,6 +14460,7 @@
     AscSetBank(iop_base, 0);
     return (speed_value);
 }
+#endif /* CONFIG_ISA */
 
 ASC_INITFUNC(
 STATIC ushort,
@@ -13839,10 +14638,12 @@
         asc_dvc->cfg->chip_scsi_id) {
         asc_dvc->err_code |= ASC_IERR_SET_SCSI_ID;
     }
+#ifdef CONFIG_ISA
     if (asc_dvc->bus_type & ASC_IS_ISA) {
         AscSetIsaDmaChannel(iop_base, asc_dvc->cfg->isa_dma_channel);
         AscSetIsaDmaSpeed(iop_base, asc_dvc->cfg->isa_dma_speed);
     }
+#endif /* CONFIG_ISA */
     return (warn_code);
 }
 
@@ -13910,7 +14711,7 @@
     asc_dvc->bug_fix_cntl = 0;
     asc_dvc->pci_fix_asyn_xfer = 0;
     asc_dvc->pci_fix_asyn_xfer_always = 0;
-    asc_dvc->init_state = 0;
+    /* asc_dvc->init_state initalized in AscInitGetConfig(). */
     asc_dvc->sdtr_done = 0;
     asc_dvc->cur_total_qng = 0;
     asc_dvc->is_in_int = 0;
@@ -13986,9 +14787,11 @@
         AscSetChipIFC(iop_base, IFC_INIT_DEFAULT);
         asc_dvc->bus_type = ASC_IS_ISAPNP;
     }
+#ifdef CONFIG_ISA
     if ((asc_dvc->bus_type & ASC_IS_ISA) != 0) {
         asc_dvc->cfg->isa_dma_channel = (uchar) AscGetIsaDmaChannel(iop_base);
     }
+#endif /* CONFIG_ISA */
     for (i = 0; i <= ASC_MAX_TID; i++) {
         asc_dvc->cur_dvc_qng[i] = 0;
         asc_dvc->max_dvc_qng[i] = ASC_MAX_SCSI1_QNG;
@@ -14073,7 +14876,7 @@
                 eep_config->max_total_qng = 0xF0;
                 eep_config->max_tag_qng = 0x20;
                 eep_config->cntl = 0xBFFF;
-                eep_config->chip_scsi_id = 7;
+                ASC_EEP_SET_CHIP_ID(eep_config, 7);
                 eep_config->no_scam = 0;
                 eep_config->adapter_info[0] = 0;
                 eep_config->adapter_info[1] = 0;
@@ -14090,7 +14893,7 @@
     asc_dvc->cfg->sdtr_enable = eep_config->init_sdtr;
     asc_dvc->cfg->disc_enable = eep_config->disc_enable;
     asc_dvc->cfg->cmd_qng_enabled = eep_config->use_cmd_qng;
-    asc_dvc->cfg->isa_dma_speed = eep_config->isa_dma_speed;
+    asc_dvc->cfg->isa_dma_speed = ASC_EEP_GET_DMA_SPD(eep_config);
     asc_dvc->start_motor = eep_config->start_motor;
     asc_dvc->dvc_cntl = eep_config->cntl;
     asc_dvc->no_scam = eep_config->no_scam;
@@ -14134,8 +14937,8 @@
     if (asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL | ASC_IS_EISA)) {
         asc_dvc->irq_no = AscGetChipIRQ(iop_base, asc_dvc->bus_type);
     }
-    eep_config->chip_scsi_id &= ASC_MAX_TID;
-    asc_dvc->cfg->chip_scsi_id = eep_config->chip_scsi_id;
+    ASC_EEP_SET_CHIP_ID(eep_config, ASC_EEP_GET_CHIP_ID(eep_config) & ASC_MAX_TID);
+    asc_dvc->cfg->chip_scsi_id = ASC_EEP_GET_CHIP_ID(eep_config);
     if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) &&
         !(asc_dvc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) {
         asc_dvc->host_init_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX;
@@ -14185,7 +14988,7 @@
         asc_dvc->err_code |= ASC_IERR_GET_PHY_ADDR;
     } else {
         /* Align on an 8 byte boundary. */
-        phy_addr = cpu_to_le32((phy_addr + 7) & ~0x7);
+      phy_addr = /*cpu_to_le32*/((phy_addr + 7) & ~0x7);
         AscWriteLramDWord(iop_base, ASCV_OVERRUN_PADDR_D, phy_addr);
         AscWriteLramDWord(iop_base, ASCV_OVERRUN_BSIZE_D,
                           ASC_OVERRUN_BSIZE - 8);
@@ -14364,18 +15167,24 @@
     ushort              wval;
     ushort              sum;
     ushort              *wbuf;
+    ushort              *charfields;
     int                 cfg_beg;
     int                 cfg_end;
     int                 s_addr;
     int                 isa_pnp_wsize;
 
     wbuf = (ushort *) cfg_buf;
+    charfields = (ushort *) &ASCEEP_Config_Field_IsChar;
     sum = 0;
     isa_pnp_wsize = 0;
     for (s_addr = 0; s_addr < (2 + isa_pnp_wsize); s_addr++, wbuf++) {
         wval = AscReadEEPWord(iop_base, (uchar) s_addr);
         sum += wval;
-        *wbuf = wval;
+	/* Swap to native as needed */
+	if (*charfields++)
+	  *wbuf = cpu_to_le16(wval);
+	else
+	  *wbuf = wval;
     }
     if (bus_type & ASC_IS_VL) {
         cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
@@ -14389,8 +15198,15 @@
         wval = AscReadEEPWord(iop_base, (uchar) s_addr);
         sum += wval;
         *wbuf = wval;
+	/* Swap to native as needed */
+	if (*charfields++)
+	  *wbuf = cpu_to_le16(wval);
+	else
+	  *wbuf = wval;
     }
     *wbuf = AscReadEEPWord(iop_base, (uchar) s_addr);
+    if (charfields)
+	*wbuf = cpu_to_le16(*wbuf);
     return (sum);
 }
 
@@ -14774,676 +15590,1035 @@
  */
 
 /* a_mcode.h */
+
 STATIC unsigned char _adv_asc3550_buf[] = {
-  0x00,  0x00,  0x00,  0xf2,  0x00,  0xf0,  0x00,  0x16,  0x00,  0xfc,  0x48,  0xe4,  0x01,  0x00,  0x18,  0xe4,
-  0x00,  0xf6,  0x01,  0xf6,  0x18,  0x80,  0x48,  0x19,  0x02,  0x00,  0xff,  0xff,  0x03,  0xf6,  0x00,  0xfa,
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+  0xba,  0x12,  0x1e,  0xfe,  0xa8,  0x12,  0x5e,  0x2a,  0x01,  0x07,  0xfe,  0xd5,  0x10,  0x13,  0x6c,  0xff,
+  0x02,  0x00,  0x57,  0x49,  0x8c,  0x1c,  0xfe,  0xff,  0x7f,  0xfe,  0x30,  0x56,  0xfe,  0x00,  0x5c,  0x03,
+  0x13,  0x6c,  0xff,  0x02,  0x00,  0x57,  0x49,  0x8c,  0x1c,  0x40,  0xfe,  0x30,  0x56,  0xfe,  0x00,  0x5c,
+  0x03,  0x13,  0x6c,  0xff,  0x02,  0x00,  0x57,  0x49,  0x8c,  0x03,  0x13,  0x6c,  0xff,  0x02,  0x00,  0x57,
+  0x49,  0x8c,  0xfe,  0x0b,  0x58,  0x03,  0x08,  0x51,  0x01,  0x82,  0x08,  0x42,  0x01,  0x82,  0x03,  0xf9,
+  0x1c,  0x10,  0xff,  0x03,  0x00,  0x54,  0xfe,  0x00,  0xf4,  0x17,  0x49,  0xfe,  0x00,  0x7d,  0xfe,  0x01,
+  0x7d,  0xfe,  0x02,  0x7d,  0xfe,  0x03,  0x7c,  0x63,  0x26,  0x0c,  0x53,  0x19,  0x54,  0xbc,  0x57,  0xbd,
+  0x58,  0x03,  0xfe,  0x62,  0x08,  0xfe,  0x82,  0x4a,  0xfe,  0xe1,  0x1a,  0xfe,  0x83,  0x5a,  0x73,  0x03,
+  0x01,  0xfe,  0xee,  0x17,  0xfe,  0x42,  0x48,  0x60,  0x61,  0x8b,  0x01,  0x07,  0x1e,  0xfe,  0x80,  0x14,
+  0x31,  0x2f,  0xd6,  0x01,  0x07,  0x1e,  0xfe,  0x80,  0x14,  0x31,  0x2f,  0xfe,  0xe8,  0x0a,  0xfe,  0xc1,
+  0x59,  0x04,  0xc4,  0x27,  0xfe,  0xcc,  0x12,  0x4a,  0x09,  0x1b,  0xfe,  0xc4,  0x13,  0x22,  0x62,  0x1b,
+  0x5d,  0x4c,  0xc1,  0x64,  0xfe,  0xc6,  0x13,  0x3f,  0x13,  0x05,  0x16,  0xc1,  0x78,  0x2e,  0xfe,  0x78,
+  0x10,  0xff,  0x02,  0x83,  0x55,  0x34,  0xff,  0x02,  0x83,  0x55,  0x62,  0x1a,  0xa3,  0xb9,  0xfe,  0x30,
+  0x00,  0x8f,  0xe0,  0x16,  0x2b,  0x13,  0x05,  0xfe,  0x56,  0x10,  0x62,  0x0a,  0xdf,  0xb9,  0xfe,  0x64,
+  0x00,  0x8f,  0xe0,  0x08,  0xfe,  0x64,  0x00,  0x16,  0x94,  0x13,  0x05,  0xfe,  0x28,  0x10,  0x62,  0x05,
+  0x87,  0xb9,  0xfe,  0xc8,  0x00,  0x8f,  0xe0,  0x08,  0xfe,  0xc8,  0x00,  0x16,  0x4e,  0x13,  0x05,  0x35,
+  0xb9,  0xfe,  0x90,  0x01,  0xb8,  0xfe,  0x2c,  0x14,  0x8b,  0xfe,  0x12,  0x10,  0xfe,  0x43,  0xf4,  0x95,
+  0xfe,  0x56,  0xf0,  0xfe,  0x3e,  0x14,  0xfe,  0x04,  0xf4,  0x6c,  0xfe,  0x43,  0xf4,  0x94,  0xfe,  0xf3,
+  0x10,  0xf6,  0x01,  0xfe,  0x00,  0x13,  0x1c,  0x40,  0xfe,  0x10,  0x13,  0xfe,  0x00,  0x17,  0xfe,  0x4d,
+  0xe4,  0x69,  0xb8,  0xfe,  0x7a,  0x14,  0xb5,  0x69,  0xfe,  0x1c,  0x10,  0xfe,  0x00,  0x17,  0xfe,  0x4d,
+  0xe4,  0x17,  0xb8,  0xfe,  0x7a,  0x14,  0xb5,  0x17,  0x35,  0x61,  0x22,  0xfe,  0x4d,  0xf4,  0x00,  0xde,
+  0x8b,  0x13,  0x05,  0xfe,  0xb4,  0x56,  0xfe,  0xc3,  0x58,  0x03,  0x61,  0x13,  0x0a,  0x03,  0x15,  0x05,
+  0x01,  0x07,  0x25,  0xe1,  0x15,  0x0a,  0x01,  0x07,  0x25,  0xe1,  0x15,  0x1a,  0x01,  0x07,  0x25,  0xe1,
+  0x71,  0xfe,  0x89,  0x49,  0x01,  0x07,  0x03,  0x15,  0x05,  0x01,  0x07,  0x25,  0x88,  0x15,  0x1a,  0x01,
+  0x07,  0x25,  0x88,  0x15,  0x05,  0x01,  0x07,  0x25,  0x88,  0xfe,  0x89,  0x49,  0x01,  0x07,  0x25,  0x88,
+  0x71,  0xfe,  0x89,  0x4a,  0x01,  0x07,  0x03,  0x61,  0x03,  0x1d,  0xca,  0x06,  0x05,  0xfe,  0x44,  0x13,
+  0xaa,  0x12,  0xca,  0xfe,  0x49,  0xf4,  0x00,  0x3f,  0x71,  0xa0,  0x5e,  0xfe,  0x01,  0xec,  0xfe,  0x27,
+  0x01,  0xee,  0x01,  0x07,  0x30,  0x06,  0xfe,  0xe3,  0x00,  0xfe,  0x20,  0x13,  0x1e,  0xfe,  0x38,  0x15,
+  0x22,  0x12,  0xcb,  0x01,  0x45,  0x1d,  0xcb,  0x06,  0x05,  0x5c,  0x0b,  0x4b,  0x05,  0x38,  0x03,  0x08,
+  0x44,  0x01,  0x0e,  0xea,  0x8a,  0x06,  0x10,  0xa3,  0x08,  0x80,  0x01,  0x0e,  0x8a,  0x08,  0x52,  0x01,
+  0x9f,  0x03,  0x08,  0x80,  0x01,  0x0e,  0x8a,  0xfe,  0x80,  0xe7,  0x10,  0x06,  0x10,  0x83,  0xfe,  0x45,
+  0x58,  0x01,  0x87,  0x8a,  0x03,  0x08,  0x44,  0x01,  0x0e,  0x8a,  0x08,  0x52,  0x01,  0x9f,  0x03,  0x08,
+  0x44,  0x01,  0x0e,  0xfe,  0x80,  0x80,  0xef,  0xfe,  0x49,  0xe4,  0x10,  0xa3,  0x08,  0x80,  0x01,  0x0e,
+  0xef,  0x08,  0x52,  0x01,  0x82,  0x03,  0x16,  0x10,  0x70,  0x66,  0xfe,  0x60,  0x01,  0xfe,  0x18,  0xdf,
+  0xfe,  0x19,  0xde,  0xfe,  0x24,  0x1c,  0xfe,  0x1d,  0xf7,  0x2c,  0x91,  0xfe,  0xd4,  0x15,  0x01,  0xfe,
+  0xda,  0x16,  0xfe,  0x0c,  0x13,  0x92,  0x2c,  0x66,  0xfe,  0x2c,  0x01,  0xfe,  0x2f,  0x19,  0x03,  0xab,
+  0x20,  0xfe,  0xc4,  0x15,  0xfe,  0xda,  0x10,  0x16,  0x10,  0x70,  0x04,  0xfe,  0x64,  0x01,  0xfe,  0x00,
+  0xf4,  0x17,  0xfe,  0x18,  0x58,  0x04,  0xfe,  0x66,  0x01,  0xfe,  0x19,  0x58,  0x92,  0x17,  0xfe,  0x3c,
+  0x90,  0xfe,  0x30,  0xf4,  0x05,  0xfe,  0x3c,  0x50,  0x66,  0xfe,  0x38,  0x00,  0xfe,  0x0f,  0x79,  0xfe,
+  0x1c,  0xf7,  0x17,  0x91,  0xfe,  0x1e,  0x16,  0xe2,  0x37,  0x03,  0xab,  0x20,  0xfe,  0xf6,  0x15,  0xfe,
+  0x9c,  0x10,  0x16,  0x10,  0x70,  0xfe,  0x83,  0x5a,  0xfe,  0x18,  0xdf,  0xfe,  0x19,  0xde,  0xfe,  0x1d,
+  0xf7,  0x3b,  0x91,  0xfe,  0x40,  0x16,  0xfe,  0x94,  0x14,  0xfe,  0x10,  0x13,  0x92,  0x3b,  0x66,  0x1b,
+  0xfe,  0xaf,  0x19,  0xfe,  0x98,  0xe7,  0x00,  0x03,  0xab,  0x20,  0xfe,  0x34,  0x16,  0xfe,  0x6c,  0x10,
+  0x16,  0x10,  0x70,  0xfe,  0x30,  0xbc,  0xfe,  0xb2,  0xbc,  0x92,  0xc3,  0x66,  0x1b,  0xfe,  0x0f,  0x79,
+  0xfe,  0x1c,  0xf7,  0xc3,  0x91,  0xfe,  0x78,  0x16,  0xfe,  0x5c,  0x14,  0x37,  0x03,  0xab,  0x20,  0xfe,
+  0x64,  0x16,  0xfe,  0x42,  0x10,  0xfe,  0x02,  0xf6,  0x10,  0x70,  0xfe,  0x18,  0xfe,  0x55,  0xfe,  0x19,
+  0xfe,  0x56,  0xf9,  0xfe,  0x1d,  0xf7,  0x50,  0x91,  0xfe,  0x9e,  0x16,  0xfe,  0x36,  0x14,  0xfe,  0x1c,
+  0x13,  0x92,  0x50,  0x47,  0xfe,  0x83,  0x58,  0xfe,  0xaf,  0x19,  0xfe,  0x80,  0xe7,  0x10,  0xfe,  0x81,
+  0xe7,  0x10,  0x11,  0xfe,  0xdd,  0x00,  0x63,  0x26,  0x03,  0x63,  0x26,  0xfe,  0x12,  0x45,  0x20,  0xfe,
+  0x8e,  0x16,  0x14,  0x05,  0x3a,  0x96,  0xa6,  0x02,  0x28,  0xfe,  0x39,  0xf0,  0xfe,  0xe2,  0x16,  0x22,
+  0x03,  0xfe,  0x7e,  0x18,  0x1c,  0x1a,  0x46,  0x13,  0x0d,  0x03,  0x70,  0x04,  0xc9,  0x1c,  0x05,  0xfe,
+  0xef,  0x12,  0xfe,  0xe1,  0x10,  0x78,  0x2b,  0x5f,  0x30,  0x06,  0x2d,  0xfe,  0x3c,  0x13,  0xfe,  0x7e,
+  0x14,  0xfe,  0x42,  0x13,  0x48,  0xb4,  0x08,  0x44,  0x01,  0x0e,  0xad,  0xfe,  0x3e,  0x12,  0xed,  0xfe,
+  0x45,  0x48,  0x01,  0x87,  0xfa,  0xad,  0xfe,  0xf3,  0x13,  0x40,  0x74,  0x06,  0x10,  0xa2,  0x08,  0x80,
+  0x01,  0x0e,  0xef,  0x01,  0x6e,  0xfe,  0x16,  0x10,  0x06,  0x7e,  0x84,  0xfe,  0x3c,  0x14,  0xfe,  0x24,
+  0x12,  0xf3,  0xfe,  0xd6,  0xf0,  0xfe,  0x02,  0x17,  0x16,  0x0a,  0x03,  0xfe,  0x9c,  0xe7,  0x0a,  0x0f,
+  0xfe,  0x15,  0x00,  0x5a,  0x76,  0x26,  0x01,  0xd8,  0x16,  0x05,  0x03,  0x0b,  0x4b,  0x2c,  0x38,  0x11,
+  0x2d,  0x01,  0x6e,  0x16,  0x05,  0x03,  0xfe,  0x38,  0x90,  0xfe,  0xba,  0x90,  0x79,  0xc5,  0x68,  0xc6,
+  0xfe,  0x48,  0x55,  0x37,  0xfe,  0xc9,  0x55,  0x03,  0x1d,  0x99,  0x72,  0x12,  0x99,  0x03,  0x08,  0x9a,
+  0x01,  0x0e,  0xed,  0x08,  0x3c,  0x01,  0x0e,  0xfe,  0x49,  0x44,  0x18,  0xfe,  0xca,  0x17,  0x72,  0x74,
+  0x03,  0x08,  0x44,  0x01,  0x0e,  0x06,  0x10,  0x5c,  0x08,  0x52,  0x01,  0x9f,  0x08,  0x3c,  0x01,  0x0e,
+  0x72,  0x74,  0x03,  0xfc,  0x1a,  0x64,  0xfe,  0xfe,  0x17,  0x04,  0xfe,  0x90,  0x00,  0xfe,  0x3a,  0x45,
+  0xfe,  0x2c,  0x10,  0xfc,  0xc0,  0x64,  0xfe,  0x10,  0x18,  0x04,  0xfe,  0x92,  0x00,  0xfe,  0x02,  0xe6,
+  0x1b,  0xdb,  0xfc,  0xfe,  0x0b,  0x00,  0x64,  0xfe,  0x22,  0x18,  0x04,  0xfe,  0x94,  0x00,  0xfe,  0x02,
+  0xe6,  0x17,  0xfe,  0x08,  0x10,  0x04,  0xfe,  0x96,  0x00,  0xfe,  0x02,  0xe6,  0x2b,  0xfe,  0x4e,  0x45,
+  0xfe,  0x0c,  0x12,  0xac,  0xff,  0x04,  0x68,  0x54,  0xdd,  0x1c,  0x69,  0x03,  0x06,  0x7a,  0xfe,  0x5a,
+  0xf0,  0xfe,  0x4e,  0x18,  0x23,  0xfe,  0x09,  0x00,  0xfe,  0x34,  0x10,  0x06,  0x1b,  0xfe,  0x5a,  0xf0,
+  0xfe,  0x5c,  0x18,  0x23,  0xc1,  0xfe,  0x26,  0x10,  0x06,  0x1a,  0x46,  0x23,  0x2b,  0xdb,  0x06,  0x0a,
+  0x46,  0x23,  0x94,  0xd9,  0x06,  0x05,  0x46,  0x23,  0x4e,  0xa0,  0xaa,  0x03,  0x14,  0xfe,  0x09,  0x00,
+  0x01,  0x36,  0xfe,  0x04,  0xfe,  0x7d,  0x04,  0x7f,  0xf6,  0x03,  0x24,  0xfe,  0xa4,  0x18,  0xfe,  0x14,
+  0xf0,  0x07,  0x65,  0xfe,  0xa0,  0x18,  0x03,  0xff,  0x2d,  0x00,  0x00,
 };
 
 STATIC unsigned short _adv_asc3550_size =
-    sizeof(_adv_asc3550_buf); /* 0x13E5 */
+    sizeof(_adv_asc3550_buf); /* 0x137B */
 STATIC ADV_DCNT _adv_asc3550_chksum =
-    0x04FFFF0E; /* Expanded checksum. */
+    0x04CDA9B9UL; /* Expanded little-endian checksum. */
 
 STATIC unsigned char _adv_asc38C0800_buf[] = {
-  0x00,  0x00,  0x00,  0xf2,  0x00,  0xf0,  0x00,  0x16,  0x00,  0xfc,  0x48,  0xe4,  0x01,  0x00,  0x18,  0xe4,
-  0x00,  0xf6,  0x01,  0xf6,  0x18,  0x80,  0x02,  0x00,  0x40,  0x1a,  0x00,  0xfa,  0xff,  0xff,  0x03,  0xf6,
-  0xff,  0x00,  0x82,  0xe7,  0x01,  0xfa,  0x9e,  0xe7,  0x09,  0xe7,  0x1a,  0x0f,  0x00,  0xea,  0x01,  0xe6,
-  0x03,  0x00,  0x55,  0xf0,  0x18,  0xf4,  0x1e,  0xf0,  0x3e,  0x57,  0x04,  0x00,  0x3e,  0x01,  0x85,  0xf0,
-  0x00,  0xe6,  0x03,  0xfc,  0x08,  0x00,  0x2c,  0x1a,  0x32,  0xf0,  0x86,  0xf0,  0xbe,  0x0d,  0xd4,  0x01,
-  0xd5,  0xf0,  0x00,  0xec,  0x01,  0xfc,  0x38,  0x54,  0x98,  0x57,  0xbc,  0x00,  0x0c,  0x1c,  0xb1,  0xf0,
-  0x3c,  0x00,  0xb4,  0x00,  0xb8,  0x0d,  0x00,  0x57,  0x01,  0xf0,  0x02,  0x13,  0x02,  0xfc,  0x03,  0xe6,
-  0x10,  0x00,  0x18,  0x40,  0x3e,  0x1c,  0x44,  0x13,  0x6c,  0x01,  0x6e,  0x01,  0xbd,  0x00,  0xe0,  0x00,
-  0x02,  0x80,  0x30,  0xe4,  0x3e,  0x00,  0x74,  0x01,  0x76,  0x01,  0x7c,  0x16,  0x80,  0x00,  0xb9,  0x54,
-  0xbb,  0x00,  0xee,  0x13,  0x00,  0x4e,  0x01,  0x01,  0x01,  0xea,  0x02,  0x48,  0x02,  0xfa,  0x04,  0x12,
-  0x08,  0x12,  0x3c,  0x56,  0x4e,  0x01,  0x5d,  0xf0,  0x7a,  0x01,  0x7e,  0x10,  0xb6,  0x00,  0xc2,  0x10,
-  0xee,  0x08,  0x00,  0x80,  0x05,  0xfc,  0x10,  0x44,  0x24,  0x01,  0x28,  0x01,  0x32,  0x00,  0x3c,  0x01,
-  0x40,  0x00,  0x4b,  0xe4,  0x4b,  0xf4,  0x4c,  0x1c,  0x68,  0x01,  0x6a,  0x01,  0x70,  0x01,  0x72,  0x01,
-  0x78,  0x01,  0x7c,  0x01,  0xbb,  0x55,  0xc2,  0x0d,  0x00,  0x01,  0x02,  0xee,  0x03,  0x58,  0x03,  0xf7,
-  0x03,  0xfa,  0x04,  0x80,  0x08,  0x44,  0x09,  0xf0,  0x0f,  0x00,  0x1b,  0x80,  0x20,  0x01,  0x38,  0x1c,
-  0x4e,  0x1c,  0x5b,  0xf0,  0x62,  0x0a,  0xaa,  0x00,  0xbe,  0x00,  0xc0,  0x00,  0xc0,  0x15,  0xcc,  0x10,
-  0x00,  0x4c,  0x00,  0xdc,  0x02,  0x4a,  0x04,  0xfc,  0x05,  0x00,  0x05,  0xf0,  0x05,  0xf8,  0x06,  0x13,
-  0x06,  0xf7,  0x08,  0x13,  0x0a,  0x10,  0x0c,  0x00,  0x0e,  0x47,  0x0e,  0xf7,  0x10,  0x0f,  0x20,  0x00,
-  0x20,  0x16,  0x2a,  0x01,  0x32,  0x1c,  0x36,  0x00,  0x42,  0x54,  0x44,  0x55,  0x45,  0x5a,  0x52,  0x0c,
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+  0x0c,  0x51,  0xfe,  0x8e,  0x51,  0x02,  0x71,  0xfe,  0x19,  0x81,  0xb8,  0xfe,  0x19,  0x41,  0x02,  0x71,
+  0x2c,  0x01,  0x0b,  0x1b,  0x34,  0x1c,  0xe8,  0x33,  0x31,  0xe0,  0x54,  0x18,  0xfe,  0xa6,  0x12,  0x54,
+  0x09,  0x4c,  0x02,  0x4b,  0x01,  0x0b,  0x1b,  0x34,  0x1c,  0xe8,  0x33,  0x31,  0xde,  0x06,  0x18,  0x22,
+  0x4b,  0x01,  0x0b,  0x1c,  0xe8,  0x33,  0x31,  0xfe,  0xe8,  0x09,  0xfe,  0xc2,  0x49,  0x4f,  0x03,  0xfe,
+  0x9c,  0x00,  0x27,  0x8b,  0x52,  0x08,  0x1e,  0x35,  0xa9,  0xfe,  0xbb,  0x45,  0x54,  0x00,  0x65,  0x44,
+  0x05,  0x7c,  0x43,  0xfe,  0xda,  0x14,  0x01,  0xad,  0x8d,  0xfe,  0x4b,  0x45,  0xf0,  0x32,  0x06,  0xa5,
+  0xef,  0x03,  0xcd,  0x27,  0x8b,  0x03,  0x45,  0x27,  0x35,  0x66,  0x02,  0x71,  0xfe,  0xc0,  0x5d,  0xfe,
+  0xf8,  0x14,  0xfe,  0x03,  0x17,  0x03,  0x5b,  0xbf,  0x0c,  0x5b,  0x66,  0x2c,  0x01,  0x0b,  0x25,  0x8a,
+  0x01,  0xfe,  0x7c,  0x15,  0x02,  0x8a,  0x01,  0x0b,  0x1b,  0x34,  0x1c,  0x4b,  0x33,  0x31,  0xde,  0x06,
+  0x05,  0x22,  0x4b,  0x01,  0xfe,  0x60,  0x14,  0xfe,  0x42,  0x58,  0xfe,  0x82,  0x14,  0xfe,  0xa4,  0x14,
+  0x8d,  0xfe,  0x4a,  0xf4,  0x09,  0x19,  0x4b,  0xfe,  0x4a,  0xf4,  0x05,  0xea,  0x32,  0x06,  0xa5,  0x8c,
+  0x02,  0x71,  0x03,  0x45,  0xbf,  0x0c,  0x45,  0x66,  0x2c,  0x01,  0x0b,  0x25,  0x8a,  0x01,  0xfe,  0xaa,
+  0x15,  0x02,  0x8a,  0x0f,  0x05,  0x26,  0xfe,  0x9c,  0x13,  0x25,  0xfe,  0xb2,  0x13,  0x75,  0xfe,  0x89,
+  0x48,  0x01,  0x0b,  0x20,  0x75,  0x04,  0x7b,  0xfe,  0xae,  0x13,  0x1b,  0xfe,  0xae,  0x13,  0x1c,  0xfe,
+  0x9c,  0x13,  0x66,  0x2c,  0x01,  0x0b,  0xfe,  0xd5,  0x10,  0x0f,  0x70,  0xff,  0x02,  0x00,  0x57,  0x51,
+  0x93,  0x1d,  0xfe,  0xff,  0x7f,  0xfe,  0x30,  0x56,  0xfe,  0x00,  0x5c,  0x04,  0x0f,  0x70,  0xff,  0x02,
+  0x00,  0x57,  0x51,  0x93,  0x1d,  0x43,  0xfe,  0x30,  0x56,  0xfe,  0x00,  0x5c,  0x04,  0x0f,  0x70,  0xff,
+  0x02,  0x00,  0x57,  0x51,  0x93,  0x04,  0x0f,  0x70,  0xff,  0x02,  0x00,  0x57,  0x51,  0x93,  0xfe,  0x0b,
+  0x58,  0x04,  0x07,  0x5b,  0x01,  0x87,  0x07,  0x45,  0x01,  0x87,  0x04,  0xfe,  0x03,  0xa1,  0x1d,  0x11,
+  0xff,  0x03,  0x00,  0x54,  0xfe,  0x00,  0xf4,  0x1e,  0x51,  0xfe,  0x00,  0x7d,  0xfe,  0x01,  0x7d,  0xfe,
+  0x02,  0x7d,  0xfe,  0x03,  0x7c,  0x69,  0x29,  0x0c,  0x5d,  0x17,  0x5e,  0x56,  0x40,  0x7d,  0x41,  0x04,
+  0xfe,  0x62,  0x08,  0xfe,  0x82,  0x4a,  0xfe,  0xe1,  0x1a,  0xfe,  0x83,  0x5a,  0x8e,  0x04,  0x01,  0xfe,
+  0xe6,  0x18,  0xfe,  0x42,  0x48,  0x4e,  0x4f,  0x92,  0x01,  0x0b,  0x1c,  0xfe,  0x74,  0x15,  0x33,  0x31,
+  0xe0,  0x01,  0x0b,  0x1c,  0xfe,  0x74,  0x15,  0x33,  0x31,  0xfe,  0xe8,  0x0a,  0xfe,  0xc1,  0x59,  0x03,
+  0xcd,  0x27,  0xfe,  0xcc,  0x12,  0x52,  0x08,  0x1a,  0xfe,  0xc4,  0x13,  0x20,  0x68,  0x1a,  0xf0,  0x54,
+  0xca,  0x6a,  0xfe,  0xba,  0x14,  0x4c,  0x0f,  0x05,  0x16,  0xca,  0x7c,  0x30,  0xfe,  0x78,  0x10,  0xff,
+  0x02,  0x83,  0x55,  0xaa,  0xff,  0x02,  0x83,  0x55,  0x68,  0x18,  0xac,  0x98,  0xfe,  0x30,  0x00,  0x96,
+  0xf3,  0x16,  0x6c,  0x0f,  0x05,  0xfe,  0x56,  0x10,  0x68,  0x09,  0xef,  0x98,  0xfe,  0x64,  0x00,  0x96,
+  0xf3,  0x07,  0xfe,  0x64,  0x00,  0x16,  0x9e,  0x0f,  0x05,  0xfe,  0x28,  0x10,  0x68,  0x05,  0xfe,  0x60,
+  0x13,  0x98,  0xfe,  0xc8,  0x00,  0x96,  0xf3,  0x07,  0xfe,  0xc8,  0x00,  0x16,  0x58,  0x0f,  0x05,  0x89,
+  0x98,  0xfe,  0x90,  0x01,  0x7a,  0xfe,  0x20,  0x15,  0x92,  0xfe,  0x12,  0x10,  0xfe,  0x43,  0xf4,  0x9f,
+  0xfe,  0x56,  0xf0,  0xfe,  0x32,  0x15,  0xfe,  0x04,  0xf4,  0x70,  0xfe,  0x43,  0xf4,  0x9e,  0xfe,  0xf3,
+  0x10,  0xfe,  0x40,  0x5c,  0x01,  0xfe,  0xf4,  0x13,  0x1d,  0x43,  0xee,  0xfe,  0x00,  0x17,  0xfe,  0x4d,
+  0xe4,  0x6d,  0x7a,  0xfe,  0x6e,  0x15,  0xc4,  0x6d,  0xfe,  0x1c,  0x10,  0xfe,  0x00,  0x17,  0xfe,  0x4d,
+  0xe4,  0xcc,  0x7a,  0xfe,  0x6e,  0x15,  0xc4,  0xcc,  0x89,  0x4f,  0x20,  0xfe,  0x4d,  0xf4,  0x00,  0xe9,
+  0x92,  0x0f,  0x05,  0xfe,  0xb4,  0x56,  0xfe,  0xc3,  0x58,  0x04,  0x4f,  0x0f,  0x09,  0x04,  0x15,  0x05,
+  0x01,  0x0b,  0x25,  0xf4,  0x15,  0x09,  0x01,  0x0b,  0x25,  0xf4,  0x15,  0x18,  0x01,  0x0b,  0x25,  0xf4,
+  0x75,  0xfe,  0x89,  0x49,  0x01,  0x0b,  0x04,  0x15,  0x05,  0x01,  0x0b,  0x25,  0xaf,  0x15,  0x18,  0x01,
+  0x0b,  0x25,  0xaf,  0x15,  0x05,  0x01,  0x0b,  0x25,  0xaf,  0xfe,  0x89,  0x49,  0x01,  0x0b,  0x25,  0xaf,
+  0x75,  0xfe,  0x89,  0x4a,  0x01,  0x0b,  0x04,  0x4f,  0x04,  0x21,  0xd3,  0x06,  0x05,  0xfe,  0x48,  0x13,
+  0xb6,  0x13,  0xd3,  0xfe,  0x49,  0xf4,  0x00,  0x4c,  0x75,  0xa9,  0x66,  0xfe,  0x01,  0xec,  0xfe,  0x27,
+  0x01,  0xfe,  0x89,  0x48,  0xff,  0x02,  0x00,  0x10,  0x26,  0xfe,  0x0c,  0x16,  0x32,  0x06,  0xfe,  0xe3,
+  0x00,  0xfe,  0x20,  0x13,  0x1c,  0xfe,  0x30,  0x16,  0x20,  0x13,  0xd4,  0x01,  0x4a,  0x21,  0xd4,  0x06,
+  0x05,  0x65,  0x0a,  0x53,  0x05,  0x37,  0x04,  0x07,  0x47,  0x01,  0x0e,  0xfe,  0x00,  0x40,  0x8f,  0x06,
+  0x11,  0xac,  0x07,  0x84,  0x01,  0x0e,  0x8f,  0x07,  0x5c,  0x01,  0xa8,  0x04,  0x07,  0x84,  0x01,  0x0e,
+  0x8f,  0xfe,  0x80,  0xe7,  0x11,  0x06,  0x11,  0x8b,  0xfe,  0x45,  0x58,  0x01,  0xf2,  0x8f,  0x04,  0x07,
+  0x47,  0x01,  0x0e,  0x8f,  0x07,  0x5c,  0x01,  0xa8,  0x04,  0x07,  0x47,  0x01,  0x0e,  0xfe,  0x80,  0x80,
+  0xfe,  0x80,  0x4c,  0xfe,  0x49,  0xe4,  0x11,  0xac,  0x07,  0x84,  0x01,  0x0e,  0xfe,  0x80,  0x4c,  0x07,
+  0x5c,  0x01,  0x87,  0x04,  0x16,  0x11,  0x74,  0x6b,  0xfe,  0x60,  0x01,  0xfe,  0x18,  0xdf,  0xfe,  0x19,
+  0xde,  0xfe,  0x24,  0x1c,  0xfe,  0x1d,  0xf7,  0x2d,  0x97,  0xfe,  0xcc,  0x16,  0x01,  0xfe,  0xd2,  0x17,
+  0xed,  0x9a,  0x2d,  0x6b,  0xfe,  0x2c,  0x01,  0xfe,  0x2f,  0x19,  0x04,  0xb7,  0x22,  0xfe,  0xbc,  0x16,
+  0xfe,  0xda,  0x10,  0x16,  0x11,  0x74,  0x03,  0xfe,  0x64,  0x01,  0xfe,  0x00,  0xf4,  0x1e,  0xfe,  0x18,
+  0x58,  0x03,  0xfe,  0x66,  0x01,  0xfe,  0x19,  0x58,  0x9a,  0x1e,  0xfe,  0x3c,  0x90,  0xfe,  0x30,  0xf4,
+  0x05,  0xfe,  0x3c,  0x50,  0x6b,  0xfe,  0x38,  0x00,  0xfe,  0x0f,  0x79,  0xfe,  0x1c,  0xf7,  0x1e,  0x97,
+  0xfe,  0x16,  0x17,  0xfe,  0xb6,  0x14,  0x35,  0x04,  0xb7,  0x22,  0xfe,  0xee,  0x16,  0xfe,  0x9c,  0x10,
+  0x16,  0x11,  0x74,  0xfe,  0x83,  0x5a,  0xfe,  0x18,  0xdf,  0xfe,  0x19,  0xde,  0xfe,  0x1d,  0xf7,  0x2e,
+  0x97,  0xfe,  0x38,  0x17,  0xfe,  0x94,  0x14,  0xee,  0x9a,  0x2e,  0x6b,  0x1a,  0xfe,  0xaf,  0x19,  0xfe,
+  0x98,  0xe7,  0x00,  0x04,  0xb7,  0x22,  0xfe,  0x2c,  0x17,  0xfe,  0x6c,  0x10,  0x16,  0x11,  0x74,  0xfe,
+  0x30,  0xbc,  0xfe,  0xb2,  0xbc,  0x9a,  0xcb,  0x6b,  0x1a,  0xfe,  0x0f,  0x79,  0xfe,  0x1c,  0xf7,  0xcb,
+  0x97,  0xfe,  0x70,  0x17,  0xfe,  0x5c,  0x14,  0x35,  0x04,  0xb7,  0x22,  0xfe,  0x5c,  0x17,  0xfe,  0x42,
+  0x10,  0xfe,  0x02,  0xf6,  0x11,  0x74,  0xfe,  0x18,  0xfe,  0x5f,  0xfe,  0x19,  0xfe,  0x60,  0xfe,  0x03,
+  0xa1,  0xfe,  0x1d,  0xf7,  0x5a,  0x97,  0xfe,  0x96,  0x17,  0xfe,  0x36,  0x14,  0xfe,  0x1c,  0x13,  0x9a,
+  0x5a,  0x42,  0xfe,  0x83,  0x58,  0xfe,  0xaf,  0x19,  0xfe,  0x80,  0xe7,  0x11,  0xfe,  0x81,  0xe7,  0x11,
+  0x12,  0xfe,  0xdd,  0x00,  0x69,  0x29,  0x04,  0x69,  0x29,  0xfe,  0x12,  0x45,  0x22,  0xfe,  0x86,  0x17,
+  0x14,  0x05,  0x39,  0xa0,  0xb2,  0x02,  0x2a,  0xfe,  0x39,  0xf0,  0xfe,  0xda,  0x17,  0x20,  0x04,  0xfe,
+  0x7e,  0x18,  0x1d,  0x18,  0x4d,  0x0f,  0x0d,  0x04,  0x74,  0x03,  0xd2,  0x1d,  0x05,  0xfe,  0xef,  0x12,
+  0xfe,  0xe1,  0x10,  0x7c,  0x6e,  0x67,  0x32,  0x06,  0x2f,  0xfe,  0x3c,  0x13,  0xfe,  0x7e,  0x14,  0xfe,
+  0x42,  0x13,  0x50,  0xc2,  0x07,  0x47,  0x01,  0x0e,  0xb9,  0xfe,  0x3e,  0x12,  0xfe,  0x41,  0x48,  0xfe,
+  0x45,  0x48,  0x01,  0xf2,  0xfe,  0x00,  0xcc,  0xb9,  0xfe,  0xf3,  0x13,  0x43,  0x77,  0x06,  0x11,  0xab,
+  0x07,  0x84,  0x01,  0x0e,  0xfe,  0x80,  0x4c,  0x01,  0x72,  0xfe,  0x16,  0x10,  0x06,  0x82,  0x8c,  0xfe,
+  0x3c,  0x14,  0xfe,  0x24,  0x12,  0xfe,  0x14,  0x56,  0xfe,  0xd6,  0xf0,  0xfe,  0xfa,  0x17,  0x16,  0x09,
+  0x04,  0xfe,  0x9c,  0xe7,  0x09,  0x10,  0xfe,  0x15,  0x00,  0x63,  0x79,  0x29,  0x01,  0xe2,  0x16,  0x05,
+  0x04,  0x0a,  0x53,  0x2d,  0x37,  0x12,  0x2f,  0x01,  0x72,  0x16,  0x05,  0x04,  0xfe,  0x38,  0x90,  0xfe,
+  0xba,  0x90,  0x3a,  0xce,  0x3b,  0xcf,  0xfe,  0x48,  0x55,  0x35,  0xfe,  0xc9,  0x55,  0x04,  0x21,  0xa3,
+  0x76,  0x13,  0xa3,  0x04,  0x07,  0xa4,  0x01,  0x0e,  0xfe,  0x41,  0x48,  0x07,  0x3d,  0x01,  0x0e,  0xfe,
+  0x49,  0x44,  0x19,  0xfe,  0xc2,  0x18,  0x76,  0x77,  0x04,  0x07,  0x47,  0x01,  0x0e,  0x06,  0x11,  0x65,
+  0x07,  0x5c,  0x01,  0xa8,  0x07,  0x3d,  0x01,  0x0e,  0x76,  0x77,  0x04,  0xfe,  0x4e,  0xe4,  0x18,  0x6a,
+  0xfe,  0xf6,  0x18,  0x03,  0xfe,  0x90,  0x00,  0xfe,  0x3a,  0x45,  0xfe,  0x2c,  0x10,  0xfe,  0x4e,  0xe4,
+  0xc9,  0x6a,  0xfe,  0x08,  0x19,  0x03,  0xfe,  0x92,  0x00,  0xfe,  0x02,  0xe6,  0x1a,  0xe4,  0xfe,  0x4e,
+  0xe4,  0xfe,  0x0b,  0x00,  0x6a,  0xfe,  0x1a,  0x19,  0x03,  0xfe,  0x94,  0x00,  0xfe,  0x02,  0xe6,  0x1e,
+  0xfe,  0x08,  0x10,  0x03,  0xfe,  0x96,  0x00,  0xfe,  0x02,  0xe6,  0x6c,  0xfe,  0x4e,  0x45,  0xea,  0xb8,
+  0xff,  0x04,  0x68,  0x54,  0xe7,  0x1d,  0x6d,  0xfe,  0x08,  0x1c,  0xfe,  0x67,  0x19,  0xfe,  0x0a,  0x1c,
+  0xfe,  0x1a,  0xf4,  0xfe,  0x00,  0x04,  0xea,  0xfe,  0x48,  0xf4,  0x18,  0x7a,  0xfe,  0x4e,  0x19,  0x0f,
+  0x18,  0x04,  0x06,  0x7e,  0xfe,  0x5a,  0xf0,  0xfe,  0x5e,  0x19,  0x24,  0xfe,  0x09,  0x00,  0xfe,  0x34,
+  0x10,  0x06,  0x1a,  0xfe,  0x5a,  0xf0,  0xf8,  0x24,  0xca,  0xe5,  0x06,  0x18,  0x4d,  0x24,  0x6c,  0xe4,
+  0x06,  0x09,  0x4d,  0x24,  0x9e,  0xe3,  0x06,  0x05,  0x4d,  0x24,  0x58,  0xa9,  0xb6,  0x04,  0x14,  0xfe,
+  0x09,  0x00,  0x01,  0x36,  0xfe,  0x04,  0xfe,  0x81,  0x03,  0x83,  0xfe,  0x40,  0x5c,  0x04,  0x1b,  0xf9,
+  0xfe,  0x14,  0xf0,  0x0b,  0x26,  0xfe,  0xb0,  0x19,  0x1b,  0xf9,  0x7b,  0xf9,  0xfe,  0x82,  0xf0,  0xfe,
+  0xb4,  0x19,  0x04,  0xff,  0xdf,  0x00,  0x00,
 };
 
 STATIC unsigned short _adv_asc38C0800_size =
-    sizeof(_adv_asc38C0800_buf); /* 0x14F1 */
+    sizeof(_adv_asc38C0800_buf); /* 0x14C7 */
 STATIC ADV_DCNT _adv_asc38C0800_chksum =
-    0x053503A5; /* Expanded checksum. */
+    0x0505BAF2UL; /* Expanded little-endian checksum. */
+
+
+STATIC unsigned char _adv_asc38C1600_buf[] = {
+  0x00,  0x00,  0x00,  0xf2,  0x00,  0xfc,  0x00,  0x16,  0x00,  0xf0,  0x01,  0x00,  0xe6,  0x1b,  0x48,  0xe4,
+  0x18,  0xe4,  0x03,  0xf6,  0x02,  0x00,  0x18,  0x80,  0x00,  0xfa,  0xff,  0xff,  0x04,  0x00,  0x00,  0xf6,
+  0x09,  0xe7,  0x82,  0xe7,  0x85,  0xf0,  0x86,  0xf0,  0xe8,  0x0e,  0x9e,  0xe7,  0xff,  0x00,  0x55,  0xf0,
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+  0xf0,  0xfe,  0xae,  0x15,  0xfe,  0x04,  0xf4,  0x51,  0xfe,  0x43,  0xf4,  0x8d,  0xf4,  0xcc,  0x01,  0xfe,
+  0x4e,  0x14,  0x1e,  0x34,  0xf8,  0xfe,  0x00,  0x17,  0x85,  0x42,  0x41,  0xfe,  0xea,  0x15,  0x5a,  0x42,
+  0xfe,  0x1c,  0x10,  0xfe,  0x00,  0x17,  0x85,  0x77,  0x41,  0xfe,  0xea,  0x15,  0x5a,  0x77,  0x6a,  0x4b,
+  0x22,  0xfe,  0x4d,  0xf4,  0x00,  0xf6,  0x3e,  0x0f,  0x05,  0xfe,  0xb4,  0x56,  0xfe,  0xc3,  0x58,  0x03,
+  0x4b,  0x0f,  0x0a,  0x03,  0x4b,  0x3b,  0x70,  0x4a,  0x3e,  0x01,  0x06,  0x12,  0xa1,  0x23,  0x21,  0xb5,
+  0xfe,  0x03,  0xea,  0xfe,  0x7e,  0x01,  0x01,  0x06,  0x12,  0xa1,  0x23,  0x21,  0xfe,  0xe9,  0x0a,  0x01,
+  0x06,  0x12,  0xa1,  0x23,  0x21,  0xfe,  0xe9,  0x0a,  0xfe,  0x05,  0xea,  0xfe,  0x7f,  0x01,  0x01,  0x06,
+  0x12,  0xa1,  0x23,  0x21,  0xfe,  0x69,  0x09,  0xfe,  0x02,  0xea,  0xfe,  0x80,  0x01,  0x01,  0x06,  0x12,
+  0xa1,  0x23,  0x21,  0xfe,  0xe8,  0x08,  0x40,  0xfe,  0x81,  0x01,  0x02,  0xad,  0x1a,  0x56,  0x36,  0x08,
+  0x20,  0x2c,  0x9b,  0x70,  0xb9,  0x4d,  0x05,  0x2d,  0xfe,  0x34,  0xf4,  0x34,  0x9a,  0x70,  0x02,  0x93,
+  0x1a,  0x56,  0x36,  0x08,  0x0e,  0x2c,  0xf0,  0x4a,  0x3e,  0xfe,  0x90,  0x10,  0xfe,  0x40,  0x5a,  0x1e,
+  0x34,  0xf7,  0x85,  0x42,  0x41,  0xfe,  0xb6,  0x16,  0x5a,  0x42,  0x6a,  0x85,  0x77,  0x41,  0xfe,  0xb6,
+  0x16,  0x5a,  0x77,  0xfe,  0xb4,  0x56,  0xfe,  0x40,  0x5d,  0x01,  0xbe,  0x01,  0xfe,  0x8e,  0x1b,  0xfe,
+  0x02,  0x17,  0xfe,  0xc8,  0x45,  0xfe,  0x5a,  0xf0,  0xfe,  0xcc,  0x16,  0xfe,  0x43,  0x48,  0x28,  0x8c,
+  0x2d,  0xfe,  0x34,  0xf4,  0xfe,  0x00,  0x11,  0xfe,  0x40,  0x10,  0x28,  0xab,  0x2d,  0xfe,  0x34,  0xf4,
+  0x31,  0xfe,  0x34,  0x10,  0x28,  0xfe,  0x0b,  0x00,  0x2d,  0x3f,  0x5b,  0xfe,  0x28,  0x10,  0xfe,  0xc0,
+  0x49,  0xff,  0x02,  0x00,  0x54,  0xa9,  0xfe,  0x90,  0x01,  0x41,  0xfe,  0x06,  0x17,  0x3e,  0xfe,  0x1c,
+  0xf4,  0x34,  0x9c,  0xfe,  0x40,  0xf4,  0x8f,  0xfe,  0x56,  0xf0,  0xfe,  0x18,  0x17,  0xfe,  0x04,  0xf4,
+  0x51,  0xfe,  0x40,  0xf4,  0x8d,  0xf4,  0x3b,  0x28,  0x8c,  0x49,  0xce,  0x0a,  0x1d,  0xfe,  0x7f,  0x01,
+  0xfe,  0xc8,  0x46,  0xfe,  0x24,  0x13,  0x85,  0x00,  0x56,  0x22,  0x1d,  0xfe,  0x7e,  0x01,  0xfe,  0xc8,
+  0x45,  0xfe,  0x14,  0x13,  0x1d,  0xfe,  0x80,  0x01,  0xfe,  0x48,  0x45,  0xfe,  0x0c,  0x13,  0x1d,  0xfe,
+  0x81,  0x01,  0xfe,  0xc8,  0x44,  0x49,  0x22,  0x03,  0x0f,  0x05,  0x03,  0x70,  0x3e,  0x4b,  0x0f,  0x0a,
+  0x03,  0x10,  0x05,  0x01,  0x06,  0x13,  0xfe,  0x8e,  0x17,  0x10,  0x0a,  0x01,  0x06,  0x13,  0xfe,  0x8e,
+  0x17,  0x10,  0x19,  0x01,  0x06,  0x13,  0xfe,  0x8e,  0x17,  0x6e,  0xfe,  0x89,  0x49,  0x01,  0x06,  0x03,
+  0x10,  0x05,  0x01,  0x06,  0x13,  0xbc,  0x10,  0x19,  0x01,  0x06,  0x13,  0xbc,  0x10,  0x05,  0x01,  0x06,
+  0x13,  0xbc,  0xfe,  0x89,  0x49,  0x01,  0x06,  0x13,  0xbc,  0x6e,  0xfe,  0x89,  0x4a,  0x01,  0x06,  0x03,
+  0x4b,  0x03,  0x10,  0x05,  0x01,  0x06,  0x13,  0x6d,  0x10,  0x76,  0x01,  0x06,  0x13,  0x6d,  0x10,  0x0e,
+  0x01,  0x06,  0x13,  0x6d,  0xfe,  0x89,  0x49,  0x01,  0x06,  0x13,  0x6d,  0x10,  0x00,  0x01,  0x06,  0x13,
+  0x6d,  0xfe,  0x89,  0x4a,  0x01,  0x06,  0x13,  0x6d,  0xfe,  0x09,  0x49,  0x01,  0x06,  0x13,  0x6d,  0x6e,
+  0xc7,  0x01,  0x06,  0x03,  0x1d,  0xe2,  0x07,  0x05,  0xfe,  0x48,  0x13,  0xc3,  0x1c,  0xe2,  0xfe,  0x49,
+  0xf4,  0x00,  0x48,  0x6e,  0x9a,  0x57,  0xfe,  0x01,  0xec,  0xfe,  0x27,  0x01,  0xc7,  0xff,  0x02,  0x00,
+  0x10,  0x2a,  0xfe,  0x4a,  0x18,  0x35,  0x07,  0xfe,  0xe3,  0x00,  0xfe,  0x20,  0x13,  0x12,  0xfe,  0x6e,
+  0x18,  0x22,  0x1c,  0x97,  0x01,  0x47,  0x1d,  0x97,  0x07,  0x05,  0x55,  0x0b,  0x59,  0x05,  0x3d,  0x03,
+  0x09,  0x53,  0x01,  0x14,  0xfe,  0x00,  0x40,  0xa2,  0x07,  0x16,  0xba,  0x09,  0x96,  0x01,  0x14,  0xa2,
+  0x09,  0x5f,  0x01,  0xb7,  0x03,  0x09,  0x96,  0x01,  0x14,  0xa2,  0xfe,  0x80,  0xe7,  0x16,  0x07,  0x16,
+  0x56,  0xfe,  0x45,  0x58,  0x01,  0xfb,  0xa2,  0x03,  0x09,  0x53,  0x01,  0x14,  0xa2,  0x09,  0x5f,  0x01,
+  0xb7,  0x03,  0x09,  0x53,  0x01,  0x14,  0xfe,  0x80,  0x80,  0xfe,  0x80,  0x4c,  0xfe,  0x49,  0xe4,  0x16,
+  0xba,  0x09,  0x96,  0x01,  0x14,  0xfe,  0x80,  0x4c,  0x09,  0x5f,  0x01,  0x7a,  0x03,  0x18,  0x16,  0x7f,
+  0x73,  0xe3,  0xfe,  0x18,  0xdf,  0xfe,  0x19,  0xde,  0xfe,  0x24,  0x1c,  0xfe,  0x1d,  0xf7,  0x38,  0xa8,
+  0xfe,  0x0a,  0x19,  0x01,  0xfe,  0x10,  0x1a,  0xfe,  0x0c,  0x13,  0xaa,  0x38,  0x73,  0xfe,  0x2c,  0x01,
+  0xfe,  0x2f,  0x19,  0x03,  0xc4,  0x26,  0xfe,  0xfa,  0x18,  0xfe,  0xda,  0x10,  0x18,  0x16,  0x7f,  0x02,
+  0xfe,  0x64,  0x01,  0xfe,  0x00,  0xf4,  0x20,  0xfe,  0x18,  0x58,  0x02,  0xfe,  0x66,  0x01,  0xfe,  0x19,
+  0x58,  0xaa,  0x20,  0xfe,  0x3c,  0x90,  0xfe,  0x30,  0xf4,  0x05,  0xfe,  0x3c,  0x50,  0x73,  0xfe,  0x38,
+  0x00,  0xfe,  0x0f,  0x79,  0xfe,  0x1c,  0xf7,  0x20,  0xa8,  0xfe,  0x54,  0x19,  0xfe,  0xb6,  0x14,  0x2c,
+  0x03,  0xc4,  0x26,  0xfe,  0x2c,  0x19,  0xfe,  0x9c,  0x10,  0x18,  0x16,  0x7f,  0xfe,  0x83,  0x5a,  0xfe,
+  0x18,  0xdf,  0xfe,  0x19,  0xde,  0xfe,  0x1d,  0xf7,  0x4e,  0xa8,  0xfe,  0x76,  0x19,  0xbb,  0xf8,  0xaa,
+  0x4e,  0x73,  0x0e,  0xfe,  0xaf,  0x19,  0xfe,  0x98,  0xe7,  0x00,  0x03,  0xc4,  0x26,  0xfe,  0x6a,  0x19,
+  0xfe,  0x6c,  0x10,  0x18,  0x16,  0x7f,  0xfe,  0x30,  0xbc,  0xfe,  0xb2,  0xbc,  0xaa,  0x43,  0x73,  0x0e,
+  0xfe,  0x0f,  0x79,  0xfe,  0x1c,  0xf7,  0x43,  0xa8,  0xfe,  0xae,  0x19,  0xfe,  0x5c,  0x14,  0x2c,  0x03,
+  0xc4,  0x26,  0xfe,  0x9a,  0x19,  0xfe,  0x42,  0x10,  0xfe,  0x02,  0xf6,  0x16,  0x7f,  0xfe,  0x18,  0xfe,
+  0x62,  0xfe,  0x19,  0xfe,  0x63,  0xfe,  0x03,  0xa1,  0xfe,  0x1d,  0xf7,  0x5d,  0xa8,  0xfe,  0xd4,  0x19,
+  0xfe,  0x36,  0x14,  0xfe,  0x1c,  0x13,  0xaa,  0x5d,  0x3b,  0xfe,  0x83,  0x58,  0xfe,  0xaf,  0x19,  0xfe,
+  0x80,  0xe7,  0x16,  0xfe,  0x81,  0xe7,  0x16,  0x11,  0xfe,  0xdd,  0x00,  0x71,  0x2b,  0x03,  0x71,  0x2b,
+  0xfe,  0x12,  0x45,  0x26,  0xfe,  0xc4,  0x19,  0x1b,  0x05,  0x40,  0xac,  0xbf,  0x04,  0x30,  0xfe,  0x39,
+  0xf0,  0xfe,  0x18,  0x1a,  0x22,  0x03,  0xfe,  0x7e,  0x18,  0x1e,  0x19,  0x2d,  0x0f,  0x0d,  0x03,  0x7f,
+  0x02,  0xe1,  0x1e,  0x05,  0xfe,  0xef,  0x12,  0xfe,  0xe1,  0x10,  0x89,  0x2f,  0x6f,  0x35,  0x07,  0x50,
+  0xfe,  0x3c,  0x13,  0xfe,  0x7e,  0x14,  0xfe,  0x42,  0x13,  0x58,  0xcd,  0x09,  0x53,  0x01,  0x14,  0xc6,
+  0xfe,  0x3e,  0x12,  0xfe,  0x41,  0x48,  0xfe,  0x45,  0x48,  0x01,  0xfb,  0xfe,  0x00,  0xcc,  0xc6,  0xfe,
+  0xf3,  0x13,  0x34,  0x82,  0x07,  0x16,  0x9e,  0x09,  0x96,  0x01,  0x14,  0xfe,  0x80,  0x4c,  0x01,  0x7c,
+  0xfe,  0x16,  0x10,  0x07,  0x94,  0x49,  0xfe,  0x3c,  0x14,  0xfe,  0x24,  0x12,  0xfe,  0x14,  0x56,  0xfe,
+  0xd6,  0xf0,  0xfe,  0x38,  0x1a,  0x18,  0x0a,  0x03,  0xfe,  0x9c,  0xe7,  0x0a,  0x15,  0xfe,  0x15,  0x00,
+  0x68,  0x86,  0x2b,  0x01,  0xef,  0x18,  0x05,  0x03,  0x0b,  0x59,  0x38,  0x3d,  0x11,  0x50,  0x01,  0x7c,
+  0x18,  0x05,  0x03,  0xfe,  0x38,  0x90,  0xfe,  0xba,  0x90,  0x8a,  0xdc,  0x75,  0xdd,  0xfe,  0x48,  0x55,
+  0x2c,  0xfe,  0xc9,  0x55,  0x03,  0x1d,  0xb0,  0x80,  0x1c,  0xb0,  0x03,  0x09,  0xb1,  0x01,  0x14,  0xfe,
+  0x41,  0x48,  0x09,  0x44,  0x01,  0x14,  0xfe,  0x49,  0x44,  0x17,  0xfe,  0x00,  0x1b,  0x80,  0x82,  0x03,
+  0x09,  0x53,  0x01,  0x14,  0x07,  0x16,  0x55,  0x09,  0x5f,  0x01,  0xb7,  0x09,  0x44,  0x01,  0x14,  0x80,
+  0x82,  0x03,  0xfe,  0x4e,  0xe4,  0x19,  0x72,  0xfe,  0x34,  0x1b,  0x02,  0xfe,  0x90,  0x00,  0xfe,  0x3a,
+  0x45,  0xfe,  0x2c,  0x10,  0xfe,  0x4e,  0xe4,  0xdb,  0x72,  0xfe,  0x46,  0x1b,  0x02,  0xfe,  0x92,  0x00,
+  0xcf,  0x0e,  0xf1,  0xfe,  0x4e,  0xe4,  0xfe,  0x0b,  0x00,  0x72,  0xfe,  0x58,  0x1b,  0x02,  0xfe,  0x94,
+  0x00,  0xcf,  0x20,  0xfe,  0x08,  0x10,  0x02,  0xfe,  0x96,  0x00,  0xcf,  0x5b,  0xfe,  0x4e,  0x45,  0x9d,
+  0xc5,  0xff,  0x04,  0x68,  0x54,  0xf3,  0x1e,  0x42,  0xfe,  0x08,  0x1c,  0xfe,  0x67,  0x19,  0xfe,  0x0a,
+  0x1c,  0xfe,  0x1a,  0xf4,  0xfe,  0x00,  0x04,  0x9d,  0xa9,  0x19,  0x41,  0xfe,  0x8c,  0x1b,  0x0f,  0x19,
+  0x03,  0x07,  0x8b,  0xfe,  0x5a,  0xf0,  0xfe,  0x9c,  0x1b,  0x29,  0x8c,  0xfe,  0x34,  0x10,  0x07,  0x0e,
+  0xfe,  0x5a,  0xf0,  0xfe,  0xaa,  0x1b,  0x29,  0xab,  0xfe,  0x26,  0x10,  0x07,  0x19,  0x2d,  0x29,  0x5b,
+  0xf1,  0x07,  0x0a,  0x2d,  0x29,  0x8d,  0xb9,  0x07,  0x05,  0x2d,  0x29,  0x8e,  0x9a,  0xc3,  0x03,  0x1b,
+  0x8c,  0x01,  0x3c,  0xfe,  0x04,  0xfe,  0x92,  0x02,  0x95,  0xcc,  0x03,  0x25,  0xfe,  0xfe,  0x1b,  0xfe,
+  0x14,  0xf0,  0x06,  0x2a,  0xfe,  0xee,  0x1b,  0x25,  0xfe,  0xfe,  0x1b,  0x88,  0xfe,  0xfe,  0x1b,  0xfe,
+  0x82,  0xf0,  0xfe,  0xf2,  0x1b,  0x03,  0xff,  0xff,  0x00,  0x00,  0xff,  0xff,  0x00,  0x00,  0xff,  0x02,
+  0x00,  0x00,
+};
+
+STATIC unsigned short _adv_asc38C1600_size =
+    sizeof(_adv_asc38C1600_buf); /* 0x1662 */
+STATIC ADV_DCNT _adv_asc38C1600_chksum =
+    0x057A378AUL; /* Expanded little_endian checksum. */
 
 /* a_init.c */
 /*
@@ -15453,6 +16628,13 @@
  * configuration. The BIOS now uses this structure when it is built.
  * Additional structure information can be found in a_condor.h where
  * the structure is defined.
+ *
+ * The XXX_Field_IsChar structs are needed to correct for endianness.
+ * These values are read from the board 16 bits at a time directly
+ * into the structs.  Because some fields are char, the values will be
+ * in the wrong order.  The XXX_Field_IsChar tells when to flip the
+ * bytes.  Cleaner solutions are welcome. :-)
+ *
  */
 STATIC ADVEEP_3550_CONFIG
 Default_3550_EEPROM_Config ASC_INITDATA = {
@@ -15492,6 +16674,44 @@
     0                           /* num_of_err */
 };
 
+STATIC ADVEEP_3550_CONFIG
+ADVEEP_3550_Config_Field_IsChar ASC_INITDATA = {
+    0,			        /* cfg_lsw */
+    0,				/* cfg_msw */
+    0,				/* -disc_enable */
+    0,				/* wdtr_able */
+    0,				/* sdtr_able */
+    0,				/* start_motor */
+    0,				/* tagqng_able */
+    0,				/* bios_scan */
+    0,                          /* scam_tolerant */
+    1,                          /* adapter_scsi_id */
+    1,                          /* bios_boot_delay */
+    1,                          /* scsi_reset_delay */
+    1,                          /* bios_id_lun */
+    1,                          /* termination */
+    1,                          /* reserved1 */
+    0,				/* bios_ctrl */
+    0,				/* ultra_able */
+    0,                          /* reserved2 */
+    1,				/* max_host_qng */
+    1,				/* max_dvc_qng */
+    0,                          /* dvc_cntl */
+    0,                          /* bug_fix */
+    0,                          /* serial_number_word1 */
+    0,                          /* serial_number_word2 */
+    0,                          /* serial_number_word3 */
+    0,                          /* check_sum */
+    { 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* oem_name[16] */
+    0,                          /* dvc_err_code */
+    0,                          /* adv_err_code */
+    0,                          /* adv_err_addr */
+    0,                          /* saved_dvc_err_code */
+    0,                          /* saved_adv_err_code */
+    0,                          /* saved_adv_err_addr */
+    0                           /* num_of_err */
+};
+
 STATIC ADVEEP_38C0800_CONFIG
 Default_38C0800_EEPROM_Config ASC_INITDATA = {
     ADV_EEPROM_BIOS_ENABLE,     /* 00 cfg_lsw */
@@ -15557,17 +16777,212 @@
     0                           /* 63 reserved */
 };
 
-/*
- * Initialize the ADV_DVC_VAR structure.
- *
- * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
- *
- * For a non-fatal error return a warning code. If there are no warnings
- * then 0 is returned.
- */
-ASC_INITFUNC(
-STATIC int,
-AdvInitGetConfig(ADV_DVC_VAR *asc_dvc)
+STATIC ADVEEP_38C0800_CONFIG
+ADVEEP_38C0800_Config_Field_IsChar ASC_INITDATA = {
+    0,				/* 00 cfg_lsw */
+    0,				/* 01 cfg_msw */
+    0,				/* 02 disc_enable */
+    0,				/* 03 wdtr_able */
+    0,				/* 04 sdtr_speed1 */
+    0,				/* 05 start_motor */
+    0,				/* 06 tagqng_able */
+    0,				/* 07 bios_scan */
+    0,                          /* 08 scam_tolerant */
+    1,                          /* 09 adapter_scsi_id */
+    1,                          /*    bios_boot_delay */
+    1,                          /* 10 scsi_reset_delay */
+    1,                          /*    bios_id_lun */
+    1,                          /* 11 termination_se */
+    1,                          /*    termination_lvd */
+    0,				/* 12 bios_ctrl */
+    0,				/* 13 sdtr_speed2 */
+    0,				/* 14 sdtr_speed3 */
+    1,				/* 15 max_host_qng */
+    1,				/*    max_dvc_qng */
+    0,                          /* 16 dvc_cntl */
+    0,				/* 17 sdtr_speed4 */
+    0,                          /* 18 serial_number_word1 */
+    0,                          /* 19 serial_number_word2 */
+    0,                          /* 20 serial_number_word3 */
+    0,                          /* 21 check_sum */
+    { 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* 22-29 oem_name[16] */
+    0,                          /* 30 dvc_err_code */
+    0,                          /* 31 adv_err_code */
+    0,                          /* 32 adv_err_addr */
+    0,                          /* 33 saved_dvc_err_code */
+    0,                          /* 34 saved_adv_err_code */
+    0,                          /* 35 saved_adv_err_addr */
+    0,                          /* 36 reserved */
+    0,                          /* 37 reserved */
+    0,                          /* 38 reserved */
+    0,                          /* 39 reserved */
+    0,                          /* 40 reserved */
+    0,                          /* 41 reserved */
+    0,                          /* 42 reserved */
+    0,                          /* 43 reserved */
+    0,                          /* 44 reserved */
+    0,                          /* 45 reserved */
+    0,                          /* 46 reserved */
+    0,                          /* 47 reserved */
+    0,                          /* 48 reserved */
+    0,                          /* 49 reserved */
+    0,                          /* 50 reserved */
+    0,                          /* 51 reserved */
+    0,                          /* 52 reserved */
+    0,                          /* 53 reserved */
+    0,                          /* 54 reserved */
+    0,                          /* 55 reserved */
+    0,                          /* 56 cisptr_lsw */
+    0,                          /* 57 cisprt_msw */
+    0,				/* 58 subsysvid */
+    0,				/* 59 subsysid */
+    0,                          /* 60 reserved */
+    0,                          /* 61 reserved */
+    0,                          /* 62 reserved */
+    0                           /* 63 reserved */
+};
+
+STATIC ADVEEP_38C1600_CONFIG
+Default_38C1600_EEPROM_Config ASC_INITDATA = {
+    ADV_EEPROM_BIOS_ENABLE,     /* 00 cfg_lsw */
+    0x0000,                     /* 01 cfg_msw */
+    0xFFFF,                     /* 02 disc_enable */
+    0xFFFF,                     /* 03 wdtr_able */
+    0x5555,                     /* 04 sdtr_speed1 */
+    0xFFFF,                     /* 05 start_motor */
+    0xFFFF,                     /* 06 tagqng_able */
+    0xFFFF,                     /* 07 bios_scan */
+    0,                          /* 08 scam_tolerant */
+    7,                          /* 09 adapter_scsi_id */
+    0,                          /*    bios_boot_delay */
+    3,                          /* 10 scsi_reset_delay */
+    0,                          /*    bios_id_lun */
+    0,                          /* 11 termination_se */
+    0,                          /*    termination_lvd */
+    0xFFE7,                     /* 12 bios_ctrl */
+    0x5555,                     /* 13 sdtr_speed2 */
+    0x5555,                     /* 14 sdtr_speed3 */
+    ASC_DEF_MAX_HOST_QNG,       /* 15 max_host_qng */
+    ASC_DEF_MAX_DVC_QNG,        /*    max_dvc_qng */
+    0,                          /* 16 dvc_cntl */
+    0x5555,                     /* 17 sdtr_speed4 */
+    0,                          /* 18 serial_number_word1 */
+    0,                          /* 19 serial_number_word2 */
+    0,                          /* 20 serial_number_word3 */
+    0,                          /* 21 check_sum */
+    { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }, /* 22-29 oem_name[16] */
+    0,                          /* 30 dvc_err_code */
+    0,                          /* 31 adv_err_code */
+    0,                          /* 32 adv_err_addr */
+    0,                          /* 33 saved_dvc_err_code */
+    0,                          /* 34 saved_adv_err_code */
+    0,                          /* 35 saved_adv_err_addr */
+    0,                          /* 36 reserved */
+    0,                          /* 37 reserved */
+    0,                          /* 38 reserved */
+    0,                          /* 39 reserved */
+    0,                          /* 40 reserved */
+    0,                          /* 41 reserved */
+    0,                          /* 42 reserved */
+    0,                          /* 43 reserved */
+    0,                          /* 44 reserved */
+    0,                          /* 45 reserved */
+    0,                          /* 46 reserved */
+    0,                          /* 47 reserved */
+    0,                          /* 48 reserved */
+    0,                          /* 49 reserved */
+    0,                          /* 50 reserved */
+    0,                          /* 51 reserved */
+    0,                          /* 52 reserved */
+    0,                          /* 53 reserved */
+    0,                          /* 54 reserved */
+    0,                          /* 55 reserved */
+    0,                          /* 56 cisptr_lsw */
+    0,                          /* 57 cisprt_msw */
+    ADV_PCI_VENDOR_ID,          /* 58 subsysvid */
+    ADV_PCI_DEVID_38C1600_REV1, /* 59 subsysid */
+    0,                          /* 60 reserved */
+    0,                          /* 61 reserved */
+    0,                          /* 62 reserved */
+    0                           /* 63 reserved */
+};
+
+STATIC ADVEEP_38C1600_CONFIG
+ADVEEP_38C1600_Config_Field_IsChar ASC_INITDATA = {
+    0,				/* 00 cfg_lsw */
+    0,				/* 01 cfg_msw */
+    0,				/* 02 disc_enable */
+    0,				/* 03 wdtr_able */
+    0,				/* 04 sdtr_speed1 */
+    0,				/* 05 start_motor */
+    0,				/* 06 tagqng_able */
+    0,				/* 07 bios_scan */
+    0,                          /* 08 scam_tolerant */
+    1,                          /* 09 adapter_scsi_id */
+    1,                          /*    bios_boot_delay */
+    1,                          /* 10 scsi_reset_delay */
+    1,                          /*    bios_id_lun */
+    1,                          /* 11 termination_se */
+    1,                          /*    termination_lvd */
+    0,				/* 12 bios_ctrl */
+    0,				/* 13 sdtr_speed2 */
+    0,				/* 14 sdtr_speed3 */
+    1,				/* 15 max_host_qng */
+    1,				/*    max_dvc_qng */
+    0,                          /* 16 dvc_cntl */
+    0,				/* 17 sdtr_speed4 */
+    0,                          /* 18 serial_number_word1 */
+    0,                          /* 19 serial_number_word2 */
+    0,                          /* 20 serial_number_word3 */
+    0,                          /* 21 check_sum */
+    { 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* 22-29 oem_name[16] */
+    0,                          /* 30 dvc_err_code */
+    0,                          /* 31 adv_err_code */
+    0,                          /* 32 adv_err_addr */
+    0,                          /* 33 saved_dvc_err_code */
+    0,                          /* 34 saved_adv_err_code */
+    0,                          /* 35 saved_adv_err_addr */
+    0,                          /* 36 reserved */
+    0,                          /* 37 reserved */
+    0,                          /* 38 reserved */
+    0,                          /* 39 reserved */
+    0,                          /* 40 reserved */
+    0,                          /* 41 reserved */
+    0,                          /* 42 reserved */
+    0,                          /* 43 reserved */
+    0,                          /* 44 reserved */
+    0,                          /* 45 reserved */
+    0,                          /* 46 reserved */
+    0,                          /* 47 reserved */
+    0,                          /* 48 reserved */
+    0,                          /* 49 reserved */
+    0,                          /* 50 reserved */
+    0,                          /* 51 reserved */
+    0,                          /* 52 reserved */
+    0,                          /* 53 reserved */
+    0,                          /* 54 reserved */
+    0,                          /* 55 reserved */
+    0,                          /* 56 cisptr_lsw */
+    0,                          /* 57 cisprt_msw */
+    0,				/* 58 subsysvid */
+    0,				/* 59 subsysid */
+    0,                          /* 60 reserved */
+    0,                          /* 61 reserved */
+    0,                          /* 62 reserved */
+    0                           /* 63 reserved */
+};
+
+/*
+ * Initialize the ADV_DVC_VAR structure.
+ *
+ * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
+ *
+ * For a non-fatal error return a warning code. If there are no warnings
+ * then 0 is returned.
+ */
+ASC_INITFUNC(
+STATIC int,
+AdvInitGetConfig(ADV_DVC_VAR *asc_dvc)
 )
 {
     ushort      warn_code;
@@ -15674,7 +17089,13 @@
         AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
             ADV_CTRL_REG_CMD_WR_IO_REG);
 
-        if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800)
+        if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600)
+        {
+            if ((status = AdvInitFrom38C1600EEP(asc_dvc)) == ADV_ERROR)
+            {
+                return ADV_ERROR;
+            }
+        } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800)
         {
             if ((status = AdvInitFrom38C0800EEP(asc_dvc)) == ADV_ERROR)
             {
@@ -15812,7 +17233,7 @@
             {
                 AdvWriteWordAutoIncLram(iop_base, (((ushort)
                     _adv_asc3550_buf[i + 3] << 8) |
-                    _adv_asc3550_buf[i + 2]));
+		    _adv_asc3550_buf[i + 2]));
                 word++;
             }
             i += 3;
@@ -15820,14 +17241,14 @@
         {
             AdvWriteWordAutoIncLram(iop_base, (((ushort)
                 _adv_asc3550_buf[i + 2] << 8) |
-                _adv_asc3550_buf[i + 1]));
+		_adv_asc3550_buf[i + 1]));
             i += 2;
             word++;
         } else
         {
             AdvWriteWordAutoIncLram(iop_base, (((ushort)
                 _adv_asc3550_buf[(_adv_asc3550_buf[i] * 2) + 1] << 8) |
-                _adv_asc3550_buf[_adv_asc3550_buf[i] * 2]));
+		_adv_asc3550_buf[_adv_asc3550_buf[i] * 2]));
             word++;
         }
     }
@@ -15869,7 +17290,7 @@
      */
     for (i = 0; i < ASC_MC_BIOSLEN/2; i++)
     {
-        AdvWriteByteLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]);
+        AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]);
     }
 
     /*
@@ -15905,11 +17326,6 @@
      */
     if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR)
     {
-        /*
-         * Note: Don't remove the use of a temporary variable in
-         * the following code, otherwise the Microsoft C compiler
-         * will turn the following lines into a no-op.
-         */
         AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
         word |= CONTROL_FLAG_IGNORE_PERR;
         AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
@@ -16006,7 +17422,8 @@
      * after it is started below.
      */
     AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
-        PARITY_EN | SEL_TMO_LONG | OUR_ID_EN | asc_dvc->chip_scsi_id);
+        PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
+        asc_dvc->chip_scsi_id);
 
     /*
      * Determine SCSI_CFG1 Microcode Default Value.
@@ -16170,12 +17587,12 @@
         }
 
         carrp->carr_pa = carr_paddr;
-        carrp->carr_va = ADV_VADDR_TO_U32(carrp);
+        carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp));
 
         /*
          * Insert the carrier at the beginning of the freelist.
          */
-        carrp->next_vpa = ADV_VADDR_TO_U32(asc_dvc->carr_freelist);
+        carrp->next_vpa = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
         asc_dvc->carr_freelist = carrp;
 
         carrp++;
@@ -16192,18 +17609,19 @@
         return ADV_ERROR;
     }
     asc_dvc->carr_freelist =
-        (ADV_CARR_T *) ADV_U32_TO_VADDR(asc_dvc->icq_sp->next_vpa);
+        (ADV_CARR_T *) ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
 
     /*
      * The first command issued will be placed in the stopper carrier.
      */
-    asc_dvc->icq_sp->next_vpa = ASC_CQ_STOPPER;
+    asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
 
     /*
      * Set RISC ICQ physical address start value.
      */
     AdvWriteDWordLram(iop_base, ASC_MC_ICQ,
-        cpu_to_le32(asc_dvc->icq_sp->carr_pa));
+		      /* carr_pa is stored LE, must be native before write */
+		      le32_to_cpu(asc_dvc->icq_sp->carr_pa));
 
     /*
      * Set-up the RISC->Host Initiator Response Queue (IRQ).
@@ -16214,7 +17632,7 @@
         return ADV_ERROR;
     }
     asc_dvc->carr_freelist =
-        (ADV_CARR_T *) ADV_U32_TO_VADDR(asc_dvc->irq_sp->next_vpa);
+        (ADV_CARR_T *) ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
 
     /*
      * The first command completed by the RISC will be placed in
@@ -16223,23 +17641,19 @@
      * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
      * completed the RISC will set the ASC_RQ_STOPPER bit.
      */
-    asc_dvc->irq_sp->next_vpa = ASC_CQ_STOPPER;
+    asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
 
     /*
      * Set RISC IRQ physical address start value.
      */
     AdvWriteDWordLram(iop_base, ASC_MC_IRQ,
-        cpu_to_le32(asc_dvc->irq_sp->carr_pa));
+		      /* carr_pa is LE, must be native before write */
+		      le32_to_cpu(asc_dvc->irq_sp->carr_pa));
     asc_dvc->carr_pending_cnt = 0;
 
     AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
         (ADV_INTR_ENABLE_HOST_INTR | ADV_INTR_ENABLE_GLOBAL_INTR));
 
-    /*
-     * Note: Don't remove the use of a temporary variable in
-     * the following code, otherwise the Microsoft C compiler
-     * will turn the following lines into a no-op.
-     */
     AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
     AdvWriteWordRegister(iop_base, IOPW_PC, word);
 
@@ -16571,11 +17985,6 @@
      */
     if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR)
     {
-        /*
-         * Note: Don't remove the use of a temporary variable in
-         * the following code, otherwise the Microsoft C compiler
-         * will turn the following lines into a no-op.
-         */
         AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
         word |= CONTROL_FLAG_IGNORE_PERR;
         AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
@@ -16632,7 +18041,8 @@
      * after it is started below.
      */
     AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
-        PARITY_EN | SEL_TMO_LONG | OUR_ID_EN | asc_dvc->chip_scsi_id);
+        PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
+        asc_dvc->chip_scsi_id);
 
     /*
      * Determine SCSI_CFG1 Microcode Default Value.
@@ -16801,12 +18211,12 @@
         }
 
         carrp->carr_pa = carr_paddr;
-        carrp->carr_va = ADV_VADDR_TO_U32(carrp);
+        carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp));
 
         /*
          * Insert the carrier at the beginning of the freelist.
          */
-        carrp->next_vpa = ADV_VADDR_TO_U32(asc_dvc->carr_freelist);
+        carrp->next_vpa = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
         asc_dvc->carr_freelist = carrp;
 
         carrp++;
@@ -16823,18 +18233,19 @@
         return ADV_ERROR;
     }
     asc_dvc->carr_freelist =
-        (ADV_CARR_T *) ADV_U32_TO_VADDR(asc_dvc->icq_sp->next_vpa);
+        (ADV_CARR_T *) ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
 
     /*
      * The first command issued will be placed in the stopper carrier.
      */
-    asc_dvc->icq_sp->next_vpa = ASC_CQ_STOPPER;
+    asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
 
     /*
      * Set RISC ICQ physical address start value.
      */
     AdvWriteDWordLram(iop_base, ASC_MC_ICQ,
-        cpu_to_le32(asc_dvc->icq_sp->carr_pa));
+		      /* carr_pa is LE, must be native before write */
+		      le32_to_cpu(asc_dvc->icq_sp->carr_pa));
 
     /*
      * Set-up the RISC->Host Initiator Response Queue (IRQ).
@@ -16845,7 +18256,7 @@
         return ADV_ERROR;
     }
     asc_dvc->carr_freelist =
-        (ADV_CARR_T *) ADV_U32_TO_VADDR(asc_dvc->irq_sp->next_vpa);
+        (ADV_CARR_T *) ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
 
     /*
      * The first command completed by the RISC will be placed in
@@ -16854,22 +18265,19 @@
      * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
      * completed the RISC will set the ASC_RQ_STOPPER bit.
      */
-    asc_dvc->irq_sp->next_vpa = ASC_CQ_STOPPER;
+    asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
 
     /*
      * Set RISC IRQ physical address start value.
      */
     AdvWriteDWordLram(iop_base, ASC_MC_IRQ,
-        cpu_to_le32(asc_dvc->irq_sp->carr_pa));
+		      /* carr_pa is LE, must be native before write */
+		      le32_to_cpu(asc_dvc->irq_sp->carr_pa));
     asc_dvc->carr_pending_cnt = 0;
 
     AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
         (ADV_INTR_ENABLE_HOST_INTR | ADV_INTR_ENABLE_GLOBAL_INTR));
-    /*
-     * Note: Don't remove the use of a temporary variable in
-     * the following code, otherwise the Microsoft C compiler
-     * will turn the following lines into a no-op.
-     */
+
     AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
     AdvWriteWordRegister(iop_base, IOPW_PC, word);
 
@@ -16914,76 +18322,894 @@
 }
 
 /*
- * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
- * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
- * all of this is done.
+ * Initialize the ASC-38C1600.
  *
- * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
+ * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
  *
  * For a non-fatal error return a warning code. If there are no warnings
  * then 0 is returned.
- *
- * Note: Chip is stopped on entry.
  */
 ASC_INITFUNC(
 STATIC int,
-AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc)
+AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc)
 )
 {
-    AdvPortAddr         iop_base;
-    ushort              warn_code;
-    ADVEEP_3550_CONFIG  eep_config;
-    int                 i;
+    AdvPortAddr iop_base;
+    ushort      warn_code;
+    ADV_DCNT    sum;
+    int         begin_addr;
+    int         end_addr;
+    ushort      code_sum;
+    long        word;
+    int         j;
+    int         adv_asc38C1600_expanded_size;
+    ADV_CARR_T  *carrp;
+    ADV_DCNT    contig_len;
+    ADV_SDCNT   buf_size;
+    ADV_PADDR   carr_paddr;
+    int         i;
+    ushort      scsi_cfg1;
+    uchar       byte;
+    uchar       tid;
+    ushort      bios_mem[ASC_MC_BIOSLEN/2]; /* BIOS RISC Memory 0x40-0x8F. */
+    ushort      wdtr_able, sdtr_able, ppr_able, tagqng_able;
+    uchar       max_cmd[ASC_MAX_TID + 1];
 
-    iop_base = asc_dvc->iop_base;
+    /* If there is already an error, don't continue. */
+    if (asc_dvc->err_code != 0)
+    {
+        return ADV_ERROR;
+    }
+
+    /*
+     * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600.
+     */
+    if (asc_dvc->chip_type != ADV_CHIP_ASC38C1600)
+    {
+        asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE;
+        return ADV_ERROR;
+    }
 
     warn_code = 0;
+    iop_base = asc_dvc->iop_base;
 
     /*
-     * Read the board's EEPROM configuration.
-     *
-     * Set default values if a bad checksum is found.
+     * Save the RISC memory BIOS region before writing the microcode.
+     * The BIOS may already be loaded and using its RISC LRAM region
+     * so its region must be saved and restored.
      *
-     * XXX - Don't handle big-endian access to EEPROM yet.
+     * Note: This code makes the assumption, which is currently true,
+     * that a chip reset does not clear RISC LRAM.
      */
-    if (AdvGet3550EEPConfig(iop_base, &eep_config) != eep_config.check_sum)
+    for (i = 0; i < ASC_MC_BIOSLEN/2; i++)
     {
-        warn_code |= ASC_WARN_EEPROM_CHKSUM;
-
-        /*
-         * Set EEPROM default values.
-         */
-        for (i = 0; i < sizeof(ADVEEP_3550_CONFIG); i++)
-        {
-            *((uchar *) &eep_config + i) =
-                *((uchar *) &Default_3550_EEPROM_Config + i);
-        }
-
-        /*
-         * Assume the 6 byte board serial number that was read
-         * from EEPROM is correct even if the EEPROM checksum
-         * failed.
-         */
-        eep_config.serial_number_word3 =
-            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 1);
-
-        eep_config.serial_number_word2 =
-            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 2);
-
-        eep_config.serial_number_word1 =
-            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 3);
+        AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]);
+    }
 
-        AdvSet3550EEPConfig(iop_base, &eep_config);
+    /*
+     * Save current per TID negotiated values.
+     */
+    AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
+    AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
+    AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
+    AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
+    for (tid = 0; tid <= ASC_MAX_TID; tid++)
+    {
+        AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
+            max_cmd[tid]);
     }
+
     /*
-     * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
-     * EEPROM configuration that was read.
+     * RAM BIST (Built-In Self Test)
      *
-     * This is the mapping of EEPROM fields to Adv Library fields.
+     * Address : I/O base + offset 0x38h register (byte).
+     * Function: Bit 7-6(RW) : RAM mode
+     *                          Normal Mode   : 0x00
+     *                          Pre-test Mode : 0x40
+     *                          RAM Test Mode : 0x80
+     *           Bit 5       : unused
+     *           Bit 4(RO)   : Done bit
+     *           Bit 3-0(RO) : Status
+     *                          Host Error    : 0x08
+     *                          Int_RAM Error : 0x04
+     *                          RISC Error    : 0x02
+     *                          SCSI Error    : 0x01
+     *                          No Error      : 0x00
+     *
+     * Note: RAM BIST code should be put right here, before loading the
+     * microcode and after saving the RISC memory BIOS region.
+     */
+
+    /*
+     * LRAM Pre-test
+     *
+     * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
+     * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
+     * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
+     * to NORMAL_MODE, return an error too.
+     */
+    for (i = 0; i < 2; i++)
+    {
+        AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE);
+        DvcSleepMilliSecond(10);  /* Wait for 10ms before reading back. */
+        byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
+        if ((byte & RAM_TEST_DONE) == 0 || (byte & 0x0F) != PRE_TEST_VALUE)
+        {
+            asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST;
+            return ADV_ERROR;
+        }
+
+        AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
+        DvcSleepMilliSecond(10);  /* Wait for 10ms before reading back. */
+        if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST)
+            != NORMAL_VALUE)
+        {
+            asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST;
+            return ADV_ERROR;
+        }
+    }
+
+    /*
+     * LRAM Test - It takes about 1.5 ms to run through the test.
+     *
+     * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
+     * If Done bit not set or Status not 0, save register byte, set the
+     * err_code, and return an error.
+     */
+    AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE);
+    DvcSleepMilliSecond(10);  /* Wait for 10ms before checking status. */
+
+    byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
+    if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0)
+    {
+        /* Get here if Done bit not set or Status not 0. */
+        asc_dvc->bist_err_code = byte;  /* for BIOS display message */
+        asc_dvc->err_code |= ASC_IERR_BIST_RAM_TEST;
+        return ADV_ERROR;
+    }
+
+    /* We need to reset back to normal mode after LRAM test passes. */
+    AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
+
+    /*
+     * Load the Microcode
+     *
+     * Write the microcode image to RISC memory starting at address 0.
+     *
+     */
+    AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0);
+
+    /*
+     * Assume the following compressed format of the microcode buffer:
+     *
+     *  254 word (508 byte) table indexed by byte code followed
+     *  by the following byte codes:
+     *
+     *    1-Byte Code:
+     *      00: Emit word 0 in table.
+     *      01: Emit word 1 in table.
+     *      .
+     *      FD: Emit word 253 in table.
+     *
+     *    Multi-Byte Code:
+     *      FE WW WW: (3 byte code) Word to emit is the next word WW WW.
+     *      FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
+     */
+    word = 0;
+    for (i = 253 * 2; i < _adv_asc38C1600_size; i++)
+    {
+        if (_adv_asc38C1600_buf[i] == 0xff)
+        {
+            for (j = 0; j < _adv_asc38C1600_buf[i + 1]; j++)
+            {
+                AdvWriteWordAutoIncLram(iop_base, (((ushort)
+                     _adv_asc38C1600_buf[i + 3] << 8) |
+                     _adv_asc38C1600_buf[i + 2]));
+                word++;
+            }
+           i += 3;
+        } else if (_adv_asc38C1600_buf[i] == 0xfe)
+        {
+                AdvWriteWordAutoIncLram(iop_base, (((ushort)
+                     _adv_asc38C1600_buf[i + 2] << 8) |
+                     _adv_asc38C1600_buf[i + 1]));
+            i += 2;
+            word++;
+        } else
+        {
+            AdvWriteWordAutoIncLram(iop_base, (((ushort)
+                 _adv_asc38C1600_buf[(_adv_asc38C1600_buf[i] * 2) + 1] << 8) |
+                 _adv_asc38C1600_buf[_adv_asc38C1600_buf[i] * 2]));
+            word++;
+        }
+    }
+
+    /*
+     * Set 'word' for later use to clear the rest of memory and save
+     * the expanded mcode size.
+     */
+    word *= 2;
+    adv_asc38C1600_expanded_size = word;
+
+    /*
+     * Clear the rest of ASC-38C1600 Internal RAM (32KB).
+     */
+    for (; word < ADV_38C1600_MEMSIZE; word += 2)
+    {
+        AdvWriteWordAutoIncLram(iop_base, 0);
+    }
+
+    /*
+     * Verify the microcode checksum.
+     */
+    sum = 0;
+    AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0);
+
+    for (word = 0; word < adv_asc38C1600_expanded_size; word += 2)
+    {
+        sum += AdvReadWordAutoIncLram(iop_base);
+    }
+
+    if (sum != _adv_asc38C1600_chksum)
+    {
+        asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM;
+        return ADV_ERROR;
+    }
+
+    /*
+     * Restore the RISC memory BIOS region.
+     */
+    for (i = 0; i < ASC_MC_BIOSLEN/2; i++)
+    {
+        AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]);
+    }
+
+    /*
+     * Calculate and write the microcode code checksum to the microcode
+     * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
+     */
+    AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr);
+    AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr);
+    code_sum = 0;
+    AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr);
+    for (word = begin_addr; word < end_addr; word += 2)
+    {
+        code_sum += AdvReadWordAutoIncLram(iop_base);
+    }
+    AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum);
+
+    /*
+     * Read microcode version and date.
+     */
+    AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, asc_dvc->cfg->mcode_date);
+    AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, asc_dvc->cfg->mcode_version);
+
+    /*
+     * Set the chip type to indicate the ASC38C1600.
+     */
+    AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C1600);
+
+    /*
+     * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
+     * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
+     * cable detection and then we are able to read C_DET[3:0].
+     *
+     * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
+     * Microcode Default Value' section below.
+     */
+    scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
+    AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, scsi_cfg1 | DIS_TERM_DRV);
+
+    /*
+     * If the PCI Configuration Command Register "Parity Error Response
+     * Control" Bit was clear (0), then set the microcode variable
+     * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
+     * to ignore DMA parity errors.
+     */
+    if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR)
+    {
+        AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
+        word |= CONTROL_FLAG_IGNORE_PERR;
+        AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
+    }
+
+    /*
+     * If the BIOS control flag AIPP (Asynchronous Information
+     * Phase Protection) disable bit is not set, then set the firmware
+     * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable
+     * AIPP checking and encoding.
+     */
+    if ((asc_dvc->bios_ctrl & BIOS_CTRL_AIPP_DIS) == 0)
+    {
+        AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
+        word |= CONTROL_FLAG_ENABLE_AIPP;
+        AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
+    }
+
+    /*
+     * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4],
+     * and START_CTL_TH [3:2].
+     */
+    AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0,
+        FIFO_THRESH_80B | START_CTL_TH | READ_CMD_MRM);
+
+    /*
+     * Microcode operating variables for WDTR, SDTR, and command tag
+     * queuing will be set in AdvInquiryHandling() based on what a
+     * device reports it is capable of in Inquiry byte 7.
+     *
+     * If SCSI Bus Resets have been disabled, then directly set
+     * SDTR and WDTR from the EEPROM configuration. This will allow
+     * the BIOS and warm boot to work without a SCSI bus hang on
+     * the Inquiry caused by host and target mismatched DTR values.
+     * Without the SCSI Bus Reset, before an Inquiry a device can't
+     * be assumed to be in Asynchronous, Narrow mode.
+     */
+    if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0)
+    {
+        AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, asc_dvc->wdtr_able);
+        AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, asc_dvc->sdtr_able);
+    }
+
+    /*
+     * Set microcode operating variables for DISC and SDTR_SPEED1,
+     * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
+     * configuration values.
+     *
+     * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
+     * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
+     * without determining here whether the device supports SDTR.
+     */
+    AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, asc_dvc->cfg->disc_enable);
+    AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1);
+    AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2);
+    AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3);
+    AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4);
+
+    /*
+     * Set SCSI_CFG0 Microcode Default Value.
+     *
+     * The microcode will set the SCSI_CFG0 register using this value
+     * after it is started below.
+     */
+    AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
+        PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
+        asc_dvc->chip_scsi_id);
+
+    /*
+     * Calculate SCSI_CFG1 Microcode Default Value.
+     *
+     * The microcode will set the SCSI_CFG1 register using this value
+     * after it is started below.
+     *
+     * Each ASC-38C1600 function has only two cable detect bits.
+     * The bus mode override bits are in IOPB_SOFT_OVER_WR.
+     */
+    scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
+
+    /*
+     * If the cable is reversed all of the SCSI_CTRL register signals
+     * will be set. Check for and return an error if this condition is
+     * found.
+     */
+    if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07)
+    {
+        asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE;
+        return ADV_ERROR;
+    }
+
+    /*
+     * Each ASC-38C1600 function has two connectors. Only an HVD device
+     * can not be connected to either connector. An LVD device or SE device
+     * may be connected to either connecor. If an SE device is connected,
+     * then at most Ultra speed (20 Mhz) can be used on both connectors.
+     *
+     * If an HVD device is attached, return an error.
+     */
+    if (scsi_cfg1 & HVD)
+    {
+        asc_dvc->err_code |= ASC_IERR_HVD_DEVICE;
+        return ADV_ERROR;
+    }
+
+    /*
+     * Each function in the ASC-38C1600 uses only the SE cable detect and
+     * termination because there are two connectors for each function. Each
+     * function may use either LVD or SE mode. Corresponding the SE automatic
+     * termination control EEPROM bits are used for each function. Each
+     * function has its own EEPROM. If SE automatic control is enabled for
+     * the function, then set the termination value based on a table listed
+     * in a_condor.h.
+     *
+     * If manual termination is specified in the EEPROM for the function,
+     * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is
+     * ready to be 'ored' into SCSI_CFG1.
+     */
+    if ((asc_dvc->cfg->termination & TERM_SE) == 0)
+    {
+        /* SE automatic termination control is enabled. */
+        switch(scsi_cfg1 & C_DET_SE)
+        {
+            /* TERM_SE_HI: on, TERM_SE_LO: on */
+            case 0x1: case 0x2: case 0x3:
+                asc_dvc->cfg->termination |= TERM_SE;
+                break;
+
+            case 0x0:
+                if (ASC_PCI_ID2FUNC(asc_dvc->cfg->pci_slot_info) == 0)
+                {
+                    /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */
+                }
+                else
+                {
+                    /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */
+                    asc_dvc->cfg->termination |= TERM_SE_HI;
+                }
+                break;
+        }
+    }
+
+    /*
+     * Clear any set TERM_SE bits.
+     */
+    scsi_cfg1 &= ~TERM_SE;
+
+    /*
+     * Invert the TERM_SE bits and then set 'scsi_cfg1'.
+     */
+    scsi_cfg1 |= (~asc_dvc->cfg->termination & TERM_SE);
+
+    /*
+     * Clear Big Endian and Terminator Polarity bits and set possibly
+     * modified termination control bits in the Microcode SCSI_CFG1
+     * Register Value.
+     */
+    scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL);
+
+    /*
+     * Set SCSI_CFG1 Microcode Default Value
+     *
+     * Set possibly modified termination control bits in the Microcode
+     * SCSI_CFG1 Register Value.
+     *
+     * The microcode will set the SCSI_CFG1 register using this value
+     * after it is started below.
+     */
+    AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1);
+
+    /*
+     * Set MEM_CFG Microcode Default Value
+     *
+     * The microcode will set the MEM_CFG register using this value
+     * after it is started below.
+     *
+     * MEM_CFG may be accessed as a word or byte, but only bits 0-7
+     * are defined.
+     *
+     * ASC-38C1600 has 32KB internal memory.
+     *
+     * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come
+     * out a special 16K Adv Library and Microcode version. After the issue
+     * resolved, we should turn back to the 32K support. Both a_condor.h and
+     * mcode.sas files also need to be updated.
+     *
+     * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
+     *  BIOS_EN | RAM_SZ_32KB);
+     */
+     AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, BIOS_EN | RAM_SZ_16KB);
+
+    /*
+     * Set SEL_MASK Microcode Default Value
+     *
+     * The microcode will set the SEL_MASK register using this value
+     * after it is started below.
+     */
+    AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK,
+        ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id));
+
+    /*
+     * Build the carrier freelist.
+     *
+     * Driver must have already allocated memory and set 'carrier_buf'.
+     */
+
+    ASC_ASSERT(asc_dvc->carrier_buf != NULL);
+
+    carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf);
+    asc_dvc->carr_freelist = NULL;
+    if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf)
+    {
+        buf_size = ADV_CARRIER_BUFSIZE;
+    } else
+    {
+        buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T);
+    }
+
+    do {
+        /*
+         * Get physical address for the carrier 'carrp'.
+         */
+        contig_len = sizeof(ADV_CARR_T);
+        carr_paddr = cpu_to_le32(DvcGetPhyAddr(asc_dvc, NULL, (uchar *) carrp,
+            (ADV_SDCNT *) &contig_len, ADV_IS_CARRIER_FLAG));
+
+        buf_size -= sizeof(ADV_CARR_T);
+
+        /*
+         * If the current carrier is not physically contiguous, then
+         * maybe there was a page crossing. Try the next carrier aligned
+         * start address.
+         */
+        if (contig_len < sizeof(ADV_CARR_T))
+        {
+            carrp++;
+            continue;
+        }
+
+        carrp->carr_pa = carr_paddr;
+        carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp));
+
+        /*
+         * Insert the carrier at the beginning of the freelist.
+         */
+        carrp->next_vpa = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
+        asc_dvc->carr_freelist = carrp;
+
+        carrp++;
+    }
+    while (buf_size > 0);
+
+    /*
+     * Set-up the Host->RISC Initiator Command Queue (ICQ).
+     */
+    if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL)
+    {
+        asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
+        return ADV_ERROR;
+    }
+    asc_dvc->carr_freelist =
+        (ADV_CARR_T *) ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
+
+    /*
+     * The first command issued will be placed in the stopper carrier.
+     */
+    asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
+
+    /*
+     * Set RISC ICQ physical address start value. Initialize the
+     * COMMA register to the same value otherwise the RISC will
+     * prematurely detect a command is available.
+     */
+    AdvWriteDWordLram(iop_base, ASC_MC_ICQ, 
+		      /* carr_pa is stored LE, must be native before write */
+		      le32_to_cpu(asc_dvc->icq_sp->carr_pa));
+    AdvWriteDWordRegister(iop_base, IOPDW_COMMA, 
+			  le32_to_cpu(asc_dvc->icq_sp->carr_pa));
+
+    /*
+     * Set-up the RISC->Host Initiator Response Queue (IRQ).
+     */
+    if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL)
+    {
+        asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
+        return ADV_ERROR;
+    }
+    asc_dvc->carr_freelist =
+        (ADV_CARR_T *) ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
+
+    /*
+     * The first command completed by the RISC will be placed in
+     * the stopper.
+     *
+     * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
+     * completed the RISC will set the ASC_RQ_STOPPER bit.
+     */
+    asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
+
+    /*
+     * Set RISC IRQ physical address start value.
+     */
+    AdvWriteDWordLram(iop_base, ASC_MC_IRQ,
+	/* carr_pa is LE, must be native before write */
+        le32_to_cpu(asc_dvc->irq_sp->carr_pa));
+    asc_dvc->carr_pending_cnt = 0;
+
+    AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
+        (ADV_INTR_ENABLE_HOST_INTR | ADV_INTR_ENABLE_GLOBAL_INTR));
+    AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
+    AdvWriteWordRegister(iop_base, IOPW_PC, word);
+
+    /* finally, finally, gentlemen, start your engine */
+    AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN);
+
+    /*
+     * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
+     * Resets should be performed. The RISC has to be running
+     * to issue a SCSI Bus Reset.
+     */
+    if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS)
+    {
+        /*
+         * If the BIOS Signature is present in memory, restore the
+         * per TID microcode operating variables.
+         */
+        if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM)/2] == 0x55AA)
+        {
+            /*
+             * Restore per TID negotiated values.
+             */
+            AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
+            AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
+            AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
+            AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
+            for (tid = 0; tid <= ASC_MAX_TID; tid++)
+            {
+                AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
+                    max_cmd[tid]);
+            }
+        } else
+        {
+            if (AdvResetSB(asc_dvc) != ADV_TRUE)
+            {
+                warn_code = ASC_WARN_BUSRESET_ERROR;
+            }
+        }
+    }
+
+    return warn_code;
+}
+
+/*
+ * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
+ * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
+ * all of this is done.
+ *
+ * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
+ *
+ * For a non-fatal error return a warning code. If there are no warnings
+ * then 0 is returned.
+ *
+ * Note: Chip is stopped on entry.
+ */
+ASC_INITFUNC(
+STATIC int,
+AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc)
+)
+{
+    AdvPortAddr         iop_base;
+    ushort              warn_code;
+    ADVEEP_3550_CONFIG  eep_config;
+    int                 i;
+
+    iop_base = asc_dvc->iop_base;
+
+    warn_code = 0;
+
+    /*
+     * Read the board's EEPROM configuration.
+     *
+     * Set default values if a bad checksum is found.
+     *
+     * XXX - Don't handle big-endian access to EEPROM yet.
+     */
+    if (AdvGet3550EEPConfig(iop_base, &eep_config) != eep_config.check_sum)
+    {
+        warn_code |= ASC_WARN_EEPROM_CHKSUM;
+
+        /*
+         * Set EEPROM default values.
+         */
+        for (i = 0; i < sizeof(ADVEEP_3550_CONFIG); i++)
+        {
+            *((uchar *) &eep_config + i) =
+                *((uchar *) &Default_3550_EEPROM_Config + i);
+        }
+
+        /*
+         * Assume the 6 byte board serial number that was read
+         * from EEPROM is correct even if the EEPROM checksum
+         * failed.
+         */
+        eep_config.serial_number_word3 =
+            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 1);
+
+        eep_config.serial_number_word2 =
+            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 2);
+
+        eep_config.serial_number_word1 =
+            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 3);
+
+        AdvSet3550EEPConfig(iop_base, &eep_config);
+    }
+    /*
+     * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
+     * EEPROM configuration that was read.
+     *
+     * This is the mapping of EEPROM fields to Adv Library fields.
+     */
+    asc_dvc->wdtr_able = eep_config.wdtr_able;
+    asc_dvc->sdtr_able = eep_config.sdtr_able;
+    asc_dvc->ultra_able = eep_config.ultra_able;
+    asc_dvc->tagqng_able = eep_config.tagqng_able;
+    asc_dvc->cfg->disc_enable = eep_config.disc_enable;
+    asc_dvc->max_host_qng = eep_config.max_host_qng;
+    asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
+    asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID);
+    asc_dvc->start_motor = eep_config.start_motor;
+    asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay;
+    asc_dvc->bios_ctrl = eep_config.bios_ctrl;
+    asc_dvc->no_scam = eep_config.scam_tolerant;
+    asc_dvc->cfg->serial1 = eep_config.serial_number_word1;
+    asc_dvc->cfg->serial2 = eep_config.serial_number_word2;
+    asc_dvc->cfg->serial3 = eep_config.serial_number_word3;
+
+    /*
+     * Set the host maximum queuing (max. 253, min. 16) and the per device
+     * maximum queuing (max. 63, min. 4).
+     */
+    if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG)
+    {
+        eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
+    } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG)
+    {
+        /* If the value is zero, assume it is uninitialized. */
+        if (eep_config.max_host_qng == 0)
+        {
+            eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
+        } else
+        {
+            eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG;
+        }
+    }
+
+    if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG)
+    {
+        eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
+    } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG)
+    {
+        /* If the value is zero, assume it is uninitialized. */
+        if (eep_config.max_dvc_qng == 0)
+        {
+            eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
+        } else
+        {
+            eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG;
+        }
+    }
+
+    /*
+     * If 'max_dvc_qng' is greater than 'max_host_qng', then
+     * set 'max_dvc_qng' to 'max_host_qng'.
+     */
+    if (eep_config.max_dvc_qng > eep_config.max_host_qng)
+    {
+        eep_config.max_dvc_qng = eep_config.max_host_qng;
+    }
+
+    /*
+     * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
+     * values based on possibly adjusted EEPROM values.
+     */
+    asc_dvc->max_host_qng = eep_config.max_host_qng;
+    asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
+
+
+    /*
+     * If the EEPROM 'termination' field is set to automatic (0), then set
+     * the ADV_DVC_CFG 'termination' field to automatic also.
+     *
+     * If the termination is specified with a non-zero 'termination'
+     * value check that a legal value is set and set the ADV_DVC_CFG
+     * 'termination' field appropriately.
+     */
+    if (eep_config.termination == 0)
+    {
+        asc_dvc->cfg->termination = 0;    /* auto termination */
+    } else
+    {
+        /* Enable manual control with low off / high off. */
+        if (eep_config.termination == 1)
+        {
+            asc_dvc->cfg->termination = TERM_CTL_SEL;
+
+        /* Enable manual control with low off / high on. */
+        } else if (eep_config.termination == 2)
+        {
+            asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H;
+
+        /* Enable manual control with low on / high on. */
+        } else if (eep_config.termination == 3)
+        {
+            asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H | TERM_CTL_L;
+        } else
+        {
+            /*
+             * The EEPROM 'termination' field contains a bad value. Use
+             * automatic termination instead.
+             */
+            asc_dvc->cfg->termination = 0;
+            warn_code |= ASC_WARN_EEPROM_TERMINATION;
+        }
+    }
+
+    return warn_code;
+}
+
+/*
+ * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
+ * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
+ * all of this is done.
+ *
+ * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
+ *
+ * For a non-fatal error return a warning code. If there are no warnings
+ * then 0 is returned.
+ *
+ * Note: Chip is stopped on entry.
+ */
+ASC_INITFUNC(
+STATIC int,
+AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc)
+)
+{
+    AdvPortAddr              iop_base;
+    ushort                   warn_code;
+    ADVEEP_38C0800_CONFIG    eep_config;
+    int                      i;
+    uchar                    tid, termination;
+    ushort                   sdtr_speed = 0;
+
+    iop_base = asc_dvc->iop_base;
+
+    warn_code = 0;
+
+    /*
+     * Read the board's EEPROM configuration.
+     *
+     * Set default values if a bad checksum is found.
+     *
+     * XXX - Don't handle big-endian access to EEPROM yet.
+     */
+    if (AdvGet38C0800EEPConfig(iop_base, &eep_config) != eep_config.check_sum)
+    {
+        warn_code |= ASC_WARN_EEPROM_CHKSUM;
+
+        /*
+         * Set EEPROM default values.
+         */
+        for (i = 0; i < sizeof(ADVEEP_38C0800_CONFIG); i++)
+        {
+            *((uchar *) &eep_config + i) =
+                *((uchar *) &Default_38C0800_EEPROM_Config + i);
+        }
+
+        /*
+         * Assume the 6 byte board serial number that was read
+         * from EEPROM is correct even if the EEPROM checksum
+         * failed.
+         */
+        eep_config.serial_number_word3 =
+            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 1);
+
+        eep_config.serial_number_word2 =
+            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 2);
+
+        eep_config.serial_number_word1 =
+            AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 3);
+
+        AdvSet38C0800EEPConfig(iop_base, &eep_config);
+    }
+    /*
+     * Set ADV_DVC_VAR and ADV_DVC_CFG variables from the
+     * EEPROM configuration that was read.
+     *
+     * This is the mapping of EEPROM fields to Adv Library fields.
      */
     asc_dvc->wdtr_able = eep_config.wdtr_able;
-    asc_dvc->sdtr_able = eep_config.sdtr_able;
-    asc_dvc->ultra_able = eep_config.ultra_able;
+    asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1;
+    asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2;
+    asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3;
+    asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4;
     asc_dvc->tagqng_able = eep_config.tagqng_able;
     asc_dvc->cfg->disc_enable = eep_config.disc_enable;
     asc_dvc->max_host_qng = eep_config.max_host_qng;
@@ -16998,6 +19224,33 @@
     asc_dvc->cfg->serial3 = eep_config.serial_number_word3;
 
     /*
+     * For every Target ID if any of its 'sdtr_speed[1234]' bits
+     * are set, then set an 'sdtr_able' bit for it.
+     */
+    asc_dvc->sdtr_able = 0;
+    for (tid = 0; tid <= ADV_MAX_TID; tid++)
+    {
+        if (tid == 0)
+        {
+            sdtr_speed = asc_dvc->sdtr_speed1;
+        } else if (tid == 4)
+        {
+            sdtr_speed = asc_dvc->sdtr_speed2;
+        } else if (tid == 8)
+        {
+            sdtr_speed = asc_dvc->sdtr_speed3;
+        } else if (tid == 12)
+        {
+            sdtr_speed = asc_dvc->sdtr_speed4;
+        }
+        if (sdtr_speed & ADV_MAX_TID)
+        {
+            asc_dvc->sdtr_able |= (1 << tid);
+        }
+        sdtr_speed >>= 4;
+    }
+
+    /*
      * Set the host maximum queuing (max. 253, min. 16) and the per device
      * maximum queuing (max. 63, min. 4).
      */
@@ -17047,7 +19300,6 @@
     asc_dvc->max_host_qng = eep_config.max_host_qng;
     asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
 
-
     /*
      * If the EEPROM 'termination' field is set to automatic (0), then set
      * the ADV_DVC_CFG 'termination' field to automatic also.
@@ -17056,32 +19308,63 @@
      * value check that a legal value is set and set the ADV_DVC_CFG
      * 'termination' field appropriately.
      */
-    if (eep_config.termination == 0)
+    if (eep_config.termination_se == 0)
     {
-        asc_dvc->cfg->termination = 0;    /* auto termination */
+        termination = 0;                         /* auto termination for SE */
     } else
     {
         /* Enable manual control with low off / high off. */
-        if (eep_config.termination == 1)
+        if (eep_config.termination_se == 1)
         {
-            asc_dvc->cfg->termination = TERM_CTL_SEL;
+            termination = 0;
 
         /* Enable manual control with low off / high on. */
-        } else if (eep_config.termination == 2)
+        } else if (eep_config.termination_se == 2)
         {
-            asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H;
+            termination = TERM_SE_HI;
 
         /* Enable manual control with low on / high on. */
-        } else if (eep_config.termination == 3)
+        } else if (eep_config.termination_se == 3)
         {
-            asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H | TERM_CTL_L;
+            termination = TERM_SE;
         } else
         {
             /*
-             * The EEPROM 'termination' field contains a bad value. Use
-             * automatic termination instead.
+             * The EEPROM 'termination_se' field contains a bad value.
+             * Use automatic termination instead.
              */
-            asc_dvc->cfg->termination = 0;
+            termination = 0;
+            warn_code |= ASC_WARN_EEPROM_TERMINATION;
+        }
+    }
+
+    if (eep_config.termination_lvd == 0)
+    {
+        asc_dvc->cfg->termination = termination; /* auto termination for LVD */
+    } else
+    {
+        /* Enable manual control with low off / high off. */
+        if (eep_config.termination_lvd == 1)
+        {
+            asc_dvc->cfg->termination = termination;
+
+        /* Enable manual control with low off / high on. */
+        } else if (eep_config.termination_lvd == 2)
+        {
+            asc_dvc->cfg->termination = termination | TERM_LVD_HI;
+
+        /* Enable manual control with low on / high on. */
+        } else if (eep_config.termination_lvd == 3)
+        {
+            asc_dvc->cfg->termination =
+                termination | TERM_LVD;
+        } else
+        {
+            /*
+             * The EEPROM 'termination_lvd' field contains a bad value.
+             * Use automatic termination instead.
+             */
+            asc_dvc->cfg->termination = termination;
             warn_code |= ASC_WARN_EEPROM_TERMINATION;
         }
     }
@@ -17090,11 +19373,11 @@
 }
 
 /*
- * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
- * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
+ * Read the board's EEPROM configuration. Set fields in ASC_DVC_VAR and
+ * ASC_DVC_CFG based on the EEPROM settings. The chip is stopped while
  * all of this is done.
  *
- * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
+ * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
  *
  * For a non-fatal error return a warning code. If there are no warnings
  * then 0 is returned.
@@ -17103,12 +19386,12 @@
  */
 ASC_INITFUNC(
 STATIC int,
-AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc)
+AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc)
 )
 {
     AdvPortAddr              iop_base;
     ushort                   warn_code;
-    ADVEEP_38C0800_CONFIG    eep_config;
+    ADVEEP_38C1600_CONFIG    eep_config;
     int                      i;
     uchar                    tid, termination;
     ushort                   sdtr_speed = 0;
@@ -17121,20 +19404,59 @@
      * Read the board's EEPROM configuration.
      *
      * Set default values if a bad checksum is found.
-     *
-     * XXX - Don't handle big-endian access to EEPROM yet.
      */
-    if (AdvGet38C0800EEPConfig(iop_base, &eep_config) != eep_config.check_sum)
+    if (AdvGet38C1600EEPConfig(iop_base, &eep_config) != eep_config.check_sum)
     {
         warn_code |= ASC_WARN_EEPROM_CHKSUM;
 
         /*
          * Set EEPROM default values.
          */
-        for (i = 0; i < sizeof(ADVEEP_38C0800_CONFIG); i++)
+        for (i = 0; i < sizeof(ADVEEP_38C1600_CONFIG); i++)
         {
-            *((uchar *) &eep_config + i) =
-                *((uchar *) &Default_38C0800_EEPROM_Config + i);
+            if (i == 1 && ASC_PCI_ID2FUNC(asc_dvc->cfg->pci_slot_info) != 0)
+            {
+                /*
+                 * Set Function 1 EEPROM Word 0 MSB
+                 *
+                 * Clear the BIOS_ENABLE (bit 14) and INTAB (bit 11)
+                 * EEPROM bits.
+                 *
+                 * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60 and
+                 * old Mac system booting problem. The Expansion ROM must
+                 * be disabled in Function 1 for these systems.
+                 *
+                 */
+                *((uchar *) &eep_config + i) =
+                ((*((uchar *) &Default_38C1600_EEPROM_Config + i)) &
+                    (~(((ADV_EEPROM_BIOS_ENABLE | ADV_EEPROM_INTAB) >> 8) &
+                     0xFF)));
+
+                /*
+                 * Set the INTAB (bit 11) if the GPIO 0 input indicates
+                 * the Function 1 interrupt line is wired to INTA.
+                 *
+                 * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input:
+                 *   1 - Function 1 interrupt line wired to INT A.
+                 *   0 - Function 1 interrupt line wired to INT B.
+                 *
+                 * Note: Adapter boards always have Function 0 wired to INTA.
+                 * Put all 5 GPIO bits in input mode and then read
+                 * their input values.
+                 */
+                AdvWriteByteRegister(iop_base, IOPB_GPIO_CNTL, 0);
+                if (AdvReadByteRegister(iop_base, IOPB_GPIO_DATA) & 0x01)
+                {
+                    /* Function 1 interrupt wired to INTA; Set EEPROM bit. */
+                *((uchar *) &eep_config + i) |=
+                    ((ADV_EEPROM_INTAB >> 8) & 0xFF);
+                }
+            }
+            else
+            {
+                *((uchar *) &eep_config + i) =
+                *((uchar *) &Default_38C1600_EEPROM_Config + i);
+            }
         }
 
         /*
@@ -17151,10 +19473,11 @@
         eep_config.serial_number_word1 =
             AdvReadEEPWord(iop_base, ASC_EEP_DVC_CFG_END - 3);
 
-        AdvSet38C0800EEPConfig(iop_base, &eep_config);
+        AdvSet38C1600EEPConfig(iop_base, &eep_config);
     }
+
     /*
-     * Set ADV_DVC_VAR and ADV_DVC_CFG variables from the
+     * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
      * EEPROM configuration that was read.
      *
      * This is the mapping of EEPROM fields to Adv Library fields.
@@ -17164,25 +19487,23 @@
     asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2;
     asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3;
     asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4;
+    asc_dvc->ppr_able = 0;
     asc_dvc->tagqng_able = eep_config.tagqng_able;
     asc_dvc->cfg->disc_enable = eep_config.disc_enable;
     asc_dvc->max_host_qng = eep_config.max_host_qng;
     asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
-    asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID);
+    asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ASC_MAX_TID);
     asc_dvc->start_motor = eep_config.start_motor;
     asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay;
     asc_dvc->bios_ctrl = eep_config.bios_ctrl;
     asc_dvc->no_scam = eep_config.scam_tolerant;
-    asc_dvc->cfg->serial1 = eep_config.serial_number_word1;
-    asc_dvc->cfg->serial2 = eep_config.serial_number_word2;
-    asc_dvc->cfg->serial3 = eep_config.serial_number_word3;
 
     /*
      * For every Target ID if any of its 'sdtr_speed[1234]' bits
      * are set, then set an 'sdtr_able' bit for it.
      */
     asc_dvc->sdtr_able = 0;
-    for (tid = 0; tid <= ADV_MAX_TID; tid++)
+    for (tid = 0; tid <= ASC_MAX_TID; tid++)
     {
         if (tid == 0)
         {
@@ -17197,7 +19518,7 @@
         {
             sdtr_speed = asc_dvc->sdtr_speed4;
         }
-        if (sdtr_speed & ADV_MAX_TID)
+        if (sdtr_speed & ASC_MAX_TID)
         {
             asc_dvc->sdtr_able |= (1 << tid);
         }
@@ -17248,7 +19569,7 @@
     }
 
     /*
-     * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
+     * Set ASC_DVC_VAR 'max_host_qng' and ASC_DVC_VAR 'max_dvc_qng'
      * values based on possibly adjusted EEPROM values.
      */
     asc_dvc->max_host_qng = eep_config.max_host_qng;
@@ -17256,10 +19577,10 @@
 
     /*
      * If the EEPROM 'termination' field is set to automatic (0), then set
-     * the ADV_DVC_CFG 'termination' field to automatic also.
+     * the ASC_DVC_CFG 'termination' field to automatic also.
      *
      * If the termination is specified with a non-zero 'termination'
-     * value check that a legal value is set and set the ADV_DVC_CFG
+     * value check that a legal value is set and set the ASC_DVC_CFG
      * 'termination' field appropriately.
      */
     if (eep_config.termination_se == 0)
@@ -17339,7 +19660,12 @@
     ushort              wval, chksum;
     ushort              *wbuf;
     int                 eep_addr;
+    ushort		*charfields;
 
+    /* Charfields will tell us which words coming from the EEProm should not
+       be byteswapped, because they are not a single short but a pair of
+       chars. */
+    charfields = (ushort*) &ADVEEP_3550_Config_Field_IsChar;
     wbuf = (ushort *) cfg_buf;
     chksum = 0;
 
@@ -17349,15 +19675,23 @@
     {
         wval = AdvReadEEPWord(iop_base, eep_addr);
         chksum += wval;
-        *wbuf = wval;
+	/* swap back as needed */
+	if (*charfields++)
+	  *wbuf = cpu_to_le16(wval);
+	else
+	  *wbuf = wval;
     }
     *wbuf = AdvReadEEPWord(iop_base, eep_addr);
+    if (*charfields++)
+      *wbuf = cpu_to_le16(*wbuf);
     wbuf++;
     for (eep_addr = ASC_EEP_DVC_CTL_BEGIN;
          eep_addr < ASC_EEP_MAX_WORD_ADDR;
          eep_addr++, wbuf++)
     {
         *wbuf = AdvReadEEPWord(iop_base, eep_addr);
+	if (*charfields++)
+	  *wbuf = cpu_to_le16(*wbuf);
     }
     return chksum;
 }
@@ -17376,7 +19710,12 @@
     ushort              wval, chksum;
     ushort              *wbuf;
     int                 eep_addr;
+    ushort              *charfields;
 
+    /* Charfields will tell us which words coming from the EEProm should not
+       be byteswapped, because they are not a single short but a pair of
+       chars. */
+    charfields = (ushort*) &ADVEEP_38C0800_Config_Field_IsChar;
     wbuf = (ushort *) cfg_buf;
     chksum = 0;
 
@@ -17386,19 +19725,76 @@
     {
         wval = AdvReadEEPWord(iop_base, eep_addr);
         chksum += wval;
-        *wbuf = wval;
+	/* swap back as needed */
+	if (*charfields++)
+	  *wbuf = cpu_to_le16(wval);
+	else
+	  *wbuf = wval;
     }
     *wbuf = AdvReadEEPWord(iop_base, eep_addr);
+    if (*charfields++)
+      *wbuf = cpu_to_le16(*wbuf);
     wbuf++;
     for (eep_addr = ASC_EEP_DVC_CTL_BEGIN;
          eep_addr < ASC_EEP_MAX_WORD_ADDR;
          eep_addr++, wbuf++)
     {
         *wbuf = AdvReadEEPWord(iop_base, eep_addr);
+	if (*charfields++)
+	  *wbuf = cpu_to_le16(*wbuf);
     }
     return chksum;
 }
 
+/*
+ * Read EEPROM configuration into the specified buffer.
+ *
+ * Return a checksum based on the EEPROM configuration read.
+ */
+ASC_INITFUNC(
+STATIC ushort,
+AdvGet38C1600EEPConfig(AdvPortAddr iop_base,
+                       ADVEEP_38C1600_CONFIG *cfg_buf)
+)
+{
+    ushort              wval, chksum;
+    ushort              *wbuf;
+    int                 eep_addr;
+    ushort		*charfields;
+
+    /* Charfields will tell us which words coming from the EEProm should not
+       be byteswapped, because they are not a single short but a pair of
+       chars. */
+    charfields = (ushort*) &ADVEEP_38C1600_Config_Field_IsChar;
+    wbuf = (ushort *) cfg_buf;
+    chksum = 0;
+
+    for (eep_addr = ASC_EEP_DVC_CFG_BEGIN;
+         eep_addr < ASC_EEP_DVC_CFG_END;
+         eep_addr++, wbuf++)
+    {
+        wval = AdvReadEEPWord(iop_base, eep_addr);
+        chksum += wval;
+	/* swap back as needed */
+	if (*charfields++)
+	  *wbuf = cpu_to_le16(wval);
+	else
+	  *wbuf = wval;
+    }
+    *wbuf = AdvReadEEPWord(iop_base, eep_addr);
+    if (*charfields++)
+      *wbuf = cpu_to_le16(*wbuf);
+    wbuf++;
+    for (eep_addr = ASC_EEP_DVC_CTL_BEGIN;
+         eep_addr < ASC_EEP_MAX_WORD_ADDR;
+         eep_addr++, wbuf++)
+    {
+        *wbuf = AdvReadEEPWord(iop_base, eep_addr);
+	if (*charfields++)
+	  *wbuf = cpu_to_le16(*wbuf);
+    }
+    return chksum;
+}
 
 /*
  * Read the EEPROM from specified location
@@ -17447,8 +19843,10 @@
 {
     ushort *wbuf;
     ushort addr, chksum;
+    ushort *charfields;
 
     wbuf = (ushort *) cfg_buf;
+    charfields = (ushort *) &ADVEEP_3550_Config_Field_IsChar;
     chksum = 0;
 
     AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
@@ -17460,8 +19858,15 @@
     for (addr = ASC_EEP_DVC_CFG_BEGIN;
          addr < ASC_EEP_DVC_CFG_END; addr++, wbuf++)
     {
-        chksum += *wbuf;
-        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, *wbuf);
+	ushort tmp;
+	if (charfields++) {
+	    uchar *cbuf = (uchar *) wbuf;
+	    tmp = *cbuf + ((*(cbuf + 1)) << 8);
+	}
+	else
+	    tmp = *wbuf;
+        chksum += tmp;
+        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, tmp);
         AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
         AdvWaitEEPCmd(iop_base);
         DvcSleepMilliSecond(ASC_EEP_DELAY_MS);
@@ -17481,7 +19886,11 @@
     for (addr = ASC_EEP_DVC_CTL_BEGIN;
          addr < ASC_EEP_MAX_WORD_ADDR; addr++, wbuf++)
     {
-        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, *wbuf);
+	uchar *cbuf;
+	ushort tmp;
+	cbuf = (uchar *) wbuf;
+	tmp = *cbuf + ((*(cbuf + 1)) << 8);
+        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, tmp);
         AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
         AdvWaitEEPCmd(iop_base);
     }
@@ -17498,9 +19907,76 @@
                        ADVEEP_38C0800_CONFIG *cfg_buf)
 {
     ushort *wbuf;
+    ushort *charfields;
     ushort addr, chksum;
 
     wbuf = (ushort *) cfg_buf;
+    charfields = (ushort *) &ADVEEP_38C0800_Config_Field_IsChar;
+    chksum = 0;
+
+    AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
+    AdvWaitEEPCmd(iop_base);
+
+    /*
+     * Write EEPROM from word 0 to word 20
+     */
+    for (addr = ASC_EEP_DVC_CFG_BEGIN;
+         addr < ASC_EEP_DVC_CFG_END; addr++, wbuf++)
+    {
+	ushort tmp;
+	if (*charfields++) {
+	    uchar *cbuf = (uchar *) wbuf;
+	    tmp = *cbuf + ((*(cbuf + 1)) << 8);
+	}
+	else
+	    tmp = *wbuf;
+        chksum += tmp;
+        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, tmp);
+        AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
+        AdvWaitEEPCmd(iop_base);
+        DvcSleepMilliSecond(ASC_EEP_DELAY_MS);
+    }
+
+    /*
+     * Write EEPROM checksum at word 21
+     */
+    AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum);
+    AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
+    AdvWaitEEPCmd(iop_base);
+    wbuf++;        /* skip over check_sum */
+
+    /*
+     * Write EEPROM OEM name at words 22 to 29
+     */
+    for (addr = ASC_EEP_DVC_CTL_BEGIN;
+         addr < ASC_EEP_MAX_WORD_ADDR; addr++, wbuf++)
+    {
+	uchar *cbuf;
+	ushort tmp;
+	cbuf = (uchar *) wbuf;
+	tmp = *cbuf + ((*(cbuf + 1)) << 8);
+        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, tmp);
+        AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
+        AdvWaitEEPCmd(iop_base);
+    }
+    AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE);
+    AdvWaitEEPCmd(iop_base);
+    return;
+}
+
+/*
+ * Write the EEPROM from 'cfg_buf'.
+ */
+void
+AdvSet38C1600EEPConfig(AdvPortAddr iop_base,
+                       ADVEEP_38C1600_CONFIG *cfg_buf)
+{
+    ushort              *wbuf;
+    ushort		*charfields;
+    ushort              addr, chksum;
+
+    wbuf = (ushort *) cfg_buf;
+    charfields = (ushort *) &ADVEEP_38C1600_Config_Field_IsChar;
     chksum = 0;
 
     AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
@@ -17512,8 +19988,15 @@
     for (addr = ASC_EEP_DVC_CFG_BEGIN;
          addr < ASC_EEP_DVC_CFG_END; addr++, wbuf++)
     {
-        chksum += *wbuf;
-        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, *wbuf);
+	ushort tmp;
+	if (*charfields++) {
+	    uchar *cbuf = (uchar *) wbuf;
+	    tmp = *cbuf + ((*(cbuf + 1)) << 8);
+	}
+	else
+	    tmp = *wbuf;
+        chksum += tmp;
+        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, tmp);
         AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
         AdvWaitEEPCmd(iop_base);
         DvcSleepMilliSecond(ASC_EEP_DELAY_MS);
@@ -17533,7 +20016,11 @@
     for (addr = ASC_EEP_DVC_CTL_BEGIN;
          addr < ASC_EEP_MAX_WORD_ADDR; addr++, wbuf++)
     {
-        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, *wbuf);
+	uchar *cbuf;
+	ushort tmp;
+	cbuf = (uchar *) wbuf;
+	tmp = *cbuf + ((*(cbuf + 1)) << 8);
+        AdvWriteWordRegister(iop_base, IOPW_EE_DATA, tmp);
         AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
         AdvWaitEEPCmd(iop_base);
     }
@@ -17599,7 +20086,7 @@
        return ADV_BUSY;
     }
     asc_dvc->carr_freelist =
-        (ADV_CARR_T *) ADV_U32_TO_VADDR(new_carrp->next_vpa);
+        (ADV_CARR_T *) ADV_U32_TO_VADDR(le32_to_cpu(new_carrp->next_vpa));
     asc_dvc->carr_pending_cnt++;
 
     /*
@@ -17607,7 +20094,7 @@
      * to the stopper value. The current stopper will be changed
      * below to point to the new stopper.
      */
-    new_carrp->next_vpa = ASC_CQ_STOPPER;
+    new_carrp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
 
     /*
      * Clear the ADV_SCSI_REQ_Q done flag.
@@ -17615,17 +20102,20 @@
     scsiq->a_flag &= ~ADV_SCSIQ_DONE;
 
     req_size = sizeof(ADV_SCSI_REQ_Q);
-    req_paddr = cpu_to_le32(DvcGetPhyAddr(asc_dvc, scsiq, (uchar *) scsiq,
-        (ADV_SDCNT *) &req_size, ADV_IS_SCSIQ_FLAG));
+    req_paddr = DvcGetPhyAddr(asc_dvc, scsiq, (uchar *) scsiq,
+        (ADV_SDCNT *) &req_size, ADV_IS_SCSIQ_FLAG);
 
-    ASC_ASSERT(ADV_DWALIGN(req_paddr) == req_paddr);
+    ASC_ASSERT(ADV_8BALIGN(req_paddr) == req_paddr);
     ASC_ASSERT(req_size >= sizeof(ADV_SCSI_REQ_Q));
 
+    /* Wait for assertion before making little-endian */
+    req_paddr = cpu_to_le32(req_paddr);
+
     /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */
-    scsiq->scsiq_ptr = ADV_VADDR_TO_U32(scsiq);
+    scsiq->scsiq_ptr = cpu_to_le32(ADV_VADDR_TO_U32(scsiq));
     scsiq->scsiq_rptr = req_paddr;
 
-    scsiq->carr_va = ADV_VADDR_TO_U32(asc_dvc->icq_sp);
+    scsiq->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->icq_sp));
     /*
      * Every ADV_CARR_T.carr_pa is byte swapped to little-endian
      * order during initialization.
@@ -17651,18 +20141,31 @@
      */
     asc_dvc->icq_sp = new_carrp;
 
-    /*
-     * Tickle the RISC to tell it to read its Command Queue Head pointer.
-     */
-    AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A);
-    if (asc_dvc->chip_type == ADV_CHIP_ASC3550)
+    if (asc_dvc->chip_type == ADV_CHIP_ASC3550 ||
+        asc_dvc->chip_type == ADV_CHIP_ASC38C0800)
     {
         /*
-         * Clear the tickle value. In the ASC-3550 the RISC flag
-         * command 'clr_tickle_a' does not work unless the host
-         * value is cleared.
+         * Tickle the RISC to tell it to read its Command Queue Head pointer.
          */
-        AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP);
+        AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A);
+        if (asc_dvc->chip_type == ADV_CHIP_ASC3550)
+        {
+            /*
+             * Clear the tickle value. In the ASC-3550 the RISC flag
+             * command 'clr_tickle_a' does not work unless the host
+             * value is cleared.
+             */
+            AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP);
+        }
+    } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600)
+    {
+        /*
+         * Notify the RISC a carrier is ready by writing the physical
+         * address of the new carrier stopper to the COMMA register.
+         */
+        AdvWriteDWordRegister(iop_base, IOPDW_COMMA, 
+			      /* carr_pa is LE, must be native before write */
+			      le32_to_cpu(new_carrp->carr_pa));
     }
 
     DvcLeaveCritical(last_int_level);
@@ -17729,6 +20232,7 @@
 {
     int         status;
     ushort      wdtr_able, sdtr_able, tagqng_able;
+    ushort      ppr_able = 0;
     uchar       tid, max_cmd[ADV_MAX_TID + 1];
     AdvPortAddr iop_base;
     ushort      bios_sig;
@@ -17740,6 +20244,10 @@
      */
     AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
     AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
+    if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600)
+    {
+        AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
+    }
     AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
     for (tid = 0; tid <= ADV_MAX_TID; tid++)
     {
@@ -17769,7 +20277,11 @@
      * re-initializing the chip.
      */
     asc_dvc->err_code = 0;
-    if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800)
+    if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600)
+    {
+        status = AdvInitAsc38C1600Driver(asc_dvc);
+    }
+    else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800)
     {
         status = AdvInitAsc38C0800Driver(asc_dvc);
     } else
@@ -17796,6 +20308,10 @@
      */
     AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
     AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
+    if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600)
+    {
+        AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
+    }
     AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
     for (tid = 0; tid <= ADV_MAX_TID; tid++)
     {
@@ -17859,13 +20375,18 @@
         uchar intrb_code;
 
         AdvReadByteLram(iop_base, ASC_MC_INTRB_CODE, intrb_code);
-        if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE &&
-            asc_dvc->carr_pending_cnt != 0)
+
+        if (asc_dvc->chip_type == ADV_CHIP_ASC3550 ||
+            asc_dvc->chip_type == ADV_CHIP_ASC38C0800)
         {
-            AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A);
-            if (asc_dvc->chip_type == ADV_CHIP_ASC3550)
+            if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE &&
+                asc_dvc->carr_pending_cnt != 0)
             {
-                AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP);
+                AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A);
+                if (asc_dvc->chip_type == ADV_CHIP_ASC3550)
+                {
+                    AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP);
+                }
             }
         }
 
@@ -17878,7 +20399,7 @@
     /*
      * Check if the IRQ stopper carrier contains a completed request.
      */
-    while (((irq_next_vpa = asc_dvc->irq_sp->next_vpa) & ASC_RQ_DONE) != 0)
+    while (((irq_next_vpa = le32_to_cpu(asc_dvc->irq_sp->next_vpa)) & ASC_RQ_DONE) != 0)
     {
         /*
          * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure.
@@ -17889,7 +20410,19 @@
          * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr'
          * in AdvExeScsiQueue().
          */
-        scsiq = (ADV_SCSI_REQ_Q *) ADV_U32_TO_VADDR(asc_dvc->irq_sp->areq_vpa);
+        scsiq = (ADV_SCSI_REQ_Q *) ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->areq_vpa));
+
+        /*
+         * Request finished with good status and the queue was not
+         * DMAed to host memory by the firmware. Set all status fields
+         * to indicate good status.
+         */
+        if ((irq_next_vpa & ASC_RQ_GOOD) != 0)
+        {
+            scsiq->done_status = QD_NO_ERROR;
+            scsiq->host_status = scsiq->scsi_status = 0;
+            scsiq->data_cnt = 0L;
+        }
 
         /*
          * Advance the stopper pointer to the next carrier
@@ -17900,7 +20433,7 @@
         asc_dvc->irq_sp = (ADV_CARR_T *)
             ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa));
 
-        free_carrp->next_vpa = ADV_VADDR_TO_U32(asc_dvc->carr_freelist);
+        free_carrp->next_vpa = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
         asc_dvc->carr_freelist = free_carrp;
         asc_dvc->carr_pending_cnt--;
 
@@ -17912,15 +20445,6 @@
          */
         scsiq->cntl = 0;
 
-#if __BIG_ENDIAN
-        /*
-         * After the request completes the only field in the ASC_SCSI_REQ_Q
-         * structure needs to be byte swapped from little endian order to
-         * big endian order is the residual data count.
-         */
-        scsiqp->data_cnt = le32_to_cpu(scsiqp->data_cnt);
-#endif /* __BIG_ENDIAN */
-
         /*
          * If the command that completed was a SCSI INQUIRY and
          * LUN 0 was sent the command, then process the INQUIRY
@@ -18070,7 +20594,7 @@
      * microcode to the transfer residual count.
      */
 
-    if (scsiq->cdb[4] < 8 || (scsiq->cdb[4] - scsiq->data_cnt) < 8)
+    if (scsiq->cdb[4] < 8 || (scsiq->cdb[4] - le32_to_cpu(scsiq->data_cnt)) < 8)
     {
         return;
     }
@@ -18083,7 +20607,7 @@
     /*
      * WDTR, SDTR, and Tag Queuing cannot be enabled for old devices.
      */
-    if (inq->rsp_data_fmt < 2 && inq->ansi_apr_ver < 2)
+    if (INQ_RESPONSE_FMT(*inq) < 2 && INQ_ANSI_VER(*inq) < 2)
     {
         return;
     } else
@@ -18107,7 +20631,7 @@
          * device's 'wdtr_able' bit and write the new value to the
          * microcode.
          */
-        if ((asc_dvc->wdtr_able & tidmask) && inq->WBus16)
+        if ((asc_dvc->wdtr_able & tidmask) && INQ_WIDE16(*inq))
         {
             AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word);
             if ((cfg_word & tidmask) == 0)
@@ -18138,7 +20662,7 @@
          * supports synchronous transfers, then turn on the device's
          * 'sdtr_able' bit. Write the new value to the microcode.
          */
-        if ((asc_dvc->sdtr_able & tidmask) && inq->Sync)
+        if ((asc_dvc->sdtr_able & tidmask) && INQ_SYNC(*inq))
         {
             AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word);
             if ((cfg_word & tidmask) == 0)
@@ -18156,6 +20680,29 @@
                 AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
             }
         }
+        /*
+         * If the Inquiry data included enough space for the SPI-3
+         * Clocking field, then check if DT mode is supported.
+         */
+        if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600 &&
+            (scsiq->cdb[4] >= 57 
+	     || (scsiq->cdb[4] - le32_to_cpu(scsiq->data_cnt)) >= 57))
+        {
+            /*
+             * PPR (Parallel Protocol Request) Capable
+             *
+             * If the device supports DT mode, then it must be PPR capable.
+             * The PPR message will be used in place of the SDTR and WDTR
+             * messages to negotiate synchronous speed and offset, transfer
+             * width, and protocol options.
+             */
+            if (INQ_CLOCKING(*inq) & INQ_CLOCKING_DT_ONLY)
+            {
+                AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, asc_dvc->ppr_able);
+                asc_dvc->ppr_able |= tidmask;
+                AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, asc_dvc->ppr_able);
+            }
+        }
 
         /*
          * If the EEPROM enabled Tag Queuing for the device and the
@@ -18169,7 +20716,7 @@
          * disabling Tag Queuing in the BIOS devices with Tag Queuing
          * bugs will at least work with the BIOS.
          */
-        if ((asc_dvc->tagqng_able & tidmask) && inq->CmdQue)
+        if ((asc_dvc->tagqng_able & tidmask) && INQ_CMD_QUEUE(*inq))
         {
             AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, cfg_word);
             cfg_word |= tidmask;
diff -urN linux-2.2.18-pre22/drivers/scsi/advansys.h linux/drivers/scsi/advansys.h
--- linux-2.2.18-pre22/drivers/scsi/advansys.h	Tue Jan  4 10:12:19 2000
+++ linux/drivers/scsi/advansys.h	Mon Dec  3 20:43:46 2001
@@ -1,9 +1,8 @@
-/* $Id: advansys.h,v 1.18 1999/11/29 21:47:16 bobf Exp bobf $ */
-
 /*
  * advansys.h - Linux Host Driver for AdvanSys SCSI Adapters
  * 
- * Copyright (c) 1995-1998 Advanced System Products, Inc.
+ * Copyright (c) 1995-2000 Advanced System Products, Inc.
+ * Copyright (c) 2000 ConnectCom Solutions, Inc.
  * All Rights Reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -11,14 +10,19 @@
  * code retain the above copyright notice and this comment without
  * modification.
  *
+ * As of March 8, 2000 Advanced System Products, Inc. (AdvanSys)
+ * changed its name to name to ConnectCom Solutions, Inc.
+ *
  * There is an AdvanSys Linux WWW page at:
+ *  http://www.connectcom.net/downloads/software/os/linux.html
  *  http://www.advansys.com/linux.html
  *
- * The latest version of the AdvanSys driver is available at:
- *  ftp://ftp.advansys.com/pub/linux
+ * The latest released version of the AdvanSys driver is available at:
+ *  ftp://ftp.advansys.com/pub/linux/linux.tgz
+ *  ftp://ftp.connectcom.net/pub/linux/linux.tgz
  *
  * Please send questions, comments, bug reports to:
- *  bobf@advansys.com (Bob Frey)
+ *  linux@connectcom.net or bfrey@turbolinux.com.cn
  */
 
 #ifndef _ADVANSYS_H
@@ -37,14 +41,20 @@
 int advansys_detect(Scsi_Host_Template *);
 int advansys_release(struct Scsi_Host *);
 const char *advansys_info(struct Scsi_Host *);
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 int advansys_command(Scsi_Cmnd *);
+#endif /* version < v2.3.28 */
 int advansys_queuecommand(Scsi_Cmnd *, void (* done)(Scsi_Cmnd *));
+#if LINUX_VERSION_CODE < ASC_LINUX_VERSION(2,3,28)
 int advansys_abort(Scsi_Cmnd *);
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(1,3,89)
 int advansys_reset(Scsi_Cmnd *);
 #else /* version >= v1.3.89 */
 int advansys_reset(Scsi_Cmnd *, unsigned int);
 #endif /* version >= v1.3.89 */
+#else /* version >= v2.3.28 */
+int advansys_eh_bus_reset(Scsi_Cmnd *);
+#endif /* version >= v2.3.28 */
 #if LINUX_VERSION_CODE < ASC_LINUX_VERSION(1,3,0)
 int advansys_biosparam(Disk *, int, int[]);
 #else /* version >= v1.3.0 */
@@ -174,23 +184,22 @@
 }
 #else /* version >= v2.3.28 */
 #define ADVANSYS { \
-    proc_name:    "advansys", \
-    proc_info:    advansys_proc_info, \
-    name:         "advansys", \
-    detect:       advansys_detect, \
-    release:      advansys_release, \
-    info:         advansys_info, \
-    command:      advansys_command, \
-    queuecommand: advansys_queuecommand, \
-    abort:        advansys_abort, \
-    reset:        advansys_reset, \
-    bios_param:   advansys_biosparam, \
+    proc_name:                  "advansys", \
+    proc_info:                  advansys_proc_info, \
+    name:                       "advansys", \
+    detect:                     advansys_detect, \
+    release:                    advansys_release, \
+    info:                       advansys_info, \
+    queuecommand:               advansys_queuecommand, \
+    use_new_eh_code:		1, \
+    eh_bus_reset_handler:	advansys_eh_bus_reset, \
+    bios_param:                 advansys_biosparam, \
     /* \
      * Because the driver may control an ISA adapter 'unchecked_isa_dma' \
      * must be set. The flag will be cleared in advansys_detect for non-ISA \
      * adapters. Refer to the comment in scsi_module.c for more information. \
      */ \
-    unchecked_isa_dma: 1, \
+    unchecked_isa_dma:          1, \
     /* \
      * All adapters controlled by this driver are capable of large \
      * scatter-gather lists. According to the mid-level SCSI documentation \
@@ -198,7 +207,7 @@
      * 'use_clustering'. But empirically while CPU utilization is increased \
      * by enabling clustering, I/O throughput increases as well. \
      */ \
-    use_clustering: ENABLE_CLUSTERING, \
+    use_clustering:             ENABLE_CLUSTERING, \
 }
 #endif /* version >= v2.3.28 */
 #endif /* _ADVANSYS_H */
diff -urN linux-2.2.18-pre22/drivers/scsi/aha1542.c linux/drivers/scsi/aha1542.c
--- linux-2.2.18-pre22/drivers/scsi/aha1542.c	Tue Jan  4 10:12:19 2000
+++ linux/drivers/scsi/aha1542.c	Mon Dec  3 20:43:46 2001
@@ -1264,6 +1264,7 @@
 	    if (SCtmp->host_scribble) 
 	    {
 		scsi_free(SCtmp->host_scribble, 512);
+	      	SCtmp->host_scribble = 0;
 	    }
 	    
 	    HOSTDATA(SCpnt->host)->SCint[i] = NULL;
@@ -1330,6 +1331,7 @@
 	    if (SCtmp->host_scribble) 
 	    {
 		scsi_free(SCtmp->host_scribble, 512);
+	      	SCtmp->host_scribble = 0;
 	    }
 	    
 	    HOSTDATA(SCpnt->host)->SCint[i] = NULL;
@@ -1402,6 +1404,7 @@
 	    if (SCtmp->host_scribble) 
 	    {
 		scsi_free(SCtmp->host_scribble, 512);
+	      	SCtmp->host_scribble = 0;
 	    }
 	    
 	    HOSTDATA(SCpnt->host)->SCint[i] = NULL;
@@ -1540,7 +1543,11 @@
 	      Scsi_Cmnd * SCtmp;
 	      SCtmp = HOSTDATA(SCpnt->host)->SCint[i];
 	      SCtmp->result = DID_RESET << 16;
-	      if (SCtmp->host_scribble) scsi_free(SCtmp->host_scribble, 512);
+	      if (SCtmp->host_scribble)
+	      {
+	      	scsi_free(SCtmp->host_scribble, 512);
+	      	SCtmp->host_scribble = 0;
+	      }
 	      printk("Sending DID_RESET for target %d\n", SCpnt->target);
 	      SCtmp->scsi_done(SCpnt);
 	      
@@ -1587,7 +1594,12 @@
 		    Scsi_Cmnd * SCtmp;
 		    SCtmp = HOSTDATA(SCpnt->host)->SCint[i];
 		    SCtmp->result = DID_RESET << 16;
-		    if (SCtmp->host_scribble) scsi_free(SCtmp->host_scribble, 512);
+		    if (SCtmp->host_scribble)
+		    {
+		    	 scsi_free(SCtmp->host_scribble, 512);
+		      	SCtmp->host_scribble = 0;
+		    }
+		    	 
 		    printk("Sending DID_RESET for target %d\n", SCpnt->target);
 		    SCtmp->scsi_done(SCpnt);
 		    
diff -urN linux-2.2.18-pre22/drivers/scsi/megaraid.c linux/drivers/scsi/megaraid.c
--- linux-2.2.18-pre22/drivers/scsi/megaraid.c	Mon Dec  3 20:43:09 2001
+++ linux/drivers/scsi/megaraid.c	Mon Dec  3 20:43:46 2001
@@ -226,6 +226,7 @@
 #include <linux/tqueue.h>
 #include <linux/interrupt.h>
 #include <linux/mm.h>
+#include <linux/kcomp.h>
 #include <asm/pgtable.h>
 
 #include <linux/sched.h>
diff -urN linux-2.2.18-pre22/drivers/sound/ac97_codec.c linux/drivers/sound/ac97_codec.c
--- linux-2.2.18-pre22/drivers/sound/ac97_codec.c	Mon Dec  3 20:43:09 2001
+++ linux/drivers/sound/ac97_codec.c	Mon Dec  3 20:43:46 2001
@@ -131,7 +131,7 @@
 	{SOUND_MIXER_PCM,	0x4343},
 	{SOUND_MIXER_SPEAKER,	0x4343},
 	{SOUND_MIXER_LINE,	0x4343},
-	{SOUND_MIXER_MIC,	0x4343},
+	{SOUND_MIXER_MIC,	0x1111},	/* P3 - audio loop */
 	{SOUND_MIXER_CD,	0x4343},
 	{SOUND_MIXER_ALTPCM,	0x4343},
 	{SOUND_MIXER_IGAIN,	0x4343},
diff -urN linux-2.2.18-pre22/drivers/sound/maestro.c linux/drivers/sound/maestro.c
--- linux-2.2.18-pre22/drivers/sound/maestro.c	Mon Dec  3 20:43:09 2001
+++ linux/drivers/sound/maestro.c	Mon Dec  3 20:43:47 2001
@@ -1962,6 +1962,7 @@
 static int mixer_ioctl(struct ess_card *card, unsigned int cmd, unsigned long arg)
 {
 	int i, val=0;
+       unsigned long flags;
 
 	VALIDATE_CARD(card);
         if (cmd == SOUND_MIXER_INFO) {
@@ -1994,9 +1995,9 @@
 			if(!card->mix.recmask_io) {
 				val = 0;
 			} else {
-				spin_lock(&card->lock);
+                               spin_lock_irqsave(&card->lock, flags);
 				val = card->mix.recmask_io(card,1,0);
-				spin_unlock(&card->lock);
+                               spin_unlock_irqrestore(&card->lock, flags);
 			}
 			break;
 			
@@ -2023,9 +2024,9 @@
 				return -EINVAL;
 
 			/* do we ever want to touch the hardware? */
-/*			spin_lock(&card->lock);
+/*                     spin_lock_irqsave(&card->lock, flags);
 			val = card->mix.read_mixer(card,i);
-			spin_unlock(&card->lock);*/
+                       spin_unlock_irqrestore(&card->lock, flags);*/
 
 			val = card->mix.mixer_state[i];
 /*			M_printk("returned 0x%x for mixer %d\n",val,i);*/
@@ -2049,9 +2050,9 @@
 		if(!val) return 0;
 		if(! (val &= card->mix.record_sources)) return -EINVAL;
 
-		spin_lock(&card->lock);
+               spin_lock_irqsave(&card->lock, flags);
 		card->mix.recmask_io(card,0,val);
-		spin_unlock(&card->lock);
+               spin_unlock_irqrestore(&card->lock, flags);
 		return 0;
 
 	default:
@@ -2060,9 +2061,9 @@
 		if ( ! supported_mixer(card,i)) 
 			return -EINVAL;
 
-		spin_lock(&card->lock);
+               spin_lock_irqsave(&card->lock, flags);
 		set_mixer(card,i,val);
-		spin_unlock(&card->lock);
+               spin_unlock_irqrestore(&card->lock, flags);
 
 		return 0;
 	}
diff -urN linux-2.2.18-pre22/drivers/usb/serial/visor.c linux/drivers/usb/serial/visor.c
--- linux-2.2.18-pre22/drivers/usb/serial/visor.c	Mon Dec  3 20:43:10 2001
+++ linux/drivers/usb/serial/visor.c	Mon Dec  3 20:43:47 2001
@@ -11,6 +11,10 @@
  *
  * See Documentation/usb/usb-serial.txt for more information on using this driver
  * 
+ * (11/12/2000) gkh
+ *	Fixed bug with data being dropped on the floor by forcing tty->low_latency
+ *	to be on.  This fixes the OHCI issue!
+ *
  * (09/11/2000) gkh
  *	Got rid of always calling kmalloc for every urb we wrote out to the
  *	device.
@@ -155,6 +159,11 @@
 		bytes_in = 0;
 		bytes_out = 0;
 
+		/* force low_latency on so that our tty_push actually forces the data through, 
+		  otherwise it is scheduled, and with high data rates (like with OHCI) data
+		  can get lost. */
+		port->tty->low_latency = 1;
+
 		/*Start reading from the device*/
 		if (usb_submit_urb(port->read_urb))
 			dbg(__FUNCTION__  " - usb_submit_urb(read bulk) failed");
@@ -320,6 +329,11 @@
 	tty = port->tty;
 	if (urb->actual_length) {
 		for (i = 0; i < urb->actual_length ; ++i) {
+			/* if we insert more than TTY_FLIPBUF_SIZE characters, we drop them. */
+			if(tty->flip.count >= TTY_FLIPBUF_SIZE) {
+				tty_flip_buffer_push(tty);
+			}
+			/* this doesn't actually push the data through unless tty->low_latency is set */
 			tty_insert_flip_char(tty, data[i], 0);
 		}
 		tty_flip_buffer_push(tty);
diff -urN linux-2.2.18-pre22/fs/fat/cache.c linux/fs/fat/cache.c
--- linux-2.2.18-pre22/fs/fat/cache.c	Mon Aug  9 12:04:41 1999
+++ linux/fs/fat/cache.c	Mon Dec  3 20:43:47 2001
@@ -64,7 +64,7 @@
 	}
 	if (MSDOS_SB(sb)->fat_bits == 32) {
 		p_first = p_last = NULL; /* GCC needs that stuff */
-		next = CF_LE_L(((unsigned long *) bh->b_data)[(first &
+		next = CF_LE_L(((__u32 *) bh->b_data)[(first &
 		    (SECTOR_SIZE-1)) >> 2]);
 		/* Fscking Microsoft marketing department. Their "32" is 28. */
 		next &= 0xfffffff;
@@ -73,12 +73,12 @@
 
 	} else if (MSDOS_SB(sb)->fat_bits == 16) {
 		p_first = p_last = NULL; /* GCC needs that stuff */
-		next = CF_LE_W(((unsigned short *) bh->b_data)[(first &
+		next = CF_LE_W(((__u16 *) bh->b_data)[(first &
 		    (SECTOR_SIZE-1)) >> 1]);
 		if (next >= 0xfff7) next = -1;
 	} else {
-		p_first = &((unsigned char *) bh->b_data)[first & (SECTOR_SIZE-1)];
-		p_last = &((unsigned char *) bh2->b_data)[(first+1) &
+		p_first = &((__u8 *) bh->b_data)[first & (SECTOR_SIZE-1)];
+		p_last = &((__u8 *) bh2->b_data)[(first+1) &
 		    (SECTOR_SIZE-1)];
 		if (nr & 1) next = ((*p_first >> 4) | (*p_last << 4)) & 0xfff;
 		else next = (*p_first+(*p_last << 8)) & 0xfff;
@@ -86,10 +86,10 @@
 	}
 	if (new_value != -1) {
 		if (MSDOS_SB(sb)->fat_bits == 32) {
-			((unsigned long *) bh->b_data)[(first & (SECTOR_SIZE-1)) >>
+			((__u32 *) bh->b_data)[(first & (SECTOR_SIZE-1)) >>
 			    2] = CT_LE_L(new_value);
 		} else if (MSDOS_SB(sb)->fat_bits == 16) {
-			((unsigned short *) bh->b_data)[(first & (SECTOR_SIZE-1)) >>
+			((__u16 *) bh->b_data)[(first & (SECTOR_SIZE-1)) >>
 			    1] = CT_LE_W(new_value);
 		} else {
 			if (nr & 1) {
diff -urN linux-2.2.18-pre22/include/asm-alpha/delay.h linux/include/asm-alpha/delay.h
--- linux-2.2.18-pre22/include/asm-alpha/delay.h	Mon Dec  3 20:43:10 2001
+++ linux/include/asm-alpha/delay.h	Mon Dec  3 20:43:48 2001
@@ -1,6 +1,7 @@
 #ifndef __ALPHA_DELAY_H
 #define __ALPHA_DELAY_H
 
+#include <asm/param.h>
 #include <asm/smp.h>
 
 /*
diff -urN linux-2.2.18-pre22/kernel/sysctl.c linux/kernel/sysctl.c
--- linux-2.2.18-pre22/kernel/sysctl.c	Mon Dec  3 20:43:11 2001
+++ linux/kernel/sysctl.c	Mon Dec  3 20:43:48 2001
@@ -1173,6 +1173,13 @@
 	return -ENOSYS;
 }
 
+int sysctl_jiffies(ctl_table *table, int *name, int nlen,
+		void *oldval, size_t *oldlenp,
+		void *newval, size_t newlen, void **context)
+{
+	return -ENOSYS;
+}
+
 int proc_dostring(ctl_table *table, int write, struct file *filp,
 		  void *buffer, size_t *lenp)
 {
