## Automatically generated incremental diff
## From:   linux-2.4.10-pre6
## To:     linux-2.4.10-pre7
## Robot:  $Id: make-incremental-diff,v 1.8 2001/12/04 06:05:04 hpa Exp $

diff -urN linux-2.4.10-pre6/CREDITS linux/CREDITS
--- linux-2.4.10-pre6/CREDITS	Sun Aug 12 17:36:24 2001
+++ linux/CREDITS	Mon Dec  3 23:08:45 2001
@@ -400,13 +400,12 @@
 S: USA
 
 N: Peter Braam
-E: braam@cs.cmu.edu
-W: http://coda.cs.cmu.edu/~braam
-D: Coda Filesystem
-S: Dept of Computer Science
-S: 5000 Forbes Avenue
-S: Pittsburgh, Pennsylvania 15213
-S: USA
+E: braam@clusterfs.com
+W: http://www.clusterfs.com/
+D: Coda & InterMezzo filesystems
+S: 181 McNeil
+S: Canmore, AB
+S: Canada, T1W 2R9
 
 N: Ryan Bradetich
 E: rbradetich@uswest.net
@@ -535,6 +534,12 @@
 S: Stanford, California 94305
 S: USA
 
+N: Randolph Chung
+E: tausq@debian.org
+D: Linux/PA-RISC hacker
+S: Fremont, CA 94538
+S: USA
+
 N: Juan Jose Ciarlante
 W: http://juanjox.kernelnotes.org/
 E: jjciarla@raiz.uncu.edu.ar
@@ -633,10 +638,11 @@
 S: USA
 
 N: Frank Davis
+E: fdavis@si.rr.com
 E: fdavis112@juno.com
 D: Various kernel patches
 S: 8 Lakeview Terr.
-S: Kerhonskon, NY 12446
+S: Kerhonkson, NY 12446
 S: USA
 
 N: Wayne Davison
@@ -714,7 +720,7 @@
 N: Oleg Drokin
 E: green@ccssu.crimea.ua
 W: http://www.ccssu.crimea.ua/~green
-D: Cleaning up sound drivers.
+D: Cleaning up sound drivers, SA1100 Watchdog.
 S: Skvoznoy per., 14a
 S: Evpatoria
 S: Crimea
diff -urN linux-2.4.10-pre6/Documentation/CodingStyle linux/Documentation/CodingStyle
--- linux-2.4.10-pre6/Documentation/CodingStyle	Wed Sep 29 13:59:12 1999
+++ linux/Documentation/CodingStyle	Mon Dec  3 23:08:45 2001
@@ -233,3 +233,34 @@
 stable. All options that are known to trash data (experimental write-
 support for file-systems, for instance) should be denoted (DANGEROUS), other
 Experimental options should be denoted (EXPERIMENTAL).
+
+
+		Chapter 8: Data structures
+
+Data structures that have visibility outside the single-threaded
+environment they are created and destroyed in should always have
+reference counts.  In the kernel, garbage collection doesn't exist (and
+outside the kernel garbage collection is slow and inefficient), which
+means that you absolutely _have_ to reference count all your uses. 
+
+Reference counting means that you can avoid locking, and allows multiple
+users to have access to the data structure in parallel - and not having
+to worry about the structure suddenly going away from under them just
+because they slept or did something else for a while. 
+
+Note that locking is _not_ a replacement for reference counting. 
+Locking is used to keep data structures coherent, while reference
+counting is a memory management technique.  Usually both are needed, and
+they are not to be confused with each other.
+
+Many data structures can indeed have two levels of reference counting,
+when there are users of different "classes".  The subclass count counts
+the number of subclass users, and decrements the global count just once
+when the subclass count goes to zero.
+
+Examples of this kind of "multi-reference-counting" can be found in
+memory management ("struct mm_struct": mm_users and mm_count), and in
+filesystem code ("struct super_block": s_count and s_active).
+
+Remember: if another thread can find your data structure, and you don't
+have a reference count on it, you almost certainly have a bug.
diff -urN linux-2.4.10-pre6/Documentation/DocBook/kernel-api.tmpl linux/Documentation/DocBook/kernel-api.tmpl
--- linux-2.4.10-pre6/Documentation/DocBook/kernel-api.tmpl	Thu May 24 15:14:08 2001
+++ linux/Documentation/DocBook/kernel-api.tmpl	Mon Dec  3 23:08:45 2001
@@ -187,6 +187,11 @@
 !Edrivers/block/ll_rw_blk.c
   </chapter>
 
+  <chapter id="part">
+     <title>Partition Handling</title>
+!Edrivers/block/genhd.c
+  </chapter>
+
   <chapter id="miscdev">
      <title>Miscellaneous Devices</title>
 !Edrivers/char/misc.c
diff -urN linux-2.4.10-pre6/Documentation/isdn/README linux/Documentation/isdn/README
--- linux-2.4.10-pre6/Documentation/isdn/README	Sun Aug 13 10:05:32 2000
+++ linux/Documentation/isdn/README	Mon Dec  3 23:08:45 2001
@@ -276,6 +276,8 @@
                                       1 = Add CPN to RING message on
                             Bit 1:    0 = Add CPN to FCON message off
                                       1 = Add CPN to FCON message on
+                            Bit 2:    0 = Add CDN to RING/FCON message off
+                                      1 = Add CDN to RING/FCON message on
 
   Last but not least a (at the moment fairly primitive) device to request
   the line-status (/dev/isdninfo) is made available.
diff -urN linux-2.4.10-pre6/MAINTAINERS linux/MAINTAINERS
--- linux-2.4.10-pre6/MAINTAINERS	Mon Dec  3 23:08:36 2001
+++ linux/MAINTAINERS	Mon Dec  3 23:08:45 2001
@@ -81,6 +81,12 @@
 L:	linux-net@vger.kernel.org
 S:	Maintained
 
+53C700 AND 53C700-66 SCSI DRIVER
+P:	James E.J. Bottomley
+M:	James.Bottomley@HansenPartnership.com
+L:	linux-scsi@vger.kernel.org
+S:	Maintained
+
 6PACK NETWORK DRIVER FOR AX.25
 P:	Andreas Koensgen
 M:	ajk@iehk.rwth-aachen.de
@@ -182,9 +188,9 @@
 M:	linux@treblig.org
 S:	Maintained
 
-ARM PORT
+ARM/STRONGARM110 PORT
 P:	Russell King
-M:	linux@arm.linux.org.uk
+M:	rmk@arm.linux.org.uk
 L:	linux-arm-kernel@lists.arm.linux.org.uk
 W:	http://www.arm.linux.org.uk/
 S:	Maintained
@@ -337,7 +343,7 @@
 
 CYBERPRO FB DRIVER
 P:	Russell King
-M:	linux@arm.linux.org.uk
+M:	rmk@arm.linux.org.uk
 W:	http://www.arm.linux.org.uk/
 S:	Maintained
 
@@ -823,6 +829,12 @@
 L:	linux-x25@vger.kernel.org
 S:	Maintained
 
+LASI 53c700 driver for PARISC
+P:	James E.J. Bottomley
+M:	James.Bottomley@HansenPartnership.com
+L:	linux-scsi@vger.kernel.org
+S:	Maintained
+
 LINUX FOR IBM pSERIES (RS/6000)
 P:	Paul Mackerras
 M:	paulus@au.ibm.com
@@ -948,6 +960,12 @@
 L:	linware@sh.cvut.cz
 S:	Maintained
 
+NCR DUAL 700 SCSI DRIVER (MICROCHANNEL)
+P:	James E.J. Bottomley
+M:	James.Bottomley@HansenPartnership.com
+L:	linux-scsi@vger.kernel.org
+S:	Maintained
+
 NETFILTER
 P:	Rusty Russell
 M:	rusty@rustcorp.com.au
@@ -1413,15 +1431,6 @@
 W:	http://www.kernel.dk
 S:	Maintained
 
-USB SUBSYSTEM
-P:	Johannes Erdfelt
-M:	jerdfelt@valinux.com
-M:	johannes@erdfelt.com
-L:	linux-usb-users@lists.sourceforge.net
-L:	linux-usb-devel@lists.sourceforge.net
-W:	http://www.linux-usb.org
-S:	Supported
-
 USB ACM DRIVER
 P:	Vojtech Pavlik
 M:	vojtech@suse.cz
@@ -1437,6 +1446,13 @@
 S:	Maintained
 W:	http://www.kroah.com/linux-usb/
 
+USB CDC ETHERNET DRIVER
+P:	Brad Hards
+M:	bhards@bigpond.net.au
+L:	linux-usb-users@lists.sourceforge.net
+L:	linux-usb-devel@lists.sourceforge.net
+S:	Maintained
+
 USB HID/HIDBP/INPUT DRIVERS
 P:	Vojtech Pavlik
 M:	vojtech@suse.cz
@@ -1454,11 +1470,19 @@
 S:	Maintained
 
 USB KAWASAKI LSI DRIVER
-P:      Brad Hards
-M:      bradh@frogmouth.net
-L:      linux-usb-users@lists.sourceforge.net
-L:      linux-usb-devel@lists.sourceforge.net
-S:      Maintained
+P:	Brad Hards
+M:	bhards@bigpond.net.au
+L:	linux-usb-users@lists.sourceforge.net
+L:	linux-usb-devel@lists.sourceforge.net
+S:	Maintained
+
+USB MASS STORAGE DRIVER
+P:	Matthew Dharm
+M:	mdharm-usb@one-eyed-alien.net
+L:	linux-usb-users@lists.sourceforge.net
+L:	linux-usb-devel@lists.sourceforge.net
+S:	Maintained
+W:	http://www.one-eyed-alien.net/~mdharm/linux-usb/
 
 USB OHCI DRIVER
 P:	Roman Weissgaerber
@@ -1475,14 +1499,6 @@
 W:     http://alpha.dyndns.org/ov511/
 S:     Maintained
 
-USB SE401 DRIVER
-P:	Jeroen Vreeken
-M:	pe1rxq@amsat.org
-L:	linux-usb-users@lists.sourceforge.net
-L:	linux-usb-devel@lists.sourceforge.net
-W:	http://www.chello.nl/~j.vreeken/se401/
-S:	Maintained
-
 USB PEGASUS DRIVER
 P:	Petko Manolov
 M:	petkan@dce.bg
@@ -1497,21 +1513,21 @@
 L:	linux-usb-devel@lists.sourceforge.net
 S:	Supported
 
-USB SERIAL DIGI ACCELEPORT DRIVER
-P:	Peter Berger and Al Borchers
-M:	pberger@brimson.com
-M:	alborchers@steinerpoint.com
+USB SE401 DRIVER
+P:	Jeroen Vreeken
+M:	pe1rxq@amsat.org
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
+W:	http://www.chello.nl/~j.vreeken/se401/
 S:	Maintained
 
-USB SERIAL KEYSPAN DRIVER
-P:	Hugh Blemings
-M:	hugh@misc.nu
+USB SERIAL DIGI ACCELEPORT DRIVER
+P:	Peter Berger and Al Borchers
+M:	pberger@brimson.com
+M:	alborchers@steinerpoint.com
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
 S:	Maintained
-W:	http://misc.nu/hugh/keyspan/
 
 USB SERIAL DRIVER
 P:	Greg Kroah-Hartman
@@ -1529,6 +1545,12 @@
 L:	linux-usb-devel@lists.sourceforge.net
 S:	Maintained
 
+USB SERIAL CYBERJACK PINPAD/E-COM DRIVER
+M:	linux-usb@sii.li
+L:	linux-usb-users@lists.sourceforge.net
+L:	linux-usb-devel@lists.sourceforge.net
+S:	Supported
+
 USB SERIAL EMPEG EMPEG-CAR MARK I/II DRIVER
 P:	Gary Brubaker
 M:	xavyer@ix.netcom.com
@@ -1536,19 +1558,22 @@
 L:	linux-usb-devel@lists.sourceforge.net
 S:	Maintained
 
-USB SERIAL CYBERJACK PINPAD/E-COM DRIVER
-M:  linux-usb@sii.li
-L:  linux-usb-users@lists.sourceforge.net
-L:  linux-usb-devel@lists.sourceforge.net
-S:  Supported
-
-USB MASS STORAGE DRIVER
-P:	Matthew Dharm
-M:	mdharm-usb@one-eyed-alien.net
+USB SERIAL KEYSPAN DRIVER
+P:	Hugh Blemings
+M:	hugh@misc.nu
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
 S:	Maintained
-W:	http://www.one-eyed-alien.net/~mdharm/linux-usb/
+W:	http://misc.nu/hugh/keyspan/
+
+USB SUBSYSTEM
+P:	Johannes Erdfelt
+M:	jerdfelt@valinux.com
+M:	johannes@erdfelt.com
+L:	linux-usb-users@lists.sourceforge.net
+L:	linux-usb-devel@lists.sourceforge.net
+W:	http://www.linux-usb.org
+S:	Supported
 
 USB UHCI DRIVER
 P:	Georg Acher
diff -urN linux-2.4.10-pre6/Makefile linux/Makefile
--- linux-2.4.10-pre6/Makefile	Mon Dec  3 23:08:36 2001
+++ linux/Makefile	Mon Dec  3 23:08:45 2001
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 4
 SUBLEVEL = 10
-EXTRAVERSION =-pre6
+EXTRAVERSION =-pre7
 
 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 
@@ -197,6 +197,10 @@
 	drivers/zorro/devlist.h drivers/zorro/gen-devlist \
 	drivers/sound/bin2hex drivers/sound/hex2hex \
 	drivers/atm/fore200e_mkfirm drivers/atm/{pca,sba}*{.bin,.bin1,.bin2} \
+	drivers/scsi/aic7xxx/aicasm/aicasm_gram.c \
+	drivers/scsi/aic7xxx/aicasm/aicasm_scan.c \
+	drivers/scsi/aic7xxx/aicasm/y.tab.h \
+	drivers/scsi/aic7xxx/aicasm/aicasm \
 	net/khttpd/make_times_h \
 	net/khttpd/times.h \
 	submenu*
diff -urN linux-2.4.10-pre6/arch/i386/defconfig linux/arch/i386/defconfig
--- linux-2.4.10-pre6/arch/i386/defconfig	Mon Dec  3 23:08:36 2001
+++ linux/arch/i386/defconfig	Mon Dec  3 23:08:45 2001
@@ -289,6 +289,7 @@
 # CONFIG_SCSI_AHA1740 is not set
 # CONFIG_SCSI_AIC7XXX is not set
 # CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
 # CONFIG_SCSI_AM53C974 is not set
@@ -307,6 +308,7 @@
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
 # CONFIG_SCSI_NCR53C7xx is not set
 # CONFIG_SCSI_NCR53C8XX is not set
 CONFIG_SCSI_SYM53C8XX=y
diff -urN linux-2.4.10-pre6/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c
--- linux-2.4.10-pre6/arch/i386/kernel/setup.c	Mon Dec  3 23:08:36 2001
+++ linux/arch/i386/kernel/setup.c	Mon Dec  3 23:08:45 2001
@@ -941,7 +941,6 @@
 	 * trampoline before removing it. (see the GDT stuff)
 	 */
 	reserve_bootmem(PAGE_SIZE, PAGE_SIZE);
-	smp_alloc_memory(); /* AP processor realmode stacks in low memory*/
 #endif
 
 #ifdef CONFIG_X86_IO_APIC
@@ -950,18 +949,6 @@
 	 */
 	find_smp_config();
 #endif
-	paging_init();
-#ifdef CONFIG_X86_IO_APIC
-	/*
-	 * get boot-time SMP configuration:
-	 */
-	if (smp_found_config)
-		get_smp_config();
-#endif
-#ifdef CONFIG_X86_LOCAL_APIC
-	init_apic_mappings();
-#endif
-
 #ifdef CONFIG_BLK_DEV_INITRD
 	if (LOADER_TYPE && INITRD_START) {
 		if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
@@ -978,6 +965,26 @@
 			initrd_start = 0;
 		}
 	}
+#endif
+
+	/*
+	 * NOTE: before this point _nobody_ is allowed to allocate
+	 * any memory using the bootmem allocator.
+	 */
+
+#ifdef CONFIG_SMP
+	smp_alloc_memory(); /* AP processor realmode stacks in low memory*/
+#endif
+	paging_init();
+#ifdef CONFIG_X86_IO_APIC
+	/*
+	 * get boot-time SMP configuration:
+	 */
+	if (smp_found_config)
+		get_smp_config();
+#endif
+#ifdef CONFIG_X86_LOCAL_APIC
+	init_apic_mappings();
 #endif
 
 	/*
diff -urN linux-2.4.10-pre6/arch/mips/Makefile linux/arch/mips/Makefile
--- linux-2.4.10-pre6/arch/mips/Makefile	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/Makefile	Mon Dec  3 23:08:45 2001
@@ -36,8 +36,9 @@
 # crossformat linking we rely on the elf2ecoff tool for format conversion.
 #
 GCCFLAGS	:= -G 0 -mno-abicalls -fno-pic
-LINKFLAGS	+= -static -G 0
+LINKFLAGS	+= -static
 MODFLAGS	+= -mlong-calls
+LD		:= $(LD) -G 0
 
 ifdef CONFIG_REMOTE_DEBUG
 CFLAGS		:= $(CFLAGS) -g
@@ -55,12 +56,18 @@
 ifdef CONFIG_CPU_R4300
 GCCFLAGS	+= -mcpu=r4300 -mips2 -Wa,--trap
 endif
+ifdef CONFIG_CPU_VR41XX
+GCCFLAGS	+= -mcpu=r4600 -mips2 -Wa,--trap
+endif
 ifdef CONFIG_CPU_R4X00
 GCCFLAGS	+= -mcpu=r4600 -mips2 -Wa,--trap
 endif
 ifdef CONFIG_CPU_MIPS32
 GCCFLAGS	+= -mcpu=r4600 -mips2 -Wa,--trap
 endif
+ifdef CONFIG_CPU_MIPS64
+GCCFLAGS	+= -mcpu=r4600 -mips2 -Wa,--trap
+endif
 ifdef CONFIG_CPU_R5000
 GCCFLAGS	+= -mcpu=r5000 -mips2 -Wa,--trap
 endif
@@ -68,7 +75,8 @@
 GCCFLAGS        += -mcpu=r5000 -mips2 -Wa,--trap
 endif
 ifdef CONFIG_CPU_NEVADA
-GCCFLAGS	+= -mcpu=r5000 -mips2 -Wa,--trap -mmad
+# Cannot use -mmad with currently recommended tools
+GCCFLAGS	+= -mcpu=r5000 -mips2 -Wa,--trap
 endif
 ifdef CONFIG_CPU_RM7000
 GCCFLAGS	+= -mcpu=r5000 -mips2 -Wa,--trap
@@ -77,11 +85,6 @@
 GCCFLAGS	+= -mcpu=sb1 -mips2 -Wa,--trap
 endif
 
-ifdef CONFIG_MIPS_FPU_EMULATOR
-CORE_FILES	+=arch/mips/math-emu/fpu_emulator.o
-SUBDIRS		+=arch/mips/math-emu
-endif
-
 GCCFLAGS	+= -pipe
 
 CFLAGS		:= -I $(TOPDIR)/include/asm/gcc $(CFLAGS) $(GCCFLAGS)
@@ -89,6 +92,12 @@
 ASFLAGS		+= $(GCCFLAGS)
 
 #
+# We unconditionally build the math emulator
+#
+CORE_FILES	+=arch/mips/math-emu/fpu_emulator.o
+SUBDIRS		+=arch/mips/math-emu
+
+#
 # Board-dependent options and extra files
 #
 ifdef CONFIG_ALGOR_P4032
@@ -229,11 +238,27 @@
 # ITE 8172 eval board with QED 5231 CPU
 #
 ifdef CONFIG_MIPS_ITE8172
-LIBS		+= arch/mips/ite-boards/qed-4n-s01b/ite.o		     \
-		   arch/mips/ite-boards/generic/it8172.o
-SUBDIRS		+= arch/mips/ite-boards/generic				     \
-		   arch/mips/ite-boards/qed-4n-s01b
-LOADADDR	+= 0x80100000
+LIBS          += arch/mips/ite-boards/qed-4n-s01b/ite.o arch/mips/ite-boards/generic/it8172.o
+SUBDIRS       += arch/mips/ite-boards/generic arch/mips/ite-boards/qed-4n-s01b
+LOADADDR      += 0x80100000
+endif
+
+#
+# Globespan IVR eval board with QED 5231 CPU
+#
+ifdef CONFIG_MIPS_IVR
+LIBS          += arch/mips/ite-boards/ivr/ivr.o arch/mips/ite-boards/generic/it8172.o
+SUBDIRS       += arch/mips/ite-boards/generic arch/mips/ite-boards/ivr
+LOADADDR      += 0x80100000
+endif
+
+#
+# Au1000 eval board
+#
+ifdef CONFIG_MIPS_PB1000
+LIBS          += arch/mips/au1000/pb1000/pb1000.o arch/mips/au1000/common/au1000.o
+SUBDIRS       += arch/mips/au1000/pb1000 arch/mips/au1000/common
+LOADADDR      += 0x80100000
 endif
 
 #
@@ -273,14 +298,6 @@
 
 vmlinux.ecoff: vmlinux
 	@$(MAKEBOOT) $@
-
-zImage: vmlinux
-	@$(MAKEBOOT) zImage
-
-compressed: zImage
-
-zdisk: vmlinux
-	@$(MAKEBOOT) zdisk
 
 archclean:
 	@$(MAKEBOOT) clean
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/Makefile linux/arch/mips/au1000/common/Makefile
--- linux-2.4.10-pre6/arch/mips/au1000/common/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,31 @@
+#
+#  Copyright 2000 MontaVista Software Inc.
+#  Author: MontaVista Software, Inc.
+#     	ppopov@mvista.com or source@mvista.com
+#
+# Makefile for the Alchemy Au1000 CPU, generic files.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+all: au1000.o
+
+O_TARGET := au1000.o
+
+obj-y := prom.o dbg_io.o int-handler.o irq.o puts.o time.o reset.o
+
+obj-$(CONFIG_AU1000_UART) += serial.o             
+obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o             
+obj-$(CONFIG_BLK_DEV_INITRD) += ramdisk.o
+
+ramdisk.o: 
+	mkramobj ramdisk ramdisk.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/dbg_io.c linux/arch/mips/au1000/common/dbg_io.c
--- linux-2.4.10-pre6/arch/mips/au1000/common/dbg_io.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/dbg_io.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,118 @@
+
+#include <linux/config.h>
+#include <asm/io.h>
+#include <asm/au1000.h>
+
+#ifdef CONFIG_REMOTE_DEBUG
+
+/*
+ * FIXME the user should be able to select the
+ * uart to be used for debugging.
+ */
+#define	DEBUG_BASE  UART2_ADDR
+/**/
+
+/* we need uint32 uint8 */
+/* #include "types.h" */
+typedef         unsigned char uint8;
+typedef         unsigned int  uint32;
+
+#define         UART16550_BAUD_2400             2400
+#define         UART16550_BAUD_4800             4800
+#define         UART16550_BAUD_9600             9600
+#define         UART16550_BAUD_19200            19200
+#define         UART16550_BAUD_38400            38400
+#define         UART16550_BAUD_57600            57600
+#define         UART16550_BAUD_115200           115200
+
+#define         UART16550_PARITY_NONE           0
+#define         UART16550_PARITY_ODD            0x08
+#define         UART16550_PARITY_EVEN           0x18
+#define         UART16550_PARITY_MARK           0x28
+#define         UART16550_PARITY_SPACE          0x38
+
+#define         UART16550_DATA_5BIT             0x0
+#define         UART16550_DATA_6BIT             0x1
+#define         UART16550_DATA_7BIT             0x2
+#define         UART16550_DATA_8BIT             0x3
+
+#define         UART16550_STOP_1BIT             0x0
+#define         UART16550_STOP_2BIT             0x4
+
+
+#define UART_RX		0	/* Receive buffer */
+#define UART_TX		4	/* Transmit buffer */
+#define UART_IER	8	/* Interrupt Enable Register */
+#define UART_IIR	0xC	/* Interrupt ID Register */
+#define UART_FCR	0x10	/* FIFO Control Register */
+#define UART_LCR	0x14	/* Line Control Register */
+#define UART_MCR	0x18	/* Modem Control Register */
+#define UART_LSR	0x1C	/* Line Status Register */
+#define UART_MSR	0x20	/* Modem Status Register */
+#define UART_CLK	0x28	/* Baud Rat4e Clock Divider */
+#define UART_MOD_CNTRL	0x100	/* Module Control */
+
+/* memory-mapped read/write of the port */
+#define UART16550_READ(y)    (inl(DEBUG_BASE + y) & 0xff)
+#define UART16550_WRITE(y,z) (outl(z&0xff, DEBUG_BASE + y))
+
+void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
+{
+
+	if (UART16550_READ(UART_MOD_CNTRL) != 0x3) {
+		UART16550_WRITE(UART_MOD_CNTRL, 3);
+	}
+	cal_r4koff();
+
+	/* disable interrupts */
+	UART16550_WRITE(UART_IER, 0);
+
+	/* set up baud rate */
+	{ 
+		uint32 divisor;
+
+		/* set divisor */
+		divisor = get_au1000_uart_baud() / baud;
+		UART16550_WRITE(UART_CLK, divisor & 0xffff);
+	}
+
+	/* set data format */
+	UART16550_WRITE(UART_LCR, data | parity | stop);
+}
+
+static int remoteDebugInitialized = 0;
+
+uint8 getDebugChar(void)
+{
+	if (!remoteDebugInitialized) {
+		remoteDebugInitialized = 1;
+		debugInit(UART16550_BAUD_115200,
+			  UART16550_DATA_8BIT,
+			  UART16550_PARITY_NONE,
+			  UART16550_STOP_1BIT);
+	}
+
+	while((UART16550_READ(UART_LSR) & 0x1) == 0);
+	return UART16550_READ(UART_RX);
+}
+
+
+int putDebugChar(uint8 byte)
+{
+	int i;
+	if (!remoteDebugInitialized) {
+		remoteDebugInitialized = 1;
+		debugInit(UART16550_BAUD_115200,
+			  UART16550_DATA_8BIT,
+			  UART16550_PARITY_NONE,
+			  UART16550_STOP_1BIT);
+	}
+
+	while ((UART16550_READ(UART_LSR)&0x40) == 0);
+	UART16550_WRITE(UART_TX, byte);
+	//for (i=0;i<0xfff;i++);
+
+	return 1;
+}
+
+#endif
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/int-handler.S linux/arch/mips/au1000/common/int-handler.S
--- linux-2.4.10-pre6/arch/mips/au1000/common/int-handler.S	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/int-handler.S	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,71 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: ppopov@mvista.com
+ *
+ * Interrupt dispatcher for Au1000 boards.
+ *
+ * This program is free software; you can redistribute	it and/or modify it
+ * under  the terms of	the GNU General	 Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/config.h>
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+	.text
+	.set	macro
+	.set	noat
+	.align	5
+
+NESTED(au1000_IRQ, PT_SIZE, sp)
+	SAVE_ALL
+	CLI				# Important: mark KERNEL mode !
+
+	mfc0	t0,CP0_CAUSE		# get pending interrupts
+	mfc0	t1,CP0_STATUS		# get enabled interrupts
+	and	t0,t1			# isolate allowed ones
+
+	andi	t0,0xff00		# isolate pending bits
+	beqz	t0, 3f			# spurious interrupt
+
+	andi	a0, t0, CAUSEF_IP7
+	beq	a0, zero, 1f
+	move	a0, sp
+	jal	mips_timer_interrupt
+	j	ret_from_irq
+
+1:
+	andi	a0, t0, CAUSEF_IP2	# Interrupt Controller 0, Request 0
+	beq	a0, zero, 2f	        
+	move	a0,sp  
+	jal	intc0_req0_irqdispatch
+	j	ret_from_irq
+2:
+	andi	a0, t0, CAUSEF_IP3	# Interrupt Controller 0, Request 1
+	beq	a0, zero, 3f	       
+	move	a0,sp  
+	jal	intc0_req1_irqdispatch
+	j	ret_from_irq
+3:
+	andi	a0, t0, CAUSEF_IP4	# Interrupt Controller 1, Request 0
+	beq	a0, zero, 4f	       
+	move	a0,sp  
+	jal	intc1_req0_irqdispatch
+	j	ret_from_irq
+4:
+	andi	a0, t0, CAUSEF_IP5	# Interrupt Controller 1, Request 1
+	beq	a0, zero, 5f	       
+	move	a0, sp  
+	jal	intc1_req1_irqdispatch
+	j	ret_from_irq
+
+5:	
+	move	a0, sp
+	jal	mips_spurious_interrupt
+done:
+	j	ret_from_irq
+END(au1000_IRQ)
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/irq.c linux/arch/mips/au1000/common/irq.c
--- linux-2.4.10-pre6/arch/mips/au1000/common/irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/irq.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,471 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ *	Au1000 interrupt routines.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *		ppopov@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute	 it and/or modify it
+ *  under  the terms of	 the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the	License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED	  ``AS	IS'' AND   ANY	EXPRESS OR IMPLIED
+ *  WARRANTIES,	  INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO	EVENT  SHALL   THE AUTHOR  BE	 LIABLE FOR ANY	  DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED	  TO, PROCUREMENT OF  SUBSTITUTE GOODS	OR SERVICES; LOSS OF
+ *  USE, DATA,	OR PROFITS; OR	BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN	 CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+
+#undef DEBUG_IRQ
+#ifdef DEBUG_IRQ
+/* note: prints function name for you */
+#define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
+#else
+#define DPRINTK(fmt, args...)
+#endif
+
+#define EXT_INTC0_REQ0 2 /* IP 2 */
+#define EXT_INTC0_REQ1 3 /* IP 3 */
+#define EXT_INTC1_REQ0 4 /* IP 4 */
+#define EXT_INTC1_REQ1 5 /* IP 5 */
+#define MIPS_TIMER_IP  7 /* IP 7 */
+
+#ifdef CONFIG_REMOTE_DEBUG
+extern void breakpoint(void);
+#endif
+
+extern asmlinkage void au1000_IRQ(void);
+
+extern void set_debug_traps(void);
+extern irq_cpustat_t irq_stat [];
+extern irq_desc_t irq_desc[NR_IRQS];
+
+unsigned int local_bh_count[NR_CPUS];
+unsigned int local_irq_count[NR_CPUS];
+
+static void setup_local_irq(unsigned int irq, int type, int int_req);
+static unsigned int startup_irq(unsigned int irq);
+static void end_irq(unsigned int irq_nr);
+static inline void mask_and_ack_level_irq(unsigned int irq_nr);
+static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr);
+static inline void mask_and_ack_fall_edge_irq(unsigned int irq_nr);
+static inline void local_enable_irq(unsigned int irq_nr);
+static inline void local_disable_irq(unsigned int irq_nr);
+
+unsigned long spurious_interrupts;
+extern unsigned int do_IRQ(int irq, struct pt_regs *regs);
+extern void __init init_generic_irq(void);
+
+static inline void sync(void)
+{
+	__asm volatile ("sync");
+}
+
+
+/* Function for careful CP0 interrupt mask access */
+static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
+{
+	unsigned long status = read_32bit_cp0_register(CP0_STATUS);
+	status &= ~((clr_mask & 0xFF) << 8);
+	status |=   (set_mask & 0xFF) << 8;
+	write_32bit_cp0_register(CP0_STATUS, status);
+}
+
+
+static inline void mask_cpu_irq_input(unsigned int irq_nr)
+{
+	modify_cp0_intmask(irq_nr, 0);
+}
+
+
+static inline void unmask_cpu_irq_input(unsigned int irq_nr)
+{
+	modify_cp0_intmask(0, irq_nr);
+}
+
+
+static void disable_cpu_irq_input(unsigned int irq_nr)
+{
+	unsigned long flags;
+
+	save_and_cli(flags);
+	mask_cpu_irq_input(irq_nr);
+	restore_flags(flags);
+}
+
+
+static void enable_cpu_irq_input(unsigned int irq_nr)
+{
+	unsigned long flags;
+
+	save_and_cli(flags);
+	unmask_cpu_irq_input(irq_nr);
+	restore_flags(flags);
+}
+
+
+static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
+{
+	/* Config2[n], Config1[n], Config0[n] */
+	if (irq_nr > AU1000_LAST_INTC0_INT) {
+		switch (type) {
+			case INTC_INT_RISE_EDGE: /* 0:0:1 */
+				outl(1<<irq_nr,INTC1_CONFIG2_CLEAR);
+				outl(1<<irq_nr, INTC1_CONFIG1_CLEAR);
+				outl(1<<irq_nr, INTC1_CONFIG0_SET);
+				break;
+			case INTC_INT_FALL_EDGE: /* 0:1:0 */
+				outl(1<<irq_nr, INTC1_CONFIG2_CLEAR);
+				outl(1<<irq_nr, INTC1_CONFIG1_SET);
+				outl(1<<irq_nr, INTC1_CONFIG0_CLEAR);
+				break;
+			case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
+				outl(1<<irq_nr, INTC1_CONFIG2_SET);
+				outl(1<<irq_nr, INTC1_CONFIG1_CLEAR);
+				outl(1<<irq_nr, INTC1_CONFIG0_SET);
+				break;
+			case INTC_INT_LOW_LEVEL: /* 1:1:0 */
+				outl(1<<irq_nr, INTC1_CONFIG2_SET);
+				outl(1<<irq_nr, INTC1_CONFIG1_SET);
+				outl(1<<irq_nr, INTC1_CONFIG0_CLEAR);
+				break;
+			case INTC_INT_DISABLED: /* 0:0:0 */
+				outl(1<<irq_nr, INTC1_CONFIG0_CLEAR);
+				outl(1<<irq_nr, INTC1_CONFIG1_CLEAR);
+				outl(1<<irq_nr, INTC1_CONFIG2_CLEAR);
+				break;
+			default: /* disable the interrupt */
+				printk("unexpected int type %d (irq %d)\n", type, irq_nr);
+				outl(1<<irq_nr, INTC1_CONFIG0_CLEAR);
+				outl(1<<irq_nr, INTC1_CONFIG1_CLEAR);
+				outl(1<<irq_nr, INTC1_CONFIG2_CLEAR);
+				return;
+		}
+		if (int_req) /* assign to interrupt request 1 */
+			outl(1<<irq_nr, INTC1_ASSIGN_REQ_CLEAR);
+		else	     /* assign to interrupt request 0 */
+			outl(1<<irq_nr, INTC1_ASSIGN_REQ_SET);
+		outl(1<<irq_nr, INTC1_SOURCE_SET);
+		outl(1<<irq_nr, INTC1_MASK_CLEAR);
+	}
+	else {
+		switch (type) {
+			case INTC_INT_RISE_EDGE: /* 0:0:1 */
+				outl(1<<irq_nr,INTC0_CONFIG2_CLEAR);
+				outl(1<<irq_nr, INTC0_CONFIG1_CLEAR);
+				outl(1<<irq_nr, INTC0_CONFIG0_SET);
+				break;
+			case INTC_INT_FALL_EDGE: /* 0:1:0 */
+				outl(1<<irq_nr, INTC0_CONFIG2_CLEAR);
+				outl(1<<irq_nr, INTC0_CONFIG1_SET);
+				outl(1<<irq_nr, INTC0_CONFIG0_CLEAR);
+				break;
+			case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
+				outl(1<<irq_nr, INTC0_CONFIG2_SET);
+				outl(1<<irq_nr, INTC0_CONFIG1_CLEAR);
+				outl(1<<irq_nr, INTC0_CONFIG0_SET);
+				break;
+			case INTC_INT_LOW_LEVEL: /* 1:1:0 */
+				outl(1<<irq_nr, INTC0_CONFIG2_SET);
+				outl(1<<irq_nr, INTC0_CONFIG1_SET);
+				outl(1<<irq_nr, INTC0_CONFIG0_CLEAR);
+				break;
+			case INTC_INT_DISABLED: /* 0:0:0 */
+				outl(1<<irq_nr, INTC0_CONFIG0_CLEAR);
+				outl(1<<irq_nr, INTC0_CONFIG1_CLEAR);
+				outl(1<<irq_nr, INTC0_CONFIG2_CLEAR);
+				break;
+			default: /* disable the interrupt */
+				printk("unexpected int type %d (irq %d)\n", type, irq_nr);
+				outl(1<<irq_nr, INTC0_CONFIG0_CLEAR);
+				outl(1<<irq_nr, INTC0_CONFIG1_CLEAR);
+				outl(1<<irq_nr, INTC0_CONFIG2_CLEAR);
+				return;
+		}
+		if (int_req) /* assign to interrupt request 1 */
+			outl(1<<irq_nr, INTC0_ASSIGN_REQ_CLEAR);
+		else	     /* assign to interrupt request 0 */
+			outl(1<<irq_nr, INTC0_ASSIGN_REQ_SET);
+		outl(1<<irq_nr, INTC0_SOURCE_SET);
+		outl(1<<irq_nr, INTC0_MASK_CLEAR);
+	}
+	sync();
+}
+
+
+static unsigned int startup_irq(unsigned int irq_nr)
+{
+	local_enable_irq(irq_nr);
+	return 0; 
+}
+
+
+static void shutdown_irq(unsigned int irq_nr)
+{
+	local_disable_irq(irq_nr);
+	return;
+}
+
+
+static inline void local_enable_irq(unsigned int irq_nr)
+{
+	if (irq_nr > AU1000_LAST_INTC0_INT) {
+		outl(1<<irq_nr, INTC1_MASK_SET);
+	}
+	else {
+		outl(1<<irq_nr, INTC0_MASK_SET);
+	}
+	sync();
+}
+
+
+static inline void local_disable_irq(unsigned int irq_nr)
+{
+	if (irq_nr > AU1000_LAST_INTC0_INT) {
+		outl(1<<irq_nr, INTC1_MASK_CLEAR);
+	}
+	else {
+		outl(1<<irq_nr, INTC0_MASK_CLEAR);
+	}
+	sync();
+}
+
+
+static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr)
+{
+	if (irq_nr > AU1000_LAST_INTC0_INT) {
+		outl(1<<irq_nr, INTC1_R_EDGE_DETECT_CLEAR);
+		outl(1<<irq_nr, INTC1_MASK_CLEAR);
+	}
+	else {
+		outl(1<<irq_nr, INTC0_R_EDGE_DETECT_CLEAR);
+		outl(1<<irq_nr, INTC0_MASK_CLEAR);
+	}
+	sync();
+}
+
+
+static inline void mask_and_ack_fall_edge_irq(unsigned int irq_nr)
+{
+	if (irq_nr > AU1000_LAST_INTC0_INT) {
+		outl(1<<irq_nr, INTC1_F_EDGE_DETECT_CLEAR);
+		outl(1<<irq_nr, INTC1_MASK_CLEAR);
+	}
+	else {
+		outl(1<<irq_nr, INTC0_F_EDGE_DETECT_CLEAR);
+		outl(1<<irq_nr, INTC0_MASK_CLEAR);
+	}
+}
+
+
+static inline void mask_and_ack_level_irq(unsigned int irq_nr)
+{
+	local_disable_irq(irq_nr);
+	sync();
+	return;
+}
+
+
+static void end_irq(unsigned int irq_nr)
+{
+	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		local_enable_irq(irq_nr);
+	else
+		printk("warning: end_irq %d did not enable\n", irq_nr);
+}
+
+
+static struct hw_interrupt_type rise_edge_irq_type = {
+	"Au1000 Rise Edge",
+	startup_irq,
+	shutdown_irq,
+	local_enable_irq,
+	local_disable_irq,
+	mask_and_ack_rise_edge_irq,
+	end_irq,
+	NULL
+};
+
+
+static struct hw_interrupt_type fall_edge_irq_type = {
+	"Au1000 Fall Edge",
+	startup_irq,
+	shutdown_irq,
+	local_enable_irq,
+	local_disable_irq,
+	mask_and_ack_fall_edge_irq,
+	end_irq,
+	NULL
+};
+
+
+static struct hw_interrupt_type level_irq_type = {
+	"Au1000 Level",
+	startup_irq,
+	shutdown_irq,
+	local_enable_irq,
+	local_disable_irq,
+	mask_and_ack_level_irq,
+	end_irq,
+	NULL
+};
+
+
+void enable_cpu_timer(void)
+{
+	enable_cpu_irq_input(1<<MIPS_TIMER_IP); /* timer interrupt */
+}
+
+
+void __init init_IRQ(void)
+{
+	int i;
+	unsigned long cp0_status;
+
+	cp0_status = read_32bit_cp0_register(CP0_STATUS);
+	memset(irq_desc, 0, sizeof(irq_desc));
+	set_except_vector(0, au1000_IRQ);
+
+	init_generic_irq();
+	
+	/* 
+	 * Setup high priority interrupts on int_request0; low priority on
+	 * int_request1
+	 */
+	for (i = 0; i <= NR_IRQS; i++) {
+		switch (i) {
+			case AU1000_MAC0_DMA_INT:
+			case AU1000_MAC1_DMA_INT:
+				setup_local_irq(i, INTC_INT_HIGH_LEVEL, 0);
+				irq_desc[i].handler = &level_irq_type;
+				break;
+			default: /* active high, level interrupt */
+				setup_local_irq(i, INTC_INT_HIGH_LEVEL, 1);
+				irq_desc[i].handler = &level_irq_type;
+				break;
+		}
+	}
+
+	set_cp0_status(ALLINTS);
+#ifdef CONFIG_REMOTE_DEBUG
+	/* If local serial I/O used for debug port, enter kgdb at once */
+	puts("Waiting for kgdb to connect...");
+	set_debug_traps();
+	breakpoint(); 
+#endif
+}
+
+
+void mips_spurious_interrupt(struct pt_regs *regs)
+{
+	spurious_interrupts++;
+}
+
+
+void intc0_req0_irqdispatch(struct pt_regs *regs)
+{
+	int irq = 0, i;
+	unsigned long int_request;
+
+	int_request = inl(INTC0_REQ0_INT);
+
+	if (!int_request) return;
+
+	for (i=0; i<32; i++) {
+		if ((int_request & 0x1)) {
+			do_IRQ(irq, regs);
+		}
+		irq++;
+		int_request >>= 1;
+	}
+}
+
+
+void intc0_req1_irqdispatch(struct pt_regs *regs)
+{
+	int irq = 0, i;
+	unsigned long int_request;
+
+	int_request = inl(INTC0_REQ1_INT);
+
+	if (!int_request) return;
+
+	for (i=0; i<32; i++) {
+		if ((int_request & 0x1)) {
+			do_IRQ(irq, regs);
+		}
+		irq++;
+		int_request >>= 1;
+	}
+}
+
+
+void intc1_req0_irqdispatch(struct pt_regs *regs)
+{
+	int irq = 0, i;
+	unsigned long int_request;
+
+	int_request = inl(INTC1_REQ0_INT);
+
+	if (!int_request) return;
+
+	for (i=0; i<32; i++) {
+		if ((int_request & 0x1)) {
+			do_IRQ(irq, regs);
+		}
+		irq++;
+		int_request >>= 1;
+	}
+}
+
+
+void intc1_req1_irqdispatch(struct pt_regs *regs)
+{
+	int irq = 0, i;
+	unsigned long int_request;
+
+	int_request = inl(INTC1_REQ1_INT);
+
+	if (!int_request) return;
+
+	for (i=0; i<32; i++) {
+		if ((int_request & 0x1)) {
+			do_IRQ(irq, regs);
+		}
+		irq++;
+		int_request >>= 1;
+	}
+}
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/prom.c linux/arch/mips/au1000/common/prom.c
--- linux-2.4.10-pre6/arch/mips/au1000/common/prom.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/prom.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,120 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *    PROM library initialisation code, assuming a version of
+ *    pmon is the boot code.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's 
+ * arch/mips/mips-boards/xx files.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+
+/* #define DEBUG_CMDLINE */
+
+char arcs_cmdline[COMMAND_LINE_SIZE];
+int prom_argc;
+char **prom_argv, **prom_envp;
+
+typedef struct {
+	char *name;
+/*	char *val; */
+} t_env_var;
+
+
+char * __init prom_getcmdline(void)
+{
+	return &(arcs_cmdline[0]);
+}
+
+void  __init prom_init_cmdline(void)
+{
+	char *cp;
+	int actr;
+
+	actr = 1; /* Always ignore argv[0] */
+
+	cp = &(arcs_cmdline[0]);
+	while(actr < prom_argc) {
+	        strcpy(cp, prom_argv[actr]);
+		cp += strlen(prom_argv[actr]);
+		*cp++ = ' ';
+		actr++;
+	}
+	if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
+		--cp;
+	*cp = '\0';
+
+}
+
+
+char *prom_getenv(char *envname)
+{
+	/*
+	 * Return a pointer to the given environment variable.
+	 * Environment variables are stored in the form of "memsize=64".
+	 */
+
+	t_env_var *env = (t_env_var *)prom_envp;
+	int i;
+
+	i = strlen(envname);
+
+	while(env->name) {
+		if(strncmp(envname, env->name, i) == 0) {
+			return(env->name + strlen(envname) + 1);
+		}
+		env++;
+	}
+	return(NULL);
+}
+
+static inline unsigned char str2hexnum(unsigned char c)
+{
+	if(c >= '0' && c <= '9')
+	return c - '0';
+	if(c >= 'a' && c <= 'f')
+	return c - 'a' + 10;
+	return 0; /* foo */
+}
+
+int __init page_is_ram(unsigned long pagenr)
+{
+	return 1;
+}
+
+void prom_free_prom_memory (void)
+{
+}
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/puts.c linux/arch/mips/au1000/common/puts.c
--- linux-2.4.10-pre6/arch/mips/au1000/common/puts.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/puts.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,144 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Low level uart routines to directly access a 16550 uart.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/types.h>
+
+#define SERIAL_BASE   0xB1100000 /* au1000, uart 0 */
+#define SER_CMD       0x7
+#define SER_DATA      0x1
+#define TX_BUSY       0x20
+
+#define TIMEOUT       0xffffff
+#define SLOW_DOWN
+
+static const char digits[16] = "0123456789abcdef";
+static volatile unsigned long * const com1 = (unsigned char *)SERIAL_BASE;
+
+
+#ifdef SLOW_DOWN
+static inline void slow_down()
+{
+    int k;
+    for (k=0; k<10000; k++);
+}
+#else
+#define slow_down()
+#endif
+
+void
+putch(const unsigned char c)
+{
+    unsigned char ch;
+    int i = 0;
+
+    do {
+        ch = com1[SER_CMD];
+        slow_down();
+        i++;
+        if (i>TIMEOUT) {
+            break;
+        }
+    } while (0 == (ch & TX_BUSY));
+    com1[SER_DATA] = c;
+}
+
+void
+puts(unsigned char *cp)
+{
+    unsigned char ch;
+    int i = 0;
+
+    while (*cp) {
+        do {
+             ch = com1[SER_CMD];
+            slow_down();
+            i++;
+            if (i>TIMEOUT) {
+                break;
+            }
+        } while (0 == (ch & TX_BUSY));
+        com1[SER_DATA] = *cp++;
+    }
+    putch('\r');
+    putch('\n');
+}
+
+void
+fputs(unsigned char *cp)
+{
+    unsigned char ch;
+    int i = 0;
+
+    while (*cp) {
+
+        do {
+             ch = com1[SER_CMD];
+             slow_down();
+            i++;
+            if (i>TIMEOUT) {
+                break;
+            }
+        } while (0 == (ch & TX_BUSY));
+        com1[SER_DATA] = *cp++;
+    }
+}
+
+
+void
+put64(uint64_t ul)
+{
+    int cnt;
+    unsigned ch;
+
+    cnt = 16;            /* 16 nibbles in a 64 bit long */
+    putch('0');
+    putch('x');
+    do {
+        cnt--;
+        ch = (unsigned char)(ul >> cnt * 4) & 0x0F;
+                putch(digits[ch]);
+    } while (cnt > 0);
+}
+
+void
+put32(unsigned u)
+{
+    int cnt;
+    unsigned ch;
+
+    cnt = 8;            /* 8 nibbles in a 32 bit long */
+    putch('0');
+    putch('x');
+    do {
+        cnt--;
+        ch = (unsigned char)(u >> cnt * 4) & 0x0F;
+                putch(digits[ch]);
+    } while (cnt > 0);
+}
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/reset.c linux/arch/mips/au1000/common/reset.c
--- linux-2.4.10-pre6/arch/mips/au1000/common/reset.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/reset.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,60 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Au1000 reset routines.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+
+void au1000_restart(char *command)
+{
+	set_cp0_status(ST0_BEV | ST0_ERL);
+	set_cp0_config(CONF_CM_UNCACHED);
+	flush_cache_all();
+	write_32bit_cp0_register(CP0_WIRED, 0);
+	__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+}
+
+void au1000_halt(void)
+{
+	printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+	while (1)
+		__asm__(".set\tmips3\n\t"
+	                "wait\n\t"
+			".set\tmips0");
+}
+
+void au1000_power_off(void)
+{
+	au1000_halt();
+}
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/serial.c linux/arch/mips/au1000/common/serial.c
--- linux-2.4.10-pre6/arch/mips/au1000/common/serial.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/serial.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,3100 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Au1000 serial port driver.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ *  Derived almost entirely from drivers/char/serial.c:
+ *
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *  Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 
+ * 		1998, 1999  Theodore Ts'o
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+static char *serial_version = "1.01";
+static char *serial_revdate = "2001-02-08";
+
+
+#include <linux/config.h>
+#include <linux/version.h>
+
+#undef SERIAL_PARANOIA_CHECK
+#define CONFIG_SERIAL_NOPAUSE_IO
+#define SERIAL_DO_RESTART
+
+
+/* Set of debugging defines */
+
+#undef SERIAL_DEBUG_INTR
+#undef SERIAL_DEBUG_OPEN
+#undef SERIAL_DEBUG_FLOW
+#undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
+#undef SERIAL_DEBUG_PCI
+#undef SERIAL_DEBUG_AUTOCONF
+
+#ifdef MODULE
+#undef CONFIG_AU1000_SERIAL_CONSOLE
+#endif
+
+#define CONFIG_SERIAL_RSA
+
+#define RS_STROBE_TIME (10*HZ)
+#define RS_ISR_PASS_LIMIT 256
+  
+/*
+ * End of serial driver configuration section.
+ */
+
+#ifdef MODVERSIONS
+#include <linux/modversions.h>
+#endif
+#include <linux/module.h>
+
+#include <linux/types.h>
+#ifdef LOCAL_HEADERS
+#include "serial_local.h"
+#else
+#include <linux/serial.h>
+#include <linux/serialP.h>
+#include <asm/au1000.h>
+#include <asm/serial.h>
+#define LOCAL_VERSTRING ""
+#endif
+
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/timer.h>
+#include <linux/interrupt.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/major.h>
+#include <linux/string.h>
+#include <linux/fcntl.h>
+#include <linux/ptrace.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <asm/uaccess.h>
+#include <linux/delay.h>
+#ifdef CONFIG_AU1000_SERIAL_CONSOLE
+#include <linux/console.h>
+#endif
+#ifdef CONFIG_MAGIC_SYSRQ
+#include <linux/sysrq.h>
+#endif
+
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/bitops.h>
+
+#ifdef CONFIG_MAC_SERIAL
+#define SERIAL_DEV_OFFSET	2
+#else
+#define SERIAL_DEV_OFFSET	0
+#endif
+
+#ifdef SERIAL_INLINE
+#define _INLINE_ inline
+#else
+#define _INLINE_
+#endif
+
+static char *serial_name = "Serial driver";
+
+static DECLARE_TASK_QUEUE(tq_serial);
+
+static struct tty_driver serial_driver, callout_driver;
+static int serial_refcount;
+
+static struct timer_list serial_timer;
+
+extern unsigned long get_au1000_uart_baud(void);
+
+/* serial subtype definitions */
+#ifndef SERIAL_TYPE_NORMAL
+#define SERIAL_TYPE_NORMAL	1
+#define SERIAL_TYPE_CALLOUT	2
+#endif
+
+/* number of characters left in xmit buffer before we ask for more */
+#define WAKEUP_CHARS 256
+
+/*
+ * IRQ_timeout		- How long the timeout should be for each IRQ
+ * 				should be after the IRQ has been active.
+ */
+
+static struct async_struct *IRQ_ports[NR_IRQS];
+static int IRQ_timeout[NR_IRQS];
+#ifdef CONFIG_AU1000_SERIAL_CONSOLE
+static struct console sercons;
+static int lsr_break_flag;
+#endif
+#if defined(CONFIG_AU1000_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+static unsigned long break_pressed; /* break, really ... */
+#endif
+
+static void autoconfig(struct serial_state * state);
+static void change_speed(struct async_struct *info, struct termios *old);
+static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
+
+/*
+ * Here we define the default xmit fifo size used for each type of
+ * UART
+ */
+static struct serial_uart_config uart_config[] = {
+	{ "unknown", 1, 0 }, 
+	{ "8250", 1, 0 }, 
+	{ "16450", 1, 0 }, 
+	{ "16550", 1, 0 }, 
+	{ 0, 0}
+};
+
+
+static struct serial_state rs_table[RS_TABLE_SIZE] = {
+	SERIAL_PORT_DFNS	/* Defined in serial.h */
+};
+
+#define NR_PORTS	(sizeof(rs_table)/sizeof(struct serial_state))
+
+#ifndef PREPARE_FUNC
+#define PREPARE_FUNC(dev)  (dev->prepare)
+#define ACTIVATE_FUNC(dev)  (dev->activate)
+#define DEACTIVATE_FUNC(dev)  (dev->deactivate)
+#endif
+
+#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
+
+static struct tty_struct *serial_table[NR_PORTS];
+static struct termios *serial_termios[NR_PORTS];
+static struct termios *serial_termios_locked[NR_PORTS];
+
+
+#if defined(MODULE) && defined(SERIAL_DEBUG_MCOUNT)
+#define DBG_CNT(s) printk("(%s): [%x] refc=%d, serc=%d, ttyc=%d -> %s\n", \
+ kdevname(tty->device), (info->flags), serial_refcount,info->count,tty->count,s)
+#else
+#define DBG_CNT(s)
+#endif
+
+/*
+ * tmp_buf is used as a temporary buffer by serial_write.  We need to
+ * lock it in case the copy_from_user blocks while swapping in a page,
+ * and some other program tries to do a serial write at the same time.
+ * Since the lock will only come under contention when the system is
+ * swapping and available memory is low, it makes sense to share one
+ * buffer across all the serial ports, since it significantly saves
+ * memory if large numbers of serial ports are open.
+ */
+static unsigned char *tmp_buf;
+#ifdef DECLARE_MUTEX
+static DECLARE_MUTEX(tmp_buf_sem);
+#else
+static struct semaphore tmp_buf_sem = MUTEX;
+#endif
+
+
+static inline int serial_paranoia_check(struct async_struct *info,
+					kdev_t device, const char *routine)
+{
+#ifdef SERIAL_PARANOIA_CHECK
+	static const char *badmagic =
+		"Warning: bad magic number for serial struct (%s) in %s\n";
+	static const char *badinfo =
+		"Warning: null async_struct for (%s) in %s\n";
+
+	if (!info) {
+		printk(badinfo, kdevname(device), routine);
+		return 1;
+	}
+	if (info->magic != SERIAL_MAGIC) {
+		printk(badmagic, kdevname(device), routine);
+		return 1;
+	}
+#endif
+	return 0;
+}
+
+
+static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
+{
+	return (inl(info->port+offset) & 0xff);
+}
+
+static _INLINE_ void serial_out(struct async_struct *info, int offset, int value)
+{
+	outl(value & 0xff, info->port+offset);
+}
+
+
+/*
+ * We used to support using pause I/O for certain machines.  We
+ * haven't supported this for a while, but just in case it's badly
+ * needed for certain old 386 machines, I've left these #define's
+ * in....
+ */
+#define serial_inp(info, offset)		serial_in(info, offset)
+#define serial_outp(info, offset, value)	serial_out(info, offset, value)
+
+
+/*
+ * ------------------------------------------------------------
+ * rs_stop() and rs_start()
+ *
+ * This routines are called before setting or resetting tty->stopped.
+ * They enable or disable transmitter interrupts, as necessary.
+ * ------------------------------------------------------------
+ */
+static void rs_stop(struct tty_struct *tty)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+
+	if (serial_paranoia_check(info, tty->device, "rs_stop"))
+		return;
+	
+	save_flags(flags); cli();
+	if (info->IER & UART_IER_THRI) {
+		info->IER &= ~UART_IER_THRI;
+		serial_out(info, UART_IER, info->IER);
+	}
+	restore_flags(flags);
+}
+
+static void rs_start(struct tty_struct *tty)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+	
+	if (serial_paranoia_check(info, tty->device, "rs_start"))
+		return;
+	
+	save_flags(flags); cli();
+	if (info->xmit.head != info->xmit.tail
+	    && info->xmit.buf
+	    && !(info->IER & UART_IER_THRI)) {
+		info->IER |= UART_IER_THRI;
+		serial_out(info, UART_IER, info->IER);
+	}
+	restore_flags(flags);
+}
+
+/*
+ * ----------------------------------------------------------------------
+ *
+ * Here starts the interrupt handling routines.  All of the following
+ * subroutines are declared as inline and are folded into
+ * rs_interrupt().  They were separated out for readability's sake.
+ *
+ * Note: rs_interrupt() is a "fast" interrupt, which means that it
+ * runs with interrupts turned off.  People who may want to modify
+ * rs_interrupt() should try to keep the interrupt handler as fast as
+ * possible.  After you are done making modifications, it is not a bad
+ * idea to do:
+ * 
+ * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
+ *
+ * and look at the resulting assemble code in serial.s.
+ *
+ * 				- Ted Ts'o (tytso@mit.edu), 7-Mar-93
+ * -----------------------------------------------------------------------
+ */
+
+/*
+ * This routine is used by the interrupt handler to schedule
+ * processing in the software interrupt portion of the driver.
+ */
+static _INLINE_ void rs_sched_event(struct async_struct *info,
+				  int event)
+{
+	info->event |= 1 << event;
+	queue_task(&info->tqueue, &tq_serial);
+	mark_bh(SERIAL_BH);
+}
+
+static _INLINE_ void receive_chars(struct async_struct *info,
+				 int *status, struct pt_regs * regs)
+{
+	struct tty_struct *tty = info->tty;
+	unsigned char ch;
+	int ignored = 0;
+	struct	async_icount *icount;
+
+	icount = &info->state->icount;
+	do {
+		ch = serial_inp(info, UART_RX);
+		if (tty->flip.count >= TTY_FLIPBUF_SIZE)
+			goto ignore_char;
+		*tty->flip.char_buf_ptr = ch;
+		icount->rx++;
+		
+#ifdef SERIAL_DEBUG_INTR
+		printk("DR%02x:%02x...", ch, *status);
+#endif
+		*tty->flip.flag_buf_ptr = 0;
+		if (*status & (UART_LSR_BI | UART_LSR_PE |
+			       UART_LSR_FE | UART_LSR_OE)) {
+			/*
+			 * For statistics only
+			 */
+			if (*status & UART_LSR_BI) {
+				*status &= ~(UART_LSR_FE | UART_LSR_PE);
+				icount->brk++;
+				/*
+				 * We do the SysRQ and SAK checking
+				 * here because otherwise the break
+				 * may get masked by ignore_status_mask
+				 * or read_status_mask.
+				 */
+#if defined(CONFIG_AU1000_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+				if (info->line == sercons.index) {
+					if (!break_pressed) {
+						break_pressed = jiffies;
+						goto ignore_char;
+					}
+					break_pressed = 0;
+				}
+#endif
+				if (info->flags & ASYNC_SAK)
+					do_SAK(tty);
+			} else if (*status & UART_LSR_PE)
+				icount->parity++;
+			else if (*status & UART_LSR_FE)
+				icount->frame++;
+			if (*status & UART_LSR_OE)
+				icount->overrun++;
+
+			/*
+			 * Now check to see if character should be
+			 * ignored, and mask off conditions which
+			 * should be ignored.
+			 */
+			if (*status & info->ignore_status_mask) {
+				if (++ignored > 100)
+					break;
+				goto ignore_char;
+			}
+			*status &= info->read_status_mask;
+
+#ifdef CONFIG_AU1000_SERIAL_CONSOLE
+			if (info->line == sercons.index) {
+				/* Recover the break flag from console xmit */
+				*status |= lsr_break_flag;
+				lsr_break_flag = 0;
+			}
+#endif
+			if (*status & (UART_LSR_BI)) {
+#ifdef SERIAL_DEBUG_INTR
+				printk("handling break....");
+#endif
+				*tty->flip.flag_buf_ptr = TTY_BREAK;
+			} else if (*status & UART_LSR_PE)
+				*tty->flip.flag_buf_ptr = TTY_PARITY;
+			else if (*status & UART_LSR_FE)
+				*tty->flip.flag_buf_ptr = TTY_FRAME;
+			if (*status & UART_LSR_OE) {
+				/*
+				 * Overrun is special, since it's
+				 * reported immediately, and doesn't
+				 * affect the current character
+				 */
+				tty->flip.count++;
+				tty->flip.flag_buf_ptr++;
+				tty->flip.char_buf_ptr++;
+				*tty->flip.flag_buf_ptr = TTY_OVERRUN;
+				if (tty->flip.count >= TTY_FLIPBUF_SIZE)
+					goto ignore_char;
+			}
+		}
+#if defined(CONFIG_AU1000_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+		if (break_pressed && info->line == sercons.index) {
+			if (ch != 0 &&
+			    time_before(jiffies, break_pressed + HZ*5)) {
+				handle_sysrq(ch, regs, NULL, NULL);
+				break_pressed = 0;
+				goto ignore_char;
+			}
+			break_pressed = 0;
+		}
+#endif
+		tty->flip.flag_buf_ptr++;
+		tty->flip.char_buf_ptr++;
+		tty->flip.count++;
+	ignore_char:
+		*status = serial_inp(info, UART_LSR);
+	} while (*status & UART_LSR_DR);
+	tty_flip_buffer_push(tty);
+}
+
+static _INLINE_ void transmit_chars(struct async_struct *info, int *intr_done)
+{
+	int count;
+
+	if (info->x_char) {
+		serial_outp(info, UART_TX, info->x_char);
+		info->state->icount.tx++;
+		info->x_char = 0;
+		if (intr_done)
+			*intr_done = 0;
+		return;
+	}
+	if (info->xmit.head == info->xmit.tail
+	    || info->tty->stopped
+	    || info->tty->hw_stopped) {
+		info->IER &= ~UART_IER_THRI;
+		serial_out(info, UART_IER, info->IER);
+		return;
+	}
+	
+	count = info->xmit_fifo_size;
+	do {
+		serial_out(info, UART_TX, info->xmit.buf[info->xmit.tail]);
+		info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
+		info->state->icount.tx++;
+		if (info->xmit.head == info->xmit.tail)
+			break;
+	} while (--count > 0);
+	
+	if (CIRC_CNT(info->xmit.head,
+		     info->xmit.tail,
+		     SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
+		rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
+
+#ifdef SERIAL_DEBUG_INTR
+	printk("THRE...");
+#endif
+	if (intr_done)
+		*intr_done = 0;
+
+	if (info->xmit.head == info->xmit.tail) {
+		info->IER &= ~UART_IER_THRI;
+		serial_out(info, UART_IER, info->IER);
+	}
+}
+
+static _INLINE_ void check_modem_status(struct async_struct *info)
+{
+	int	status;
+	struct	async_icount *icount;
+	
+	status = serial_in(info, UART_MSR);
+
+	if (status & UART_MSR_ANY_DELTA) {
+		icount = &info->state->icount;
+		/* update input line counters */
+		if (status & UART_MSR_TERI)
+			icount->rng++;
+		if (status & UART_MSR_DDSR)
+			icount->dsr++;
+		if (status & UART_MSR_DDCD) {
+			icount->dcd++;
+#ifdef CONFIG_HARD_PPS
+			if ((info->flags & ASYNC_HARDPPS_CD) &&
+			    (status & UART_MSR_DCD))
+				hardpps();
+#endif
+		}
+		if (status & UART_MSR_DCTS)
+			icount->cts++;
+		wake_up_interruptible(&info->delta_msr_wait);
+	}
+
+	if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
+#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
+		printk("ttys%d CD now %s...", info->line,
+		       (status & UART_MSR_DCD) ? "on" : "off");
+#endif		
+		if (status & UART_MSR_DCD)
+			wake_up_interruptible(&info->open_wait);
+		else if (!((info->flags & ASYNC_CALLOUT_ACTIVE) &&
+			   (info->flags & ASYNC_CALLOUT_NOHUP))) {
+#ifdef SERIAL_DEBUG_OPEN
+			printk("doing serial hangup...");
+#endif
+			if (info->tty)
+				tty_hangup(info->tty);
+		}
+	}
+	if (info->flags & ASYNC_CTS_FLOW) {
+		if (info->tty->hw_stopped) {
+			if (status & UART_MSR_CTS) {
+#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
+				printk("CTS tx start...");
+#endif
+				info->tty->hw_stopped = 0;
+				info->IER |= UART_IER_THRI;
+				serial_out(info, UART_IER, info->IER);
+				rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
+				return;
+			}
+		} else {
+			if (!(status & UART_MSR_CTS)) {
+#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
+				printk("CTS tx stop...");
+#endif
+				info->tty->hw_stopped = 1;
+				info->IER &= ~UART_IER_THRI;
+				serial_out(info, UART_IER, info->IER);
+			}
+		}
+	}
+}
+
+
+
+/*
+ * This is the serial driver's interrupt routine for a single port
+ */
+static void rs_interrupt_single(int irq, void *dev_id, struct pt_regs * regs)
+{
+	int status;
+	int pass_counter = 0;
+	struct async_struct * info;
+	
+#ifdef SERIAL_DEBUG_INTR
+	printk("rs_interrupt_single(%d)...", irq);
+#endif
+
+	info = IRQ_ports[irq];
+	if (!info || !info->tty)
+		return;
+
+	do {
+		status = serial_inp(info, UART_LSR);
+#ifdef SERIAL_DEBUG_INTR
+		printk("status = %x...", status);
+#endif
+		if (status & UART_LSR_DR)
+			receive_chars(info, &status, regs);
+		check_modem_status(info);
+		if (status & UART_LSR_THRE)
+			transmit_chars(info, 0);
+		if (pass_counter++ > RS_ISR_PASS_LIMIT) {
+#if 0
+			printk("rs_single loop break.\n");
+#endif
+			break;
+		}
+	} while (!(serial_in(info, UART_IIR) & UART_IIR_NO_INT));
+	info->last_active = jiffies;
+#ifdef SERIAL_DEBUG_INTR
+	printk("end.\n");
+#endif
+}
+
+
+/*
+ * -------------------------------------------------------------------
+ * Here ends the serial interrupt routines.
+ * -------------------------------------------------------------------
+ */
+
+/*
+ * This routine is used to handle the "bottom half" processing for the
+ * serial driver, known also the "software interrupt" processing.
+ * This processing is done at the kernel interrupt level, after the
+ * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON.  This
+ * is where time-consuming activities which can not be done in the
+ * interrupt driver proper are done; the interrupt driver schedules
+ * them using rs_sched_event(), and they get done here.
+ */
+static void do_serial_bh(void)
+{
+	run_task_queue(&tq_serial);
+}
+
+static void do_softint(void *private_)
+{
+	struct async_struct	*info = (struct async_struct *) private_;
+	struct tty_struct	*tty;
+	
+	tty = info->tty;
+	if (!tty)
+		return;
+
+	if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
+		if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+		    tty->ldisc.write_wakeup)
+			(tty->ldisc.write_wakeup)(tty);
+		wake_up_interruptible(&tty->write_wait);
+#ifdef SERIAL_HAVE_POLL_WAIT
+		wake_up_interruptible(&tty->poll_wait);
+#endif
+	}
+}
+
+/*
+ * This subroutine is called when the RS_TIMER goes off.  It is used
+ * by the serial driver to handle ports that do not have an interrupt
+ * (irq=0).  This doesn't work very well for 16450's, but gives barely
+ * passable results for a 16550A.  (Although at the expense of much
+ * CPU overhead).
+ */
+static void rs_timer(unsigned long dummy)
+{
+	static unsigned long last_strobe;
+	struct async_struct *info;
+	unsigned int	i;
+	unsigned long flags;
+
+	if ((jiffies - last_strobe) >= RS_STROBE_TIME) {
+		for (i=0; i < NR_IRQS; i++) {
+			info = IRQ_ports[i];
+			if (!info)
+				continue;
+			save_flags(flags); cli();
+				rs_interrupt_single(i, NULL, NULL);
+			restore_flags(flags);
+		}
+	}
+	last_strobe = jiffies;
+	mod_timer(&serial_timer, jiffies + RS_STROBE_TIME);
+
+#if 0
+	if (IRQ_ports[0]) {
+		save_flags(flags); cli();
+		rs_interrupt_single(0, NULL, NULL);
+		restore_flags(flags);
+
+		mod_timer(&serial_timer, jiffies + IRQ_timeout[0]);
+	}
+#endif
+}
+
+/*
+ * ---------------------------------------------------------------
+ * Low level utility subroutines for the serial driver:  routines to
+ * figure out the appropriate timeout for an interrupt chain, routines
+ * to initialize and startup a serial port, and routines to shutdown a
+ * serial port.  Useful stuff like that.
+ * ---------------------------------------------------------------
+ */
+
+/*
+ * This routine figures out the correct timeout for a particular IRQ.
+ * It uses the smallest timeout of all of the serial ports in a
+ * particular interrupt chain.  Now only used for IRQ 0....
+ */
+static void figure_IRQ_timeout(int irq)
+{
+	struct	async_struct	*info;
+	int	timeout = 60*HZ;	/* 60 seconds === a long time :-) */
+
+	info = IRQ_ports[irq];
+	if (!info) {
+		IRQ_timeout[irq] = 60*HZ;
+		return;
+	}
+	while (info) {
+		if (info->timeout < timeout)
+			timeout = info->timeout;
+		info = info->next_port;
+	}
+	if (!irq)
+		timeout = timeout / 2;
+	IRQ_timeout[irq] = (timeout > 3) ? timeout-2 : 1;
+}
+
+
+static int startup(struct async_struct * info)
+{
+	unsigned long flags;
+	int	retval=0;
+	void (*handler)(int, void *, struct pt_regs *);
+	struct serial_state *state= info->state;
+	unsigned long page;
+
+	page = get_zeroed_page(GFP_KERNEL);
+	if (!page)
+		return -ENOMEM;
+
+	save_flags(flags); cli();
+
+	if (info->flags & ASYNC_INITIALIZED) {
+		free_page(page);
+		goto errout;
+	}
+
+	if (!CONFIGURED_SERIAL_PORT(state) || !state->type) {
+		if (info->tty)
+			set_bit(TTY_IO_ERROR, &info->tty->flags);
+		free_page(page);
+		goto errout;
+	}
+	if (info->xmit.buf)
+		free_page(page);
+	else
+		info->xmit.buf = (unsigned char *) page;
+
+
+	if (inl(UART_MOD_CNTRL + state->port) != 0x3) {
+		outl(3, UART_MOD_CNTRL + state->port);
+	}
+#ifdef SERIAL_DEBUG_OPEN
+	printk("starting up ttys%d (irq %d)...", info->line, state->irq);
+#endif
+
+
+	/*
+	 * Clear the FIFO buffers and disable them
+	 * (they will be reenabled in change_speed())
+	 */
+	if (uart_config[state->type].flags & UART_CLEAR_FIFO) {
+		serial_outp(info, UART_FCR, UART_FCR_ENABLE_FIFO);
+		serial_outp(info, UART_FCR, (UART_FCR_ENABLE_FIFO |
+					     UART_FCR_CLEAR_RCVR |
+					     UART_FCR_CLEAR_XMIT));
+		serial_outp(info, UART_FCR, 0);
+	}
+
+	/*
+	 * Clear the interrupt registers.
+	 */
+	(void) serial_inp(info, UART_LSR);
+	(void) serial_inp(info, UART_RX);
+	(void) serial_inp(info, UART_IIR);
+	(void) serial_inp(info, UART_MSR);
+
+	/*
+	 * At this point there's no way the LSR could still be 0xFF;
+	 * if it is, then bail out, because there's likely no UART
+	 * here.
+	 */
+	if (!(info->flags & ASYNC_BUGGY_UART) &&
+	    (serial_inp(info, UART_LSR) == 0xff)) {
+		printk("LSR safety check engaged!\n");
+		if (capable(CAP_SYS_ADMIN)) {
+			if (info->tty)
+				set_bit(TTY_IO_ERROR, &info->tty->flags);
+		} else
+			retval = -ENODEV;
+		goto errout;
+	}
+	
+	/*
+	 * Allocate the IRQ if necessary
+	 */
+#if 0
+	/* au1000, uart0 irq is 0 */
+	if (state->irq && (!IRQ_ports[state->irq] || !IRQ_ports[state->irq]->next_port)) {
+#endif
+	if ((!IRQ_ports[state->irq] || !IRQ_ports[state->irq]->next_port)) {
+		if (IRQ_ports[state->irq]) {
+			retval = -EBUSY;
+			goto errout;
+		} else 
+			handler = rs_interrupt_single;
+
+		retval = request_irq(state->irq, handler, SA_SHIRQ,
+				     "serial", &IRQ_ports[state->irq]);
+		if (retval) {
+			if (capable(CAP_SYS_ADMIN)) {
+				if (info->tty)
+					set_bit(TTY_IO_ERROR,
+						&info->tty->flags);
+				retval = 0;
+			}
+			goto errout;
+		}
+	}
+
+	/*
+	 * Insert serial port into IRQ chain.
+	 */
+	info->prev_port = 0;
+	info->next_port = IRQ_ports[state->irq];
+	if (info->next_port)
+		info->next_port->prev_port = info;
+	IRQ_ports[state->irq] = info;
+	figure_IRQ_timeout(state->irq);
+
+	/*
+	 * Now, initialize the UART 
+	 */
+	serial_outp(info, UART_LCR, UART_LCR_WLEN8);
+
+	info->MCR = 0;
+	if (info->tty->termios->c_cflag & CBAUD)
+		info->MCR = UART_MCR_DTR | UART_MCR_RTS;
+	{
+		if (state->irq != 0)
+			info->MCR |= UART_MCR_OUT2;
+	}
+	info->MCR |= ALPHA_KLUDGE_MCR; 		/* Don't ask */
+	serial_outp(info, UART_MCR, info->MCR);
+	
+	/*
+	 * Finally, enable interrupts
+	 */
+	info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
+	serial_outp(info, UART_IER, info->IER);	/* enable interrupts */
+	
+
+	/*
+	 * And clear the interrupt registers again for luck.
+	 */
+	(void)serial_inp(info, UART_LSR);
+	(void)serial_inp(info, UART_RX);
+	(void)serial_inp(info, UART_IIR);
+	(void)serial_inp(info, UART_MSR);
+
+	if (info->tty)
+		clear_bit(TTY_IO_ERROR, &info->tty->flags);
+	info->xmit.head = info->xmit.tail = 0;
+
+	/*
+	 * Set up serial timers...
+	 */
+	mod_timer(&serial_timer, jiffies + 2*HZ/100);
+
+	/*
+	 * Set up the tty->alt_speed kludge
+	 */
+	if (info->tty) {
+		if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
+			info->tty->alt_speed = 57600;
+		if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
+			info->tty->alt_speed = 115200;
+		if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
+			info->tty->alt_speed = 230400;
+		if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
+			info->tty->alt_speed = 460800;
+	}
+	
+	/*
+	 * and set the speed of the serial port
+	 */
+	change_speed(info, 0);
+
+	info->flags |= ASYNC_INITIALIZED;
+	restore_flags(flags);
+	return 0;
+	
+errout:
+	restore_flags(flags);
+	return retval;
+}
+
+/*
+ * This routine will shutdown a serial port; interrupts are disabled, and
+ * DTR is dropped if the hangup on close termio flag is on.
+ */
+static void shutdown(struct async_struct * info)
+{
+	unsigned long	flags;
+	struct serial_state *state;
+	int		retval;
+
+	if (!(info->flags & ASYNC_INITIALIZED))
+		return;
+
+	state = info->state;
+
+#ifdef SERIAL_DEBUG_OPEN
+	printk("Shutting down serial port %d (irq %d)....", info->line,
+	       state->irq);
+#endif
+	
+	save_flags(flags); cli(); /* Disable interrupts */
+
+	/*
+	 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
+	 * here so the queue might never be waken up
+	 */
+	wake_up_interruptible(&info->delta_msr_wait);
+	
+	/*
+	 * First unlink the serial port from the IRQ chain...
+	 */
+	if (info->next_port)
+		info->next_port->prev_port = info->prev_port;
+	if (info->prev_port)
+		info->prev_port->next_port = info->next_port;
+	else
+		IRQ_ports[state->irq] = info->next_port;
+	figure_IRQ_timeout(state->irq);
+	
+	/*
+	 * Free the IRQ, if necessary
+	 */
+//	if (state->irq && (!IRQ_ports[state->irq] ||
+	if ((!IRQ_ports[state->irq] ||
+			  !IRQ_ports[state->irq]->next_port)) {
+		if (IRQ_ports[state->irq]) {
+			free_irq(state->irq, &IRQ_ports[state->irq]);
+			retval = request_irq(state->irq, rs_interrupt_single,
+					     SA_SHIRQ, "serial",
+					     &IRQ_ports[state->irq]);
+			
+			if (retval)
+				printk("serial shutdown: request_irq: error %d"
+				       "  Couldn't reacquire IRQ.\n", retval);
+		} else
+			free_irq(state->irq, &IRQ_ports[state->irq]);
+	}
+
+	if (info->xmit.buf) {
+		unsigned long pg = (unsigned long) info->xmit.buf;
+		info->xmit.buf = 0;
+		free_page(pg);
+	}
+
+	info->IER = 0;
+	serial_outp(info, UART_IER, 0x00);	/* disable all intrs */
+		info->MCR &= ~UART_MCR_OUT2;
+	info->MCR |= ALPHA_KLUDGE_MCR; 		/* Don't ask */
+	
+	/* disable break condition */
+	serial_out(info, UART_LCR, serial_inp(info, UART_LCR) & ~UART_LCR_SBC);
+	
+	if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
+		info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
+	serial_outp(info, UART_MCR, info->MCR);
+
+	/* disable FIFO's */	
+	serial_outp(info, UART_FCR, (UART_FCR_ENABLE_FIFO |
+				     UART_FCR_CLEAR_RCVR |
+				     UART_FCR_CLEAR_XMIT));
+	serial_outp(info, UART_FCR, 0);
+
+	(void)serial_in(info, UART_RX);    /* read data port to reset things */
+	
+	if (info->tty)
+		set_bit(TTY_IO_ERROR, &info->tty->flags);
+
+	info->flags &= ~ASYNC_INITIALIZED;
+	restore_flags(flags);
+}
+
+
+/*
+ * This routine is called to set the UART divisor registers to match
+ * the specified baud rate for a serial port.
+ */
+static void change_speed(struct async_struct *info,
+			 struct termios *old_termios)
+{
+	int	quot = 0, baud_base, baud;
+	unsigned cflag, cval, fcr = 0;
+	int	bits;
+	unsigned long	flags;
+
+	if (!info->tty || !info->tty->termios)
+		return;
+	cflag = info->tty->termios->c_cflag;
+	if (!CONFIGURED_SERIAL_PORT(info))
+		return;
+
+	/* byte size and parity */
+	switch (cflag & CSIZE) {
+	      case CS5: cval = 0x00; bits = 7; break;
+	      case CS6: cval = 0x01; bits = 8; break;
+	      case CS7: cval = 0x02; bits = 9; break;
+	      case CS8: cval = 0x03; bits = 10; break;
+	      /* Never happens, but GCC is too dumb to figure it out */
+	      default:  cval = 0x00; bits = 7; break;
+	      }
+	if (cflag & CSTOPB) {
+		cval |= 0x04;
+		bits++;
+	}
+	if (cflag & PARENB) {
+		cval |= UART_LCR_PARITY;
+		bits++;
+	}
+	if (!(cflag & PARODD))
+		cval |= UART_LCR_EPAR;
+#ifdef CMSPAR
+	if (cflag & CMSPAR)
+		cval |= UART_LCR_SPAR;
+#endif
+
+	/* Determine divisor based on baud rate */
+	baud = tty_get_baud_rate(info->tty);
+	if (!baud) {
+		baud = 9600;	/* B0 transition handled in rs_set_termios */
+	}
+	baud_base = info->state->baud_base;
+	//if (baud == 38400 &&
+	if (((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)) {
+		quot = info->state->custom_divisor;
+	}
+	else {
+		if (baud == 134)
+			/* Special case since 134 is really 134.5 */
+			quot = (2*baud_base / 269);
+		else if (baud)
+			quot = baud_base / baud;
+	}
+	/* If the quotient is zero refuse the change */
+	if (!quot && old_termios) {
+		info->tty->termios->c_cflag &= ~CBAUD;
+		info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD);
+		baud = tty_get_baud_rate(info->tty);
+		if (!baud)
+			baud = 9600;
+		if (baud == 38400 &&
+		    ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST))
+			quot = info->state->custom_divisor;
+		else {
+			if (baud == 134)
+				/* Special case since 134 is really 134.5 */
+				quot = (2*baud_base / 269);
+			else if (baud)
+				quot = baud_base / baud;
+		}
+	}
+	/* As a last resort, if the quotient is zero, default to 9600 bps */
+	if (!quot)
+		quot = baud_base / 9600;
+	
+	info->quot = quot;
+	info->timeout = ((info->xmit_fifo_size*HZ*bits*quot) / baud_base);
+	info->timeout += HZ/50;		/* Add .02 seconds of slop */
+
+	/* Set up FIFO's */
+	if (uart_config[info->state->type].flags & UART_USE_FIFO) {
+		if ((info->state->baud_base / quot) < 2400)
+			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIGGER_1;
+		else
+			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIGGER_8;
+	}
+	
+	/* CTS flow control flag and modem status interrupts */
+	info->IER &= ~UART_IER_MSI;
+	if (info->flags & ASYNC_HARDPPS_CD)
+		info->IER |= UART_IER_MSI;
+	if (cflag & CRTSCTS) {
+		info->flags |= ASYNC_CTS_FLOW;
+		info->IER |= UART_IER_MSI;
+	} else
+		info->flags &= ~ASYNC_CTS_FLOW;
+	if (cflag & CLOCAL)
+		info->flags &= ~ASYNC_CHECK_CD;
+	else {
+		info->flags |= ASYNC_CHECK_CD;
+		info->IER |= UART_IER_MSI;
+	}
+	serial_out(info, UART_IER, info->IER);
+
+	/*
+	 * Set up parity check flag
+	 */
+#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
+
+	info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
+	if (I_INPCK(info->tty))
+		info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
+	if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
+		info->read_status_mask |= UART_LSR_BI;
+	
+	/*
+	 * Characters to ignore
+	 */
+	info->ignore_status_mask = 0;
+	if (I_IGNPAR(info->tty))
+		info->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
+	if (I_IGNBRK(info->tty)) {
+		info->ignore_status_mask |= UART_LSR_BI;
+		/*
+		 * If we're ignore parity and break indicators, ignore 
+		 * overruns too.  (For real raw support).
+		 */
+		if (I_IGNPAR(info->tty))
+			info->ignore_status_mask |= UART_LSR_OE;
+	}
+	/*
+	 * !!! ignore all characters if CREAD is not set
+	 */
+	if ((cflag & CREAD) == 0)
+		info->ignore_status_mask |= UART_LSR_DR;
+	save_flags(flags); cli();
+
+	serial_outp(info, UART_CLK, quot & 0xffff);
+	serial_outp(info, UART_LCR, cval);
+	info->LCR = cval;				/* Save LCR */
+	restore_flags(flags);
+}
+
+static void rs_put_char(struct tty_struct *tty, unsigned char ch)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+
+	if (serial_paranoia_check(info, tty->device, "rs_put_char"))
+		return;
+
+	if (!tty || !info->xmit.buf)
+		return;
+
+	save_flags(flags); cli();
+	if (CIRC_SPACE(info->xmit.head,
+		       info->xmit.tail,
+		       SERIAL_XMIT_SIZE) == 0) {
+		restore_flags(flags);
+		return;
+	}
+
+	info->xmit.buf[info->xmit.head] = ch;
+	info->xmit.head = (info->xmit.head + 1) & (SERIAL_XMIT_SIZE-1);
+	restore_flags(flags);
+}
+
+static void rs_flush_chars(struct tty_struct *tty)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+				
+	if (serial_paranoia_check(info, tty->device, "rs_flush_chars"))
+		return;
+
+	if (info->xmit.head == info->xmit.tail
+	    || tty->stopped
+	    || tty->hw_stopped
+	    || !info->xmit.buf)
+		return;
+
+	save_flags(flags); cli();
+	info->IER |= UART_IER_THRI;
+	serial_out(info, UART_IER, info->IER);
+	restore_flags(flags);
+}
+
+static int rs_write(struct tty_struct * tty, int from_user,
+		    const unsigned char *buf, int count)
+{
+	int	c, ret = 0;
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+				
+	if (serial_paranoia_check(info, tty->device, "rs_write"))
+		return 0;
+
+	if (!tty || !info->xmit.buf || !tmp_buf)
+		return 0;
+
+	save_flags(flags);
+	if (from_user) {
+		down(&tmp_buf_sem);
+		while (1) {
+			int c1;
+			c = CIRC_SPACE_TO_END(info->xmit.head,
+					      info->xmit.tail,
+					      SERIAL_XMIT_SIZE);
+			if (count < c)
+				c = count;
+			if (c <= 0)
+				break;
+
+			c -= copy_from_user(tmp_buf, buf, c);
+			if (!c) {
+				if (!ret)
+					ret = -EFAULT;
+				break;
+			}
+			cli();
+			c1 = CIRC_SPACE_TO_END(info->xmit.head,
+					       info->xmit.tail,
+					       SERIAL_XMIT_SIZE);
+			if (c1 < c)
+				c = c1;
+			memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
+			info->xmit.head = ((info->xmit.head + c) &
+					   (SERIAL_XMIT_SIZE-1));
+			restore_flags(flags);
+			buf += c;
+			count -= c;
+			ret += c;
+		}
+		up(&tmp_buf_sem);
+	} else {
+		cli();
+		while (1) {
+			c = CIRC_SPACE_TO_END(info->xmit.head,
+					      info->xmit.tail,
+					      SERIAL_XMIT_SIZE);
+			if (count < c)
+				c = count;
+			if (c <= 0) {
+				break;
+			}
+			memcpy(info->xmit.buf + info->xmit.head, buf, c);
+			info->xmit.head = ((info->xmit.head + c) &
+					   (SERIAL_XMIT_SIZE-1));
+			buf += c;
+			count -= c;
+			ret += c;
+		}
+		restore_flags(flags);
+	}
+	if (info->xmit.head != info->xmit.tail
+	    && !tty->stopped
+	    && !tty->hw_stopped
+	    && !(info->IER & UART_IER_THRI)) {
+		info->IER |= UART_IER_THRI;
+		serial_out(info, UART_IER, info->IER);
+	}
+	return ret;
+}
+
+static int rs_write_room(struct tty_struct *tty)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+
+	if (serial_paranoia_check(info, tty->device, "rs_write_room"))
+		return 0;
+	return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
+}
+
+static int rs_chars_in_buffer(struct tty_struct *tty)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+				
+	if (serial_paranoia_check(info, tty->device, "rs_chars_in_buffer"))
+		return 0;
+	return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
+}
+
+static void rs_flush_buffer(struct tty_struct *tty)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+	
+	if (serial_paranoia_check(info, tty->device, "rs_flush_buffer"))
+		return;
+	save_flags(flags); cli();
+	info->xmit.head = info->xmit.tail = 0;
+	restore_flags(flags);
+	wake_up_interruptible(&tty->write_wait);
+#ifdef SERIAL_HAVE_POLL_WAIT
+	wake_up_interruptible(&tty->poll_wait);
+#endif
+	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+	    tty->ldisc.write_wakeup)
+		(tty->ldisc.write_wakeup)(tty);
+}
+
+/*
+ * This function is used to send a high-priority XON/XOFF character to
+ * the device
+ */
+static void rs_send_xchar(struct tty_struct *tty, char ch)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+
+	if (serial_paranoia_check(info, tty->device, "rs_send_char"))
+		return;
+
+	info->x_char = ch;
+	if (ch) {
+		/* Make sure transmit interrupts are on */
+		info->IER |= UART_IER_THRI;
+		serial_out(info, UART_IER, info->IER);
+	}
+}
+
+/*
+ * ------------------------------------------------------------
+ * rs_throttle()
+ * 
+ * This routine is called by the upper-layer tty layer to signal that
+ * incoming characters should be throttled.
+ * ------------------------------------------------------------
+ */
+static void rs_throttle(struct tty_struct * tty)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+#ifdef SERIAL_DEBUG_THROTTLE
+	char	buf[64];
+	
+	printk("throttle %s: %d....\n", tty_name(tty, buf),
+	       tty->ldisc.chars_in_buffer(tty));
+#endif
+
+	if (serial_paranoia_check(info, tty->device, "rs_throttle"))
+		return;
+	
+	if (I_IXOFF(tty))
+		rs_send_xchar(tty, STOP_CHAR(tty));
+
+	if (tty->termios->c_cflag & CRTSCTS)
+		info->MCR &= ~UART_MCR_RTS;
+
+	save_flags(flags); cli();
+	serial_out(info, UART_MCR, info->MCR);
+	restore_flags(flags);
+}
+
+static void rs_unthrottle(struct tty_struct * tty)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+#ifdef SERIAL_DEBUG_THROTTLE
+	char	buf[64];
+	
+	printk("unthrottle %s: %d....\n", tty_name(tty, buf),
+	       tty->ldisc.chars_in_buffer(tty));
+#endif
+
+	if (serial_paranoia_check(info, tty->device, "rs_unthrottle"))
+		return;
+	
+	if (I_IXOFF(tty)) {
+		if (info->x_char)
+			info->x_char = 0;
+		else
+			rs_send_xchar(tty, START_CHAR(tty));
+	}
+	if (tty->termios->c_cflag & CRTSCTS)
+		info->MCR |= UART_MCR_RTS;
+	save_flags(flags); cli();
+	serial_out(info, UART_MCR, info->MCR);
+	restore_flags(flags);
+}
+
+/*
+ * ------------------------------------------------------------
+ * rs_ioctl() and friends
+ * ------------------------------------------------------------
+ */
+
+static int get_serial_info(struct async_struct * info,
+			   struct serial_struct * retinfo)
+{
+	struct serial_struct tmp;
+	struct serial_state *state = info->state;
+   
+	if (!retinfo)
+		return -EFAULT;
+	memset(&tmp, 0, sizeof(tmp));
+	tmp.type = state->type;
+	tmp.line = state->line;
+	tmp.port = state->port;
+	if (HIGH_BITS_OFFSET)
+		tmp.port_high = state->port >> HIGH_BITS_OFFSET;
+	else
+		tmp.port_high = 0;
+	tmp.irq = state->irq;
+	tmp.flags = state->flags;
+	tmp.xmit_fifo_size = state->xmit_fifo_size;
+	tmp.baud_base = state->baud_base;
+	tmp.close_delay = state->close_delay;
+	tmp.closing_wait = state->closing_wait;
+	tmp.custom_divisor = state->custom_divisor;
+	tmp.hub6 = state->hub6;
+	tmp.io_type = state->io_type;
+	if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
+		return -EFAULT;
+	return 0;
+}
+
+static int set_serial_info(struct async_struct * info,
+			   struct serial_struct * new_info)
+{
+	struct serial_struct new_serial;
+ 	struct serial_state old_state, *state;
+	unsigned int		i,change_irq,change_port;
+	int 			retval = 0;
+	unsigned long		new_port;
+
+	if (copy_from_user(&new_serial,new_info,sizeof(new_serial)))
+		return -EFAULT;
+	state = info->state;
+	old_state = *state;
+
+	new_port = new_serial.port;
+	if (HIGH_BITS_OFFSET)
+		new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET;
+
+	change_irq = new_serial.irq != state->irq;
+	change_port = (new_port != ((int) state->port)) ||
+		(new_serial.hub6 != state->hub6);
+  
+	if (!capable(CAP_SYS_ADMIN)) {
+		if (change_irq || change_port ||
+		    (new_serial.baud_base != state->baud_base) ||
+		    (new_serial.type != state->type) ||
+		    (new_serial.close_delay != state->close_delay) ||
+		    (new_serial.xmit_fifo_size != state->xmit_fifo_size) ||
+		    ((new_serial.flags & ~ASYNC_USR_MASK) !=
+		     (state->flags & ~ASYNC_USR_MASK)))
+			return -EPERM;
+		state->flags = ((state->flags & ~ASYNC_USR_MASK) |
+			       (new_serial.flags & ASYNC_USR_MASK));
+		info->flags = ((info->flags & ~ASYNC_USR_MASK) |
+			       (new_serial.flags & ASYNC_USR_MASK));
+		state->custom_divisor = new_serial.custom_divisor;
+		goto check_and_exit;
+	}
+
+	new_serial.irq = irq_cannonicalize(new_serial.irq);
+
+	if ((new_serial.irq >= NR_IRQS) || (new_serial.irq < 0) || 
+	    (new_serial.baud_base < 9600)|| (new_serial.type < PORT_UNKNOWN) ||
+	    (new_serial.type > PORT_MAX) || (new_serial.type == PORT_CIRRUS) ||
+	    (new_serial.type == PORT_STARTECH)) {
+		return -EINVAL;
+	}
+
+	if ((new_serial.type != state->type) ||
+	    (new_serial.xmit_fifo_size <= 0))
+		new_serial.xmit_fifo_size =
+			uart_config[new_serial.type].dfl_xmit_fifo_size;
+
+	/* Make sure address is not already in use */
+	if (new_serial.type) {
+		for (i = 0 ; i < NR_PORTS; i++)
+			if ((state != &rs_table[i]) &&
+			    (rs_table[i].port == new_port) &&
+			    rs_table[i].type)
+				return -EADDRINUSE;
+	}
+
+	if ((change_port || change_irq) && (state->count > 1))
+		return -EBUSY;
+
+	/*
+	 * OK, past this point, all the error checking has been done.
+	 * At this point, we start making changes.....
+	 */
+
+	state->baud_base = new_serial.baud_base;
+	state->flags = ((state->flags & ~ASYNC_FLAGS) |
+			(new_serial.flags & ASYNC_FLAGS));
+	info->flags = ((state->flags & ~ASYNC_INTERNAL_FLAGS) |
+		       (info->flags & ASYNC_INTERNAL_FLAGS));
+	state->custom_divisor = new_serial.custom_divisor;
+	state->close_delay = new_serial.close_delay * HZ/100;
+	state->closing_wait = new_serial.closing_wait * HZ/100;
+	info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
+	info->xmit_fifo_size = state->xmit_fifo_size =
+		new_serial.xmit_fifo_size;
+
+	if ((state->type != PORT_UNKNOWN) && state->port) {
+		release_region(state->port,8);
+	}
+	state->type = new_serial.type;
+	if (change_port || change_irq) {
+		/*
+		 * We need to shutdown the serial port at the old
+		 * port/irq combination.
+		 */
+		shutdown(info);
+		state->irq = new_serial.irq;
+		info->port = state->port = new_port;
+		info->hub6 = state->hub6 = new_serial.hub6;
+		if (info->hub6)
+			info->io_type = state->io_type = SERIAL_IO_HUB6;
+		else if (info->io_type == SERIAL_IO_HUB6)
+			info->io_type = state->io_type = SERIAL_IO_PORT;
+	}
+	if ((state->type != PORT_UNKNOWN) && state->port) {
+			request_region(state->port,8,"serial(set)");
+	}
+
+	
+check_and_exit:
+	if (!state->port || !state->type)
+		return 0;
+	if (info->flags & ASYNC_INITIALIZED) {
+		if (((old_state.flags & ASYNC_SPD_MASK) !=
+		     (state->flags & ASYNC_SPD_MASK)) ||
+		    (old_state.custom_divisor != state->custom_divisor)) {
+			if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
+				info->tty->alt_speed = 57600;
+			if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
+				info->tty->alt_speed = 115200;
+			if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
+				info->tty->alt_speed = 230400;
+			if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
+				info->tty->alt_speed = 460800;
+			change_speed(info, 0);
+		}
+	} else {
+		retval = startup(info);
+	}
+	return retval;
+}
+
+
+/*
+ * get_lsr_info - get line status register info
+ *
+ * Purpose: Let user call ioctl() to get info when the UART physically
+ * 	    is emptied.  On bus types like RS485, the transmitter must
+ * 	    release the bus after transmitting. This must be done when
+ * 	    the transmit shift register is empty, not be done when the
+ * 	    transmit holding register is empty.  This functionality
+ * 	    allows an RS485 driver to be written in user space. 
+ */
+static int get_lsr_info(struct async_struct * info, unsigned int *value)
+{
+	unsigned char status;
+	unsigned int result;
+	unsigned long flags;
+
+	save_flags(flags); cli();
+	status = serial_in(info, UART_LSR);
+	restore_flags(flags);
+	result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
+
+	/*
+	 * If we're about to load something into the transmit
+	 * register, we'll pretend the transmitter isn't empty to
+	 * avoid a race condition (depending on when the transmit
+	 * interrupt happens).
+	 */
+	if (info->x_char || 
+	    ((CIRC_CNT(info->xmit.head, info->xmit.tail,
+		       SERIAL_XMIT_SIZE) > 0) &&
+	     !info->tty->stopped && !info->tty->hw_stopped))
+		result &= TIOCSER_TEMT;
+
+	if (copy_to_user(value, &result, sizeof(int)))
+		return -EFAULT;
+	return 0;
+}
+
+
+static int get_modem_info(struct async_struct * info, unsigned int *value)
+{
+	unsigned char control, status;
+	unsigned int result;
+	unsigned long flags;
+
+	control = info->MCR;
+	save_flags(flags); cli();
+	status = serial_in(info, UART_MSR);
+	restore_flags(flags);
+	result =  ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
+		| ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
+#ifdef TIOCM_OUT1
+		| ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
+		| ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
+#endif
+		| ((status  & UART_MSR_DCD) ? TIOCM_CAR : 0)
+		| ((status  & UART_MSR_RI) ? TIOCM_RNG : 0)
+		| ((status  & UART_MSR_DSR) ? TIOCM_DSR : 0)
+		| ((status  & UART_MSR_CTS) ? TIOCM_CTS : 0);
+
+	if (copy_to_user(value, &result, sizeof(int)))
+		return -EFAULT;
+	return 0;
+}
+
+static int set_modem_info(struct async_struct * info, unsigned int cmd,
+			  unsigned int *value)
+{
+	unsigned int arg;
+	unsigned long flags;
+
+	if (copy_from_user(&arg, value, sizeof(int)))
+		return -EFAULT;
+
+	switch (cmd) {
+	case TIOCMBIS: 
+		if (arg & TIOCM_RTS)
+			info->MCR |= UART_MCR_RTS;
+		if (arg & TIOCM_DTR)
+			info->MCR |= UART_MCR_DTR;
+#ifdef TIOCM_OUT1
+		if (arg & TIOCM_OUT1)
+			info->MCR |= UART_MCR_OUT1;
+		if (arg & TIOCM_OUT2)
+			info->MCR |= UART_MCR_OUT2;
+#endif
+		if (arg & TIOCM_LOOP)
+			info->MCR |= UART_MCR_LOOP;
+		break;
+	case TIOCMBIC:
+		if (arg & TIOCM_RTS)
+			info->MCR &= ~UART_MCR_RTS;
+		if (arg & TIOCM_DTR)
+			info->MCR &= ~UART_MCR_DTR;
+#ifdef TIOCM_OUT1
+		if (arg & TIOCM_OUT1)
+			info->MCR &= ~UART_MCR_OUT1;
+		if (arg & TIOCM_OUT2)
+			info->MCR &= ~UART_MCR_OUT2;
+#endif
+		if (arg & TIOCM_LOOP)
+			info->MCR &= ~UART_MCR_LOOP;
+		break;
+	case TIOCMSET:
+		info->MCR = ((info->MCR & ~(UART_MCR_RTS |
+#ifdef TIOCM_OUT1
+					    UART_MCR_OUT1 |
+					    UART_MCR_OUT2 |
+#endif
+					    UART_MCR_LOOP |
+					    UART_MCR_DTR))
+			     | ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0)
+#ifdef TIOCM_OUT1
+			     | ((arg & TIOCM_OUT1) ? UART_MCR_OUT1 : 0)
+			     | ((arg & TIOCM_OUT2) ? UART_MCR_OUT2 : 0)
+#endif
+			     | ((arg & TIOCM_LOOP) ? UART_MCR_LOOP : 0)
+			     | ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0));
+		break;
+	default:
+		return -EINVAL;
+	}
+	save_flags(flags); cli();
+	info->MCR |= ALPHA_KLUDGE_MCR; 		/* Don't ask */
+	serial_out(info, UART_MCR, info->MCR);
+	restore_flags(flags);
+	return 0;
+}
+
+static int do_autoconfig(struct async_struct * info)
+{
+	int retval;
+	
+	if (!capable(CAP_SYS_ADMIN))
+		return -EPERM;
+	
+	if (info->state->count > 1)
+		return -EBUSY;
+	
+	shutdown(info);
+
+	autoconfig(info->state);
+	retval = startup(info);
+	if (retval)
+		return retval;
+	return 0;
+}
+
+/*
+ * rs_break() --- routine which turns the break handling on or off
+ */
+static void rs_break(struct tty_struct *tty, int break_state)
+{
+	struct async_struct * info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+	
+	if (serial_paranoia_check(info, tty->device, "rs_break"))
+		return;
+
+	if (!CONFIGURED_SERIAL_PORT(info))
+		return;
+	save_flags(flags); cli();
+	if (break_state == -1)
+		info->LCR |= UART_LCR_SBC;
+	else
+		info->LCR &= ~UART_LCR_SBC;
+	serial_out(info, UART_LCR, info->LCR);
+	restore_flags(flags);
+}
+
+
+static int rs_ioctl(struct tty_struct *tty, struct file * file,
+		    unsigned int cmd, unsigned long arg)
+{
+	struct async_struct * info = (struct async_struct *)tty->driver_data;
+	struct async_icount cprev, cnow;	/* kernel counter temps */
+	struct serial_icounter_struct icount;
+	unsigned long flags;
+	
+	if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
+		return -ENODEV;
+
+	if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
+	    (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) &&
+	    (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
+		if (tty->flags & (1 << TTY_IO_ERROR))
+		    return -EIO;
+	}
+	
+	switch (cmd) {
+		case TIOCMGET:
+			return get_modem_info(info, (unsigned int *) arg);
+		case TIOCMBIS:
+		case TIOCMBIC:
+		case TIOCMSET:
+			return set_modem_info(info, cmd, (unsigned int *) arg);
+		case TIOCGSERIAL:
+			return get_serial_info(info,
+					       (struct serial_struct *) arg);
+		case TIOCSSERIAL:
+			return set_serial_info(info,
+					       (struct serial_struct *) arg);
+		case TIOCSERCONFIG:
+			return do_autoconfig(info);
+
+		case TIOCSERGETLSR: /* Get line status register */
+			return get_lsr_info(info, (unsigned int *) arg);
+
+		case TIOCSERGSTRUCT:
+			if (copy_to_user((struct async_struct *) arg,
+					 info, sizeof(struct async_struct)))
+				return -EFAULT;
+			return 0;
+				
+			
+		/*
+		 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
+		 * - mask passed in arg for lines of interest
+ 		 *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
+		 * Caller should use TIOCGICOUNT to see which one it was
+		 */
+		case TIOCMIWAIT:
+			save_flags(flags); cli();
+			/* note the counters on entry */
+			cprev = info->state->icount;
+			restore_flags(flags);
+			/* Force modem status interrupts on */
+			info->IER |= UART_IER_MSI;
+			serial_out(info, UART_IER, info->IER);
+			while (1) {
+				interruptible_sleep_on(&info->delta_msr_wait);
+				/* see if a signal did it */
+				if (signal_pending(current))
+					return -ERESTARTSYS;
+				save_flags(flags); cli();
+				cnow = info->state->icount; /* atomic copy */
+				restore_flags(flags);
+				if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 
+				    cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
+					return -EIO; /* no change => error */
+				if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
+				     ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
+				     ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
+				     ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
+					return 0;
+				}
+				cprev = cnow;
+			}
+			/* NOTREACHED */
+
+		/* 
+		 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
+		 * Return: write counters to the user passed counter struct
+		 * NB: both 1->0 and 0->1 transitions are counted except for
+		 *     RI where only 0->1 is counted.
+		 */
+		case TIOCGICOUNT:
+			save_flags(flags); cli();
+			cnow = info->state->icount;
+			restore_flags(flags);
+			icount.cts = cnow.cts;
+			icount.dsr = cnow.dsr;
+			icount.rng = cnow.rng;
+			icount.dcd = cnow.dcd;
+			icount.rx = cnow.rx;
+			icount.tx = cnow.tx;
+			icount.frame = cnow.frame;
+			icount.overrun = cnow.overrun;
+			icount.parity = cnow.parity;
+			icount.brk = cnow.brk;
+			icount.buf_overrun = cnow.buf_overrun;
+			
+			if (copy_to_user((void *)arg, &icount, sizeof(icount)))
+				return -EFAULT;
+			return 0;
+		case TIOCSERGWILD:
+		case TIOCSERSWILD:
+			/* "setserial -W" is called in Debian boot */
+			printk ("TIOCSER?WILD ioctl obsolete, ignored.\n");
+			return 0;
+
+		default:
+			return -ENOIOCTLCMD;
+		}
+	return 0;
+}
+
+static void rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
+{
+	struct async_struct *info = (struct async_struct *)tty->driver_data;
+	unsigned long flags;
+	unsigned int cflag = tty->termios->c_cflag;
+	
+	if (   (cflag == old_termios->c_cflag)
+	    && (   RELEVANT_IFLAG(tty->termios->c_iflag) 
+		== RELEVANT_IFLAG(old_termios->c_iflag)))
+	  return;
+
+	change_speed(info, old_termios);
+
+	/* Handle transition to B0 status */
+	if ((old_termios->c_cflag & CBAUD) &&
+	    !(cflag & CBAUD)) {
+		info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
+		save_flags(flags); cli();
+		serial_out(info, UART_MCR, info->MCR);
+		restore_flags(flags);
+	}
+	
+	/* Handle transition away from B0 status */
+	if (!(old_termios->c_cflag & CBAUD) &&
+	    (cflag & CBAUD)) {
+		info->MCR |= UART_MCR_DTR;
+		if (!(tty->termios->c_cflag & CRTSCTS) || 
+		    !test_bit(TTY_THROTTLED, &tty->flags)) {
+			info->MCR |= UART_MCR_RTS;
+		}
+		save_flags(flags); cli();
+		serial_out(info, UART_MCR, info->MCR);
+		restore_flags(flags);
+	}
+	
+	/* Handle turning off CRTSCTS */
+	if ((old_termios->c_cflag & CRTSCTS) &&
+	    !(tty->termios->c_cflag & CRTSCTS)) {
+		tty->hw_stopped = 0;
+		rs_start(tty);
+	}
+}
+
+/*
+ * ------------------------------------------------------------
+ * rs_close()
+ * 
+ * This routine is called when the serial port gets closed.  First, we
+ * wait for the last remaining data to be sent.  Then, we unlink its
+ * async structure from the interrupt chain if necessary, and we free
+ * that IRQ if nothing is left in the chain.
+ * ------------------------------------------------------------
+ */
+static void rs_close(struct tty_struct *tty, struct file * filp)
+{
+	struct async_struct * info = (struct async_struct *)tty->driver_data;
+	struct serial_state *state;
+	unsigned long flags;
+
+	if (!info || serial_paranoia_check(info, tty->device, "rs_close"))
+		return;
+
+	state = info->state;
+	
+	save_flags(flags); cli();
+	
+	if (tty_hung_up_p(filp)) {
+		DBG_CNT("before DEC-hung");
+		MOD_DEC_USE_COUNT;
+		restore_flags(flags);
+		return;
+	}
+	
+#ifdef SERIAL_DEBUG_OPEN
+	printk("rs_close ttys%d, count = %d\n", info->line, state->count);
+#endif
+	if ((tty->count == 1) && (state->count != 1)) {
+		/*
+		 * Uh, oh.  tty->count is 1, which means that the tty
+		 * structure will be freed.  state->count should always
+		 * be one in these conditions.  If it's greater than
+		 * one, we've got real problems, since it means the
+		 * serial port won't be shutdown.
+		 */
+		printk("rs_close: bad serial port count; tty->count is 1, "
+		       "state->count is %d\n", state->count);
+		state->count = 1;
+	}
+	if (--state->count < 0) {
+		printk("rs_close: bad serial port count for ttys%d: %d\n",
+		       info->line, state->count);
+		state->count = 0;
+	}
+	if (state->count) {
+		DBG_CNT("before DEC-2");
+		MOD_DEC_USE_COUNT;
+		restore_flags(flags);
+		return;
+	}
+	info->flags |= ASYNC_CLOSING;
+	restore_flags(flags);
+	/*
+	 * Save the termios structure, since this port may have
+	 * separate termios for callout and dialin.
+	 */
+	if (info->flags & ASYNC_NORMAL_ACTIVE)
+		info->state->normal_termios = *tty->termios;
+	if (info->flags & ASYNC_CALLOUT_ACTIVE)
+		info->state->callout_termios = *tty->termios;
+	/*
+	 * Now we wait for the transmit buffer to clear; and we notify 
+	 * the line discipline to only process XON/XOFF characters.
+	 */
+	tty->closing = 1;
+	if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
+		tty_wait_until_sent(tty, info->closing_wait);
+	/*
+	 * At this point we stop accepting input.  To do this, we
+	 * disable the receive line status interrupts, and tell the
+	 * interrupt driver to stop checking the data ready bit in the
+	 * line status register.
+	 */
+	info->IER &= ~UART_IER_RLSI;
+	info->read_status_mask &= ~UART_LSR_DR;
+	if (info->flags & ASYNC_INITIALIZED) {
+		serial_out(info, UART_IER, info->IER);
+		/*
+		 * Before we drop DTR, make sure the UART transmitter
+		 * has completely drained; this is especially
+		 * important if there is a transmit FIFO!
+		 */
+		rs_wait_until_sent(tty, info->timeout);
+	}
+	shutdown(info);
+	if (tty->driver.flush_buffer)
+		tty->driver.flush_buffer(tty);
+	if (tty->ldisc.flush_buffer)
+		tty->ldisc.flush_buffer(tty);
+	tty->closing = 0;
+	info->event = 0;
+	info->tty = 0;
+	if (info->blocked_open) {
+		if (info->close_delay) {
+			set_current_state(TASK_INTERRUPTIBLE);
+			schedule_timeout(info->close_delay);
+		}
+		wake_up_interruptible(&info->open_wait);
+	}
+	info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE|
+			 ASYNC_CLOSING);
+	wake_up_interruptible(&info->close_wait);
+	MOD_DEC_USE_COUNT;
+}
+
+/*
+ * rs_wait_until_sent() --- wait until the transmitter is empty
+ */
+static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
+{
+	struct async_struct * info = (struct async_struct *)tty->driver_data;
+	unsigned long orig_jiffies, char_time;
+	int lsr;
+	
+	if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent"))
+		return;
+
+	if (info->state->type == PORT_UNKNOWN)
+		return;
+
+	if (info->xmit_fifo_size == 0)
+		return; /* Just in case.... */
+
+	orig_jiffies = jiffies;
+	/*
+	 * Set the check interval to be 1/5 of the estimated time to
+	 * send a single character, and make it at least 1.  The check
+	 * interval should also be less than the timeout.
+	 * 
+	 * Note: we have to use pretty tight timings here to satisfy
+	 * the NIST-PCTS.
+	 */
+	char_time = (info->timeout - HZ/50) / info->xmit_fifo_size;
+	char_time = char_time / 5;
+	if (char_time == 0)
+		char_time = 1;
+	if (timeout && timeout < char_time)
+		char_time = timeout;
+	/*
+	 * If the transmitter hasn't cleared in twice the approximate
+	 * amount of time to send the entire FIFO, it probably won't
+	 * ever clear.  This assumes the UART isn't doing flow
+	 * control, which is currently the case.  Hence, if it ever
+	 * takes longer than info->timeout, this is probably due to a
+	 * UART bug of some kind.  So, we clamp the timeout parameter at
+	 * 2*info->timeout.
+	 */
+	if (!timeout || timeout > 2*info->timeout)
+		timeout = 2*info->timeout;
+#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
+	printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
+	printk("jiff=%lu...", jiffies);
+#endif
+	while (!((lsr = serial_inp(info, UART_LSR)) & UART_LSR_TEMT)) {
+#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
+		printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
+#endif
+		set_current_state(TASK_INTERRUPTIBLE);
+		schedule_timeout(char_time);
+		if (signal_pending(current))
+			break;
+		if (timeout && time_after(jiffies, orig_jiffies + timeout))
+			break;
+	}
+	set_current_state(TASK_RUNNING);
+#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
+	printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
+#endif
+}
+
+/*
+ * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
+ */
+static void rs_hangup(struct tty_struct *tty)
+{
+	struct async_struct * info = (struct async_struct *)tty->driver_data;
+	struct serial_state *state = info->state;
+	
+	if (serial_paranoia_check(info, tty->device, "rs_hangup"))
+		return;
+
+	state = info->state;
+	
+	rs_flush_buffer(tty);
+	if (info->flags & ASYNC_CLOSING)
+		return;
+	shutdown(info);
+	info->event = 0;
+	state->count = 0;
+	info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE);
+	info->tty = 0;
+	wake_up_interruptible(&info->open_wait);
+}
+
+/*
+ * ------------------------------------------------------------
+ * rs_open() and friends
+ * ------------------------------------------------------------
+ */
+static int block_til_ready(struct tty_struct *tty, struct file * filp,
+			   struct async_struct *info)
+{
+	DECLARE_WAITQUEUE(wait, current);
+	struct serial_state *state = info->state;
+	int		retval;
+	int		do_clocal = 0, extra_count = 0;
+	unsigned long	flags;
+
+	/*
+	 * If the device is in the middle of being closed, then block
+	 * until it's done, and then try again.
+	 */
+	if (tty_hung_up_p(filp) ||
+	    (info->flags & ASYNC_CLOSING)) {
+		if (info->flags & ASYNC_CLOSING)
+			interruptible_sleep_on(&info->close_wait);
+#ifdef SERIAL_DO_RESTART
+		return ((info->flags & ASYNC_HUP_NOTIFY) ?
+			-EAGAIN : -ERESTARTSYS);
+#else
+		return -EAGAIN;
+#endif
+	}
+
+	/*
+	 * If this is a callout device, then just make sure the normal
+	 * device isn't being used.
+	 */
+	if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) {
+		if (info->flags & ASYNC_NORMAL_ACTIVE)
+			return -EBUSY;
+		if ((info->flags & ASYNC_CALLOUT_ACTIVE) &&
+		    (info->flags & ASYNC_SESSION_LOCKOUT) &&
+		    (info->session != current->session))
+		    return -EBUSY;
+		if ((info->flags & ASYNC_CALLOUT_ACTIVE) &&
+		    (info->flags & ASYNC_PGRP_LOCKOUT) &&
+		    (info->pgrp != current->pgrp))
+		    return -EBUSY;
+		info->flags |= ASYNC_CALLOUT_ACTIVE;
+		return 0;
+	}
+	
+	/*
+	 * If non-blocking mode is set, or the port is not enabled,
+	 * then make the check up front and then exit.
+	 */
+	if ((filp->f_flags & O_NONBLOCK) ||
+	    (tty->flags & (1 << TTY_IO_ERROR))) {
+		if (info->flags & ASYNC_CALLOUT_ACTIVE)
+			return -EBUSY;
+		info->flags |= ASYNC_NORMAL_ACTIVE;
+		return 0;
+	}
+
+	if (info->flags & ASYNC_CALLOUT_ACTIVE) {
+		if (state->normal_termios.c_cflag & CLOCAL)
+			do_clocal = 1;
+	} else {
+		if (tty->termios->c_cflag & CLOCAL)
+			do_clocal = 1;
+	}
+	
+	/*
+	 * Block waiting for the carrier detect and the line to become
+	 * free (i.e., not in use by the callout).  While we are in
+	 * this loop, state->count is dropped by one, so that
+	 * rs_close() knows when to free things.  We restore it upon
+	 * exit, either normal or abnormal.
+	 */
+	retval = 0;
+	add_wait_queue(&info->open_wait, &wait);
+#ifdef SERIAL_DEBUG_OPEN
+	printk("block_til_ready before block: ttys%d, count = %d\n",
+	       state->line, state->count);
+#endif
+	save_flags(flags); cli();
+	if (!tty_hung_up_p(filp)) {
+		extra_count = 1;
+		state->count--;
+	}
+	restore_flags(flags);
+	info->blocked_open++;
+	while (1) {
+		save_flags(flags); cli();
+		if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
+		    (tty->termios->c_cflag & CBAUD))
+			serial_out(info, UART_MCR,
+				   serial_inp(info, UART_MCR) |
+				   (UART_MCR_DTR | UART_MCR_RTS));
+		restore_flags(flags);
+		set_current_state(TASK_INTERRUPTIBLE);
+		if (tty_hung_up_p(filp) ||
+		    !(info->flags & ASYNC_INITIALIZED)) {
+#ifdef SERIAL_DO_RESTART
+			if (info->flags & ASYNC_HUP_NOTIFY)
+				retval = -EAGAIN;
+			else
+				retval = -ERESTARTSYS;	
+#else
+			retval = -EAGAIN;
+#endif
+			break;
+		}
+		if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
+		    !(info->flags & ASYNC_CLOSING) &&
+		    (do_clocal || (serial_in(info, UART_MSR) &
+				   UART_MSR_DCD)))
+			break;
+		if (signal_pending(current)) {
+			retval = -ERESTARTSYS;
+			break;
+		}
+#ifdef SERIAL_DEBUG_OPEN
+		printk("block_til_ready blocking: ttys%d, count = %d\n",
+		       info->line, state->count);
+#endif
+		schedule();
+	}
+	set_current_state(TASK_RUNNING);
+	remove_wait_queue(&info->open_wait, &wait);
+	if (extra_count)
+		state->count++;
+	info->blocked_open--;
+#ifdef SERIAL_DEBUG_OPEN
+	printk("block_til_ready after blocking: ttys%d, count = %d\n",
+	       info->line, state->count);
+#endif
+	if (retval)
+		return retval;
+	info->flags |= ASYNC_NORMAL_ACTIVE;
+	return 0;
+}
+
+static int get_async_struct(int line, struct async_struct **ret_info)
+{
+	struct async_struct *info;
+	struct serial_state *sstate;
+
+	sstate = rs_table + line;
+	sstate->count++;
+	if (sstate->info) {
+		*ret_info = sstate->info;
+		return 0;
+	}
+	info = kmalloc(sizeof(struct async_struct), GFP_KERNEL);
+	if (!info) {
+		sstate->count--;
+		return -ENOMEM;
+	}
+	memset(info, 0, sizeof(struct async_struct));
+	init_waitqueue_head(&info->open_wait);
+	init_waitqueue_head(&info->close_wait);
+	init_waitqueue_head(&info->delta_msr_wait);
+	info->magic = SERIAL_MAGIC;
+	info->port = sstate->port;
+	info->flags = sstate->flags;
+	info->io_type = sstate->io_type;
+	info->iomem_base = sstate->iomem_base;
+	info->iomem_reg_shift = sstate->iomem_reg_shift;
+	info->xmit_fifo_size = sstate->xmit_fifo_size;
+	info->line = line;
+	info->tqueue.routine = do_softint;
+	info->tqueue.data = info;
+	info->state = sstate;
+	if (sstate->info) {
+		kfree(info);
+		*ret_info = sstate->info;
+		return 0;
+	}
+	*ret_info = sstate->info = info;
+	return 0;
+}
+
+/*
+ * This routine is called whenever a serial port is opened.  It
+ * enables interrupts for a serial port, linking in its async structure into
+ * the IRQ chain.   It also performs the serial-specific
+ * initialization for the tty structure.
+ */
+static int rs_open(struct tty_struct *tty, struct file * filp)
+{
+	struct async_struct	*info;
+	int 			retval, line;
+	unsigned long		page;
+
+	MOD_INC_USE_COUNT;
+	line = MINOR(tty->device) - tty->driver.minor_start;
+	if ((line < 0) || (line >= NR_PORTS)) {
+		MOD_DEC_USE_COUNT;
+		return -ENODEV;
+	}
+	retval = get_async_struct(line, &info);
+	if (retval) {
+		MOD_DEC_USE_COUNT;
+		return retval;
+	}
+	tty->driver_data = info;
+	info->tty = tty;
+	if (serial_paranoia_check(info, tty->device, "rs_open")) {
+		MOD_DEC_USE_COUNT;		
+		return -ENODEV;
+	}
+
+#ifdef SERIAL_DEBUG_OPEN
+	printk("rs_open %s%d, count = %d\n", tty->driver.name, info->line,
+	       info->state->count);
+#endif
+	info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
+
+	if (!tmp_buf) {
+		page = get_zeroed_page(GFP_KERNEL);
+		if (!page) {
+			MOD_DEC_USE_COUNT;
+			return -ENOMEM;
+		}
+		if (tmp_buf)
+			free_page(page);
+		else
+			tmp_buf = (unsigned char *) page;
+	}
+
+	/*
+	 * If the port is the middle of closing, bail out now
+	 */
+	if (tty_hung_up_p(filp) ||
+	    (info->flags & ASYNC_CLOSING)) {
+		if (info->flags & ASYNC_CLOSING)
+			interruptible_sleep_on(&info->close_wait);
+		MOD_DEC_USE_COUNT;
+#ifdef SERIAL_DO_RESTART
+		return ((info->flags & ASYNC_HUP_NOTIFY) ?
+			-EAGAIN : -ERESTARTSYS);
+#else
+		return -EAGAIN;
+#endif
+	}
+
+	/*
+	 * Start up serial port
+	 */
+	retval = startup(info);
+	if (retval) {
+		MOD_DEC_USE_COUNT;
+		return retval;
+	}
+
+	retval = block_til_ready(tty, filp, info);
+	if (retval) {
+#ifdef SERIAL_DEBUG_OPEN
+		printk("rs_open returning after block_til_ready with %d\n",
+		       retval);
+#endif
+		MOD_DEC_USE_COUNT;
+		return retval;
+	}
+
+	if ((info->state->count == 1) &&
+	    (info->flags & ASYNC_SPLIT_TERMIOS)) {
+		if (tty->driver.subtype == SERIAL_TYPE_NORMAL)
+			*tty->termios = info->state->normal_termios;
+		else 
+			*tty->termios = info->state->callout_termios;
+		change_speed(info, 0);
+	}
+#ifdef CONFIG_AU1000_SERIAL_CONSOLE
+	if (sercons.cflag && sercons.index == line) {
+		tty->termios->c_cflag = sercons.cflag;
+		sercons.cflag = 0;
+		change_speed(info, 0);
+	}
+#endif
+	info->session = current->session;
+	info->pgrp = current->pgrp;
+
+#ifdef SERIAL_DEBUG_OPEN
+	printk("rs_open ttys%d successful...", info->line);
+#endif
+	return 0;
+}
+
+/*
+ * /proc fs routines....
+ */
+
+static inline int line_info(char *buf, struct serial_state *state)
+{
+	struct async_struct *info = state->info, scr_info;
+	char	stat_buf[30], control, status;
+	int	ret;
+	unsigned long flags;
+
+	ret = sprintf(buf, "%d: uart:%s port:%lX irq:%d",
+		      state->line, uart_config[state->type].name, 
+		      state->port, state->irq);
+
+	if (!state->port || (state->type == PORT_UNKNOWN)) {
+		ret += sprintf(buf+ret, "\n");
+		return ret;
+	}
+
+	/*
+	 * Figure out the current RS-232 lines
+	 */
+	if (!info) {
+		info = &scr_info;	/* This is just for serial_{in,out} */
+
+		info->magic = SERIAL_MAGIC;
+		info->port = state->port;
+		info->flags = state->flags;
+		info->quot = 0;
+		info->tty = 0;
+	}
+	save_flags(flags); cli();
+	status = serial_in(info, UART_MSR);
+	control = info != &scr_info ? info->MCR : serial_in(info, UART_MCR);
+	restore_flags(flags); 
+
+	stat_buf[0] = 0;
+	stat_buf[1] = 0;
+	if (control & UART_MCR_RTS)
+		strcat(stat_buf, "|RTS");
+	if (status & UART_MSR_CTS)
+		strcat(stat_buf, "|CTS");
+	if (control & UART_MCR_DTR)
+		strcat(stat_buf, "|DTR");
+	if (status & UART_MSR_DSR)
+		strcat(stat_buf, "|DSR");
+	if (status & UART_MSR_DCD)
+		strcat(stat_buf, "|CD");
+	if (status & UART_MSR_RI)
+		strcat(stat_buf, "|RI");
+
+	if (info->quot) {
+		ret += sprintf(buf+ret, " baud:%d",
+			       state->baud_base / info->quot);
+	}
+
+	ret += sprintf(buf+ret, " tx:%d rx:%d",
+		      state->icount.tx, state->icount.rx);
+
+	if (state->icount.frame)
+		ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
+	
+	if (state->icount.parity)
+		ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
+	
+	if (state->icount.brk)
+		ret += sprintf(buf+ret, " brk:%d", state->icount.brk);	
+
+	if (state->icount.overrun)
+		ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
+
+	/*
+	 * Last thing is the RS-232 status lines
+	 */
+	ret += sprintf(buf+ret, " %s\n", stat_buf+1);
+	return ret;
+}
+
+int rs_read_proc(char *page, char **start, off_t off, int count,
+		 int *eof, void *data)
+{
+	int i, len = 0, l;
+	off_t	begin = 0;
+
+	len += sprintf(page, "serinfo:1.0 driver:%s%s revision:%s\n",
+		       serial_version, LOCAL_VERSTRING, serial_revdate);
+	for (i = 0; i < NR_PORTS && len < 4000; i++) {
+		l = line_info(page + len, &rs_table[i]);
+		len += l;
+		if (len+begin > off+count)
+			goto done;
+		if (len+begin < off) {
+			begin += len;
+			len = 0;
+		}
+	}
+	*eof = 1;
+done:
+	if (off >= len+begin)
+		return 0;
+	*start = page + (off-begin);
+	return ((count < begin+len-off) ? count : begin+len-off);
+}
+
+/*
+ * ---------------------------------------------------------------------
+ * rs_init() and friends
+ *
+ * rs_init() is called at boot-time to initialize the serial driver.
+ * ---------------------------------------------------------------------
+ */
+
+/*
+ * This routine prints out the appropriate serial driver version
+ * number, and identifies which options were configured into this
+ * driver.
+ */
+static char serial_options[] __initdata =
+       " no serial options enabled\n";
+#undef SERIAL_OPT
+
+static _INLINE_ void show_serial_version(void)
+{
+ 	printk(KERN_INFO "%s version %s%s (%s) with%s", serial_name,
+	       serial_version, LOCAL_VERSTRING, serial_revdate,
+	       serial_options);
+}
+
+
+/*
+ * This routine is called by rs_init() to initialize a specific serial
+ * port.  It determines what type of UART chip this serial port is
+ * using: 8250, 16450, 16550, 16550A.  The important question is
+ * whether or not this UART is a 16550A or not, since this will
+ * determine whether or not we can use its FIFO features or not.
+ */
+static void autoconfig(struct serial_state * state)
+{
+	struct async_struct *info, scr_info;
+	unsigned long flags;
+
+
+#ifdef SERIAL_DEBUG_AUTOCONF
+	printk("Testing ttyS%d (0x%04lx, 0x%04x)...\n", state->line,
+	       state->port, (unsigned) state->iomem_base);
+#endif
+	
+	if (!CONFIGURED_SERIAL_PORT(state))
+		return;
+
+	if (inl(UART_MOD_CNTRL + state->port) != 0x3) {
+		outl(3, UART_MOD_CNTRL + state->port);
+	}
+		
+	state->type = PORT_16550;
+	info = &scr_info;	/* This is just for serial_{in,out} */
+
+	info->magic = SERIAL_MAGIC;
+	info->state = state;
+	info->port = state->port;
+	info->flags = state->flags;
+	info->io_type = state->io_type;
+	info->iomem_base = state->iomem_base;
+	info->iomem_reg_shift = state->iomem_reg_shift;
+
+
+	save_flags(flags); cli();
+	state->xmit_fifo_size =	uart_config[state->type].dfl_xmit_fifo_size;
+
+	if (info->port) {
+			request_region(info->port,8,"serial(auto)");
+	}
+
+	/*
+	 * Reset the UART.
+	 */
+	serial_outp(info, UART_FCR, (UART_FCR_ENABLE_FIFO |
+				     UART_FCR_CLEAR_RCVR |
+				     UART_FCR_CLEAR_XMIT));
+	serial_outp(info, UART_FCR, 0);
+	(void)serial_in(info, UART_RX);
+	serial_outp(info, UART_IER, 0);
+	
+	restore_flags(flags);
+}
+
+int register_serial(struct serial_struct *req);
+void unregister_serial(int line);
+
+EXPORT_SYMBOL(register_serial);
+EXPORT_SYMBOL(unregister_serial);
+
+
+/*
+ * The serial driver boot-time initialization code!
+ */
+static int __init rs_init(void)
+{
+	int i;
+	struct serial_state * state;
+
+	init_bh(SERIAL_BH, do_serial_bh);
+	init_timer(&serial_timer);
+	serial_timer.function = rs_timer;
+	mod_timer(&serial_timer, jiffies + RS_STROBE_TIME);
+
+	for (i = 0; i < NR_IRQS; i++) {
+		IRQ_ports[i] = 0;
+		IRQ_timeout[i] = 0;
+	}
+#ifdef CONFIG_AU1000_SERIAL_CONSOLE
+	/*
+	 *	The interrupt of the serial console port
+	 *	can't be shared.
+	 */
+	if (sercons.flags & CON_CONSDEV) {
+		for(i = 0; i < NR_PORTS; i++)
+			if (i != sercons.index &&
+			    rs_table[i].irq == rs_table[sercons.index].irq)
+				rs_table[i].irq = 0;
+	}
+#endif
+	show_serial_version();
+
+	/* Initialize the tty_driver structure */
+	
+	memset(&serial_driver, 0, sizeof(struct tty_driver));
+	serial_driver.magic = TTY_DRIVER_MAGIC;
+	serial_driver.driver_name = "serial";
+#if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
+	serial_driver.name = "tts/%d";
+#else
+	serial_driver.name = "ttyS";
+#endif
+	serial_driver.major = TTY_MAJOR;
+	serial_driver.minor_start = 64 + SERIAL_DEV_OFFSET;
+	serial_driver.num = NR_PORTS;
+	serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
+	serial_driver.subtype = SERIAL_TYPE_NORMAL;
+	serial_driver.init_termios = tty_std_termios;
+	serial_driver.init_termios.c_cflag =
+		B9600 | CS8 | CREAD | HUPCL | CLOCAL;
+	serial_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
+	serial_driver.refcount = &serial_refcount;
+	serial_driver.table = serial_table;
+	serial_driver.termios = serial_termios;
+	serial_driver.termios_locked = serial_termios_locked;
+
+	serial_driver.open = rs_open;
+	serial_driver.close = rs_close;
+	serial_driver.write = rs_write;
+	serial_driver.put_char = rs_put_char;
+	serial_driver.flush_chars = rs_flush_chars;
+	serial_driver.write_room = rs_write_room;
+	serial_driver.chars_in_buffer = rs_chars_in_buffer;
+	serial_driver.flush_buffer = rs_flush_buffer;
+	serial_driver.ioctl = rs_ioctl;
+	serial_driver.throttle = rs_throttle;
+	serial_driver.unthrottle = rs_unthrottle;
+	serial_driver.set_termios = rs_set_termios;
+	serial_driver.stop = rs_stop;
+	serial_driver.start = rs_start;
+	serial_driver.hangup = rs_hangup;
+	serial_driver.break_ctl = rs_break;
+	serial_driver.send_xchar = rs_send_xchar;
+	serial_driver.wait_until_sent = rs_wait_until_sent;
+	serial_driver.read_proc = rs_read_proc;
+	
+	/*
+	 * The callout device is just like normal device except for
+	 * major number and the subtype code.
+	 */
+	callout_driver = serial_driver;
+#if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
+	callout_driver.name = "cua/%d";
+#else
+	callout_driver.name = "cua";
+#endif
+	callout_driver.major = TTYAUX_MAJOR;
+	callout_driver.subtype = SERIAL_TYPE_CALLOUT;
+	callout_driver.read_proc = 0;
+	callout_driver.proc_entry = 0;
+
+	if (tty_register_driver(&serial_driver))
+		panic("Couldn't register serial driver\n");
+	if (tty_register_driver(&callout_driver))
+		panic("Couldn't register callout driver\n");
+	
+	for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
+		state->baud_base = get_au1000_uart_baud();
+		state->magic = SSTATE_MAGIC;
+		state->line = i;
+		state->type = PORT_UNKNOWN;
+		state->custom_divisor = 0;
+		state->close_delay = 5*HZ/10;
+		state->closing_wait = 30*HZ;
+		state->callout_termios = callout_driver.init_termios;
+		state->normal_termios = serial_driver.init_termios;
+		state->icount.cts = state->icount.dsr = 
+			state->icount.rng = state->icount.dcd = 0;
+		state->icount.rx = state->icount.tx = 0;
+		state->icount.frame = state->icount.parity = 0;
+		state->icount.overrun = state->icount.brk = 0;
+		state->irq = irq_cannonicalize(state->irq);
+		if (state->hub6)
+			state->io_type = SERIAL_IO_HUB6;
+		if (state->port && check_region(state->port,8)) {
+			continue;
+		}
+
+		if (state->flags & ASYNC_BOOT_AUTOCONF) {
+			autoconfig(state);
+		}
+	}
+	for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
+		if (state->type == PORT_UNKNOWN) {
+			continue;
+		}
+		printk(KERN_INFO "ttyS%02d%s at 0x%04lx (irq = %d) is a %s\n",
+		       state->line + SERIAL_DEV_OFFSET,
+		       (state->flags & ASYNC_FOURPORT) ? " FourPort" : "",
+		       state->port, state->irq,
+		       uart_config[state->type].name);
+		tty_register_devfs(&serial_driver, 0,
+				   serial_driver.minor_start + state->line);
+		tty_register_devfs(&callout_driver, 0,
+				   callout_driver.minor_start + state->line);
+	}
+	return 0;
+}
+
+/*
+ * register_serial and unregister_serial allows for 16x50 serial ports to be
+ * configured at run-time, to support PCMCIA modems.
+ */
+ 
+/**
+ *	register_serial - configure a 16x50 serial port at runtime
+ *	@req: request structure
+ *
+ *	Configure the serial port specified by the request. If the
+ *	port exists and is in use an error is returned. If the port
+ *	is not currently in the table it is added.
+ *
+ *	The port is then probed and if neccessary the IRQ is autodetected
+ *	If this fails an error is returned.
+ *
+ *	On success the port is ready to use and the line number is returned.
+ */
+ 
+int register_serial(struct serial_struct *req)
+{
+	int i;
+	unsigned long flags;
+	struct serial_state *state;
+	struct async_struct *info;
+	unsigned long port;
+
+	port = req->port;
+	if (HIGH_BITS_OFFSET)
+		port += (unsigned long) req->port_high << HIGH_BITS_OFFSET;
+
+	save_flags(flags); cli();
+	for (i = 0; i < NR_PORTS; i++) {
+		if ((rs_table[i].port == port) &&
+		    (rs_table[i].iomem_base == req->iomem_base))
+			break;
+	}
+	if (i == NR_PORTS) {
+		for (i = 0; i < NR_PORTS; i++)
+			if ((rs_table[i].type == PORT_UNKNOWN) &&
+			    (rs_table[i].count == 0))
+				break;
+	}
+	if (i == NR_PORTS) {
+		restore_flags(flags);
+		return -1;
+	}
+	state = &rs_table[i];
+	if (rs_table[i].count) {
+		restore_flags(flags);
+		printk("Couldn't configure serial #%d (port=%ld,irq=%d): "
+		       "device already open\n", i, port, req->irq);
+		return -1;
+	}
+	state->irq = req->irq;
+	state->port = port;
+	state->flags = req->flags;
+	state->io_type = req->io_type;
+	state->iomem_base = req->iomem_base;
+	state->iomem_reg_shift = req->iomem_reg_shift;
+	if (req->baud_base)
+		state->baud_base = req->baud_base;
+	if ((info = state->info) != NULL) {
+		info->port = port;
+		info->flags = req->flags;
+		info->io_type = req->io_type;
+		info->iomem_base = req->iomem_base;
+		info->iomem_reg_shift = req->iomem_reg_shift;
+	}
+	autoconfig(state);
+	if (state->type == PORT_UNKNOWN) {
+		restore_flags(flags);
+		printk("register_serial(): autoconfig failed\n");
+		return -1;
+	}
+	restore_flags(flags);
+
+       printk(KERN_INFO "ttyS%02d at %s 0x%04lx (irq = %d) is a %s\n",
+	      state->line + SERIAL_DEV_OFFSET,
+	      state->iomem_base ? "iomem" : "port",
+	      state->iomem_base ? (unsigned long)state->iomem_base :
+	      state->port, state->irq, uart_config[state->type].name);
+	tty_register_devfs(&serial_driver, 0,
+			   serial_driver.minor_start + state->line); 
+	tty_register_devfs(&callout_driver, 0,
+			   callout_driver.minor_start + state->line);
+	return state->line + SERIAL_DEV_OFFSET;
+}
+
+/**
+ *	unregister_serial - deconfigure a 16x50 serial port
+ *	@line: line to deconfigure
+ *
+ *	The port specified is deconfigured and its resources are freed. Any
+ *	user of the port is disconnected as if carrier was dropped. Line is
+ *	the port number returned by register_serial().
+ */
+
+void unregister_serial(int line)
+{
+	unsigned long flags;
+	struct serial_state *state = &rs_table[line];
+
+	save_flags(flags); cli();
+	if (state->info && state->info->tty)
+		tty_hangup(state->info->tty);
+	state->type = PORT_UNKNOWN;
+	printk(KERN_INFO "tty%02d unloaded\n", state->line);
+	/* These will be hidden, because they are devices that will no longer
+	 * be available to the system. (ie, PCMCIA modems, once ejected)
+	 */
+	tty_unregister_devfs(&serial_driver,
+			     serial_driver.minor_start + state->line);
+	tty_unregister_devfs(&callout_driver,
+			     callout_driver.minor_start + state->line);
+	restore_flags(flags);
+}
+
+static void __exit rs_fini(void) 
+{
+	unsigned long flags;
+	int e1, e2;
+	int i;
+	struct async_struct *info;
+
+	/* printk("Unloading %s: version %s\n", serial_name, serial_version); */
+	del_timer_sync(&serial_timer);
+	save_flags(flags); cli();
+        remove_bh(SERIAL_BH);
+	if ((e1 = tty_unregister_driver(&serial_driver)))
+		printk("serial: failed to unregister serial driver (%d)\n",
+		       e1);
+	if ((e2 = tty_unregister_driver(&callout_driver)))
+		printk("serial: failed to unregister callout driver (%d)\n", 
+		       e2);
+	restore_flags(flags);
+
+	for (i = 0; i < NR_PORTS; i++) {
+		if ((info = rs_table[i].info)) {
+			rs_table[i].info = NULL;
+			kfree(info);
+		}
+		if ((rs_table[i].type != PORT_UNKNOWN) && rs_table[i].port) {
+				release_region(rs_table[i].port, 8);
+		}
+	}
+	if (tmp_buf) {
+		unsigned long pg = (unsigned long) tmp_buf;
+		tmp_buf = NULL;
+		free_page(pg);
+	}
+}
+
+module_init(rs_init);
+module_exit(rs_fini);
+MODULE_DESCRIPTION("Au1000 serial driver");
+
+
+/*
+ * ------------------------------------------------------------
+ * Serial console driver
+ * ------------------------------------------------------------
+ */
+#ifdef CONFIG_AU1000_SERIAL_CONSOLE
+
+#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
+
+static struct async_struct async_sercons;
+
+/*
+ *	Wait for transmitter & holding register to empty
+ */
+static inline void wait_for_xmitr(struct async_struct *info)
+{
+	unsigned int status, tmout = 0xffffff;
+
+	do {
+		status = serial_in(info, UART_LSR);
+
+		if (status & UART_LSR_BI)
+			lsr_break_flag = UART_LSR_BI;
+		
+		if (--tmout == 0)
+			break;
+	} while((status & BOTH_EMPTY) != BOTH_EMPTY);
+}
+
+
+/*
+ *	Print a string to the serial port trying not to disturb
+ *	any possible real use of the port...
+ *
+ *	The console_lock must be held when we get here.
+ */
+static void serial_console_write(struct console *co, const char *s,
+				unsigned count)
+{
+	static struct async_struct *info = &async_sercons;
+	int ier;
+	unsigned i;
+
+	/*
+	 *	First save the IER then disable the interrupts
+	 */
+	ier = serial_in(info, UART_IER);
+	serial_out(info, UART_IER, 0x00);
+
+	/*
+	 *	Now, do each character
+	 */
+	for (i = 0; i < count; i++, s++) {
+		wait_for_xmitr(info);
+
+		/*
+		 *	Send the character out.
+		 *	If a LF, also do CR...
+		 */
+		serial_out(info, UART_TX, *s);
+		if (*s == 10) {
+			wait_for_xmitr(info);
+			serial_out(info, UART_TX, 13);
+		}
+	}
+
+	/*
+	 *	Finally, Wait for transmitter & holding register to empty
+	 * 	and restore the IER
+	 */
+	wait_for_xmitr(info);
+	serial_out(info, UART_IER, ier);
+}
+
+/*
+ *	Receive character from the serial port
+ */
+static int serial_console_wait_key(struct console *co)
+{
+	static struct async_struct *info;
+	int ier, c;
+
+	info = &async_sercons;
+
+	/*
+	 *	First save the IER then disable the interrupts so
+	 *	that the real driver for the port does not get the
+	 *	character.
+	 */
+	ier = serial_in(info, UART_IER);
+	serial_out(info, UART_IER, 0x00);
+ 
+	while ((serial_in(info, UART_LSR) & UART_LSR_DR) == 0);
+	c = serial_in(info, UART_RX);
+
+	/*
+	 *	Restore the interrupts
+	 */
+	serial_out(info, UART_IER, ier);
+
+	return c;
+}
+
+static kdev_t serial_console_device(struct console *c)
+{
+	return MKDEV(TTY_MAJOR, 64 + c->index);
+}
+
+/*
+ *	Setup initial baud/bits/parity. We do two things here:
+ *	- construct a cflag setting for the first rs_open()
+ *	- initialize the serial port
+ *	Return non-zero if we didn't find a serial port.
+ */
+static int __init serial_console_setup(struct console *co, char *options)
+{
+	static struct async_struct *info;
+	struct serial_state *state;
+	unsigned cval;
+	int	baud = 9600;
+	int	bits = 8;
+	int	parity = 'n';
+	int	cflag = CREAD | HUPCL | CLOCAL;
+	int	quot = 0;
+	char	*s;
+
+	if (options) {
+		baud = simple_strtoul(options, NULL, 10);
+		s = options;
+		while(*s >= '0' && *s <= '9')
+			s++;
+		if (*s) parity = *s++;
+		if (*s) bits   = *s - '0';
+	}
+
+	/*
+	 *	Now construct a cflag setting.
+	 */
+	switch(baud) {
+		case 1200:
+			cflag |= B1200;
+			break;
+		case 2400:
+			cflag |= B2400;
+			break;
+		case 4800:
+			cflag |= B4800;
+			break;
+		case 19200:
+			cflag |= B19200;
+			break;
+		case 38400:
+			cflag |= B38400;
+			break;
+		case 57600:
+			cflag |= B57600;
+			break;
+		case 115200:
+			cflag |= B115200;
+			break;
+		case 9600:
+		default:
+			cflag |= B9600;
+			break;
+	}
+	switch(bits) {
+		case 7:
+			cflag |= CS7;
+			break;
+		default:
+		case 8:
+			cflag |= CS8;
+			break;
+	}
+	switch(parity) {
+		case 'o': case 'O':
+			cflag |= PARODD;
+			break;
+		case 'e': case 'E':
+			cflag |= PARENB;
+			break;
+	}
+	co->cflag = cflag;
+
+	/*
+	 *	Divisor, bytesize and parity
+	 */
+	state = rs_table + co->index;
+	info = &async_sercons;
+	info->magic = SERIAL_MAGIC;
+	info->state = state;
+	info->port = state->port;
+	info->flags = state->flags;
+	info->io_type = state->io_type;
+	info->iomem_base = state->iomem_base;
+	info->iomem_reg_shift = state->iomem_reg_shift;
+	state->baud_base = get_au1000_uart_baud();
+	quot = state->baud_base / baud;
+
+	cval = cflag & (CSIZE | CSTOPB);
+	cval >>= 4;
+	if (cflag & PARENB)
+		cval |= UART_LCR_PARITY;
+	if (!(cflag & PARODD))
+		cval |= UART_LCR_EPAR;
+
+	/*
+	 *	Disable UART interrupts, set DTR and RTS high
+	 *	and set speed.
+	 */
+	serial_out(info, UART_CLK, quot & 0xffff);
+	serial_out(info, UART_IER, 0);
+	serial_out(info, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
+
+	/*
+	 *	If we read 0xff from the LSR, there is no UART here.
+	 */
+	if (serial_in(info, UART_LSR) == 0xff)
+		return -1;
+
+	return 0;
+}
+
+static struct console sercons = {
+	name:		"ttyS",
+	write:		serial_console_write,
+	device:		serial_console_device,
+	wait_key:	serial_console_wait_key,
+	setup:		serial_console_setup,
+	flags:		CON_PRINTBUFFER,
+	index:		-1,
+};
+
+/*
+ *	Register console.
+ */
+void __init au1000_serial_console_init(void)
+{
+	register_console(&sercons);
+}
+#endif
+
+/*
+  Local variables:
+  compile-command: "gcc -D__KERNEL__ -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -fno-strict-aliasing -pipe -fno-strength-reduce -march=i586 -DMODULE -DMODVERSIONS -include ../../include/linux/modversions.h   -DEXPORT_SYMTAB -c serial.c"
+  End:
+*/
diff -urN linux-2.4.10-pre6/arch/mips/au1000/common/time.c linux/arch/mips/au1000/common/time.c
--- linux-2.4.10-pre6/arch/mips/au1000/common/time.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/common/time.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,286 @@
+/*
+ * Copyright (C) 2001 MontaVista Software, ppopov@mvista.com
+ * Copied and modified Carsten Langgaard's time.c
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Setting up the clock on the MIPS boards.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+
+#include <asm/mipsregs.h>
+#include <asm/ptrace.h>
+#include <asm/div64.h>
+#include <asm/au1000.h>
+
+#include <linux/mc146818rtc.h>
+#include <linux/timex.h>
+
+extern volatile unsigned long wall_jiffies;
+unsigned long missed_heart_beats = 0;
+unsigned long uart_baud_base;
+
+static unsigned long r4k_offset; /* Amount to increment compare reg each time */
+static unsigned long r4k_cur;    /* What counter should be at next timer irq */
+extern rwlock_t xtime_lock;
+
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+
+static inline void ack_r4ktimer(unsigned long newval)
+{
+	write_32bit_cp0_register(CP0_COMPARE, newval);
+}
+
+
+/*
+ * There are a lot of conceptually broken versions of the MIPS timer interrupt
+ * handler floating around.  This one is rather different, but the algorithm
+ * is provably more robust.
+ */
+unsigned long wtimer;
+void mips_timer_interrupt(struct pt_regs *regs)
+{
+	int irq = 7;
+
+	if (r4k_offset == 0)
+		goto null;
+
+	do {
+		kstat.irqs[0][irq]++;
+		do_timer(regs);
+		r4k_cur += r4k_offset;
+		ack_r4ktimer(r4k_cur);
+
+	} while (((unsigned long)read_32bit_cp0_register(CP0_COUNT)
+	         - r4k_cur) < 0x7fffffff);
+
+	return;
+
+null:
+	ack_r4ktimer(0);
+}
+
+/* 
+ * Figure out the r4k offset, the amount to increment the compare
+ * register for each time tick. 
+ * Use the Programmable Counter 1 to do this.
+ */
+unsigned long cal_r4koff(void)
+{
+	unsigned long count;
+	unsigned long cpu_pll;
+	unsigned long cpu_speed;
+	unsigned long start, end;
+	unsigned long counter;
+	int i;
+	int trim_divide = 16;
+
+	counter = inl(PC_COUNTER_CNTRL);
+	outl(counter | PC_CNTRL_EN1, PC_COUNTER_CNTRL);
+
+	while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_T1S);
+	outl(trim_divide-1, PC1_TRIM);    /* RTC now ticks at 32.768/16 kHz */
+	while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_T1S);
+
+	while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_C1S);
+	outl (0, PC1_COUNTER_WRITE);
+	while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_C1S);
+
+	start = inl(PC1_COUNTER_READ);
+	start += 2;
+	/* wait for the beginning of a new tick */
+	while (inl(PC1_COUNTER_READ) < start);
+
+	/* Start r4k counter. */
+	write_32bit_cp0_register(CP0_COUNT, 0);
+	end = start + (32768 / trim_divide)/2; /* wait 0.5 seconds */
+
+	while (end > inl(PC1_COUNTER_READ));
+
+	count = read_32bit_cp0_register(CP0_COUNT);
+	cpu_speed = count * 2;
+	uart_baud_base = (((cpu_speed) / 4) / 16);
+	return (cpu_speed / HZ);
+}
+
+static unsigned long __init get_mips_time(void)
+{
+	return inl(PC0_COUNTER_READ);
+}
+
+void __init time_init(void)
+{
+        unsigned int est_freq, flags;
+
+	printk("calculating r4koff... ");
+	r4k_offset = cal_r4koff();
+	printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
+
+	//est_freq = 2*r4k_offset*HZ;	
+	est_freq = r4k_offset*HZ;	
+	est_freq += 5000;    /* round */
+	est_freq -= est_freq%10000;
+	printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, 
+	       (est_freq%1000000)*100/1000000);
+	r4k_cur = (read_32bit_cp0_register(CP0_COUNT) + r4k_offset);
+
+	write_32bit_cp0_register(CP0_COMPARE, r4k_cur);
+	set_cp0_status(ALLINTS);
+
+	/* Read time from the RTC chipset. */
+	write_lock_irqsave (&xtime_lock, flags);
+	xtime.tv_sec = get_mips_time();
+	xtime.tv_usec = 0;
+	write_unlock_irqrestore(&xtime_lock, flags);
+}
+
+/* This is for machines which generate the exact clock. */
+#define USECS_PER_JIFFY (1000000/HZ)
+#define USECS_PER_JIFFY_FRAC ((1000000ULL << 32) / HZ & 0xffffffff)
+
+/* Cycle counter value at the previous timer interrupt.. */
+
+static unsigned int timerhi = 0, timerlo = 0;
+
+static unsigned long
+div64_32(unsigned long v1, unsigned long v2, unsigned long v3)
+{
+	unsigned long r0;
+	do_div64_32(r0, v1, v2, v3);
+	return r0;
+}
+
+
+/*
+ * FIXME: Does playing with the RP bit in c0_status interfere with this code?
+ */
+static unsigned long do_fast_gettimeoffset(void)
+{
+	u32 count;
+	unsigned long res, tmp;
+	unsigned long r0;
+
+	/* Last jiffy when do_fast_gettimeoffset() was called. */
+	static unsigned long last_jiffies=0;
+	unsigned long quotient;
+
+	/*
+	 * Cached "1/(clocks per usec)*2^32" value.
+	 * It has to be recalculated once each jiffy.
+	 */
+	static unsigned long cached_quotient=0;
+
+	tmp = jiffies;
+
+	quotient = cached_quotient;
+
+	if (tmp && last_jiffies != tmp) {
+		last_jiffies = tmp;
+		if (last_jiffies != 0) {
+			r0 = div64_32(timerhi, timerlo, tmp);
+			quotient = div64_32(USECS_PER_JIFFY, USECS_PER_JIFFY_FRAC, r0);
+			cached_quotient = quotient;
+		}
+	}
+
+	/* Get last timer tick in absolute kernel time */
+	count = read_32bit_cp0_register(CP0_COUNT);
+
+	/* .. relative to previous jiffy (32 bits is enough) */
+	count -= timerlo;
+
+	__asm__("multu\t%1,%2\n\t"
+		"mfhi\t%0"
+		:"=r" (res)
+		:"r" (count),
+		 "r" (quotient));
+
+	/*
+ 	 * Due to possible jiffies inconsistencies, we need to check 
+	 * the result so that we'll get a timer that is monotonic.
+	 */
+	if (res >= USECS_PER_JIFFY)
+		res = USECS_PER_JIFFY-1;
+
+	return res;
+}
+
+void do_gettimeofday(struct timeval *tv)
+{
+	unsigned int flags;
+
+	read_lock_irqsave (&xtime_lock, flags);
+	*tv = xtime;
+	tv->tv_usec += do_fast_gettimeoffset();
+
+	/*
+	 * xtime is atomically updated in timer_bh. jiffies - wall_jiffies
+	 * is nonzero if the timer bottom half hasnt executed yet.
+	 */
+	if (jiffies - wall_jiffies)
+		tv->tv_usec += USECS_PER_JIFFY;
+
+	read_unlock_irqrestore (&xtime_lock, flags);
+
+	if (tv->tv_usec >= 1000000) {
+		tv->tv_usec -= 1000000;
+		tv->tv_sec++;
+	}
+}
+
+void do_settimeofday(struct timeval *tv)
+{
+	write_lock_irq (&xtime_lock);
+
+	/* This is revolting. We need to set the xtime.tv_usec correctly.
+	 * However, the value in this location is is value at the last tick.
+	 * Discover what correction gettimeofday would have done, and then
+	 * undo it!
+	 */
+	tv->tv_usec -= do_fast_gettimeoffset();
+
+	if (tv->tv_usec < 0) {
+		tv->tv_usec += 1000000;
+		tv->tv_sec--;
+	}
+
+	xtime = *tv;
+	time_adjust = 0;		/* stop active adjtime() */
+	time_status |= STA_UNSYNC;
+	time_maxerror = NTP_PHASE_LIMIT;
+	time_esterror = NTP_PHASE_LIMIT;
+
+	write_unlock_irq (&xtime_lock);
+}
+
+/*
+ * The UART baud base is not known at compile time ... if
+ * we want to be able to use the same code on different
+ * speed CPUs.
+ */
+unsigned long get_au1000_uart_baud()
+{
+	return uart_baud_base;
+}
diff -urN linux-2.4.10-pre6/arch/mips/au1000/pb1000/Makefile linux/arch/mips/au1000/pb1000/Makefile
--- linux-2.4.10-pre6/arch/mips/au1000/pb1000/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/pb1000/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,24 @@
+#
+#  Copyright 2000 MontaVista Software Inc.
+#  Author: MontaVista Software, Inc.
+#     	ppopov@mvista.com or source@mvista.com
+#
+# Makefile for the Alchemy Semiconductor PB1000 board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+all: pb1000.o
+
+O_TARGET := pb1000.o
+
+obj-y := init.o setup.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/au1000/pb1000/init.c linux/arch/mips/au1000/pb1000/init.c
--- linux-2.4.10-pre6/arch/mips/au1000/pb1000/init.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/pb1000/init.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,59 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	PB1000 board setup
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/config.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+extern int prom_argc;
+extern char **prom_argv, **prom_envp;
+extern void  __init prom_init_cmdline(void);
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+	prom_argc = argc;
+	prom_argv = argv;
+	prom_envp = envp;
+
+	mips_machgroup = MACH_GROUP_ALCHEMY;
+	mips_machtype = MACH_PB1000;  
+
+	prom_init_cmdline();
+
+	add_memory_region(1, 64 << 20, BOOT_MEM_RAM);
+
+	return 0;
+}
diff -urN linux-2.4.10-pre6/arch/mips/au1000/pb1000/setup.c linux/arch/mips/au1000/pb1000/setup.c
--- linux-2.4.10-pre6/arch/mips/au1000/pb1000/setup.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/au1000/pb1000/setup.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,117 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Au1000-based board setup.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/console.h>
+#include <linux/mc146818rtc.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/au1000.h>
+
+#if defined(CONFIG_AU1000_SERIAL_CONSOLE)
+extern void console_setup(char *, int *);
+char serial_console[20];
+#endif
+
+void (*__wbflush) (void);
+extern struct rtc_ops no_rtc_ops;
+extern char * __init prom_getcmdline(void);
+extern void au1000_restart(void);
+extern void au1000_halt(void);
+extern void au1000_power_off(void);
+
+struct {
+    struct resource ram;
+    struct resource io;
+    struct resource sram;
+    struct resource flash;
+    struct resource boot;
+    struct resource pcmcia;
+    struct resource lcd;
+} au1000_resources = {
+    { "RAM",           0,          0x3FFFFFF,  IORESOURCE_MEM },
+    { "I/O",           0x10000000, 0x119FFFFF                 },
+    { "SRAM",          0x1e000000, 0x1E03FFFF                 },
+    { "System Flash",  0x1F800000, 0x1FBFFFFF                 },
+    { "Boot ROM",      0x1FC00000, 0x1FFFFFFF                 },
+    { "PCMCIA",        0x20000000, 0x27FFFFFF                 },
+    { "LCD",           0x60000000, 0x603FFFFF                 },
+};
+
+void au1000_wbflush(void)
+{
+	__asm__ volatile ("sync");
+}
+
+void __init au1000_setup(void)
+{
+	char *argptr;
+
+	argptr = prom_getcmdline();
+
+#ifdef CONFIG_AU1000_SERIAL_CONSOLE
+	if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) {
+		argptr = prom_getcmdline();
+		strcat(argptr, " console=ttyS0,115200");
+	}
+#endif	  
+
+	//set_cp0_status(ST0_FR,0);
+	rtc_ops = &no_rtc_ops;
+        __wbflush = au1000_wbflush;
+	_machine_restart = au1000_restart;
+	_machine_halt = au1000_halt;
+	_machine_power_off = au1000_power_off;
+
+	/*
+	 * IO/MEM resources. 
+	 */
+	mips_io_port_base = KSEG1;
+	ioport_resource.start = au1000_resources.io.start;
+	ioport_resource.end = au1000_resources.lcd.end;
+
+#ifdef CONFIG_BLK_DEV_INITRD
+	ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+#endif
+
+	outl(PC_CNTRL_E0 | PC_CNTRL_EN0 | PC_CNTRL_EN0, PC_COUNTER_CNTRL);
+	while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_T0S);
+	outl(0x8000-1, PC0_TRIM);
+
+	printk("Alchemy Semi PB1000 Board\n");
+	printk("Au1000/PB1000 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
+}
+
diff -urN linux-2.4.10-pre6/arch/mips/baget/irq.c linux/arch/mips/baget/irq.c
--- linux-2.4.10-pre6/arch/mips/baget/irq.c	Tue Mar  6 19:44:36 2001
+++ linux/arch/mips/baget/irq.c	Mon Dec  3 23:08:45 2001
@@ -4,8 +4,6 @@
  * Copyright (C) 1998 Vladimir Roganov & Gleb Raiko
  *      Code (mostly sleleton and comments) derived from DECstation IRQ
  *      handling.
- *
- * $Id: irq.c,v 1.6 2000/02/04 07:40:23 ralf Exp $
  */
 #include <linux/errno.h>
 #include <linux/init.h>
@@ -180,7 +178,7 @@
 	int do_random, cpu;
 
 	cpu = smp_processor_id();
-	irq_enter(cpu);
+	irq_enter(cpu, irq);
 	kstat.irqs[cpu][irq]++;
 
 	mask_irq(irq);  
@@ -202,7 +200,7 @@
 		printk("do_IRQ: Unregistered IRQ (0x%X) occurred\n", irq);
 	}
 	unmask_irq(irq);
-	irq_exit(cpu);
+	irq_exit(cpu, irq);
 
 	/* unmasking and bottom half handling is done magically for us. */
 }
@@ -358,13 +356,6 @@
 	}
 	printk("Trying to free free IRQ%d\n",irq);
 }
-
-static int baget_irq_canonicalize(int irq) 
-{
-	return irq;
-}
-
-int (*irq_cannonicalize)(int irq) = baget_irq_canonicalize; 
 
 unsigned long probe_irq_on (void)
 {
diff -urN linux-2.4.10-pre6/arch/mips/baget/prom/init.c linux/arch/mips/baget/prom/init.c
--- linux-2.4.10-pre6/arch/mips/baget/prom/init.c	Mon Feb 28 07:18:20 2000
+++ linux/arch/mips/baget/prom/init.c	Mon Dec  3 23:08:45 2001
@@ -2,25 +2,24 @@
  * init.c: PROM library initialisation code.
  *
  * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov 
- *
- * $Id: init.c,v 1.3 1999/10/09 00:00:57 ralf Exp $
  */
 #include <linux/init.h>
+#include <asm/addrspace.h>
 #include <asm/bootinfo.h>
 
-char arcs_cmdline[CL_SIZE];
+char arcs_cmdline[COMMAND_LINE_SIZE];
 
-int __init prom_init(unsigned int mem_upper)
+void __init prom_init(unsigned int mem_upper)
 {
-	mips_memory_upper = mem_upper;
+	mem_upper = PHYSADDR(mem_upper);
+
 	mips_machgroup  = MACH_GROUP_UNKNOWN;
 	mips_machtype   = MACH_UNKNOWN;
 	arcs_cmdline[0] = 0;
-	return 0;
-}
 
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
-{
+	vac_memory_upper = mem_upper;
+
+	add_memory_region(0, mem_upper, BOOT_MEM_RAM);
 }
 
 void prom_free_prom_memory (void)
diff -urN linux-2.4.10-pre6/arch/mips/baget/setup.c linux/arch/mips/baget/setup.c
--- linux-2.4.10-pre6/arch/mips/baget/setup.c	Mon Feb 28 07:18:20 2000
+++ linux/arch/mips/baget/setup.c	Mon Dec  3 23:08:45 2001
@@ -14,7 +14,7 @@
 
 #include <asm/baget/baget.h>
 
-extern long mips_memory_upper;
+long int vac_memory_upper;
 
 #define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
 #define MIN(a,b)           (((a)<(b)) ? (a):(b)) 
@@ -172,7 +172,7 @@
 
 static void __init vac_init(void)
 {
-	unsigned short mem_limit = ((mips_memory_upper-KSEG0) >> 16);
+	unsigned short mem_limit = (vac_memory_upper >> 16);
 
 	switch(vac_inw(VAC_ID)) {
 	case 0x1AC0:
diff -urN linux-2.4.10-pre6/arch/mips/baget/time.c linux/arch/mips/baget/time.c
--- linux-2.4.10-pre6/arch/mips/baget/time.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/baget/time.c	Mon Dec  3 23:08:45 2001
@@ -1,4 +1,4 @@
-/* $Id: time.c,v 1.3 1999/08/17 22:18:37 ralf Exp $
+/*
  * time.c: Baget/MIPS specific time handling details
  *
  * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
@@ -13,7 +13,7 @@
 #include <linux/mm.h>
 #include <linux/interrupt.h>
 #include <linux/timex.h>
-#include <linux/kernel_stat.h>
+#include <linux/spinlock.h>
 
 #include <asm/bootinfo.h>
 #include <asm/io.h>
@@ -23,11 +23,14 @@
 
 #include <asm/baget/baget.h>
 
+extern rwlock_t xtime_lock;
+
 /* 
  *  To have precision clock, we need to fix available clock frequency
  */
 #define FREQ_NOM  79125  /* Baget frequency ratio */
 #define FREQ_DEN  10000
+
 static inline int timer_intr_valid(void) 
 {
 	static unsigned long long ticks, valid_ticks;
@@ -47,8 +50,8 @@
 void static timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 {
 	if (timer_intr_valid()) {
-	sti();
-	do_timer(regs);
+		sti();
+		do_timer(regs);
 	}
 }
 
@@ -76,21 +79,20 @@
 
 void do_gettimeofday(struct timeval *tv)
 {
-        unsigned long flags;
+	unsigned long flags;
 
-        save_and_cli(flags);
-        *tv = xtime;
-        restore_flags(flags);
+	read_lock_irqsave (&xtime_lock, flags);
+	*tv = xtime;
+	read_unlock_irqrestore (&xtime_lock, flags);
 }
 
 void do_settimeofday(struct timeval *tv)
 {
-        unsigned long flags;
-  
-        save_and_cli(flags);
-        xtime = *tv;
-        time_state = TIME_BAD;
-        time_maxerror = MAXPHASE;
-        time_esterror = MAXPHASE;
-        restore_flags(flags);
-} 
+	write_lock_irq (&xtime_lock);
+	xtime = *tv;
+	time_adjust = 0;		/* stop active adjtime() */
+	time_status |= STA_UNSYNC;
+	time_maxerror = NTP_PHASE_LIMIT;
+	time_esterror = NTP_PHASE_LIMIT;
+	write_unlock_irq (&xtime_lock);
+}
diff -urN linux-2.4.10-pre6/arch/mips/baget/vacserial.c linux/arch/mips/baget/vacserial.c
--- linux-2.4.10-pre6/arch/mips/baget/vacserial.c	Fri Feb  9 11:29:44 2001
+++ linux/arch/mips/baget/vacserial.c	Mon Dec  3 23:08:45 2001
@@ -1,4 +1,4 @@
-/* $Id: vacserial.c,v 1.3 1999/08/17 22:18:37 ralf Exp $
+/*
  * vacserial.c: VAC UART serial driver
  *              This code stealed and adopted from linux/drivers/char/serial.c
  *              See that for author info
@@ -1300,7 +1300,7 @@
 		goto check_and_exit;
 	}
 
-	new_serial.irq = irq_cannonicalize(new_serial.irq);
+	new_serial.irq = new_serial.irq;
 
 	if ((new_serial.irq >= NR_IRQS) || (new_serial.port > 0xffff) ||
 	    (new_serial.baud_base == 0) || (new_serial.type < PORT_UNKNOWN) ||
@@ -1417,12 +1417,10 @@
 static int set_modem_info(struct async_struct * info, unsigned int cmd,
 			  unsigned int *value)
 {
-	int error;
 	unsigned int arg;
 
-	error = get_user(arg, value);
-	if (error)
-		return error;
+	if (get_user(arg, value))
+		return -EFAULT;
 	switch (cmd) {
 	default:
 		return -EINVAL;
@@ -2426,7 +2424,7 @@
 		state->icount.rx = state->icount.tx = 0;
 		state->icount.frame = state->icount.parity = 0;
 		state->icount.overrun = state->icount.brk = 0;
-		state->irq = irq_cannonicalize(state->irq);
+		state->irq = state->irq;
 		if (check_region(state->port,8))
 			continue;
 	        if (state->flags & ASYNC_BOOT_AUTOCONF)
diff -urN linux-2.4.10-pre6/arch/mips/boot/Makefile linux/arch/mips/boot/Makefile
--- linux-2.4.10-pre6/arch/mips/boot/Makefile	Sun Jul  9 22:18:15 2000
+++ linux/arch/mips/boot/Makefile	Mon Dec  3 23:08:45 2001
@@ -1,10 +1,9 @@
-# $Id: Makefile,v 1.9 1999/04/07 18:45:23 harald Exp $
 #
 # This file is subject to the terms and conditions of the GNU General Public
 # License.  See the file "COPYING" in the main directory of this archive
 # for more details.
 #
-# Copyright (C) 1995, 1998 by Ralf Baechle
+# Copyright (C) 1995, 1998, 2001 by Ralf Baechle
 #
 
 .S.s:
@@ -46,25 +45,12 @@
 
 clean:
 	rm -f vmlinux.ecoff
-	rm -f zImage zImage.tmp mkboot
+	rm -f zImage zImage.tmp
 
 mrproper:
 	rm -f vmlinux.ecoff
 	rm -f addinitrd
 	rm -f elf2ecoff
-
-zImage:	$(CONFIGURE) mkboot $(TOPDIR)/vmlinux
-	$(OBJCOPY) $(strip-flags) $(TOPDIR)/vmlinux zImage.tmp
-	./mkboot zImage.tmp zImage
-	rm -f zImage.tmp
-
-mkboot: mkboot.c
-	$(HOSTCC) -o $@ $^
-
-zdisk: 	zImage
-	cp $(TOPDIR)/vmlinux $(TOPDIR)/vm
-	$(STRIP) $(TOPDIR)/vm
-	gzip -9f $(TOPDIR)/vm
 
 dummy:
 
diff -urN linux-2.4.10-pre6/arch/mips/boot/mkboot.c linux/arch/mips/boot/mkboot.c
--- linux-2.4.10-pre6/arch/mips/boot/mkboot.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/boot/mkboot.c	Wed Dec 31 16:00:00 1969
@@ -1,658 +0,0 @@
-/*
- * Make a bootable image from a Linux/MIPS kernel.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 2001 by Ralf Baechle
- *
- * This file is written in plain Kernighan & Ritchie C as it has to run
- * on all crosscompile hosts no matter how braindead.  This code might
- * also become part of Milo.  It's therefore important that we don't use
- * seek because the Seek() call of the Magnum 4000 ARC BIOS is broken.
- */
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <sys/stat.h>
-#include <unistd.h>
-#include <fcntl.h>
-
-/*
- * Define this for verbose debugging output.
- */
-#undef VERBOSE
-
-/*
- * Don't use the host's elf.h - it might be using incompatible defines
- */
-
-#define EI_NIDENT 16
-
-/*
- * Basic ELF types.
- */
-typedef unsigned short Elf32_Half;
-typedef unsigned short Elf32_Section;
-typedef unsigned int Elf32_Word;
-typedef unsigned int Elf32_Addr;
-typedef unsigned int Elf32_Off;
-
-typedef struct
-{
-  unsigned char e_ident[EI_NIDENT];     /* Magic number and other info */
-  Elf32_Half    e_type;                 /* Object file type */
-  Elf32_Half    e_machine;              /* Architecture */
-  Elf32_Word    e_version;              /* Object file version */
-  Elf32_Addr    e_entry;                /* Entry point virtual address */
-  Elf32_Off     e_phoff;                /* Program header table file offset */
-  Elf32_Off     e_shoff;                /* Section header table file offset */
-  Elf32_Word    e_flags;                /* Processor-specific flags */
-  Elf32_Half    e_ehsize;               /* ELF header size in bytes */
-  Elf32_Half    e_phentsize;            /* Program header table entry size */
-  Elf32_Half    e_phnum;                /* Program header table entry count */
-  Elf32_Half    e_shentsize;            /* Section header table entry size */
-  Elf32_Half    e_shnum;                /* Section header table entry count */
-  Elf32_Half    e_shstrndx;             /* Section header string table index */
-} Elf32_Ehdr;
-
-/*
- * ELF magic number
- */
-#define ELFMAG          "\177ELF"
-#define SELFMAG         4
-
-#define EI_CLASS        4               /* File class byte index */
-#define ELFCLASSNONE    0               /* Invalid class */
-#define ELFCLASS32      1               /* 32-bit objects */
-#define ELFCLASS64      2               /* 64-bit objects */
-
-#define EI_DATA         5               /* Data encoding byte index */
-#define ELFDATA2LSB     1               /* 2's complement, little endian */
-#define ELFDATA2MSB     2               /* 2's complement, big endian */
-
-#define EI_VERSION      6               /* File version byte index */
-#define EV_CURRENT      1               /* Current version */
-
-/*
- * Acceptable machine type in e_machine.
- */
-#define EM_MIPS         8               /* MIPS R3000 big-endian */
-
-/*
- * The type of ELF file we accept.
- */
-#define ET_EXEC         2               /* Executable file */
-
-/*
- * Definition of a single program header structure
- */
-typedef struct
-{
-  Elf32_Word    p_type;                 /* Segment type */
-  Elf32_Off     p_offset;               /* Segment file offset */
-  Elf32_Addr    p_vaddr;                /* Segment virtual address */
-  Elf32_Addr    p_paddr;                /* Segment physical address */
-  Elf32_Word    p_filesz;               /* Segment size in file */
-  Elf32_Word    p_memsz;                /* Segment size in memory */
-  Elf32_Word    p_flags;                /* Segment flags */
-  Elf32_Word    p_align;                /* Segment alignment */
-} Elf32_Phdr;
-
-/*
- * Legal values for p_type
- */
-#define PT_NULL         0               /* Program header table entry unused */
-#define PT_LOAD         1               /* Loadable program segment */
-#define PT_DYNAMIC      2               /* Dynamic linking information */
-#define PT_INTERP       3               /* Program interpreter */
-#define PT_NOTE         4               /* Auxiliary information */
-#define PT_SHLIB        5               /* Reserved */
-#define PT_PHDR         6               /* Entry for header table itself */
-#define PT_NUM          7               /* Number of defined types.  */
-#define PT_LOPROC       0x70000000      /* Start of processor-specific */
-#define PT_HIPROC       0x7fffffff      /* End of processor-specific */
-
-typedef struct
-{
-  Elf32_Word    sh_name;                /* Section name (string tbl index) */
-  Elf32_Word    sh_type;                /* Section type */
-  Elf32_Word    sh_flags;               /* Section flags */
-  Elf32_Addr    sh_addr;                /* Section virtual addr at execution */
-  Elf32_Off     sh_offset;              /* Section file offset */
-  Elf32_Word    sh_size;                /* Section size in bytes */
-  Elf32_Word    sh_link;                /* Link to another section */
-  Elf32_Word    sh_info;                /* Additional section information */
-  Elf32_Word    sh_addralign;           /* Section alignment */
-  Elf32_Word    sh_entsize;             /* Entry size if section holds table */
-} Elf32_Shdr;
-
-typedef struct
-{
-  Elf32_Word    st_name;                /* Symbol name (string tbl index) */
-  Elf32_Addr    st_value;               /* Symbol value */
-  Elf32_Word    st_size;                /* Symbol size */
-  unsigned char st_info;                /* Symbol type and binding */
-  unsigned char st_other;               /* No defined meaning, 0 */
-  Elf32_Section st_shndx;               /* Section index */
-} Elf32_Sym;
-
-/* How to extract and insert information held in the st_info field.  */
-#define ELF32_ST_BIND(val)              (((unsigned char) (val)) >> 4)
-#define ELF32_ST_TYPE(val)              ((val) & 0xf)
-
-/* Legal values for ST_BIND subfield of st_info (symbol binding).  */
-#define STB_GLOBAL      1               /* Global symbol */
-
-/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-#define STT_NOTYPE      0               /* Symbol type is unspecified */
-#define STT_OBJECT      1               /* Symbol is a data object */
-#define STT_FUNC        2               /* Symbol is a code object */
-
-static unsigned int
-get_Elf32_Half(unsigned char *p)
-{
-	return p[0] | (p[1] << 8);
-}
-#define get_Elf32_Section(p) get_Elf32_Half(p)
-
-static unsigned int
-get_Elf32_Word(unsigned char *p)
-{
-	return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
-}
-#define get_Elf32_Addr(p) get_Elf32_Word(p)
-#define get_Elf32_Off(p) get_Elf32_Word(p)
-
-static void
-put_byte(p, x)
-	unsigned char *p;
-	unsigned char x;
-{
-	p[0] = x;
-}
-
-static void
-put_half(p, x)
-	unsigned char *p;
-	unsigned short x;
-{
-	p[0] = x & 0xff;
-	p[1] = (x >> 8) & 0xff;
-}
-
-static void
-put_word(p, x)
-	unsigned char *p;
-	unsigned long x;
-{
-	p[0] = x & 0xff;
-	p[1] = (x >> 8) & 0xff;
-	p[2] = (x >> 16) & 0xff;
-	p[3] = (x >> 24) & 0xff;
-}
-
-/*
- * Swap a program header in.
- */
-static void
-get_elfph(p, ph)
-	unsigned char *p;
-	Elf32_Phdr *ph;
-{
-	ph->p_type   = get_Elf32_Word(p);
-	ph->p_offset = get_Elf32_Off(p + 4);
-	ph->p_vaddr  = get_Elf32_Addr(p + 8);
-	ph->p_paddr  = get_Elf32_Addr(p + 12);
-	ph->p_filesz = get_Elf32_Word(p + 16);
-	ph->p_memsz  = get_Elf32_Word(p + 20);
-	ph->p_flags  = get_Elf32_Word(p + 24);
-	ph->p_align  = get_Elf32_Word(p + 28);
-}
-
-/*
- * Swap a section header in.
- */
-static void
-get_elfsh(p, sh)
-	unsigned char *p;
-	Elf32_Shdr *sh;
-{
-	sh->sh_name      = get_Elf32_Word(p);
-	sh->sh_type      = get_Elf32_Word(p + 4);
-	sh->sh_flags     = get_Elf32_Word(p + 8);
-	sh->sh_addr      = get_Elf32_Addr(p + 12);
-	sh->sh_offset    = get_Elf32_Off(p + 16);
-	sh->sh_size      = get_Elf32_Word(p + 20);
-	sh->sh_link      = get_Elf32_Word(p + 24);
-	sh->sh_info      = get_Elf32_Word(p + 28);
-	sh->sh_addralign = get_Elf32_Word(p + 32);
-	sh->sh_entsize   = get_Elf32_Word(p + 36);
-}
-
-/*
- * Swap a section header in.
- */
-static void
-get_elfsym(p, sym)
-	unsigned char *p;
-	Elf32_Sym *sym;
-{
-	sym->st_name      = get_Elf32_Word(p);
-	sym->st_value     = get_Elf32_Addr(p + 4);
-	sym->st_size      = get_Elf32_Word(p + 8);
-	sym->st_info      = *(p + 12);
-	sym->st_other     = *(p + 13);
-	sym->st_shndx     = get_Elf32_Section(p + 14);
-}
-
-/*
- * The a.out magic number
- */
-#define OMAGIC 0407	/* Code indicating object file or impure executable. */
-#define M_MIPS1 151	/* MIPS R3000/R3000 binary */
-#define M_MIPS2 152	/* MIPS R6000/R4000 binary */
-
-/*
- * Compute and return an a.out magic number.
- */
-#define AOUT_INFO(magic, type, flags) \
-        (((magic) & 0xffff) | \
-         (((int)(type) & 0xff) << 16) | \
-         (((flags) & 0xff) << 24))
-
-/*
- * a.out symbols
- */
-#define N_UNDF 0
-#define N_ABS 2
-#define N_TEXT 4
-#define N_DATA 6
-#define N_BSS 8
-#define N_FN 15
-#define N_EXT 1
-
-#define min(x,y) (((x)<(y))?(x):(y))
-
-static void
-do_read(fd, buf, size)
-	int fd;
-	char *buf;
-	ssize_t size;
-{
-	ssize_t rd;
-
-	while(size != 0) {
-		rd = read(fd, buf, size);
-		if (rd == -1) {
-			perror("Can't read from file.");
-			exit(1);
-		}
-		size -= rd;
-	}
-}
-
-static void
-writepad(fd, size)
-	int fd;
-	size_t size;
-{
-	static void *zeropage = NULL;
-	ssize_t written;
-
-	if (zeropage == NULL) {
-		zeropage = malloc(4096);
-		if (zeropage == NULL) {
-			fprintf(stderr, "Couldn't allocate zero buffer.\n");
-			exit(1);
-		}
-		memset(zeropage, '\0', 4096);
-	}
-	while(size != 0) {
-		written = write(fd, zeropage, min(4096, size));
-		if (written == -1) {
-			perror("Can't write to boot image");
-			exit(1);
-		}
-		size -= written;
-	}
-}
-
-static void
-do_write(fd, buf, size)
-	int fd;
-	char *buf;
-	ssize_t size;
-{
-	ssize_t written;
-
-	while(size != 0) {
-		written = write(fd, buf, size);
-		if (written == -1) {
-			perror("Can't write to boot image");
-			exit(1);
-		}
-		size -= written;
-	}
-}
-
-static int
-usage(program_name)
-	char *program_name;
-{
-	fprintf(stderr, "Usage: %s infile outfile\n", program_name);
-	exit(0);
-}
-
-int
-main(argc, argv)
-	int argc;
-	char *argv[];
-{
-	char *infile, *outfile;
-	struct stat ifstat;
-	off_t ifsize;
-	char *image;
-	int ifd, ofd, i, symtabix, strtabix;
-	Elf32_Ehdr eh;
-	Elf32_Phdr *ph;
-	Elf32_Shdr *sh;
-	unsigned long vaddr, entry, bss, kernel_entry, kernel_end;
-	unsigned char ahdr[32];
-	Elf32_Sym sym;
-	int	symnum;
-	char *symname;
-
-	/*
-	 * Verify some basic assuptions about type sizes made in this code
-	 */
-	if (sizeof(Elf32_Half) != 2) {
-		fprintf(stderr, "Fix mkboot: sizeof(Elf32_Half) != 2\n");
-		exit(1);
-	}
-	if (sizeof(Elf32_Word) != 4) {
-		fprintf(stderr, "Fix mkboot: sizeof(Elf32_Word) != 4\n");
-		exit(1);
-	}
-	if (sizeof(Elf32_Addr) != 4) {
-		fprintf(stderr, "Fix mkboot: sizeof(Elf32_Addr) != 4\n");
-		exit(1);
-	}
-
-	if (argc != 3)
-		usage(argv[0]);
-
-	infile = argv[1];
-	outfile = argv[2];
-
-	if (stat(infile, &ifstat) < 0) {
-		perror("Can't stat kernel image.");
-		exit(1);
-	}
-
-	if (!S_ISREG(ifstat.st_mode)) {
-		fprintf(stderr, "Input file isn't a regular file.\n");
-		exit(1);
-	}
-	ifsize = ifstat.st_size;
-
-	image = malloc((size_t)ifsize);
-	if (image == NULL) {
-		fprintf(stderr, "Can't allocate memory to read file\n");
-		exit(1);
-	}
-
-	/*
-	 * Read the entire input file in.
-	 */
-	ifd = open(infile, O_RDONLY);
-	if(ifd == 0) {
-		fprintf(stderr, "Can't open input file\n");
-		exit(1);
-	}
-	do_read(ifd, image, ifsize);
-	close(ifd);
-
-	/*
-	 * Now swap the ELF header in.  This is ugly but we the file
-	 * we're reading might have different type sizes, byteorder
-	 * or alignment than the host.
-	 */
-	memcpy(eh.e_ident, (void *)image, sizeof(eh.e_ident));
-	if(memcmp(eh.e_ident, ELFMAG, SELFMAG)) {
-		fprintf(stderr, "Input file isn't a ELF file\n");
-		exit(1);
-	}
-	if(eh.e_ident[EI_CLASS] != ELFCLASS32) {
-		fprintf(stderr, "Input file isn't a 32 bit ELF file\n");
-		exit(1);
-	}
-	if(eh.e_ident[EI_DATA] != ELFDATA2LSB) {
-		fprintf(stderr, "Input file isn't a little endian ELF file\n");
-		exit(1);
-	}
-	if(eh.e_ident[EI_VERSION] != EV_CURRENT) {
-		fprintf(stderr, "Input file isn't a version %d ELF file\n",
-		        EV_CURRENT);
-		exit(1);
-	}
-
-	/*
-	 * Ok, so far the file looks ok.  Now swap the rest of the header in
-	 * and do some more paranoia checks.
-	 */
-	eh.e_type      = get_Elf32_Half(image + 16);
-	eh.e_machine   = get_Elf32_Half(image + 18);
-	eh.e_version   = get_Elf32_Word(image + 20);
-	eh.e_entry     = get_Elf32_Addr(image + 24);
-	eh.e_phoff     = get_Elf32_Off(image + 28);
-	eh.e_shoff     = get_Elf32_Off(image + 32);
-	eh.e_flags     = get_Elf32_Word(image + 36);
-	eh.e_ehsize    = get_Elf32_Half(image + 40);
-	eh.e_phentsize = get_Elf32_Half(image + 42);
-	eh.e_phnum     = get_Elf32_Half(image + 44);
-	eh.e_shentsize = get_Elf32_Half(image + 46);
-	eh.e_shnum     = get_Elf32_Half(image + 48);
-	eh.e_shstrndx  = get_Elf32_Half(image + 50);
-
-	if(eh.e_type != ET_EXEC) {
-		fprintf(stderr, "Input file isn't a executable.\n");
-		exit(1);
-	}
-	if(eh.e_machine != EM_MIPS) {
-		fprintf(stderr, "Input file isn't a MIPS executable.\n");
-		exit(1);
-	}
-
-	/*
-	 * Now read the program headers ...
-	 */
-	ph = malloc(sizeof(Elf32_Phdr) * eh.e_phnum);
-	if (ph == NULL) {
-		fprintf(stderr, "No memory for program header table.\n");
-		exit(1);
-	}
-	for(i = 0;i < eh.e_phnum; i++)
-		get_elfph((void *)(image + eh.e_phoff + i * 32), ph + i);
-
-	/*
-	 * ... and then the section headers.
-	 */
-	sh = malloc(sizeof(Elf32_Shdr) * eh.e_shnum);
-	if (sh == NULL) {
-		fprintf(stderr, "No memory for section header table.\n");
-		exit(1);
-	}
-	for(i = 0;i < eh.e_shnum; i++)
-		get_elfsh((void *)(image + eh.e_shoff + (i * 40)), sh + i);
-
-	/*
-	 * Find the symboltable and the stringtable in the file.
-	 */
-	for(i = 0;i < eh.e_shnum; i++) {
-		if (!strcmp (image + sh [eh.e_shstrndx].sh_offset + sh[i].sh_name,
-		             ".symtab")) {
-			symtabix = i;
-			continue;
-		}
-		if (!strcmp (image + sh [eh.e_shstrndx].sh_offset + sh[i].sh_name,
-		             ".strtab")) {
-			strtabix = i;
-			continue;
-		}
-	}
-
-	if (symtabix == -1) {
-		fprintf(stderr, "The executable doesn't have a symbol table\n");
-		exit(1);
-	}
-	if (strtabix == -1) {
-		fprintf(stderr, "The executable doesn't have a string table\n");
-		exit(1);
-	}
-
-	/*
-	 * Dig for the two required symbols in the symbol table.
-	 */
-	symnum = sh[symtabix].sh_size / 16;
-	for(i = 0;i < symnum;i++) {
-		get_elfsym(image + sh[symtabix].sh_offset + (i * 16), &sym);
-		symname = image + sh[strtabix].sh_offset + sym.st_name;
-		if (ELF32_ST_BIND(sym.st_info) != STB_GLOBAL)
-			continue;
-		if (ELF32_ST_TYPE(sym.st_info) != STT_NOTYPE &&
-		    ELF32_ST_TYPE(sym.st_info) != STT_OBJECT &&
-		    ELF32_ST_TYPE(sym.st_info) != STT_FUNC)
-			continue;
-		if (strcmp("kernel_entry", symname) == 0) {
-			kernel_entry = sym.st_value;
-			continue;
-		}
-		if (strcmp("_end", symname) == 0) {
-			kernel_end = sym.st_value;
-			continue;
-		}
-	}
-
-#ifdef VERBOSE
-	/*
-	 * And print what we will be loaded into memory.
-	 */
-	for(i = 0;i < eh.e_phnum; i++) {
-		if (ph[i].p_type != PT_LOAD) {
-			continue;
-		}
-		printf("  Offset: %08lx\n", ph[i].p_offset);
-		printf("  file size: %08lx\n", ph[i].p_filesz);
-		printf("  mem size: %08lx\n", ph[i].p_memsz);
-		printf("    Loading: %08lx - %08lx\n",
-		       ph[i].p_vaddr, ph[i].p_vaddr + ph[i].p_filesz);
-		printf("    Zero mapping: %08lx - %08lx\n",
-		       ph[i].p_vaddr + ph[i].p_filesz,
-		       ph[i].p_vaddr + ph[i].p_memsz);
-	}
-#endif
-
-	/*
-	 * Time to open the outputfile.
-	 */
-	ofd = open(outfile, O_WRONLY|O_CREAT|O_TRUNC, 0666);
-	if (ofd == -1) {
-		perror("Can't open boot image for output.");
-		exit(1);
-	}
-
-	/*
-	 * First compute the layout of the file.  We need to do this
-	 * first because we can't seek back to the beginning due to the
-	 * broken Seek() call in the Magnum firmware.
-	 */
-	entry = vaddr = 0xffffffff;
-	bss = 0;
-	for(i = 0;i < eh.e_phnum; i++) {
-		if (ph[i].p_type != PT_LOAD)
-			continue;
-		if (vaddr == 0xffffffff)
-			entry = vaddr = ph[i].p_vaddr;
-		vaddr = ph[i].p_vaddr + ph[i].p_filesz;
-		bss = ph[i].p_memsz - ph[i].p_filesz;
-	}
-
-	/*
-	 * In the next step we construct the boot image.  The boot file
-	 * looks essentially like a dump of the loaded kernel with a
-	 * minimal header.  Because Milo supports already a.out image
-	 * we simply dump the image in an a.out image ...  First let's
-	 * write the header.
-	 */
-
-	/*
-	 * Create and write the a.out header.
-	 */
-	put_word(ahdr, AOUT_INFO(OMAGIC, M_MIPS1, 0));
-	put_word(ahdr + 4, vaddr - entry);	/* text size */
-	put_word(ahdr + 8, 0);			/* data size */
-	put_word(ahdr + 12, bss);		/* bss size */
-	put_word(ahdr + 16, 2 * 12);		/* size of symbol table */
-	put_word(ahdr + 20, entry);		/* base address */
-	put_word(ahdr + 24, 0);			/* size of text relocations */
-	put_word(ahdr + 28, 0);			/* size of data relocations */
-	do_write(ofd, ahdr, 32);
-
-	/*
-	 * Write text and data segment combined into the a.out text segment
-	 * and a zero length data segment into the file.
-	 */
-	vaddr = 0xffffffff;
-	bss = 0;
-	for(i = 0;i < eh.e_phnum; i++) {
-		if (ph[i].p_type != PT_LOAD)
-			continue;
-		if (vaddr == 0xffffffff)
-			vaddr = ph[i].p_vaddr;
-		writepad(ofd, ph[i].p_vaddr - vaddr);	/* Write zero pad */
-		do_write(ofd, image + ph[i].p_offset, ph[i].p_filesz);
-		vaddr = ph[i].p_vaddr + ph[i].p_filesz;
-		bss = ph[i].p_memsz - ph[i].p_filesz;
-	}
-
-	/*
-	 * Now write the symbol table.  It has only two symbols,
-	 * kernel_entry and _end which we need for booting.
-	 */
-	put_word(ahdr    , 4);			/* n_un.n_strx */
-	put_byte(ahdr + 4, N_TEXT | N_EXT);	/* n_type */
-	put_byte(ahdr + 5, 0);			/* n_other */
-	put_half(ahdr + 6, 0);			/* n_desc */
-	put_word(ahdr + 8, kernel_entry);	/* n_value */
-	do_write(ofd, ahdr, 12);
-
-	put_word(ahdr    , 4 + 13);		/* n_un.n_strx */
-	put_byte(ahdr + 4, N_ABS | N_EXT);	/* n_type */
-	put_byte(ahdr + 5, 0);			/* n_other */
-	put_half(ahdr + 6, 0);			/* n_desc */
-	put_word(ahdr + 8, kernel_end);		/* n_value */
-	do_write(ofd, ahdr, 12);
-
-	/*
-	 * Now write stringtable size and the strings.
-	 */
-	put_word(ahdr, 4 + 20);
-	do_write(ofd, ahdr, 4);
-	do_write(ofd, "kernel_entry\0_end\0\0", 20);
-
-	/*
-	 * That's is all ...
-	 */
-	close(ofd);
-
-#ifdef VERBOSE
-	printf("Entry: %08lx\n", entry);
-	printf("Dumped image %08lx - %08lx\n", 0x80000000, vaddr);
-	printf("Extra bss at end: %08lx\n", bss);
-#endif
-
-	return 0;
-}
diff -urN linux-2.4.10-pre6/arch/mips/config.in linux/arch/mips/config.in
--- linux-2.4.10-pre6/arch/mips/config.in	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/config.in	Mon Dec  3 23:08:45 2001
@@ -76,6 +76,7 @@
 #
 unset CONFIG_ARC32
 unset CONFIG_BOARD_SCACHE
+unset CONFIG_COHERENT_IO
 unset CONFIG_HAVE_STD_PC_SERIAL_PORT
 unset CONFIG_I8259
 unset CONFIG_ISA
@@ -92,6 +93,8 @@
    define_bool CONFIG_PCI y
    define_bool CONFIG_MIPS_GT96100 y
    define_bool CONFIG_SWAP_IO_SPACE y
+   define_bool CONFIG_NEW_PCI y
+   define_bool CONFIG_PCI_AUTO y
 fi
 if [ "$CONFIG_MIPS_EV64120" = "y" ]; then
    define_bool CONFIG_PCI y
@@ -132,6 +135,7 @@
    define_bool CONFIG_I8259 y
    define_bool CONFIG_PCI y
    define_bool CONFIG_HAVE_STD_PC_SERIAL_PORT y
+   define_bool CONFIG_NEW_IRQ y
    define_bool CONFIG_SWAP_IO_SPACE y
 fi
 if [ "$CONFIG_MOMENCO_OCELOT" = "y" ]; then
@@ -158,7 +162,7 @@
    define_bool CONFIG_ROTTEN_IRQ y
    define_bool CONFIG_OLD_TIME_C y
 fi
-if [ "$CONFIG_DDB5074" = "y"]; then
+if [ "$CONFIG_DDB5074" = "y" ]; then
    define_bool CONFIG_I8259 y
    define_bool CONFIG_ISA y
    define_bool CONFIG_PCI y
@@ -168,7 +172,6 @@
    define_bool CONFIG_OLD_TIME_C y
 fi
 if [ "$CONFIG_DDB5476"  = "y" ]; then
-   define_bool CONFIG_I8259 y
    define_bool CONFIG_ISA y
    define_bool CONFIG_PCI y
    define_bool CONFIG_PC_KEYB y
@@ -186,6 +189,8 @@
    define_bool CONFIG_PCI y
    define_bool CONFIG_IT8712 y
    define_bool CONFIG_PC_KEYB y
+   define_bool CONFIG_NEW_PCI y
+   define_bool CONFIG_PCI_AUTO y
 fi
 if [ "$CONFIG_MIPS_IVR" = "y" ]; then
    define_bool CONFIG_PCI y
@@ -229,33 +234,45 @@
 choice 'CPU type' \
 	"R3000 CONFIG_CPU_R3000	\
 	 R6000 CONFIG_CPU_R6000	\
+	 R41xx CONFIG_CPU_VR41XX \
 	 R4300 CONFIG_CPU_R4300	\
 	 R4x00 CONFIG_CPU_R4X00	\
 	 R5000 CONFIG_CPU_R5000	\
-         R5432 CONFIG_CPU_R5432 \
+	 R5432 CONFIG_CPU_R5432 \
 	 RM7000 CONFIG_CPU_RM7000 \
 	 R52xx CONFIG_CPU_NEVADA \
 	 R10000 CONFIG_CPU_R10000 \
 	 SB1    CONFIG_CPU_SB1    \
-	 MIPS32 CONFIG_CPU_MIPS32" R4x00
+	 MIPS32 CONFIG_CPU_MIPS32 \
+	 MIPS64 CONFIG_CPU_MIPS64" R4x00
 
 bool 'Override CPU Options' CONFIG_CPU_ADVANCED
 
 if [ "$CONFIG_CPU_ADVANCED" = "y" ]; then
    bool '  ll/sc Instructions available' CONFIG_CPU_HAS_LLSC
+   bool '  lld/scd Instructions available' CONFIG_CPU_HAS_LLDSCD
    bool '  Writeback Buffer available' CONFIG_CPU_HAS_WB
 else
-   if [ "$CONFIG_CPU_R3000" = "y" ]; then
-      if [ "$CONFIG_DECSTATION" = "y" ]; then
+   if [ "$CONFIG_CPU_R3000" = "y" -o "$CONFIG_CPU_VR41XX" = "y" ]; then
+      if [ "CONFIG_DECSTATION" = "y" ]; then
 	 define_bool CONFIG_CPU_HAS_LLSC n
+	 define_bool CONFIG_CPU_HAS_LLDSCD n
 	 define_bool CONFIG_CPU_HAS_WB y
       else
 	 define_bool CONFIG_CPU_HAS_LLSC n
+	 define_bool CONFIG_CPU_HAS_LLDSCD n
 	 define_bool CONFIG_CPU_HAS_WB n
       fi
    else
+      if [ "$CONFIG_CPU_MIPS32" = "y" ]; then
+	 define_bool CONFIG_CPU_HAS_LLSC y
+	 define_bool CONFIG_CPU_HAS_LLDSCD n
+	 define_bool CONFIG_CPU_HAS_WB n
+      else
 	 define_bool CONFIG_CPU_HAS_LLSC y
+	 define_bool CONFIG_CPU_HAS_LLDSCD y
 	 define_bool CONFIG_CPU_HAS_WB n
+      fi
    fi
 fi
 endmenu
@@ -270,7 +287,6 @@
 else
    bool 'Generate little endian code' CONFIG_CPU_LITTLE_ENDIAN
 fi
-bool 'Kernel floating-point emulation' CONFIG_MIPS_FPU_EMULATOR
 
 if [ "$CONFIG_PROC_FS" = "y" ]; then
    define_bool CONFIG_KCORE_ELF y
@@ -361,7 +377,7 @@
 
 if [ "$CONFIG_DECSTATION" != "y" -a \
      "$CONFIG_SGI_IP22" != "y" ]; then
-   source drivers/message/i2o/Config.in
+   source drivers/i2o/Config.in
 fi
 
 if [ "$CONFIG_NET" = "y" ]; then
@@ -492,9 +508,6 @@
 comment 'Kernel hacking'
 
 bool 'Are you using a crosscompiler' CONFIG_CROSSCOMPILE
-if [ "$CONFIG_MODULES" = "y" ]; then
-   bool ' Build fp execption handler module' CONFIG_MIPS_FPE_MODULE
-fi
 if [ "$CONFIG_SERIAL" = "y" -o "$CONFIG_AU1000_UART" = "y" ]; then
   bool 'Remote GDB kernel debugging' CONFIG_REMOTE_DEBUG
   dep_bool 'Console output to GDB' CONFIG_GDB_CONSOLE $CONFIG_REMOTE_DEBUG
diff -urN linux-2.4.10-pre6/arch/mips/ddb5074/pci.c linux/arch/mips/ddb5074/pci.c
--- linux-2.4.10-pre6/arch/mips/ddb5074/pci.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ddb5074/pci.c	Mon Dec  3 23:08:45 2001
@@ -417,5 +417,9 @@
 	}
 }
 
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 1;
+}
 
 struct pci_fixup pcibios_fixups[] = { };
diff -urN linux-2.4.10-pre6/arch/mips/ddb5476/int-handler.S linux/arch/mips/ddb5476/int-handler.S
--- linux-2.4.10-pre6/arch/mips/ddb5476/int-handler.S	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ddb5476/int-handler.S	Mon Dec  3 23:08:45 2001
@@ -68,6 +68,8 @@
 	and	s0, s1, t2		# isolate allowed ones
 #endif
 	/* First we check for r4k counter/timer IRQ. */
+	andi	a0, s0, CAUSEF_IP7	# cpu timer */
+	bnez	a0, cpu_timer_irq
 	andi	a0, s0, CAUSEF_IP2	# delay slot, check local level zero
 	beq	a0, zero, 1f
 	 andi	a0, s0, CAUSEF_IP3	# delay slot, check local level one
@@ -119,6 +121,15 @@
 	/* phamtom interrupt */
 	move 	a0, s1
 	jal	ddb_phantom_irq
+	nop
+	j	ret_from_irq
+	nop
+
+cpu_timer_irq:
+	li	a0, 0
+	move	a1, sp
+	jal	do_IRQ 
+	/* jal	ll_timer_interrupt */
 	nop
 	j	ret_from_irq
 	nop
diff -urN linux-2.4.10-pre6/arch/mips/ddb5476/pci.c linux/arch/mips/ddb5476/pci.c
--- linux-2.4.10-pre6/arch/mips/ddb5476/pci.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ddb5476/pci.c	Mon Dec  3 23:08:45 2001
@@ -14,7 +14,6 @@
 
 #include <asm-mips/nile4.h>
 
-
 static u32 nile4_pre_pci_access0(int slot_num)
 {
 	u32 pci_addr = 0;
@@ -490,6 +489,11 @@
 		start = (start + 1024 - 1) & ~(1024 - 1);
 		res->start = start;
 	}
+}
+
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 1;
 }
 
 struct pci_fixup pcibios_fixups[] = { {0} };
diff -urN linux-2.4.10-pre6/arch/mips/ddb5476/setup.c linux/arch/mips/ddb5476/setup.c
--- linux-2.4.10-pre6/arch/mips/ddb5476/setup.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ddb5476/setup.c	Mon Dec  3 23:08:45 2001
@@ -24,6 +24,7 @@
 #include <asm/reboot.h>
 #include <asm/gdb-stub.h>
 #include <asm/nile4.h>
+#include <asm/time.h>
 
 
 #ifdef CONFIG_REMOTE_DEBUG
@@ -71,13 +72,27 @@
 
 extern void ddb_irq_setup(void);
 
-void (*board_time_init) (struct irqaction * irq);
-
-
 static void __init ddb_time_init(struct irqaction *irq)
 {
-	/* set the clock to 1 Hz */
-	nile4_out32(NILE4_T2CTRL, 1000000);
+	printk("ddb_time_init invoked.\n");
+	mips_counter_frequency = 83000000;
+}
+
+static void __init ddb_timer_setup(struct irqaction *irq)
+{
+	unsigned int count;
+
+	/* we are using the cpu counter for timer interrupts */
+	i8259_setup_irq(0, irq);
+	set_cp0_status(IE_IRQ5);
+
+	/* to generate the first timer interrupt */
+	count = read_32bit_cp0_register(CP0_COUNT);
+	write_32bit_cp0_register(CP0_COMPARE, count + 1000);
+
+#if 0		/* the old way to do timer interrupt */
+	/* set the clock to 100 Hz */
+	nile4_out32(NILE4_T2CTRL, 830000);
 	/* enable the General-Purpose Timer */
 	nile4_out32(NILE4_T2CTRL + 4, 0x00000001);
 	/* reset timer */
@@ -85,6 +100,7 @@
 	/* enable interrupt */
 	nile4_enable_irq(NILE4_INT_GPT);
 	i8259_setup_irq(nile4_to_irq(NILE4_INT_GPT), irq);
+#endif
 }
 
 static struct {
@@ -119,7 +135,9 @@
 	irq_setup = ddb_irq_setup;
 	mips_io_port_base = NILE4_PCI_IO_BASE;
 	isa_slot_offset = NILE4_PCI_MEM_BASE;
+
 	board_time_init = ddb_time_init;
+	board_timer_setup = ddb_timer_setup;
 
 	_machine_restart = ddb_machine_restart;
 	_machine_halt = ddb_machine_halt;
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/common/Makefile linux/arch/mips/ddb5xxx/common/Makefile
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/common/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/common/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,18 @@
+#
+# Makefile for the common code of NEC DDB-Vrc5xxx board
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+O_TARGET:= ddb5xxx.o
+
+obj-y	 += irq.o irq_cpu.o nile4.o prom.o pci.o pci_auto.o rtc_ds1386.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/common/irq.c linux/arch/mips/ddb5xxx/common/irq.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/common/irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/common/irq.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,32 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/common/irq.c
+ *     Common irq code for DDB boards.  This really should belong
+ *	arch/mips/kernel/irq.c.  Need to talk to Ralf.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+
+void (*irq_setup)(void);
+
+void __init init_IRQ(void)
+{
+#ifdef CONFIG_REMOTE_DEBUG
+	extern void breakpoint(void);
+	extern void set_debug_traps(void);
+
+	printk("Wait for gdb client connection ...\n");
+	set_debug_traps();
+	breakpoint();
+#endif
+
+	/* invoke board-specific irq setup */
+	irq_setup();
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/common/irq_cpu.c linux/arch/mips/ddb5xxx/common/irq_cpu.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/common/irq_cpu.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/common/irq_cpu.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,115 @@
+/***********************************************************************
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ *  arch/mips/ddb5xxx/common/irq_cpu.c
+ *     This file define the irq handler for MIPS CPU interrupts.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ ***********************************************************************
+ */
+
+/*
+ * Almost all MIPS CPUs define 8 interrupt sources.  They are typically
+ * level triggered (i.e., cannot be cleared from CPU; must be cleared from
+ * device).  The first two are software interrupts.  The last one is 
+ * usually cpu timer interrupt if coutner register is present.
+ *
+ * This file exports one global function:
+ *	mips_cpu_irq_init(u32 irq_base);
+ */
+
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+
+#include <asm/mipsregs.h>
+
+/* [jsun] sooner or later we should move this debug stuff to MIPS common */
+#include <asm/ddb5xxx/debug.h>
+
+static int mips_cpu_irq_base=-1;
+
+static void 
+mips_cpu_irq_enable(unsigned int irq)
+{
+	MIPS_ASSERT(mips_cpu_irq_base != -1);
+	MIPS_ASSERT(irq >= mips_cpu_irq_base);
+	MIPS_ASSERT(irq < mips_cpu_irq_base+8);
+
+	clear_cp0_cause( 1 << (irq - mips_cpu_irq_base + 8));
+	set_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
+}
+
+static void 
+mips_cpu_irq_disable(unsigned int irq)
+{
+	MIPS_ASSERT(mips_cpu_irq_base != -1);
+	MIPS_ASSERT(irq >= mips_cpu_irq_base);
+	MIPS_ASSERT(irq < mips_cpu_irq_base+8);
+
+	clear_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
+}
+
+static unsigned int mips_cpu_irq_startup(unsigned int irq)
+{
+	mips_cpu_irq_enable(irq);
+	return 0;
+}
+
+#define	mips_cpu_irq_shutdown	mips_cpu_irq_disable
+
+static void
+mips_cpu_irq_ack(unsigned int irq)
+{
+	MIPS_ASSERT(mips_cpu_irq_base != -1);
+	MIPS_ASSERT(irq >= mips_cpu_irq_base);
+	MIPS_ASSERT(irq < mips_cpu_irq_base+8);
+
+	/* although we attemp to clear the IP bit in cause reigster, I think
+	 * usually it is cleared by device (irq source)
+	 */
+	clear_cp0_cause( 1 << (irq - mips_cpu_irq_base + 8));
+
+	/* I am not fully convinced that I should disable irq here */
+}
+
+static void
+mips_cpu_irq_end(unsigned int irq)
+{
+	MIPS_ASSERT(mips_cpu_irq_base != -1);
+	MIPS_ASSERT(irq >= mips_cpu_irq_base);
+	MIPS_ASSERT(irq < mips_cpu_irq_base+8);
+	/* I am not fully convinced that I should enable irq here */
+}
+
+static hw_irq_controller mips_cpu_irq_controller = {
+	"CPU_irq",
+	mips_cpu_irq_startup,
+	mips_cpu_irq_shutdown,
+	mips_cpu_irq_enable,
+	mips_cpu_irq_disable,
+	mips_cpu_irq_ack,
+	mips_cpu_irq_end,
+	NULL			/* no affinity stuff for UP */
+};
+
+
+void 
+mips_cpu_irq_init(u32 irq_base)
+{
+	extern irq_desc_t irq_desc[];
+	u32 i;
+
+	for (i= irq_base; i< irq_base+8; i++) {
+		irq_desc[i].status = IRQ_DISABLED;
+		irq_desc[i].action = NULL;
+		irq_desc[i].depth = 1;
+		irq_desc[i].handler = &mips_cpu_irq_controller;
+	}
+
+	mips_cpu_irq_base = irq_base;
+} 
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/common/nile4.c linux/arch/mips/ddb5xxx/common/nile4.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/common/nile4.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/common/nile4.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,135 @@
+/***********************************************************************
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/common/nile4.c
+ *     misc low-level routines for vrc-5xxx controllers.
+ *
+ * derived from original code by Geert Uytterhoeven <geert@sonycom.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ ***********************************************************************
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+
+#include <asm/ddb5xxx/ddb5xxx.h>
+#include <asm/ddb5xxx/debug.h>
+
+u32
+ddb_calc_pdar(u32 phys, u32 size, int width, 
+	      int on_memory_bus, int pci_visible)
+{
+        u32 maskbits;
+        u32 widthbits;
+
+        switch (size) {
+#if 0                           /* We don't support 4 GB yet */
+        case 0x100000000:       /* 4 GB */
+                maskbits = 4;
+                break;
+#endif
+        case 0x80000000:        /* 2 GB */
+                maskbits = 5;
+                break;
+        case 0x40000000:        /* 1 GB */
+                maskbits = 6;
+                break;
+        case 0x20000000:        /* 512 MB */
+                maskbits = 7;
+                break;
+        case 0x10000000:        /* 256 MB */
+                maskbits = 8;
+                break;
+        case 0x08000000:        /* 128 MB */
+                maskbits = 9;
+                break;
+        case 0x04000000:        /* 64 MB */
+                maskbits = 10;
+                break;
+        case 0x02000000:        /* 32 MB */
+                maskbits = 11;
+                break;
+        case 0x01000000:        /* 16 MB */
+                maskbits = 12;
+                break;
+        case 0x00800000:        /* 8 MB */
+                maskbits = 13;
+                break;
+        case 0x00400000:        /* 4 MB */
+                maskbits = 14;
+                break;
+        case 0x00200000:        /* 2 MB */
+                maskbits = 15;
+                break;
+        case 0:         /* OFF */
+                maskbits = 0;
+                break;
+        default:
+                panic("nile4_set_pdar: unsupported size %p\n", (void *) size);
+        }
+        switch (width) {
+        case 8:
+                widthbits = 0;
+                break;
+        case 16:
+                widthbits = 1;
+                break;
+        case 32:
+                widthbits = 2;
+                break;
+        case 64:
+                widthbits = 3;
+                break;
+        default:
+                panic("nile4_set_pdar: unsupported width %d\n", width);
+        }
+
+	return maskbits | (on_memory_bus ? 0x10 : 0) |
+		(pci_visible ? 0x20 : 0) | (widthbits << 6) |
+		(phys & 0xffe00000);
+}
+
+void
+ddb_set_pdar(u32 pdar, u32 phys, u32 size, int width,
+	     int on_memory_bus, int pci_visible)
+{
+	u32 temp= ddb_calc_pdar(phys, size, width, on_memory_bus, pci_visible);
+	ddb_out32(pdar, temp);
+	ddb_out32(pdar + 4, 0);
+
+        /*
+         * When programming a PDAR, the register should be read immediately
+         * after writing it. This ensures that address decoders are properly
+         * configured.
+	 * [jsun] is this really necesary?
+         */
+        ddb_in32(pdar);
+        ddb_in32(pdar + 4);
+}
+
+/*
+ * routines that mess with PCIINITx registers
+ */
+
+void ddb_set_pmr(u32 pmr, u32 type, u32 addr, u32 options)
+{
+        switch (type) {
+        case DDB_PCICMD_IACK: /* PCI Interrupt Acknowledge */
+        case DDB_PCICMD_IO:   /* PCI I/O Space */
+        case DDB_PCICMD_MEM:  /* PCI Memory Space */
+        case DDB_PCICMD_CFG:  /* PCI Configuration Space */
+                break;
+        default:
+                panic("nile4_set_pmr: invalid type %d\n", type);
+        }
+        ddb_out32(pmr, (type << 1) | (addr & 0xffe00000) | options );
+        ddb_out32(pmr + 4, 0);
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/common/pci.c linux/arch/mips/ddb5xxx/common/pci.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/common/pci.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/common/pci.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,179 @@
+/***********************************************************************
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/common/pci.c
+ *     Common PCI routines for DDB5xxx - as a matter of fact, meant for all 
+ *	MIPS machines.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ ***********************************************************************
+ */
+
+/*
+ * This file contains common PCI routines meant to be shared for
+ * all MIPS machines.
+ *
+ * Strategies:
+ *
+ * . We rely on pci_auto.c file to assign PCI resources (MEM and IO)
+ *   TODO: this shold be optional for some machines where they do have
+ *   a real "pcibios" that does resource assignment.
+ *
+ * . We then use pci_scan_bus() to "discover" all the resources for
+ *   later use by Linux.
+ *
+ * . We finally reply on a board supplied function, pcibios_fixup_irq(), to 
+ *   to assign the interrupts.  We may use setup-irq.c under drivers/pci
+ *   later.
+ *
+ * . Specifically, we will *NOT* use pci_assign_unassigned_resources(),
+ *   because we assume all PCI devices should have the resources correctly
+ *   assigned and recorded.
+ *
+ * Limitations:
+ *
+ * . We "collapse" all IO and MEM spaces in sub-buses under a top-level bus 
+ *   into a contiguous range.  
+ * 
+ * . In the case of Memory space, the rnage is 1:1 mapping with CPU physical
+ *   address space.
+ *
+ * . In the case of IO space, it starts from 0, and the beginning address
+ *   is mapped to KSEG0ADDR(mips_io_port) in the CPU physical address.
+ *
+ * . These are the current MIPS limitations (by ioremap, etc).  In the
+ *   future, we may remove them.
+ *
+ * Credits:
+ *	Most of the code are derived from the pci routines from PPC and Alpha,
+ *	which were mostly writtne by
+ *		Cort Dougan, cort@fsmlabs.com
+ *		Matt Porter, mporter@mvista.com
+ *		Dave Rusling david.rusling@reo.mts.dec.com
+ *		David Mosberger davidm@cs.arizona.edu
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+
+#include <asm/ddb5xxx/pci.h>
+#include <asm/ddb5xxx/debug.h>
+
+
+struct pci_fixup pcibios_fixups[] = { {0} };
+
+
+extern int pciauto_assign_resources(int busno, struct pci_channel * hose);
+void __init pcibios_init(void)
+{
+	struct pci_channel *p;
+	struct pci_bus *bus;
+	int busno;
+
+	/* assign resources */
+	busno=0;
+	for (p= mips_pci_channels; p->pci_ops != NULL; p++) {
+		busno = pciauto_assign_resources(busno, p) + 1;
+	}
+
+	/* scan the buses */
+	busno = 0;
+	for (p= mips_pci_channels; p->pci_ops != NULL; p++) {
+		bus = pci_scan_bus(busno, p->pci_ops, p);
+		busno = bus->subordinate+1;
+	}
+
+	/* fixup irqs (board specific routines) */
+	pcibios_fixup_irqs();
+
+	/* 
+	 * should we do a fixup of ioport_resource and iomem_resource
+	 * based on mips_pci_channels?  
+	 * Let us wait and see if this is a common need and whether there
+	 * are exceptions.  Until then, each board should adjust them
+	 * perhaps in their setup() function.
+	 */
+}
+
+int pcibios_enable_device(struct pci_dev *dev)
+{
+	/* pciauto_assign_resources() will enable all devices found */
+	return 0;
+}
+
+unsigned long __init
+pci_bridge_check_io(struct pci_dev *bridge)
+{
+        u16 io;
+
+        pci_read_config_word(bridge, PCI_IO_BASE, &io);
+        if (!io) {
+                pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0);
+                pci_read_config_word(bridge, PCI_IO_BASE, &io);
+                pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
+        }
+        if (io)
+                return IORESOURCE_IO;
+        printk(KERN_WARNING "PCI: bridge %s does not support I/O forwarding!\n",
+                                bridge->name);
+        return 0;
+}
+
+void __init pcibios_fixup_bus(struct pci_bus *bus)
+{
+        /* Propogate hose info into the subordinate devices.  */
+
+        struct pci_channel *hose = bus->sysdata;
+        struct pci_dev *dev = bus->self;
+
+        if (!dev) {
+                /* Root bus */
+                bus->resource[0] = hose->io_resource;
+                bus->resource[1] = hose->mem_resource;
+        } else {
+                /* This is a bridge. Do not care how it's initialized,
+                   just link its resources to the bus ones */
+                int i;
+
+                for(i=0; i<3; i++) {
+                        bus->resource[i] =
+                                &dev->resource[PCI_BRIDGE_RESOURCES+i];
+                        bus->resource[i]->name = bus->name;
+                }
+                bus->resource[0]->flags |= pci_bridge_check_io(dev);
+                bus->resource[1]->flags |= IORESOURCE_MEM;
+                /* For now, propogate hose limits to the bus;
+                   we'll adjust them later. */
+                bus->resource[0]->end = hose->io_resource->end;
+                bus->resource[1]->end = hose->mem_resource->end;
+                /* Turn off downstream PF memory address range by default */
+                bus->resource[2]->start = 1024*1024;
+                bus->resource[2]->end = bus->resource[2]->start - 1;
+        }
+}
+
+char *pcibios_setup(char *str)
+{
+	return str;
+}
+
+void
+pcibios_align_resource(void *data, struct resource *res, unsigned long size)
+{
+	/* this should not be called */
+	MIPS_ASSERT(1 == 0);
+}
+
+void
+pcibios_update_resource(struct pci_dev *dev, struct resource *root,
+                             struct resource *res, int resource)
+{
+	/* this should not be called */
+	MIPS_ASSERT(1 == 0);
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/common/pci_auto.c linux/arch/mips/ddb5xxx/common/pci_auto.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/common/pci_auto.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/common/pci_auto.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,396 @@
+/*
+ * arch/ppc/kernel/pci_auto.c
+ * 
+ * PCI autoconfiguration library
+ *
+ * Author: Matt Porter <mporter@mvista.com>
+ *
+ * Copyright 2000, 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/*
+ * Modified for MIPS by Jun Sun, jsun@mvista.com
+ *
+ * . Simplify the interface between pci_auto and the rest: a single function.
+ * . Assign resources from low address to upper address.
+ * . change most int to u32.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+
+#include <asm/ddb5xxx/pci.h>
+#include <asm/ddb5xxx/debug.h>
+
+#define	DEBUG
+#ifdef 	DEBUG
+#define	DBG(x...)	printk(x)
+#else
+#define	DBG(x...)	
+#endif
+
+/* These are used for config access before all the PCI probing
+   has been done. */
+int early_read_config_byte(struct pci_channel *hose, int bus, int dev_fn, int where, u8 *val);
+int early_read_config_word(struct pci_channel *hose, int bus, int dev_fn, int where, u16 *val);
+int early_read_config_dword(struct pci_channel *hose, int bus, int dev_fn, int where, u32 *val);
+int early_write_config_byte(struct pci_channel *hose, int bus, int dev_fn, int where, u8 val);
+int early_write_config_word(struct pci_channel *hose, int bus, int dev_fn, int where, u16 val);
+int early_write_config_dword(struct pci_channel *hose, int bus, int dev_fn, int where, u32 val);
+
+static u32 pciauto_lower_iospc;
+static u32 pciauto_upper_iospc;
+
+static u32 pciauto_lower_memspc;
+static u32 pciauto_upper_memspc;
+
+void __init 
+pciauto_setup_bars(struct pci_channel *hose,
+		   int current_bus,
+		   int pci_devfn)
+{
+	u32 bar_response, bar_size, bar_value;
+	u32 bar, addr_mask, bar_nr = 0;
+	u32 * upper_limit;
+	u32 * lower_limit;
+	int found_mem64 = 0;
+
+	DBG("PCI Autoconfig: Found Bus %d, Device %d, Function %d\n",
+	    current_bus, PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn) );
+
+	for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar+=4)
+	{
+		/* Tickle the BAR and get the response */
+		early_write_config_dword(hose,
+					 current_bus,
+					 pci_devfn,
+					 bar,
+					 0xffffffff);
+		early_read_config_dword(hose,
+					current_bus,
+					pci_devfn,
+					bar,
+					&bar_response);
+
+		/* If BAR is not implemented go to the next BAR */
+		if (!bar_response)
+			continue;
+
+		/* Check the BAR type and set our address mask */
+		if (bar_response & PCI_BASE_ADDRESS_SPACE)
+		{
+			addr_mask = PCI_BASE_ADDRESS_IO_MASK;
+			upper_limit = &pciauto_upper_iospc;
+			lower_limit = &pciauto_lower_iospc;
+			DBG("PCI Autoconfig: BAR %d, I/O, ", bar_nr);
+		}
+		else
+		{
+			if ( (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
+			     PCI_BASE_ADDRESS_MEM_TYPE_64)
+				found_mem64 = 1;
+
+			addr_mask = PCI_BASE_ADDRESS_MEM_MASK;		
+			upper_limit = &pciauto_upper_memspc;
+			lower_limit = &pciauto_lower_memspc;
+			DBG("PCI Autoconfig: BAR %d, Mem, ", bar_nr);
+		}
+
+		/* Calculate requested size */
+		bar_size = ~(bar_response & addr_mask) + 1;
+
+		/* Allocate a base address */
+		bar_value = ((*lower_limit - 1) & ~(bar_size - 1)) + bar_size;
+		MIPS_ASSERT(bar_value + bar_size <= *upper_limit);
+
+		/* Write it out and update our limit */
+		early_write_config_dword(hose,
+					 current_bus,
+					 pci_devfn,
+					 bar,
+					 bar_value);
+
+		*lower_limit = bar_value + bar_size;
+
+		/*
+		 * If we are a 64-bit decoder then increment to the
+		 * upper 32 bits of the bar and force it to locate
+		 * in the lower 4GB of memory.
+		 */ 
+		if (found_mem64)
+		{
+			bar += 4;
+			early_write_config_dword(hose,
+						 current_bus,
+						 pci_devfn,
+						 bar,
+						 0x00000000);
+		}
+
+		bar_nr++;
+
+		DBG("size=0x%x, address=0x%x\n",
+		    bar_size, bar_value);
+	}
+
+}
+
+void __init
+pciauto_prescan_setup_bridge(struct pci_channel *hose,
+			     int current_bus,
+			     int pci_devfn,
+			     int sub_bus)
+{
+	int cmdstat;
+
+	/* Configure bus number registers */
+	early_write_config_byte(hose,
+				current_bus,
+				pci_devfn,
+				PCI_PRIMARY_BUS,
+				current_bus);
+	early_write_config_byte(hose,
+				current_bus,
+				pci_devfn,
+				PCI_SECONDARY_BUS,
+				sub_bus + 1);
+	early_write_config_byte(hose,
+				current_bus,
+				pci_devfn,
+				PCI_SUBORDINATE_BUS,
+				0xff);
+
+	/* Round memory allocator to 1MB boundary */
+	pciauto_upper_memspc &= ~(0x100000 - 1);
+
+	/* Round I/O allocator to 4KB boundary */
+	pciauto_upper_iospc &= ~(0x1000 - 1);
+
+	/* Set up memory and I/O filter limits, assume 32-bit I/O space */
+	early_write_config_word(hose,
+				current_bus,
+				pci_devfn,
+				PCI_MEMORY_LIMIT,
+				((pciauto_upper_memspc - 1) & 0xfff00000) >> 16);
+	early_write_config_byte(hose,
+				current_bus,
+				pci_devfn,
+				PCI_IO_LIMIT,
+				((pciauto_upper_iospc - 1) & 0x0000f000) >> 8);
+	early_write_config_word(hose,
+				current_bus,
+				pci_devfn,
+				PCI_IO_LIMIT_UPPER16,
+				((pciauto_upper_iospc - 1) & 0xffff0000) >> 16);
+			
+	/* We don't support prefetchable memory for now, so disable */
+	early_write_config_word(hose,
+				current_bus,
+				pci_devfn,
+				PCI_PREF_MEMORY_BASE,
+				0x1000);
+	early_write_config_word(hose,
+				current_bus,
+				pci_devfn,
+				PCI_PREF_MEMORY_LIMIT,
+				0x1000);
+
+	/* Enable memory and I/O accesses, enable bus master */
+	early_read_config_dword(hose,
+				current_bus,
+				pci_devfn,
+				PCI_COMMAND,
+				&cmdstat);
+	early_write_config_dword(hose,
+				 current_bus,
+				 pci_devfn,
+				 PCI_COMMAND,
+				 cmdstat |
+				 PCI_COMMAND_IO |
+				 PCI_COMMAND_MEMORY |
+				 PCI_COMMAND_MASTER);
+}
+
+void __init
+pciauto_postscan_setup_bridge(struct pci_channel *hose,
+			      int current_bus,
+			      int pci_devfn,
+			      int sub_bus)
+{
+	/* Configure bus number registers */
+	early_write_config_byte(hose,
+				current_bus,
+				pci_devfn,
+				PCI_SUBORDINATE_BUS,
+				sub_bus);
+
+	/* Round memory allocator to 1MB boundary */
+	pciauto_upper_memspc &= ~(0x100000 - 1);
+	early_write_config_word(hose,
+				current_bus,
+				pci_devfn,
+				PCI_MEMORY_BASE,
+				pciauto_upper_memspc >> 16);
+
+	/* Round I/O allocator to 4KB boundary */
+	pciauto_upper_iospc &= ~(0x1000 - 1);
+	early_write_config_byte(hose,
+				current_bus,
+				pci_devfn,
+				PCI_IO_BASE,
+				(pciauto_upper_iospc & 0x0000f000) >> 8);
+	early_write_config_word(hose,
+				current_bus,
+				pci_devfn,
+				PCI_IO_BASE_UPPER16,
+				pciauto_upper_iospc >> 16);
+}
+
+#define      PCIAUTO_IDE_MODE_MASK           0x05
+
+int __init
+pciauto_bus_scan(struct pci_channel *hose, int current_bus)
+{
+	int sub_bus;
+	u32 pci_devfn, pci_class, cmdstat, found_multi=0;
+	unsigned short vid;
+	unsigned char header_type;
+
+	sub_bus = current_bus;
+	
+	for (pci_devfn=0; pci_devfn<0xff; pci_devfn++) {
+
+		if (PCI_FUNC(pci_devfn) && !found_multi)
+			continue;
+
+		early_read_config_byte(hose,
+				       current_bus,
+				       pci_devfn,
+				       PCI_HEADER_TYPE,
+				       &header_type);
+
+		if (!PCI_FUNC(pci_devfn))
+			found_multi = header_type & 0x80;
+
+		early_read_config_word(hose,
+				       current_bus,
+				       pci_devfn,
+				       PCI_VENDOR_ID,
+				       &vid);
+
+		if (vid == 0xffff) continue;
+
+		early_read_config_dword(hose,
+					current_bus,
+					pci_devfn,
+					PCI_CLASS_REVISION, &pci_class);
+		if ( (pci_class >> 16) == PCI_CLASS_BRIDGE_PCI ) {
+			DBG("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_SLOT(pci_devfn));
+			pciauto_prescan_setup_bridge(hose,
+						     current_bus,
+						     pci_devfn,
+						     sub_bus);
+			sub_bus = pciauto_bus_scan(hose, sub_bus+1);
+			pciauto_postscan_setup_bridge(hose,
+						      current_bus,
+						      pci_devfn,
+						      sub_bus);
+
+		} else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) {
+
+			unsigned char prg_iface;
+
+			early_read_config_byte(hose,
+					       current_bus,
+					       pci_devfn,
+					       PCI_CLASS_PROG,
+					       &prg_iface);
+			if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
+				DBG("PCI Autoconfig: Skipping legacy mode IDE controller\n");
+				continue;
+			}
+		}
+
+		/*
+		 * Found a peripheral, enable some standard
+		 * settings
+		 */
+		early_read_config_dword(hose,
+					current_bus,
+					pci_devfn,
+					PCI_COMMAND,
+					&cmdstat);
+		early_write_config_dword(hose,
+					 current_bus,
+					 pci_devfn,
+					 PCI_COMMAND,
+					 cmdstat |
+					 PCI_COMMAND_IO |
+					 PCI_COMMAND_MEMORY |
+					 PCI_COMMAND_MASTER);
+		early_write_config_byte(hose,
+					current_bus,
+					pci_devfn,
+					PCI_LATENCY_TIMER,
+					0x80);
+
+                /* Allocate PCI I/O and/or memory space */
+		pciauto_setup_bars(hose,
+				   current_bus,
+				   pci_devfn);
+	}
+	return sub_bus;
+}
+
+int __init
+pciauto_assign_resources(int busno, struct pci_channel *hose)
+{
+	/* setup resource limits */
+	pciauto_lower_iospc = hose->io_resource->start;
+	pciauto_upper_iospc = hose->io_resource->end + 1;
+	pciauto_lower_memspc = hose->mem_resource->start;
+	pciauto_upper_memspc = hose->mem_resource->end + 1;
+
+	return pciauto_bus_scan(hose, busno);
+}
+
+
+/*
+ * These functions are used early on before PCI scanning is done
+ * and all of the pci_dev and pci_bus structures have been created.
+ */
+static struct pci_dev *
+fake_pci_dev(struct pci_channel *hose, int busnr, int devfn)
+{
+        static struct pci_dev dev;
+        static struct pci_bus bus;
+
+        dev.bus = &bus;
+        dev.sysdata = hose;
+        dev.devfn = devfn;
+        bus.number = busnr;
+        bus.ops = hose->pci_ops;
+        return &dev;
+}
+
+#define EARLY_PCI_OP(rw, size, type)                                    \
+int early_##rw##_config_##size(struct pci_channel *hose, int bus,    \
+                               int devfn, int offset, type value)       \
+{                                                                       \
+        return pci_##rw##_config_##size(fake_pci_dev(hose, bus, devfn), \
+                                        offset, value);                 \
+}
+
+EARLY_PCI_OP(read, byte, u8 *)
+EARLY_PCI_OP(read, word, u16 *)
+EARLY_PCI_OP(read, dword, u32 *)
+EARLY_PCI_OP(write, byte, u8)
+EARLY_PCI_OP(write, word, u16)
+EARLY_PCI_OP(write, dword, u32)
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/common/prom.c linux/arch/mips/ddb5xxx/common/prom.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/common/prom.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/common/prom.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,58 @@
+/***********************************************************************
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/common/prom.c
+ *     prom.c file.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ ***********************************************************************
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+char arcs_cmdline[COMMAND_LINE_SIZE];
+
+/* [jsun@junsun.net] PMON passes arguments in C main() style */
+void __init prom_init(int argc, const char **arg)
+{
+	int i;
+
+	/* arg[0] is "g", the rest is boot parameters */
+	arcs_cmdline[0] = '\0';
+	for (i = 1; i < argc; i++) {
+		if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
+		    >= sizeof(arcs_cmdline))
+			break;
+		strcat(arcs_cmdline, arg[i]);
+		strcat(arcs_cmdline, " ");
+	}
+
+	mips_machgroup = MACH_GROUP_NEC_DDB;
+
+#if defined(CONFIG_DDB5074)
+	mips_machtype = MACH_NEC_DDB5074;
+#elif defined(CONFIG_DDB5476)
+	mips_machtype = MACH_NEC_DDB5476;
+#elif defined(CONFIG_DDB5477)
+	mips_machtype = MACH_NEC_DDB5477;
+#endif
+
+	add_memory_region(0, DDB_SDRAM_SIZE, BOOT_MEM_RAM);
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/common/rtc_ds1386.c linux/arch/mips/ddb5xxx/common/rtc_ds1386.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/common/rtc_ds1386.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/common/rtc_ds1386.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,167 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/common/rtc_ds1386.c
+ *     low-level RTC hookups for s for Dallas 1396 chip.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+
+/*
+ * This file exports a function, rtc_ds1386_init(), which expects an
+ * uncached base address as the argument.  It will set the two function
+ * pointers expected by the MIPS generic timer code.
+ */
+
+#include <linux/types.h>
+#include <linux/time.h>
+
+#include <asm/time.h>
+#include <asm/addrspace.h>
+
+#include <asm/ddb5xxx/debug.h>
+
+#define	EPOCH		2000
+
+#undef BCD_TO_BIN
+#define BCD_TO_BIN(val) (((val)&15) + ((val)>>4)*10)
+
+#undef BIN_TO_BCD
+#define BIN_TO_BCD(val) ((((val)/10)<<4) + (val)%10)
+
+#define	READ_RTC(x)	*(volatile unsigned char*)(rtc_base+x)
+#define	WRITE_RTC(x, y)	*(volatile unsigned char*)(rtc_base+x) = y
+
+static unsigned long rtc_base;
+
+static unsigned long
+rtc_ds1386_get_time(void)
+{	
+	u8 byte;
+	u8 temp;
+	unsigned int year, month, day, hour, minute, second;
+
+	/* let us freeze external registers */
+	byte = READ_RTC(0xB);
+	byte &= 0x3f;
+	WRITE_RTC(0xB, byte);
+
+	/* read time data */
+	year = BCD_TO_BIN(READ_RTC(0xA)) + EPOCH;
+	month = BCD_TO_BIN(READ_RTC(0x9) & 0x1f);
+	day = BCD_TO_BIN(READ_RTC(0x8));
+	minute = BCD_TO_BIN(READ_RTC(0x2));
+	second = BCD_TO_BIN(READ_RTC(0x1));
+
+	/* hour is special - deal with it later */
+	temp = READ_RTC(0x4);
+
+	/* enable time transfer */
+	byte |= 0x80;
+	WRITE_RTC(0xB, byte);
+
+	/* calc hour */
+	if (temp & 0x40) {
+		/* 12 hour format */
+		hour = BCD_TO_BIN(temp & 0x1f);
+		if (temp & 0x20) hour += 12; 		/* PM */
+	} else {
+		/* 24 hour format */
+		hour = BCD_TO_BIN(temp & 0x3f);
+	}
+
+	return mktime(year, month, day, hour, minute, second);
+}
+
+static int 
+rtc_ds1386_set_time(unsigned long t)
+{
+	struct rtc_time tm;
+	u8 byte;
+	u8 temp;
+	u8 year, month, day, hour, minute, second;
+
+	/* let us freeze external registers */
+	byte = READ_RTC(0xB);
+	byte &= 0x3f;
+	WRITE_RTC(0xB, byte);
+
+	/* convert */
+	to_tm(t, &tm);
+
+	/* check each field one by one */
+	year = BIN_TO_BCD(tm.tm_year - EPOCH);
+	if (year != READ_RTC(0xA)) {
+		WRITE_RTC(0xA, year);
+	}
+
+	temp = READ_RTC(0x9);
+	month = BIN_TO_BCD(tm.tm_mon);
+	if (month != (temp & 0x1f)) {
+		WRITE_RTC( 0x9,
+			   (month & 0x1f) | (temp & ~0x1f) );
+	}
+
+	day = BIN_TO_BCD(tm.tm_mday);
+	if (day != READ_RTC(0x8)) {
+		WRITE_RTC(0x8, day);
+	}
+
+	temp = READ_RTC(0x4);
+	if (temp & 0x40) {
+		/* 12 hour format */
+		hour = 0x40;
+		if (tm.tm_hour > 12) {
+			hour |= 0x20 | (BIN_TO_BCD(hour-12) & 0x1f);
+		} else {
+			hour |= BIN_TO_BCD(tm.tm_hour);
+		}
+	} else {
+		/* 24 hour format */
+		hour = BIN_TO_BCD(tm.tm_hour) & 0x3f;
+	}
+	if (hour != temp) WRITE_RTC(0x4, hour);
+
+	minute = BIN_TO_BCD(tm.tm_min);
+	if (minute != READ_RTC(0x2)) {
+		WRITE_RTC(0x2, minute);
+	}
+
+	second = BIN_TO_BCD(tm.tm_sec);
+	if (second != READ_RTC(0x1)) {
+		WRITE_RTC(0x1, second);
+	}
+	
+	return 0;
+}
+
+void
+rtc_ds1386_init(unsigned long base)
+{
+	unsigned char byte;
+	
+	/* remember the base */
+	rtc_base = base;
+	MIPS_ASSERT((rtc_base & 0xe0000000) == KSEG1);
+
+	/* turn on RTC if it is not on */
+	byte = READ_RTC(0x9);
+	if (byte & 0x80) {
+		byte &= 0x7f;
+		WRITE_RTC(0x9, byte);
+	}
+
+	/* enable time transfer */
+	byte = READ_RTC(0xB);
+	byte |= 0x80;
+	WRITE_RTC(0xB, byte);
+
+	/* set the function pointers */
+	rtc_get_time = rtc_ds1386_get_time;
+	rtc_set_time = rtc_ds1386_set_time;
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/Makefile linux/arch/mips/ddb5xxx/ddb5477/Makefile
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,22 @@
+#
+# Makefile for NEC DDB-Vrc5477 board
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+O_TARGET:= ddb5477.o
+
+obj-y	 += int-handler.o irq.o irq_5477.o setup.o pci.o pci_ops.o
+
+obj-$(CONFIG_LL_DEBUG) 		+= debug.o
+obj-$(CONFIG_REMOTE_DEBUG)	+= kgdb_io.o
+obj-$(CONFIG_BLK_DEV_INITRD)	+= ramdisk.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/debug.c linux/arch/mips/ddb5xxx/ddb5477/debug.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/debug.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/debug.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,162 @@
+/***********************************************************************
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/ddb5477/debug.c
+ *     vrc5477 specific debug routines.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ ***********************************************************************
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/signal.h>		/* SA_INTERRUPT */
+
+#include <asm/mipsregs.h>
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+typedef struct {
+       const char *regname;
+       unsigned regaddr;
+} Register;
+
+void jsun_show_regs(char *name, Register *regs)
+{
+	int i;
+
+	printk("\nshow regs: %s\n", name);
+	for(i=0;regs[i].regname!= NULL; i++) {
+		printk("%-16s= %08x\t\t(@%08x)\n", 
+		       regs[i].regname, 
+		       *(unsigned *)(regs[i].regaddr), 
+		       regs[i].regaddr);
+	}
+}
+
+static Register int_regs[] = {
+	{"DDB_INTCTRL0", DDB_BASE + DDB_INTCTRL0},
+	{"DDB_INTCTRL1", DDB_BASE + DDB_INTCTRL1},
+	{"DDB_INTCTRL2", DDB_BASE + DDB_INTCTRL2},
+	{"DDB_INTCTRL3", DDB_BASE + DDB_INTCTRL3},
+	{"DDB_INT0STAT", DDB_BASE + DDB_INT0STAT},
+	{"DDB_INT1STAT", DDB_BASE + DDB_INT1STAT},
+	{"DDB_INT2STAT", DDB_BASE + DDB_INT2STAT},
+	{"DDB_INT3STAT", DDB_BASE + DDB_INT3STAT},
+	{"DDB_INT4STAT", DDB_BASE + DDB_INT4STAT},
+	{"DDB_NMISTAT", DDB_BASE + DDB_NMISTAT},
+	{"DDB_INTPPES0", DDB_BASE + DDB_INTPPES0},
+	{"DDB_INTPPES1", DDB_BASE + DDB_INTPPES1},
+	{NULL, 0x0}
+};
+
+void vrc5477_show_int_regs()
+{
+	jsun_show_regs("interrupt registers", int_regs);
+	printk("CPU CAUSE = %08x\n", read_32bit_cp0_register(CP0_CAUSE));
+	printk("CPU STATUS = %08x\n", read_32bit_cp0_register(CP0_STATUS));
+}
+static Register pdar_regs[] = {
+        {"DDB_SDRAM0", DDB_BASE + DDB_SDRAM0},
+        {"DDB_SDRAM1", DDB_BASE + DDB_SDRAM1},
+        {"DDB_LDCS0", DDB_BASE + DDB_LDCS0},
+        {"DDB_LDCS1", DDB_BASE + DDB_LDCS1},
+        {"DDB_LDCS2", DDB_BASE + DDB_LDCS2},
+        {"DDB_INTCS", DDB_BASE + DDB_INTCS},
+        {"DDB_BOOTCS", DDB_BASE + DDB_BOOTCS},
+        {"DDB_PCIW0", DDB_BASE + DDB_PCIW0},
+        {"DDB_PCIW1", DDB_BASE + DDB_PCIW1},
+        {"DDB_IOPCIW0", DDB_BASE + DDB_IOPCIW0},
+        {"DDB_IOPCIW1", DDB_BASE + DDB_IOPCIW1},
+        {NULL, 0x0}
+};
+void vrc5477_show_pdar_regs(void)
+{
+        jsun_show_regs("PDAR regs", pdar_regs);
+}
+
+static Register bar_regs[] = {
+        {"DDB_BARC0", DDB_BASE + DDB_BARC0},
+        {"DDB_BARM010", DDB_BASE + DDB_BARM010},
+        {"DDB_BARM230", DDB_BASE + DDB_BARM230},
+        {"DDB_BAR00", DDB_BASE + DDB_BAR00},
+        {"DDB_BAR10", DDB_BASE + DDB_BAR10},
+        {"DDB_BAR20", DDB_BASE + DDB_BAR20},
+        {"DDB_BAR30", DDB_BASE + DDB_BAR30},
+        {"DDB_BAR40", DDB_BASE + DDB_BAR40},
+        {"DDB_BAR50", DDB_BASE + DDB_BAR50},
+        {"DDB_BARB0", DDB_BASE + DDB_BARB0},
+        {"DDB_BARC1", DDB_BASE + DDB_BARC1},
+        {"DDB_BARM011", DDB_BASE + DDB_BARM011},
+        {"DDB_BARM231", DDB_BASE + DDB_BARM231},
+        {"DDB_BAR01", DDB_BASE + DDB_BAR01},
+        {"DDB_BAR11", DDB_BASE + DDB_BAR11},
+        {"DDB_BAR21", DDB_BASE + DDB_BAR21},
+        {"DDB_BAR31", DDB_BASE + DDB_BAR31},
+        {"DDB_BAR41", DDB_BASE + DDB_BAR41},
+        {"DDB_BAR51", DDB_BASE + DDB_BAR51},
+        {"DDB_BARB1", DDB_BASE + DDB_BARB1},
+        {NULL, 0x0}
+};
+void vrc5477_show_bar_regs(void)
+{
+        jsun_show_regs("BAR regs", bar_regs);
+}
+
+static Register pci_regs[] = {
+        {"DDB_PCIW0", DDB_BASE + DDB_PCIW0},
+        {"DDB_PCIW1", DDB_BASE + DDB_PCIW1},
+        {"DDB_PCIINIT00", DDB_BASE + DDB_PCIINIT00},
+        {"DDB_PCIINIT10", DDB_BASE + DDB_PCIINIT10},
+        {"DDB_PCICTL0_L", DDB_BASE + DDB_PCICTL0_L},
+        {"DDB_PCICTL0_H", DDB_BASE + DDB_PCICTL0_H},
+        {"DDB_PCIARB0_L", DDB_BASE + DDB_PCIARB0_L},
+        {"DDB_PCIARB0_H", DDB_BASE + DDB_PCIARB0_H},
+        {"DDB_PCISWP0", DDB_BASE + DDB_PCISWP0},
+        {"DDB_PCIERR0", DDB_BASE + DDB_PCIERR0},
+        {"DDB_IOPCIW0", DDB_BASE + DDB_IOPCIW0},
+        {"DDB_IOPCIW1", DDB_BASE + DDB_IOPCIW1},
+        {"DDB_PCIINIT01", DDB_BASE + DDB_PCIINIT01},
+        {"DDB_PCIINIT11", DDB_BASE + DDB_PCIINIT11},
+        {"DDB_PCICTL1_L", DDB_BASE + DDB_PCICTL1_L},
+        {"DDB_PCICTL1_H", DDB_BASE + DDB_PCICTL1_H},
+        {"DDB_PCIARB1_L", DDB_BASE + DDB_PCIARB1_L},
+        {"DDB_PCIARB1_H", DDB_BASE + DDB_PCIARB1_H},
+        {"DDB_PCISWP1", DDB_BASE + DDB_PCISWP1},
+        {"DDB_PCIERR1", DDB_BASE + DDB_PCIERR1},
+        {NULL, 0x0}
+};
+void vrc5477_show_pci_regs(void)
+{
+        jsun_show_regs("PCI regs", pci_regs);
+}
+
+static Register lb_regs[] = {
+        {"DDB_LCNFG", DDB_BASE + DDB_LCNFG},
+        {"DDB_LCST0", DDB_BASE + DDB_LCST0},
+        {"DDB_LCST1", DDB_BASE + DDB_LCST1},
+        {"DDB_LCST2", DDB_BASE + DDB_LCST2},
+        {"DDB_ERRADR", DDB_BASE + DDB_ERRADR},
+        {"DDB_ERRCS", DDB_BASE + DDB_ERRCS},
+        {"DDB_BTM", DDB_BASE + DDB_BTM},
+        {"DDB_BCST", DDB_BASE + DDB_BCST},
+        {NULL, 0x0}
+};
+void vrc5477_show_lb_regs(void)
+{
+        jsun_show_regs("Local Bus regs", lb_regs);
+}
+
+void vrc5477_show_all_regs(void)
+{
+	vrc5477_show_pdar_regs();
+	vrc5477_show_pci_regs();
+	vrc5477_show_bar_regs();
+	vrc5477_show_int_regs();
+	vrc5477_show_lb_regs();
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/int-handler.S linux/arch/mips/ddb5xxx/ddb5477/int-handler.S
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/int-handler.S	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/int-handler.S	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,76 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * First-level interrupt dispatcher for ddb5477
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/config.h>
+
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+/*
+ * first level interrupt dispatcher for ocelot board -
+ * We check for the timer first, then check PCI ints A and D.
+ * Then check for serial IRQ and fall through.
+ */
+	.align	5
+	NESTED(ddb5477_handle_int, PT_SIZE, sp)
+	SAVE_ALL
+	CLI
+	.set	at
+	.set	noreorder
+	mfc0	t0, CP0_CAUSE  
+	mfc0	t2, CP0_STATUS
+
+	and	t0, t2
+       
+	andi	t1, t0, STATUSF_IP7	/* cpu timer */
+	bnez	t1, ll_cputimer_irq
+	andi	t1, t0, (STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6 ) 
+	bnez	t1, ll_vrc5477_irq
+	andi	t1, t0, STATUSF_IP0	/* software int 0 */
+	bnez	t1, ll_cpu_ip0
+	andi	t1, t0, STATUSF_IP1	/* software int 1 */
+	bnez	t1, ll_cpu_ip1
+	nop
+	.set	reorder
+
+	/* wrong alarm or masked ... */
+	j	spurious_interrupt
+	nop
+	END(ddb5477_handle_int)
+
+	.align	5
+
+ll_vrc5477_irq:	
+	move	a0, sp
+	jal	vrc5477_irq_dispatch
+	j	ret_from_irq
+
+ll_cputimer_irq:
+	li	a0, 7
+	move	a1, sp
+	jal	do_IRQ
+	j	ret_from_irq
+
+
+ll_cpu_ip0:	
+	li	a0, 0
+	move	a1, sp
+	jal	do_IRQ
+	j	ret_from_irq
+
+ll_cpu_ip1:	
+	li	a0, 1
+	move	a1, sp
+	jal	do_IRQ
+	j	ret_from_irq
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/irq.c linux/arch/mips/ddb5xxx/ddb5477/irq.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/irq.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,163 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ *  arch/mips/ddb5xxx/ddb5477/irq.c
+ *     The irq setup and misc routines for DDB5476.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+
+#include <asm/system.h>
+#include <asm/mipsregs.h>
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+/* [jsun] sooner or later we should move this debug stuff to MIPS common */
+#include <asm/ddb5xxx/debug.h>
+
+/*
+ * IRQ mapping
+ *
+ *  0-7: 8 CPU interrupts
+ *	0 -	software interrupt 0
+ *	1 - 	software interrupt 1
+ *	2 - 	most Vrc5477 interrupts are routed to this pin
+ *	3 - 	(optional) some other interrupts routed to this pin for debugg
+ *	4 - 	not used
+ *	5 - 	not used
+ *	6 - 	not used
+ *	7 - 	cpu timer (used by default)
+ *
+ *  8-39: 32 Vrc5477 interrupt sources
+ *	(refer to the Vrc5477 manual)	
+ */
+
+#define	PCI0			DDB_INTPPES0
+#define	PCI1			DDB_INTPPES1
+
+#define	ACTIVE_LOW		1
+#define	ACTIVE_HIGH		0
+
+#define	LEVEL_SENSE		2
+#define	EDGE_TRIGGER		0
+
+#define	INTA			0
+#define	INTB			1
+#define	INTC			2
+#define	INTD			3
+#define	INTE			4
+
+static inline void 
+set_pci_int_attr(u32 pci, u32 intn, u32 active, u32 trigger)
+{
+	u32 reg_value;
+	u32 reg_bitmask;
+
+	reg_value = ddb_in32(pci);
+	reg_bitmask = 0x3 << (intn * 2);
+	
+	reg_value &= ~reg_bitmask;
+	reg_value |= (active | trigger) << (intn * 2);
+	ddb_out32(pci, reg_value);
+}
+
+extern void vrc5477_irq_init(u32 base);
+extern void mips_cpu_irq_init(u32 base);
+extern asmlinkage void ddb5477_handle_int(void);
+
+void
+ddb5477_irq_setup(void)
+{
+	MIPS_DEBUG(printk("ddb5477_irq_setup invoked.\n"));
+
+	/* by default, we disable all interrupts and route all vrc5477 
+	 * interrupts to pin 0 (irq 2) */
+	ddb_out32(DDB_INTCTRL0, 0);
+	ddb_out32(DDB_INTCTRL1, 0);
+	ddb_out32(DDB_INTCTRL2, 0);
+	ddb_out32(DDB_INTCTRL3, 0);
+
+	clear_cp0_status(0xff00);
+	set_cp0_status(0x0400);
+
+	/* setup PCI interrupt attributes */
+	set_pci_int_attr(PCI0, INTA, ACTIVE_LOW, LEVEL_SENSE);
+	set_pci_int_attr(PCI0, INTB, ACTIVE_LOW, LEVEL_SENSE);
+	set_pci_int_attr(PCI0, INTC, ACTIVE_LOW, LEVEL_SENSE);
+	set_pci_int_attr(PCI0, INTD, ACTIVE_LOW, LEVEL_SENSE);
+	set_pci_int_attr(PCI0, INTE, ACTIVE_LOW, LEVEL_SENSE);
+
+	set_pci_int_attr(PCI1, INTA, ACTIVE_LOW, LEVEL_SENSE);
+	set_pci_int_attr(PCI1, INTB, ACTIVE_LOW, LEVEL_SENSE);
+	set_pci_int_attr(PCI1, INTC, ACTIVE_LOW, LEVEL_SENSE);
+	set_pci_int_attr(PCI1, INTD, ACTIVE_LOW, LEVEL_SENSE);
+	set_pci_int_attr(PCI1, INTE, ACTIVE_LOW, LEVEL_SENSE);
+
+	/* 
+	 * for debugging purpose, we enable several error interrupts
+	 * and route them to pin 1. (IP3) 
+	 */
+	/* cpu parity check - 0 */
+	ll_vrc5477_irq_route(0, 1); ll_vrc5477_irq_enable(0);
+	/* cpu no-target decode - 1 */
+	ll_vrc5477_irq_route(1, 1); ll_vrc5477_irq_enable(1);
+	/* local bus read time-out - 7 */
+	ll_vrc5477_irq_route(7, 1); ll_vrc5477_irq_enable(7);
+	/* PCI SERR# - 14 */
+	ll_vrc5477_irq_route(14, 1); ll_vrc5477_irq_enable(14);
+	/* PCI internal error - 15 */
+	ll_vrc5477_irq_route(15, 1); ll_vrc5477_irq_enable(15);
+	/* IOPCI SERR# - 30 */
+	ll_vrc5477_irq_route(30, 1); ll_vrc5477_irq_enable(30);
+	/* IOPCI internal error - 31 */
+	ll_vrc5477_irq_route(31, 1); ll_vrc5477_irq_enable(31);
+
+	/* init all controllers */
+	mips_cpu_irq_init(0);
+	vrc5477_irq_init(8);
+
+	/* hook up the first-level interrupt handler */
+	set_except_vector(0, ddb5477_handle_int);
+}
+
+/*
+ * the first level int-handler will jump here if it is a vrc5477 irq
+ */
+#define	NUM_5477_IRQS	32
+asmlinkage void
+vrc5477_irq_dispatch(struct pt_regs *regs)
+{
+	extern unsigned int do_IRQ(int irq, struct pt_regs *regs);
+
+	u32 intStatus;
+	u32 bitmask;
+	u32 i;
+
+	MIPS_ASSERT(ddb_in32(DDB_INT2STAT) == 0);
+	MIPS_ASSERT(ddb_in32(DDB_INT3STAT) == 0);
+	MIPS_ASSERT(ddb_in32(DDB_INT4STAT) == 0);
+	MIPS_ASSERT(ddb_in32(DDB_NMISTAT) == 0);
+
+	if (ddb_in32(DDB_INT1STAT) != 0) {
+#if defined(CONFIG_LL_DEBUG)
+		vrc5477_show_int_regs();
+#endif
+		panic("error interrupt has happened.\n");
+	}
+
+	intStatus = ddb_in32(DDB_INT0STAT);
+	for (i=0, bitmask=1; i<= NUM_5477_IRQS; bitmask <<=1, i++) {
+		/* do we need to "and" with the int mask? */
+		if (intStatus & bitmask) {
+			do_IRQ(8 + i, regs);
+		}
+	}
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/irq_5477.c linux/arch/mips/ddb5xxx/ddb5477/irq_5477.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/irq_5477.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/irq_5477.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,179 @@
+/***********************************************************************
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ *  arch/mips/ddb5xxx/ddb5477/irq_5477.c
+ *     This file defines the irq handler for Vrc5477.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ ***********************************************************************
+ */
+
+/*
+ * Vrc5477 defines 32 IRQs.
+ *
+ * This file exports one function:
+ *	vrc5477_irq_init(u32 irq_base);
+ */
+
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+/* [jsun] sooner or later we should move this debug stuff to MIPS common */
+#include <asm/ddb5xxx/debug.h>
+
+/* number of total irqs supported by Vrc5477 */
+#define	NUM_5477_IRQ		32
+
+static int vrc5477_irq_base=-1;
+
+
+static void 
+vrc5477_irq_enable(unsigned int irq)
+{
+	MIPS_ASSERT(vrc5477_irq_base != -1);
+	MIPS_ASSERT(irq >= vrc5477_irq_base);
+	MIPS_ASSERT(irq < vrc5477_irq_base+ NUM_5477_IRQ);
+
+	ll_vrc5477_irq_enable(irq - vrc5477_irq_base);
+}
+
+static void 
+vrc5477_irq_disable(unsigned int irq)
+{
+	MIPS_ASSERT(vrc5477_irq_base != -1);
+	MIPS_ASSERT(irq >= vrc5477_irq_base);
+	MIPS_ASSERT(irq < vrc5477_irq_base + NUM_5477_IRQ);
+
+	ll_vrc5477_irq_disable(irq - vrc5477_irq_base);
+}
+
+static unsigned int vrc5477_irq_startup(unsigned int irq)
+{
+	vrc5477_irq_enable(irq);
+	return 0;
+}
+
+#define	vrc5477_irq_shutdown	vrc5477_irq_disable
+
+static void
+vrc5477_irq_ack(unsigned int irq)
+{
+	MIPS_ASSERT(vrc5477_irq_base != -1);
+	MIPS_ASSERT(irq >= vrc5477_irq_base);
+	MIPS_ASSERT(irq < vrc5477_irq_base+ NUM_5477_IRQ);
+
+	/* clear the interrupt bit */
+	/* some irqs require the driver to clear the sources */
+	ddb_out32(DDB_INTCLR32, 1 << (irq - vrc5477_irq_base));
+
+	/* disable interrupt - some handler will re-enable the irq
+	 * and if the interrupt is leveled, we will have infinite loop
+	 */
+	ll_vrc5477_irq_disable(irq - vrc5477_irq_base);
+}
+
+static void
+vrc5477_irq_end(unsigned int irq)
+{
+	MIPS_ASSERT(vrc5477_irq_base != -1);
+	MIPS_ASSERT(irq >= vrc5477_irq_base);
+	MIPS_ASSERT(irq < vrc5477_irq_base + NUM_5477_IRQ);
+
+	ll_vrc5477_irq_enable( irq - vrc5477_irq_base);
+}
+
+hw_irq_controller vrc5477_irq_controller = {
+	"vrc5477_irq",
+	vrc5477_irq_startup,
+	vrc5477_irq_shutdown,
+	vrc5477_irq_enable,
+	vrc5477_irq_disable,
+	vrc5477_irq_ack,
+	vrc5477_irq_end,
+	NULL			/* no affinity stuff for UP */
+};
+
+void 
+vrc5477_irq_init(u32 irq_base)
+{
+	extern irq_desc_t irq_desc[];
+	u32 i;
+
+	for (i= irq_base; i< irq_base+ NUM_5477_IRQ; i++) {
+		irq_desc[i].status = IRQ_DISABLED;
+		irq_desc[i].action = NULL;
+		irq_desc[i].depth = 1;
+		irq_desc[i].handler = &vrc5477_irq_controller;
+	}
+	
+	vrc5477_irq_base = irq_base;
+}
+
+
+int vrc5477_irq_to_irq(int irq)
+{
+	MIPS_ASSERT(irq >= 0);
+	MIPS_ASSERT(irq < NUM_5477_IRQ);
+
+	return irq + vrc5477_irq_base;
+}
+
+void ll_vrc5477_irq_route(int vrc5477_irq, int ip)
+{
+	u32 reg_value;
+	u32 reg_bitmask;
+	u32 reg_index;
+
+	MIPS_ASSERT(vrc5477_irq >= 0);
+	MIPS_ASSERT(vrc5477_irq < NUM_5477_IRQ);
+	MIPS_ASSERT(ip >= 0);
+	MIPS_ASSERT((ip < 5) || (ip == 6));
+
+	reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
+	reg_value = ddb_in32(reg_index);
+	reg_bitmask = 7 << (vrc5477_irq % 8 * 4);
+	reg_value &= ~reg_bitmask;
+	reg_value |= ip << (vrc5477_irq % 8 * 4);
+	ddb_out32(reg_index, reg_value);
+}
+
+void ll_vrc5477_irq_enable(int vrc5477_irq)
+{
+	u32 reg_value;
+	u32 reg_bitmask;
+	u32 reg_index;
+
+	MIPS_ASSERT(vrc5477_irq >= 0);
+	MIPS_ASSERT(vrc5477_irq < NUM_5477_IRQ);
+
+	reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
+	reg_value = ddb_in32(reg_index);
+	reg_bitmask = 8 << (vrc5477_irq % 8 * 4);
+	MIPS_ASSERT((reg_value & reg_bitmask) == 0);
+	ddb_out32(reg_index, reg_value | reg_bitmask);
+}
+
+void ll_vrc5477_irq_disable(int vrc5477_irq)
+{
+	u32 reg_value;
+	u32 reg_bitmask;
+	u32 reg_index;
+
+	MIPS_ASSERT(vrc5477_irq >= 0);
+	MIPS_ASSERT(vrc5477_irq < NUM_5477_IRQ);
+
+	reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
+	reg_value = ddb_in32(reg_index);
+	reg_bitmask = 8 << (vrc5477_irq % 8 * 4);
+
+	/* we assert that the interrupt is enabled (perhaps over-zealous) */
+	MIPS_ASSERT( (reg_value & reg_bitmask) != 0);
+	ddb_out32(reg_index, reg_value & ~reg_bitmask);
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/kgdb_io.c linux/arch/mips/ddb5xxx/ddb5477/kgdb_io.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/kgdb_io.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/kgdb_io.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,142 @@
+
+#include <linux/config.h>
+
+#if (defined(CONFIG_DDB5477) && defined(CONFIG_REMOTE_DEBUG))
+
+/* --- CONFIG --- */
+
+/* we need uint32 uint8 */
+/* #include "types.h" */
+typedef unsigned char uint8;
+typedef unsigned int uint32;
+
+/* --- END OF CONFIG --- */
+
+#define         UART16550_BAUD_2400             2400
+#define         UART16550_BAUD_4800             4800
+#define         UART16550_BAUD_9600             9600
+#define         UART16550_BAUD_19200            19200
+#define         UART16550_BAUD_38400            38400
+#define         UART16550_BAUD_57600            57600
+#define         UART16550_BAUD_115200           115200
+
+#define         UART16550_PARITY_NONE           0
+#define         UART16550_PARITY_ODD            0x08
+#define         UART16550_PARITY_EVEN           0x18
+#define         UART16550_PARITY_MARK           0x28
+#define         UART16550_PARITY_SPACE          0x38
+
+#define         UART16550_DATA_5BIT             0x0
+#define         UART16550_DATA_6BIT             0x1
+#define         UART16550_DATA_7BIT             0x2
+#define         UART16550_DATA_8BIT             0x3
+
+#define         UART16550_STOP_1BIT             0x0
+#define         UART16550_STOP_2BIT             0x4
+
+/* ----------------------------------------------------- */
+
+/* === CONFIG === */
+
+/* [jsun] we use the second serial port for kdb */
+#define         BASE                    0xbfa04240
+#define         MAX_BAUD                115200
+#define		REG_OFFSET		8
+
+/* === END OF CONFIG === */
+
+/* register offset */
+#define         OFS_RCV_BUFFER          (0*REG_OFFSET)
+#define         OFS_TRANS_HOLD          (0*REG_OFFSET)
+#define         OFS_SEND_BUFFER         (0*REG_OFFSET)
+#define         OFS_INTR_ENABLE         (1*REG_OFFSET)
+#define         OFS_INTR_ID             (2*REG_OFFSET)
+#define         OFS_DATA_FORMAT         (3*REG_OFFSET)
+#define         OFS_LINE_CONTROL        (3*REG_OFFSET)
+#define         OFS_MODEM_CONTROL       (4*REG_OFFSET)
+#define         OFS_RS232_OUTPUT        (4*REG_OFFSET)
+#define         OFS_LINE_STATUS         (5*REG_OFFSET)
+#define         OFS_MODEM_STATUS        (6*REG_OFFSET)
+#define         OFS_RS232_INPUT         (6*REG_OFFSET)
+#define         OFS_SCRATCH_PAD         (7*REG_OFFSET)
+
+#define         OFS_DIVISOR_LSB         (0*REG_OFFSET)
+#define         OFS_DIVISOR_MSB         (1*REG_OFFSET)
+
+
+/* memory-mapped read/write of the port */
+#define         UART16550_READ(y)    (*((volatile uint8*)(BASE + y)))
+#define         UART16550_WRITE(y, z)  ((*((volatile uint8*)(BASE + y))) = z)
+
+void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
+{
+	/* disable interrupts */
+	UART16550_WRITE(OFS_INTR_ENABLE, 0);
+
+	/* set up buad rate */
+	{
+		uint32 divisor;
+
+		/* set DIAB bit */
+		UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
+
+		/* set divisor */
+		divisor = MAX_BAUD / baud;
+		UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
+		UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
+
+		/* clear DIAB bit */
+		UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
+	}
+
+	/* set data format */
+	UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
+}
+
+static int remoteDebugInitialized = 0;
+
+int debug_state = -1;
+
+uint8 getDebugChar(void)
+{
+	uint8 c;
+	if (!remoteDebugInitialized) {
+		remoteDebugInitialized = 1;
+		debugInit(UART16550_BAUD_38400,
+			  UART16550_DATA_8BIT,
+			  UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+	}
+
+	while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
+	c= UART16550_READ(OFS_RCV_BUFFER);
+/*
+	if (state != 1) {
+		state = 1;
+		debug_out("\ngetDebugChar: ", 15);
+	}
+	debug_out(&c, 1);
+*/
+	return c;
+}
+
+
+int putDebugChar(uint8 byte)
+{
+	if (!remoteDebugInitialized) {
+		remoteDebugInitialized = 1;
+		debugInit(UART16550_BAUD_9600,
+			  UART16550_DATA_8BIT,
+			  UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+	}
+
+	while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
+	UART16550_WRITE(OFS_SEND_BUFFER, byte);
+	if (debug_state != 2) {
+		debug_state = 2;
+		// debug_out("\nputDebugChar: ", 15);
+	}
+	// debug_out(&byte, 1);
+	return 1;
+}
+
+#endif
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/pci.c linux/arch/mips/ddb5xxx/ddb5477/pci.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/pci.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/pci.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,147 @@
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+
+#include <asm/ddb5xxx/ddb5xxx.h>
+#include <asm/ddb5xxx/debug.h>
+#include <asm/ddb5xxx/pci.h>
+
+static struct resource extpci_io_resource = {
+	"ext pci IO space", 
+	DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE,
+	DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI0_IO_SIZE -1,
+	IORESOURCE_IO};
+
+static struct resource extpci_mem_resource = {
+	"ext pci memory space", 
+	DDB_PCI0_MEM_BASE,
+	DDB_PCI0_MEM_BASE + DDB_PCI0_MEM_SIZE -1,
+	IORESOURCE_MEM};
+
+static struct resource iopci_io_resource = {
+	"io pci IO space", 
+	DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE,
+	DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI1_IO_SIZE -1,
+	IORESOURCE_IO};
+
+static struct resource iopci_mem_resource = {
+	"ext pci memory space", 
+	DDB_PCI1_MEM_BASE,
+	DDB_PCI1_MEM_BASE + DDB_PCI1_MEM_SIZE -1,
+	IORESOURCE_MEM};
+
+extern struct pci_ops ddb5477_ext_pci_ops;
+extern struct pci_ops ddb5477_io_pci_ops;
+
+struct pci_channel mips_pci_channels[] = {
+	{ &ddb5477_ext_pci_ops, &extpci_io_resource, &extpci_mem_resource },
+	{ &ddb5477_io_pci_ops, &iopci_io_resource, &iopci_mem_resource },
+	{ NULL, NULL, NULL}
+};
+
+
+/*
+ * we fix up irqs based on the slot number.
+ * The first entry is at AD:11.
+ * Fortunately this works because, although we have two pci buses,
+ * they all have different slot numbers.
+ * 
+ * This does not work for devices on sub-buses.
+ *
+ * Note that the irq number in the array is relative number in vrc5477.
+ * We need to translate it to global irq number.
+ */
+
+/*
+ * irq mapping : PCI int # -> vrc5477 irq #
+ * based on vrc5477 manual page 46
+ */
+#define		PCI_EXT_INTA		8
+#define		PCI_EXT_INTB		9
+#define		PCI_EXT_INTC		10
+#define		PCI_EXT_INTD		11
+#define		PCI_EXT_INTE		12
+
+#define		PCI_IO_INTA		16
+#define		PCI_IO_INTB		17
+#define		PCI_IO_INTC		18
+#define		PCI_IO_INTD		19
+
+/* 
+ * irq mapping : device -> pci int #, 
+ * ddb5477 board manual page 4  and vrc5477 manual page 46
+ */
+#define		INT_ONBOARD_TULIP	PCI_EXT_INTA
+#define		INT_SLOT1		PCI_EXT_INTB
+#define		INT_SLOT2		PCI_EXT_INTC
+#define		INT_SLOT3		PCI_EXT_INTD
+#define		INT_SLOT4		PCI_EXT_INTE
+
+#define		INT_USB_HOST		PCI_IO_INTA
+#define		INT_USB_PERI		PCI_IO_INTB
+#define		INT_AC97		PCI_IO_INTC
+
+/*
+ * based on ddb5477 manual page 11
+ */
+#define		MAX_SLOT_NUM		21
+static unsigned char irq_map[MAX_SLOT_NUM] = {
+	/* AD:11 */ 0xff, 0xff, 0xff, 0xff, 
+	/* AD:15 */ INT_ONBOARD_TULIP, INT_SLOT1, INT_SLOT2, INT_SLOT3,
+	/* AD:19 */ INT_SLOT4, 0xff, 0xff, 0xff,
+	/* AD:23 */ 0xff, 0xff, 0xff, 0xff,
+	/* AD:27 */ 0xff, 0xff, INT_AC97, INT_USB_PERI, 
+	/* AD:31 */ INT_USB_HOST
+};
+
+extern int vrc5477_irq_to_irq(int irq);
+void __init pcibios_fixup_irqs(void)
+{
+        struct pci_dev *dev;
+        int slot_num;
+
+	pci_for_each_dev(dev) {
+		slot_num = PCI_SLOT(dev->devfn);
+		MIPS_ASSERT(slot_num < MAX_SLOT_NUM);
+		MIPS_ASSERT(irq_map[slot_num] != 0xff);
+
+		pci_write_config_byte(dev, 
+				      PCI_INTERRUPT_LINE,
+				      irq_map[slot_num]);
+		dev->irq = vrc5477_irq_to_irq(irq_map[slot_num]);
+	}
+}
+
+#if defined(CONFIG_LL_DEBUG)
+extern void jsun_scan_pci_bus(void);
+extern void jsun_assign_pci_resource(void);
+#endif
+void __init ddb_pci_reset_bus(void)
+{	
+	u32 temp;
+
+	/*
+	 * I am not sure about the "official" procedure, the following
+	 * steps work as far as I know:
+	 * We first set PCI cold reset bit (bit 31) in PCICTRL-H.
+	 * Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
+	 * The same is true for both PCI channels.
+	 */
+	temp = ddb_in32(DDB_PCICTL0_H);
+	temp |= 0x80000000;
+	ddb_out32(DDB_PCICTL0_H, temp);
+	temp &= ~0xc0000000;
+	ddb_out32(DDB_PCICTL0_H, temp);
+
+	temp = ddb_in32(DDB_PCICTL1_H);
+	temp |= 0x80000000;
+	ddb_out32(DDB_PCICTL1_H, temp);
+	temp &= ~0xc0000000;
+	ddb_out32(DDB_PCICTL1_H, temp);
+}
+
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 1;
+}
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/pci_ops.c linux/arch/mips/ddb5xxx/ddb5477/pci_ops.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/pci_ops.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/pci_ops.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,416 @@
+/***********************************************************************
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/ddb5477/pci_ops.c
+ *     Define the pci_ops for DB5477.
+ *
+ * Much of the code is derived from the original DDB5074 port by 
+ * Geert Uytterhoeven <geert@sonycom.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ ***********************************************************************
+ */
+
+/*
+ * DDB5477 has two PCI channels, external PCI and IOPIC (internal)
+ * Therefore we provide two sets of pci_ops.
+ */
+
+#include <linux/config.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+#include <asm/addrspace.h>
+#include <asm/ddb5xxx/debug.h>
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+/*
+ * config_swap structure records what set of pdar/pmr are used
+ * to access pci config space.  It also provides a place hold the
+ * original values for future restoring.
+ */
+struct pci_config_swap {
+	u32 	pdar;
+	u32	pmr;
+	u32	config_base;
+	u32	config_size;
+	u32	pdar_backup;
+	u32	pmr_backup;
+};
+
+/*
+ * On DDB5477, we have two sets of swap registers, for ext PCI and IOPCI.
+ */
+struct pci_config_swap ext_pci_swap = {
+	DDB_PCIW0,  
+	DDB_PCIINIT00,
+	DDB_PCI0_CONFIG_BASE,
+	DDB_PCI0_CONFIG_SIZE
+};
+struct pci_config_swap io_pci_swap = {
+	DDB_IOPCIW0,  
+	DDB_PCIINIT01,
+	DDB_PCI1_CONFIG_BASE,
+	DDB_PCI1_CONFIG_SIZE
+};
+
+
+/*
+ * access config space
+ */	
+static inline u32 ddb_access_config_base(struct pci_config_swap *swap,
+					 u32 bus,/* 0 means top level bus */
+					 u32 slot_num)
+{
+	u32 pci_addr = 0;
+	u32 pciinit_offset = 0;
+        u32 virt_addr = swap->config_base;
+	u32 option;
+
+	/* [jsun] hack for testing */
+	// if (slot_num == 4) slot_num = 0;
+
+	/* minimum pdar (window) size is 2MB */
+	MIPS_ASSERT(swap->config_size >= (2 << 20));
+
+	MIPS_ASSERT(slot_num < (1 << 5));
+	MIPS_ASSERT(bus < (1 << 8));
+
+	/* backup registers */
+	swap->pdar_backup = ddb_in32(swap->pdar);
+	swap->pmr_backup = ddb_in32(swap->pmr);
+
+	/* set the pdar (pci window) register */
+	ddb_set_pdar(swap->pdar,
+		     swap->config_base,
+		     swap->config_size,
+		     32,	/* 32 bit wide */
+		     0,		/* not on local memory bus */
+		     0);	/* not visible from PCI bus (N/A) */
+
+	/* 
+	 * calcuate the absolute pci config addr; 
+	 * according to the spec, we start scanning from adr:11 (0x800)
+	 */ 
+	if (bus == 0) {
+		/* type 0 config */
+		pci_addr = 0x800 << slot_num;
+	} else {
+		/* type 1 config */
+		pci_addr = (bus << 16) | (slot_num << 11);
+		panic("ddb_access_config_base: we don't support type 1 config Yet");
+	}
+
+	/*
+	 * if pci_addr is less than pci config window size,  we set
+	 * pciinit_offset to 0 and adjust the virt_address.
+	 * Otherwise we will try to adjust pciinit_offset.
+	 */
+	if (pci_addr < swap->config_size) {
+		virt_addr = KSEG1ADDR(swap->config_base + pci_addr);
+		pciinit_offset = 0;
+	} else {
+		MIPS_ASSERT( (pci_addr & (swap->config_size - 1)) == 0);
+		virt_addr = KSEG1ADDR(swap->config_base);
+		pciinit_offset = pci_addr;
+	}
+
+	/* set the pmr register */
+	option = DDB_PCI_ACCESS_32;
+	if (bus != 0) option |= DDB_PCI_CFGTYPE1;
+	ddb_set_pmr(swap->pmr, DDB_PCICMD_CFG, pciinit_offset, option);
+
+	return virt_addr;
+}
+
+static inline void ddb_close_config_base(struct pci_config_swap *swap)
+{
+	ddb_out32(swap->pdar, swap->pdar_backup);
+	ddb_out32(swap->pmr, swap->pmr_backup);
+}
+
+static int read_config_dword(struct pci_config_swap *swap,
+			     struct pci_dev *dev,
+			     u32 where,
+			     u32 *val)
+{
+	u32 bus, slot_num, func_num;
+	u32 base;
+
+	MIPS_ASSERT((where & 3) == 0);
+	MIPS_ASSERT(where < (1 << 8));
+
+	/* check if the bus is top-level */
+	if (dev->bus->parent != NULL) {
+		bus = dev->bus->number;
+		MIPS_ASSERT(bus != 0);
+	} else {
+		bus = 0;
+	}
+
+	slot_num = PCI_SLOT(dev->devfn);
+	func_num = PCI_FUNC(dev->devfn);
+	base = ddb_access_config_base(swap, bus, slot_num);
+	*val = *(volatile u32*) (base + (func_num << 8) + where);
+	ddb_close_config_base(swap);
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int read_config_word(struct pci_config_swap *swap,
+			    struct pci_dev *dev,
+			    u32 where,
+			    u16 *val)
+{
+        int status;
+        u32 result;
+
+	MIPS_ASSERT((where & 1) == 0);
+
+        status = read_config_dword(swap, dev, where & ~3, &result);
+        if (where & 2) result >>= 16;
+        *val = result & 0xffff;
+        return status;
+}
+
+static int read_config_byte(struct pci_config_swap *swap,
+			    struct pci_dev *dev,
+			    u32 where,
+			    u8 *val)
+{
+        int status;
+        u32 result;
+
+        status = read_config_dword(swap, dev, where & ~3, &result);
+        if (where & 1) result >>= 8;
+        if (where & 2) result >>= 16;
+        *val = result & 0xff;
+        return status;
+}
+
+static int write_config_dword(struct pci_config_swap *swap,
+			      struct pci_dev *dev,
+			      u32 where,
+			      u32 val)
+{
+	u32 bus, slot_num, func_num;
+	u32 base;
+
+	MIPS_ASSERT((where & 3) == 0);
+	MIPS_ASSERT(where < (1 << 8));
+
+	/* check if the bus is top-level */
+	if (dev->bus->parent != NULL) {
+		bus = dev->bus->number;
+		MIPS_ASSERT(bus != 0);
+	} else {
+		bus = 0;
+	}
+
+	slot_num = PCI_SLOT(dev->devfn);
+	func_num = PCI_FUNC(dev->devfn);
+	base = ddb_access_config_base(swap, bus, slot_num);
+	*(volatile u32*) (base + (func_num << 8) + where) = val; 
+	ddb_close_config_base(swap);
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int write_config_word(struct pci_config_swap *swap,
+			     struct pci_dev *dev,
+			     u32 where,
+			     u16 val)
+{
+	int status, shift=0;
+	u32 result;
+
+	MIPS_ASSERT((where & 1) == 0);
+
+	status = read_config_dword(swap, dev, where & ~3, &result);
+	if (status != PCIBIOS_SUCCESSFUL) return status;
+
+        if (where & 2)
+                shift += 16;
+        result &= ~(0xffff << shift);
+        result |= val << shift;
+        return write_config_dword(swap, dev, where & ~3, result);
+}
+
+static int write_config_byte(struct pci_config_swap *swap,
+			     struct pci_dev *dev,
+			     u32 where,
+			     u8 val)
+{
+	int status, shift=0;
+	u32 result;
+
+	status = read_config_dword(swap, dev, where & ~3, &result);
+	if (status != PCIBIOS_SUCCESSFUL) return status;
+
+        if (where & 2)
+                shift += 16;
+        if (where & 1)
+                shift += 8;
+        result &= ~(0xff << shift);
+        result |= val << shift;
+        return write_config_dword(swap, dev, where & ~3, result);
+}
+
+#define	MAKE_PCI_OPS(prefix, rw, unitname, unittype, pciswap) \
+static int prefix##_##rw##_config_##unitname(struct pci_dev *dev, int where, unittype val) \
+{ \
+     return rw##_config_##unitname(pciswap, \
+                                   dev, \
+                                   where, \
+                                   val); \
+}
+
+MAKE_PCI_OPS(extpci, read, byte, u8 *, &ext_pci_swap)
+MAKE_PCI_OPS(extpci, read, word, u16 *, &ext_pci_swap)
+MAKE_PCI_OPS(extpci, read, dword, u32 *, &ext_pci_swap)
+
+MAKE_PCI_OPS(iopci, read, byte, u8 *, &io_pci_swap)
+MAKE_PCI_OPS(iopci, read, word, u16 *, &io_pci_swap)
+MAKE_PCI_OPS(iopci, read, dword, u32 *, &io_pci_swap)
+
+MAKE_PCI_OPS(extpci, write, byte, u8, &ext_pci_swap)
+MAKE_PCI_OPS(extpci, write, word, u16, &ext_pci_swap)
+MAKE_PCI_OPS(extpci, write, dword, u32, &ext_pci_swap)
+
+MAKE_PCI_OPS(iopci, write, byte, u8, &io_pci_swap)
+MAKE_PCI_OPS(iopci, write, word, u16, &io_pci_swap)
+MAKE_PCI_OPS(iopci, write, dword, u32, &io_pci_swap)
+
+struct pci_ops ddb5477_ext_pci_ops ={
+	extpci_read_config_byte,
+	extpci_read_config_word,
+	extpci_read_config_dword,
+	extpci_write_config_byte,
+	extpci_write_config_word,
+	extpci_write_config_dword
+};
+
+
+struct pci_ops ddb5477_io_pci_ops ={
+	iopci_read_config_byte,
+	iopci_read_config_word,
+	iopci_read_config_dword,
+	iopci_write_config_byte,
+	iopci_write_config_word,
+	iopci_write_config_dword
+};
+
+#if defined(CONFIG_LL_DEBUG)
+void jsun_scan_pci_bus(void)
+{
+	struct pci_bus bus;
+	struct pci_dev dev;
+	unsigned int devfn;
+	int j;
+
+	bus.parent = NULL;	/* we scan the top level only */
+	dev.bus = &bus;
+	dev.sysdata = NULL;
+
+	/* scan ext pci bus and io pci bus*/
+	for (j=0; j< 2; j++) {
+		if (j ==  0) {
+			printk("scan ddb5477 external PCI bus:\n");
+			bus.ops = &ddb5477_ext_pci_ops;
+		} else {
+			printk("scan ddb5477 IO PCI bus:\n");
+			bus.ops = &ddb5477_io_pci_ops;
+		}
+	
+		for (devfn = 0; devfn < 0x100; devfn += 8) {
+			u32 temp;
+			u16 temp16;
+			u8 temp8;
+			int i;
+
+			dev.devfn = devfn;
+			MIPS_VERIFY(pci_read_config_dword(&dev, 0, &temp),
+				    == PCIBIOS_SUCCESSFUL);
+			if (temp == 0xffffffff) continue;
+
+			printk("slot %d: (addr %d) \n", devfn/8, 11+devfn/8);
+
+			/* verify read word and byte */
+			MIPS_VERIFY(pci_read_config_word(&dev, 2, &temp16),
+				    == PCIBIOS_SUCCESSFUL);
+			MIPS_ASSERT(temp16 == (temp >> 16));
+			MIPS_VERIFY(pci_read_config_byte(&dev, 3, &temp8),
+				    == PCIBIOS_SUCCESSFUL);
+			MIPS_ASSERT(temp8 == (temp >> 24));
+			MIPS_VERIFY(pci_read_config_byte(&dev, 1, &temp8),
+				    == PCIBIOS_SUCCESSFUL);
+			MIPS_ASSERT(temp8 == ((temp >> 8) & 0xff));
+
+			for (i=0; i < 16; i++) {
+				MIPS_VERIFY(pci_read_config_dword(&dev, i*4, &temp),
+					    == PCIBIOS_SUCCESSFUL);
+				printk("\t%08X", temp);
+				if ((i%4) == 3) printk("\n");
+			}
+		}
+	}
+}
+
+
+static void jsun_hardcode_pci_resources_eepro(void)
+{
+	struct pci_bus bus;
+	struct pci_dev dev;
+	u32 temp;
+
+	bus.parent = NULL;	/* we scan the top level only */
+	bus.ops = &ddb5477_ext_pci_ops;
+	dev.bus = &bus;
+	dev.sysdata = NULL;
+
+	/* for slot 5 (ext pci 1) eepro card */
+	dev.devfn = 5*8;
+	pci_read_config_dword(&dev, 0, &temp);
+	MIPS_ASSERT(temp == 0x12298086);
+
+	pci_write_config_dword(&dev, PCI_BASE_ADDRESS_0, DDB_PCI0_MEM_BASE);
+	pci_write_config_dword(&dev, PCI_BASE_ADDRESS_1, 0);
+	pci_write_config_dword(&dev, PCI_BASE_ADDRESS_2, DDB_PCI0_MEM_BASE+0x100000);
+	pci_write_config_dword(&dev, PCI_INTERRUPT_LINE, 17);
+}
+
+static void jsun_hardcode_pci_resources_onboard_tulip(void)
+{
+	struct pci_bus bus;
+	struct pci_dev dev;
+	u32 temp;
+
+	bus.parent = NULL;	/* we scan the top level only */
+	bus.ops = &ddb5477_ext_pci_ops;
+	dev.bus = &bus;
+	dev.sysdata = NULL;
+
+	/* for slot 4 on board ether chip */
+	dev.devfn = 4*8;
+	pci_read_config_dword(&dev, 0, &temp);
+	MIPS_ASSERT(temp == 0x00191011);
+
+	pci_write_config_dword(&dev, PCI_BASE_ADDRESS_0, 0x1000);
+	pci_write_config_dword(&dev, PCI_BASE_ADDRESS_1, DDB_PCI0_MEM_BASE);
+	pci_write_config_dword(&dev, PCI_INTERRUPT_LINE, 16);
+}
+
+static void jsun_hardcode_pci_resources(void)
+{
+	jsun_hardcode_pci_resources_onboard_tulip();
+}
+
+void jsun_assign_pci_resource(void)
+{
+	jsun_hardcode_pci_resources();
+}
+
+#endif
diff -urN linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/setup.c linux/arch/mips/ddb5xxx/ddb5477/setup.c
--- linux-2.4.10-pre6/arch/mips/ddb5xxx/ddb5477/setup.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ddb5xxx/ddb5477/setup.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,251 @@
+/***********************************************************************
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/ddb5477/setup.c
+ *     Setup file for DDB5477.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ ***********************************************************************
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/kdev_t.h>
+#include <linux/types.h>
+#include <linux/console.h>
+#include <linux/sched.h>
+#include <linux/pci.h>
+#include <linux/ide.h>
+#include <linux/fs.h>		/* for ROOT_DEV */
+#include <linux/ioport.h>
+#include <linux/param.h>	/* for HZ */
+
+#include <asm/addrspace.h>
+#include <asm/time.h>
+#include <asm/bcache.h>
+#include <asm/irq.h>
+#include <asm/reboot.h>
+#include <asm/gdb-stub.h>
+
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+
+
+#define	USE_CPU_COUNTER_TIMER	/* whether we use cpu counter */
+
+#ifdef USE_CPU_COUNTER_TIMER
+#define	CPU_COUNTER_FREQUENCY		83000000
+#else
+/* otherwise we use special timer 1 */
+#define	SP_TIMER_FREQUENCY		83000000
+#define	SP_TIMER_BASE			DDB_SPT1CTRL_L
+#define	SP_TIMER_IRQ			(8 + 6)
+#endif
+
+static void ddb_machine_restart(char *command)
+{
+	static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
+
+	u32 t;
+
+	/* PCI cold reset */
+	ddb_pci_reset_bus();
+
+	/* CPU cold reset */
+	t = ddb_in32(DDB_CPUSTAT);
+	MIPS_ASSERT((t&1));
+	ddb_out32(DDB_CPUSTAT, t);
+
+	/* Call the PROM */
+	back_to_prom();
+}
+
+static void ddb_machine_halt(void)
+{
+	printk("DDB Vrc-5477 halted.\n");
+	while (1);
+}
+
+static void ddb_machine_power_off(void)
+{
+	printk("DDB Vrc-5477 halted. Please turn off the power.\n");
+	while (1);
+}
+
+extern void rtc_ds1386_init(unsigned long base);
+static void __init ddb_time_init(void)
+{
+#if defined(USE_CPU_COUNTER_TIMER)
+	mips_counter_frequency = CPU_COUNTER_FREQUENCY;
+#endif
+
+	/* we have ds1396 RTC chip */
+	rtc_ds1386_init(KSEG1ADDR(DDB_LCS1_BASE));
+}
+
+#if defined(CONFIG_LL_DEBUG)
+int  board_init_done_flag = 0;
+#endif
+
+extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
+static void __init ddb_timer_setup(struct irqaction *irq)
+{
+#if defined(USE_CPU_COUNTER_TIMER)
+	unsigned int count;
+
+        /* we are using the cpu counter for timer interrupts */
+	setup_irq(7, irq);
+
+        /* to generate the first timer interrupt */
+        count = read_32bit_cp0_register(CP0_COUNT);
+        write_32bit_cp0_register(CP0_COMPARE, count + 1000);
+
+#else
+
+	/* if we don't use Special purpose timer 1 */
+	ddb_out32(SP_TIMER_BASE, SP_TIMER_FREQUENCY/HZ);
+	ddb_out32(SP_TIMER_BASE+4, 0x1);
+	setup_irq(SP_TIMER_IRQ, irq);
+
+#endif
+	
+	/* this is the last board dependent code */
+	MIPS_DEBUG(board_init_done_flag = 1);
+}
+
+static void ddb5477_board_init(void);
+extern void ddb5477_irq_setup(void);
+
+#if defined(CONFIG_BLK_DEV_INITRD)
+extern unsigned long __rd_start, __rd_end, initrd_start, initrd_end;
+#endif 
+
+void __init ddb_setup(void)
+{
+	extern int panic_timeout;
+
+	irq_setup = ddb5477_irq_setup;
+	mips_io_port_base = KSEG1ADDR(DDB_PCI_IO_BASE);
+
+	board_time_init = ddb_time_init;
+	board_timer_setup = ddb_timer_setup;
+
+	_machine_restart = ddb_machine_restart;
+	_machine_halt = ddb_machine_halt;
+	_machine_power_off = ddb_machine_power_off;
+
+	/* setup resource limits */
+	ioport_resource.end = DDB_PCI0_IO_SIZE + DDB_PCI1_IO_SIZE - 1;
+	iomem_resource.end = 0xffffffff;
+	
+	/* Reboot on panic */
+	panic_timeout = 180;
+
+	/* initialize board - we don't trust the loader */
+	ddb5477_board_init();
+
+#if defined(CONFIG_BLK_DEV_INITRD)
+	ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+	initrd_start = (unsigned long)&__rd_start;
+	initrd_end = (unsigned long)&__rd_end;
+#endif
+
+}
+
+static void __init ddb5477_board_init()
+{
+	/* ----------- setup PDARs ------------ */
+
+	/* SDRAM should have been set */
+	MIPS_ASSERT(ddb_in32(DDB_SDRAM0) == 
+		    ddb_calc_pdar(DDB_SDRAM_BASE, DDB_SDRAM_SIZE, 32, 0, 1));
+
+	/* SDRAM1 should be turned off.  What is this for anyway ? */
+	MIPS_ASSERT( (ddb_in32(DDB_SDRAM1) & 0xf) == 0);
+
+	/* Set LDCSs */
+	/* flash */
+	ddb_set_pdar(DDB_LCS0, DDB_LCS0_BASE, DDB_LCS0_SIZE, 16, 0, 0);
+	/* misc */
+	ddb_set_pdar(DDB_LCS1, DDB_LCS1_BASE, DDB_LCS1_SIZE, 8, 0, 0);
+	/* mezzanie (?) */
+	ddb_set_pdar(DDB_LCS2, DDB_LCS2_BASE, DDB_LCS2_SIZE, 16, 0, 0);
+
+	/* verify VRC5477 base addr */
+	MIPS_ASSERT(ddb_in32(DDB_VRC5477) == 
+		    ddb_calc_pdar(DDB_VRC5477_BASE, DDB_VRC5477_SIZE, 32, 0, 1));
+	
+	/* verify BOOT ROM addr */
+	MIPS_ASSERT(ddb_in32(DDB_BOOTCS) == 
+		    ddb_calc_pdar(DDB_BOOTCS_BASE, DDB_BOOTCS_SIZE, 8, 0, 0));
+
+	/* setup PCI windows - window0 for MEM/config, window1 for IO */
+	ddb_set_pdar(DDB_PCIW0, DDB_PCI0_MEM_BASE, DDB_PCI0_MEM_SIZE, 32, 0, 1);
+	ddb_set_pdar(DDB_PCIW1, DDB_PCI0_IO_BASE, DDB_PCI0_IO_SIZE, 32, 0, 1);
+	ddb_set_pdar(DDB_IOPCIW0, DDB_PCI1_MEM_BASE, DDB_PCI1_MEM_SIZE, 32, 0, 1);
+	ddb_set_pdar(DDB_IOPCIW1, DDB_PCI1_IO_BASE, DDB_PCI1_IO_SIZE, 32, 0, 1);
+
+	/* ------------ reset PCI bus and BARs ----------------- */
+	ddb_pci_reset_bus();
+
+	ddb_out32(DDB_BARM010, 0x00000008);
+	ddb_out32(DDB_BARM011, 0x00000008);
+
+	ddb_out32(DDB_BARC0, 0xffffffff);
+	ddb_out32(DDB_BARM230, 0xffffffff);
+	ddb_out32(DDB_BAR00, 0xffffffff);
+	ddb_out32(DDB_BAR10, 0xffffffff);
+	ddb_out32(DDB_BAR20, 0xffffffff);
+	ddb_out32(DDB_BAR30, 0xffffffff);
+	ddb_out32(DDB_BAR40, 0xffffffff);
+	ddb_out32(DDB_BAR50, 0xffffffff);
+	ddb_out32(DDB_BARB0, 0xffffffff);
+
+	ddb_out32(DDB_BARC1, 0xffffffff);
+	ddb_out32(DDB_BARM231, 0xffffffff);
+	ddb_out32(DDB_BAR01, 0xffffffff);
+	ddb_out32(DDB_BAR11, 0xffffffff);
+	ddb_out32(DDB_BAR21, 0xffffffff);
+	ddb_out32(DDB_BAR31, 0xffffffff);
+	ddb_out32(DDB_BAR41, 0xffffffff);
+	ddb_out32(DDB_BAR51, 0xffffffff);
+	ddb_out32(DDB_BARB1, 0xffffffff);
+
+	/* 
+	 * We use pci master register 0  for memory space / config space
+	 * And we use register 1 for IO space.
+	 * Note that for memory space, we bump up the pci base address
+	 * so that we have 1:1 mapping between PCI memory and cpu physical.
+	 * For PCI IO space, it starts from 0 in PCI IO space but with
+	 * DDB_xx_IO_BASE in CPU physical address space.
+	 */
+	ddb_set_pmr(DDB_PCIINIT00, DDB_PCICMD_MEM, DDB_PCI0_MEM_BASE, 
+		    DDB_PCI_ACCESS_32);
+	ddb_set_pmr(DDB_PCIINIT10, DDB_PCICMD_IO, 0, DDB_PCI_ACCESS_32);
+
+	ddb_set_pmr(DDB_PCIINIT01, DDB_PCICMD_MEM, DDB_PCI1_MEM_BASE, 
+		    DDB_PCI_ACCESS_32);
+	ddb_set_pmr(DDB_PCIINIT11, DDB_PCICMD_IO, DDB_PCI0_IO_SIZE, 
+                    DDB_PCI_ACCESS_32);
+
+	
+	/* PCI cross window should be set properly */
+	ddb_set_pdar(DDB_BARP00, DDB_PCI1_MEM_BASE, DDB_PCI1_MEM_SIZE, 32, 0, 1);
+	ddb_set_pdar(DDB_BARP10, DDB_PCI1_IO_BASE, DDB_PCI1_IO_SIZE, 32, 0, 1);
+	ddb_set_pdar(DDB_BARP01, DDB_PCI0_MEM_BASE, DDB_PCI0_MEM_SIZE, 32, 0, 1);
+	ddb_set_pdar(DDB_BARP11, DDB_PCI0_IO_BASE, DDB_PCI0_IO_SIZE, 32, 0, 1);
+
+	/* enable USB input buffers */
+	ddb_out32(DDB_PIBMISC, 0x00000007);
+
+	/* For dual-function pins, make them all non-GPIO */
+	ddb_out32(DDB_GIUFUNSEL, 0x0);
+	// ddb_out32(DDB_GIUFUNSEL, 0xfe0fcfff);  /* NEC recommanded value */
+}
diff -urN linux-2.4.10-pre6/arch/mips/dec/Makefile linux/arch/mips/dec/Makefile
--- linux-2.4.10-pre6/arch/mips/dec/Makefile	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/dec/Makefile	Mon Dec  3 23:08:45 2001
@@ -19,7 +19,6 @@
 obj-y	 := int-handler.o setup.o irq.o time.o reset.o rtc-dec.o wbflush.o
 
 obj-$(CONFIG_PROM_CONSOLE)	+= promcon.o
-obj-$(CONFIG_SERIAL)		+= serial.o
 
 int-handler.o:	int-handler.S
 
diff -urN linux-2.4.10-pre6/arch/mips/dec/int-handler.S linux/arch/mips/dec/int-handler.S
--- linux-2.4.10-pre6/arch/mips/dec/int-handler.S	Fri Jun 25 17:40:12 1999
+++ linux/arch/mips/dec/int-handler.S	Mon Dec  3 23:08:45 2001
@@ -2,6 +2,7 @@
  * arch/mips/dec/int-handler.S
  *
  * Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen
+ * Copyright (C) 2000  Maciej W. Rozycki
  *
  * Written by Ralf Baechle and Andreas Busse, modified for DECStation
  * support by Paul Antoine and Harald Koerfgen.
@@ -16,6 +17,11 @@
 #include <asm/stackframe.h>
 #include <asm/addrspace.h>
 
+#include <asm/dec/kn01.h>
+#include <asm/dec/kn02.h>
+#include <asm/dec/kn02xa.h>
+#include <asm/dec/kn03.h>
+#include <asm/dec/ioasic_addrs.h>
 #include <asm/dec/interrupts.h>
 
 
@@ -24,8 +30,6 @@
 /*
  * decstation_handle_int: Interrupt handler for DECStations
  *
- * FIXME: Detection of spurious interrupts not yet implemented!
- *
  * We follow the model in the Indy interrupt code by David Miller, where he
  * says: a lot of complication here is taken away because:
  *
@@ -139,12 +143,12 @@
 		la	t1,cpu_mask_tbl
 		and	t0,t2			# isolate allowed ones
 
-		/* insert detection of spurious interrupts here */
+		beqz	t0,spurious
 
 		/*
 		 * Find irq with highest priority
 		 */
-1:		lw	t2,(t1)
+1:		 lw	t2,(t1)
 		move	t3,t0
 		and	t3,t2
 		beq	t3,zero,1b
@@ -156,18 +160,18 @@
 		lw	a0,%lo(cpu_irq_nr-cpu_mask_tbl-PTRSIZE)(t1)
 		lw	t0,%lo(cpu_ivec_tbl-cpu_mask_tbl-PTRSIZE)(t1)
 		bgez	a0, handle_it		# irq_nr >= 0?
-						# irq_nr < 0: a0 contains an address
-		nop
+						# irq_nr < 0: t0 contains an address
+		 nop
 		jr	t0
 		 nop				# delay slot
 
 /*
  * Handle "IRQ Controller" Interrupts
  * Masked Interrupts are still visible and have to be masked "by hand".
- * %hi(KN02_CSR_ADDR) does not work so all addresses are hardcoded :-(.
  */
 		EXPORT(kn02_io_int)
-kn02_io_int:	lui	t0,0xbff0		# get interrupt status and mask
+kn02_io_int:					# 3max
+		lui	t0,KN02_CSR_ADDR>>16	# get interrupt status and mask
 		lw	t0,(t0)
 		la	t1,asic_mask_tbl
 		move	t3,t0
@@ -176,27 +180,32 @@
 		 and	t0,t3			# mask out allowed ones
 
 		EXPORT(kn03_io_int)
-kn03_io_int:	lui	t2,0xbf84		# upper part of IOASIC Address
-		lw	t0,0x0110(t2)		# get status: IOASIC isr
-		lw	t3,0x0120(t2)		# get mask:   IOASIC isrm
+kn03_io_int:					# 3max+
+		lui	t2,KN03_IOASIC_BASE>>16	# upper part of IOASIC Address
+		lw	t0,SIR(t2)		# get status: IOASIC isr
+		lw	t3,SIMR(t2)		# get mask:   IOASIC isrm
 		la	t1,asic_mask_tbl
 		b	find_int
 		 and	t0,t3			# mask out allowed ones
 
-		EXPORT(kn02ba_io_int)
-kn02ba_io_int:	lui	t2,0xbc04		
-		lw	t0,0x0110(t2)		# IOASIC isr, works for maxine also
-		lw	t3,0x0120(t2)		# IOASIC isrm
+		EXPORT(kn02xa_io_int)
+kn02xa_io_int:					# 3min/maxine
+		lui	t2,KN02XA_IOASIC_BASE>>16		
+						# upper part of IOASIC Address
+		lw	t0,SIR(t2)		# get status: IOASIC isr
+		lw	t3,SIMR(t2)		# get mask:   IOASIC isrm
 		la	t1,asic_mask_tbl
 		and	t0,t3
 
 		/*
 		 * Find irq with highest priority
 		 */
-find_int:	lw	t2,(t1)
+find_int:	beqz	t0,spurious
+
+1:		 lw	t2,(t1)
 		move	t3,t0
 		and	t3,t2
-		beq	zero,t3,find_int
+		beq	zero,t3,1b
 		 addu	t1,PTRSIZE		# delay slot
 
 		/*
@@ -209,7 +218,10 @@
 		 move	a1,sp
 		j	ret_from_irq
 		 nop
-		
+
+spurious:
+		j	spurious_interrupt
+		 nop
 		END(decstation_handle_int)
 /*
   * Interrupt routines common to all DECStations first.
@@ -218,14 +230,6 @@
 dec_intr_fpu:	PANIC("Unimplemented FPU interrupt handler")
 
 /*
- * Halt interrupt
- */
-		EXPORT(intr_halt)
-intr_halt:	la	k0,0xbc000000
-		jr	k0
-		 nop
-
-/*
  * Generic unimplemented interrupt routines - ivec_tbl is initialised to
  * point all interrupts here.  The table is then filled in by machine-specific
  * initialisation in dec_setup().
@@ -358,5 +362,3 @@
 		.word	0
 		.word	0
 		.word	0xffffffff		# EOL
-
-
diff -urN linux-2.4.10-pre6/arch/mips/dec/irq.c linux/arch/mips/dec/irq.c
--- linux-2.4.10-pre6/arch/mips/dec/irq.c	Fri Feb  9 11:29:44 2001
+++ linux/arch/mips/dec/irq.c	Mon Dec  3 23:08:45 2001
@@ -2,9 +2,7 @@
  * Code to handle DECstation IRQs plus some generic interrupt stuff.
  *
  * Copyright (C) 1992 Linus Torvalds
- * Copyright (C) 1994, 1995, 1996, 1997 Ralf Baechle
- *
- * $Id: irq.c,v 1.6 2000/02/04 07:40:23 ralf Exp $
+ * Copyright (C) 1994, 1995, 1996, 1997, 2000 Ralf Baechle
  */
 #include <linux/errno.h>
 #include <linux/init.h>
@@ -27,9 +25,14 @@
 
 #include <asm/dec/interrupts.h>
 
-extern volatile unsigned int *isr;	/* address of the interrupt status register     */
-extern volatile unsigned int *imr;	/* address of the interrupt mask register       */
-extern decint_t dec_interrupt[NR_INTS];
+extern void dec_init_kn01(void);
+extern void dec_init_kn230(void);
+extern void dec_init_kn02(void);
+extern void dec_init_kn02ba(void);
+extern void dec_init_kn02ca(void);
+extern void dec_init_kn03(void);
+
+extern asmlinkage void decstation_handle_int(void);
 
 unsigned long spurious_count = 0;
 
@@ -42,7 +45,7 @@
 	dummy = *imr;
 	dummy = *imr;
     } else			/* This is a cpu interrupt        */
-	set_cp0_status(ST0_IM, read_32bit_cp0_register(CP0_STATUS) & ~dec_interrupt[irq_nr].cpu_mask);
+	change_cp0_status(ST0_IM, read_32bit_cp0_register(CP0_STATUS) & ~dec_interrupt[irq_nr].cpu_mask);
 }
 
 static inline void unmask_irq(unsigned int irq_nr)
@@ -54,7 +57,7 @@
 	dummy = *imr;
 	dummy = *imr;
     }
-    set_cp0_status(ST0_IM, read_32bit_cp0_register(CP0_STATUS) | dec_interrupt[irq_nr].cpu_mask);
+    change_cp0_status(ST0_IM, read_32bit_cp0_register(CP0_STATUS) | dec_interrupt[irq_nr].cpu_mask);
 }
 
 void disable_irq(unsigned int irq_nr)
@@ -125,7 +128,7 @@
     int do_random, cpu;
 
     cpu = smp_processor_id();
-    irq_enter(cpu);
+    irq_enter(cpu, irq);
     kstat.irqs[cpu][irq]++;
 
     mask_irq(irq);
@@ -142,10 +145,10 @@
 	} while (action);
 	if (do_random & SA_SAMPLE_RANDOM)
 	    add_interrupt_randomness(irq);
-	unmask_irq(irq);
 	__cli();
+	unmask_irq(irq);
     }
-    irq_exit(cpu);
+    irq_exit(cpu, irq);
 
     /* unmasking and bottom half handling is done magically for us. */
 }
@@ -261,5 +264,34 @@
 
 void __init init_IRQ(void)
 {
-    irq_setup();
+    switch (mips_machtype) {
+    case MACH_DS23100:
+	dec_init_kn01();
+	break;
+    case MACH_DS5100:		/*  DS5100 MIPSMATE */
+	dec_init_kn230();
+	break;
+    case MACH_DS5000_200:	/* DS5000 3max */
+	dec_init_kn02();
+	break;
+    case MACH_DS5000_1XX:	/* DS5000/100 3min */
+	dec_init_kn02ba();
+	break;
+    case MACH_DS5000_2X0:	/* DS5000/240 3max+ */
+	dec_init_kn03();
+	break;
+    case MACH_DS5000_XX:	/* Personal DS5000/2x */
+	dec_init_kn02ca();
+	break;
+    case MACH_DS5800:		/* DS5800 Isis */
+	panic("Don't know how to set this up!");
+	break;
+    case MACH_DS5400:		/* DS5400 MIPSfair */
+	panic("Don't know how to set this up!");
+	break;
+    case MACH_DS5500:		/* DS5500 MIPSfair-2 */
+	panic("Don't know how to set this up!");
+	break;
+    }
+    set_except_vector(0, decstation_handle_int);
 }
diff -urN linux-2.4.10-pre6/arch/mips/dec/prom/cmdline.c linux/arch/mips/dec/prom/cmdline.c
--- linux-2.4.10-pre6/arch/mips/dec/prom/cmdline.c	Mon Feb 28 07:18:20 2000
+++ linux/arch/mips/dec/prom/cmdline.c	Mon Dec  3 23:08:45 2001
@@ -2,8 +2,6 @@
  * cmdline.c: read the command line passed to us by the PROM.
  *
  * Copyright (C) 1998 Harald Koerfgen
- *
- * $Id: cmdline.c,v 1.2 1999/10/09 00:00:57 ralf Exp $
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -19,7 +17,7 @@
 extern int (*prom_printf)(char *, ...);
 #endif
 
-char arcs_cmdline[CL_SIZE];
+char arcs_cmdline[COMMAND_LINE_SIZE];
 
 void __init prom_init_cmdline(int argc, char **argv, unsigned long magic)
 {
diff -urN linux-2.4.10-pre6/arch/mips/dec/prom/init.c linux/arch/mips/dec/prom/init.c
--- linux-2.4.10-pre6/arch/mips/dec/prom/init.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/dec/prom/init.c	Mon Dec  3 23:08:45 2001
@@ -2,12 +2,11 @@
  * init.c: PROM library initialisation code.
  *
  * Copyright (C) 1998 Harald Koerfgen
- *
- * $Id: init.c,v 1.3 1999/08/09 19:43:13 harald Exp $
  */
 #include <linux/init.h>
 #include <linux/config.h>
 #include <asm/bootinfo.h>
+#include <asm/cpu.h>
 #include "prom.h"
 
 /*
@@ -93,15 +92,17 @@
 
 	/* Were we compiled with the right CPU option? */
 #if defined(CONFIG_CPU_R3000)
-	if ((mips_cputype == CPU_R4000SC) || (mips_cputype == CPU_R4400SC)) {
+	if ((mips_cpu.cputype == CPU_R4000SC) ||
+	    (mips_cpu.cputype == CPU_R4400SC)) {
 		prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n");
 		prom_printf("Please recompile with \"CONFIG_CPU_R4x00 = y\"\n");
 		dec_machine_halt();
 	}
 #endif
 
-#if defined(CONFIG_CPU_R4x00)
-	if ((mips_cputype == CPU_R3000) || (mips_cputype == CPU_R3000A)) {
+#if defined(CONFIG_CPU_R4X00)
+	if ((mips_cpu.cputype == CPU_R3000) ||
+	    (mips_cpu.cputype == CPU_R3000A)) {
 		prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n");
 		prom_printf("Please recompile with \"CONFIG_CPU_R3000 = y\"\n");
 		dec_machine_halt();
@@ -114,3 +115,4 @@
 
 	return 0;
 }
+
diff -urN linux-2.4.10-pre6/arch/mips/dec/prom/memory.c linux/arch/mips/dec/prom/memory.c
--- linux-2.4.10-pre6/arch/mips/dec/prom/memory.c	Tue Mar  6 19:44:36 2001
+++ linux/arch/mips/dec/prom/memory.c	Mon Dec  3 23:08:45 2001
@@ -2,6 +2,7 @@
  * memory.c: memory initialisation code.
  *
  * Copyright (C) 1998 Harald Koerfgen, Frieder Streffer and Paul M. Antoine
+ * Copyright (C) 2000 Maciej W. Rozycki
  *
  * $Id: memory.c,v 1.3 1999/10/09 00:00:58 ralf Exp $
  */
@@ -14,6 +15,8 @@
 #include <asm/addrspace.h>
 #include <asm/page.h>
 
+#include <asm/bootinfo.h>
+
 #include <asm/dec/machtype.h>
 
 #include "prom.h"
@@ -33,11 +36,6 @@
 
 volatile unsigned long mem_err = 0;	/* So we know an error occurred */
 
-extern char _end;
-
-#define PFN_UP(x)	(((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
-#define PFN_ALIGN(x)	(((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
-
 /*
  * Probe memory in 4MB chunks, waiting for an error to tell us we've fallen
  * off the end of real memory.  Only suitable for the 2100/3100's (PMAX).
@@ -45,7 +43,7 @@
 
 #define CHUNK_SIZE 0x400000
 
-unsigned long __init pmax_get_memory_size(void)
+static void __init pmax_setup_memory_region(void)
 {
 	volatile unsigned char *memory_page, dummy;
 	char	old_handler[0x80];
@@ -66,17 +64,19 @@
 		dummy = *memory_page;
 	}
 	memcpy((void *)(KSEG0 + 0x80), &old_handler, 0x80);
-	return (unsigned long)memory_page - KSEG1 - CHUNK_SIZE;
+
+	add_memory_region(0, (unsigned long)memory_page - KSEG1 - CHUNK_SIZE,
+			  BOOT_MEM_RAM);
 }
 
 /*
  * Use the REX prom calls to get hold of the memory bitmap, and thence
  * determine memory size.
  */
-unsigned long __init rex_get_memory_size(void)
+static void __init rex_setup_memory_region(void)
 {
 	int i, bitmap_size;
-	unsigned long mem_size = 0;
+	unsigned long mem_start = 0, mem_size = 0;
 	memmap *bm;
 
 	/* some free 64k */
@@ -88,46 +88,30 @@
 		/* FIXME: very simplistically only add full sets of pages */
 		if (bm->bitmap[i] == 0xff)
 			mem_size += (8 * bm->pagesize);
+		else if (!mem_size)
+			mem_start += (8 * bm->pagesize);
+		else {
+			add_memory_region(mem_start, mem_size, BOOT_MEM_RAM);
+			mem_start += mem_size + (8 * bm->pagesize);
+			mem_size = 0;
+		}
 	}
-
-	return (mem_size);
+	if (mem_size)
+		add_memory_region(mem_start, mem_size, BOOT_MEM_RAM);
 }
 
 void __init prom_meminit(unsigned int magic)
 {
-	unsigned long free_start, free_end, start_pfn, bootmap_size;
-	unsigned long mem_size = 0;
-
 	if (magic != REX_PROM_MAGIC)
-		mem_size = pmax_get_memory_size();
+		pmax_setup_memory_region();
 	else
-		mem_size = rex_get_memory_size();
-
-	free_start = PHYSADDR(PFN_ALIGN(&_end));
-	free_end = mem_size;
-	start_pfn = PFN_UP((unsigned long)&_end);
-
-#ifdef PROM_DEBUG
-	prom_printf("free_start: 0x%08x\n", free_start);
-	prom_printf("free_end: 0x%08x\n", free_end);
-	prom_printf("start_pfn: 0x%08x\n", start_pfn);
-#endif
-
-	/* Register all the contiguous memory with the bootmem allocator
-	   and free it.  Be careful about the bootmem freemap.  */
-	bootmap_size = init_bootmem(start_pfn, mem_size >> PAGE_SHIFT);
-	free_bootmem(free_start + bootmap_size, free_end - free_start - bootmap_size);
-}
-
-int __init page_is_ram(unsigned long pagenr)
-{
-        return 1;
+		rex_setup_memory_region();
 }
 
-void prom_free_prom_memory (void)
+void __init prom_free_prom_memory (void)
 {
 	unsigned long addr, end;
-	extern	char _ftext;
+	extern char _ftext;
 
 	/*
 	 * Free everything below the kernel itself but leave
@@ -142,16 +126,16 @@
 	 * XXX: save this address for use in dec_lance.c?
 	 */
 	if (IOASIC)
-		end = PHYSADDR(&_ftext) - 0x00020000;
+		end = __pa(&_ftext) - 0x00020000;
 	else
 #endif
-		end = PHYSADDR(&_ftext);
+		end = __pa(&_ftext);
 
 	addr = PAGE_SIZE;
 	while (addr < end) {
-		ClearPageReserved(virt_to_page(addr));
-		set_page_count(virt_to_page(addr), 1);
-		free_page(addr);
+		ClearPageReserved(virt_to_page(__va(addr)));
+		set_page_count(virt_to_page(__va(addr)), 1);
+		free_page((unsigned long)__va(addr));
 		addr += PAGE_SIZE;
 	}
 
diff -urN linux-2.4.10-pre6/arch/mips/dec/reset.c linux/arch/mips/dec/reset.c
--- linux-2.4.10-pre6/arch/mips/dec/reset.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/dec/reset.c	Mon Dec  3 23:08:45 2001
@@ -23,3 +23,7 @@
 	back_to_prom();
 }
 
+void dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	dec_machine_halt();
+}
diff -urN linux-2.4.10-pre6/arch/mips/dec/rtc-dec.c linux/arch/mips/dec/rtc-dec.c
--- linux-2.4.10-pre6/arch/mips/dec/rtc-dec.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/dec/rtc-dec.c	Mon Dec  3 23:08:45 2001
@@ -1,13 +1,12 @@
-
-/* $Id: rtc-jazz.c,v 1.2 1998/06/25 20:19:14 ralf Exp $
-
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
  * RTC routines for DECstation style attached Dallas chip.
  *
- * Copyright (C) 1998 by Ralf Baechle, Harald Koerfgen
+ * Copyright (C) 1998, 2001 by Ralf Baechle
+ * Copyright (C) 1998 by Harald Koerfgen
  */
 #include <linux/mc146818rtc.h>
 
diff -urN linux-2.4.10-pre6/arch/mips/dec/serial.c linux/arch/mips/dec/serial.c
--- linux-2.4.10-pre6/arch/mips/dec/serial.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/dec/serial.c	Wed Dec 31 16:00:00 1969
@@ -1,98 +0,0 @@
-/*
- * sercons.c
- *      choose the right serial device at boot time
- *
- * triemer 6-SEP-1998
- *      sercons.c is designed to allow the three different kinds 
- *      of serial devices under the decstation world to co-exist
- *      in the same kernel.  The idea here is to abstract 
- *      the pieces of the drivers that are common to this file
- *      so that they do not clash at compile time and runtime.
- *
- * HK 16-SEP-1998 v0.002
- *      removed the PROM console as this is not a real serial
- *      device. Added support for PROM console in drivers/char/tty_io.c
- *      instead. Although it may work to enable more than one 
- *      console device I strongly recommend to use only one.
- */
-
-#include <linux/config.h>
-#include <linux/init.h>
-#include <asm/dec/machtype.h>
-
-#ifdef CONFIG_ZS
-extern int zs_init(void);
-#endif
-
-#ifdef CONFIG_DZ
-extern int dz_init(void);
-#endif
-
-#ifdef CONFIG_SERIAL_CONSOLE
-
-#ifdef CONFIG_ZS
-extern void zs_serial_console_init(void);
-#endif
-
-#ifdef CONFIG_DZ
-extern void dz_serial_console_init(void);
-#endif
-
-#endif
-
-/* rs_init - starts up the serial interface -
-   handle normal case of starting up the serial interface */
-
-#ifdef CONFIG_SERIAL
-
-int __init rs_init(void)
-{
-
-#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
-    if (IOASIC)
-	return zs_init();
-    else
-	return dz_init();
-#else
-
-#ifdef CONFIG_ZS
-    return zs_init();
-#endif
-
-#ifdef CONFIG_DZ
-    return dz_init();
-#endif
-
-#endif
-}
-
-__initcall(rs_init);
-
-#endif
-
-#ifdef CONFIG_SERIAL_CONSOLE
-
-/* serial_console_init handles the special case of starting
- *   up the console on the serial port
- */
-void __init serial_console_init(void)
-{
-#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
-    if (IOASIC)
-	zs_serial_console_init();
-    else
-	dz_serial_console_init();
-#else
-
-#ifdef CONFIG_ZS
-    zs_serial_console_init();
-#endif
-
-#ifdef CONFIG_DZ
-    dz_serial_console_init();
-#endif
-
-#endif
-}
-
-#endif
diff -urN linux-2.4.10-pre6/arch/mips/dec/setup.c linux/arch/mips/dec/setup.c
--- linux-2.4.10-pre6/arch/mips/dec/setup.c	Thu Aug 26 12:42:31 1999
+++ linux/arch/mips/dec/setup.c	Mon Dec  3 23:08:45 2001
@@ -6,11 +6,13 @@
  * for more details.
  *
  * Copyright (C) 1998 Harald Koerfgen
+ * Copyright (C) 2000 Maciej W. Rozycki
  */
 #include <linux/sched.h>
 #include <linux/interrupt.h>
 #include <linux/mc146818rtc.h>
 #include <linux/param.h>
+#include <linux/console.h>
 #include <asm/mipsregs.h>
 #include <asm/bootinfo.h>
 #include <linux/init.h>
@@ -22,25 +24,19 @@
 #include <asm/dec/kn02.h>
 #include <asm/dec/kn02xa.h>
 #include <asm/dec/kn03.h>
+#include <asm/dec/ioasic.h>
+#include <asm/dec/ioasic_addrs.h>
 #include <asm/dec/ioasic_ints.h>
 
-extern asmlinkage void decstation_handle_int(void);
 
-void dec_init_kn01(void);
-void dec_init_kn230(void);
-void dec_init_kn02(void);
-void dec_init_kn02ba(void);
-void dec_init_kn02ca(void);
-void dec_init_kn03(void);
+char *dec_rtc_base = (void *) KN01_RTC_BASE;	/* Assume DS2100/3100 initially */
 
-char *dec_rtc_base = (char *) KN01_RTC_BASE;	/* Assume DS2100/3100 initially */
+volatile unsigned int *ioasic_base;
 
 decint_t dec_interrupt[NR_INTS];
 
-/* 
+/*
  * Information regarding the IRQ Controller
- *
- * isr and imr are also hardcoded for different machines in int_handler.S
  */
 
 volatile unsigned int *isr = 0L;	/* address of the interrupt status register     */
@@ -49,50 +45,17 @@
 extern void dec_machine_restart(char *command);
 extern void dec_machine_halt(void);
 extern void dec_machine_power_off(void);
+extern void dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs);
 
 extern void wbflush_setup(void);
 
 extern struct rtc_ops dec_rtc_ops;
 
-extern void intr_halt(void);
-
 extern int setup_dec_irq(int, struct irqaction *);
 
 void (*board_time_init) (struct irqaction * irq);
 
-static void __init dec_irq_setup(void)
-{
-    switch (mips_machtype) {
-    case MACH_DS23100:
-	dec_init_kn01();
-	break;
-    case MACH_DS5100:		/*  DS5100 MIPSMATE */
-	dec_init_kn230();
-	break;
-    case MACH_DS5000_200:	/* DS5000 3max */
-	dec_init_kn02();
-	break;
-    case MACH_DS5000_1XX:	/* DS5000/100 3min */
-	dec_init_kn02ba();
-	break;
-    case MACH_DS5000_2X0:	/* DS5000/240 3max+ */
-	dec_init_kn03();
-	break;
-    case MACH_DS5000_XX:	/* Personal DS5000/2x */
-	dec_init_kn02ca();
-	break;
-    case MACH_DS5800:		/* DS5800 Isis */
-	panic("Don't know how to set this up!");
-	break;
-    case MACH_DS5400:		/* DS5400 MIPSfair */
-	panic("Don't know how to set this up!");
-	break;
-    case MACH_DS5500:		/* DS5500 MIPSfair-2 */
-	panic("Don't know how to set this up!");
-	break;
-    }
-    set_except_vector(0, decstation_handle_int);
-}
+static struct irqaction irq10 = {dec_intr_halt, 0, 0, "halt", NULL, NULL};
 
 /*
  * enable the periodic interrupts
@@ -112,9 +75,16 @@
     setup_dec_irq(CLOCK, irq);
 }
 
+/*
+ * Enable the halt interrupt.
+ */
+static void __init dec_halt_init(struct irqaction *irq)
+{
+    setup_dec_irq(HALT, irq);
+}
+
 void __init decstation_setup(void)
 {
-    irq_setup = dec_irq_setup;
     board_time_init = dec_time_init;
 
     wbflush_setup();
@@ -123,6 +93,10 @@
     _machine_halt = dec_machine_halt;
     _machine_power_off = dec_machine_power_off;
 
+#ifdef CONFIG_FB
+    conswitchp = &dummy_con;
+#endif
+
     rtc_ops = &dec_rtc_ops;
 }
 
@@ -206,8 +180,8 @@
      * Setup some memory addresses. FIXME: probably incomplete!
      */
     dec_rtc_base = (char *) KN02_RTC_BASE;
-    isr = (volatile unsigned int *) KN02_CSR_ADDR;
-    imr = (volatile unsigned int *) KN02_CSR_ADDR;
+    isr = (void *) KN02_CSR_ADDR;
+    imr = (void *) KN02_CSR_ADDR;
 
     /*
      * Setup IOASIC interrupt
@@ -275,16 +249,17 @@
     /*
      * Setup some memory addresses.
      */
+    ioasic_base = (void *) KN02XA_IOASIC_BASE;
     dec_rtc_base = (char *) KN02XA_RTC_BASE;
-    isr = (volatile unsigned int *) KN02XA_SIR_ADDR;
-    imr = (volatile unsigned int *) KN02XA_SIRM_ADDR;
+    isr = (void *) KN02XA_IOASIC_REG(SIR);
+    imr = (void *) KN02XA_IOASIC_REG(SIMR);
 
     /*
      * Setup IOASIC interrupt
      */
     cpu_mask_tbl[0] = IE_IRQ3;
     cpu_irq_nr[0] = -1;
-    cpu_ivec_tbl[0] = kn02ba_io_int;
+    cpu_ivec_tbl[0] = kn02xa_io_int;
     *imr = 0;
 
     /*
@@ -345,6 +320,7 @@
     cpu_mask_tbl[5] = IE_IRQ5;
     cpu_irq_nr[5] = FPU;
 
+    dec_halt_init(&irq10);
 }				/* dec_init_kn02ba */
 
 /*
@@ -355,14 +331,15 @@
     /*
      * Setup some memory addresses. FIXME: probably incomplete!
      */
+    ioasic_base = (void *) KN02XA_IOASIC_BASE;
     dec_rtc_base = (char *) KN02XA_RTC_BASE;
-    isr = (volatile unsigned int *) KN02XA_SIR_ADDR;
-    imr = (volatile unsigned int *) KN02XA_SIRM_ADDR;
+    isr = (void *) KN02XA_IOASIC_REG(SIR);
+    imr = (void *) KN02XA_IOASIC_REG(SIMR);
 
     /*
      * Setup IOASIC interrupt
      */
-    cpu_ivec_tbl[1] = kn02ba_io_int;
+    cpu_ivec_tbl[1] = kn02xa_io_int;
     cpu_irq_nr[1] = -1;
     cpu_mask_tbl[1] = IE_IRQ3;
     *imr = 0;
@@ -420,6 +397,7 @@
     cpu_mask_tbl[4] = IE_IRQ5;
     cpu_irq_nr[4] = FPU;
 
+    dec_halt_init(&irq10);
 }				/* dec_init_kn02ca */
 
 /*
@@ -430,9 +408,10 @@
     /*
      * Setup some memory addresses. FIXME: probably incomplete!
      */
+    ioasic_base = (void *) KN03_IOASIC_BASE;
     dec_rtc_base = (char *) KN03_RTC_BASE;
-    isr = (volatile unsigned int *) KN03_SIR_ADDR;
-    imr = (volatile unsigned int *) KN03_SIRM_ADDR;
+    isr = (void *) KN03_IOASIC_REG(SIR);
+    imr = (void *) KN03_IOASIC_REG(SIMR);
 
     /*
      * Setup IOASIC interrupt
@@ -500,4 +479,5 @@
     cpu_mask_tbl[4] = IE_IRQ5;
     cpu_irq_nr[4] = FPU;
 
+    dec_halt_init(&irq10);
 }				/* dec_init_kn03 */
diff -urN linux-2.4.10-pre6/arch/mips/dec/time.c linux/arch/mips/dec/time.c
--- linux-2.4.10-pre6/arch/mips/dec/time.c	Mon Oct 16 12:58:51 2000
+++ linux/arch/mips/dec/time.c	Mon Dec  3 23:08:45 2001
@@ -1,8 +1,8 @@
-
 /*
- *  linux/arch/mips/kernel/time.c
+ *  linux/arch/mips/dec/time.c
  *
  *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
+ *  Copyright (C) 2000  Maciej W. Rozycki
  *
  * This file contains the time handling details for PC-style clocks as
  * found in some MIPS systems.
@@ -17,14 +17,22 @@
 #include <linux/mm.h>
 #include <linux/interrupt.h>
 
+#include <asm/cpu.h>
 #include <asm/bootinfo.h>
 #include <asm/mipsregs.h>
 #include <asm/io.h>
 #include <asm/irq.h>
+#include <asm/dec/machtype.h>
+#include <asm/dec/ioasic.h>
+#include <asm/dec/ioasic_addrs.h>
 
 #include <linux/mc146818rtc.h>
 #include <linux/timex.h>
 
+#include <asm/div64.h>
+
+extern void (*board_time_init)(struct irqaction *irq);
+
 extern volatile unsigned long wall_jiffies;
 extern rwlock_t xtime_lock;
 
@@ -36,12 +44,22 @@
 
 /* This is for machines which generate the exact clock. */
 #define USECS_PER_JIFFY (1000000/HZ)
+#define USECS_PER_JIFFY_FRAC ((1000000ULL << 32) / HZ & 0xffffffff)
 
 /* Cycle counter value at the previous timer interrupt.. */
 
 static unsigned int timerhi, timerlo;
 
 /*
+ * Cached "1/(clocks per usec)*2^32" value.
+ * It has to be recalculated once each jiffy.
+ */
+static unsigned long cached_quotient = 0;
+
+/* Last jiffy when do_fast_gettimeoffset() was called. */
+static unsigned long last_jiffies = 0;
+
+/*
  * On MIPS only R4000 and better have a cycle counter.
  *
  * FIXME: Does playing with the RP bit in c0_status interfere with this code?
@@ -50,45 +68,34 @@
 {
 	u32 count;
 	unsigned long res, tmp;
-
-	/* Last jiffy when do_fast_gettimeoffset() was called. */
-	static unsigned long last_jiffies = 0;
 	unsigned long quotient;
 
-	/*
-	 * Cached "1/(clocks per usec)*2^32" value.
-	 * It has to be recalculated once each jiffy.
-	 */
-	static unsigned long cached_quotient = 0;
-
 	tmp = jiffies;
 
 	quotient = cached_quotient;
 
-	if (tmp && last_jiffies != tmp) {
-		last_jiffies = tmp;
-		__asm__(".set\tnoreorder\n\t"
-			".set\tnoat\n\t"
-			".set\tmips3\n\t"
-			"lwu\t%0,%2\n\t"
-			"dsll32\t$1,%1,0\n\t"
-			"or\t$1,$1,%0\n\t"
-			"ddivu\t$0,$1,%3\n\t"
-			"mflo\t$1\n\t"
-			"dsll32\t%0,%4,0\n\t"
-			"nop\n\t"
-			"ddivu\t$0,%0,$1\n\t"
-			"mflo\t%0\n\t"
-			".set\tmips0\n\t"
-			".set\tat\n\t"
-			".set\treorder"
-			:"=&r"(quotient)
-			:"r"(timerhi),
-			"m"(timerlo),
-			"r"(tmp),
-			"r"(USECS_PER_JIFFY)
-			:"$1");
+	if (last_jiffies != tmp) {
+	    last_jiffies = tmp;
+	    if (last_jiffies != 0) {
+		unsigned long r0;
+		__asm__(".set	push\n\t"
+			".set	mips3\n\t"
+			"lwu	%0,%3\n\t"
+			"dsll32	%1,%2,0\n\t"
+			"or	%1,%1,%0\n\t"
+			"ddivu	$0,%1,%4\n\t"
+			"mflo	%1\n\t"
+			"dsll32	%0,%5,0\n\t"
+			"or	%0,%0,%6\n\t"
+			"ddivu	$0,%0,%1\n\t"
+			"mflo	%0\n\t"
+			".set	pop"
+			: "=&r" (quotient), "=&r" (r0)
+			: "r" (timerhi), "m" (timerlo),
+			  "r" (tmp), "r" (USECS_PER_JIFFY),
+			  "r" (USECS_PER_JIFFY_FRAC));
 		cached_quotient = quotient;
+	    }
 	}
 	/* Get last timer tick in absolute kernel time */
 	count = read_32bit_cp0_register(CP0_COUNT);
@@ -97,11 +104,9 @@
 	count -= timerlo;
 //printk("count: %08lx, %08lx:%08lx\n", count, timerhi, timerlo);
 
-	__asm__("multu\t%1,%2\n\t"
-		"mfhi\t%0"
-		:"=r"(res)
-		:"r"(count),
-		"r"(quotient));
+	__asm__("multu	%2,%3"
+		: "=l" (tmp), "=h" (res)
+		: "r" (count), "r" (quotient));
 
 	/*
 	 * Due to possible jiffies inconsistencies, we need to check 
@@ -113,6 +118,47 @@
 	return res;
 }
 
+static unsigned long do_ioasic_gettimeoffset(void)
+{
+	u32 count;
+	unsigned long res, tmp;
+	unsigned long quotient;
+
+	tmp = jiffies;
+
+	quotient = cached_quotient;
+
+	if (last_jiffies != tmp) {
+		last_jiffies = tmp;
+		if (last_jiffies != 0) {
+			unsigned long r0;
+			do_div64_32(r0, timerhi, timerlo, tmp);
+			do_div64_32(quotient, USECS_PER_JIFFY,
+				    USECS_PER_JIFFY_FRAC, r0);
+			cached_quotient = quotient;
+		}
+	}
+	/* Get last timer tick in absolute kernel time */
+	count = ioasic_read(FCTR);
+
+	/* .. relative to previous jiffy (32 bits is enough) */
+	count -= timerlo;
+//printk("count: %08x, %08x:%08x\n", count, timerhi, timerlo);
+
+	__asm__("multu	%2,%3"
+		: "=l" (tmp), "=h" (res)
+		: "r" (count), "r" (quotient));
+
+	/*
+	 * Due to possible jiffies inconsistencies, we need to check
+	 * the result so that we'll get a timer that is monotonic.
+	 */
+	if (res >= USECS_PER_JIFFY)
+        	res = USECS_PER_JIFFY - 1;
+
+	return res;
+}
+
 /* This function must be called with interrupts disabled 
  * It was inspired by Steve McCanne's microtime-i386 for BSD.  -- jrs
  * 
@@ -170,8 +216,8 @@
 	tv->tv_usec += do_gettimeoffset();
 
 	/*
-	 * xtime is atomically updated in timer_bh. lost_ticks is
-	 * nonzero if the timer bottom half hasnt executed yet.
+	 * xtime is atomically updated in timer_bh. jiffies - wall_jiffies
+	 * is nonzero if the timer bottom half hasnt executed yet.
 	 */
 	if (jiffies - wall_jiffies)
 		tv->tv_usec += USECS_PER_JIFFY;
@@ -187,6 +233,7 @@
 void do_settimeofday(struct timeval *tv)
 {
 	write_lock_irq(&xtime_lock);
+
 	/* This is revolting. We need to set the xtime.tv_usec
 	 * correctly. However, the value in this location is
 	 * is value at the last tick.
@@ -199,10 +246,13 @@
 		tv->tv_usec += 1000000;
 		tv->tv_sec--;
 	}
+
 	xtime = *tv;
-	time_state = TIME_BAD;
-	time_maxerror = MAXPHASE;
-	time_esterror = MAXPHASE;
+	time_adjust = 0;		/* stop active adjtime() */
+	time_status |= STA_UNSYNC;
+	time_maxerror = NTP_PHASE_LIMIT;
+	time_esterror = NTP_PHASE_LIMIT;
+
 	write_unlock_irq(&xtime_lock);
 }
 
@@ -307,13 +357,16 @@
 	 * called as close as possible to 500 ms before the new second starts.
 	 */
 	read_lock(&xtime_lock);
-	if (time_state != TIME_BAD && xtime.tv_sec > last_rtc_update + 660 &&
-	    xtime.tv_usec > 500000 - (tick >> 1) &&
-	    xtime.tv_usec < 500000 + (tick >> 1))
+	if ((time_status & STA_UNSYNC) == 0
+	    && xtime.tv_sec > last_rtc_update + 660
+	    && xtime.tv_usec >= 500000 - tick / 2
+	    && xtime.tv_usec <= 500000 + tick / 2) {
 		if (set_rtc_mmss(xtime.tv_sec) == 0)
 			last_rtc_update = xtime.tv_sec;
 		else
-			last_rtc_update = xtime.tv_sec - 600;	/* do it again in 60 s */
+			/* do it again in 60 s */
+			last_rtc_update = xtime.tv_sec - 600;
+	}
 	/* As we return to user mode fire off the other CPU schedulers.. this is
 	   basically because we don't yet share IRQ's around. This message is
 	   rigged to be safe on the 386 - basically it's a hack, so don't look
@@ -334,66 +387,50 @@
 	timerhi += (count < timerlo);	/* Wrap around */
 	timerlo = count;
 
-	timer_interrupt(irq, dev_id, regs);
-
-	if (!jiffies) {
+	if (jiffies == ~0) {
 		/*
-		 * If jiffies has overflowed in this timer_interrupt we must
+		 * If jiffies is to overflow in this timer_interrupt we must
 		 * update the timer[hi]/[lo] to make do_fast_gettimeoffset()
 		 * quotient calc still valid. -arca
 		 */
+		write_32bit_cp0_register(CP0_COUNT, 0);
 		timerhi = timerlo = 0;
 	}
-}
 
-char cyclecounter_available;
+	timer_interrupt(irq, dev_id, regs);
+}
 
-static inline void init_cycle_counter(void)
+static void ioasic_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 {
-	switch (mips_cputype) {
-	case CPU_UNKNOWN:
-	case CPU_R2000:
-	case CPU_R3000:
-	case CPU_R3000A:
-	case CPU_R3041:
-	case CPU_R3051:
-	case CPU_R3052:
-	case CPU_R3081:
-	case CPU_R3081E:
-	case CPU_R6000:
-	case CPU_R6000A:
-	case CPU_R8000:	/* Not shure about that one, play safe */
-		cyclecounter_available = 0;
-		break;
-	case CPU_R4000PC:
-	case CPU_R4000SC:
-	case CPU_R4000MC:
-	case CPU_R4200:
-	case CPU_R4400PC:
-	case CPU_R4400SC:
-	case CPU_R4400MC:
-	case CPU_R4600:
-	case CPU_R10000:
-	case CPU_R4300:
-	case CPU_R4650:
-	case CPU_R4700:
-	case CPU_R5000:
-	case CPU_R5000A:
-	case CPU_R4640:
-	case CPU_NEVADA:
-		cyclecounter_available = 1;
-		break;
+	unsigned int count;
+
+	/*
+	 * The free-running counter is 32 bit which is good for about
+	 * 2 minutes, 50 seconds at possible count rates of upto 25MHz.
+	 */
+	count = ioasic_read(FCTR);
+	timerhi += (count < timerlo);	/* Wrap around */
+	timerlo = count;
+
+	if (jiffies == ~0) {
+		/*
+		 * If jiffies is to overflow in this timer_interrupt we must
+		 * update the timer[hi]/[lo] to make do_fast_gettimeoffset()
+		 * quotient calc still valid. -arca
+		 */
+		ioasic_write(FCTR, 0);
+		timerhi = timerlo = 0;
 	}
+
+	timer_interrupt(irq, dev_id, regs);
 }
 
 struct irqaction irq0 = {timer_interrupt, SA_INTERRUPT, 0,
 			 "timer", NULL, NULL};
 
-void (*board_time_init) (struct irqaction * irq);
-
 void __init time_init(void)
 {
-	unsigned int year, mon, day, hour, min, sec;
+	unsigned int year, mon, day, hour, min, sec, real_year;
 	int i;
 
 	/* The Linux interpretation of the CMOS clock register contents:
@@ -425,23 +462,26 @@
 		BCD_TO_BIN(year);
 	}
 	/*
-	 * The DECstation RTC is used as a TOY (Time Of Year).
-	 * The PROM will reset the year to either '70, '71 or '72.
-	 * This hack will only work until Dec 31 2001.
+	 * The PROM will reset the year to either '72 or '73.
+	 * Therefore we store the real year separately, in one
+	 * of unused BBU RAM locations.
 	 */
-	year += 1928;
+	real_year = CMOS_READ(RTC_DEC_YEAR);
+	year += real_year - 72 + 2000;
 
 	write_lock_irq(&xtime_lock);
 	xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
 	xtime.tv_usec = 0;
 	write_unlock_irq(&xtime_lock);
 
-	init_cycle_counter();
-
-	if (cyclecounter_available) {
+	if (mips_cpu.options & MIPS_CPU_COUNTER) {
 		write_32bit_cp0_register(CP0_COUNT, 0);
 		do_gettimeoffset = do_fast_gettimeoffset;
 		irq0.handler = r4k_timer_interrupt;
-	}
+	} else if (IOASIC) {
+		ioasic_write(FCTR, 0);
+		do_gettimeoffset = do_ioasic_gettimeoffset;
+		irq0.handler = ioasic_timer_interrupt;
+        }
 	board_time_init(&irq0);
 }
diff -urN linux-2.4.10-pre6/arch/mips/defconfig linux/arch/mips/defconfig
--- linux-2.4.10-pre6/arch/mips/defconfig	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/defconfig	Mon Dec  3 23:08:45 2001
@@ -1,6 +1,8 @@
 #
 # Automatically generated make config: don't edit
 #
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
 
 #
 # Code maturity level options
@@ -13,21 +15,37 @@
 # CONFIG_ACER_PICA_61 is not set
 # CONFIG_ALGOR_P4032 is not set
 # CONFIG_BAGET_MIPS is not set
-# CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_NINO is not set
 # CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
 # CONFIG_OLIVETTI_M700 is not set
 CONFIG_SGI_IP22=y
 # CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 # CONFIG_MCA is not set
 # CONFIG_SBUS is not set
 CONFIG_ARC32=y
+CONFIG_BOARD_SCACHE=y
 CONFIG_PC_KEYB=y
 CONFIG_SGI=y
+CONFIG_NEW_IRQ=y
+CONFIG_OLD_TIME_C=y
 # CONFIG_ISA is not set
 # CONFIG_EISA is not set
 # CONFIG_PCI is not set
+# CONFIG_I8259 is not set
 
 #
 # Loadable module support
@@ -41,14 +59,20 @@
 #
 # CONFIG_CPU_R3000 is not set
 # CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
 # CONFIG_CPU_R4300 is not set
 # CONFIG_CPU_R4X00 is not set
 CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_RM7000 is not set
 # CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
 # CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
 # CONFIG_CPU_ADVANCED is not set
 CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
 # CONFIG_CPU_HAS_WB is not set
 
 #
@@ -59,24 +83,26 @@
 CONFIG_ELF_KERNEL=y
 CONFIG_BINFMT_IRIX=y
 CONFIG_FORWARD_KEYBOARD=y
+# CONFIG_ARC_CONSOLE is not set
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
 CONFIG_NET=y
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 
 #
-# Parallel port support
+# Memory Technology Devices (MTD)
 #
-# CONFIG_PARPORT is not set
-# CONFIG_PCMCIA is not set
+# CONFIG_MTD is not set
 
 #
-# Memory Technology Devices (MTD)
+# Parallel port support
 #
-# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
 
 #
 # Block devices
@@ -107,19 +133,24 @@
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK=y
+CONFIG_RTNETLINK=y
+CONFIG_NETLINK_DEV=y
 # CONFIG_NETFILTER is not set
 # CONFIG_FILTER is not set
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_MULTICAST=y
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
 # CONFIG_INET_ECN is not set
 # CONFIG_SYN_COOKIES is not set
 # CONFIG_IPV6 is not set
@@ -148,6 +179,13 @@
 # CONFIG_NET_SCHED is not set
 
 #
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
 # SCSI support
 #
 CONFIG_SCSI=y
@@ -175,7 +213,7 @@
 #
 # SCSI low-level drivers
 #
-CONFIG_SCSI_SGIWD93=y
+CONFIG_SGIWD93_SCSI=y
 # CONFIG_SCSI_7000FASST is not set
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AHA152X is not set
@@ -183,6 +221,7 @@
 # CONFIG_SCSI_AHA1740 is not set
 # CONFIG_SCSI_AIC7XXX is not set
 # CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
 # CONFIG_SCSI_AM53C974 is not set
@@ -199,6 +238,7 @@
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
 # CONFIG_SCSI_NCR53C7xx is not set
 # CONFIG_SCSI_PAS16 is not set
 # CONFIG_SCSI_PCI2000 is not set
@@ -215,20 +255,159 @@
 # Network device support
 #
 CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
 # CONFIG_DUMMY is not set
-# CONFIG_SLIP is not set
-# CONFIG_PPP is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
 CONFIG_SGISEEQ=y
 
 #
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
 # SGI Character devices
 #
 CONFIG_VT=y
 CONFIG_VT_CONSOLE=y
 CONFIG_SGI_NEWPORT_CONSOLE=y
 CONFIG_FONT_8x16=y
-# CONFIG_SGI_PROM_CONSOLE is not set
-# CONFIG_UNIX98_PTYS is not set
+# CONFIG_PSMOUSE is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
 
 #
 # File systems
@@ -238,22 +417,30 @@
 CONFIG_AUTOFS4_FS=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 CONFIG_ISO9660_FS=y
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -261,13 +448,12 @@
 # CONFIG_DEVFS_FS is not set
 # CONFIG_DEVFS_MOUNT is not set
 # CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
+CONFIG_DEVPTS_FS=y
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_QNX4FS_RW is not set
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -277,6 +463,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
 CONFIG_ROOT_NFS=y
@@ -309,6 +496,7 @@
 # CONFIG_MINIX_SUBPARTITION is not set
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
 CONFIG_SGI_PARTITION=y
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
@@ -319,7 +507,7 @@
 # Console drivers
 #
 # CONFIG_VGA_CONSOLE is not set
-# CONFIG_FB is not set
+# CONFIG_MDA_CONSOLE is not set
 
 #
 # Frame-buffer support
@@ -345,13 +533,111 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_MIPS_FPE_MODULE is not set
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-atlas linux/arch/mips/defconfig-atlas
--- linux-2.4.10-pre6/arch/mips/defconfig-atlas	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/defconfig-atlas	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,604 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_ALGOR_P4032 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+CONFIG_MIPS_ATLAS=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_NINO is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_PCI=y
+CONFIG_SWAP_IO_SPACE=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_I8259 is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+# CONFIG_CPU_HAS_WB is not set
+
+#
+# General setup
+#
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_KCORE_ELF=y
+CONFIG_ELF_KERNEL=y
+CONFIG_BINFMT_IRIX=y
+# CONFIG_FORWARD_KEYBOARD is not set
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+# CONFIG_PCI_NAMES is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_SYSCTL is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_SD_EXTRA_DEVS=40
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_DEBUG_QUEUES is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AHA1740 is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_DMA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
+# CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_NCR53C8XX is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_SIM710 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+CONFIG_EFS_FS=y
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
+# CONFIG_LL_DEBUG is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-cobalt linux/arch/mips/defconfig-cobalt
--- linux-2.4.10-pre6/arch/mips/defconfig-cobalt	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/defconfig-cobalt	Wed Dec 31 16:00:00 1969
@@ -1,598 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_ALGOR_P4032 is not set
-# CONFIG_BAGET_MIPS is not set
-CONFIG_COBALT_MICRO_SERVER=y
-CONFIG_COBALT_28=y
-# CONFIG_DECSTATION is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_MCA is not set
-# CONFIG_SBUS is not set
-CONFIG_COBALT_27=y
-CONFIG_COBALT_LCD=y
-CONFIG_COBALT_SERIAL=y
-CONFIG_PCI=y
-# CONFIG_ISA is not set
-# CONFIG_EISA is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_R5000 is not set
-CONFIG_CPU_NEVADA=y
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_WB is not set
-
-#
-# General setup
-#
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_KCORE_ELF=y
-CONFIG_ELF_KERNEL=y
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=m
-CONFIG_NET=y
-CONFIG_PCI_NAMES=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_PCMCIA is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=m
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-# CONFIG_UNIX is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-CONFIG_IP_MROUTE=y
-# CONFIG_IP_PIMSM_V1 is not set
-# CONFIG_IP_PIMSM_V2 is not set
-# CONFIG_INET_ECN is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-
-#
-#  
-#
-CONFIG_IPX=m
-# CONFIG_IPX_INTERN is not set
-CONFIG_ATALK=m
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-# CONFIG_PHONE_IXJ is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_SD_EXTRA_DEVS=40
-CONFIG_CHR_DEV_ST=m
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=m
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-CONFIG_SR_EXTRA_DEVS=2
-CONFIG_CHR_DEV_SG=m
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_DEBUG_QUEUES is not set
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_7000FASST is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AHA152X is not set
-# CONFIG_SCSI_AHA1542 is not set
-# CONFIG_SCSI_AHA1740 is not set
-CONFIG_SCSI_AIC7XXX=y
-CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
-CONFIG_AIC7XXX_RESET_DELAY=5
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_IN2000 is not set
-# CONFIG_SCSI_AM53C974 is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_DTC3280 is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_DMA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_GENERIC_NCR5380 is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_NCR53C406A is not set
-# CONFIG_SCSI_NCR53C7xx is not set
-CONFIG_SCSI_NCR53C8XX=y
-# CONFIG_SCSI_SYM53C8XX is not set
-CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS=8
-CONFIG_SCSI_NCR53C8XX_MAX_TAGS=4
-CONFIG_SCSI_NCR53C8XX_SYNC=5
-# CONFIG_SCSI_NCR53C8XX_PROFILE is not set
-CONFIG_SCSI_NCR53C8XX_IOMAPPED=y
-# CONFIG_SCSI_NCR53C8XX_SYMBIOS_COMPAT is not set
-# CONFIG_SCSI_PAS16 is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_PSI240I is not set
-# CONFIG_SCSI_QLOGIC_FAS is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_SIM710 is not set
-# CONFIG_SCSI_SYM53C416 is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_T128 is not set
-# CONFIG_SCSI_U14_34F is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_PCI is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Appletalk devices
-#
-# CONFIG_APPLETALK is not set
-CONFIG_DUMMY=m
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_ASYNC is not set
-# CONFIG_PPP_SYNC_TTY is not set
-# CONFIG_PPP_DEFLATE is not set
-# CONFIG_PPP_BSDCOMP is not set
-# CONFIG_PPPOE is not set
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-# CONFIG_SLIP_MODE_SLIP6 is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# ISDN subsystem
-#
-CONFIG_ISDN=m
-CONFIG_ISDN_PPP=y
-CONFIG_ISDN_PPP_VJ=y
-CONFIG_ISDN_MPP=y
-# CONFIG_ISDN_PPP_BSDCOMP is not set
-CONFIG_ISDN_AUDIO=y
-# CONFIG_ISDN_TTY_FAX is not set
-
-#
-# ISDN feature submodules
-#
-# CONFIG_ISDN_DRV_LOOP is not set
-# CONFIG_ISDN_DIVERSION is not set
-
-#
-# low-level hardware drivers
-#
-
-#
-# Passive ISDN cards
-#
-CONFIG_ISDN_DRV_HISAX=m
-
-#
-#   D-channel protocol features
-#
-CONFIG_HISAX_EURO=y
-CONFIG_DE_AOC=y
-# CONFIG_HISAX_NO_SENDCOMPLETE is not set
-# CONFIG_HISAX_NO_LLC is not set
-# CONFIG_HISAX_NO_KEYPAD is not set
-CONFIG_HISAX_1TR6=y
-# CONFIG_HISAX_NI1 is not set
-
-#
-#   HiSax supported cards
-#
-# CONFIG_HISAX_16_0 is not set
-# CONFIG_HISAX_16_3 is not set
-# CONFIG_HISAX_TELESPCI is not set
-# CONFIG_HISAX_S0BOX is not set
-# CONFIG_HISAX_AVM_A1 is not set
-# CONFIG_HISAX_FRITZPCI is not set
-# CONFIG_HISAX_AVM_A1_PCMCIA is not set
-CONFIG_HISAX_ELSA=y
-# CONFIG_HISAX_IX1MICROR2 is not set
-# CONFIG_HISAX_DIEHLDIVA is not set
-# CONFIG_HISAX_ASUSCOM is not set
-# CONFIG_HISAX_TELEINT is not set
-# CONFIG_HISAX_HFCS is not set
-# CONFIG_HISAX_SEDLBAUER is not set
-# CONFIG_HISAX_SPORTSTER is not set
-# CONFIG_HISAX_MIC is not set
-# CONFIG_HISAX_NETJET is not set
-# CONFIG_HISAX_NETJET_U is not set
-# CONFIG_HISAX_NICCY is not set
-# CONFIG_HISAX_ISURF is not set
-# CONFIG_HISAX_HSTSAPHIR is not set
-# CONFIG_HISAX_BKM_A4T is not set
-# CONFIG_HISAX_SCT_QUADRO is not set
-# CONFIG_HISAX_GAZEL is not set
-# CONFIG_HISAX_HFC_PCI is not set
-# CONFIG_HISAX_W6692 is not set
-# CONFIG_HISAX_HFC_SX is not set
-# CONFIG_HISAX_SEDLBAUER_CS is not set
-
-#
-# Active ISDN cards
-#
-# CONFIG_ISDN_DRV_ICN is not set
-# CONFIG_ISDN_DRV_PCBIT is not set
-# CONFIG_ISDN_DRV_SC is not set
-# CONFIG_ISDN_DRV_ACT2000 is not set
-# CONFIG_ISDN_DRV_EICON is not set
-# CONFIG_ISDN_CAPI is not set
-# CONFIG_HYSDN is not set
-# CONFIG_HYSDN_CAPI is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-CONFIG_QUOTA=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-# CONFIG_UMSDOS_FS is not set
-CONFIG_VFAT_FS=m
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_RAMFS is not set
-CONFIG_ISO9660_FS=m
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_SMB_NLS=y
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_ISO8859_9=m
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_UTF8=m
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_CROSSCOMPILE is not set
-# CONFIG_MIPS_FPE_MODULE is not set
-# CONFIG_MAGIC_SYSRQ is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-ddb5476 linux/arch/mips/defconfig-ddb5476
--- linux-2.4.10-pre6/arch/mips/defconfig-ddb5476	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/defconfig-ddb5476	Mon Dec  3 23:08:45 2001
@@ -25,19 +25,25 @@
 # CONFIG_MIPS_MAGNUM_4000 is not set
 # CONFIG_MOMENCO_OCELOT is not set
 CONFIG_DDB5476=y
+# CONFIG_DDB5477 is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set
 # CONFIG_MIPS_ITE8172 is not set
 # CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 # CONFIG_MCA is not set
 # CONFIG_SBUS is not set
-CONFIG_I8259=y
 CONFIG_ISA=y
 CONFIG_PCI=y
 CONFIG_PC_KEYB=y
 CONFIG_ROTTEN_IRQ=y
+CONFIG_HAVE_STD_PC_SERIAL_PORT=y
+CONFIG_NEW_TIME_C=y
 CONFIG_EISA=y
+# CONFIG_I8259 is not set
 
 #
 # Loadable module support
@@ -48,26 +54,27 @@
 # CPU selection
 #
 # CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R3912 is not set
 # CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
 # CONFIG_CPU_R4300 is not set
 # CONFIG_CPU_R4X00 is not set
 # CONFIG_CPU_R5000 is not set
 CONFIG_CPU_R5432=y
 # CONFIG_CPU_RM7000 is not set
 # CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
 # CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
 # CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
 # CONFIG_CPU_ADVANCED is not set
 CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
 # CONFIG_CPU_HAS_WB is not set
 
 #
 # General setup
 #
 CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_FPU_EMULATOR=y
 CONFIG_KCORE_ELF=y
 CONFIG_ELF_KERNEL=y
 # CONFIG_BINFMT_AOUT is not set
@@ -75,21 +82,18 @@
 # CONFIG_BINFMT_MISC is not set
 CONFIG_NET=y
 # CONFIG_PCI_NAMES is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 
 #
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
 # Plug and Play configuration
 #
 # CONFIG_PNP is not set
 # CONFIG_ISAPNP is not set
-# CONFIG_PCMCIA is not set
+# CONFIG_PNPBIOS is not set
 
 #
 # Memory Technology Devices (MTD)
@@ -97,6 +101,11 @@
 # CONFIG_MTD is not set
 
 #
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
 # Block devices
 #
 # CONFIG_BLK_DEV_FD is not set
@@ -134,6 +143,7 @@
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
@@ -170,6 +180,7 @@
 #
 # CONFIG_PHONE is not set
 # CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
 
 #
 # ATA/IDE/MFM/RLL support
@@ -213,6 +224,7 @@
 CONFIG_BLK_DEV_IDEPCI=y
 # CONFIG_IDEPCI_SHARE_IRQ is not set
 # CONFIG_BLK_DEV_IDEDMA_PCI is not set
+# CONFIG_BLK_DEV_ADMA is not set
 # CONFIG_BLK_DEV_OFFBOARD is not set
 # CONFIG_IDEDMA_PCI_AUTO is not set
 # CONFIG_BLK_DEV_IDEDMA is not set
@@ -222,8 +234,8 @@
 # CONFIG_AEC62XX_TUNING is not set
 # CONFIG_BLK_DEV_ALI15X3 is not set
 # CONFIG_WDC_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD7409 is not set
-# CONFIG_AMD7409_OVERRIDE is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_AMD74XX_OVERRIDE is not set
 # CONFIG_BLK_DEV_CMD64X is not set
 # CONFIG_BLK_DEV_CY82C693 is not set
 # CONFIG_BLK_DEV_CS5530 is not set
@@ -234,7 +246,8 @@
 # CONFIG_BLK_DEV_OPTI621 is not set
 # CONFIG_BLK_DEV_PDC202XX is not set
 # CONFIG_PDC202XX_BURST is not set
-# CONFIG_BLK_DEV_OSB4 is not set
+# CONFIG_PDC202XX_FORCE is not set
+# CONFIG_BLK_DEV_SVWKS is not set
 # CONFIG_BLK_DEV_SIS5513 is not set
 # CONFIG_BLK_DEV_SLC90E66 is not set
 # CONFIG_BLK_DEV_TRM290 is not set
@@ -243,6 +256,9 @@
 # CONFIG_IDEDMA_AUTO is not set
 # CONFIG_DMA_NONPCI is not set
 # CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
 
 #
 # SCSI support
@@ -250,16 +266,6 @@
 # CONFIG_SCSI is not set
 
 #
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_PCI is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
 # Network device support
 #
 CONFIG_NETDEVICES=y
@@ -272,12 +278,17 @@
 # CONFIG_BONDING is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
 
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_LANCE is not set
 # CONFIG_NET_VENDOR_SMC is not set
@@ -293,25 +304,28 @@
 # CONFIG_APRICOT is not set
 # CONFIG_CS89x0 is not set
 CONFIG_TULIP=y
+# CONFIG_TULIP_MWI is not set
+# CONFIG_TULIP_MMIO is not set
 # CONFIG_DE4X5 is not set
 # CONFIG_DGRS is not set
 # CONFIG_DM9102 is not set
 CONFIG_EEPRO100=y
-# CONFIG_EEPRO100_PM is not set
 # CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
 CONFIG_NE2K_PCI=y
 # CONFIG_NE3210 is not set
 # CONFIG_ES3210 is not set
 # CONFIG_8139TOO is not set
-# CONFIG_RTL8129 is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_WINBOND_840 is not set
-# CONFIG_HAPPYMEAL is not set
 # CONFIG_LAN_SAA9730 is not set
 # CONFIG_NET_POCKET is not set
 
@@ -319,11 +333,15 @@
 # Ethernet (1000 Mbit)
 #
 # CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
 
@@ -346,6 +364,16 @@
 # CONFIG_WAN is not set
 
 #
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
 # ISDN subsystem
 #
 # CONFIG_ISDN is not set
@@ -364,7 +392,8 @@
 CONFIG_SERIAL_CONSOLE=y
 # CONFIG_SERIAL_EXTENDED is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_UNIX98_PTYS is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
 
 #
 # I2C support
@@ -383,7 +412,11 @@
 #
 # Joysticks
 #
-# CONFIG_JOYSTICK is not set
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
 
 #
 # Input core support is needed for joysticks
@@ -400,6 +433,7 @@
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
 
 #
 # Ftape, the floppy tape device driver
@@ -421,22 +455,30 @@
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 # CONFIG_ISO9660_FS is not set
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -444,13 +486,12 @@
 # CONFIG_DEVFS_FS is not set
 # CONFIG_DEVFS_MOUNT is not set
 # CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
+CONFIG_DEVPTS_FS=y
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_QNX4FS_RW is not set
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -460,6 +501,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
 CONFIG_ROOT_NFS=y
@@ -490,7 +532,7 @@
 # Console drivers
 #
 # CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
+# CONFIG_MDA_CONSOLE is not set
 
 #
 # Frame-buffer support
@@ -501,11 +543,13 @@
 # CONFIG_FB_CLGEN is not set
 # CONFIG_FB_PM2 is not set
 # CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_E1355 is not set
 # CONFIG_FB_MATROX is not set
 # CONFIG_FB_ATY is not set
+# CONFIG_FB_RADEON is not set
 # CONFIG_FB_ATY128 is not set
-CONFIG_FB_3DFX=y
 # CONFIG_FB_SIS is not set
+CONFIG_FB_3DFX=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FBCON_ADVANCED is not set
 CONFIG_FBCON_CFB8=y
@@ -527,15 +571,114 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
 # CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
 # CONFIG_LL_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-ddb5477 linux/arch/mips/defconfig-ddb5477
--- linux-2.4.10-pre6/arch/mips/defconfig-ddb5477	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/defconfig-ddb5477	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,565 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_ALGOR_P4032 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_NINO is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+CONFIG_DDB5477=y
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_PCI=y
+CONFIG_NEW_TIME_C=y
+CONFIG_NEW_IRQ=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_I8259 is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+CONFIG_CPU_R5432=y
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+# CONFIG_CPU_HAS_WB is not set
+
+#
+# General setup
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_KCORE_ELF=y
+CONFIG_ELF_KERNEL=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+# CONFIG_PCI_NAMES is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+CONFIG_TULIP=y
+# CONFIG_TULIP_MWI is not set
+# CONFIG_TULIP_MMIO is not set
+# CONFIG_DE4X5 is not set
+# CONFIG_DGRS is not set
+# CONFIG_DM9102 is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NE3210 is not set
+# CONFIG_ES3210 is not set
+# CONFIG_8139TOO is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_WINBOND_840 is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_UNIX98_PTYS is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+# CONFIG_DEVPTS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
+CONFIG_LL_DEBUG=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-decstation linux/arch/mips/defconfig-decstation
--- linux-2.4.10-pre6/arch/mips/defconfig-decstation	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/defconfig-decstation	Mon Dec  3 23:08:45 2001
@@ -1,6 +1,8 @@
 #
 # Automatically generated make config: don't edit
 #
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
 
 #
 # Code maturity level options
@@ -13,18 +15,31 @@
 # CONFIG_ACER_PICA_61 is not set
 # CONFIG_ALGOR_P4032 is not set
 # CONFIG_BAGET_MIPS is not set
-# CONFIG_COBALT_MICRO_SERVER is not set
 CONFIG_DECSTATION=y
 # CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_NINO is not set
 # CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 # CONFIG_MCA is not set
 # CONFIG_SBUS is not set
 # CONFIG_ISA is not set
 # CONFIG_EISA is not set
 # CONFIG_PCI is not set
+# CONFIG_I8259 is not set
 
 #
 # Loadable module support
@@ -38,15 +53,21 @@
 #
 CONFIG_CPU_R3000=y
 # CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
 # CONFIG_CPU_R4300 is not set
 # CONFIG_CPU_R4X00 is not set
 # CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_RM7000 is not set
 # CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
 # CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
 # CONFIG_CPU_ADVANCED is not set
 # CONFIG_CPU_HAS_LLSC is not set
-CONFIG_CPU_HAS_WB=y
+# CONFIG_CPU_HAS_LLDSCD is not set
+# CONFIG_CPU_HAS_WB is not set
 
 #
 # General setup
@@ -58,16 +79,12 @@
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
 CONFIG_NET=y
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
 CONFIG_TC=y
-# CONFIG_PCMCIA is not set
 
 #
 # Memory Technology Devices (MTD)
@@ -75,6 +92,11 @@
 # CONFIG_MTD is not set
 
 #
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
 # Block devices
 #
 # CONFIG_BLK_DEV_FD is not set
@@ -112,6 +134,7 @@
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
@@ -144,6 +167,13 @@
 # CONFIG_NET_SCHED is not set
 
 #
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
 # SCSI support
 #
 CONFIG_SCSI=y
@@ -178,6 +208,7 @@
 # CONFIG_SCSI_AHA1740 is not set
 # CONFIG_SCSI_AIC7XXX is not set
 # CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
 # CONFIG_SCSI_AM53C974 is not set
@@ -194,6 +225,7 @@
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
 # CONFIG_SCSI_NCR53C7xx is not set
 # CONFIG_SCSI_PAS16 is not set
 # CONFIG_SCSI_PCI2000 is not set
@@ -210,12 +242,149 @@
 # Network device support
 #
 CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
 # CONFIG_DUMMY is not set
-# CONFIG_SLIP is not set
-# CONFIG_PPP is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
 CONFIG_DECLANCE=y
 
 #
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
 # DECStation Character devices
 #
 # CONFIG_VT is not set
@@ -223,7 +392,8 @@
 # CONFIG_DZ is not set
 CONFIG_ZS=y
 CONFIG_SERIAL_CONSOLE=y
-# CONFIG_UNIX98_PTYS is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
 # CONFIG_RTC is not set
 
 #
@@ -234,22 +404,30 @@
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 # CONFIG_ISO9660_FS is not set
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -257,13 +435,12 @@
 # CONFIG_DEVFS_FS is not set
 # CONFIG_DEVFS_MOUNT is not set
 # CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
+CONFIG_DEVPTS_FS=y
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_QNX4FS_RW is not set
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -273,6 +450,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 # CONFIG_NFS_FS is not set
 # CONFIG_NFS_V3 is not set
 # CONFIG_ROOT_NFS is not set
@@ -305,6 +483,7 @@
 # CONFIG_MINIX_SUBPARTITION is not set
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
 # CONFIG_SGI_PARTITION is not set
 CONFIG_ULTRIX_PARTITION=y
 # CONFIG_SUN_PARTITION is not set
@@ -317,14 +496,114 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_MIPS_FPE_MODULE is not set
 # CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
+# CONFIG_LL_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-ip22 linux/arch/mips/defconfig-ip22
--- linux-2.4.10-pre6/arch/mips/defconfig-ip22	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/defconfig-ip22	Mon Dec  3 23:08:45 2001
@@ -1,6 +1,8 @@
 #
 # Automatically generated make config: don't edit
 #
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
 
 #
 # Code maturity level options
@@ -13,21 +15,37 @@
 # CONFIG_ACER_PICA_61 is not set
 # CONFIG_ALGOR_P4032 is not set
 # CONFIG_BAGET_MIPS is not set
-# CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_NINO is not set
 # CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
 # CONFIG_OLIVETTI_M700 is not set
 CONFIG_SGI_IP22=y
 # CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 # CONFIG_MCA is not set
 # CONFIG_SBUS is not set
 CONFIG_ARC32=y
+CONFIG_BOARD_SCACHE=y
 CONFIG_PC_KEYB=y
 CONFIG_SGI=y
+CONFIG_NEW_IRQ=y
+CONFIG_OLD_TIME_C=y
 # CONFIG_ISA is not set
 # CONFIG_EISA is not set
 # CONFIG_PCI is not set
+# CONFIG_I8259 is not set
 
 #
 # Loadable module support
@@ -41,14 +59,20 @@
 #
 # CONFIG_CPU_R3000 is not set
 # CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
 # CONFIG_CPU_R4300 is not set
 # CONFIG_CPU_R4X00 is not set
 CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_RM7000 is not set
 # CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
 # CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
 # CONFIG_CPU_ADVANCED is not set
 CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
 # CONFIG_CPU_HAS_WB is not set
 
 #
@@ -59,24 +83,26 @@
 CONFIG_ELF_KERNEL=y
 CONFIG_BINFMT_IRIX=y
 CONFIG_FORWARD_KEYBOARD=y
+# CONFIG_ARC_CONSOLE is not set
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
 CONFIG_NET=y
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 
 #
-# Parallel port support
+# Memory Technology Devices (MTD)
 #
-# CONFIG_PARPORT is not set
-# CONFIG_PCMCIA is not set
+# CONFIG_MTD is not set
 
 #
-# Memory Technology Devices (MTD)
+# Parallel port support
 #
-# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
 
 #
 # Block devices
@@ -107,19 +133,24 @@
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK=y
+CONFIG_RTNETLINK=y
+CONFIG_NETLINK_DEV=y
 # CONFIG_NETFILTER is not set
 # CONFIG_FILTER is not set
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_MULTICAST=y
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
 # CONFIG_INET_ECN is not set
 # CONFIG_SYN_COOKIES is not set
 # CONFIG_IPV6 is not set
@@ -148,6 +179,13 @@
 # CONFIG_NET_SCHED is not set
 
 #
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
 # SCSI support
 #
 CONFIG_SCSI=y
@@ -175,7 +213,7 @@
 #
 # SCSI low-level drivers
 #
-CONFIG_SCSI_SGIWD93=y
+CONFIG_SGIWD93_SCSI=y
 # CONFIG_SCSI_7000FASST is not set
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AHA152X is not set
@@ -183,6 +221,7 @@
 # CONFIG_SCSI_AHA1740 is not set
 # CONFIG_SCSI_AIC7XXX is not set
 # CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
 # CONFIG_SCSI_AM53C974 is not set
@@ -199,6 +238,7 @@
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
 # CONFIG_SCSI_NCR53C7xx is not set
 # CONFIG_SCSI_PAS16 is not set
 # CONFIG_SCSI_PCI2000 is not set
@@ -215,20 +255,159 @@
 # Network device support
 #
 CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
 # CONFIG_DUMMY is not set
-# CONFIG_SLIP is not set
-# CONFIG_PPP is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
 CONFIG_SGISEEQ=y
 
 #
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
 # SGI Character devices
 #
 CONFIG_VT=y
 CONFIG_VT_CONSOLE=y
 CONFIG_SGI_NEWPORT_CONSOLE=y
 CONFIG_FONT_8x16=y
-# CONFIG_SGI_PROM_CONSOLE is not set
-# CONFIG_UNIX98_PTYS is not set
+# CONFIG_PSMOUSE is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
 
 #
 # File systems
@@ -238,22 +417,30 @@
 CONFIG_AUTOFS4_FS=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 CONFIG_ISO9660_FS=y
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -261,13 +448,12 @@
 # CONFIG_DEVFS_FS is not set
 # CONFIG_DEVFS_MOUNT is not set
 # CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
+CONFIG_DEVPTS_FS=y
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_QNX4FS_RW is not set
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -277,6 +463,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
 CONFIG_ROOT_NFS=y
@@ -309,6 +496,7 @@
 # CONFIG_MINIX_SUBPARTITION is not set
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
 CONFIG_SGI_PARTITION=y
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
@@ -319,7 +507,7 @@
 # Console drivers
 #
 # CONFIG_VGA_CONSOLE is not set
-# CONFIG_FB is not set
+# CONFIG_MDA_CONSOLE is not set
 
 #
 # Frame-buffer support
@@ -345,13 +533,111 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_MIPS_FPE_MODULE is not set
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-it8172 linux/arch/mips/defconfig-it8172
--- linux-2.4.10-pre6/arch/mips/defconfig-it8172	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/defconfig-it8172	Mon Dec  3 23:08:45 2001
@@ -25,6 +25,7 @@
 # CONFIG_MIPS_MAGNUM_4000 is not set
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set
@@ -35,11 +36,16 @@
 # CONFIG_IT8172_SCR0 is not set
 # CONFIG_IT8172_SCR1 is not set
 # CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 # CONFIG_MCA is not set
 # CONFIG_SBUS is not set
 CONFIG_PCI=y
 CONFIG_IT8712=y
 CONFIG_PC_KEYB=y
+CONFIG_NEW_PCI=y
+CONFIG_PCI_AUTO=y
 # CONFIG_ISA is not set
 # CONFIG_EISA is not set
 # CONFIG_I8259 is not set
@@ -55,26 +61,27 @@
 # CPU selection
 #
 # CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R3912 is not set
 # CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
 # CONFIG_CPU_R4300 is not set
 # CONFIG_CPU_R4X00 is not set
 # CONFIG_CPU_R5000 is not set
 # CONFIG_CPU_R5432 is not set
 # CONFIG_CPU_RM7000 is not set
 CONFIG_CPU_NEVADA=y
-# CONFIG_CPU_R8000 is not set
 # CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
 # CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
 # CONFIG_CPU_ADVANCED is not set
 CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
 # CONFIG_CPU_HAS_WB is not set
 
 #
 # General setup
 #
 CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_FPU_EMULATOR=y
 CONFIG_KCORE_ELF=y
 CONFIG_ELF_KERNEL=y
 # CONFIG_BINFMT_AOUT is not set
@@ -82,68 +89,87 @@
 # CONFIG_BINFMT_MISC is not set
 CONFIG_NET=y
 CONFIG_PCI_NAMES=y
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_SYSCTL=y
 
 #
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_PCMCIA is not set
-
-#
 # Memory Technology Devices (MTD)
 #
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_PARTITIONS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_BOOTLDR_PARTS is not set
 
 #
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
+# User Modules And Translation Layers
 #
-# RAM/ROM Device Drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
 
 #
-# Linearly Mapped Flash Device Drivers
+# RAM/ROM/Flash chip drivers
 #
 CONFIG_MTD_CFI=y
+# CONFIG_MTD_CFI_VIRTUAL_ER is not set
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_AMDSTD is not set
+# CONFIG_MTD_SHARP is not set
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_JEDEC is not set
+
+#
+# Mapping drivers for chip access
+#
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_PHYSMAP_START=8000000
 CONFIG_MTD_PHYSMAP_LEN=2000000
 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
-
-#
-# Drivers for chip mappings
-#
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_OCTAGON is not set
 # CONFIG_MTD_PNC2000 is not set
 # CONFIG_MTD_RPXLITE is not set
+# CONFIG_MTD_SBC_GXX is not set
+# CONFIG_MTD_ELAN_104NC is not set
+# CONFIG_MTD_DBOX2 is not set
+# CONFIG_MTD_CSTM_MIPS_IXX is not set
+# CONFIG_MTD_CFI_FLAGADM is not set
+# CONFIG_MTD_MIXMEM is not set
+# CONFIG_MTD_OCTAGON is not set
 # CONFIG_MTD_VMAX is not set
+# CONFIG_MTD_OCELOT is not set
 
 #
-# User modules and translation layers for MTD devices
+# Self-contained MTD device drivers
 #
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_BLOCK is not set
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC1000 is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOCPROBE is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
 
 #
 # Block devices
@@ -182,6 +208,7 @@
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
@@ -218,6 +245,7 @@
 #
 # CONFIG_PHONE is not set
 # CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
 
 #
 # ATA/IDE/MFM/RLL support
@@ -261,6 +289,7 @@
 CONFIG_BLK_DEV_IDEPCI=y
 CONFIG_IDEPCI_SHARE_IRQ=y
 CONFIG_BLK_DEV_IDEDMA_PCI=y
+CONFIG_BLK_DEV_ADMA=y
 # CONFIG_BLK_DEV_OFFBOARD is not set
 CONFIG_IDEDMA_PCI_AUTO=y
 CONFIG_BLK_DEV_IDEDMA=y
@@ -270,8 +299,8 @@
 # CONFIG_AEC62XX_TUNING is not set
 # CONFIG_BLK_DEV_ALI15X3 is not set
 # CONFIG_WDC_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD7409 is not set
-# CONFIG_AMD7409_OVERRIDE is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_AMD74XX_OVERRIDE is not set
 # CONFIG_BLK_DEV_CMD64X is not set
 # CONFIG_BLK_DEV_CY82C693 is not set
 # CONFIG_BLK_DEV_CS5530 is not set
@@ -280,11 +309,14 @@
 # CONFIG_BLK_DEV_HPT366 is not set
 CONFIG_BLK_DEV_IT8172=y
 CONFIG_IT8172_TUNING=y
+CONFIG_BLK_DEV_IT8172=y
+CONFIG_IT8172_TUNING=y
 # CONFIG_BLK_DEV_NS87415 is not set
 # CONFIG_BLK_DEV_OPTI621 is not set
 # CONFIG_BLK_DEV_PDC202XX is not set
 # CONFIG_PDC202XX_BURST is not set
-# CONFIG_BLK_DEV_OSB4 is not set
+# CONFIG_PDC202XX_FORCE is not set
+# CONFIG_BLK_DEV_SVWKS is not set
 # CONFIG_BLK_DEV_SIS5513 is not set
 # CONFIG_BLK_DEV_SLC90E66 is not set
 # CONFIG_BLK_DEV_TRM290 is not set
@@ -299,12 +331,15 @@
 # CONFIG_BLK_DEV_DTC2278 is not set
 # CONFIG_BLK_DEV_HT6560B is not set
 # CONFIG_BLK_DEV_PDC4030 is not set
-# CONFIG_BLK_DEV_QD6580 is not set
+# CONFIG_BLK_DEV_QD65XX is not set
 # CONFIG_BLK_DEV_UMC8672 is not set
 CONFIG_IDEDMA_AUTO=y
 # CONFIG_IDEDMA_IVB is not set
 # CONFIG_DMA_NONPCI is not set
 CONFIG_BLK_DEV_IDE_MODES=y
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
 
 #
 # SCSI support
@@ -312,16 +347,6 @@
 # CONFIG_SCSI is not set
 
 #
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_PCI is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
 # Network device support
 #
 CONFIG_NETDEVICES=y
@@ -334,18 +359,21 @@
 # CONFIG_BONDING is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
 
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_LANCE is not set
 # CONFIG_NET_VENDOR_SMC is not set
 # CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
 # CONFIG_HP100 is not set
 # CONFIG_NET_ISA is not set
 CONFIG_NET_PCI=y
@@ -354,25 +382,28 @@
 # CONFIG_APRICOT is not set
 # CONFIG_CS89x0 is not set
 CONFIG_TULIP=y
+# CONFIG_TULIP_MWI is not set
+# CONFIG_TULIP_MMIO is not set
 # CONFIG_DE4X5 is not set
 # CONFIG_DGRS is not set
 # CONFIG_DM9102 is not set
 # CONFIG_EEPRO100 is not set
-# CONFIG_EEPRO100_PM is not set
 # CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
 # CONFIG_NE2K_PCI is not set
 # CONFIG_NE3210 is not set
 # CONFIG_ES3210 is not set
 CONFIG_8139TOO=y
-# CONFIG_RTL8129 is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_WINBOND_840 is not set
-# CONFIG_HAPPYMEAL is not set
 # CONFIG_LAN_SAA9730 is not set
 # CONFIG_NET_POCKET is not set
 
@@ -380,11 +411,15 @@
 # Ethernet (1000 Mbit)
 #
 # CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
 
@@ -407,6 +442,16 @@
 # CONFIG_WAN is not set
 
 #
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
 # ISDN subsystem
 #
 # CONFIG_ISDN is not set
@@ -424,7 +469,12 @@
 CONFIG_SERIAL_CONSOLE=y
 # CONFIG_SERIAL_EXTENDED is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_UNIX98_PTYS is not set
+CONFIG_QTRONIX_KEYBOARD=y
+CONFIG_IT8172_CIR=y
+# CONFIG_IT8172_SCR0 is not set
+# CONFIG_IT8172_SCR1 is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
 
 #
 # I2C support
@@ -440,7 +490,11 @@
 #
 # Joysticks
 #
-# CONFIG_JOYSTICK is not set
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
 
 #
 # Input core support is needed for joysticks
@@ -457,6 +511,7 @@
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
 
 #
 # Ftape, the floppy tape device driver
@@ -464,6 +519,7 @@
 # CONFIG_FTAPE is not set
 # CONFIG_AGP is not set
 # CONFIG_DRM is not set
+# CONFIG_ITE_GPIO is not set
 
 #
 # Multimedia devices
@@ -478,22 +534,30 @@
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 # CONFIG_ISO9660_FS is not set
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -501,13 +565,12 @@
 # CONFIG_DEVFS_FS is not set
 # CONFIG_DEVFS_MOUNT is not set
 # CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
+CONFIG_DEVPTS_FS=y
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_QNX4FS_RW is not set
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -517,6 +580,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
 CONFIG_ROOT_NFS=y
@@ -554,16 +618,114 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_MIPS_FPE_MODULE is not set
 # CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
 # CONFIG_LL_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-malta linux/arch/mips/defconfig-malta
--- linux-2.4.10-pre6/arch/mips/defconfig-malta	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/defconfig-malta	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,630 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_ALGOR_P4032 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+CONFIG_MIPS_MALTA=y
+# CONFIG_NINO is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_I8259=y
+CONFIG_PCI=y
+CONFIG_HAVE_STD_PC_SERIAL_PORT=y
+CONFIG_NEW_IRQ=y
+CONFIG_SWAP_IO_SPACE=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+# CONFIG_CPU_HAS_LLDSCD is not set
+# CONFIG_CPU_HAS_WB is not set
+
+#
+# General setup
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_KCORE_ELF=y
+CONFIG_ELF_KERNEL=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+# CONFIG_PCI_NAMES is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_SYSCTL is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Block devices
+#
+CONFIG_BLK_DEV_FD=y
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_SD_EXTRA_DEVS=40
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_DEBUG_QUEUES is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AHA1740 is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_DMA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
+# CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_NCR53C8XX is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_SIM710 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+CONFIG_PCNET32=y
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_TULIP is not set
+# CONFIG_DE4X5 is not set
+# CONFIG_DGRS is not set
+# CONFIG_DM9102 is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NE3210 is not set
+# CONFIG_ES3210 is not set
+# CONFIG_8139TOO is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_WINBOND_840 is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+CONFIG_EFS_FS=y
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
+# CONFIG_LL_DEBUG is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-nino linux/arch/mips/defconfig-nino
--- linux-2.4.10-pre6/arch/mips/defconfig-nino	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/defconfig-nino	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,415 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_ALGOR_P4032 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+CONFIG_NINO=y
+# CONFIG_NINO_4MB is not set
+CONFIG_NINO_8MB=y
+# CONFIG_NINO_16MB is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_PC_KEYB=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_PCI is not set
+# CONFIG_I8259 is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+CONFIG_KMOD=y
+
+#
+# CPU selection
+#
+CONFIG_CPU_R3000=y
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_ADVANCED is not set
+# CONFIG_CPU_HAS_LLSC is not set
+# CONFIG_CPU_HAS_LLDSCD is not set
+# CONFIG_CPU_HAS_WB is not set
+
+#
+# General setup
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_KCORE_ELF=y
+CONFIG_ELF_KERNEL=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+# CONFIG_NET is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_SYSCTL is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=2048
+CONFIG_BLK_DEV_INITRD=y
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# ISDN subsystem
+#
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_COMPUTONE is not set
+# CONFIG_ROCKETPORT is not set
+# CONFIG_CYCLADES is not set
+# CONFIG_DIGIEPCA is not set
+# CONFIG_DIGI is not set
+# CONFIG_ESPSERIAL is not set
+# CONFIG_MOXA_INTELLIO is not set
+# CONFIG_MOXA_SMARTIO is not set
+# CONFIG_ISI is not set
+# CONFIG_SYNCLINK is not set
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_SX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+CONFIG_SERIAL_TX3912=y
+CONFIG_SERIAL_TX3912_CONSOLE=y
+# CONFIG_AU1000_UART is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_SMB_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+
+#
+#   Networking support is needed for USB Networking device support
+#
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-ocelot linux/arch/mips/defconfig-ocelot
--- linux-2.4.10-pre6/arch/mips/defconfig-ocelot	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/defconfig-ocelot	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,566 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_ALGOR_P4032 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_NINO is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+CONFIG_MOMENCO_OCELOT=y
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_PCI=y
+CONFIG_SYSCLK_100=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_NEW_IRQ=y
+CONFIG_OLD_TIME_C=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_I8259 is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+CONFIG_CPU_RM7000=y
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+# CONFIG_CPU_HAS_WB is not set
+
+#
+# General setup
+#
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_KCORE_ELF=y
+CONFIG_ELF_KERNEL=y
+# CONFIG_BINFMT_IRIX is not set
+# CONFIG_FORWARD_KEYBOARD is not set
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+CONFIG_PCI_NAMES=y
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_TULIP is not set
+# CONFIG_DE4X5 is not set
+# CONFIG_DGRS is not set
+# CONFIG_DM9102 is not set
+CONFIG_EEPRO100=y
+# CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NE3210 is not set
+# CONFIG_ES3210 is not set
+# CONFIG_8139TOO is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_WINBOND_840 is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
+# CONFIG_LL_DEBUG is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-orion linux/arch/mips/defconfig-orion
--- linux-2.4.10-pre6/arch/mips/defconfig-orion	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/defconfig-orion	Wed Dec 31 16:00:00 1969
@@ -1,304 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_ALGOR_P4032 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_COBALT_MICRO_SERVER is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_MCA is not set
-# CONFIG_SBUS is not set
-# CONFIG_ISA is not set
-# CONFIG_EISA is not set
-# CONFIG_PCI is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_WB is not set
-
-#
-# General setup
-#
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_KCORE_ELF=y
-CONFIG_ELF_KERNEL=y
-# CONFIG_BINFMT_IRIX is not set
-# CONFIG_FORWARD_KEYBOARD is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_NET=y
-# CONFIG_SYSVIPC is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_SYSCTL is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_PCMCIA is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-# CONFIG_UNIX is not set
-# CONFIG_INET is not set
-# CONFIG_ATM is not set
-
-#
-#  
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET_AUNUDP is not set
-# CONFIG_ECONET_NATIVE is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-# CONFIG_PHONE_IXJ is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# Network device support
-#
-# CONFIG_NETDEVICES is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_CRAMFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_NFS_FS is not set
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-# CONFIG_SUNRPC is not set
-# CONFIG_LOCKD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_NCPFS_NLS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_MAGIC_SYSRQ is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-pb1000 linux/arch/mips/defconfig-pb1000
--- linux-2.4.10-pre6/arch/mips/defconfig-pb1000	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/defconfig-pb1000	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,565 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_ALGOR_P4032 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_NINO is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+CONFIG_MIPS_PB1000=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_MIPS_AU1000=y
+CONFIG_NEW_IRQ=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_PCI is not set
+# CONFIG_I8259 is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+CONFIG_CPU_ADVANCED=y
+CONFIG_CPU_HAS_LLSC=y
+# CONFIG_CPU_HAS_LLDSCD is not set
+CONFIG_CPU_HAS_WB=y
+
+#
+# General setup
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_KCORE_ELF=y
+CONFIG_ELF_KERNEL=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MIPS_AU1000_ENET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_COMPUTONE is not set
+# CONFIG_ROCKETPORT is not set
+# CONFIG_CYCLADES is not set
+# CONFIG_DIGIEPCA is not set
+# CONFIG_DIGI is not set
+# CONFIG_ESPSERIAL is not set
+# CONFIG_MOXA_INTELLIO is not set
+# CONFIG_MOXA_SMARTIO is not set
+# CONFIG_SYNCLINK is not set
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_SX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+# CONFIG_SERIAL_TX3912 is not set
+# CONFIG_SERIAL_TX3912_CONSOLE is not set
+CONFIG_AU1000_UART=y
+CONFIG_AU1000_SERIAL_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_RAMFS is not set
+CONFIG_ISO9660_FS=y
+# CONFIG_JOLIET is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+# CONFIG_DEVPTS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/defconfig-rm200 linux/arch/mips/defconfig-rm200
--- linux-2.4.10-pre6/arch/mips/defconfig-rm200	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/defconfig-rm200	Mon Dec  3 23:08:45 2001
@@ -1,6 +1,8 @@
 #
 # Automatically generated make config: don't edit
 #
+CONFIG_MIPS=y
+# CONFIG_SMP is not set
 
 #
 # Code maturity level options
@@ -13,19 +15,34 @@
 # CONFIG_ACER_PICA_61 is not set
 # CONFIG_ALGOR_P4032 is not set
 # CONFIG_BAGET_MIPS is not set
-# CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_NINO is not set
 # CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 CONFIG_SNI_RM200_PCI=y
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 # CONFIG_MCA is not set
 # CONFIG_SBUS is not set
 CONFIG_ARC32=y
-CONFIG_PCI=y
+CONFIG_I8259=y
 CONFIG_ISA=y
 CONFIG_PC_KEYB=y
+CONFIG_PCI=y
+CONFIG_ROTTEN_IRQ=y
+CONFIG_OLD_TIME_C=y
 CONFIG_EISA=y
 
 #
@@ -40,14 +57,20 @@
 #
 # CONFIG_CPU_R3000 is not set
 # CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_VR41XX is not set
 # CONFIG_CPU_R4300 is not set
 # CONFIG_CPU_R4X00 is not set
 CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_RM7000 is not set
 # CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
 # CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
 # CONFIG_CPU_ADVANCED is not set
 CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
 # CONFIG_CPU_HAS_WB is not set
 
 #
@@ -56,26 +79,24 @@
 CONFIG_CPU_LITTLE_ENDIAN=y
 CONFIG_KCORE_ELF=y
 CONFIG_ELF_KERNEL=y
+# CONFIG_ARC_CONSOLE is not set
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
 CONFIG_NET=y
 # CONFIG_PCI_NAMES is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
 # CONFIG_SYSVIPC is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 
 #
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
 # Plug and Play configuration
 #
 # CONFIG_PNP is not set
 # CONFIG_ISAPNP is not set
-# CONFIG_PCMCIA is not set
+# CONFIG_PNPBIOS is not set
 
 #
 # Memory Technology Devices (MTD)
@@ -83,6 +104,11 @@
 # CONFIG_MTD is not set
 
 #
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
 # Block devices
 #
 CONFIG_BLK_DEV_FD=y
@@ -154,6 +180,7 @@
 #
 # CONFIG_PHONE is not set
 # CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
 
 #
 # ATA/IDE/MFM/RLL support
@@ -168,19 +195,19 @@
 # CONFIG_SCSI is not set
 
 #
-# I2O device support
+# Network device support
 #
-# CONFIG_I2O is not set
-# CONFIG_I2O_PCI is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
+# CONFIG_NETDEVICES is not set
 
 #
-# Network device support
+# Amateur Radio support
 #
-# CONFIG_NETDEVICES is not set
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
 
 #
 # ISDN subsystem
@@ -200,7 +227,8 @@
 # CONFIG_SERIAL is not set
 # CONFIG_SERIAL_EXTENDED is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_UNIX98_PTYS is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
 
 #
 # I2C support
@@ -216,7 +244,11 @@
 #
 # Joysticks
 #
-# CONFIG_JOYSTICK is not set
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
 
 #
 # Input core support is needed for joysticks
@@ -233,6 +265,7 @@
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
 
 #
 # Ftape, the floppy tape device driver
@@ -254,22 +287,30 @@
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 # CONFIG_ISO9660_FS is not set
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -277,13 +318,12 @@
 # CONFIG_DEVFS_FS is not set
 # CONFIG_DEVFS_MOUNT is not set
 # CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
+CONFIG_DEVPTS_FS=y
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_QNX4FS_RW is not set
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -293,6 +333,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 # CONFIG_NFS_FS is not set
 # CONFIG_NFS_V3 is not set
 # CONFIG_ROOT_NFS is not set
@@ -325,6 +366,7 @@
 # CONFIG_MINIX_SUBPARTITION is not set
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
 CONFIG_SGI_PARTITION=y
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
@@ -335,7 +377,7 @@
 # Console drivers
 #
 CONFIG_VGA_CONSOLE=y
-# CONFIG_FB is not set
+# CONFIG_MDA_CONSOLE is not set
 
 #
 # Frame-buffer support
@@ -353,13 +395,111 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_MIPS_FPE_MODULE is not set
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/common/Makefile linux/arch/mips/gt64120/common/Makefile
--- linux-2.4.10-pre6/arch/mips/gt64120/common/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/common/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,18 @@
+#
+# Makefile for common code of gt64120-based boards.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+O_TARGET:= gt64120.o
+
+obj-y	 := gt_irq.o pci.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/common/gt_irq.c linux/arch/mips/gt64120/common/gt_irq.c
--- linux-2.4.10-pre6/arch/mips/gt64120/common/gt_irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/common/gt_irq.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,250 @@
+/*
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/gt64120/common/gt_irq.c
+ *     Interrupt routines for gt64120.  Currently it only handles timer irq.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <asm/ptrace.h>
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <asm/io.h>
+#include <asm/gt64120/gt64120.h>
+
+/*
+ * These are interrupt handlers for the GT on-chip interrupts.  They
+ * all come in to the MIPS on a single interrupt line, and have to
+ * be handled and ack'ed differently than other MIPS interrupts.
+ */
+
+#if CURRENTLY_UNUSED
+
+struct tq_struct irq_handlers[MAX_CAUSE_REGS][MAX_CAUSE_REG_WIDTH];
+void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr);
+
+/*
+ * Hooks IRQ handler to the system. When the system is interrupted
+ * the interrupt service routine is called.
+ *
+ * Inputs :
+ * int_cause - The interrupt cause number. In EVB64120 two parameters 
+ *             are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH. 
+ * bit_num   - Indicates which bit number in the cause register
+ * isr_ptr   - Pointer to the interrupt service routine
+ */
+void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr)
+{
+	irq_handlers[int_cause][bit_num].routine = isr_ptr;
+}
+
+
+/*
+ * Enables the IRQ on Galileo Chip
+ *
+ * Inputs :
+ * int_cause - The interrupt cause number. In EVB64120 two parameters 
+ *             are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
+ * bit_num   - Indicates which bit number in the cause register
+ *
+ * Outputs :
+ * 1 if succesful, 0 if failure
+ */
+int enable_galileo_irq(int int_cause, int bit_num)
+{
+	if (int_cause == INT_CAUSE_MAIN)
+		SET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER, (1 << bit_num));
+	else if (int_cause == INT_CAUSE_HIGH)
+		SET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
+			     (1 << bit_num));
+	else
+		return 0;
+
+	return 1;
+}
+
+/*
+ * Disables the IRQ on Galileo Chip
+ *
+ * Inputs :
+ * int_cause - The interrupt cause number. In EVB64120 two parameters 
+ *             are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
+ * bit_num   - Indicates which bit number in the cause register
+ *
+ * Outputs :
+ * 1 if succesful, 0 if failure
+ */
+int disable_galileo_irq(int int_cause, int bit_num)
+{
+	if (int_cause == INT_CAUSE_MAIN)
+		RESET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER,
+			       (1 << bit_num));
+	else if (int_cause == INT_CAUSE_HIGH)
+		RESET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
+			       (1 << bit_num));
+	else
+		return 0;
+	return 1;
+}
+#endif				/*  UNUSED  */
+
+/*
+ * Interrupt handler for interrupts coming from the Galileo chip.
+ * It could be timer interrupt, built in ethernet ports etc...
+ */
+static void gt64120_irq(int irq, void *dev_id, struct pt_regs *regs)
+{
+	unsigned int irq_src, int_high_src, irq_src_mask,
+	    int_high_src_mask;
+	int handled;
+
+	GT_READ(GT_INTRCAUSE_OFS, &irq_src);
+	GT_READ(GT_INTRMASK_OFS, &irq_src_mask);
+	GT_READ(GT_HINTRCAUSE_OFS, &int_high_src);
+	GT_READ(GT_HINTRMASK_OFS, &int_high_src_mask);
+	irq_src = irq_src & irq_src_mask;
+	int_high_src = int_high_src & int_high_src_mask;
+
+	handled = 0;
+
+	/* Execute all interrupt handlers */
+	/* Check for timer interrupt */
+	if (irq_src & 0x00000800) {
+		handled = 1;
+		irq_src &= ~0x00000800;
+		//    RESET_REG_BITS (INTERRUPT_CAUSE_REGISTER,BIT8);
+		do_timer(regs);
+	}
+
+	if (irq_src) {
+		printk(KERN_INFO
+		       "Other Galileo interrupt received irq_src %x\n",
+		       irq_src);
+#if CURRENTLY_UNUSED
+		for (count = 0; count < MAX_CAUSE_REG_WIDTH; count++) {
+			if (irq_src & (1 << count)) {
+				if (irq_handlers[INT_CAUSE_MAIN][count].
+				    routine) {
+					queue_task(&irq_handlers
+						   [INT_CAUSE_MAIN][count],
+						   &tq_immediate);
+					mark_bh(IMMEDIATE_BH);
+					handled = 1;
+				}
+			}
+		}
+#endif				/*  UNUSED  */
+	}
+	GT_WRITE(GT_INTRCAUSE_OFS, 0);
+	GT_WRITE(GT_HINTRCAUSE_OFS, 0);
+
+#undef GALILEO_I2O
+#ifdef GALILEO_I2O
+	/*
+	 * Future I2O support.  We currently attach I2O interrupt handlers to
+	 * the Galileo interrupt (int 4) and handle them in do_IRQ.
+	 */
+	if (isInBoundDoorBellInterruptSet()) {
+		printk(KERN_INFO "I2O doorbell interrupt received.\n");
+		handled = 1;
+	}
+
+	if (isInBoundPostQueueInterruptSet()) {
+		printk(KERN_INFO "I2O Queue interrupt received.\n");
+		handled = 1;
+	}
+
+	/*
+	 * This normally would be outside of the ifdef, but since we're
+	 * handling I2O outside of this handler, this printk shows up every
+	 * time we get a valid I2O interrupt.  So turn this off for now.
+	 */
+	if (handled == 0) {
+		if (counter < 50) {
+			printk("Spurious Galileo interrupt...\n");
+			counter++;
+		}
+	}
+#endif
+}
+
+/*
+ * Initializes timer using galileo's built in timer.
+ */
+#ifdef CONFIG_SYSCLK_100
+#define Sys_clock (100 * 1000000)	// 100 MHz
+#endif
+#ifdef CONFIG_SYSCLK_83
+#define Sys_clock (83.333 * 1000000)	// 83.333 MHz
+#endif
+#ifdef CONFIG_SYSCLK_75
+#define Sys_clock (75 * 1000000)	// 75 MHz
+#endif
+
+/*
+ * This will ignore the standard MIPS timer interrupt handler
+ * that is passed in as *irq (=irq0 in ../kernel/time.c).
+ * We will do our own timer interrupt handling.
+ */
+void gt64120_time_init(void)
+{
+	extern irq_desc_t irq_desc[NR_IRQS];
+	static struct irqaction timer;
+
+	/* Disable timer first */
+	GT_WRITE(GT_TC_CONTROL_OFS, 0);
+	/* Load timer value for 100 Hz */
+	GT_WRITE(GT_TC3_OFS, Sys_clock / 100);
+
+	/*
+	 * Create the IRQ structure entry for the timer.  Since we're too early
+	 * in the boot process to use the "request_irq()" call, we'll hard-code
+	 * the values to the correct interrupt line.
+	 */
+	timer.handler = &gt64120_irq;
+	timer.flags = SA_SHIRQ | SA_INTERRUPT;
+	timer.name = "timer";
+	timer.dev_id = NULL;
+	timer.next = NULL;
+	timer.mask = 0;
+	irq_desc[TIMER].action = &timer;
+
+	enable_irq(TIMER);
+
+	/* Enable timer ints */
+	GT_WRITE(GT_TC_CONTROL_OFS, 0xc0);
+	/* clear Cause register first */
+	GT_WRITE(GT_INTRCAUSE_OFS, 0x0);
+	/* Unmask timer int */
+	GT_WRITE(GT_INTRMASK_OFS, 0x800);
+	/* Clear High int register */
+	GT_WRITE(GT_HINTRCAUSE_OFS, 0x0);
+	/* Mask All interrupts at High cause interrupt */
+	GT_WRITE(GT_HINTRMASK_OFS, 0x0);
+}
+
+void gt64120_irq_init(void)
+{
+#if CURRENTLY_UNUSED
+	int i, j;
+
+	/* Reset irq handlers pointers to NULL */
+	for (i = 0; i < MAX_CAUSE_REGS; i++) {
+		for (j = 0; j < MAX_CAUSE_REG_WIDTH; j++) {
+			irq_handlers[i][j].next = NULL;
+			irq_handlers[i][j].sync = 0;
+			irq_handlers[i][j].routine = NULL;
+			irq_handlers[i][j].data = NULL;
+		}
+	}
+#endif
+}
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/common/pci.c linux/arch/mips/gt64120/common/pci.c
--- linux-2.4.10-pre6/arch/mips/gt64120/common/pci.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/common/pci.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,1145 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Galileo Evaluation Boards PCI support.
+ *
+ * The general-purpose functions to read/write and configure the GT64120A's
+ * PCI registers (function names start with pci0 or pci1) are either direct
+ * copies of functions written by Galileo Technology, or are modifications
+ * of their functions to work with Linux 2.4 vs Linux 2.2.  These functions
+ * are Copyright - Galileo Technology.
+ *
+ * Other functions are derived from other MIPS PCI implementations, or were
+ * written by RidgeRun, Inc,  Copyright (C) 2000 RidgeRun, Inc.
+ *   glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/version.h>
+#include <asm/pci.h>
+#include <asm/io.h>
+#include <asm/gt64120/gt64120.h>
+
+#include <linux/init.h>
+
+#ifdef CONFIG_PCI
+
+#define SELF 0
+
+/*
+ * These functions and structures provide the BIOS scan and mapping of the PCI
+ * devices.
+ */
+
+#define MAX_PCI_DEVS 10
+
+struct pci_device {
+	u32 slot;
+	u32 BARtype[6];
+	u32 BARsize[6];
+};
+
+static void __init scan_and_initialize_pci(void);
+static u32 __init scan_pci_bus(struct pci_device *pci_devices);
+static void __init allocate_pci_space(struct pci_device *pci_devices);
+
+/*
+ * The functions that actually read and write to the controller.
+ *
+ *  Copied from or modified from Galileo Technology code.
+ */
+static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device);
+static void pci0WriteConfigReg(unsigned int offset,
+			       struct pci_dev *device, unsigned int data);
+static unsigned int pci1ReadConfigReg(int offset, struct pci_dev *device);
+static void pci1WriteConfigReg(unsigned int offset,
+			       struct pci_dev *device, unsigned int data);
+
+static void pci0MapIOspace(unsigned int pci0IoBase,
+			   unsigned int pci0IoLength);
+static void pci1MapIOspace(unsigned int pci1IoBase,
+			   unsigned int pci1IoLength);
+static void pci0MapMemory0space(unsigned int pci0Mem0Base,
+				unsigned int pci0Mem0Length);
+static void pci1MapMemory0space(unsigned int pci1Mem0Base,
+				unsigned int pci1Mem0Length);
+static void pci0MapMemory1space(unsigned int pci0Mem1Base,
+				unsigned int pci0Mem1Length);
+static void pci1MapMemory1space(unsigned int pci1Mem1Base,
+				unsigned int pci1Mem1Length);
+static unsigned int pci0GetIOspaceBase(void);
+static unsigned int pci0GetIOspaceSize(void);
+static unsigned int pci0GetMemory0Base(void);
+static unsigned int pci0GetMemory0Size(void);
+static unsigned int pci0GetMemory1Base(void);
+static unsigned int pci0GetMemory1Size(void);
+static unsigned int pci1GetIOspaceBase(void);
+static unsigned int pci1GetIOspaceSize(void);
+static unsigned int pci1GetMemory0Base(void);
+static unsigned int pci1GetMemory0Size(void);
+static unsigned int pci1GetMemory1Base(void);
+static unsigned int pci1GetMemory1Size(void);
+
+
+/*  Functions to implement "pci ops"  */
+static int galileo_pcibios_read_config_word(struct pci_dev *dev,
+					    int offset, u16 * val);
+static int galileo_pcibios_read_config_byte(struct pci_dev *dev,
+					    int offset, u8 * val);
+static int galileo_pcibios_read_config_dword(struct pci_dev *dev,
+					     int offset, u32 * val);
+static int galileo_pcibios_write_config_byte(struct pci_dev *dev,
+					     int offset, u8 val);
+static int galileo_pcibios_write_config_word(struct pci_dev *dev,
+					     int offset, u16 val);
+static int galileo_pcibios_write_config_dword(struct pci_dev *dev,
+					      int offset, u32 val);
+static void galileo_pcibios_set_master(struct pci_dev *dev);
+
+/*
+ *  General-purpose PCI functions.
+ */
+
+/*
+ * pci0MapIOspace - Maps PCI0 IO space for the master.
+ * Inputs: base and length of pci0Io
+ */
+
+static void pci0MapIOspace(unsigned int pci0IoBase,
+			   unsigned int pci0IoLength)
+{
+	unsigned int pci0IoTop =
+	    (unsigned int) (pci0IoBase + pci0IoLength);
+
+	if (pci0IoLength == 0)
+		pci0IoTop++;
+
+	pci0IoBase = (unsigned int) (pci0IoBase >> 21);
+	pci0IoTop = (unsigned int) (((pci0IoTop - 1) & 0x0fffffff) >> 21);
+	GT_WRITE(GT_PCI0IOLD_OFS, pci0IoBase);
+	GT_WRITE(GT_PCI0IOHD_OFS, pci0IoTop);
+}
+
+/*
+ * pci1MapIOspace - Maps PCI1 IO space for the master.
+ * Inputs: base and length of pci1Io
+ */
+
+static void pci1MapIOspace(unsigned int pci1IoBase,
+			   unsigned int pci1IoLength)
+{
+	unsigned int pci1IoTop =
+	    (unsigned int) (pci1IoBase + pci1IoLength);
+
+	if (pci1IoLength == 0)
+		pci1IoTop++;
+
+	pci1IoBase = (unsigned int) (pci1IoBase >> 21);
+	pci1IoTop = (unsigned int) (((pci1IoTop - 1) & 0x0fffffff) >> 21);
+	GT_WRITE(GT_PCI1IOLD_OFS, pci1IoBase);
+	GT_WRITE(GT_PCI1IOHD_OFS, pci1IoTop);
+}
+
+/*
+ * pci0MapMemory0space - Maps PCI0 memory0 space for the master.
+ * Inputs: base and length of pci0Mem0
+ */
+
+static void pci0MapMemory0space(unsigned int pci0Mem0Base,
+				unsigned int pci0Mem0Length)
+{
+	unsigned int pci0Mem0Top = pci0Mem0Base + pci0Mem0Length;
+
+	if (pci0Mem0Length == 0)
+		pci0Mem0Top++;
+
+	pci0Mem0Base = pci0Mem0Base >> 21;
+	pci0Mem0Top = ((pci0Mem0Top - 1) & 0x0fffffff) >> 21;
+	GT_WRITE(GT_PCI0M0LD_OFS, pci0Mem0Base);
+	GT_WRITE(GT_PCI0M0HD_OFS, pci0Mem0Top);
+}
+
+/*
+ * pci1MapMemory0space - Maps PCI1 memory0 space for the master.
+ * Inputs: base and length of pci1Mem0
+ */
+
+static void pci1MapMemory0space(unsigned int pci1Mem0Base,
+				unsigned int pci1Mem0Length)
+{
+	unsigned int pci1Mem0Top = pci1Mem0Base + pci1Mem0Length;
+
+	if (pci1Mem0Length == 0)
+		pci1Mem0Top++;
+
+	pci1Mem0Base = pci1Mem0Base >> 21;
+	pci1Mem0Top = ((pci1Mem0Top - 1) & 0x0fffffff) >> 21;
+	GT_WRITE(GT_PCI1M0LD_OFS, pci1Mem0Base);
+	GT_WRITE(GT_PCI1M0HD_OFS, pci1Mem0Top);
+}
+
+/*
+ * pci0MapMemory1space - Maps PCI0 memory1 space for the master.
+ * Inputs: base and length of pci0Mem1
+ */
+
+static void pci0MapMemory1space(unsigned int pci0Mem1Base,
+				unsigned int pci0Mem1Length)
+{
+	unsigned int pci0Mem1Top = pci0Mem1Base + pci0Mem1Length;
+
+	if (pci0Mem1Length == 0)
+		pci0Mem1Top++;
+
+	pci0Mem1Base = pci0Mem1Base >> 21;
+	pci0Mem1Top = ((pci0Mem1Top - 1) & 0x0fffffff) >> 21;
+	GT_WRITE(GT_PCI0M1LD_OFS, pci0Mem1Base);
+	GT_WRITE(GT_PCI0M1HD_OFS, pci0Mem1Top);
+
+}
+
+/*
+ * pci1MapMemory1space - Maps PCI1 memory1 space for the master.
+ * Inputs: base and length of pci1Mem1
+ */
+
+static void pci1MapMemory1space(unsigned int pci1Mem1Base,
+				unsigned int pci1Mem1Length)
+{
+	unsigned int pci1Mem1Top = pci1Mem1Base + pci1Mem1Length;
+
+	if (pci1Mem1Length == 0)
+		pci1Mem1Top++;
+
+	pci1Mem1Base = pci1Mem1Base >> 21;
+	pci1Mem1Top = ((pci1Mem1Top - 1) & 0x0fffffff) >> 21;
+	GT_WRITE(GT_PCI1M1LD_OFS, pci1Mem1Base);
+	GT_WRITE(GT_PCI1M1HD_OFS, pci1Mem1Top);
+}
+
+/*
+ * pci0GetIOspaceBase - Return PCI0 IO Base Address.
+ * Inputs: N/A
+ * Returns: PCI0 IO Base Address.
+ */
+
+static unsigned int pci0GetIOspaceBase(void)
+{
+	unsigned int base;
+	GT_READ(GT_PCI0IOLD_OFS, &base);
+	base = base << 21;
+	return base;
+}
+
+/*
+ * pci0GetIOspaceSize - Return PCI0 IO Bar Size.
+ * Inputs: N/A
+ * Returns: PCI0 IO Bar Size.
+ */
+
+static unsigned int pci0GetIOspaceSize(void)
+{
+	unsigned int top, base, size;
+	GT_READ(GT_PCI0IOLD_OFS, &base);
+	base = base << 21;
+	GT_READ(GT_PCI0IOHD_OFS, &top);
+	top = (top << 21);
+	size = ((top - base) & 0xfffffff);
+	size = size | 0x1fffff;
+	return (size + 1);
+}
+
+/*
+ * pci0GetMemory0Base - Return PCI0 Memory 0 Base Address.
+ * Inputs: N/A
+ * Returns: PCI0 Memory 0 Base Address.
+ */
+
+static unsigned int pci0GetMemory0Base(void)
+{
+	unsigned int base;
+	GT_READ(GT_PCI0M0LD_OFS, &base);
+	base = base << 21;
+	return base;
+}
+
+/*
+ * pci0GetMemory0Size - Return PCI0 Memory 0 Bar Size.
+ * Inputs: N/A
+ * Returns: PCI0 Memory 0 Bar Size.
+ */
+
+static unsigned int pci0GetMemory0Size(void)
+{
+	unsigned int top, base, size;
+	GT_READ(GT_PCI0M0LD_OFS, &base);
+	base = base << 21;
+	GT_READ(GT_PCI0M0HD_OFS, &top);
+	top = (top << 21);
+	size = ((top - base) & 0xfffffff);
+	size = size | 0x1fffff;
+	return (size + 1);
+}
+
+/*
+ * pci0GetMemory1Base - Return PCI0 Memory 1 Base Address.
+ * Inputs: N/A
+ * Returns: PCI0 Memory 1 Base Address.
+ */
+
+static unsigned int pci0GetMemory1Base(void)
+{
+	unsigned int base;
+	GT_READ(GT_PCI0M1LD_OFS, &base);
+	base = base << 21;
+	return base;
+}
+
+/*
+ * pci0GetMemory1Size - Return PCI0 Memory 1 Bar Size.
+ * Inputs: N/A
+ * Returns: PCI0 Memory 1 Bar Size.
+ */
+
+static unsigned int pci0GetMemory1Size(void)
+{
+	unsigned int top, base, size;
+	GT_READ(GT_PCI0M1LD_OFS, &base);
+	base = base << 21;
+	GT_READ(GT_PCI0M1HD_OFS, &top);
+	top = (top << 21);
+	size = ((top - base) & 0xfffffff);
+	size = size | 0x1fffff;
+	return (size + 1);
+}
+
+/*
+ * pci1GetIOspaceBase - Return PCI1 IO Base Address.
+ * Inputs: N/A
+ * Returns: PCI1 IO Base Address.
+ */
+
+static unsigned int pci1GetIOspaceBase(void)
+{
+	unsigned int base;
+	GT_READ(GT_PCI1IOLD_OFS, &base);
+	base = base << 21;
+	return base;
+}
+
+/*
+ * pci1GetIOspaceSize - Return PCI1 IO Bar Size.
+ * Inputs: N/A
+ * Returns: PCI1 IO Bar Size.
+ */
+
+static unsigned int pci1GetIOspaceSize(void)
+{
+	unsigned int top, base, size;
+	GT_READ(GT_PCI1IOLD_OFS, &base);
+	base = base << 21;
+	GT_READ(GT_PCI1IOHD_OFS, &top);
+	top = (top << 21);
+	size = ((top - base) & 0xfffffff);
+	size = size | 0x1fffff;
+	return (size + 1);
+}
+
+/*
+ * pci1GetMemory0Base - Return PCI1 Memory 0 Base Address.
+ * Inputs: N/A
+ * Returns: PCI1 Memory 0 Base Address.
+ */
+
+static unsigned int pci1GetMemory0Base(void)
+{
+	unsigned int base;
+	GT_READ(GT_PCI1M0LD_OFS, &base);
+	base = base << 21;
+	return base;
+}
+
+/*
+ * pci1GetMemory0Size - Return PCI1 Memory 0 Bar Size.
+ * Inputs: N/A
+ * Returns: PCI1 Memory 0 Bar Size.
+ */
+
+static unsigned int pci1GetMemory0Size(void)
+{
+	unsigned int top, base, size;
+	GT_READ(GT_PCI1M1LD_OFS, &base);
+	base = base << 21;
+	GT_READ(GT_PCI1M1HD_OFS, &top);
+	top = (top << 21);
+	size = ((top - base) & 0xfffffff);
+	size = size | 0x1fffff;
+	return (size + 1);
+}
+
+/*
+ * pci1GetMemory1Base - Return PCI1 Memory 1 Base Address.
+ * Inputs: N/A
+ * Returns: PCI1 Memory 1 Base Address.
+ */
+
+static unsigned int pci1GetMemory1Base(void)
+{
+	unsigned int base;
+	GT_READ(GT_PCI1M1LD_OFS, &base);
+	base = base << 21;
+	return base;
+}
+
+/*
+ * pci1GetMemory1Size - Return PCI1 Memory 1 Bar Size.
+ * Inputs: N/A
+ * Returns: PCI1 Memory 1 Bar Size.
+ */
+
+static unsigned int pci1GetMemory1Size(void)
+{
+	unsigned int top, base, size;
+	GT_READ(GT_PCI1M1LD_OFS, &base);
+	base = base << 21;
+	GT_READ(GT_PCI1M1HD_OFS, &top);
+	top = (top << 21);
+	size = ((top - base) & 0xfffffff);
+	size = size | 0x1fffff;
+	return (size + 1);
+}
+
+
+
+/*
+ * pci_range_ck -
+ *
+ * Check if the pci device that are trying to access does really exists
+ * on the evaluation board.  
+ *
+ * Inputs :
+ * bus - bus number (0 for PCI 0 ; 1 for PCI 1)
+ * dev - number of device on the specific pci bus
+ *
+ * Outpus :
+ * 0 - if OK , 1 - if failure
+ */
+static __inline__ int pci_range_ck(unsigned char bus, unsigned char dev)
+{
+	/*
+	 * We don't even pretend to handle other busses than bus 0 correctly.
+	 * Accessing device 31 crashes the CP7000 for some reason.
+	 */
+	if ((bus == 0) && (dev != 31))
+		return 0;
+	return -1;
+}
+
+/*
+ * pciXReadConfigReg  - Read from a PCI configuration register
+ *                    - Make sure the GT is configured as a master before 
+ *                      reading from another device on the PCI.
+ *                   - The function takes care of Big/Little endian conversion.
+ * INPUTS:   regOffset: The register offset as it apears in the GT spec (or PCI
+ *                        spec)
+ *           pciDevNum: The device number needs to be addressed.                
+ * RETURNS: data , if the data == 0xffffffff check the master abort bit in the 
+ *                 cause register to make sure the data is valid
+ *
+ *  Configuration Address 0xCF8:
+ *
+ *       31 30    24 23  16 15  11 10     8 7      2  0     <=bit Number
+ *  |congif|Reserved|  Bus |Device|Function|Register|00|
+ *  |Enable|        |Number|Number| Number | Number |  |    <=field Name
+ *
+ */
+static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device)
+{
+	unsigned int DataForRegCf8;
+	unsigned int data;
+
+	DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
+			 (PCI_FUNC(device->devfn) << 8) |
+			 (offset & ~0x3)) | 0x80000000;
+	GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
+
+	/*
+	 * The casual observer might wonder why the READ is duplicated here,
+	 * rather than immediately following the WRITE, and just have the swap
+	 * in the "if".  That's because there is a latency problem with trying
+	 * to read immediately after setting up the address register.  The "if"
+	 * check gives enough time for the address to stabilize, so the READ
+	 * can work.
+	 */
+	if (PCI_SLOT(device->devfn) == SELF) {	/* This board */
+		GT_READ(GT_PCI0_CFGDATA_OFS, &data);
+		return data;
+	} else { /* The PCI is working in LE Mode so swap the Data. */
+		GT_READ(GT_PCI0_CFGDATA_OFS, &data);
+		return cpu_to_le32(data);
+	}
+}
+
+static unsigned int pci1ReadConfigReg(int offset, struct pci_dev *device)
+{
+	unsigned int DataForRegCf8;
+	unsigned int data;
+
+	DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
+			 (PCI_FUNC(device->devfn) << 8) |
+			 (offset & ~0x3)) | 0x80000000;
+	/*
+	 * The casual observer might wonder why the READ is duplicated here,
+	 * rather than immediately following the WRITE, and just have the
+	 * swap in the "if".  That's because there is a latency problem
+	 * with trying to read immediately after setting up the address
+	 * register.  The "if" check gives enough time for the address
+	 * to stabilize, so the READ can work.
+	 */
+	if (PCI_SLOT(device->devfn) == SELF) {	/* This board */
+		/* when configurating our own PCI 1 L-unit the access is through  
+		   the PCI 0 interface with reg number = reg number + 0x80 */
+		DataForRegCf8 |= 0x80;
+		GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
+	} else {		/* The PCI is working in LE Mode so swap the Data. */
+		GT_WRITE(GT_PCI1_CFGADDR_OFS, DataForRegCf8);
+	}
+	if (PCI_SLOT(device->devfn) == SELF) {	/* This board */
+		GT_READ(GT_PCI0_CFGDATA_OFS, &data);
+		return data;
+	} else {
+		GT_READ(GT_PCI1_CFGDATA_OFS, &data);
+		return cpu_to_le32(data);
+	}
+}
+
+
+
+/*
+ * pciXWriteConfigReg - Write to a PCI configuration register
+ *                    - Make sure the GT is configured as a master before 
+ *                      writingto another device on the PCI.
+ *                    - The function takes care of Big/Little endian conversion.
+ * Inputs:   unsigned int regOffset: The register offset as it apears in the
+ *           GT spec 
+ *                   (or any other PCI device spec)
+ *           pciDevNum: The device number needs to be addressed.                
+ *
+ *  Configuration Address 0xCF8:
+ *
+ *       31 30    24 23  16 15  11 10     8 7      2  0     <=bit Number
+ *  |congif|Reserved|  Bus |Device|Function|Register|00|
+ *  |Enable|        |Number|Number| Number | Number |  |    <=field Name
+ *
+ */
+static void pci0WriteConfigReg(unsigned int offset,
+			       struct pci_dev *device, unsigned int data)
+{
+	unsigned int DataForRegCf8;
+
+	DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
+			 (PCI_FUNC(device->devfn) << 8) |
+			 (offset & ~0x3)) | 0x80000000;
+	GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
+	if (PCI_SLOT(device->devfn) == SELF) {	/* This board */
+		GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
+	} else {		/* configuration Transaction over the pci. */
+		/* The PCI is working in LE Mode so swap the Data. */
+		GT_WRITE(GT_PCI0_CFGDATA_OFS, le32_to_cpu(data));
+	}
+}
+
+static void pci1WriteConfigReg(unsigned int offset,
+			       struct pci_dev *device, unsigned int data)
+{
+	unsigned int DataForRegCf8;
+
+	DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
+			 (PCI_FUNC(device->devfn) << 8) |
+			 (offset & ~0x3)) | 0x80000000;
+	/*
+	 * There is a latency problem
+	 * with trying to read immediately after setting up the address
+	 * register.  The "if" check gives enough time for the address
+	 * to stabilize, so the WRITE can work.
+	 */
+	if (PCI_SLOT(device->devfn) == SELF) {	/* This board */
+		/*
+		 * when configurating our own PCI 1 L-unit the access is through
+		 * the PCI 0 interface with reg number = reg number + 0x80
+		 */
+		DataForRegCf8 |= 0x80;
+		GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
+	} else {	/* configuration Transaction over the pci. */
+		/* The PCI is working in LE Mode so swap the Data. */
+		GT_WRITE(GT_PCI1_CFGADDR_OFS, DataForRegCf8);
+	}
+	if (PCI_SLOT(device->devfn) == SELF) {	/* This board */
+		GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
+	} else {		/* configuration Transaction over the pci. */
+		GT_WRITE(GT_PCI1_CFGADDR_OFS, le32_to_cpu(data));
+	}
+}
+
+
+/*
+ * galileo_pcibios_(read/write)_config_(dword/word/byte) -
+ *
+ * reads/write a dword/word/byte register from the configuration space
+ * of a device.
+ *
+ * Inputs :
+ * bus - bus number
+ * dev - device number
+ * offset - register offset in the configuration space
+ * val - value to be written / read
+ *
+ * Outputs :
+ * PCIBIOS_SUCCESSFUL when operation was succesfull
+ * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
+ * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
+ */
+
+static int galileo_pcibios_read_config_dword(struct pci_dev *device,
+					     int offset, u32 * val)
+{
+	int dev, bus;
+	bus = device->bus->number;
+	dev = PCI_SLOT(device->devfn);
+
+	if (pci_range_ck(bus, dev)) {
+		*val = 0xffffffff;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+	if (offset & 0x3)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+	if (bus == 0)
+		*val = pci0ReadConfigReg(offset, device);
+
+	/*  This is so that the upper PCI layer will get the correct return value if
+	   we're not attached to anything.  */
+	if ((offset == 0) && (*val == 0xffffffff)) {
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int galileo_pcibios_read_config_word(struct pci_dev *device,
+					    int offset, u16 * val)
+{
+	int dev, bus;
+
+	bus = device->bus->number;
+	dev = PCI_SLOT(device->devfn);
+
+	if (pci_range_ck(bus, dev)) {
+		*val = 0xffff;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+	if (offset & 0x1)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+
+	if (bus == 0)
+		*val =
+		    (unsigned short) (pci0ReadConfigReg(offset, device) >>
+				      ((offset & ~0x3) * 8));
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int galileo_pcibios_read_config_byte(struct pci_dev *device,
+					    int offset, u8 * val)
+{
+	int dev, bus;
+
+	bus = device->bus->number;
+	dev = PCI_SLOT(device->devfn);
+
+	if (pci_range_ck(bus, dev)) {
+		*val = 0xff;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+
+	if (bus == 0)
+		*val =
+		    (unsigned char) (pci0ReadConfigReg(offset, device) >>
+				     ((offset & ~0x3) * 8));
+
+	/*
+	 *  This is so that the upper PCI layer will get the correct return
+	 * value if we're not attached to anything.
+	 */
+	if ((offset == 0xe) && (*val == 0xff)) {
+		u32 MasterAbort;
+		GT_READ(GT_INTRCAUSE_OFS, &MasterAbort);
+		if (MasterAbort & 0x40000) {
+			GT_WRITE(GT_INTRCAUSE_OFS,
+				 (MasterAbort & 0xfffbffff));
+			return PCIBIOS_DEVICE_NOT_FOUND;
+		}
+	}
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int galileo_pcibios_write_config_dword(struct pci_dev *device,
+					      int offset, u32 val)
+{
+	int dev, bus;
+
+	bus = device->bus->number;
+	dev = PCI_SLOT(device->devfn);
+
+	if (pci_range_ck(bus, dev))
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	if (offset & 0x3)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+	if (bus == 0)
+		pci0WriteConfigReg(offset, device, val);
+//  if (bus == 1) pci1WriteConfigReg (offset,device,val);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int galileo_pcibios_write_config_word(struct pci_dev *device,
+					     int offset, u16 val)
+{
+	int dev, bus;
+	unsigned long tmp;
+
+	bus = device->bus->number;
+	dev = PCI_SLOT(device->devfn);
+
+	if (pci_range_ck(bus, dev))
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	if (offset & 0x1)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+	if (bus == 0)
+		tmp = pci0ReadConfigReg(offset, device);
+//  if (bus == 1) tmp = pci1ReadConfigReg (offset,device);
+
+	if ((offset % 4) == 0)
+		tmp = (tmp & 0xffff0000) | (val & 0xffff);
+	if ((offset % 4) == 2)
+		tmp = (tmp & 0x0000ffff) | ((val & 0xffff) << 16);
+
+	if (bus == 0)
+		pci0WriteConfigReg(offset, device, tmp);
+//  if (bus == 1) pci1WriteConfigReg (offset,device,tmp);
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int galileo_pcibios_write_config_byte(struct pci_dev *device,
+					     int offset, u8 val)
+{
+	int dev, bus;
+	unsigned long tmp;
+
+	bus = device->bus->number;
+	dev = PCI_SLOT(device->devfn);
+
+	if (pci_range_ck(bus, dev))
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	if (bus == 0)
+		tmp = pci0ReadConfigReg(offset, device);
+//  if (bus == 1) tmp = pci1ReadConfigReg (offset,device);
+
+	if ((offset % 4) == 0)
+		tmp = (tmp & 0xffffff00) | (val & 0xff);
+	if ((offset % 4) == 1)
+		tmp = (tmp & 0xffff00ff) | ((val & 0xff) << 8);
+	if ((offset % 4) == 2)
+		tmp = (tmp & 0xff00ffff) | ((val & 0xff) << 16);
+	if ((offset % 4) == 3)
+		tmp = (tmp & 0x00ffffff) | ((val & 0xff) << 24);
+
+	if (bus == 0)
+		pci0WriteConfigReg(offset, device, tmp);
+//  if (bus == 1) pci1WriteConfigReg (offset,device,tmp);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static void galileo_pcibios_set_master(struct pci_dev *dev)
+{
+	u16 cmd;
+
+	galileo_pcibios_read_config_word(dev, PCI_COMMAND, &cmd);
+	cmd |= PCI_COMMAND_MASTER;
+	galileo_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
+}
+
+/*  Externally-expected functions.  Do not change function names  */
+
+int pcibios_enable_resources(struct pci_dev *dev)
+{
+	u16 cmd, old_cmd;
+	u8 tmp1;
+	int idx;
+	struct resource *r;
+
+	galileo_pcibios_read_config_word(dev, PCI_COMMAND, &cmd);
+	old_cmd = cmd;
+	for (idx = 0; idx < 6; idx++) {
+		r = &dev->resource[idx];
+		if (!r->start && r->end) {
+			printk(KERN_ERR
+			       "PCI: Device %s not available because of "
+			       "resource collisions\n", dev->slot_name);
+			return -EINVAL;
+		}
+		if (r->flags & IORESOURCE_IO)
+			cmd |= PCI_COMMAND_IO;
+		if (r->flags & IORESOURCE_MEM)
+			cmd |= PCI_COMMAND_MEMORY;
+	}
+	if (cmd != old_cmd) {
+		galileo_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
+	}
+
+	/*
+	 * Let's fix up the latency timer and cache line size here.  Cache
+	 * line size = 32 bytes / sizeof dword (4) = 8.
+	 * Latency timer must be > 8.  32 is random but appears to work.
+	 */
+	galileo_pcibios_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &tmp1);
+	if (tmp1 != 8) {
+		printk(KERN_WARNING "PCI setting cache line size to 8 from "
+		       "%d\n", tmp1);
+		galileo_pcibios_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
+						  8);
+	}
+	galileo_pcibios_read_config_byte(dev, PCI_LATENCY_TIMER, &tmp1);
+	if (tmp1 < 32) {
+		printk(KERN_WARNING "PCI setting latency timer to 32 from %d\n",
+		       tmp1);
+		galileo_pcibios_write_config_byte(dev, PCI_LATENCY_TIMER,
+						  32);
+	}
+
+	return 0;
+}
+
+int pcibios_enable_device(struct pci_dev *dev)
+{
+	return pcibios_enable_resources(dev);
+}
+
+void pcibios_update_resource(struct pci_dev *dev, struct resource *root,
+			     struct resource *res, int resource)
+{
+	u32 new, check;
+	int reg;
+
+	return;
+
+	new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
+	if (resource < 6) {
+		reg = PCI_BASE_ADDRESS_0 + 4 * resource;
+	} else if (resource == PCI_ROM_RESOURCE) {
+		res->flags |= PCI_ROM_ADDRESS_ENABLE;
+		reg = dev->rom_base_reg;
+	} else {
+		/*
+		 * Somebody might have asked allocation of a non-standard
+		 * resource
+		 */
+		return;
+	}
+
+	pci_write_config_dword(dev, reg, new);
+	pci_read_config_dword(dev, reg, &check);
+	if ((new ^ check) &
+	    ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK :
+	     PCI_BASE_ADDRESS_MEM_MASK)) {
+		printk(KERN_ERR "PCI: Error while updating region "
+		       "%s/%d (%08x != %08x)\n", dev->slot_name, resource,
+		       new, check);
+	}
+}
+
+void pcibios_align_resource(void *data, struct resource *res,
+			    unsigned long size)
+{
+	struct pci_dev *dev = data;
+
+	if (res->flags & IORESOURCE_IO) {
+		unsigned long start = res->start;
+
+		/* We need to avoid collisions with `mirrored' VGA ports
+		   and other strange ISA hardware, so we always want the
+		   addresses kilobyte aligned.  */
+		if (size > 0x100) {
+			printk(KERN_ERR "PCI: I/O Region %s/%d too large"
+			       " (%ld bytes)\n", dev->slot_name,
+			        dev->resource - res, size);
+		}
+
+		start = (start + 1024 - 1) & ~(1024 - 1);
+		res->start = start;
+	}
+}
+
+struct pci_ops galileo_pci_ops = {
+	galileo_pcibios_read_config_byte,
+	galileo_pcibios_read_config_word,
+	galileo_pcibios_read_config_dword,
+	galileo_pcibios_write_config_byte,
+	galileo_pcibios_write_config_word,
+	galileo_pcibios_write_config_dword
+};
+
+struct pci_fixup pcibios_fixups[] = {
+	{0}
+};
+
+void __init pcibios_fixup_bus(struct pci_bus *c)
+{
+	gt64120_board_pcibios_fixup_bus(c);
+}
+
+/*
+ * This code was derived from Galileo Technology's example
+ * and significantly reworked.
+ *
+ * This is very simple.  It does not scan multiple function devices.  It does
+ * not scan behind bridges.  Those would be simple to implement, but we don't
+ * currently need this.
+ */
+
+static void __init scan_and_initialize_pci(void)
+{
+	struct pci_device pci_devices[MAX_PCI_DEVS];
+
+	if (scan_pci_bus(pci_devices)) {
+		allocate_pci_space(pci_devices);
+	}
+}
+
+/*
+ * This is your basic PCI scan.  It goes through each slot and checks to
+ * see if there's something that responds.  If so, then get the size and
+ * type of each of the responding BARs.  Save them for later.
+ */
+
+static u32 __init scan_pci_bus(struct pci_device *pci_devices)
+{
+	u32 arrayCounter = 0;
+	u32 memType;
+	u32 memSize;
+	u32 pci_slot, bar;
+	u32 id;
+	u32 c18RegValue;
+	struct pci_dev device;
+
+	/*
+	 * According to PCI REV 2.1 MAX agents on the bus are 21.
+	 * We don't bother scanning ourselves (slot 0).
+	 */
+	for (pci_slot = 1; pci_slot < 22; pci_slot++) {
+
+		device.devfn = PCI_DEVFN(pci_slot, 0);
+		id = pci0ReadConfigReg(PCI_VENDOR_ID, &device);
+
+		/*
+		 *  Check for a PCI Master Abort (nothing responds in the
+		 * slot)
+		 */
+		GT_READ(GT_INTRCAUSE_OFS, &c18RegValue);
+		/*
+		 * Clearing bit 18 of in the Cause Register 0xc18 by
+		 * writting 0.
+		 */
+		GT_WRITE(GT_INTRCAUSE_OFS, (c18RegValue & 0xfffbffff));
+		if ((id != 0xffffffff) && !(c18RegValue & 0x40000)) {
+			pci_devices[arrayCounter].slot = pci_slot;
+			for (bar = 0; bar < 6; bar++) {
+				memType =
+				    pci0ReadConfigReg(PCI_BASE_ADDRESS_0 +
+						      (bar * 4), &device);
+				pci_devices[arrayCounter].BARtype[bar] =
+				    memType & 1;
+				pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
+						   (bar * 4), &device,
+						   0xffffffff);
+				memSize =
+				    pci0ReadConfigReg(PCI_BASE_ADDRESS_0 +
+						      (bar * 4), &device);
+				if (memType & 1) {	/*  IO space  */
+					pci_devices[arrayCounter].
+					    BARsize[bar] =
+					    ~(memSize & 0xfffffffc) + 1;
+				} else {	/*  memory space */
+					pci_devices[arrayCounter].
+					    BARsize[bar] =
+					    ~(memSize & 0xfffffff0) + 1;
+				}
+			}	/*  BAR counter  */
+
+			arrayCounter++;
+		}
+		/*  found a device  */
+	} /*  slot counter  */
+
+	if (arrayCounter < MAX_PCI_DEVS)
+		pci_devices[arrayCounter].slot = -1;
+
+	return arrayCounter;
+}
+
+#define ALIGN(val,align)        (((val) + ((align) - 1)) & ~((align) - 1))
+#define MAX(val1, val2) ((val1) > (val2) ? (val1) : (val2))
+
+/*
+ * This function goes through the list of devices and allocates the BARs in
+ * either IO or MEM space.  It does it in order of size, which will limit the
+ * amount of fragmentation we have in the IO and MEM spaces.
+ */
+
+static void __init allocate_pci_space(struct pci_device *pci_devices)
+{
+	u32 count, maxcount, bar;
+	u32 maxSize, maxDevice, maxBAR;
+	u32 alignto;
+	u32 base;
+	u32 pci0_mem_base = pci0GetMemory0Base();
+	u32 pci0_io_base = pci0GetIOspaceBase();
+	struct pci_dev device;
+
+	/*  How many PCI devices do we have?  */
+	maxcount = MAX_PCI_DEVS;
+	for (count = 0; count < MAX_PCI_DEVS; count++) {
+		if (pci_devices[count].slot == -1) {
+			maxcount = count;
+			break;
+		}
+	}
+
+	do {
+		/*  Find the largest size BAR we need to allocate  */
+		maxSize = 0;
+		for (count = 0; count < maxcount; count++) {
+			for (bar = 0; bar < 6; bar++) {
+				if (pci_devices[count].BARsize[bar] >
+				    maxSize) {
+					maxSize =
+					    pci_devices[count].
+					    BARsize[bar];
+					maxDevice = count;
+					maxBAR = bar;
+				}
+			}
+		}
+
+		/*
+		 * We've found the largest BAR.  Allocate it into IO or
+		 * mem space.  We don't idiot check the bases to make
+		 * sure they haven't overflowed the current size for that
+		 * aperture.  
+		 * Don't bother to enable the device's IO or MEM space here.
+		 * That will be done in pci_enable_resources if the device is
+		 * activated by a driver.
+		 */
+		if (maxSize) {
+			device.devfn =
+			    PCI_DEVFN(pci_devices[maxDevice].slot, 0);
+			if (pci_devices[maxDevice].BARtype[maxBAR] == 1) {
+				alignto = MAX(0x1000, maxSize);
+				base = ALIGN(pci0_io_base, alignto);
+				pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
+						   (maxBAR * 4), &device,
+						   base | 0x1);
+				pci0_io_base = base + alignto;
+			} else {
+				alignto = MAX(0x1000, maxSize);
+				base = ALIGN(pci0_mem_base, alignto);
+				pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
+						   (maxBAR * 4), &device,
+						   base);
+				pci0_mem_base = base + alignto;
+			}
+			/*
+			 * This entry is finished.  Remove it from the list
+			 * we'll scan.
+			 */
+			pci_devices[maxDevice].BARsize[maxBAR] = 0;
+		}
+	} while (maxSize);
+}
+
+void __init pcibios_init(void)
+{
+	u32 tmp;
+	struct pci_dev controller;
+
+	controller.devfn = SELF;
+
+	GT_READ(GT_PCI0_CMD_OFS, &tmp);
+	GT_READ(GT_PCI0_BARE_OFS, &tmp);
+
+	/*
+	 * You have to enable bus mastering to configure any other
+	 * card on the bus.
+	 */
+	tmp = pci0ReadConfigReg(PCI_COMMAND, &controller);
+	tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
+	pci0WriteConfigReg(PCI_COMMAND, &controller, tmp);
+
+	/*  This scans the PCI bus and sets up initial values.  */
+	scan_and_initialize_pci();
+
+	/*
+	 *  Reset PCI I/O and PCI MEM values to ones supported by EVM.
+	 */
+	ioport_resource.start = GT_PCI_IO_BASE;
+	ioport_resource.end   = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
+	iomem_resource.start  = GT_PCI_MEM_BASE;
+	iomem_resource.end    = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1;
+
+	pci_scan_bus(0, &galileo_pci_ops, NULL);
+}
+
+/*
+ * for parsing "pci=" kernel boot arguments.
+ */
+char *pcibios_setup(char *str)
+{
+        printk(KERN_INFO "rr: pcibios_setup\n");
+        /* Nothing to do for now.  */
+
+        return str;
+}
+
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 1;
+}
+
+#endif	/* CONFIG_PCI */
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/Makefile linux/arch/mips/gt64120/momenco_ocelot/Makefile
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,20 @@
+#
+# Makefile for Momentum's Ocelot board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+O_TARGET:= momenco_ocelot.o
+
+obj-y	 += int-handler.o irq.o pci.o prom.o reset.o setup.o
+
+obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/dbg_io.c linux/arch/mips/gt64120/momenco_ocelot/dbg_io.c
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/dbg_io.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/dbg_io.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,124 @@
+#include <linux/config.h>
+
+#if defined(CONFIG_REMOTE_DEBUG)
+
+/* --- CONFIG --- */
+
+typedef unsigned char uint8;
+typedef unsigned int uint32;
+
+/* --- END OF CONFIG --- */
+
+#define         UART16550_BAUD_2400             2400
+#define         UART16550_BAUD_4800             4800
+#define         UART16550_BAUD_9600             9600
+#define         UART16550_BAUD_19200            19200
+#define         UART16550_BAUD_38400            38400
+#define         UART16550_BAUD_57600            57600
+#define         UART16550_BAUD_115200           115200
+
+#define         UART16550_PARITY_NONE           0
+#define         UART16550_PARITY_ODD            0x08
+#define         UART16550_PARITY_EVEN           0x18
+#define         UART16550_PARITY_MARK           0x28
+#define         UART16550_PARITY_SPACE          0x38
+
+#define         UART16550_DATA_5BIT             0x0
+#define         UART16550_DATA_6BIT             0x1
+#define         UART16550_DATA_7BIT             0x2
+#define         UART16550_DATA_8BIT             0x3
+
+#define         UART16550_STOP_1BIT             0x0
+#define         UART16550_STOP_2BIT             0x4
+
+/* ----------------------------------------------------- */
+
+/* === CONFIG === */
+
+/* [jsun] we use the second serial port for kdb */
+#define         BASE                    0xbd000020
+#define         MAX_BAUD                115200
+
+/* === END OF CONFIG === */
+
+#define         REG_OFFSET              4
+
+/* register offset */
+#define         OFS_RCV_BUFFER          0
+#define         OFS_TRANS_HOLD          0
+#define         OFS_SEND_BUFFER         0
+#define         OFS_INTR_ENABLE         (1*REG_OFFSET)
+#define         OFS_INTR_ID             (2*REG_OFFSET)
+#define         OFS_DATA_FORMAT         (3*REG_OFFSET)
+#define         OFS_LINE_CONTROL        (3*REG_OFFSET)
+#define         OFS_MODEM_CONTROL       (4*REG_OFFSET)
+#define         OFS_RS232_OUTPUT        (4*REG_OFFSET)
+#define         OFS_LINE_STATUS         (5*REG_OFFSET)
+#define         OFS_MODEM_STATUS        (6*REG_OFFSET)
+#define         OFS_RS232_INPUT         (6*REG_OFFSET)
+#define         OFS_SCRATCH_PAD         (7*REG_OFFSET)
+
+#define         OFS_DIVISOR_LSB         (0*REG_OFFSET)
+#define         OFS_DIVISOR_MSB         (1*REG_OFFSET)
+
+
+/* memory-mapped read/write of the port */
+#define         UART16550_READ(y)    (*((volatile uint8*)(BASE + y)))
+#define         UART16550_WRITE(y, z)  ((*((volatile uint8*)(BASE + y))) = z)
+
+void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
+{
+	/* disable interrupts */
+	UART16550_WRITE(OFS_INTR_ENABLE, 0);
+
+	/* set up buad rate */
+	{
+		uint32 divisor;
+
+		/* set DIAB bit */
+		UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
+
+		/* set divisor */
+		divisor = MAX_BAUD / baud;
+		UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
+		UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
+
+		/* clear DIAB bit */
+		UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
+	}
+
+	/* set data format */
+	UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
+}
+
+static int remoteDebugInitialized = 0;
+
+uint8 getDebugChar(void)
+{
+	if (!remoteDebugInitialized) {
+		remoteDebugInitialized = 1;
+		debugInit(UART16550_BAUD_38400,
+			  UART16550_DATA_8BIT,
+			  UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+	}
+
+	while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
+	return UART16550_READ(OFS_RCV_BUFFER);
+}
+
+
+int putDebugChar(uint8 byte)
+{
+	if (!remoteDebugInitialized) {
+		remoteDebugInitialized = 1;
+		debugInit(UART16550_BAUD_9600,
+			  UART16550_DATA_8BIT,
+			  UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+	}
+
+	while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
+	UART16550_WRITE(OFS_SEND_BUFFER, byte);
+	return 1;
+}
+
+#endif
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/int-handler.S linux/arch/mips/gt64120/momenco_ocelot/int-handler.S
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/int-handler.S	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/int-handler.S	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,132 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * First-level interrupt dispatcher for ocelot board.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/config.h>
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+/*
+ * first level interrupt dispatcher for ocelot board -
+ * We check for the timer first, then check PCI ints A and D.
+ * Then check for serial IRQ and fall through.
+ */
+		.align	5
+		NESTED(ocelot_handle_int, PT_SIZE, sp)
+		SAVE_ALL
+		CLI
+		.set	at
+		mfc0	t0, CP0_CAUSE  
+		mfc0	t2, CP0_STATUS
+
+		and	t0, t2
+        
+		 andi	t1, t0, STATUSF_IP2	/* int0 hardware line */
+		bnez	t1, ll_pri_enet_irq
+		 andi	t1, t0, STATUSF_IP3	/* int1 hardware line */
+		bnez	t1, ll_sec_enet_irq
+		 andi	t1, t0, STATUSF_IP4	/* int2 hardware line */
+		bnez	t1, ll_uart1_irq
+		 andi	t1, t0, STATUSF_IP5	/* int3 hardware line */
+		bnez	t1, ll_cpci_irq
+		 andi	t1, t0, STATUSF_IP6	/* int4 hardware line */
+		bnez	t1, ll_galileo_irq
+		 andi	t1, t0, STATUSF_IP7	/* cpu timer */
+		bnez	t1, ll_cputimer_irq
+
+                /* now look at the extended interrupts */
+		mfc0	t0, CP0_CAUSE  
+		cfc0	t1, CP0_S1_INTCONTROL
+
+		/* shift the mask 8 bits left to line up the bits */
+		 sll	t2, t1, 8
+
+		 and	t0, t2
+		 srl	t0, t0, 16
+
+		 andi	t1, t0, STATUSF_IP8	/* int6 hardware line */
+		bnez	t1, ll_pmc1_irq
+		 andi	t1, t0, STATUSF_IP9	/* int7 hardware line */
+		bnez	t1, ll_pmc2_irq
+		 andi	t1, t0, STATUSF_IP10	/* int8 hardware line */
+		bnez	t1, ll_cpci_abcd_irq
+		 andi	t1, t0, STATUSF_IP11	/* int9 hardware line */
+		bnez	t1, ll_uart2_irq
+
+		.set	reorder
+
+		/* wrong alarm or masked ... */
+		j	spurious_interrupt
+		nop
+		END(ocelot_handle_int)
+
+		.align	5
+ll_pri_enet_irq:
+		li	a0, 2
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+
+ll_sec_enet_irq:
+		li	a0, 3
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+
+ll_uart1_irq:
+		li	a0, 4
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+	
+ll_cpci_irq:
+		li	a0, 5
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+
+ll_galileo_irq:
+		li	a0, 6
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+
+ll_cputimer_irq:
+		li	a0, 7
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+	
+ll_pmc1_irq:
+		li	a0, 8
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+
+ll_pmc2_irq:
+		li	a0, 9
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+
+ll_cpci_abcd_irq:
+		li	a0, 10
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
+
+ll_uart2_irq:
+		li	a0, 11
+		move	a1, sp
+		jal	do_IRQ
+		j	ret_from_irq
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/irq.c linux/arch/mips/gt64120/momenco_ocelot/irq.c
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/irq.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,173 @@
+/*
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: RidgeRun, Inc.
+ *   glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/irq.h>
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+
+
+static spinlock_t rm7000_irq_lock = SPIN_LOCK_UNLOCKED;
+
+/* Function for careful CP0 interrupt mask access */
+static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in)
+{
+	unsigned long status;
+	unsigned clr_mask;
+	unsigned set_mask;
+
+	/* do the low 8 bits first */
+	clr_mask = 0xff & clr_mask_in;
+	set_mask = 0xff & set_mask_in;
+	status = read_32bit_cp0_register(CP0_STATUS);
+	status &= ~((clr_mask & 0xFF) << 8);
+	status |= (set_mask & 0xFF) << 8;
+	write_32bit_cp0_register(CP0_STATUS, status);
+
+	/* do the high 8 bits */
+	clr_mask = 0xff & (clr_mask_in >> 8);
+	set_mask = 0xff & (set_mask_in >> 8);
+	status = read_32bit_cp0_set1_register(CP0_S1_INTCONTROL);
+	status &= ~((clr_mask & 0xFF) << 8);
+	status |= (set_mask & 0xFF) << 8;
+	write_32bit_cp0_set1_register(CP0_S1_INTCONTROL, status);
+}
+
+static inline void mask_irq(unsigned int irq)
+{
+	modify_cp0_intmask(irq, 0);
+}
+
+static inline void unmask_irq(unsigned int irq)
+{
+	modify_cp0_intmask(0, irq);
+}
+
+static void enable_cp7000_irq(unsigned int irq)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&rm7000_irq_lock, flags);
+	unmask_irq(1 << irq);
+	spin_unlock_irqrestore(&rm7000_irq_lock, flags);
+}
+
+static unsigned int startup_cp7000_irq(unsigned int irq)
+{
+	enable_cp7000_irq(irq);
+
+	return 0;				/* never anything pending */
+}
+
+static void disable_cp7000_irq(unsigned int irq)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&rm7000_irq_lock, flags);
+	mask_irq(1 << irq);
+	spin_unlock_irqrestore(&rm7000_irq_lock, flags);
+}
+
+#define shutdown_cp7000_irq disable_cp7000_irq
+
+static void mask_and_ack_cp7000_irq(unsigned int irq)
+{
+	mask_irq(1 << irq);
+}
+
+static void end_cp7000_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		unmask_irq(1 << irq);
+}
+
+static struct hw_interrupt_type cp7000_hpcdma_irq_type = {
+	"CP7000",
+	startup_cp7000_irq,
+	shutdown_cp7000_irq,
+	enable_cp7000_irq,
+	disable_cp7000_irq,
+	mask_and_ack_cp7000_irq,
+	end_cp7000_irq,
+	NULL
+};
+
+
+extern asmlinkage void ocelot_handle_int(void);
+extern void gt64120_irq_init(void);
+
+void __init init_IRQ(void)
+{
+	int i;
+
+	/*
+	 * Clear all of the interrupts while we change the able around a bit.
+	 * int-handler is not on bootstrap
+	 */
+	clear_cp0_status(ST0_IM | ST0_BEV);
+	__cli();
+
+	/* Sets the first-level interrupt dispatcher. */
+	set_except_vector(0, ocelot_handle_int);
+	init_generic_irq();
+
+	for (i = 0; i <= 15; i++) {
+		irq_desc[i].status	= IRQ_DISABLED;
+		irq_desc[i].action	= 0;
+		irq_desc[i].depth	= 1;
+		irq_desc[i].handler	= &cp7000_hpcdma_irq_type;
+	}
+
+	gt64120_irq_init();
+
+#ifdef CONFIG_REMOTE_DEBUG
+	printk("start kgdb ...\n");
+	set_debug_traps();
+	breakpoint();	/* you may move this line to whereever you want :-) */
+#endif
+#ifdef CONFIG_GDB_CONSOLE
+	register_gdb_console();
+#endif
+}
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/ocelot_pld.h linux/arch/mips/gt64120/momenco_ocelot/ocelot_pld.h
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/ocelot_pld.h	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/ocelot_pld.h	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,34 @@
+/*
+ * $Id$
+ *
+ * Ocelot Board Register Definitions
+ *
+ * (C) 2001 Red Hat, Inc.
+ *
+ * GPL'd
+ *
+ */
+
+#ifndef __MOMENCO_OCELOT_PLD_H__
+#define __MOMENCO_OCELOT_PLD_H__
+
+#define OCELOT_CS0_ADDR (0xe0020000)
+
+#define OCELOT_REG_BOARDREV (0)
+#define OCELOT_REG_PLD1_ID (1)
+#define OCELOT_REG_PLD2_ID (2)
+#define OCELOT_REG_RESET_STATUS (3)
+#define OCELOT_REG_BOARD_STATUS (4)
+#define OCELOT_REG_CPCI_ID (5)
+#define OCELOT_REG_I2C_CTRL (8)
+#define OCELOT_REG_EEPROM_MODE (9)
+#define OCELOT_REG_INTMASK (10)
+#define OCELOT_REG_INTSTATUS (11)
+#define OCELOT_REG_INTSET (12)
+#define OCELOT_REG_INTCLR (13)
+
+#define OCELOT_PLD_WRITE(x, y) writeb(x, OCELOT_CS0_ADDR + OCELOT_REG_##y)
+#define OCELOT_PLD_READ(x) readb(OCELOT_CS0_ADDR + OCELOT_REG_##x)
+
+
+#endif /* __MOMENCO_OCELOT_PLD_H__ */
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/pci.c linux/arch/mips/gt64120/momenco_ocelot/pci.c
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/pci.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/pci.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/gt64120/momenco_ocelot/pci.c
+ *     Board-specific PCI routines for gt64120 controller.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/init.h>
+#include <asm/pci.h>
+
+
+void __init gt64120_board_pcibios_fixup_bus(struct pci_bus *bus)
+{
+	struct pci_bus *current_bus = bus;
+	struct pci_dev *devices;
+	struct list_head *devices_link;
+	u16 cmd;
+
+	list_for_each(devices_link, &(current_bus->devices)) {
+
+		devices = pci_dev_b(devices_link);
+		if (devices == NULL)
+			continue;
+
+		if (PCI_SLOT(devices->devfn) == 1) {
+			/*
+			 * Slot 1 is primary ether port, i82559
+			 * we double-check against that assumption
+			 */
+			if ((devices->vendor != 0x8086) ||
+			    (devices->device != 0x1209) ) {
+				panic("gt64120_board_pcibios_fixup_bus: found "
+				      "unexpected PCI device in slot 1.");
+			}
+			devices->irq = 2;       /* irq_nr is 2 for INT0 */
+		} else if (PCI_SLOT(devices->devfn) == 2) {
+			/*
+			 * Slot 2 is secondary ether port, i21143 
+			 * we double-check against that assumption
+			 */
+			if ((devices->vendor != 0x1011) ||
+			    (devices->device != 0x19) ) {
+				panic("galileo_pcibios_fixup_bus: "
+				      "found unexpected PCI device in slot 2.");
+			}
+			devices->irq = 3;       /* irq_nr is 3 for INT1 */
+		} else if (PCI_SLOT(devices->devfn) == 4) {
+			/* PMC Slot 1 */
+			devices->irq = 8;       /* irq_nr is 8 for INT6 */
+		} else if (PCI_SLOT(devices->devfn) == 5) {
+			/* PMC Slot 1 */
+			devices->irq = 9;       /* irq_nr is 9 for INT7 */
+		} else {
+			/* We don't have assign interrupts for other devices. */
+			devices->irq = 0xff;
+		}
+
+		/* Assign an interrupt number for the device */
+		bus->ops->write_byte(devices, PCI_INTERRUPT_LINE, devices->irq);
+
+		/* enable master */
+		bus->ops->read_word(devices, PCI_COMMAND, &cmd);
+		cmd |= PCI_COMMAND_MASTER;
+		bus->ops->write_word(devices, PCI_COMMAND, cmd);
+	}
+}
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/prom.c linux/arch/mips/gt64120/momenco_ocelot/prom.c
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/prom.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/prom.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+
+#define PLD_BASE	0xbc000000
+
+#define REV             0x0     /* Board Assembly Revision */
+#define PLD1ID          0x1     /* PLD 1 ID */
+#define PLD2ID          0x2     /* PLD 2 ID */
+#define RESET_STAT      0x3     /* Reset Status Register */
+#define BOARD_STAT      0x4     /* Board Status Register */
+#define CPCI_ID         0x5     /* Compact PCI ID Register */
+#define CONTROL         0x8     /* Control Register */
+#define CPU_EEPROM      0x9     /* CPU Configuration EEPROM Register */
+#define INTMASK         0xA     /* Interrupt Mask Register */
+#define INTSTAT         0xB     /* Interrupt Status Register */
+#define INTSET          0xC     /* Interrupt Set Register */
+#define INTCLR          0xD     /* Interrupt Clear Register */
+
+#define PLD_REG(x)	((uint8_t*)(PLD_BASE+(x)))
+
+char arcs_cmdline[COMMAND_LINE_SIZE];
+
+/* [jsun@junsun.net] PMON passes arguments in C main() style */
+void __init prom_init(int argc, const char **arg)
+{
+	int i;
+
+	/* arg[0] is "g", the rest is boot parameters */
+	arcs_cmdline[0] = '\0';
+	for (i = 1; i < argc; i++) {
+		if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
+		    >= sizeof(arcs_cmdline))
+			break;
+		strcat(arcs_cmdline, arg[i]);
+		strcat(arcs_cmdline, " ");
+	}
+
+	mips_machgroup = MACH_GROUP_MOMENCO;
+	mips_machtype = MACH_MOMENCO_OCELOT;
+
+	/* turn off the Bit Error LED, which comes on automatically
+	 * at power-up reset */
+	*PLD_REG(INTCLR) = 0x80;
+
+	/* All the boards have at least 64MiB. If there's more, we
+	   detect and register it later */
+	add_memory_region(0, 64 << 20, BOOT_MEM_RAM);
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+{
+}
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/reset.c linux/arch/mips/gt64120/momenco_ocelot/reset.c
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/reset.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/reset.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,48 @@
+/*
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * Copyright (C) 1997, 2001 Ralf Baechle
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+
+void momenco_ocelot_restart(char *command)
+{
+	*(volatile char *) 0xbc000000 = 0x0f;
+
+	/*
+	 * Ouch, we're still alive ... This time we take the silver bullet ...
+	 * ... and find that we leave the hardware in a state in which the
+	 * kernel in the flush locks up somewhen during of after the PCI
+	 * detection stuff.
+	 */
+	clear_cp0_status(ST0_BEV | ST0_ERL);
+	change_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+	flush_cache_all();
+	write_32bit_cp0_register(CP0_WIRED, 0);
+	__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+}
+
+void momenco_ocelot_halt(void)
+{
+	printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+	while (1)
+		__asm__(".set\tmips3\n\t"
+	                "wait\n\t"
+			".set\tmips0");
+}
+
+void momenco_ocelot_power_off(void)
+{
+	momenco_ocelot_halt();
+}
diff -urN linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/setup.c linux/arch/mips/gt64120/momenco_ocelot/setup.c
--- linux-2.4.10-pre6/arch/mips/gt64120/momenco_ocelot/setup.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/gt64120/momenco_ocelot/setup.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,282 @@
+/*
+ * setup.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Galileo Evaluation Boards - board dependent boot routines
+ *
+ * Copyright (C) 1996, 1997, 2001  Ralf Baechle
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Copyright (C) 2001 Red Hat, Inc.
+ *
+ * Author: RidgeRun, Inc.
+ *   glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mc146818rtc.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/timex.h>
+#include <linux/vmalloc.h>
+#include <asm/time.h>
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/pci.h>
+#include <asm/processor.h>
+#include <asm/ptrace.h>
+#include <asm/reboot.h>
+#include <asm/mc146818rtc.h>
+#include <linux/version.h>
+#include <linux/bootmem.h>
+#include <linux/blk.h>
+#include <asm/gt64120/gt64120.h>
+#include "ocelot_pld.h"
+
+extern struct rtc_ops no_rtc_ops;
+
+unsigned long gt64120_base = KSEG1ADDR(GT_DEF_BASE);
+
+/* These functions are used for rebooting or halting the machine*/
+extern void momenco_ocelot_restart(char *command);
+extern void momenco_ocelot_halt(void);
+extern void momenco_ocelot_power_off(void);
+
+extern void gt64120_time_init(void);
+extern void momenco_ocelot_irq_setup(void);
+
+static char reset_reason;
+
+#define ENTRYLO(x) ((pte_val(mk_pte_phys((x), PAGE_KERNEL_UNCACHED)) >> 6)|1)
+
+static void __init setup_l3cache(unsigned long size);
+
+void __init momenco_ocelot_setup(void)
+{
+	void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
+	unsigned int tmpword;
+
+	board_time_init = gt64120_time_init;
+
+	_machine_restart = momenco_ocelot_restart;
+	_machine_halt = momenco_ocelot_halt;
+	_machine_power_off = momenco_ocelot_power_off;
+
+	/*
+	 * initrd_start = (ulong)ocelot_initrd_start;
+	 * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
+	 * initrd_below_start_ok = 1;
+	 */
+	rtc_ops = &no_rtc_ops;
+
+
+	/* A wired TLB entry for the GT64120A and the serial port. The
+	   GT64120A is going to be hit on every IRQ anyway - there's
+	   absolutely no point in letting it be a random TLB entry, as
+	   it'll just cause needless churning of the TLB. And we use
+	   the other half for the serial port, which is just a PITA
+	   otherwise :)
+
+		Device			Physical	Virtual
+		GT64120 Internal Regs	0x24000000	0xe0000000
+		UARTs (CS2)		0x2d000000	0xe0001000
+	*/
+	add_wired_entry(ENTRYLO(0x24000000), ENTRYLO(0x2D000000), 0xe0000000, PM_4K);
+
+	/* Also a temporary entry to let us talk to the Ocelot PLD and NVRAM
+	   in the CS[012] region. We can't use ioremap() yet. The NVRAM
+	   appears to be one of the variants of ST M48T35 - see 
+	   http://www.st.com/stonline/bin/sftab.exe?table=172&filter0=M48T35
+
+		Ocelot PLD (CS0)	0x2c000000	0xe0020000
+		NVRAM			0x2c800000	0xe0030000
+	*/
+		
+	add_temporary_entry(ENTRYLO(0x2C000000), ENTRYLO(0x2d000000), 0xe0020000, PM_64K);
+
+
+	/* Relocate the CS3/BootCS region */
+  	GT_WRITE( GT_CS3BOOTLD_OFS, 0x2f000000 >> 21);
+
+	/* Relocate CS[012] */
+ 	GT_WRITE(GT_CS20LD_OFS, 0x2c000000 >> 21);
+
+	/* Relocate the GT64120A itself... */
+	GT_WRITE(GT_ISD_OFS, 0x24000000 >> 21);
+	mb();
+	gt64120_base = 0xe0000000;
+
+	/* ...and the PCI0 view of it. */
+	GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000020);
+	GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x24000000);
+	GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000024);
+	GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x24000001);
+
+	/* Relocate PCI0 I/O and Mem0 */
+	GT_WRITE(GT_PCI0IOLD_OFS, 0x20000000 >> 21);
+	GT_WRITE(GT_PCI0M0LD_OFS, 0x22000000 >> 21);
+
+	/* Relocate PCI0 Mem1 */
+	GT_WRITE(GT_PCI0M1LD_OFS, 0x36000000 >> 21);
+
+	/* Relocate all the PCI1 stuff, not that we use it */
+	GT_WRITE(GT_PCI1IOLD_OFS, 0x30000000 >> 21);
+	GT_WRITE(GT_PCI1M0LD_OFS, 0x32000000 >> 21);
+	GT_WRITE(GT_PCI1M1LD_OFS, 0x34000000 >> 21);
+
+	/* Relocate the CPU's view of the RAM... */
+	GT_WRITE(GT_SCS10LD_OFS, 0);
+	GT_WRITE(GT_SCS10HD_OFS, 0x0fe00000 >> 21);
+	GT_WRITE(GT_SCS32LD_OFS, 0x10000000 >> 21);
+	GT_WRITE(GT_SCS32HD_OFS, 0x0fe00000 >> 21);
+
+	GT_WRITE(GT_SCS1LD_OFS, 0xff);
+	GT_WRITE(GT_SCS1HD_OFS, 0x00);
+	GT_WRITE(GT_SCS0LD_OFS, 0);
+	GT_WRITE(GT_SCS0HD_OFS, 0xff);
+	GT_WRITE(GT_SCS3LD_OFS, 0xff);
+	GT_WRITE(GT_SCS3HD_OFS, 0x00);
+	GT_WRITE(GT_SCS2LD_OFS, 0);
+	GT_WRITE(GT_SCS2HD_OFS, 0xff);
+
+	/* ...and the PCI0 view of it. */
+	GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000010);
+	GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x00000000);
+	GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000014);
+	GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x10000000);
+	GT_WRITE(GT_PCI0_BS_SCS10_OFS, 0x0ffff000);
+	GT_WRITE(GT_PCI0_BS_SCS32_OFS, 0x0ffff000);
+
+	tmpword = OCELOT_PLD_READ(BOARDREV);
+	if (tmpword < 26)
+		printk("Momenco Ocelot: Board Assembly Rev. %c\n", 'A'+tmpword);
+	else
+		printk("Momenco Ocelot: Board Assembly Revision #0x%x\n", tmpword);
+
+	tmpword = OCELOT_PLD_READ(PLD1_ID);
+	printk("PLD 1 ID: %d.%d\n", tmpword>>4, tmpword&15);
+	tmpword = OCELOT_PLD_READ(PLD2_ID);
+	printk("PLD 2 ID: %d.%d\n", tmpword>>4, tmpword&15);
+	tmpword = OCELOT_PLD_READ(RESET_STATUS);
+	printk("Reset reason: 0x%x\n", tmpword);
+	reset_reason = tmpword;
+	OCELOT_PLD_WRITE(0xff, RESET_STATUS);
+
+	tmpword = OCELOT_PLD_READ(BOARD_STATUS);
+	printk("Board Status register: 0x%02x\n", tmpword);
+	printk("  - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent");
+	printk("  - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent");
+	printk("  - Tulip PHY %s connected\n", (tmpword&0x10)?"is":"not");
+	printk("  - L3 Cache size: %d MiB\n", (1<<((tmpword&12) >> 2))&~1);
+	printk("  - SDRAM size: %d MiB\n", 1<<(6+(tmpword&3)));
+
+	if (tmpword&12)
+		l3func((1<<(((tmpword&12) >> 2)+20)));
+
+	switch(tmpword &3) {
+	case 3:
+		/* 512MiB */
+		add_memory_region(256<<20, 256<<20, BOOT_MEM_RAM);
+	case 2:
+		/* 256MiB */
+		/* FIXME: Is it actually here, or at 0x10000000? */
+		add_memory_region(128<<20, 128<<20, BOOT_MEM_RAM);
+	case 1:
+		/* 128MiB */
+		add_memory_region(64<<20, 64<<20, BOOT_MEM_RAM);
+	case 0:
+		/* 64MiB */
+		;
+	}
+
+	/* Fix up the DiskOnChip mapping */
+	GT_WRITE(0x468, 0xfef73);
+}
+
+extern int rm7k_tcache_enabled;
+/*
+ * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache()
+ */
+#define Page_Invalidate_T 0x16
+static void __init setup_l3cache(unsigned long size)
+{
+	int register i;
+	unsigned long tmp;
+	
+	printk("Enabling L3 cache...");
+
+	/* Enable the L3 cache in the GT64120A's CPU Configuration register */
+	GT_READ(0, &tmp);
+	GT_WRITE(0, tmp | (1<<14));
+
+	/* Enable the L3 cache in the CPU */
+	set_cp0_config(1<<12 /* CONF_TE */);
+
+	/* Clear the cache */
+	set_taglo(0);
+	set_taghi(0);
+
+	for (i=0; i < size; i+= 4096) {
+		__asm__ __volatile__ (
+			".set noreorder\n\t"
+			".set mips3\n\t"
+			"cache %1, (%0)\n\t"
+			".set mips0\n\t"
+			".set reorder"
+			:
+			: "r" (KSEG0ADDR(i)),
+			  "i" (Page_Invalidate_T));
+	}
+
+	/* Let the RM7000 MM code know that the tertiary cache is enabled */
+	rm7k_tcache_enabled = 1;
+
+	printk("Done\n");
+}
+
+
+/* This needs to be one of the first initcalls, because no I/O port access
+   can work before this */
+
+static int io_base_ioremap(void)
+{
+	void *io_remap_range = ioremap(GT_PCI_IO_BASE, GT_PCI_IO_SIZE);
+	if (!io_remap_range) {
+		panic("Could not ioremap I/O port range\n");
+	}
+	mips_io_port_base = io_remap_range - GT_PCI_IO_BASE;
+	return 0;
+}
+module_init(io_base_ioremap);
+
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/Makefile linux/arch/mips/ite-boards/generic/Makefile
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/Makefile	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/Makefile	Mon Dec  3 23:08:45 2001
@@ -1,7 +1,7 @@
 #
 #  Copyright 2000 MontaVista Software Inc.
 #  Author: MontaVista Software, Inc.
-#     	ppopov@mvista.com or support@mvista.com
+#     	ppopov@mvista.com or source@mvista.com
 #
 # Makefile for the ITE 8172 (qed-4n-s01b) board, generic files.
 #
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/dbg_io.c linux/arch/mips/ite-boards/generic/dbg_io.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/dbg_io.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/dbg_io.c	Mon Dec  3 23:08:45 2001
@@ -7,8 +7,8 @@
 
 /* we need uint32 uint8 */
 /* #include "types.h" */
-typedef         unsigned char uint8;
-typedef         unsigned int  uint32;
+typedef unsigned char uint8;
+typedef unsigned int uint32;
 
 /* --- END OF CONFIG --- */
 
@@ -39,7 +39,7 @@
 /* === CONFIG === */
 
 /* [stevel] we use the IT8712 serial port for kgdb */
-#define	DEBUG_BASE  0xB40003F8 /* 8712 serial port 1 base address */
+#define	DEBUG_BASE  0xB40003F8	/* 8712 serial port 1 base address */
 #define MAX_BAUD    115200
 
 /* === END OF CONFIG === */
@@ -69,59 +69,57 @@
 
 void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
 {
-    /* disable interrupts */
-    UART16550_WRITE(OFS_INTR_ENABLE, 0);
+	/* disable interrupts */
+	UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-    /* set up buad rate */
-    { 
-        uint32 divisor;
-       
-        /* set DIAB bit */
-        UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
-        
-        /* set divisor */
-        divisor = MAX_BAUD / baud;
-        UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
-        UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00)>>8);
-
-        /* clear DIAB bit */
-        UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
-    }
+	/* set up buad rate */
+	{
+		uint32 divisor;
+
+		/* set DIAB bit */
+		UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
+
+		/* set divisor */
+		divisor = MAX_BAUD / baud;
+		UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
+		UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
+
+		/* clear DIAB bit */
+		UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
+	}
 
-    /* set data format */
-    UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
+	/* set data format */
+	UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
 }
 
 static int remoteDebugInitialized = 0;
 
 uint8 getDebugChar(void)
 {
-    if (!remoteDebugInitialized) {
-	remoteDebugInitialized = 1;
-	debugInit(UART16550_BAUD_115200,
-		  UART16550_DATA_8BIT,
-		  UART16550_PARITY_NONE,
-		  UART16550_STOP_1BIT);
-    }
+	if (!remoteDebugInitialized) {
+		remoteDebugInitialized = 1;
+		debugInit(UART16550_BAUD_115200,
+			  UART16550_DATA_8BIT,
+			  UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+	}
 
-    while((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
-    return UART16550_READ(OFS_RCV_BUFFER);
+	while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
+	return UART16550_READ(OFS_RCV_BUFFER);
 }
 
 
 int putDebugChar(uint8 byte)
 {
-    if (!remoteDebugInitialized) {
-	remoteDebugInitialized = 1;
-	debugInit(UART16550_BAUD_115200,
-		  UART16550_DATA_8BIT,
-		  UART16550_PARITY_NONE,
-		  UART16550_STOP_1BIT);
-    }
-
-    while ((UART16550_READ(OFS_LINE_STATUS) &0x20) == 0);
-    UART16550_WRITE(OFS_SEND_BUFFER, byte);
-    return 1;
+	if (!remoteDebugInitialized) {
+		remoteDebugInitialized = 1;
+		debugInit(UART16550_BAUD_115200,
+			  UART16550_DATA_8BIT,
+			  UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+	}
+
+	while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
+	UART16550_WRITE(OFS_SEND_BUFFER, byte);
+	return 1;
 }
 
 #endif
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/irq.c linux/arch/mips/ite-boards/generic/irq.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/irq.c	Sun Aug 12 10:38:47 2001
+++ linux/arch/mips/ite-boards/generic/irq.c	Mon Dec  3 23:08:45 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000,2001 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  * Part of this file was derived from Carsten Langgaard's 
  * arch/mips/mips-boards/atlas/atlas_int.c.
@@ -33,7 +33,6 @@
  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  *  675 Mass Ave, Cambridge, MA 02139, USA.
  */
-#include <linux/config.h>
 #include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/kernel_stat.h>
@@ -76,12 +75,13 @@
 extern void set_debug_traps(void);
 extern void mips_timer_interrupt(int irq, struct pt_regs *regs);
 extern asmlinkage void it8172_IRQ(void);
-irq_cpustat_t irq_stat [NR_CPUS];
 unsigned int local_bh_count[NR_CPUS];
 unsigned int local_irq_count[NR_CPUS];
 unsigned long spurious_count = 0;
 irq_desc_t irq_desc[NR_IRQS];
 irq_desc_t *irq_desc_base=&irq_desc[0];
+void disable_it8172_irq(unsigned int irq_nr);
+void enable_it8172_irq(unsigned int irq_nr);
 
 struct it8172_intc_regs volatile *it8172_hw0_icregs
 	= (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE));
@@ -110,7 +110,7 @@
         unsigned long flags;
 
         save_and_cli(flags);
-        mask_irq(irq_nr);
+	disable_it8172_irq(irq_nr);
         restore_flags(flags);
 }
 
@@ -119,15 +119,13 @@
 	unsigned long flags;
 
         save_and_cli(flags);
-        unmask_irq(irq_nr);
+	enable_it8172_irq(irq_nr);
         restore_flags(flags);
 }
 
 
 void disable_it8172_irq(unsigned int irq_nr)
 {
-	unsigned short mask;
-
 	DPRINTK("disable_it8172_irq %d\n", irq_nr);
 
 	if ( (irq_nr >= IT8172_LPC_IRQ_BASE) && (irq_nr <= IT8172_SERIRQ_15)) {
@@ -290,7 +288,6 @@
 		printk("Unhandled interrupt %d, cause %x, disabled\n", 
 				(unsigned)irq, (unsigned)regs->cp0_cause);
 		disable_it8172_irq(irq);
-		//disable_irq(1<<irq);
 	}
 	irq_exit(cpu, irq);
 }
@@ -325,7 +322,6 @@
                         cli();
                         *p = action->next;
 			disable_it8172_irq(irq);
-                        //disable_irq(1<<irq);
                         restore_flags(flags);
                         kfree(action);
                         return 0;
@@ -378,7 +374,11 @@
 
 void enable_cpu_timer(void)
 {
-	enable_irq(1<<EXT_IRQ5_TO_IP); /* timer interrupt */
+        unsigned long flags;
+
+        save_and_cli(flags);
+	unmask_irq(1<<EXT_IRQ5_TO_IP); /* timer interrupt */
+        restore_flags(flags);
 }
 
 unsigned long probe_irq_on (void)
@@ -395,6 +395,8 @@
 void __init init_IRQ(void)
 {
 	int i;
+        unsigned long flags;
+
 
         memset(irq_desc, 0, sizeof(irq_desc));
         set_except_vector(0, it8172_IRQ);
@@ -440,8 +442,9 @@
 	 * Enable external int line 2
 	 * All ITE interrupts are masked for now.
 	 */
-	enable_irq(1<<EXT_IRQ0_TO_IP);
-	//change_cp0_status(ST0_IM, IE_IRQ2);
+        save_and_cli(flags);
+	unmask_irq(1<<EXT_IRQ0_TO_IP);
+        restore_flags(flags);
 
 #ifdef CONFIG_REMOTE_DEBUG
 	/* If local serial I/O used for debug port, enter kgdb at once */
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/it8172_cir.c linux/arch/mips/ite-boards/generic/it8172_cir.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/it8172_cir.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/it8172_cir.c	Mon Dec  3 23:08:45 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2001 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/it8172_pci.c linux/arch/mips/ite-boards/generic/it8172_pci.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/it8172_pci.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/it8172_pci.c	Mon Dec  3 23:08:45 2001
@@ -1,11 +1,10 @@
 /*
- *
  * BRIEF MODULE DESCRIPTION
  *	IT8172 system controller specific pci support.
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -271,6 +270,12 @@
 
 void __init pcibios_fixup_bus(struct pci_bus *b)
 {
-	printk("pcibios_fixup_bus\n");
+	//printk("pcibios_fixup_bus\n");
 }
+
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 1;
+}
+
 #endif /* CONFIG_PCI */
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/it8172_rtc.c linux/arch/mips/ite-boards/generic/it8172_rtc.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/it8172_rtc.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/it8172_rtc.c	Mon Dec  3 23:08:45 2001
@@ -1,7 +1,7 @@
 /*
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  * Carsten Langgaard, carstenl@mips.com
  * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
@@ -26,7 +26,6 @@
  * RTC routines for ITE8172 MC146818-compatible rtc chip.
  *
  */
-#include <asm/spinlock.h>
 #include <linux/mc146818rtc.h>
 #include <asm/it8172/it8172.h>
 
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/it8172_setup.c linux/arch/mips/ite-boards/generic/it8172_setup.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/it8172_setup.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/it8172_setup.c	Mon Dec  3 23:08:45 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -66,7 +66,7 @@
 extern int SearchIT8712(void);
 extern void InitLPCInterface(void);
 extern char * __init prom_getcmdline(void);
-extern void it8172_restart(void);
+extern void it8172_restart(char *command);
 extern void it8172_halt(void);
 extern void it8172_power_off(void);
 
@@ -114,19 +114,18 @@
 
 void __init it8172_setup(void)
 {
-#ifdef CONFIG_BLK_DEV_IT8172
 	unsigned short dsr;
-#endif
 	char *argptr;
 
 	argptr = prom_getcmdline();
 #ifdef CONFIG_SERIAL_CONSOLE
-	if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) {
-		strcpy(serial_console, "ttyS0,115200");
-		console_setup(serial_console, NULL);
+	if ((argptr = strstr(argptr, "console=")) == NULL) {
+		argptr = prom_getcmdline();
+		strcat(argptr, " console=ttyS0,115200");
 	}
 #endif	  
 
+	clear_cp0_status(ST0_FR);
 	rtc_ops = &it8172_rtc_ops;
 
 	_machine_restart = it8172_restart;
@@ -153,19 +152,25 @@
 	ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
 #endif
 
-#ifdef CONFIG_BLK_DEV_IT8172
 	/*
-	 * Pull IDE device out of standby mode.
+	 * Pull enabled devices out of standby
 	 */
 	IT_IO_READ16(IT_PM_DSR, dsr);
+#ifdef CONFIG_SOUND_IT8172
+	dsr &= ~IT_PM_DSR_ACSB;
+#else
+	dsr |= IT_PM_DSR_ACSB;
+#endif	
+#ifdef CONFIG_BLK_DEV_IT8172
 	dsr &= ~IT_PM_DSR_IDESB;
-	IT_IO_WRITE16(IT_PM_DSR, dsr);
-
 	ide_ops = &std_ide_ops;
+#else
+	dsr |= IT_PM_DSR_IDESB;
 #endif
+	IT_IO_WRITE16(IT_PM_DSR, dsr);
 
 #ifdef CONFIG_FB
-    conswitchp = &dummy_con;
+	conswitchp = &dummy_con;
 #endif
 
 	InitLPCInterface();
@@ -266,8 +271,6 @@
 	unsigned int data_port = 0x14000060;
 	unsigned char data;
 	int i;
-
-	printk("8712 keyboard init");
 
 	outb(0xaa, cmd_port); /* send self-test cmd */
 	i = 0;
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/lpc.c linux/arch/mips/ite-boards/generic/lpc.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/lpc.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/lpc.c	Mon Dec  3 23:08:45 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2001 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -41,7 +41,7 @@
 #define FALSE 0
 #endif
 
-void LPCEnterMBPnP()
+void LPCEnterMBPnP(void)
 {
 	int i;
 	unsigned char key[4] = {0x87, 0x01, 0x55, 0x55};
@@ -51,7 +51,7 @@
 
 }
 
-void LPCExitMBPnP()
+void LPCExitMBPnP(void)
 {
 	outb(0x02, LPC_KEY_ADDR);
 	outb(0x02, LPC_DATA_ADDR);
@@ -80,7 +80,7 @@
 	return rtn;
 }
 
-int SearchIT8712()
+int SearchIT8712(void)
 {
 	unsigned char Id1, Id2;
 	unsigned short Id;
@@ -98,7 +98,7 @@
 		return FALSE;
 }
 
-void InitLPCInterface()
+void InitLPCInterface(void)
 {
 	unsigned char bus, dev_fn;
 	unsigned long data;
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/pmon_prom.c linux/arch/mips/ite-boards/generic/pmon_prom.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/pmon_prom.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/pmon_prom.c	Mon Dec  3 23:08:45 2001
@@ -6,7 +6,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  * This file was derived from Carsten Langgaard's 
  * arch/mips/mips-boards/xx files.
@@ -35,6 +35,7 @@
  *  675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+#include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/string.h>
@@ -44,8 +45,8 @@
 /* #define DEBUG_CMDLINE */
 
 char arcs_cmdline[COMMAND_LINE_SIZE];
-int prom_argc;
-char **prom_argv, **prom_envp;
+extern int prom_argc;
+extern char **prom_argv, **prom_envp;
 
 typedef struct
 {
@@ -126,12 +127,16 @@
 
 	memsize_str = prom_getenv("memsize");
 	if (!memsize_str) {
-		printk("memsize unknown: setting to 32MB\n");
+#ifdef CONFIG_MIPS_ITE8172
 		memsize = 32; 
-	} else {
-#ifdef DEBUG
-		printk("prom_memsize: %s\n", memsize_str);
+#elif defined(CONFIG_MIPS_IVR)
+		memsize = 64; 
+#else
+		memsize = 8; 
 #endif
+		printk("memsize unknown: setting to %dMB\n", memsize);
+	} else {
+		printk("memsize: %s\n", memsize_str);
 		memsize = simple_strtol(memsize_str, NULL, 0);
 	}
 	return memsize;
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/puts.c linux/arch/mips/ite-boards/generic/puts.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/puts.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/puts.c	Mon Dec  3 23:08:45 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000,2001 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -30,7 +30,7 @@
 
 #include <linux/types.h>
 
-#define SERIAL_BASE   0xB4011800 /* it8172 */
+#define SERIAL_BASE   0xB4011800	/* it8172 */
 #define SER_CMD       5
 #define SER_DATA      0x00
 #define TX_BUSY       0x20
@@ -39,106 +39,101 @@
 #undef SLOW_DOWN
 
 static const char digits[16] = "0123456789abcdef";
-static volatile unsigned char * const com1 = (unsigned char *)SERIAL_BASE;
+static volatile unsigned char *const com1 = (unsigned char *) SERIAL_BASE;
 
 
 #ifdef SLOW_DOWN
 static inline void slow_down()
 {
-    int k;
-    for (k=0; k<10000; k++);
+	int k;
+	for (k = 0; k < 10000; k++);
 }
 #else
 #define slow_down()
 #endif
 
-void
-putch(const unsigned char c)
+void putch(const unsigned char c)
 {
-    unsigned char ch;
-    int i = 0;
+	unsigned char ch;
+	int i = 0;
 
-    do {
-        ch = com1[SER_CMD];
-        slow_down();
-        i++;
-        if (i>TIMEOUT) {
-            break;
-        }
-    } while (0 == (ch & TX_BUSY));
-    com1[SER_DATA] = c;
+	do {
+		ch = com1[SER_CMD];
+		slow_down();
+		i++;
+		if (i > TIMEOUT) {
+			break;
+		}
+	} while (0 == (ch & TX_BUSY));
+	com1[SER_DATA] = c;
 }
 
-void
-puts(unsigned char *cp)
+void puts(unsigned char *cp)
 {
-    unsigned char ch;
-    int i = 0;
+	unsigned char ch;
+	int i = 0;
 
-    while (*cp) {
-        do {
-             ch = com1[SER_CMD];
-            slow_down();
-            i++;
-            if (i>TIMEOUT) {
-                break;
-            }
-        } while (0 == (ch & TX_BUSY));
-        com1[SER_DATA] = *cp++;
-    }
-    putch('\r');
-    putch('\n');
+	while (*cp) {
+		do {
+			ch = com1[SER_CMD];
+			slow_down();
+			i++;
+			if (i > TIMEOUT) {
+				break;
+			}
+		} while (0 == (ch & TX_BUSY));
+		com1[SER_DATA] = *cp++;
+	}
+	putch('\r');
+	putch('\n');
 }
 
-void
-fputs(unsigned char *cp)
+void fputs(unsigned char *cp)
 {
-    unsigned char ch;
-    int i = 0;
+	unsigned char ch;
+	int i = 0;
 
-    while (*cp) {
+	while (*cp) {
 
-        do {
-             ch = com1[SER_CMD];
-             slow_down();
-            i++;
-            if (i>TIMEOUT) {
-                break;
-            }
-        } while (0 == (ch & TX_BUSY));
-        com1[SER_DATA] = *cp++;
-    }
+		do {
+			ch = com1[SER_CMD];
+			slow_down();
+			i++;
+			if (i > TIMEOUT) {
+				break;
+			}
+		} while (0 == (ch & TX_BUSY));
+		com1[SER_DATA] = *cp++;
+	}
 }
 
 
-void
-put64(uint64_t ul)
+void put64(uint64_t ul)
 {
-    int cnt;
-    unsigned ch;
+	int cnt;
+	unsigned ch;
 
-    cnt = 16;            /* 16 nibbles in a 64 bit long */
-    putch('0');
-    putch('x');
-    do {
-        cnt--;
-        ch = (unsigned char)(ul >> cnt * 4) & 0x0F;
-                putch(digits[ch]);
-    } while (cnt > 0);
+	cnt = 16;		/* 16 nibbles in a 64 bit long */
+	putch('0');
+	putch('x');
+	do {
+		cnt--;
+		ch = (unsigned char) (ul >> cnt * 4) & 0x0F;
+		putch(digits[ch]);
+	} while (cnt > 0);
 }
 
-void
-put32(unsigned u)
+void put32(unsigned u)
 {
-    int cnt;
-    unsigned ch;
+	int cnt;
+	unsigned ch;
 
-    cnt = 8;            /* 8 nibbles in a 32 bit long */
-    putch('0');
-    putch('x');
-    do {
-        cnt--;
-        ch = (unsigned char)(u >> cnt * 4) & 0x0F;
-                putch(digits[ch]);
-    } while (cnt > 0);
+	cnt = 8;		/* 8 nibbles in a 32 bit long */
+	putch('0');
+	putch('x');
+	do {
+		cnt--;
+		ch = (unsigned char) (u >> cnt * 4) & 0x0F;
+		putch(digits[ch]);
+	} while (cnt > 0);
 }
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/reset.c linux/arch/mips/ite-boards/generic/reset.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/reset.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/reset.c	Mon Dec  3 23:08:45 2001
@@ -3,10 +3,9 @@
  * BRIEF MODULE DESCRIPTION
  *	ITE 8172 reset routines.
  *
- * Copyright (C) 1997, 2001 Ralf Baechle
  * Copyright 2001 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -37,7 +36,7 @@
 #include <asm/reboot.h>
 #include <asm/system.h>
 
-void it8172_restart(char *command)
+void it8172_restart()
 {
 	set_cp0_status(ST0_BEV | ST0_ERL);
 	change_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/generic/time.c linux/arch/mips/ite-boards/generic/time.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/generic/time.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/generic/time.c	Mon Dec  3 23:08:45 2001
@@ -23,6 +23,7 @@
  *
  */
 
+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kernel_stat.h>
 #include <linux/sched.h>
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/ivr/Makefile linux/arch/mips/ite-boards/ivr/Makefile
--- linux-2.4.10-pre6/arch/mips/ite-boards/ivr/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ite-boards/ivr/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,28 @@
+#
+#  Copyright 2000 MontaVista Software Inc.
+#  Author: MontaVista Software, Inc.
+#     	ppopov@mvista.com or source@mvista.com
+#
+# Makefile for the Globespan IVR board,
+# board-specific files.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+all: ivr.o
+
+O_TARGET := ivr.o
+
+obj-y := init.o 
+
+obj-CONFIG_PCI += pci_fixup.o
+obj-CONFIG_BLK_DEV_INITRD += le_ramdisk.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/ivr/README linux/arch/mips/ite-boards/ivr/README
--- linux-2.4.10-pre6/arch/mips/ite-boards/ivr/README	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ite-boards/ivr/README	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,3 @@
+This is not really a board made by ITE Semi, but it's very 
+similar to the ITE QED-4N-S01B board.  The IVR board is made
+by Globespan and it's a reference board for the PVR chip.
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/ivr/init.c linux/arch/mips/ite-boards/ivr/init.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/ivr/init.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ite-boards/ivr/init.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,87 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	IVR board setup.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/config.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <asm/it8172/it8172.h>
+#include <asm/it8172/it8172_dbg.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+
+extern char _end;
+extern void  __init prom_init_cmdline(void);
+extern unsigned long __init prom_get_memsize(void);
+extern void __init it8172_init_ram_resource(unsigned long memsize);
+
+#define PFN_UP(x)	(((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
+#define PFN_ALIGN(x)	(((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+	unsigned long mem_size;
+	unsigned long pcicr;
+
+	prom_argc = argc;
+	prom_argv = argv;
+	prom_envp = envp;
+
+	puts("IVR board running...");
+
+	mips_machgroup = MACH_GROUP_GLOBESPAN;
+	mips_machtype = MACH_IVR;  /* Globespan's iTVC15 reference board */
+
+	prom_init_cmdline();
+
+	/* pmon does not set memsize */
+	mem_size = prom_get_memsize();
+	mem_size = mem_size << 20;
+
+	/*
+	 * make the entire physical memory visible to pci bus masters
+	 */
+	IT_READ(IT_MC_PCICR, pcicr);
+	pcicr &= ~0x1f; 
+	pcicr |= (mem_size - 1) >> 22;
+	IT_WRITE(IT_MC_PCICR, pcicr);
+
+	it8172_init_ram_resource(mem_size);
+	add_memory_region(0, mem_size, BOOT_MEM_RAM);
+	return 0;
+}
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/ivr/pci_fixup.c linux/arch/mips/ite-boards/ivr/pci_fixup.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/ivr/pci_fixup.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/ite-boards/ivr/pci_fixup.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,139 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Globespan IVR board-specific pci fixups.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+
+#ifdef CONFIG_PCI
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/it8172/it8172.h>
+#include <asm/it8172/it8172_pci.h>
+#include <asm/it8172/it8172_int.h>
+
+void __init board_int_line_fixup(struct pci_dev *dev)     
+{
+	unsigned int slot, func;
+	unsigned char pin;
+        const int internal_func_irqs[7] = {
+            IT8172_AC97_IRQ,
+            IT8172_DMA_IRQ,
+            IT8172_CDMA_IRQ,
+            IT8172_USB_IRQ,
+            IT8172_BRIDGE_MASTER_IRQ,
+            IT8172_IDE_IRQ,
+            IT8172_MC68K_IRQ
+        };
+
+#ifdef DEBUG
+	printk("board_int_line_fixup bus %d\n", dev->bus->number);
+#endif
+	if (dev->bus->number != 0)
+		return;
+
+	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+
+#ifdef DEBUG
+	pci_read_config_dword(dev, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
+#endif
+
+	slot = PCI_SLOT(dev->devfn);
+        func = PCI_FUNC(dev->devfn);
+
+	switch (slot) {
+                case 0x01:
+                    /*
+                     * Internal device 1 is actually 7 different internal
+                     * devices on the IT8172G (a multi-function device).
+                     */
+                    if (func < 7)
+                        dev->irq = internal_func_irqs[func];
+                    break;
+		case 0x11:
+			switch (pin) {
+				case 0: /* pin A, hardware bug */
+				case 1: /* pin A */
+					dev->irq = IT8172_PCI_INTC_IRQ;
+					break;
+				case 2: /* pin B */
+					dev->irq = IT8172_PCI_INTD_IRQ;
+					break;
+				case 3: /* pin C */
+					dev->irq = IT8172_PCI_INTA_IRQ;
+					break;
+				case 4: /* pin D */
+					dev->irq = IT8172_PCI_INTB_IRQ;
+					break;
+				default:
+					dev->irq = 0xff; 
+					break;
+
+			}
+			break;
+		case 0x13:
+			switch (pin) {
+				case 0: /* pin A, hardware bug */
+				case 1: /* pin A */
+					dev->irq = IT8172_PCI_INTA_IRQ;
+					break;
+				case 2: /* pin B */
+					dev->irq = IT8172_PCI_INTB_IRQ;
+					break;
+				case 3: /* pin C */
+					dev->irq = IT8172_PCI_INTC_IRQ;
+					break;
+				case 4: /* pin D */
+					dev->irq = IT8172_PCI_INTD_IRQ;
+					break;
+				default:
+					dev->irq = 0xff; 
+					break;
+
+			}
+			break;
+		default:
+			return;
+	}
+
+#ifdef DEBUG
+	printk("irq fixup: slot %d, vendor %x, int line %d, int number %d\n",
+			slot, vendor, pin, dev->irq);
+#endif
+	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+
+}
+
+struct pci_fixup pcibios_fixups[] = {
+	{ PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, board_int_line_fixup },
+	{ 0 }
+};
+#endif
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/qed-4n-s01b/Makefile linux/arch/mips/ite-boards/qed-4n-s01b/Makefile
--- linux-2.4.10-pre6/arch/mips/ite-boards/qed-4n-s01b/Makefile	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/qed-4n-s01b/Makefile	Mon Dec  3 23:08:45 2001
@@ -1,7 +1,7 @@
 #
 #  Copyright 2000 MontaVista Software Inc.
 #  Author: MontaVista Software, Inc.
-#     	ppopov@mvista.com or support@mvista.com
+#     	ppopov@mvista.com or source@mvista.com
 #
 # Makefile for the ITE 8172 (qed-4n-s01b) board, board
 # specific files.
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/qed-4n-s01b/init.c linux/arch/mips/ite-boards/qed-4n-s01b/init.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/qed-4n-s01b/init.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/qed-4n-s01b/init.c	Mon Dec  3 23:08:45 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -34,8 +34,10 @@
 #include <linux/bootmem.h>
 #include <asm/addrspace.h>
 #include <asm/bootinfo.h>
+#include <linux/config.h>
 #include <linux/string.h>
 #include <linux/kernel.h>
+#include <linux/sched.h>
 #include <asm/it8172/it8172.h>
 #include <asm/it8172/it8172_dbg.h>
 
@@ -53,7 +55,7 @@
 
 int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
 {
-	unsigned long mem_size, free_start, free_end, bootmap_size;
+	unsigned long mem_size;
 	unsigned long pcicr;
 
 	prom_argc = argc;
@@ -81,7 +83,7 @@
 	IT_WRITE(IT_MC_PCICR, pcicr);
 
 	it8172_init_ram_resource(mem_size);
-	add_memory_region(0, 20 << 20, BOOT_MEM_RAM);
+	add_memory_region(0, mem_size, BOOT_MEM_RAM);
 
 	return 0;
 }
diff -urN linux-2.4.10-pre6/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c linux/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c
--- linux-2.4.10-pre6/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c	Mon Dec  3 23:08:45 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
diff -urN linux-2.4.10-pre6/arch/mips/jazz/irq.c linux/arch/mips/jazz/irq.c
--- linux-2.4.10-pre6/arch/mips/jazz/irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/jazz/irq.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,45 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 Linus Torvalds
+ * Copyright (C) 1994 - 2001 Ralf Baechle
+ */
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
+
+#include <asm/io.h>
+#include <asm/jazz.h>
+
+extern asmlinkage void jazz_handle_int(void);
+
+/*
+ * On systems with i8259-style interrupt controllers we assume for
+ * driver compatibility reasons interrupts 0 - 15 to be the i8295
+ * interrupts even if the hardware uses a different interrupt numbering.
+ */
+void __init init_IRQ (void)
+{
+	int i;
+
+	set_except_vector(0, jazz_handle_int);
+
+	init_generic_irq();
+	init_i8259_irqs();			/* Integrated i8259  */
+#if 0
+	init_jazz_irq();
+
+	/* Actually we've got more interrupts to handle ...  */
+	for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_ETHERNET; i++) {
+		irq_desc[i].status     = IRQ_DISABLED;
+		irq_desc[i].action     = 0;
+		irq_desc[i].depth      = 1;
+		irq_desc[i].handler    = &pciasic_irq_type;
+	}
+#endif
+}
diff -urN linux-2.4.10-pre6/arch/mips/jazz/jazzdma.c linux/arch/mips/jazz/jazzdma.c
--- linux-2.4.10-pre6/arch/mips/jazz/jazzdma.c	Thu Feb 24 22:52:30 2000
+++ linux/arch/mips/jazz/jazzdma.c	Mon Dec  3 23:08:45 2001
@@ -1,6 +1,4 @@
 /*
- * arch/mips/jazz/jazzdma.c
- *
  * Mips Jazz DMA controller support
  * Copyright (C) 1995, 1996 by Andreas Busse
  *
@@ -27,7 +25,7 @@
  */
 #define CONF_DEBUG_VDMA 0
 
-static unsigned long vdma_pagetable_start = 0;
+static unsigned long vdma_pagetable_start;
 
 /*
  * Debug stuff
@@ -44,16 +42,16 @@
  */
 static inline void vdma_pgtbl_init(void)
 {
-    int i;
-    unsigned long paddr = 0;
-    VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
-  
-    for (i=0; i<VDMA_PGTBL_ENTRIES; i++)
-    {
-        pgtbl[i].frame = paddr;
-        pgtbl[i].owner = VDMA_PAGE_EMPTY;
-        paddr += VDMA_PAGESIZE;
-    }
+	int i;
+	unsigned long paddr = 0;
+	VDMA_PGTBL_ENTRY *pgtbl =
+	    (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+
+	for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
+		pgtbl[i].frame = paddr;
+		pgtbl[i].owner = VDMA_PAGE_EMPTY;
+		paddr += VDMA_PAGESIZE;
+	}
 }
 
 /*
@@ -77,13 +75,12 @@
 	 */
 	vdma_pgtbl_init();
 
-	r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,PHYSADDR(vdma_pagetable_start));
+	r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
+			  PHYSADDR(vdma_pagetable_start));
 	r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
 	r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
 
 	printk("VDMA: R4030 DMA pagetables initialized.\n");
-
-	return KSEG0ADDR(vdma_pagetable_end);
 }
 
 /*
@@ -91,92 +88,90 @@
  */
 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
 {
-    VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
-    int first;
-    int last;
-    int pages;
-    unsigned int frame;
-    unsigned long laddr;
-    int i;
-    unsigned long flags;
-
-    /* check arguments */
-  
-    if (paddr > 0x1fffffff)
-    {
-        if (vdma_debug)
-            printk("vdma_alloc: Invalid physical address: %08lx\n",paddr);
-        return VDMA_ERROR;	/* invalid physical address */
-    }
-    if (size > 0x400000 || size == 0)
-    {
-        if (vdma_debug)
-            printk("vdma_alloc: Invalid size: %08lx\n",size);
-        return VDMA_ERROR;	/* invalid physical address */
-    }
-  
-    save_and_cli (flags);
-    /*
-     * Find free chunk
-     */
-    pages = (size + 4095) >> 12; /* no. of pages to allocate */
-    first = 0;
-    while (1)
-    {
-        while (entry[first].owner != VDMA_PAGE_EMPTY &&
-               first < VDMA_PGTBL_ENTRIES)
-            first++;
-        if (first+pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
-	    restore_flags (flags);
-            return VDMA_ERROR;
-	}
-
-        last = first+1;
-        while (entry[last].owner == VDMA_PAGE_EMPTY && last-first < pages)
-            last++;
-    
-        if (last-first == pages)
-            break;			/* found */
-    }
-  
-    /*
-     * Mark pages as allocated
-     */
-    laddr = (first << 12) + (paddr & (VDMA_PAGESIZE-1));
-    frame = paddr & ~(VDMA_PAGESIZE-1);
-  
-    for (i=first; i<last; i++)
-    {
-        entry[i].frame = frame;
-        entry[i].owner = laddr;
-        frame += VDMA_PAGESIZE;
-    }
-
-    /*
-     * Update translation table and return logical start address
-     */
-    r4030_write_reg32(JAZZ_R4030_TRSTBL_INV,0);
-
-    if (vdma_debug > 1)
-        printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
-               pages,laddr);
-
-    if (vdma_debug > 2)
-    {
-        printk("LADDR: ");
-        for (i=first; i<last; i++)
-            printk("%08x ",i<<12);
-        printk("\nPADDR: ");
-        for (i=first; i<last; i++)
-            printk("%08x ",entry[i].frame);
-        printk("\nOWNER: ");
-        for (i=first; i<last; i++)
-            printk("%08x ",entry[i].owner);
-        printk("\n");
-    }
-  
-    restore_flags(flags);
-    return laddr;
+	VDMA_PGTBL_ENTRY *entry =
+	    (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+	int first;
+	int last;
+	int pages;
+	unsigned int frame;
+	unsigned long laddr;
+	int i;
+	unsigned long flags;
+
+	/* check arguments */
+
+	if (paddr > 0x1fffffff) {
+		if (vdma_debug)
+			printk("vdma_alloc: Invalid physical address: %08lx\n",
+			       paddr);
+		return VDMA_ERROR;	/* invalid physical address */
+	}
+	if (size > 0x400000 || size == 0) {
+		if (vdma_debug)
+			printk("vdma_alloc: Invalid size: %08lx\n", size);
+		return VDMA_ERROR;	/* invalid physical address */
+	}
+
+	save_and_cli(flags);
+	/*
+	 * Find free chunk
+	 */
+	pages = (size + 4095) >> 12;	/* no. of pages to allocate */
+	first = 0;
+	while (1) {
+		while (entry[first].owner != VDMA_PAGE_EMPTY &&
+		       first < VDMA_PGTBL_ENTRIES) first++;
+		if (first + pages > VDMA_PGTBL_ENTRIES) {	/* nothing free */
+			restore_flags(flags);
+			return VDMA_ERROR;
+		}
+
+		last = first + 1;
+		while (entry[last].owner == VDMA_PAGE_EMPTY
+		       && last - first < pages)
+			last++;
+
+		if (last - first == pages)
+			break;	/* found */
+	}
+
+	/*
+	 * Mark pages as allocated
+	 */
+	laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
+	frame = paddr & ~(VDMA_PAGESIZE - 1);
+
+	for (i = first; i < last; i++) {
+		entry[i].frame = frame;
+		entry[i].owner = laddr;
+		frame += VDMA_PAGESIZE;
+	}
+
+	/*
+	 * Update translation table and return logical start address
+	 */
+	r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
+
+	if (vdma_debug > 1)
+		printk
+		    ("vdma_alloc: Allocated %d pages starting from %08lx\n",
+		     pages, laddr);
+
+	if (vdma_debug > 2) {
+		printk("LADDR: ");
+		for (i = first; i < last; i++)
+			printk("%08x ", i << 12);
+		printk("\nPADDR: ");
+		for (i = first; i < last; i++)
+			printk("%08x ", entry[i].frame);
+		printk("\nOWNER: ");
+		for (i = first; i < last; i++)
+			printk("%08x ", entry[i].owner);
+		printk("\n");
+	}
+
+	restore_flags(flags);
+	return laddr;
 }
 
 /*
@@ -186,102 +181,103 @@
  */
 int vdma_free(unsigned long laddr)
 {
-    VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
-    int i;
+	VDMA_PGTBL_ENTRY *pgtbl =
+	    (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+	int i;
+
+	i = laddr >> 12;
+
+	if (pgtbl[i].owner != laddr) {
+		printk
+		    ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
+		     laddr);
+		return -1;
+	}
+
+	while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
+		pgtbl[i].owner = VDMA_PAGE_EMPTY;
+		i++;
+	}
 
-    i = laddr >> 12;
+	if (vdma_debug > 1)
+		printk("vdma_free: freed %ld pages starting from %08lx\n",
+		       i - (laddr >> 12), laddr);
 
-    if (pgtbl[i].owner != laddr)
-    {
-        printk("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
-               laddr);
-        return -1;
-    }
-  
-    while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES)
-    {
-        pgtbl[i].owner = VDMA_PAGE_EMPTY;
-        i++;
-    }
-  
-    if (vdma_debug > 1)
-        printk("vdma_free: freed %ld pages starting from %08lx\n",
-               i-(laddr>>12),laddr);
-  
-    return 0;
+	return 0;
 }
 
 /*
  * Map certain page(s) to another physical address.
  * Caller must have allocated the page(s) before.
  */
-int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
+int vdma_remap(unsigned long laddr, unsigned long paddr,
+	       unsigned long size)
 {
-    VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
-    int first, pages, npages;
+	VDMA_PGTBL_ENTRY *pgtbl =
+	    (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+	int first, pages, npages;
+
+	if (laddr > 0xffffff) {
+		if (vdma_debug)
+			printk
+			    ("vdma_map: Invalid logical address: %08lx\n",
+			     laddr);
+		return -EINVAL;	/* invalid logical address */
+	}
+	if (paddr > 0x1fffffff) {
+		if (vdma_debug)
+			printk
+			    ("vdma_map: Invalid physical address: %08lx\n",
+			     paddr);
+		return -EINVAL;	/* invalid physical address */
+	}
+
+	npages = pages =
+	    (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
+	first = laddr >> 12;
+	if (vdma_debug)
+		printk("vdma_remap: first=%x, pages=%x\n", first, pages);
+	if (first + pages > VDMA_PGTBL_ENTRIES) {
+		if (vdma_debug)
+			printk("vdma_alloc: Invalid size: %08lx\n", size);
+		return -EINVAL;
+	}
+
+	paddr &= ~(VDMA_PAGESIZE - 1);
+	while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
+		if (pgtbl[first].owner != laddr) {
+			if (vdma_debug)
+				printk("Trying to remap other's pages.\n");
+			return -EPERM;	/* not owner */
+		}
+		pgtbl[first].frame = paddr;
+		paddr += VDMA_PAGESIZE;
+		first++;
+		pages--;
+	}
+
+	/*
+	 * Update translation table
+	 */
+	r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
+
+	if (vdma_debug > 2) {
+		int i;
+		pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
+		first = laddr >> 12;
+		printk("LADDR: ");
+		for (i = first; i < first + pages; i++)
+			printk("%08x ", i << 12);
+		printk("\nPADDR: ");
+		for (i = first; i < first + pages; i++)
+			printk("%08x ", pgtbl[i].frame);
+		printk("\nOWNER: ");
+		for (i = first; i < first + pages; i++)
+			printk("%08x ", pgtbl[i].owner);
+		printk("\n");
+	}
 
-    if (laddr > 0xffffff)
-    {
-        if (vdma_debug)
-            printk("vdma_map: Invalid logical address: %08lx\n",laddr);
-        return -EINVAL;		/* invalid logical address */
-    }
-    if (paddr > 0x1fffffff)
-    {
-        if (vdma_debug)
-            printk("vdma_map: Invalid physical address: %08lx\n",paddr);
-        return -EINVAL;		/* invalid physical address */
-    }
-  
-    npages = pages = (((paddr & (VDMA_PAGESIZE-1)) + size) >> 12) + 1;
-    first = laddr >> 12;
-    if (vdma_debug)
-        printk("vdma_remap: first=%x, pages=%x\n",first,pages);
-    if (first+pages > VDMA_PGTBL_ENTRIES)
-    {
-        if (vdma_debug)
-            printk("vdma_alloc: Invalid size: %08lx\n",size);
-        return -EINVAL;
-    }
-
-    paddr &= ~(VDMA_PAGESIZE-1);
-    while (pages > 0 && first < VDMA_PGTBL_ENTRIES)
-    {
-        if (pgtbl[first].owner != laddr)
-        {
-            if (vdma_debug)
-                printk("Trying to remap other's pages.\n");
-            return -EPERM;		/* not owner */
-        }
-        pgtbl[first].frame = paddr;
-        paddr += VDMA_PAGESIZE;
-        first++;
-        pages--;
-    }
-
-    /*
-     * Update translation table
-     */
-    r4030_write_reg32(JAZZ_R4030_TRSTBL_INV,0);
-  
-    if (vdma_debug > 2)
-    {
-        int i;
-        pages = (((paddr & (VDMA_PAGESIZE-1)) + size) >> 12) + 1;
-        first = laddr >> 12;
-        printk("LADDR: ");
-        for (i=first; i<first+pages; i++)
-            printk("%08x ",i<<12);
-        printk("\nPADDR: ");
-        for (i=first; i<first+pages; i++)
-            printk("%08x ",pgtbl[i].frame);
-        printk("\nOWNER: ");
-        for (i=first; i<first+pages; i++)
-            printk("%08x ",pgtbl[i].owner);
-        printk("\n");
-    }
-      
-    return 0;
+	return 0;
 }
 
 /*
@@ -291,22 +287,22 @@
  */
 unsigned long vdma_phys2log(unsigned long paddr)
 {
-    int i;
-    int frame;
-    VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
-
-    frame = paddr & ~(VDMA_PAGESIZE-1);
-
-    for (i=0; i<VDMA_PGTBL_ENTRIES; i++)
-    {
-        if (pgtbl[i].frame == frame)
-            break;
-    }
+	int i;
+	int frame;
+	VDMA_PGTBL_ENTRY *pgtbl =
+	    (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+
+	frame = paddr & ~(VDMA_PAGESIZE - 1);
+
+	for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
+		if (pgtbl[i].frame == frame)
+			break;
+	}
 
-    if (i == VDMA_PGTBL_ENTRIES)
-        return ~0UL;
+	if (i == VDMA_PGTBL_ENTRIES)
+		return ~0UL;
 
-    return (i<<12) + (paddr & (VDMA_PAGESIZE-1));
+	return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
 }
 
 /*
@@ -314,44 +310,47 @@
  */
 unsigned long vdma_log2phys(unsigned long laddr)
 {
-    VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
+	VDMA_PGTBL_ENTRY *pgtbl =
+	    (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
 
-    return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE-1));
+	return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
 }
-  
+
 /*
  * Print DMA statistics
  */
 void vdma_stats(void)
 {
-    int i;
-  
-    printk("vdma_stats: CONFIG: %08x\n",
-           r4030_read_reg32(JAZZ_R4030_CONFIG));
-    printk("R4030 translation table base: %08x\n",
-           r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
-    printk("R4030 translation table limit: %08x\n",
-           r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
-    printk("vdma_stats: INV_ADDR: %08x\n",
-           r4030_read_reg32(JAZZ_R4030_INV_ADDR));
-    printk("vdma_stats: R_FAIL_ADDR: %08x\n",
-           r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
-    printk("vdma_stats: M_FAIL_ADDR: %08x\n",
-           r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
-    printk("vdma_stats: IRQ_SOURCE: %08x\n",
-           r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
-    printk("vdma_stats: I386_ERROR: %08x\n",
-           r4030_read_reg32(JAZZ_R4030_I386_ERROR));
-    printk("vdma_chnl_modes:   ");
-    for (i=0; i<8; i++)
-        printk("%04x ",
-               (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_MODE+(i<<5)));
-    printk("\n");
-    printk("vdma_chnl_enables: ");
-    for (i=0; i<8; i++)
-        printk("%04x ",
-               (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(i<<5)));
-    printk("\n");
+	int i;
+
+	printk("vdma_stats: CONFIG: %08x\n",
+	       r4030_read_reg32(JAZZ_R4030_CONFIG));
+	printk("R4030 translation table base: %08x\n",
+	       r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
+	printk("R4030 translation table limit: %08x\n",
+	       r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
+	printk("vdma_stats: INV_ADDR: %08x\n",
+	       r4030_read_reg32(JAZZ_R4030_INV_ADDR));
+	printk("vdma_stats: R_FAIL_ADDR: %08x\n",
+	       r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
+	printk("vdma_stats: M_FAIL_ADDR: %08x\n",
+	       r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
+	printk("vdma_stats: IRQ_SOURCE: %08x\n",
+	       r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
+	printk("vdma_stats: I386_ERROR: %08x\n",
+	       r4030_read_reg32(JAZZ_R4030_I386_ERROR));
+	printk("vdma_chnl_modes:   ");
+	for (i = 0; i < 8; i++)
+		printk("%04x ",
+		       (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
+						   (i << 5)));
+	printk("\n");
+	printk("vdma_chnl_enables: ");
+	for (i = 0; i < 8; i++)
+		printk("%04x ",
+		       (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+						   (i << 5)));
+	printk("\n");
 }
 
 /*
@@ -363,33 +362,35 @@
  */
 void vdma_enable(int channel)
 {
-    int status;
-  
-    if (vdma_debug)
-        printk("vdma_enable: channel %d\n",channel);
-  
-    /*
-     * Check error conditions first
-     */
-    status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5));
-    if (status & 0x400)
-        printk("VDMA: Channel %d: Address error!\n",channel);
-    if (status & 0x200)
-        printk("VDMA: Channel %d: Memory error!\n",channel);
-
-    /*
-     * Clear all interrupt flags
-     */
-    r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
-		      r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) |
-                      R4030_TC_INTR | R4030_MEM_INTR | R4030_ADDR_INTR);
-
-    /*
-     * Enable the desired channel
-     */
-    r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
-                      r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) |
-                      R4030_CHNL_ENABLE);
+	int status;
+
+	if (vdma_debug)
+		printk("vdma_enable: channel %d\n", channel);
+
+	/*
+	 * Check error conditions first
+	 */
+	status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
+	if (status & 0x400)
+		printk("VDMA: Channel %d: Address error!\n", channel);
+	if (status & 0x200)
+		printk("VDMA: Channel %d: Memory error!\n", channel);
+
+	/*
+	 * Clear all interrupt flags
+	 */
+	r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+			  r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+					   (channel << 5)) | R4030_TC_INTR
+			  | R4030_MEM_INTR | R4030_ADDR_INTR);
+
+	/*
+	 * Enable the desired channel
+	 */
+	r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+			  r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+					   (channel << 5)) |
+			  R4030_CHNL_ENABLE);
 }
 
 /*
@@ -397,28 +398,34 @@
  */
 void vdma_disable(int channel)
 {
-    if (vdma_debug)
-    {
-        int status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5));
-
-        printk("vdma_disable: channel %d\n",channel);
-        printk("VDMA: channel %d status: %04x (%s) mode: "
-               "%02x addr: %06x count: %06x\n",
-               channel,status,((status & 0x600) ? "ERROR" : "OK"),
-               (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5)),
-               (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_ADDR+(channel<<5)),
-               (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5)));
-    }
-  
-    r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
-                      r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) &
-                      ~R4030_CHNL_ENABLE);
-
-    /*
-     * After disabling a DMA channel a remote bus register should be
-     * read to ensure that the current DMA acknowledge cycle is completed.
-     */
-    *((volatile unsigned int *)JAZZ_DUMMY_DEVICE);
+	if (vdma_debug) {
+		int status =
+		    r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+				     (channel << 5));
+
+		printk("vdma_disable: channel %d\n", channel);
+		printk("VDMA: channel %d status: %04x (%s) mode: "
+		       "%02x addr: %06x count: %06x\n",
+		       channel, status,
+		       ((status & 0x600) ? "ERROR" : "OK"),
+		       (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
+						   (channel << 5)),
+		       (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
+						   (channel << 5)),
+		       (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
+						   (channel << 5)));
+	}
+
+	r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+			  r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+					   (channel << 5)) &
+			  ~R4030_CHNL_ENABLE);
+
+	/*
+	 * After disabling a DMA channel a remote bus register should be
+	 * read to ensure that the current DMA acknowledge cycle is completed.
+	 */
+	*((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
 }
 
 /*
@@ -432,56 +439,60 @@
  */
 void vdma_set_mode(int channel, int mode)
 {
-    if (vdma_debug)
-        printk("vdma_set_mode: channel %d, mode 0x%x\n", channel, mode);
-
-    switch(channel)
-    {
-    case JAZZ_SCSI_DMA:			/* scsi */
-        r4030_write_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5),
+	if (vdma_debug)
+		printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
+		       mode);
+
+	switch (channel) {
+	case JAZZ_SCSI_DMA:	/* scsi */
+		r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
 /*			  R4030_MODE_FAST | */
 /*			  R4030_MODE_BURST | */
-                          R4030_MODE_INTR_EN |
-                          R4030_MODE_WIDTH_16 |
-                          R4030_MODE_ATIME_80);
-        break;
-      
-    case JAZZ_FLOPPY_DMA:	/* floppy */
-        r4030_write_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5),
+				  R4030_MODE_INTR_EN |
+				  R4030_MODE_WIDTH_16 |
+				  R4030_MODE_ATIME_80);
+		break;
+
+	case JAZZ_FLOPPY_DMA:	/* floppy */
+		r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
 /*			  R4030_MODE_FAST | */
 /*			  R4030_MODE_BURST | */
-                          R4030_MODE_INTR_EN |
-                          R4030_MODE_WIDTH_8 |
-                          R4030_MODE_ATIME_120);
-        break;
-
-    case JAZZ_AUDIOL_DMA:
-    case JAZZ_AUDIOR_DMA:
-        printk("VDMA: Audio DMA not supported yet.\n");
-        break;
-      
-    default:
-        printk("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
-               channel);
-    }
-  
-    switch(mode)
-    {
-    case DMA_MODE_READ:
-        r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
-                          r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) &
-                          ~R4030_CHNL_WRITE);
-        break;
-      
-    case DMA_MODE_WRITE:
-        r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
-                          r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) |
-                          R4030_CHNL_WRITE);
-      break;
-      
-    default:
-        printk("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",mode);
-    }
+				  R4030_MODE_INTR_EN |
+				  R4030_MODE_WIDTH_8 |
+				  R4030_MODE_ATIME_120);
+		break;
+
+	case JAZZ_AUDIOL_DMA:
+	case JAZZ_AUDIOR_DMA:
+		printk("VDMA: Audio DMA not supported yet.\n");
+		break;
+
+	default:
+		printk
+		    ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
+		     channel);
+	}
+
+	switch (mode) {
+	case DMA_MODE_READ:
+		r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+				  r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+						   (channel << 5)) &
+				  ~R4030_CHNL_WRITE);
+		break;
+
+	case DMA_MODE_WRITE:
+		r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+				  r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+						   (channel << 5)) |
+				  R4030_CHNL_WRITE);
+		break;
+
+	default:
+		printk
+		    ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
+		     mode);
+	}
 }
 
 /*
@@ -489,10 +500,11 @@
  */
 void vdma_set_addr(int channel, long addr)
 {
-    if (vdma_debug)
-        printk("vdma_set_addr: channel %d, addr %lx\n",channel,addr);
+	if (vdma_debug)
+		printk("vdma_set_addr: channel %d, addr %lx\n", channel,
+		       addr);
 
-    r4030_write_reg32(JAZZ_R4030_CHNL_ADDR+(channel<<5),addr);
+	r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
 }
 
 /*
@@ -500,25 +512,28 @@
  */
 void vdma_set_count(int channel, int count)
 {
-    if (vdma_debug)
-        printk("vdma_set_count: channel %d, count %08x\n",channel,(unsigned)count);
-  
-    r4030_write_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5),count);
+	if (vdma_debug)
+		printk("vdma_set_count: channel %d, count %08x\n", channel,
+		       (unsigned) count);
+
+	r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
 }
-     
+
 /*
  * Get Residual
  */
 int vdma_get_residue(int channel)
 {
-    int residual;
-  
-    residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5));
-
-    if (vdma_debug)
-        printk("vdma_get_residual: channel %d: residual=%d\n",channel,residual);
-  
-    return residual;
+	int residual;
+
+	residual =
+	    r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
+
+	if (vdma_debug)
+		printk("vdma_get_residual: channel %d: residual=%d\n",
+		       channel, residual);
+
+	return residual;
 }
 
 /*
@@ -526,12 +541,13 @@
  */
 int vdma_get_enable(int channel)
 {
-    int enable;
-    
-    enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5));
-    
-    if (vdma_debug)
-	printk("vdma_get_enable: channel %d: enable=%d\n",channel,enable);
-    
-    return enable;
+	int enable;
+
+	enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
+
+	if (vdma_debug)
+		printk("vdma_get_enable: channel %d: enable=%d\n", channel,
+		       enable);
+
+	return enable;
 }
diff -urN linux-2.4.10-pre6/arch/mips/jazz/rtc-jazz.c linux/arch/mips/jazz/rtc-jazz.c
--- linux-2.4.10-pre6/arch/mips/jazz/rtc-jazz.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/jazz/rtc-jazz.c	Mon Dec  3 23:08:45 2001
@@ -1,12 +1,11 @@
-/* $Id: rtc-jazz.c,v 1.2 1998/06/25 20:19:14 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
  * RTC routines for Jazz style attached Dallas chip.
  *
- * Copyright (C) 1998 by Ralf Baechle
+ * Copyright (C) 1998, 2001 by Ralf Baechle
  */
 #include <linux/mc146818rtc.h>
 #include <asm/io.h>
diff -urN linux-2.4.10-pre6/arch/mips/jazz/setup.c linux/arch/mips/jazz/setup.c
--- linux-2.4.10-pre6/arch/mips/jazz/setup.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/jazz/setup.c	Mon Dec  3 23:08:45 2001
@@ -1,12 +1,12 @@
-/* $Id: setup.c,v 1.24 1999/10/09 00:00:58 ralf Exp $
- *
+/*
  * Setup pointers to hardware-dependent routines.
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
+ * Copyright (C) 1996, 1997, 1998, 2001 by Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #include <linux/config.h>
 #include <linux/hdreg.h>
@@ -72,7 +72,7 @@
 			  JAZZ_IE_FLOPPY);
 	r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */
 	r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */
-	set_cp0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
+	change_cp0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
 	/* set the clock to 100 Hz */
 	r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
 	request_region(0x20, 0x20, "pic1");
@@ -80,11 +80,6 @@
 	i8259_setup_irq(2, &irq2);
 }
 
-int __init page_is_ram(unsigned long pagenr)
-{
-	return 1;
-}
-
 void __init jazz_setup(void)
 {
 	add_wired_entry (0x02000017, 0x03c00017, 0xe0000000, PM_64K);
@@ -93,6 +88,8 @@
 
 	irq_setup = jazz_irq_setup;
 	mips_io_port_base = JAZZ_PORT_BASE;
+	if (mips_machtype == MACH_MIPS_MAGNUM_4000)
+		EISA_bus = 1;
 	isa_slot_offset = 0xe3000000;
 	request_region(0x00,0x20,"dma1");
 	request_region(0x40,0x20,"timer");
diff -urN linux-2.4.10-pre6/arch/mips/kernel/Makefile linux/arch/mips/kernel/Makefile
--- linux-2.4.10-pre6/arch/mips/kernel/Makefile	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/Makefile	Mon Dec  3 23:08:45 2001
@@ -35,15 +35,12 @@
 endif
 
 obj-$(CONFIG_SMP)		+= smp.o
-obj-$(CONFIG_MIPS_FPE_MODULE)	+= fpe.o
-ifndef CONFIG_MIPS_FPU_EMULATOR
-  obj-y				+= softfp.o
-endif
 
 # Old style irq support, going to die in 2.5.
 export-objs			+= old-irq.o
 obj-$(CONFIG_NEW_IRQ)		+= irq.o
 obj-$(CONFIG_ROTTEN_IRQ)	+= old-irq.o
+obj-$(CONFIG_I8259)		+= i8259.o
 
 # transition from old time.c to new time.c
 # some boards uses old-time.c, some use time.c, and some use their own ones
@@ -56,6 +53,11 @@
 obj-$(CONFIG_REMOTE_DEBUG)	+= gdb-low.o gdb-stub.o 
 obj-$(CONFIG_PCI)		+= pci-dma.o
 obj-$(CONFIG_PROC_FS)		+= proc.o
+
+ifdef CONFIG_PCI
+obj-$(CONFIG_NEW_PCI)          += pci.o
+obj-$(CONFIG_PCI_AUTO)         += pci_auto.o
+endif
 
 entry.o: entry.S
 head.o: head.S
diff -urN linux-2.4.10-pre6/arch/mips/kernel/branch.c linux/arch/mips/kernel/branch.c
--- linux-2.4.10-pre6/arch/mips/kernel/branch.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/kernel/branch.c	Mon Dec  3 23:08:45 2001
@@ -5,9 +5,9 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1996, 97, 2000 by Ralf Baechle
+ * Copyright (C) 1996, 97, 2000, 2001 by Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
-#include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
 #include <linux/signal.h>
@@ -29,11 +29,8 @@
 	union mips_instruction insn;
 
 	epc = regs->cp0_epc;
-	if (epc & 3) {
-		printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
-		force_sig(SIGBUS, current);
-		return -EFAULT;
-	}
+	if (epc & 3)
+		goto unaligned;
 
 	/*
 	 * Read the instruction
@@ -167,12 +164,10 @@
 	 * And now the FPA/cp1 branch instructions.
 	 */
 	case cop1_op:
-#ifdef CONFIG_MIPS_FPU_EMULATOR
 		if(!(mips_cpu.options & MIPS_CPU_FPU))
 			fcr31 = current->thread.fpu.soft.sr;
 		else
-#endif
-		asm ("cfc1\t%0,$31":"=r" (fcr31));
+			asm ("cfc1\t%0,$31":"=r" (fcr31));
 		bit = (insn.i_format.rt >> 2);
 		bit += (bit != 0);
 		bit += 23;
@@ -199,4 +194,9 @@
 	}
 
 	return 0;
+
+unaligned:
+	printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
+	force_sig(SIGBUS, current);
+	return -EFAULT;
 }
diff -urN linux-2.4.10-pre6/arch/mips/kernel/entry.S linux/arch/mips/kernel/entry.S
--- linux-2.4.10-pre6/arch/mips/kernel/entry.S	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/entry.S	Mon Dec  3 23:08:45 2001
@@ -1,13 +1,12 @@
-/* $Id: entry.S,v 1.19 1999/12/08 22:05:10 harald Exp $
- *
- * Low level exception handling
- *
+/*
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1994 - 2000 by Ralf Baechle
+ * Copyright (C) 1994 - 2000, 2001 by Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #include <linux/config.h>
 #include <linux/sys.h>
@@ -26,50 +25,64 @@
 #include <asm/unistd.h>
 #include <asm/isadep.h>
 
+/* This duplicates the definition from <linux/sched.h> */
+#define PT_TRACESYS	0x00000002		/* tracing system calls */
+
+
 		.text
 		.align 4
 		.set	push
 		.set	reorder
 EXPORT(ret_from_fork)
-		 move	a0, v0			# prev
+		move	a0, v0			# prev
 		jal	schedule_tail
+		lw	t0, TASK_PTRACE($28)	# syscall tracing enabled?
+		andi	t0, PT_TRACESYS
+		bnez	t0, tracesys_exit
 		j	ret_from_sys_call
 
-EXPORT(handle_softirq)
-		jal	do_softirq
-		b	9f
+tracesys_exit:	jal	syscall_trace
+		b	ret_from_sys_call
+
+EXPORT(ret_from_irq)
+EXPORT(ret_from_exception)
+		lw	t0, PT_STATUS(sp)	# returning to kernel mode?
+		andi	t0, t0, KU_USER
+		bnez	t0, ret_from_sys_call
+		j	restore_all
 
 reschedule:	jal	schedule 
 
 EXPORT(ret_from_sys_call)
-EXPORT(ret_from_irq)
 		.type	ret_from_irq,@function
-		la	t1, irq_stat		# softirq_active
-#ifdef CONFIG_SMP
-		lw	t0, TASK_PROCESSOR($28)
-		sll	t0, t0, 5
-		addu	t1, t0
-#endif
-		lw	t0, 0(t1)		# softirq_active
-		lw	t1, 4(t1)		# softirq_mask.  unused delay slot
-		and	t0, t1
-		bnez	t0, handle_softirq
-
-9:		lw	t0,PT_STATUS(sp)	# returning to kernel mode?
-		lw	t2, TASK_NEED_RESCHED($28)
-		andi	t1, t0, KU_USER
-		beqz	t1, return		# -> yes
-		bnez	t2, reschedule
-		lw	v0, TASK_SIGPENDING($28)
-		 move	a0, zero
-		beqz	v0, return
-		 move	a1, sp
-		jal	do_signal
 
-EXPORT(return)	.set	noat
+		mfc0	t0, CP0_STATUS	# need_resched and signals atomic test
+		ori	t0, t0, 1
+		xori	t0, t0, 1
+		mtc0	t0, CP0_STATUS
+		nop; nop; nop
+
+		lw	v0, TASK_NEED_RESCHED($28)
+		lw	v1, TASK_SIGPENDING($28)
+		bnez	v0, reschedule
+		bnez	v1, signal_return
+restore_all:	.set	noat
 		RESTORE_ALL_AND_RET
 		.set	at
 
+/* Put this behind restore_all for the sake of the branch prediction.  */
+signal_return:
+		.type	signal_return, @function
+
+		mfc0	t0, CP0_STATUS
+		ori	t0, t0, 1
+		mtc0	t0, CP0_STATUS
+
+		move	a0, zero
+		move	a1, sp
+		jal	do_signal
+		b	restore_all
+
 /*
  * Common spurious interrupt handler.
  */
@@ -85,8 +98,8 @@
 		lw      t0,%lo(spurious_count)(t1)
 		.set	noreorder
 		addiu   t0,1
+		sw      t0,%lo(spurious_count)(t1)
 		j	ret_from_irq
-		 sw      t0,%lo(spurious_count)(t1)
 		END(spurious_interrupt)
 
 /*
@@ -106,7 +119,7 @@
 		ctc1	a2,fcr31;                                       \
 		STI
 #define __BUILD_clear_ade(exception)                                    \
-		.set	reorder;						\
+		.set	reorder;					\
 		MFC0	t0,CP0_BADVADDR;                                \
 		.set	noreorder;					\
 		REG_S	t0,PT_BVADDR(sp);                               \
@@ -139,8 +152,8 @@
 		.set	at;                                             \
 		__BUILD_##verbose(exception);                           \
 		jal	do_##handler;                                   \
-		 move	a0,sp;                                          \
-		j	ret_from_sys_call;                              \
+		 move	a0, sp;                                         \
+		j	ret_from_exception;                             \
 		 nop;                                                   \
 		END(handle_##exception)
 
diff -urN linux-2.4.10-pre6/arch/mips/kernel/fpe.c linux/arch/mips/kernel/fpe.c
--- linux-2.4.10-pre6/arch/mips/kernel/fpe.c	Sun Jul  9 22:18:15 2000
+++ linux/arch/mips/kernel/fpe.c	Wed Dec 31 16:00:00 1969
@@ -1,51 +0,0 @@
-/*
- * The real floating point exception handler.  While it doesn't really
- * make sense to have this in a module, it makes debugging of this code
- * in the kernel space a lot easier.  So far this handler in the released
- * kernel source is just a dummy.
- *
- * Copyright (C) 1997, 2000 Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-
-#include <asm/branch.h>
-#include <asm/ptrace.h>
-
-MODULE_AUTHOR("Ralf Baechle <ralf@gnu.org>");
-MODULE_DESCRIPTION("Experimental floating point exception handler");
-MODULE_SUPPORTED_DEVICE("MIPS FPU");
-
-static void do_fpe(struct pt_regs *regs, unsigned int fcr31)
-{
-#ifdef CONF_DEBUG_EXCEPTIONS
-	show_regs(regs);
-#endif
-	printk("Caught floating exception at epc == %08lx, fcr31 == %08x\n",
-	       regs->cp0_epc, fcr31);
-	if (compute_return_epc(regs))
-		goto out;
-	force_sig(SIGFPE, current);
-out:
-}
-
-/*
- * For easier experimentation we never increment/decrement
- * the module usable counter.
- */
-int register_fpe(void (*handler)(struct pt_regs *regs, unsigned int fcr31));
-int unregister_fpe(void (*handler)(struct pt_regs *regs, unsigned int fcr31));
-
-int init_module(void)
-{
-	return register_fpe(do_fpe);
-}
-
-void cleanup_module(void)
-{
-	unregister_fpe(do_fpe);
-}
diff -urN linux-2.4.10-pre6/arch/mips/kernel/gdb-low.S linux/arch/mips/kernel/gdb-low.S
--- linux-2.4.10-pre6/arch/mips/kernel/gdb-low.S	Sat May 13 08:29:14 2000
+++ linux/arch/mips/kernel/gdb-low.S	Mon Dec  3 23:08:45 2001
@@ -1,16 +1,13 @@
 /*
- * arch/mips/kernel/gdb-low.S
- *
  * gdb-low.S contains the low-level trap handler for the GDB stub.
  *
  * Copyright (C) 1995 Andreas Busse
- *
- * $Id: gdb-low.S,v 1.4 1997/12/01 17:57:26 ralf Exp $
  */
-
+#include <linux/config.h>
 #include <linux/sys.h>
 
 #include <asm/asm.h>
+#include <asm/errno.h>
 #include <asm/mipsregs.h>
 #include <asm/regdef.h>
 #include <asm/stackframe.h>
@@ -30,10 +27,15 @@
 		move	k1,sp
 
 		/*
-		 * Called from user mode, new stack
+		 * Called from user mode, go somewhere else.
 		 */
-		lui	k1,%hi(kernelsp)
-		lw	k1,%lo(kernelsp)(k1)
+		lui	k1,%hi(saved_vectors)
+		mfc0	k0,CP0_CAUSE
+		andi	k0,k0,0x7c
+		add	k1,k1,k0
+		lw	k0,%lo(saved_vectors)(k1)
+		jr	k0
+		nop
 1:
 		move	k0,sp
 		subu	sp,k1,GDB_FR_SIZE
@@ -302,11 +304,51 @@
 		lw	v1,GDB_FR_REG3(sp)
 		lw	v0,GDB_FR_REG2(sp)
 		lw	$1,GDB_FR_REG1(sp)
-		lw	sp,GDB_FR_REG29(sp)		/* Deallocate stack */
+#ifdef CONFIG_CPU_R3000
+		lw	k0, GDB_FR_EPC(sp)
+		lw	sp, GDB_FR_REG29(sp)		/* Deallocate stack */
+		jr	k0
+		rfe
+#else
+		lw	sp, GDB_FR_REG29(sp)		/* Deallocate stack */
 
 		.set	mips3
 		eret
 		.set	mips0
+#endif
 		.set	at
 		.set	reorder
 		END(trap_low)
+
+LEAF(kgdb_read_byte)
+		.set push
+		.set noreorder
+		.set nomacro
+4:		lb	t0, (a0)
+		.set pop
+		sb	t0, (a1)
+		li	v0, 0
+		jr	ra
+		.section __ex_table,"a"
+		PTR	4b, kgdbfault
+		.previous
+		END(kgdb_read_byte)
+
+LEAF(kgdb_write_byte)
+		.set push
+		.set noreorder
+		.set nomacro
+5:		sb	a0, (a1)
+		.set pop
+		li	v0, 0
+		jr	ra
+		.section __ex_table,"a"
+		PTR	5b, kgdbfault
+		.previous
+		END(kgdb_write_byte)
+
+		.type	kgdbfault@function
+		.ent	kgdbfault
+kgdbfault:	li	v0, -EFAULT
+		jr	ra
+		.end	kgdbfault
diff -urN linux-2.4.10-pre6/arch/mips/kernel/gdb-stub.c linux/arch/mips/kernel/gdb-stub.c
--- linux-2.4.10-pre6/arch/mips/kernel/gdb-stub.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/gdb-stub.c	Mon Dec  3 23:08:45 2001
@@ -142,7 +142,6 @@
 
 extern int putDebugChar(char c);    /* write a single character      */
 extern char getDebugChar(void);     /* read and return a single char */
-extern void fltr_set_mem_err(void);
 extern void trap_low(void);
 
 /*
@@ -175,6 +174,10 @@
 static int initialized;	/* !0 means we've been initialized */
 static const char hexchars[]="0123456789abcdef";
 
+/* Used to prevent crashes in memory access.  Note that they'll crash anyway if
+   we haven't set up fault handlers yet... */
+int kgdb_read_byte(unsigned *address, unsigned *dest);
+int kgdb_write_byte(unsigned val, unsigned *dest);
 
 /*
  * Convert ch from a hex digit to an int
@@ -294,42 +297,18 @@
 
 
 /*
- * Indicate to caller of mem2hex or hex2mem that there
- * has been an error.
- */
-static volatile int mem_err = 0;
-
-
-#if 0
-static void set_mem_fault_trap(int enable)
-{
-  mem_err = 0;
-
-#if 0
-  if (enable)
-    exceptionHandler(9, fltr_set_mem_err);
-  else
-    exceptionHandler(9, trap_low);
-#endif  
-}
-#endif /* dead code */
-
-/*
  * Convert the memory pointed to by mem into hex, placing result in buf.
  * Return a pointer to the last char put in buf (null), in case of mem fault,
  * return 0.
- * If MAY_FAULT is non-zero, then we will handle memory faults by returning
- * a 0, else treat a fault like any other fault in the stub.
+ * may_fault is non-zero if we are reading from arbitrary memory, but is currently
+ * not used.
  */
 static unsigned char *mem2hex(char *mem, char *buf, int count, int may_fault)
 {
 	unsigned char ch;
 
-/*	set_mem_fault_trap(may_fault); */
-
 	while (count-- > 0) {
-		ch = *(mem++);
-		if (mem_err)
+		if (kgdb_read_byte(mem++, &ch) != 0)
 			return 0;
 		*buf++ = hexchars[ch >> 4];
 		*buf++ = hexchars[ch & 0xf];
@@ -337,33 +316,28 @@
 
 	*buf = 0;
 
-/*	set_mem_fault_trap(0); */
-
 	return buf;
 }
 
 /*
  * convert the hex array pointed to by buf into binary to be placed in mem
  * return a pointer to the character AFTER the last byte written
+ * may_fault is non-zero if we are reading from arbitrary memory, but is currently
+ * not used.
  */
 static char *hex2mem(char *buf, char *mem, int count, int may_fault)
 {
 	int i;
 	unsigned char ch;
 
-/*	set_mem_fault_trap(may_fault); */
-
 	for (i=0; i<count; i++)
 	{
 		ch = hex(*buf++) << 4;
 		ch |= hex(*buf++);
-		*(mem++) = ch;
-		if (mem_err)
+		if (kgdb_write_byte(ch, mem++) != 0)
 			return 0;
 	}
 
-/*	set_mem_fault_trap(0); */
-
 	return mem;
 }
 
@@ -390,6 +364,8 @@
 	{ 0, 0}				/* Must be last */
 };
 
+/* Save the normal trap handlers for user-mode traps. */
+void *saved_vectors[32];
 
 /*
  * Set up exception handlers for tracing and breakpoints
@@ -402,7 +378,7 @@
 
 	save_and_cli(flags);
 	for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
-		set_except_vector(ht->tt, trap_low);
+		saved_vectors[ht->tt] = set_except_vector(ht->tt, trap_low);
   
 	putDebugChar('+'); /* 'hello world' */
 	/*
@@ -417,18 +393,6 @@
 
 	initialized = 1;
 	restore_flags(flags);
-}
-
-
-/*
- * Trap handler for memory errors.  This just sets mem_err to be non-zero.  It
- * assumes that %l1 is non-zero.  This should be safe, as it is doubtful that
- * 0 would ever contain code that could mem fault.  This routine will skip
- * past the faulting instruction after setting mem_err.
- */
-extern void fltr_set_mem_err(void)
-{
-	/* FIXME: Needs to be written... */
 }
 
 /*
diff -urN linux-2.4.10-pre6/arch/mips/kernel/head.S linux/arch/mips/kernel/head.S
--- linux-2.4.10-pre6/arch/mips/kernel/head.S	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/head.S	Mon Dec  3 23:08:45 2001
@@ -76,7 +76,11 @@
 	addu	k1, k1, k0			# add in pgd offset
 	mfc0	k0, CP0_CONTEXT			# get context reg
 	lw	k1, (k1)
+#if defined(CONFIG_CPU_VR41XX)
+	srl	k0, k0, 3			# get pte offset
+#else
 	srl	k0, k0, 1			# get pte offset
+#endif
 	and	k0, k0, 0xff8
 	addu	k1, k1, k0			# add in offset
 	lw	k0, 0(k1)			# get even pte
@@ -275,7 +279,7 @@
 	END(except_vec0_r4k_MP250MHZhwbug)
 #endif
 
-	/* TLB refill, EXL == 0, R[23]00 version */
+	/* TLB refill, R[23]00 version */
 	LEAF(except_vec0_r2300)
 	.set	noat
 	.set	mips1
diff -urN linux-2.4.10-pre6/arch/mips/kernel/i8259.c linux/arch/mips/kernel/i8259.c
--- linux-2.4.10-pre6/arch/mips/kernel/i8259.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/i8259.c	Mon Dec  3 23:08:45 2001
@@ -295,7 +295,6 @@
 
 	request_resource(&ioport_resource, &pic1_io_resource);
 	request_resource(&ioport_resource, &pic2_io_resource);
-	setup_irq(2, &irq2);
 
 	init_8259A(0);
 
@@ -305,4 +304,6 @@
 		irq_desc[i].depth = 1;
 		irq_desc[i].handler = &i8259A_irq_type;
 	}
+
+	setup_irq(2, &irq2);
 }
diff -urN linux-2.4.10-pre6/arch/mips/kernel/irq.c linux/arch/mips/kernel/irq.c
--- linux-2.4.10-pre6/arch/mips/kernel/irq.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/irq.c	Mon Dec  3 23:08:45 2001
@@ -303,7 +303,7 @@
 	desc->handler->end(irq);
 	spin_unlock(&desc->lock);
 
-	if (softirq_active(cpu) & softirq_mask(cpu))
+	if (softirq_pending(cpu))
 		do_softirq();
 	return 1;
 }
diff -urN linux-2.4.10-pre6/arch/mips/kernel/mips_ksyms.c linux/arch/mips/kernel/mips_ksyms.c
--- linux-2.4.10-pre6/arch/mips/kernel/mips_ksyms.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/mips_ksyms.c	Mon Dec  3 23:08:45 2001
@@ -17,6 +17,7 @@
 #include <linux/pci.h>
 #include <linux/ide.h>
 
+#include <asm/bootinfo.h>
 #include <asm/checksum.h>
 #include <asm/dma.h>
 #include <asm/io.h>
@@ -40,6 +41,7 @@
 extern long __strnlen_user_nocheck_asm(const char *s);
 extern long __strnlen_user_asm(const char *s);
 
+EXPORT_SYMBOL(mips_machtype);
 EXPORT_SYMBOL(EISA_bus);
 
 /*
@@ -125,12 +127,6 @@
 
 int register_fpe(void (*handler)(struct pt_regs *regs, unsigned int fcr31));
 int unregister_fpe(void (*handler)(struct pt_regs *regs, unsigned int fcr31));
-
-#ifdef CONFIG_MIPS_FPE_MODULE
-EXPORT_SYMBOL(__compute_return_epc);
-EXPORT_SYMBOL(register_fpe);
-EXPORT_SYMBOL(unregister_fpe);
-#endif
 
 #ifdef CONFIG_VT
 EXPORT_SYMBOL(screen_info);
diff -urN linux-2.4.10-pre6/arch/mips/kernel/old-irq.c linux/arch/mips/kernel/old-irq.c
--- linux-2.4.10-pre6/arch/mips/kernel/old-irq.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/old-irq.c	Mon Dec  3 23:08:45 2001
@@ -232,7 +232,7 @@
 	}
 	irq_exit(cpu, irq);
 
-	if (softirq_active(cpu)&softirq_mask(cpu))
+	if (softirq_pending(cpu))
 		do_softirq();
 
 	/* unmasking and bottom half handling is done magically for us. */
diff -urN linux-2.4.10-pre6/arch/mips/kernel/old-time.c linux/arch/mips/kernel/old-time.c
--- linux-2.4.10-pre6/arch/mips/kernel/old-time.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/old-time.c	Mon Dec  3 23:08:45 2001
@@ -1,18 +1,11 @@
 /*
  * Copyright (C) 1991, 1992, 1995  Linus Torvalds
  * Copyright (C) 1996 - 2000  Ralf Baechle
+ * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
  *
- * This file contains the time handling details for PC-style clocks as
- * found in some MIPS systems.
+ * Don't use.  Deprecated.  Dead meat.
  */
-/**************************************************************************
- *  9 Nov, 2000.
- *  Changed init_cycle_counter() routine, use the mips_cpu structure.
- *
- *  Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips
- *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
- *************************************************************************/
-
 #include <linux/config.h>
 #include <linux/errno.h>
 #include <linux/init.h>
@@ -450,7 +443,12 @@
 void indy_r4k_timer_interrupt (struct pt_regs *regs)
 {
 	static const int INDY_R4K_TIMER_IRQ = 7;
+	int cpu = smp_processor_id();
+
 	r4k_timer_interrupt (INDY_R4K_TIMER_IRQ, NULL, regs);
+
+	if (softirq_pending(cpu))
+		do_softirq();
 }
 
 struct irqaction irq0  = { timer_interrupt, SA_INTERRUPT, 0,
diff -urN linux-2.4.10-pre6/arch/mips/kernel/pci-dma.c linux/arch/mips/kernel/pci-dma.c
--- linux-2.4.10-pre6/arch/mips/kernel/pci-dma.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/pci-dma.c	Mon Dec  3 23:08:45 2001
@@ -4,9 +4,10 @@
  * for more details.
  *
  * Copyright (C) 2000  Ani Joshi <ajoshi@unixbox.com>
- * Copyright (C) 2000  Ralf Baechle <ralf@gnu.org>
+ * Copyright (C) 2000, 2001  Ralf Baechle <ralf@gnu.org>
  * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
  */
+#include <linux/config.h>
 #include <linux/types.h>
 #include <linux/mm.h>
 #include <linux/string.h>
@@ -26,9 +27,11 @@
 
 	if (ret != NULL) {
 		memset(ret, 0, size);
+#ifndef CONFIG_COHERENT_IO
 		dma_cache_wback_inv((unsigned long) ret, size);
-		*dma_handle = virt_to_bus(ret);
 		ret = KSEG1ADDR(ret);
+#endif
+		*dma_handle = virt_to_bus(ret);
 	}
 
 	return ret;
@@ -37,5 +40,10 @@
 void pci_free_consistent(struct pci_dev *hwdev, size_t size,
 			 void *vaddr, dma_addr_t dma_handle)
 {
-	free_pages((unsigned long) KSEG0ADDR(vaddr), get_order(size));
+	unsigned long addr = (unsigned long) vaddr;
+
+#ifndef CONFIG_COHERENT_IO
+	addr = KSEG0ADDR(addr);
+#endif
+	free_pages(addr, get_order(size));
 }
diff -urN linux-2.4.10-pre6/arch/mips/kernel/pci.c linux/arch/mips/kernel/pci.c
--- linux-2.4.10-pre6/arch/mips/kernel/pci.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/kernel/pci.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,174 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * Modified to be mips generic, ppopov@mvista.com
+ * arch/mips/kernl/pci.c
+ *     Common MIPS PCI routines.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/*
+ * This file contains common PCI routines meant to be shared for
+ * all MIPS machines.
+ *
+ * Strategies:
+ *
+ * . We rely on pci_auto.c file to assign PCI resources (MEM and IO)
+ *   TODO: this shold be optional for some machines where they do have
+ *   a real "pcibios" that does resource assignment.
+ *
+ * . We then use pci_scan_bus() to "discover" all the resources for
+ *   later use by Linux.
+ *
+ * . We finally reply on a board supplied function, pcibios_fixup_irq(), to
+ *   to assign the interrupts.  We may use setup-irq.c under drivers/pci
+ *   later.
+ *
+ * . Specifically, we will *NOT* use pci_assign_unassigned_resources(),
+ *   because we assume all PCI devices should have the resources correctly
+ *   assigned and recorded.
+ *
+ * Limitations:
+ *
+ * . We "collapse" all IO and MEM spaces in sub-buses under a top-level bus
+ *   into a contiguous range.
+ *
+ * . In the case of Memory space, the rnage is 1:1 mapping with CPU physical
+ *   address space.
+ *
+ * . In the case of IO space, it starts from 0, and the beginning address
+ *   is mapped to KSEG0ADDR(mips_io_port) in the CPU physical address.
+ *
+ * . These are the current MIPS limitations (by ioremap, etc).  In the
+ *   future, we may remove them.
+ *
+ * Credits:
+ *	Most of the code are derived from the pci routines from PPC and Alpha,
+ *	which were mostly writtne by
+ *		Cort Dougan, cort@fsmlabs.com
+ *		Matt Porter, mporter@mvista.com
+ *		Dave Rusling david.rusling@reo.mts.dec.com
+ *		David Mosberger davidm@cs.arizona.edu
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+
+#include <asm/pci_channel.h>
+
+extern void pcibios_fixup(void);
+extern void pcibios_fixup_irqs(void);
+
+struct pci_fixup pcibios_fixups[] = {
+	{ PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources },
+	{ 0 }
+};
+
+extern int pciauto_assign_resources(int busno, struct pci_channel * hose);
+
+void __init pcibios_init(void)
+{
+	struct pci_channel *p;
+	struct pci_bus *bus;
+	int busno;
+
+#ifdef CONFIG_PCI_AUTO
+	/* assign resources */
+	busno=0;
+	for (p= mips_pci_channels; p->pci_ops != NULL; p++) {
+		busno = pciauto_assign_resources(busno, p) + 1;
+	}
+#endif
+
+	/* scan the buses */
+	busno = 0;
+	for (p= mips_pci_channels; p->pci_ops != NULL; p++) {
+		bus = pci_scan_bus(busno, p->pci_ops, p);
+		busno = bus->subordinate+1;
+	}
+
+	/* machine dependent fixups */
+	pcibios_fixup();
+	/* fixup irqs (board specific routines) */
+	pcibios_fixup_irqs();
+}
+
+int pcibios_enable_device(struct pci_dev *dev)
+{
+	/* pciauto_assign_resources() will enable all devices found */
+	return 0;
+}
+
+unsigned long __init pci_bridge_check_io(struct pci_dev *bridge)
+{
+	u16 io;
+
+	pci_read_config_word(bridge, PCI_IO_BASE, &io);
+	if (!io) {
+		pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0);
+		pci_read_config_word(bridge, PCI_IO_BASE, &io);
+		pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
+	}
+	if (io)
+		return IORESOURCE_IO;
+	printk(KERN_WARNING "PCI: bridge %s does not support I/O forwarding!\n",
+				bridge->name);
+	return 0;
+}
+
+void __init pcibios_fixup_bus(struct pci_bus *bus)
+{
+	/* Propogate hose info into the subordinate devices.  */
+
+	struct pci_channel *hose = bus->sysdata;
+	struct pci_dev *dev = bus->self;
+
+	if (!dev) {
+		/* Root bus */
+		bus->resource[0] = hose->io_resource;
+		bus->resource[1] = hose->mem_resource;
+	} else {
+		/* This is a bridge. Do not care how it's initialized,
+		   just link its resources to the bus ones */
+		int i;
+
+		for(i=0; i<3; i++) {
+			bus->resource[i] =
+				&dev->resource[PCI_BRIDGE_RESOURCES+i];
+			bus->resource[i]->name = bus->name;
+		}
+		bus->resource[0]->flags |= pci_bridge_check_io(dev);
+		bus->resource[1]->flags |= IORESOURCE_MEM;
+		/* For now, propogate hose limits to the bus;
+		   we'll adjust them later. */
+		bus->resource[0]->end = hose->io_resource->end;
+		bus->resource[1]->end = hose->mem_resource->end;
+		/* Turn off downstream PF memory address range by default */
+		bus->resource[2]->start = 1024*1024;
+		bus->resource[2]->end = bus->resource[2]->start - 1;
+	}
+}
+
+char *pcibios_setup(char *str)
+{
+	return str;
+}
+
+void
+pcibios_align_resource(void *data, struct resource *res, unsigned long size)
+{
+	/* this should not be called */
+}
+
+void
+pcibios_update_resource(struct pci_dev *dev, struct resource *root,
+			struct resource *res, int resource)
+{
+	/* this should not be called */
+}
diff -urN linux-2.4.10-pre6/arch/mips/kernel/pci_auto.c linux/arch/mips/kernel/pci_auto.c
--- linux-2.4.10-pre6/arch/mips/kernel/pci_auto.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/kernel/pci_auto.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,323 @@
+/*
+ * PCI autoconfiguration library
+ *
+ * Author: Matt Porter <mporter@mvista.com>
+ *
+ * Copyright 2000, 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/*
+ * Modified for MIPS by Jun Sun, jsun@mvista.com
+ *
+ * . Simplify the interface between pci_auto and the rest: a single function.
+ * . Assign resources from low address to upper address.
+ * . change most int to u32.
+ *
+ * Further modified to include it as mips generic code, ppopov@mvista.com.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+
+#include <asm/pci_channel.h>
+
+#define	DEBUG
+#ifdef 	DEBUG
+#define	DBG(x...)	printk(x)
+#else
+#define	DBG(x...)	
+#endif
+
+/* These are used for config access before all the PCI probing has been done. */
+int early_read_config_byte(struct pci_channel *hose, int bus, int dev_fn, int where, u8 *val);
+int early_read_config_word(struct pci_channel *hose, int bus, int dev_fn, int where, u16 *val);
+int early_read_config_dword(struct pci_channel *hose, int bus, int dev_fn, int where, u32 *val);
+int early_write_config_byte(struct pci_channel *hose, int bus, int dev_fn, int where, u8 val);
+int early_write_config_word(struct pci_channel *hose, int bus, int dev_fn, int where, u16 val);
+int early_write_config_dword(struct pci_channel *hose, int bus, int dev_fn, int where, u32 val);
+
+static u32 pciauto_lower_iospc;
+static u32 pciauto_upper_iospc;
+
+static u32 pciauto_lower_memspc;
+static u32 pciauto_upper_memspc;
+
+void __init 
+pciauto_setup_bars(struct pci_channel *hose,
+		   int current_bus,
+		   int pci_devfn)
+{
+	u32 bar_response, bar_size, bar_value;
+	u32 bar, addr_mask, bar_nr = 0;
+	u32 * upper_limit;
+	u32 * lower_limit;
+	int found_mem64 = 0;
+
+	DBG("PCI Autoconfig: Found Bus %d, Device %d, Function %d\n",
+	    current_bus, PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn) );
+
+	for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar+=4) {
+		/* Tickle the BAR and get the response */
+		early_write_config_dword(hose,
+					 current_bus,
+					 pci_devfn,
+					 bar,
+					 0xffffffff);
+		early_read_config_dword(hose,
+					current_bus,
+					pci_devfn,
+					bar,
+					&bar_response);
+
+		/* If BAR is not implemented go to the next BAR */
+		if (!bar_response)
+			continue;
+
+		/* Check the BAR type and set our address mask */
+		if (bar_response & PCI_BASE_ADDRESS_SPACE) {
+			addr_mask = PCI_BASE_ADDRESS_IO_MASK;
+			upper_limit = &pciauto_upper_iospc;
+			lower_limit = &pciauto_lower_iospc;
+			DBG("PCI Autoconfig: BAR %d, I/O, ", bar_nr);
+		} else {
+			if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
+			    PCI_BASE_ADDRESS_MEM_TYPE_64)
+				found_mem64 = 1;
+
+			addr_mask = PCI_BASE_ADDRESS_MEM_MASK;		
+			upper_limit = &pciauto_upper_memspc;
+			lower_limit = &pciauto_lower_memspc;
+			DBG("PCI Autoconfig: BAR %d, Mem, ", bar_nr);
+		}
+
+		/* Calculate requested size */
+		bar_size = ~(bar_response & addr_mask) + 1;
+
+		/* Allocate a base address */
+		bar_value = ((*lower_limit - 1) & ~(bar_size - 1)) + bar_size;
+
+		/* Write it out and update our limit */
+		early_write_config_dword(hose, current_bus, pci_devfn,
+					 bar, bar_value);
+
+		*lower_limit = bar_value + bar_size;
+
+		/*
+		 * If we are a 64-bit decoder then increment to the
+		 * upper 32 bits of the bar and force it to locate
+		 * in the lower 4GB of memory.
+		 */ 
+		if (found_mem64) {
+			bar += 4;
+			early_write_config_dword(hose,
+						 current_bus,
+						 pci_devfn,
+						 bar,
+						 0x00000000);
+		}
+
+		bar_nr++;
+
+		DBG("size=0x%x, address=0x%x\n",
+		    bar_size, bar_value);
+	}
+
+}
+
+void __init
+pciauto_prescan_setup_bridge(struct pci_channel *hose,
+			     int current_bus,
+			     int pci_devfn,
+			     int sub_bus)
+{
+	int cmdstat;
+
+	/* Configure bus number registers */
+	early_write_config_byte(hose, current_bus, pci_devfn,
+	                        PCI_PRIMARY_BUS, current_bus);
+	early_write_config_byte(hose, current_bus, pci_devfn,
+				PCI_SECONDARY_BUS, sub_bus + 1);
+	early_write_config_byte(hose, current_bus, pci_devfn,
+				PCI_SUBORDINATE_BUS, 0xff);
+
+	/* Round memory allocator to 1MB boundary */
+	pciauto_upper_memspc &= ~(0x100000 - 1);
+
+	/* Round I/O allocator to 4KB boundary */
+	pciauto_upper_iospc &= ~(0x1000 - 1);
+
+	/* Set up memory and I/O filter limits, assume 32-bit I/O space */
+	early_write_config_word(hose, current_bus, pci_devfn, PCI_MEMORY_LIMIT,
+				((pciauto_upper_memspc - 1) & 0xfff00000) >> 16);
+	early_write_config_byte(hose, current_bus, pci_devfn, PCI_IO_LIMIT,
+				((pciauto_upper_iospc - 1) & 0x0000f000) >> 8);
+	early_write_config_word(hose, current_bus, pci_devfn,
+				PCI_IO_LIMIT_UPPER16,
+				((pciauto_upper_iospc - 1) & 0xffff0000) >> 16);
+			
+	/* We don't support prefetchable memory for now, so disable */
+	early_write_config_word(hose, current_bus, pci_devfn,
+				PCI_PREF_MEMORY_BASE, 0x1000);
+	early_write_config_word(hose, current_bus, pci_devfn,
+				PCI_PREF_MEMORY_LIMIT, 0x1000);
+
+	/* Enable memory and I/O accesses, enable bus master */
+	early_read_config_dword(hose, current_bus, pci_devfn, PCI_COMMAND,
+				&cmdstat);
+	early_write_config_dword(hose, current_bus, pci_devfn, PCI_COMMAND,
+				 cmdstat | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
+				 PCI_COMMAND_MASTER);
+}
+
+void __init
+pciauto_postscan_setup_bridge(struct pci_channel *hose,
+			      int current_bus,
+			      int pci_devfn,
+			      int sub_bus)
+{
+	/* Configure bus number registers */
+	early_write_config_byte(hose, current_bus, pci_devfn,
+				PCI_SUBORDINATE_BUS, sub_bus);
+
+	/* Round memory allocator to 1MB boundary */
+	pciauto_upper_memspc &= ~(0x100000 - 1);
+	early_write_config_word(hose, current_bus, pci_devfn, PCI_MEMORY_BASE,
+				pciauto_upper_memspc >> 16);
+
+	/* Round I/O allocator to 4KB boundary */
+	pciauto_upper_iospc &= ~(0x1000 - 1);
+	early_write_config_byte(hose, current_bus, pci_devfn, PCI_IO_BASE,
+				(pciauto_upper_iospc & 0x0000f000) >> 8);
+	early_write_config_word(hose, current_bus, pci_devfn,
+				PCI_IO_BASE_UPPER16, pciauto_upper_iospc >> 16);
+}
+
+#define      PCIAUTO_IDE_MODE_MASK           0x05
+
+int __init
+pciauto_bus_scan(struct pci_channel *hose, int current_bus)
+{
+	int sub_bus;
+	u32 pci_devfn, pci_class, cmdstat, found_multi=0;
+	unsigned short vid;
+	unsigned char header_type;
+	int devfn_start = 0;
+	int devfn_stop = 0xff;
+
+	sub_bus = current_bus;
+	
+	if (hose->first_devfn)
+		devfn_start = hose->first_devfn;
+	if (hose->last_devfn)
+		devfn_stop = hose->last_devfn;
+	
+	for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) {
+
+		if (PCI_FUNC(pci_devfn) && !found_multi)
+			continue;
+
+		early_read_config_byte(hose, current_bus, pci_devfn,
+				       PCI_HEADER_TYPE, &header_type);
+
+		if (!PCI_FUNC(pci_devfn))
+			found_multi = header_type & 0x80;
+
+		early_read_config_word(hose, current_bus, pci_devfn,
+				       PCI_VENDOR_ID, &vid);
+
+		if (vid == 0xffff) continue;
+
+		early_read_config_dword(hose, current_bus, pci_devfn,
+					PCI_CLASS_REVISION, &pci_class);
+		if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) {
+			DBG("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_SLOT(pci_devfn));
+			pciauto_prescan_setup_bridge(hose, current_bus,
+						     pci_devfn, sub_bus);
+			sub_bus = pciauto_bus_scan(hose, sub_bus+1);
+			pciauto_postscan_setup_bridge(hose, current_bus,
+						      pci_devfn, sub_bus);
+
+		} else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) {
+
+			unsigned char prg_iface;
+
+			early_read_config_byte(hose, current_bus, pci_devfn,
+					       PCI_CLASS_PROG, &prg_iface);
+			if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
+				DBG("PCI Autoconfig: Skipping legacy mode IDE controller\n");
+				continue;
+			}
+		}
+
+		/*
+		 * Found a peripheral, enable some standard
+		 * settings
+		 */
+		early_read_config_dword(hose, current_bus, pci_devfn,
+					PCI_COMMAND, &cmdstat);
+		early_write_config_dword(hose, current_bus, pci_devfn,
+					 PCI_COMMAND, cmdstat | PCI_COMMAND_IO |
+					 PCI_COMMAND_MEMORY |
+					 PCI_COMMAND_MASTER);
+		early_write_config_byte(hose, current_bus, pci_devfn,
+					PCI_LATENCY_TIMER, 0x80);
+
+		/* Allocate PCI I/O and/or memory space */
+		pciauto_setup_bars(hose, current_bus, pci_devfn);
+	}
+	return sub_bus;
+}
+
+int __init
+pciauto_assign_resources(int busno, struct pci_channel *hose)
+{
+	/* setup resource limits */
+	pciauto_lower_iospc = hose->io_resource->start;
+	pciauto_upper_iospc = hose->io_resource->end + 1;
+	pciauto_lower_memspc = hose->mem_resource->start;
+	pciauto_upper_memspc = hose->mem_resource->end + 1;
+
+	return pciauto_bus_scan(hose, busno);
+}
+
+
+/*
+ * These functions are used early on before PCI scanning is done
+ * and all of the pci_dev and pci_bus structures have been created.
+ */
+static struct pci_dev *fake_pci_dev(struct pci_channel *hose, int busnr,
+                                    int devfn)
+{
+	static struct pci_dev dev;
+	static struct pci_bus bus;
+
+	dev.bus = &bus;
+	dev.sysdata = hose;
+	dev.devfn = devfn;
+	bus.number = busnr;
+	bus.ops = hose->pci_ops;
+
+	return &dev;
+}
+
+#define EARLY_PCI_OP(rw, size, type)					\
+int early_##rw##_config_##size(struct pci_channel *hose, int bus,	\
+                               int devfn, int offset, type value)	\
+{									\
+	return pci_##rw##_config_##size(fake_pci_dev(hose, bus, devfn),	\
+	                                offset, value);			\
+}
+
+EARLY_PCI_OP(read, byte, u8 *)
+EARLY_PCI_OP(read, word, u16 *)
+EARLY_PCI_OP(read, dword, u32 *)
+EARLY_PCI_OP(write, byte, u8)
+EARLY_PCI_OP(write, word, u16)
+EARLY_PCI_OP(write, dword, u32)
diff -urN linux-2.4.10-pre6/arch/mips/kernel/proc.c linux/arch/mips/kernel/proc.c
--- linux-2.4.10-pre6/arch/mips/kernel/proc.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/proc.c	Mon Dec  3 23:08:45 2001
@@ -1,8 +1,10 @@
 /*
  *  linux/arch/mips/kernel/proc.c
  *
- *  Copyright (C) 1995, 1996  Ralf Baechle
+ *  Copyright (C) 1995, 1996, 2001  Ralf Baechle
+ *  Copyright (C) 2001  MIPS Technologies, Inc.
  */
+#include <linux/config.h>
 #include <linux/delay.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
@@ -12,9 +14,9 @@
 #include <asm/processor.h>
 #include <asm/watch.h>
 
-unsigned long unaligned_instructions;
+extern unsigned long unaligned_instructions;
 unsigned int vced_count, vcei_count;
-#if !defined(CONFIG_CPU_HAS_LLSC)
+#ifndef CONFIG_CPU_HAS_LLSC
 unsigned long ll_ops, sc_ops;
 #endif
 
@@ -83,7 +85,7 @@
 	len += sprintf(buffer + len, "microsecond timers\t: %s\n",
 	               (mips_cpu.options & MIPS_CPU_COUNTER) ? "yes" : "no");
 	len += sprintf(buffer + len, "extra interrupt vector\t: %s\n",
-	               dedicated_iv_available ? "yes" : "no");
+	               (mips_cpu.options & MIPS_CPU_DIVEC) ? "yes" : "no");
 	len += sprintf(buffer + len, "hardware watchpoint\t: %s\n",
 	               watch_available ? "yes" : "no");
 
@@ -92,7 +94,7 @@
 	len += sprintf(buffer + len, fmt, 'D', vced_count);
 	len += sprintf(buffer + len, fmt, 'I', vcei_count);
 
-#if !defined(CONFIG_CPU_HAS_LLSC)
+#ifndef CONFIG_CPU_HAS_LLSC
 	len += sprintf(buffer + len, "ll emulations\t\t: %lu\n",
 		       ll_ops);
 	len += sprintf(buffer + len, "sc emulations\t\t: %lu\n",
diff -urN linux-2.4.10-pre6/arch/mips/kernel/process.c linux/arch/mips/kernel/process.c
--- linux-2.4.10-pre6/arch/mips/kernel/process.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/process.c	Mon Dec  3 23:08:45 2001
@@ -83,13 +83,10 @@
 	childksp = (unsigned long)p + KERNEL_STACK_SIZE - 32;
 
 	if (last_task_used_math == current)
-#ifdef CONFIG_MIPS_FPU_EMULATOR
-		if (mips_cpu.options & MIPS_CPU_FPU)
-#endif
-	{
+		if (mips_cpu.options & MIPS_CPU_FPU) {
 			set_cp0_status(ST0_CU1);
 			save_fp(p);
-	}
+		}
 	/* set up new TSS. */
 	childregs = (struct pt_regs *) childksp - 1;
 	*childregs = *regs;
@@ -120,8 +117,8 @@
 	 * switching for most programs since they don't use the fpu.
 	 */
 	p->thread.cp0_status = read_32bit_cp0_register(CP0_STATUS) &
-                            ~(ST0_CU3|ST0_CU2|ST0_CU1|KU_MASK);
-	childregs->cp0_status &= ~(ST0_CU3|ST0_CU2|ST0_CU1);
+                            ~(ST0_CU2|ST0_CU1|KU_MASK);
+	childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
 
 	return 0;
 }
diff -urN linux-2.4.10-pre6/arch/mips/kernel/ptrace.c linux/arch/mips/kernel/ptrace.c
--- linux-2.4.10-pre6/arch/mips/kernel/ptrace.c	Fri Jul 20 12:39:55 2001
+++ linux/arch/mips/kernel/ptrace.c	Mon Dec  3 23:08:45 2001
@@ -33,7 +33,7 @@
 {
 	struct task_struct *child;
 	int res;
-	extern void save_fp(void*);
+	extern void save_fp(struct task_struct *);
 
 	lock_kernel();
 #if 0
@@ -111,19 +111,31 @@
 			        unsigned long long *fregs
 					= (unsigned long long *)
 					    &child->thread.fpu.hard.fp_regs[0];
-#ifdef CONFIG_MIPS_FPU_EMULATOR
-			    if(!(mips_cpu.options & MIPS_CPU_FPU)) {
-				    fregs = (unsigned long long *)
-					&child->thread.fpu.soft.regs[0];
-			    } else 
+			 	if(!(mips_cpu.options & MIPS_CPU_FPU)) {
+					fregs = (unsigned long long *)
+						child->thread.fpu.soft.regs;
+				} else 
+					if (last_task_used_math == child) {
+						enable_cp1();
+						save_fp(child);
+						disable_cp1();
+						last_task_used_math = NULL;
+						regs->cp0_status &= ~ST0_CU1;
+					}
+				/*
+				 * The odd registers are actually the high
+				 * order bits of the values stored in the even
+				 * registers - unless we're using r2k_switch.S.
+				 */
+#ifdef CONFIG_CPU_R3000
+				if (mips_cpu.options & MIPS_CPU_FPU)
+					tmp = *(unsigned long *)(fregs + addr);
+				else
 #endif
-				if (last_task_used_math == child) {
-					enable_cp1();
-					save_fp(child);
-					disable_cp1();
-					last_task_used_math = NULL;
-				}
-				tmp = (unsigned long) fregs[(addr - 32)];
+				if (addr & 1)
+					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
+				else
+					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
 			} else {
 				tmp = -1;	/* FP not yet used  */
 			}
@@ -144,12 +156,10 @@
 			tmp = regs->lo;
 			break;
 		case FPC_CSR:
-#ifdef CONFIG_MIPS_FPU_EMULATOR
-			if(!(mips_cpu.options & MIPS_CPU_FPU))
+			if (!(mips_cpu.options & MIPS_CPU_FPU))
 				tmp = child->thread.fpu.soft.sr;
 			else
-#endif
-			tmp = child->thread.fpu.hard.control;
+				tmp = child->thread.fpu.hard.control;
 			break;
 		case FPC_EIR: {	/* implementation / version register */
 			unsigned int flags;
@@ -192,19 +202,17 @@
 			unsigned long long *fregs;
 			fregs = (unsigned long long *)&child->thread.fpu.hard.fp_regs[0];
 			if (child->used_math) {
-				if (last_task_used_math == child)
-#ifdef CONFIG_MIPS_FPU_EMULATOR
-				    if(!(mips_cpu.options & MIPS_CPU_FPU)) {
-					fregs = (unsigned long long *)
-					    &child->thread.fpu.soft.regs[0];
-				    } else
-#endif
-				{
-					enable_cp1();
-					save_fp(child);
-					disable_cp1();
-					last_task_used_math = NULL;
-					regs->cp0_status &= ~ST0_CU1;
+				if (last_task_used_math == child) {
+					if(!(mips_cpu.options & MIPS_CPU_FPU)) {
+						fregs = (unsigned long long *)
+						child->thread.fpu.soft.regs;
+					} else {
+						enable_cp1();
+						save_fp(child);
+						disable_cp1();
+						last_task_used_math = NULL;
+						regs->cp0_status &= ~ST0_CU1;
+					}
 				}
 			} else {
 				/* FP not yet used  */
@@ -212,7 +220,23 @@
 				       sizeof(child->thread.fpu.hard));
 				child->thread.fpu.hard.control = 0;
 			}
-			fregs[addr - FPR_BASE] = data;
+			/*
+			 * The odd registers are actually the high order bits
+			 * of the values stored in the even registers - unless
+			 * we're using r2k_switch.S.
+			 */
+#ifdef CONFIG_CPU_R3000
+			if (mips_cpu.options & MIPS_CPU_FPU)
+				*(unsigned long *)(fregs + addr) = data;
+			else
+#endif
+			if (addr & 1) {
+				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
+				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
+			} else {
+				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
+				fregs[addr - FPR_BASE] |= data;
+			}
 			break;
 		}
 		case PC:
@@ -225,12 +249,10 @@
 			regs->lo = data;
 			break;
 		case FPC_CSR:
-#ifdef CONFIG_MIPS_FPU_EMULATOR
-			if(!(mips_cpu.options & MIPS_CPU_FPU)) 
+			if (!(mips_cpu.options & MIPS_CPU_FPU)) 
 				child->thread.fpu.soft.sr = data;
 			else
-#endif
-			child->thread.fpu.hard.control = data;
+				child->thread.fpu.hard.control = data;
 			break;
 		default:
 			/* The rest are not allowed. */
diff -urN linux-2.4.10-pre6/arch/mips/kernel/r2300_switch.S linux/arch/mips/kernel/r2300_switch.S
--- linux-2.4.10-pre6/arch/mips/kernel/r2300_switch.S	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/r2300_switch.S	Mon Dec  3 23:08:45 2001
@@ -1,5 +1,4 @@
-/* $Id: r2300_switch.S,v 1.8 1999/08/18 23:37:44 ralf Exp $
- *
+/*
  * r2300_switch.S: R2300 specific task switching code.
  *
  * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
diff -urN linux-2.4.10-pre6/arch/mips/kernel/r4k_switch.S linux/arch/mips/kernel/r4k_switch.S
--- linux-2.4.10-pre6/arch/mips/kernel/r4k_switch.S	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/r4k_switch.S	Mon Dec  3 23:08:45 2001
@@ -7,15 +7,10 @@
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  * Copyright (C) 1994, 1995, 1996, by Andreas Busse
  * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2000 MIPS Technologies, Inc.
+ *    written by Carsten Langgaard, carstenl@mips.com
  */
-/**************************************************************************
- *  13 Nov, 2000.
- *  Made support for MIPS32 CPUs and restoring of fp registers.
- *
- *  Carsten Langgaard, carstenl@mips.com
- *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
- *************************************************************************/
-	
+#include <linux/config.h>
 #include <asm/asm.h>
 #include <asm/bootinfo.h>
 #include <asm/cachectl.h>
diff -urN linux-2.4.10-pre6/arch/mips/kernel/reset.c linux/arch/mips/kernel/reset.c
--- linux-2.4.10-pre6/arch/mips/kernel/reset.c	Thu Jun 26 12:33:37 1997
+++ linux/arch/mips/kernel/reset.c	Mon Dec  3 23:08:45 2001
@@ -1,7 +1,10 @@
 /*
- *  linux/arch/mips/sni/process.c
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
  *
- *  Reset the machine.
+ * Copyright (C) 2001 by Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #include <linux/kernel.h>
 #include <linux/types.h>
@@ -13,6 +16,9 @@
  * So handle all using function pointers to machine specific
  * functions.
  */
+void (*_machine_restart)(char *command);
+void (*_machine_halt)(void);
+void (*_machine_power_off)(void);
 
 void machine_restart(char *command)
 {
diff -urN linux-2.4.10-pre6/arch/mips/kernel/scall_o32.S linux/arch/mips/kernel/scall_o32.S
--- linux-2.4.10-pre6/arch/mips/kernel/scall_o32.S	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/scall_o32.S	Mon Dec  3 23:08:45 2001
@@ -65,36 +65,32 @@
 1:	sw	v0, PT_R2(sp)		# result
 
 EXPORT(o32_ret_from_sys_call)
-	la	t1, irq_stat		# softirq_active
-#ifdef CONFIG_SMP
-	lw	t0, TASK_PROCESSOR($28)
-        sll	t0, t0, 5
-	addu	t1, t0
-#endif
-	lw	t0, 0(t1)		# softirq_active
-	lw	t1, 4(t1)		# softirq_mask.  unused delay slot
-	and	t0, t1
-	bnez	t0, o32_handle_softirq
+	mfc0	t0, CP0_STATUS		# need_resched and signals atomic test
+	ori	t0, t0, 1
+	xori	t0, t0, 1
+	mtc0	t0, CP0_STATUS
 
-9:	lw	t0,PT_STATUS(sp)	# returning to kernel mode?
-	andi	t1, t0, KU_USER
 	lw	t2, TASK_NEED_RESCHED($28)
-	beqz	t1, o32_return		# -> yes
 	bnez	t2, o32_reschedule
 	lw	v0, TASK_SIGPENDING($28)
+	bnez	v0, signal_return
+restore_all:
+	RESTORE_SOME
+	RESTORE_SP_AND_RET
+
+/* Put this behind restore_all for the sake of the branch prediction.  */
+signal_return:
+	.type	signal_return, @function
+
+	mfc0	t0, CP0_STATUS
+	ori	t0, t0, 1
+	mtc0	t0, CP0_STATUS
+
 	move	a0, zero
-	beqz	v0, o32_return
 	move	a1, sp
-	SAVE_STATIC
 	jal	do_signal
+	b	restore_all
 
-o32_return:
-	RESTORE_SOME
-	RESTORE_SP_AND_RET
-
-o32_handle_softirq:
-	jal	do_softirq
-	b	9b
 o32_reschedule:
 	SAVE_STATIC
 	jal	schedule
diff -urN linux-2.4.10-pre6/arch/mips/kernel/setup.c linux/arch/mips/kernel/setup.c
--- linux-2.4.10-pre6/arch/mips/kernel/setup.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/setup.c	Mon Dec  3 23:08:45 2001
@@ -191,6 +191,12 @@
 				           MIPS_CPU_WATCH | MIPS_CPU_VCE;
 			mips_cpu.tlbsize = 48;
 			break;
+                case PRID_IMP_VR41XX:
+                        mips_cpu.cputype = CPU_VR41XX;
+                        mips_cpu.isa_level = MIPS_CPU_ISA_III;
+                        mips_cpu.options = R4K_OPTS;
+                        mips_cpu.tlbsize = 32;
+                        break;
 		case PRID_IMP_R4600:
 			mips_cpu.cputype = CPU_R4600;
 			mips_cpu.isa_level = MIPS_CPU_ISA_III;
@@ -282,7 +288,7 @@
 			break;
 		case PRID_IMP_R10000:
 			mips_cpu.cputype = CPU_R10000;
-			mips_cpu.cputype = MIPS_CPU_ISA_IV;
+			mips_cpu.isa_level = MIPS_CPU_ISA_IV;
 			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX | 
 				           MIPS_CPU_FPU | MIPS_CPU_32FPR | 
 				           MIPS_CPU_COUNTER | MIPS_CPU_WATCH;
@@ -719,8 +725,10 @@
 #ifdef CONFIG_BLK_DEV_INITRD
 	/* Board specific code should have set up initrd_start and initrd_end */
 	ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
-	initrd_start = (unsigned long)&__rd_start;
-	initrd_end = (unsigned long)&__rd_end;
+	if( __rd_start != __rd_end ) {
+		initrd_start = (unsigned long)&__rd_start;
+		initrd_end = (unsigned long)&__rd_end;
+	}
 	initrd_below_start_ok = 1;
 	if (initrd_start) {
 		unsigned long initrd_size = ((unsigned char *)initrd_end) - ((unsigned char *)initrd_start); 
diff -urN linux-2.4.10-pre6/arch/mips/kernel/signal.c linux/arch/mips/kernel/signal.c
--- linux-2.4.10-pre6/arch/mips/kernel/signal.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/kernel/signal.c	Mon Dec  3 23:08:45 2001
@@ -464,10 +464,10 @@
 		/*
 		 * Set up the return code ...
 		 *
-		 *         li      v0, __NR_sigreturn
+		 *         li      v0, __NR_rt_sigreturn
 		 *         syscall
 		 */
-		err |= __put_user(0x24020000 + __NR_sigreturn,
+		err |= __put_user(0x24020000 + __NR_rt_sigreturn,
 		                  frame->rs_code + 0);
 		err |= __put_user(0x0000000c                 ,
 		                  frame->rs_code + 1);
diff -urN linux-2.4.10-pre6/arch/mips/kernel/softfp.S linux/arch/mips/kernel/softfp.S
--- linux-2.4.10-pre6/arch/mips/kernel/softfp.S	Sun Jul  9 22:18:15 2000
+++ linux/arch/mips/kernel/softfp.S	Wed Dec 31 16:00:00 1969
@@ -1,666 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 2000 by Ralf Baechle
- *
- * For now it's just a crude hack good enough to run certain fp programs like
- * Mozilla.
- * XXX: Handle MIPS II/III/IV/V enhancements, exceptions, ...
- */
-#include <asm/regdef.h>
-#include <asm/asm.h>
-
-#ifndef __KERNEL__
-#define printk printf
-#endif
-
-#define LOCK_KERNEL
-#define UNLOCK_KERNEL
-
-/*
- * This duplicates definitions from <linux/kernel.h>.
- */
-#define KERN_EMERG      "<0>"   /* system is unusable                   */
-#define KERN_ALERT      "<1>"   /* action must be taken immediately     */
-#define KERN_CRIT       "<2>"   /* critical conditions                  */
-#define KERN_ERR        "<3>"   /* error conditions                     */
-#define KERN_WARNING    "<4>"   /* warning conditions                   */
-#define KERN_NOTICE     "<5>"   /* normal but significant condition     */
-#define KERN_INFO       "<6>"   /* informational                        */
-#define KERN_DEBUG      "<7>"   /* debug-level messages                 */
-
-/*
- * This duplicates definitions from <asm/signal.h>
- */
-#define SIGILL           4      /* Illegal instruction (ANSI).  */
-
-/*
- * Definitions about the instruction format
- */
-#define fd_shift	6
-#define fr_shift	21
-#define fs_shift	11
-#define ft_shift	16
-
-/*
- * NaNs as use by the MIPS architecture
- */
-#define S_QNaN		0x7fbfffff
-#define D_QNaN		0x7ff7ffffffffffff
-#define W_QNaN		0x7fffffff
-#define L_QNaN		0x7fffffffffffffff
-
-/*
- * Checking for NaNs
- */
-#define S_is_QNaN(reg,res)						\
-	sll	res, reg, S_F_size - S_F_bits
-#define D_is_QNaN(reg1,reg2,res)					\
-	sll	res, reg1, (D_F_size - 32) - (D_F_bits - 32);		\
-	or	res, reg2
-
-/*
- * Checking for Denorms
- */
-#define S_is_Denorm(reg,res)						\
-	li	res, 1 << (S_F_bits - 1);				\
-	and	reg, res
-
-/*
- * Some constants that define the properties of single precission numbers.
- */
-#define S_M_prec	24
-#define S_E_max		127
-#define S_E_min		-126
-#define S_E_bias	127
-#define S_E_bits	8
-#define S_F_bits	23
-#define S_F_size	32
-
-/* Set temp0, if exponent of reg is S_E_max + 1.  */
-#define S_is_E_max(reg,temp0,temp1)					\
-	li	temp0, (S_E_max + 1 + S_E_bias) << S_F_bits;		\
-	and	temp1, temp0, reg;					\
-	seq	temp0, temp1			/* temp0 != 0 if NaN */
-
-/* Clear temp0, if exponent of reg is S_E_min - 1.  */
-#define S_is_E_min(reg,temp0)						\
-	li	temp0, (S_E_min - 1 + S_E_bias) << S_F_bits;		\
-	and	temp0, reg	/* temp0 == 0 if denorm or zero */
-
-/* Set temp0 if reg is a NaN assuming S_is_E_max is true  */
-#define S_get_F(reg,temp0)						\
-	li	temp0, (1 << S_F_bits) - 1;				\
-	and	temp0, reg			/* temp0 != 0 if NaN */
-
-/* Set res if fraction of reg is != 0.  */
-#define S_is_Inf(reg,res)						\
-	li	res, (1 << S_F_bits) - 1;				\
-	and	res, reg			/* temp0 == 0 if Inf */
-
-
-/*
- * Some constants that define the properties of double precission numbers.
- */
-#define D_M_prec	53
-#define D_E_max		1023
-#define D_E_min		-1022
-#define D_E_bias	1023
-#define D_E_bits	8
-#define D_F_bits	52
-#define D_F_size	64
-
-/* Set temp0, if exponent of reg1/reg2 is D_E_max.  */
-#define D_is_E_max(reg1,reg2,temp0,temp1)				\
-	li	temp0, (D_E_max + 1 + D_E_bias) << (D_F_bits - 32);	\
-	and	temp1, temp0, reg1;					\
-	seq	temp0, temp1			/* temp0 != 0 if NaN */
-
-/* Clear temp0, if exponent of reg is D_E_min.  */
-#define D_is_E_min(reg1,reg2,res)					\
-	li	res, (D_E_min + 1 + D_E_bias) << (D_F_bits - 32);	\
-	and	res, reg1	/* temp0 == 0 if NaN or zero */
-
-/* Set res if reg is a NaN assuming S_is_E_max is true  */
-#define D_get_F(reg1,reg2,res)						\
-	li	res, (1 << (D_F_bits - 32)) - 1;			\
-	and	res, reg1			/* temp0 != 0 if NaN */
-
-/* Set temp0 if reg1/reg2 is a NaN  */
-#define D_is_NAN(reg1,reg2,temp0,temp1)					\
-	li	temp0, (1 << (D_F_bits - 32) - 1;			\
-	and	temp0, reg1;						\
-	or	temp0, reg2;						\
-	sne	temp0, zero, temp0		/* temp0 != 0 if NaN */
-
-/* Set res if fraction of reg1/reg2 is != 0.  */
-#define D_is_Inf(reg1,reg2,res)						\
-	li	res, (1 << (D_F_bits - 32)) - 1;			\
-	and	res, reg1;						\
-	or	res, reg2			/* temp0 == 0 if Inf */
-
-/* Complain about yet unhandled instruction.  */
-#define BITCH(insn)							\
-insn:	LOCK_KERNEL;							\
-	la	a1, 8f;							\
-	TEXT(#insn);							\
-	la	a0, nosim;						\
-	UNLOCK_KERNEL;							\
-	j	done
-
-	.data
-nosim: .asciz	KERN_DEBUG "Don't know how to simulate %s instruction\n"
-	.previous
-
-/*
- * When we come here, we've saved some of the integer registers and
- * reenabled interrupts.
- */
-LEAF(simfp)
-	.set	noreorder
-	.cpload	$25
-	.set	reorder
-
-	subu	sp, 16
-	.cprestore 20
-	sw	ra, 16(sp)
-
-	/* For now we assume that we get the opcode to simulate passed in as
-	   an argument.  */
-	move	t0, a0
-
-	/*
-	 * First table lookup using insn[5:0]
-	 */
-	la	t1, lowtab
-	andi	t2, t0, 0x3f
-	sll	t2, t2, 2
-	addu	t1, t2
-	lw	t1, (t1)
-	jr	t1
-	END(simfp)
-
-/*
- * We only decode the lower 3 of the 5 bit in the fmt field.  That way we
- * can keep the jump table significantly shorter.
- */
-#define FMT_switch(insn,opc,temp0,temp1)				\
-insn:	srl	temp0, opc, 19;						\
-	andi	temp0, 0x1c;						\
-	la	temp1, insn##.tab;					\
-	addu	temp0, temp1;						\
-	lw	temp0, (temp0);						\
-	jr	temp0;							\
-									\
-	.data;								\
-insn##.tab:								\
-	.word	insn##.s, insn##.d, unimp, unimp;			\
-	.word	insn##.w, insn##.l, unimp, unimp;			\
-	.previous
-
-	BITCH(add)
-	BITCH(sub)
-	BITCH(mul)
-	BITCH(div)
-	BITCH(sqrt)
-	BITCH(abs)
-	BITCH(mov)
-	BITCH(neg)
-	BITCH(round.l)
-	BITCH(trunc.l)
-	BITCH(ceil.l)
-	BITCH(floor.l)
-	BITCH(round.w)
-	BITCH(trunc.w)
-	BITCH(ceil.w)
-	BITCH(floor.w)
-	BITCH(cvt.s)
-	BITCH(cvt.d)
-
-/* ------------------------------------------------------------------------ */
-
-FMT_switch(cvt.w,t0,t1,t2)
-
-/* Convert a single fp to a fixed point integer.  */
-cvt.w.s:
-	srl	t1, t0, fs_shift	# Get source register
-	andi	t1, 31
-	jal	s_get_fpreg
-
-	S_is_E_max(t1,t2,t3)
-	beqz	t2, 3f
-	/* Might be a NaN or Inf.  */
-	S_get_F(t1,t2)
-	beqz	t2, 2f
-
-	/* It's a NaN.  IEEE says undefined.  */
-	/* Is it a QNaN?  Then the result is a QNaN as well.  */
-	S_is_QNaN(t1,t2)
-	bltz	t2, 1f
-
-	/* XXX Ok, it's a SNaN.  Signal invalid exception, if enabled.
-	   For now we don't signal and supply a QNaN for result.  */
-
-1:	li	t2, W_QNaN
-	srl	t1, t0, fd_shift	# Put result register
-	andi	t1, 31
-	jal	s_put_fpreg
-	j	done
-2:
-
-	S_is_Inf(t1,t2)
-	bnez	t2, 2f
-
-	/* It's +/- Inf.  Set register to +/- max. integer.  */
-	/* XXX Send invalid operation exception instead, if enabled.  */
-	srl	t1, t1, 31		# Extract sign bit
-	li	t2, 0x7fffffff
-	addu	t2, t1
-
-	srl	t1, t0, fd_shift	# Put result register
-	andi	t1, 31
-	jal	s_put_fpreg
-	j	done
-2:
-3:	
-
-	/* But then it might be a denorm or zero?  */
-	S_is_E_min(t1,t2)
-	bnez	t2, 2f
-
-	/* Ok, it's a denorm or zero.  */
-	S_get_F(t1,t2)
-	beqz	t2, 1f
-
-	/* It's a denorm.  */
-	/* XXX Should be signaling inexact exception, if enabled.  */
-	/* Fall through.  */
-1:
-	/* Yes, it is a denorm or zero.  Supply a zero as result.  */
-	move	t2, zero
-	srl	t1, t0, fd_shift	# Put result register
-	andi	t1, 31
-	jal	s_put_fpreg
-	j	done
-2:
-
-	/* XXX Ok, it's a normal number.  We don't handle that case yet.
-	   If we have fp hardware this case is unreached.  Add this for
-	   full fp simulation.  */
-
-	/* Done, return.  */
-	lw	ra, 16(sp)
-	addu	sp, 16
-	jr	ra
-
-/* Convert a double fp to a fixed point integer.  */
-cvt.w.d:
-	srl	t1, t0, fs_shift	# Get source register
-	andi	t1, 31
-	jal	d_get_fpreg
-
-	D_is_E_max(t1,t2,t3,t4)
-	beqz	t3, 3f
-
-	/* Might be a NaN or Inf.  */
-	D_get_F(t1,t2,t3)
-	or	t3, t2
-	beqz	t3, 2f
-
-	/* It's a NaN.  IEEE says undefined.  */
-	/* Is it a QNaN?  Then the result is a QNaN as well.  */
-	D_is_QNaN(t1,t2,t3)
-	bltz	t3, 1f
-
-	/* XXX Ok, it's a SNaN.  Signal invalid exception, if enabled.
-	   For now we don't signal and supply a QNaN for result.  */
-
-1:	li	t2, W_QNaN
-	srl	t1, t0, fd_shift	# Put result register
-	andi	t1, 31
-	jal	s_put_fpreg
-	j	done
-2:
-
-	D_is_Inf(t1,t2,t3)
-	bnez	t3, 2f
-
-	/* It's +/- Inf.  Set register to +/- max. integer.  */
-	/* XXX Send invalid operation exception instead, if enabled.  */
-	srl	t1, t1, 31		# Extract sign bit
-	li	t2, 0x7fffffff
-	addu	t2, t1
-
-	srl	t1, t0, fd_shift	# Put result register
-	andi	t1, 31
-	jal	s_put_fpreg
-	j	done
-2:
-3:	
-
-	/* But then it might be a denorm or zero?  */
-	D_is_E_min(t1,t2,t3)
-	bnez	t3, 2f
-
-	/* Ok, it's a denorm or zero.  */
-	D_get_F(t1,t2,t3)
-	or	t3, t2
-	beqz	t3, 1f
-
-	/* It's a denorm.  */
-	/* XXX Should be signaling inexact exception, if enabled.  */
-	/* Fall through.  */
-1:
-	/* Yes, it is a denorm or zero.  Supply a zero as result.  */
-	move	t2, zero
-	srl	t1, t0, fd_shift	# Put result register
-	andi	t1, 31
-	jal	s_put_fpreg
-	j	done
-2:
-
-	/* XXX Ok, it's a normal number.  We don't handle that case yet.
-	   If we have fp hardware this case is only reached if the value
-	   of the source register exceeds the range which is representable
-	   in a single precission register.  For now we kludge by returning
-	   +/- maxint and don't signal overflow. */
-
-	srl	t1, t1, 31		# Extract sign bit
-	li	t2, 0x7fffffff
-	addu	t2, t1
-
-	srl	t1, t0, fd_shift	# Put result register
-	andi	t1, 31
-	jal	s_put_fpreg
-
-	/* Done, return.  */
-	lw	ra, 16(sp)
-	addu	sp, 16
-	jr	ra
-
-cvt.w.w = unimp				# undefined result
-cvt.w.l = unimp				# undefined result
-
-/* MIPS III extension, no need to handle for 32bit OS.  */
-cvt.l = unimp
-
-/* ------------------------------------------------------------------------ */
-
-	BITCH(c.f)
-	BITCH(c.un)
-	BITCH(c.eq)
-	BITCH(c.ueq)
-	BITCH(c.olt)
-	BITCH(c.ult)
-	BITCH(c.ole)
-	BITCH(c.ule)
-	BITCH(c.sf)
-	BITCH(c.ngle)
-	BITCH(c.seq)
-	BITCH(c.ngl)
-	BITCH(c.lt)
-	BITCH(c.nge)
-	BITCH(c.le)
-	BITCH(c.ngt)
-
-/* Get the single precission register which's number is in t1.  */
-s_get_fpreg:
-	.set	noat
-	sll	AT, t1, 2
-	sll	t1, 3
-	addu	t1, AT
-	la	AT, 1f
-	addu	AT, t1
-	jr	AT
-	.set	at
-
-1:	mfc1	t1, $0
-	jr	ra
-	mfc1	t1, $1
-	jr	ra
-	mfc1	t1, $2
-	jr	ra
-	mfc1	t1, $3
-	jr	ra
-	mfc1	t1, $4
-	jr	ra
-	mfc1	t1, $5
-	jr	ra
-	mfc1	t1, $6
-	jr	ra
-	mfc1	t1, $7
-	jr	ra
-	mfc1	t1, $8
-	jr	ra
-	mfc1	t1, $9
-	jr	ra
-	mfc1	t1, $10
-	jr	ra
-	mfc1	t1, $11
-	jr	ra
-	mfc1	t1, $12
-	jr	ra
-	mfc1	t1, $13
-	jr	ra
-	mfc1	t1, $14
-	jr	ra
-	mfc1	t1, $15
-	jr	ra
-	mfc1	t1, $16
-	jr	ra
-	mfc1	t1, $17
-	jr	ra
-	mfc1	t1, $18
-	jr	ra
-	mfc1	t1, $19
-	jr	ra
-	mfc1	t1, $20
-	jr	ra
-	mfc1	t1, $21
-	jr	ra
-	mfc1	t1, $22
-	jr	ra
-	mfc1	t1, $23
-	jr	ra
-	mfc1	t1, $24
-	jr	ra
-	mfc1	t1, $25
-	jr	ra
-	mfc1	t1, $26
-	jr	ra
-	mfc1	t1, $27
-	jr	ra
-	mfc1	t1, $28
-	jr	ra
-	mfc1	t1, $29
-	jr	ra
-	mfc1	t1, $30
-	jr	ra
-	mfc1	t1, $31
-	jr	ra
-
-/*
- * Put the value in t2 into the single precission register which's number
- * is in t1.
- */
-s_put_fpreg:
-	.set	noat
-	sll	AT, t1, 2
-	sll	t1, 3
-	addu	t1, AT
-	la	AT, 1f
-	addu	AT, t1
-	jr	AT
-	.set	at
-	
-1:	mtc1	t2, $0
-	jr	ra
-	mtc1	t2, $1
-	jr	ra
-	mtc1	t2, $2
-	jr	ra
-	mtc1	t2, $3
-	jr	ra
-	mtc1	t2, $4
-	jr	ra
-	mtc1	t2, $5
-	jr	ra
-	mtc1	t2, $6
-	jr	ra
-	mtc1	t2, $7
-	jr	ra
-	mtc1	t2, $8
-	jr	ra
-	mtc1	t2, $9
-	jr	ra
-	mtc1	t2, $10
-	jr	ra
-	mtc1	t2, $11
-	jr	ra
-	mtc1	t2, $12
-	jr	ra
-	mtc1	t2, $13
-	jr	ra
-	mtc1	t2, $14
-	jr	ra
-	mtc1	t2, $15
-	jr	ra
-	mtc1	t2, $16
-	jr	ra
-	mtc1	t2, $17
-	jr	ra
-	mtc1	t2, $18
-	jr	ra
-	mtc1	t2, $19
-	jr	ra
-	mtc1	t2, $20
-	jr	ra
-	mtc1	t2, $21
-	jr	ra
-	mtc1	t2, $22
-	jr	ra
-	mtc1	t2, $23
-	jr	ra
-	mtc1	t2, $24
-	jr	ra
-	mtc1	t2, $25
-	jr	ra
-	mtc1	t2, $26
-	jr	ra
-	mtc1	t2, $27
-	jr	ra
-	mtc1	t2, $28
-	jr	ra
-	mtc1	t2, $29
-	jr	ra
-	mtc1	t2, $30
-	jr	ra
-	mtc1	t2, $31
-	jr	ra
-
-/* Get the double precission register which's number is in t1 into t1/t2.  */
-d_get_fpreg:
-	.set	noat
-	sll	t1, 3
-	la	AT, 1f
-	addu	AT, t1
-	jr	AT
-	.set	at
-
-1:	mfc1	t1, $0
-	mfc1	t2, $1
-	jr	ra
-	mfc1	t1, $2
-	mfc1	t2, $3
-	jr	ra
-	mfc1	t1, $4
-	mfc1	t2, $5
-	jr	ra
-	mfc1	t1, $6
-	mfc1	t2, $7
-	jr	ra
-	mfc1	t1, $8
-	mfc1	t2, $9
-	jr	ra
-	mfc1	t1, $10
-	mfc1	t2, $11
-	jr	ra
-	mfc1	t1, $12
-	mfc1	t2, $13
-	jr	ra
-	mfc1	t1, $14
-	mfc1	t2, $15
-	jr	ra
-	mfc1	t1, $16
-	mfc1	t2, $17
-	jr	ra
-	mfc1	t1, $18
-	mfc1	t2, $19
-	jr	ra
-	mfc1	t1, $20
-	mfc1	t2, $21
-	jr	ra
-	mfc1	t1, $22
-	mfc1	t2, $23
-	jr	ra
-	mfc1	t1, $24
-	mfc1	t2, $25
-	jr	ra
-	mfc1	t1, $26
-	mfc1	t2, $27
-	jr	ra
-	mfc1	t1, $28
-	mfc1	t2, $29
-	jr	ra
-	mfc1	t1, $30
-	mfc1	t2, $31
-	jr	ra
-
-/*
- * Send an invalid operation exception.
- */
-invalid:
-	lw	ra, 16(sp)
-	addu	sp, 16
-	jr	ra
-
-/*
- * Done, just skip over the current instruction
- */
-done:
-	lw	ra, 16(sp)
-	addu	sp, 16
-	jr	ra
-
-unimp:
-	/* We've run into an yet unknown instruction.  This happens either
-	   on new, yet unsupported CPU types or when the faulting instruction
-	   is being executed for cache but has been overwritten in memory.  */
-	LOCK_KERNEL
-	move	a0, t0
-	PRINT(KERN_DEBUG "FP support: unknown fp op %08lx, ")
-	PRINT("please mail to ralf@gnu.org.\n")
-
-	li	a0, SIGILL			# Die, sucker ...
-	move	a1, $28
-	jal	force_sig
-	UNLOCK_KERNEL
-
-	lw	ra, 16(sp)
-	addu	sp, 16
-	jr	ra
-
-/*
- * Jump table for the lowest 6 bits of a cp1 instruction.
- */
-	.data
-lowtab:	.word	add,   sub,   mul,   div,   sqrt,  abs,   mov,   neg
-	.word	round.l,trunc.l,ceil.l,floor.l,round.w,trunc.w,ceil.w,floor.w
-	.word	unimp, unimp, unimp, unimp, unimp, unimp, unimp, unimp
-	.word	unimp, unimp, unimp, unimp, unimp, unimp, unimp, unimp
-	.word	cvt.s, cvt.d, unimp, unimp, cvt.w, cvt.l, unimp, unimp
-	.word	unimp, unimp, unimp, unimp, unimp, unimp, unimp, unimp
-	.word	c.f,   c.un,  c.eq,  c.ueq, c.olt, c.ult, c.ole, c.ule
-	.word	c.sf,  c.ngle,c.seq, c.ngl, c.lt,  c.nge, c.le, c.ngt
diff -urN linux-2.4.10-pre6/arch/mips/kernel/time.c linux/arch/mips/kernel/time.c
--- linux-2.4.10-pre6/arch/mips/kernel/time.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/time.c	Mon Dec  3 23:08:45 2001
@@ -1,18 +1,15 @@
-/***********************************************************************
+/*
  * Copyright 2001 MontaVista Software Inc.
  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  *
- * arch/mips/kernel/time.c
- *     Common time service routines for MIPS machines.  See 
- *     Documents/MIPS/time.txt. 
+ * Common time service routines for MIPS machines. See 
+ * Documents/MIPS/README.txt. 
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
- ***********************************************************************
  */
-
 #include <linux/config.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
@@ -29,22 +26,11 @@
 #include <asm/cpu.h>
 #include <asm/time.h>
 #include <asm/hardirq.h>
-
-/* 
- * macro for catching spurious errors.  Eable to LL_DEBUG in kernel hacking
- * config menu.
- */
-#ifdef CONFIG_LL_DEBUG
-#define	MIPS_ASSERT(x)	if (!(x)) { panic("MIPS_ASSERT failed at %s:%d\n", __FILE__, __LINE__); }
-#define MIPS_DEBUG(x)  do { x; } while (0)
-#else
-#define MIPS_ASSERT(x)
-#define MIPS_DEBUG(x)
-#endif
+#include <asm/div64.h>
 
 /* This is for machines which generate the exact clock. */
 #define USECS_PER_JIFFY (1000000/HZ)
-#define USECS_PER_JIFFY_FRAC (0x100000000*1000000/HZ&0xffffffff)
+#define USECS_PER_JIFFY_FRAC ((1000000ULL << 32) / HZ & 0xffffffff)
 
 /*
  * forward reference
@@ -74,50 +60,50 @@
  */
 void do_gettimeofday(struct timeval *tv)
 {
-        unsigned long flags;
+	unsigned long flags;
+
+	read_lock_irqsave (&xtime_lock, flags);
+	*tv = xtime;
+	tv->tv_usec += do_gettimeoffset();
+
+	/*
+	 * xtime is atomically updated in timer_bh. jiffies - wall_jiffies
+	 * is nonzero if the timer bottom half hasnt executed yet.
+	 */
+	if (jiffies - wall_jiffies)
+		tv->tv_usec += USECS_PER_JIFFY;
 
-        read_lock_irqsave (&xtime_lock, flags);
-        *tv = xtime;
-        tv->tv_usec += do_gettimeoffset();
-
-        /*
-         * xtime is atomically updated in timer_bh. jiffies - wall_jiffies
-         * is nonzero if the timer bottom half hasnt executed yet.
-         */
-        if (jiffies - wall_jiffies)
-                tv->tv_usec += USECS_PER_JIFFY;
-
-        read_unlock_irqrestore (&xtime_lock, flags);
-
-        if (tv->tv_usec >= 1000000) {
-                tv->tv_usec -= 1000000;
-                tv->tv_sec++;
-        }
+	read_unlock_irqrestore (&xtime_lock, flags);
+
+	if (tv->tv_usec >= 1000000) {
+		tv->tv_usec -= 1000000;
+		tv->tv_sec++;
+	}
 }
 
 void do_settimeofday(struct timeval *tv)
 {
-        write_lock_irq (&xtime_lock);
+	write_lock_irq (&xtime_lock);
 
-        /* This is revolting. We need to set the xtime.tv_usec
-         * correctly. However, the value in this location is
-         * is value at the last tick.
-         * Discover what correction gettimeofday
-         * would have done, and then undo it!
-         */
-        tv->tv_usec -= do_gettimeoffset();
-
-        if (tv->tv_usec < 0) {
-                tv->tv_usec += 1000000;
-                tv->tv_sec--;
-        }
-        xtime = *tv;
-        time_adjust = 0;                /* stop active adjtime() */
-        time_status |= STA_UNSYNC;
-        time_maxerror = NTP_PHASE_LIMIT;
-        time_esterror = NTP_PHASE_LIMIT;
+	/* This is revolting. We need to set the xtime.tv_usec
+	 * correctly. However, the value in this location is
+	 * is value at the last tick.
+	 * Discover what correction gettimeofday
+	 * would have done, and then undo it!
+	 */
+	tv->tv_usec -= do_gettimeoffset();
 
-        write_unlock_irq (&xtime_lock);
+	if (tv->tv_usec < 0) {
+		tv->tv_usec += 1000000;
+		tv->tv_sec--;
+	}
+	xtime = *tv;
+	time_adjust = 0;			/* stop active adjtime() */
+	time_status |= STA_UNSYNC;
+	time_maxerror = NTP_PHASE_LIMIT;
+	time_esterror = NTP_PHASE_LIMIT;
+
+	write_unlock_irq (&xtime_lock);
 }
 
 
@@ -162,30 +148,26 @@
 	u32 count;
 	unsigned long res;
 
-	MIPS_ASSERT(mips_cpu.options & MIPS_CPU_COUNTER);
-	MIPS_ASSERT(mips_counter_frequency != 0);
-	MIPS_ASSERT(sll32_usecs_per_cycle != 0);
-
 	/* Get last timer tick in absolute kernel time */
-        count = read_32bit_cp0_register(CP0_COUNT);
+	count = read_32bit_cp0_register(CP0_COUNT);
 
-        /* .. relative to previous jiffy (32 bits is enough) */
-        count -= timerlo;
+	/* .. relative to previous jiffy (32 bits is enough) */
+	count -= timerlo;
 
-        __asm__("multu\t%1,%2\n\t"
-                "mfhi\t%0"
-                :"=r" (res)
-                :"r" (count),
-                 "r" (sll32_usecs_per_cycle));
-
-        /*
-         * Due to possible jiffies inconsistencies, we need to check
-         * the result so that we'll get a timer that is monotonic.
-         */
-        if (res >= USECS_PER_JIFFY)
-                res = USECS_PER_JIFFY-1;
+	__asm__("multu\t%1,%2\n\t"
+	        "mfhi\t%0"
+	        :"=r" (res)
+	        :"r" (count),
+	         "r" (sll32_usecs_per_cycle));
 
-        return res;
+	/*
+	 * Due to possible jiffies inconsistencies, we need to check
+	 * the result so that we'll get a timer that is monotonic.
+	 */
+	if (res >= USECS_PER_JIFFY)
+		res = USECS_PER_JIFFY-1;
+
+	return res;
 }
 
 /*
@@ -197,156 +179,107 @@
 /* Last jiffy when calibrate_divXX_gettimeoffset() was called. */
 static unsigned long last_jiffies = 0;
 
-/* 
- * copied from include/asm/div64.  
- * We do the copy instead of include the header file because we don't
- * want to reply on _MIPS_ISA value.
- */
-#define do_div64_32(res, high, low, base) ({ \
-        unsigned long __quot, __mod; \
-        unsigned long __cf, __tmp, __i; \
-        \
-        __asm__(".set   push\n\t" \
-                ".set   noat\n\t" \
-                ".set   noreorder\n\t" \
-                "b      1f\n\t" \
-                " li    %4,0x21\n" \
-                "0:\n\t" \
-                "sll    $1,%0,0x1\n\t" \
-                "srl    %3,%0,0x1f\n\t" \
-                "or     %0,$1,$2\n\t" \
-                "sll    %1,%1,0x1\n\t" \
-                "sll    %2,%2,0x1\n" \
-                "1:\n\t" \
-                "bnez   %3,2f\n\t" \
-                "sltu   $2,%0,%z5\n\t" \
-                "bnez   $2,3f\n\t" \
-                "2:\n\t" \
-                " addiu %4,%4,-1\n\t" \
-                "subu   %0,%0,%z5\n\t" \
-                "addiu  %2,%2,1\n" \
-                "3:\n\t" \
-                "bnez   %4,0b\n\t" \
-                " srl   $2,%1,0x1f\n\t" \
-                ".set   pop" \
-                : "=&r" (__mod), "=&r" (__tmp), "=&r" (__quot), "=&r" (__cf), \
-                  "=&r" (__i) \
-                : "Jr" (base), "0" (high), "1" (low), "2" (0), "3" (0) \
-                /* Aarrgh!  Ran out of gcc's limit on constraints... */ \
-                : "$1", "$2"); \
-        \
-        (res) = __quot; \
-        __mod; })
 
 /*
  * This is copied from dec/time.c:do_ioasic_gettimeoffset() by Mercij.
  */
 unsigned long calibrate_div32_gettimeoffset(void)
 {
-        u32 count;
-        unsigned long res, tmp;
-        unsigned long quotient;
-
-	MIPS_ASSERT(mips_cpu.options & MIPS_CPU_COUNTER);
-
-        tmp = jiffies;
-
-        quotient = cached_quotient;
-
-        if (last_jiffies != tmp) {
-                last_jiffies = tmp;
-                if (last_jiffies != 0) {
-                        unsigned long r0;
-                        do_div64_32(r0, timerhi, timerlo, tmp);
-                        do_div64_32(quotient, USECS_PER_JIFFY,
-                                    USECS_PER_JIFFY_FRAC, r0);
-                        cached_quotient = quotient;
-                }
-        }
-
-        /* Get last timer tick in absolute kernel time */
-        count = read_32bit_cp0_register(CP0_COUNT);
-
-        /* .. relative to previous jiffy (32 bits is enough) */
-        count -= timerlo;
-
-        __asm__("multu  %2,%3"
-                : "=l" (tmp), "=h" (res)
-                : "r" (count), "r" (quotient));
-
-        /*
-         * Due to possible jiffies inconsistencies, we need to check
-         * the result so that we'll get a timer that is monotonic.
-         */
-        if (res >= USECS_PER_JIFFY)
-                res = USECS_PER_JIFFY - 1;
+	u32 count;
+	unsigned long res, tmp;
+	unsigned long quotient;
+
+	tmp = jiffies;
+
+	quotient = cached_quotient;
+
+	if (last_jiffies != tmp) {
+		last_jiffies = tmp;
+		if (last_jiffies != 0) {
+			unsigned long r0;
+			do_div64_32(r0, timerhi, timerlo, tmp);
+			do_div64_32(quotient, USECS_PER_JIFFY,
+			            USECS_PER_JIFFY_FRAC, r0);
+			cached_quotient = quotient;
+		}
+	}
+
+	/* Get last timer tick in absolute kernel time */
+	count = read_32bit_cp0_register(CP0_COUNT);
+
+	/* .. relative to previous jiffy (32 bits is enough) */
+	count -= timerlo;
+
+	__asm__("multu  %2,%3"
+	        : "=l" (tmp), "=h" (res)
+	        : "r" (count), "r" (quotient));
+
+	/*
+	 * Due to possible jiffies inconsistencies, we need to check
+	 * the result so that we'll get a timer that is monotonic.
+	 */
+	if (res >= USECS_PER_JIFFY)
+		res = USECS_PER_JIFFY - 1;
 
-        return res;
+	return res;
 }
 
 unsigned long calibrate_div64_gettimeoffset(void)
 {
-        u32 count;
-        unsigned long res, tmp;
-        unsigned long quotient;
-
-
-	MIPS_ASSERT(mips_cpu.options & MIPS_CPU_COUNTER);
-	MIPS_ASSERT((mips_cpu.isa_level != MIPS_CPU_ISA_I) &&
-		    (mips_cpu.isa_level != MIPS_CPU_ISA_II) &&
-		    (mips_cpu.isa_level != MIPS_CPU_ISA_M32));
-
-
-        tmp = jiffies;
-
-        quotient = cached_quotient;
-
-        if (tmp && last_jiffies != tmp) {
-                last_jiffies = tmp;
-                __asm__(".set\tnoreorder\n\t"
-                        ".set\tnoat\n\t"
-                        ".set\tmips3\n\t"
-                        "lwu\t%0,%2\n\t"
-                        "dsll32\t$1,%1,0\n\t"
-                        "or\t$1,$1,%0\n\t"
-                        "ddivu\t$0,$1,%3\n\t"
-                        "mflo\t$1\n\t"
-                        "dsll32\t%0,%4,0\n\t"
-                        "nop\n\t"
-                        "ddivu\t$0,%0,$1\n\t"
-                        "mflo\t%0\n\t"
-                        ".set\tmips0\n\t"
-                        ".set\tat\n\t"
-                        ".set\treorder"
-                        :"=&r" (quotient)
-                        :"r" (timerhi),
-                         "m" (timerlo),
-                         "r" (tmp),
-                         "r" (USECS_PER_JIFFY)
-                        :"$1");
-                cached_quotient = quotient;
-        }
-
-        /* Get last timer tick in absolute kernel time */
-        count = read_32bit_cp0_register(CP0_COUNT);
-
-        /* .. relative to previous jiffy (32 bits is enough) */
-        count -= timerlo;
-
-        __asm__("multu\t%1,%2\n\t"
-                "mfhi\t%0"
-                :"=r" (res)
-                :"r" (count),
-                 "r" (quotient));
-
-        /*
-         * Due to possible jiffies inconsistencies, we need to check
-         * the result so that we'll get a timer that is monotonic.
-         */
-        if (res >= USECS_PER_JIFFY)
-                res = USECS_PER_JIFFY-1;
+	u32 count;
+	unsigned long res, tmp;
+	unsigned long quotient;
+
+	tmp = jiffies;
 
-        return res;
+	quotient = cached_quotient;
+
+	if (tmp && last_jiffies != tmp) {
+		last_jiffies = tmp;
+		__asm__(".set\tnoreorder\n\t"
+	        ".set\tnoat\n\t"
+	        ".set\tmips3\n\t"
+	        "lwu\t%0,%2\n\t"
+	        "dsll32\t$1,%1,0\n\t"
+	        "or\t$1,$1,%0\n\t"
+	        "ddivu\t$0,$1,%3\n\t"
+	        "mflo\t$1\n\t"
+	        "dsll32\t%0,%4,0\n\t"
+	        "nop\n\t"
+	        "ddivu\t$0,%0,$1\n\t"
+	        "mflo\t%0\n\t"
+	        ".set\tmips0\n\t"
+	        ".set\tat\n\t"
+	        ".set\treorder"
+	        :"=&r" (quotient)
+	        :"r" (timerhi),
+	         "m" (timerlo),
+	         "r" (tmp),
+	         "r" (USECS_PER_JIFFY)
+	        :"$1");
+	        cached_quotient = quotient;
+	}
+
+	/* Get last timer tick in absolute kernel time */
+	count = read_32bit_cp0_register(CP0_COUNT);
+
+	/* .. relative to previous jiffy (32 bits is enough) */
+	count -= timerlo;
+
+	__asm__("multu\t%1,%2\n\t"
+	        "mfhi\t%0"
+	        :"=r" (res)
+	        :"r" (count),
+	         "r" (quotient));
+
+	/*
+	 * Due to possible jiffies inconsistencies, we need to check
+	 * the result so that we'll get a timer that is monotonic.
+	 */
+	if (res >= USECS_PER_JIFFY)
+		res = USECS_PER_JIFFY-1;
+
+	return res;
 }
 
 
@@ -377,57 +310,56 @@
 
 	}
 
-        if(!user_mode(regs)) {
+	if(!user_mode(regs)) {
 		if (prof_buffer && current->pid) {
-                        extern int _stext;
-                        unsigned long pc = regs->cp0_epc;
+			extern int _stext;
+			unsigned long pc = regs->cp0_epc;
 
-                        pc -= (unsigned long) &_stext;
-                        pc >>= prof_shift;
-                        /*
-                         * Dont ignore out-of-bounds pc values silently,
-                         * put them into the last histogram slot, so if
-                         * present, they will show up as a sharp peak.
-                         */
-                        if (pc > prof_len-1)
-                                pc = prof_len-1;
-                        atomic_inc((atomic_t *)&prof_buffer[pc]);
-                }
-        }
+			pc -= (unsigned long) &_stext;
+			pc >>= prof_shift;
+			/*
+			 * Dont ignore out-of-bounds pc values silently,
+			 * put them into the last histogram slot, so if
+			 * present, they will show up as a sharp peak.
+			 */
+			if (pc > prof_len-1)
+			pc = prof_len-1;
+			atomic_inc((atomic_t *)&prof_buffer[pc]);
+		}
+	}
 
 	/*
 	 * call the generic timer interrupt handling
 	 */
-        do_timer(regs);
-
-        /*
-         * If we have an externally synchronized Linux clock, then update
-         * CMOS clock accordingly every ~11 minutes. rtc_set_time() has to be
-         * called as close as possible to 500 ms before the new second starts.
-         */
-        read_lock (&xtime_lock);
-        if ((time_status & STA_UNSYNC) == 0 &&
-            xtime.tv_sec > last_rtc_update + 660 &&
-            xtime.tv_usec >= 500000 - ((unsigned) tick) / 2 &&
-            xtime.tv_usec <= 500000 + ((unsigned) tick) / 2) {
+	do_timer(regs);
 
+	/*
+	 * If we have an externally synchronized Linux clock, then update
+	 * CMOS clock accordingly every ~11 minutes. rtc_set_time() has to be
+	 * called as close as possible to 500 ms before the new second starts.
+	 */
+	read_lock (&xtime_lock);
+	if ((time_status & STA_UNSYNC) == 0 &&
+	    xtime.tv_sec > last_rtc_update + 660 &&
+	    xtime.tv_usec >= 500000 - ((unsigned) tick) / 2 &&
+	    xtime.tv_usec <= 500000 + ((unsigned) tick) / 2) {
 		if (rtc_set_time(xtime.tv_sec) == 0) {
 			last_rtc_update = xtime.tv_sec;
 		} else {
 			last_rtc_update = xtime.tv_sec - 600; 
 			/* do it again in 60 s */
 		}
-        }
-        read_unlock (&xtime_lock);
+	}
+	read_unlock (&xtime_lock);
 
 	/*
 	 * If jiffies has overflowed in this timer_interrupt we must
 	 * update the timer[hi]/[lo] to make fast gettimeoffset funcs
 	 * quotient calc still valid. -arca
 	 */
-        if (!jiffies) {
-                timerhi = timerlo = 0;
-        }
+	if (!jiffies) {
+		timerhi = timerlo = 0;
+	}
 }
 
 asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
@@ -442,9 +374,8 @@
 	
 	irq_exit(cpu, irq);
 
-	/* check for bottom half */
-        if (softirq_active(cpu)&softirq_mask(cpu))
-                do_softirq();
+	if (softirq_pending(cpu))
+		do_softirq();
 }
 
 
@@ -480,19 +411,14 @@
 
 void __init time_init(void)
 {
-	printk("New MIPS time_init() invoked.\n");
-
 	if (board_time_init)
 		board_time_init();
 
-	/* setup xtime */
-	write_lock_irq(&xtime_lock);
 	xtime.tv_sec = rtc_get_time();
 	xtime.tv_usec = 0;
-	write_unlock_irq(&xtime_lock);
 
 	/* choose appropriate gettimeoffset routine */
-	if ( ! (mips_cpu.options & MIPS_CPU_COUNTER) ) {
+	if (!(mips_cpu.options & MIPS_CPU_COUNTER)) {
 		/* no cpu counter - sorry */
 		do_gettimeoffset = null_gettimeoffset;
 	} else if (mips_counter_frequency != 0) {
@@ -519,11 +445,6 @@
 		sll32_usecs_per_cycle = mips_counter_frequency / 100000;
 		sll32_usecs_per_cycle = 0xffffffff / sll32_usecs_per_cycle;
 		sll32_usecs_per_cycle *= 10;
-
-		MIPS_DEBUG(printk("cycles_per_jiffy = %d\n", 
-				  cycles_per_jiffy));
-		MIPS_DEBUG(printk("sll32_usecs_per_cycle = %d \n",
-				  sll32_usecs_per_cycle));
 	}
 
 	/* 
@@ -537,6 +458,52 @@
 	 * to be NULL function so that we are sure the high-level code
 	 * is not invoked accidentally.
 	 */
-	MIPS_ASSERT(board_timer_setup != NULL);
 	board_timer_setup(&timer_irqaction);
+}
+
+#define FEBRUARY		2
+#define STARTOFTIME		1970
+#define SECDAY			86400L
+#define SECYR			(SECDAY * 365)
+#define leapyear(year)		((year) % 4 == 0)
+#define days_in_year(a)		(leapyear(a) ? 366 : 365)
+#define days_in_month(a)	(month_days[(a) - 1])
+
+static int month_days[12] = {
+	31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
+};
+
+void to_tm(unsigned long tim, struct rtc_time * tm)
+{
+	long hms, day;
+	int i;
+
+	day = tim / SECDAY;
+	hms = tim % SECDAY;
+
+	/* Hours, minutes, seconds are easy */
+	tm->tm_hour = hms / 3600;
+	tm->tm_min = (hms % 3600) / 60;
+	tm->tm_sec = (hms % 3600) % 60;
+
+	/* Number of years in days */
+	for (i = STARTOFTIME; day >= days_in_year(i); i++)
+	day -= days_in_year(i);
+	tm->tm_year = i;
+
+	/* Number of months in days left */
+	if (leapyear(tm->tm_year))
+	days_in_month(FEBRUARY) = 29;
+	for (i = 1; day >= days_in_month(i); i++)
+	day -= days_in_month(i);
+	days_in_month(FEBRUARY) = 28;
+	tm->tm_mon = i;
+
+	/* Days are what is left over (+1) from all that. */
+	tm->tm_mday = day + 1;
+
+	/*
+	 * Determine the day of week
+	 */
+	tm->tm_wday = (day + 3) % 7;
 }
diff -urN linux-2.4.10-pre6/arch/mips/kernel/traps.c linux/arch/mips/kernel/traps.c
--- linux-2.4.10-pre6/arch/mips/kernel/traps.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/traps.c	Mon Dec  3 23:08:45 2001
@@ -3,17 +3,18 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1994 - 1999 by Ralf Baechle
+ * Copyright (C) 1994 - 1999, 2000, 01 Ralf Baechle
  * Modified for R3000 by Paul M. Antoine, 1995, 1996
  * Complete output from die() by Ulf Carlsson, 1998
  * Copyright (C) 1999 Silicon Graphics, Inc.
  *
  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ * Copyright (C) 2000, 01 MIPS Technologies, Inc.
  */
 #include <linux/config.h>
 #include <linux/init.h>
 #include <linux/mm.h>
+#include <linux/module.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
 #include <linux/smp_lock.h>
@@ -25,6 +26,7 @@
 #include <asm/cachectl.h>
 #include <asm/inst.h>
 #include <asm/jazz.h>
+#include <asm/module.h>
 #include <asm/pgtable.h>
 #include <asm/io.h>
 #include <asm/siginfo.h>
@@ -32,9 +34,6 @@
 #include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/mmu_context.h>
-#ifndef CONFIG_MIPS_FPU_EMULATOR 
-#include <asm/inst.h>
-#endif
 
 /*
  * Machine specific interrupt handlers
@@ -63,12 +62,9 @@
 extern asmlinkage void handle_mcheck(void);
 extern asmlinkage void handle_reserved(void);
 
-extern int fpu_emulator_cop1Handler(int, struct pt_regs *);
-
-static char *cpu_names[] = CPU_NAMES;
+extern int fpu_emulator_cop1Handler(struct pt_regs *);
 
 char watch_available = 0;
-char dedicated_iv_available = 0;
 
 void (*ibe_board_handler)(struct pt_regs *regs);
 void (*dbe_board_handler)(struct pt_regs *regs);
@@ -81,7 +77,7 @@
  */
 #define MODULE_RANGE (8*1024*1024)
 
-#if !defined(CONFIG_CPU_HAS_LLSC)
+#ifndef CONFIG_CPU_HAS_LLSC
 /*
  * This stuff is needed for the userland ll-sc emulation for R2300
  */
@@ -94,8 +90,6 @@
 #define OFFSET 0x0000ffff
 #define LL     0xc0000000
 #define SC     0xe0000000
-
-#undef DEBUG_LLSC
 #endif
 
 /*
@@ -212,7 +206,6 @@
 	show_trace((unsigned int *) regs->regs[29]);
 	show_code((unsigned int *) regs->cp0_epc);
 	printk("\n");
-while(1);
 	spin_unlock_irq(&die_lock);
 	do_exit(SIGSEGV);
 }
@@ -254,89 +247,101 @@
 	return (first == last && first->insn == value) ? first->nextinsn : 0;
 }
 
-#define search_dbe_table(addr)	\
-	search_one_table(__start___dbe_table, __stop___dbe_table - 1, (addr))
+extern spinlock_t modlist_lock;
+
+static inline unsigned long
+search_dbe_table(unsigned long addr)
+{
+	unsigned long ret = 0;
+
+#ifndef CONFIG_MODULES
+	/* There is only the kernel to search.  */
+	ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr);
+	return ret;
+#else
+	unsigned long flags;
+
+	/* The kernel is the last "module" -- no need to treat it special.  */
+	struct module *mp;
+	struct archdata *ap;
+
+	spin_lock_irqsave(&modlist_lock, flags);
+	for (mp = module_list; mp != NULL; mp = mp->next) {
+		if (!mod_member_present(mp, archdata_end) ||
+        	    !mod_archdata_member_present(mp, struct archdata,
+						 dbe_table_end))
+			continue;
+		ap = (struct archdata *)(mp->archdata_start);
+
+		if (ap->dbe_table_start == NULL ||
+		    !(mp->flags & (MOD_RUNNING | MOD_INITIALIZING)))
+			continue;
+		ret = search_one_table(ap->dbe_table_start,
+				       ap->dbe_table_end - 1, addr);
+		if (ret)
+			break;
+	}
+	spin_unlock_irqrestore(&modlist_lock, flags);
+	return ret;
+#endif
+}
 
 static void default_be_board_handler(struct pt_regs *regs)
 {
 	unsigned long new_epc;
-	unsigned long fixup = search_dbe_table(regs->cp0_epc);
+	unsigned long fixup;
+	int data = regs->cp0_cause & 4;
 
-	if (fixup) {
-		new_epc = fixup_exception(dpf_reg, fixup, regs->cp0_epc);
-		regs->cp0_epc = new_epc;
-		return;
+	if (data && !user_mode(regs)) {
+		fixup = search_dbe_table(regs->cp0_epc);
+		if (fixup) {
+			new_epc = fixup_exception(dpf_reg, fixup,
+						  regs->cp0_epc);
+			regs->cp0_epc = new_epc;
+			return;
+		}
 	}
 
 	/*
 	 * Assume it would be too dangerous to continue ...
 	 */
+	printk(KERN_ALERT "%s bus error, epc == %08lx, ra == %08lx\n",
+	       data ? "Data" : "Instruction",
+	       regs->cp0_epc, regs->regs[31]);
+	die_if_kernel("Oops", regs);
 	force_sig(SIGBUS, current);
 }
 
-void do_ibe(struct pt_regs *regs)
+asmlinkage void do_ibe(struct pt_regs *regs)
 {
 	ibe_board_handler(regs);
 }
 
-void do_dbe(struct pt_regs *regs)
+asmlinkage void do_dbe(struct pt_regs *regs)
 {
 	dbe_board_handler(regs);
 }
 
-void do_ov(struct pt_regs *regs)
+asmlinkage void do_ov(struct pt_regs *regs)
 {
 	if (compute_return_epc(regs))
 		return;
-	force_sig(SIGFPE, current);
-}
-
-#ifdef CONFIG_MIPS_FPE_MODULE
-static void (*fpe_handler)(struct pt_regs *regs, unsigned int fcr31);
 
-/*
- * Register_fpe/unregister_fpe are for debugging purposes only.  To make
- * this hack work a bit better there is no error checking.
- */
-int register_fpe(void (*handler)(struct pt_regs *regs, unsigned int fcr31))
-{
-	fpe_handler = handler;
-	return 0;
-}
-
-int unregister_fpe(void (*handler)(struct pt_regs *regs, unsigned int fcr31))
-{
-	fpe_handler = NULL;
-	return 0;
+	force_sig(SIGFPE, current);
 }
-#endif
 
 /*
  * XXX Delayed fp exceptions when doing a lazy ctx switch XXX
  */
-void do_fpe(struct pt_regs *regs, unsigned long fcr31)
+asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
 {
-
-#ifdef CONFIG_MIPS_FPU_EMULATOR
-	if(!(mips_cpu.options & MIPS_CPU_FPU))
-		panic("Floating Point Exception with No FPU");
-#endif
-
-#ifdef CONFIG_MIPS_FPE_MODULE
-	if (fpe_handler != NULL) {
-		fpe_handler(regs, fcr31);
-		return;
-	}
-#endif
-
 	if (fcr31 & FPU_CSR_UNI_X) {
-#ifdef CONFIG_MIPS_FPU_EMULATOR
 		extern void save_fp(struct task_struct *);
 		extern void restore_fp(struct task_struct *);
 		int sig;
 		/*
 	 	 * Unimplemented operation exception.  If we've got the
-	 	 * Full software emulator on-board, let's use it...
+	 	 * full software emulator on-board, let's use it...
 		 *
 		 * Force FPU to dump state into task/thread context.
 		 * We're moving a lot of data here for what is probably
@@ -348,11 +353,11 @@
 		save_fp(current);
 	
 		/* Run the emulator */
-		sig = fpu_emulator_cop1Handler(0, regs);
+		sig = fpu_emulator_cop1Handler(regs);
 
 		/* 
 		 * We can't allow the emulated instruction to leave the
-		 * Unimplemented Operation bit set in the FCR31 fp-register.
+		 * Unimplemented Operation bit set in $fcr31.
 		 */
 		current->thread.fpu.soft.sr &= ~FPU_CSR_UNI_X;
 
@@ -362,37 +367,6 @@
 		/* If something went wrong, signal */
 		if (sig)
 			force_sig(sig, current);
-#else
-		/* Else use mini-emulator */
-
-		extern void simfp(int);
-		unsigned long pc;
-		unsigned int insn;
-
-		/* Retry instruction with flush to zero ...  */
-		if (!(fcr31 & (1<<24))) {
-			printk("Setting flush to zero for %s.\n",
-			       current->comm);
-			fcr31 &= ~FPU_CSR_UNI_X;
-			fcr31 |= (1<<24);
-			__asm__ __volatile__(
-				"ctc1\t%0,$31"
-				: /* No outputs */
-				: "r" (fcr31));
-			return;
-		}
-		pc = regs->cp0_epc + ((regs->cp0_cause & CAUSEF_BD) ? 4 : 0);
-		if(pc & 0x80000000) insn = *(unsigned int *)pc;
-		else if (get_user(insn, (unsigned int *)pc)) {
-			/* XXX Can this happen?  */
-			force_sig(SIGSEGV, current);
-		}
-
-		printk(KERN_DEBUG "Unimplemented exception for insn %08x at 0x%08lx in %s.\n",
-		       insn, regs->cp0_epc, current->comm);
-		simfp(MIPSInst(insn));
-		compute_return_epc(regs);
-#endif /* CONFIG_MIPS_FPU_EMULATOR */
 
 		return;
 	}
@@ -408,31 +382,31 @@
 {
 	unsigned int *epc;
 
-	epc = (unsigned int *) (unsigned long) regs->cp0_epc;
-	if (regs->cp0_cause & CAUSEF_BD)
-		epc++;
-
-	if (verify_area(VERIFY_READ, epc, 4)) {
-		force_sig(SIGSEGV, current);
-		return 1;
-	}
-	*opcode = *epc;
+	epc = (unsigned int *) regs->cp0_epc +
+	      ((regs->cp0_cause & CAUSEF_BD) != 0);
+	if (!get_user(*opcode, epc))
+		return 0;
 
-	return 0;
+	force_sig(SIGSEGV, current);
+	return 1;
 }
 
-void do_bp(struct pt_regs *regs)
+asmlinkage void do_bp(struct pt_regs *regs)
 {
 	siginfo_t info;
 	unsigned int opcode, bcode;
+	unsigned int *epc;
+
+	epc = (unsigned int *) regs->cp0_epc +
+	      ((regs->cp0_cause & CAUSEF_BD) != 0);
+	if (get_user(opcode, epc))
+		goto sigsegv;
 
 	/*
 	 * There is the ancient bug in the MIPS assemblers that the break
 	 * code starts left to bit 16 instead to bit 6 in the opcode.
 	 * Gas is bug-compatible ...
 	 */
-	if (get_insn_opcode(regs, &opcode))
-		return;
 	bcode = ((opcode >> 16) & ((1 << 20) - 1));
 
 	/*
@@ -456,15 +430,23 @@
 	default:
 		force_sig(SIGTRAP, current);
 	}
+	return;
+
+sigsegv:
+	force_sig(SIGSEGV, current);
 }
 
-void do_tr(struct pt_regs *regs)
+asmlinkage void do_tr(struct pt_regs *regs)
 {
 	siginfo_t info;
 	unsigned int opcode, bcode;
+	unsigned *epc;
+
+	epc = (unsigned int *) regs->cp0_epc +
+	      ((regs->cp0_cause & CAUSEF_BD) != 0);
+	if (get_user(opcode, epc))
+		goto sigsegv;
 
-	if (get_insn_opcode(regs, &opcode))
-		return;
 	bcode = ((opcode >> 6) & ((1 << 20) - 1));
 
 	/*
@@ -488,9 +470,13 @@
 	default:
 		force_sig(SIGTRAP, current);
 	}
+	return;
+
+sigsegv:
+	force_sig(SIGSEGV, current);
 }
 
-#if !defined(CONFIG_CPU_HAS_LLSC)
+#ifndef CONFIG_CPU_HAS_LLSC
 
 #ifdef CONFIG_SMP
 #error "ll/sc emulation is not SMP safe"
@@ -503,7 +489,7 @@
  * this implementation can handle only sychronization between 2 or more
  * user contexts and is not SMP safe.
  */
-void do_ri(struct pt_regs *regs)
+asmlinkage void do_ri(struct pt_regs *regs)
 {
 	unsigned int opcode;
 
@@ -520,9 +506,7 @@
 			return;
 		}
 	}
-	printk("[%s:%d] Illegal instruction %08lx at %08lx, ra=%08lx, CP0_STATUS=%08lx\n",
-	       current->comm, current->pid, *((unsigned long*)regs->cp0_epc), regs->cp0_epc,
-		regs->regs[31], regs->cp0_status);
+
 	if (compute_return_epc(regs))
 		return;
 	force_sig(SIGILL, current);
@@ -558,10 +542,6 @@
 
 	vaddr = (unsigned long *)((long)(regp->regs[(opcode & BASE) >> 21]) + offset);
 
-#ifdef DEBUG_LLSC
-	printk("ll: vaddr = 0x%08x, reg = %d\n", (unsigned int)vaddr, (opcode & RT) >> 16);
-#endif
-
 #ifdef CONFIG_PROC_FS
 	ll_ops++;
 #endif
@@ -604,10 +584,6 @@
 	vaddr = (unsigned long *)((long)(regp->regs[(opcode & BASE) >> 21]) + offset);
 	reg = (opcode & RT) >> 16;
 
-#ifdef DEBUG_LLSC
-	printk("sc: vaddr = 0x%08x, reg = %d\n", (unsigned int)vaddr, (unsigned int)reg);
-#endif
-
 #ifdef CONFIG_PROC_FS
 	sc_ops++;
 #endif
@@ -628,52 +604,33 @@
 
 #else /* MIPS 2 or higher */
 
-void do_ri(struct pt_regs *regs)
+asmlinkage void do_ri(struct pt_regs *regs)
 {
 	unsigned int opcode;
 
-        get_insn_opcode(regs, &opcode);
-	printk("[%s:%ld] Illegal instruction %08x at %08lx ra=%08lx\n",
-	       current->comm, (unsigned long)current->pid, opcode,
-	       regs->cp0_epc, regs->regs[31]);
+	get_insn_opcode(regs, &opcode);
 	if (compute_return_epc(regs))
 		return;
+
 	force_sig(SIGILL, current);
 }
 
 #endif
 
-void do_cpu(struct pt_regs *regs)
+asmlinkage void do_cpu(struct pt_regs *regs)
 {
 	unsigned int cpid;
-	extern void lazy_fpu_switch(void*);
+	extern void lazy_fpu_switch(void *);
 	extern void init_fpu(void);
-#ifdef CONFIG_MIPS_FPU_EMULATOR
 	void fpu_emulator_init_fpu(void);
 	int sig;
-#endif
+
 	cpid = (regs->cp0_cause >> CAUSEB_CE) & 3;
 	if (cpid != 1)
 		goto bad_cid;
 
-#ifdef CONFIG_MIPS_FPU_EMULATOR
-	if(!(mips_cpu.options & MIPS_CPU_FPU)) {
-	    if (last_task_used_math != current) {
-		if(!current->used_math) {
-		    fpu_emulator_init_fpu();
-		    current->used_math = 1;
-		}
-	    }
-	    sig = fpu_emulator_cop1Handler(0, regs);
-	    last_task_used_math = current;
-	    if(sig) {
-		force_sig(sig, current);
-	    }
-	    return;
-	}
-#else
-	if(!(mips_cpu.options & MIPS_CPU_FPU)) goto bad_cid;
-#endif
+	if (!(mips_cpu.options & MIPS_CPU_FPU))
+		goto fp_emul;
 
 	regs->cp0_status |= ST0_CU1;
 	if (last_task_used_math == current)
@@ -682,18 +639,30 @@
 	if (current->used_math) {		/* Using the FPU again.  */
 		lazy_fpu_switch(last_task_used_math);
 	} else {				/* First time FPU user.  */
-
 		init_fpu();
 		current->used_math = 1;
 	}
 	last_task_used_math = current;
 	return;
 
+fp_emul:
+	if (last_task_used_math != current) {
+		if (!current->used_math) {
+			fpu_emulator_init_fpu();
+			current->used_math = 1;
+		}
+	}
+	sig = fpu_emulator_cop1Handler(regs);
+	last_task_used_math = current;
+	if (sig)
+		force_sig(sig, current);
+	return;
+
 bad_cid:
 	force_sig(SIGILL, current);
 }
 
-void do_watch(struct pt_regs *regs)
+asmlinkage void do_watch(struct pt_regs *regs)
 {
 	/*
 	 * We use the watch exception where available to detect stack
@@ -703,14 +672,14 @@
 	panic("Caught WATCH exception - probably caused by stack overflow.");
 }
 
-void do_mcheck(struct pt_regs *regs)
+asmlinkage void do_mcheck(struct pt_regs *regs)
 {
 	show_regs(regs);
 	panic("Caught Machine Check exception - probably caused by multiple "
 	      "matching entries in the TLB.");
 }
 
-void do_reserved(struct pt_regs *regs)
+asmlinkage void do_reserved(struct pt_regs *regs)
 {
 	/*
 	 * Game over - no way to handle this if it ever occurs.  Most probably
@@ -723,34 +692,19 @@
 
 static inline void watch_init(void)
 {
-        if(mips_cpu.options & MIPS_CPU_WATCH ) {
-		(void)set_except_vector(23, handle_watch);
+	if (mips_cpu.options & MIPS_CPU_WATCH ) {
+		set_except_vector(23, handle_watch);
  		watch_available = 1;
  	}
 }
 
 /*
- * Some MIPS CPUs have a dedicated interrupt vector which reduces the
- * interrupt processing overhead.  Use it where available.
- */
-static inline void setup_dedicated_int(void)
-{
-	extern void except_vec4(void);
-
-	if(mips_cpu.options & MIPS_CPU_DIVEC) {
-		memcpy((void *)(KSEG0 + 0x200), except_vec4, 8);
-		set_cp0_cause(CAUSEF_IV);
-		dedicated_iv_available = 1;
-	}
-}
-
-/*
- * Some MIPS CPUs can enable/disable for cache parity detection, but does
+ * Some MIPS CPUs can enable/disable for cache parity detection, but do
  * it different ways.
  */
 static inline void parity_protection_init(void)
 {
-	switch(mips_cpu.cputype) {
+	switch (mips_cpu.cputype) {
 	case CPU_5KC:
 		/* Set the PE bit (bit 31) in the CP0_ECC register. */
 		printk(KERN_INFO "Enable the cache parity protection for "
@@ -764,38 +718,39 @@
 	}
 }
 
-void cache_parity_error(void)
+asmlinkage void cache_parity_error(void)
 {
-        unsigned int reg_val;
+	unsigned int reg_val;
 
-        /* For the moment, report the problem and hang. */
-        reg_val = read_32bit_cp0_register(CP0_ERROREPC);
+	/* For the moment, report the problem and hang. */
+	reg_val = read_32bit_cp0_register(CP0_ERROREPC);
 	printk("Cache error exception:\n");
 	printk("cp0_errorepc == %08x\n", reg_val);
 	reg_val = read_32bit_cp0_register(CP0_CACHEERR);
 	printk("cp0_cacheerr == %08x\n", reg_val);
 
 	printk("Decoded CP0_CACHEERR: %s cache fault in %s reference.\n",
-	       reg_val&(1<<30)?"secondary":"primary",
-	       reg_val&(1<<31)?"data":"insn");
+	       reg_val & (1<<30) ? "secondary" : "primary",
+	       reg_val & (1<<31) ? "data" : "insn");
 	printk("Error bits: %s%s%s%s%s%s%s\n",
-	       reg_val&(1<<29)?"ED ":"",
-	       reg_val&(1<<28)?"ET ":"",
-	       reg_val&(1<<26)?"EE ":"",
-	       reg_val&(1<<25)?"EB ":"",
-	       reg_val&(1<<24)?"EI ":"",
-	       reg_val&(1<<23)?"E1 ":"",
-	       reg_val&(1<<22)?"E0 ":"");
-	printk("IDX: 0x%08x\n", reg_val&((1<<22)-1));
+	       reg_val & (1<<29) ? "ED " : "",
+	       reg_val & (1<<28) ? "ET " : "",
+	       reg_val & (1<<26) ? "EE " : "",
+	       reg_val & (1<<25) ? "EB " : "",
+	       reg_val & (1<<24) ? "EI " : "",
+	       reg_val & (1<<23) ? "E1 " : "",
+	       reg_val & (1<<22) ? "E0 " : "");
+	printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1));
 
 	if (reg_val&(1<<22))
-		printk("DErrAddr0: 0x%08x\n", read_32bit_cp0_set1_register(CP0_S1_DERRADDR0));
+		printk("DErrAddr0: 0x%08x\n",
+		       read_32bit_cp0_set1_register(CP0_S1_DERRADDR0));
 
 	if (reg_val&(1<<23))
-		printk("DErrAddr1: 0x%08x\n", read_32bit_cp0_set1_register(CP0_S1_DERRADDR1));
+		printk("DErrAddr1: 0x%08x\n",
+		       read_32bit_cp0_set1_register(CP0_S1_DERRADDR1));
 
-
-	panic("Can't handle the cache error - panic!");
+	panic("Can't handle the cache error!");
 }
 
 unsigned long exception_handlers[32];
@@ -810,7 +765,8 @@
 	unsigned handler = (unsigned long) addr;
 	unsigned old_handler = exception_handlers[n];
 	exception_handlers[n] = handler;
-	if (n == 0 && dedicated_iv_available) {
+
+	if (n == 0 && mips_cpu.options & MIPS_CPU_DIVEC) {
 		*(volatile u32 *)(KSEG0+0x200) = 0x08000000 |
 		                                 (0x03ffffff & (handler >> 2));
 		flush_icache_range(KSEG0+0x200, KSEG0 + 0x204);
@@ -823,10 +779,8 @@
 extern asmlinkage int _save_fp_context(struct sigcontext *sc);
 extern asmlinkage int _restore_fp_context(struct sigcontext *sc);
 
-#ifdef CONFIG_MIPS_FPU_EMULATOR
 extern asmlinkage int fpu_emulator_save_context(struct sigcontext *sc);
 extern asmlinkage int fpu_emulator_restore_context(struct sigcontext *sc);
-#endif
 
 void __init trap_init(void)
 {
@@ -834,13 +788,10 @@
 	extern char except_vec0_r4600, except_vec0_r2300;
 	extern char except_vec1_generic, except_vec2_generic;
 	extern char except_vec3_generic, except_vec3_r4000;
+	extern char except_vec4;
 	extern char except_vec_ejtag_debug;
 	unsigned long i;
 
-	if(mips_machtype == MACH_MIPS_MAGNUM_4000 ||
-	   mips_machtype == MACH_SNI_RM200_PCI)
-		EISA_bus = 1;
-
 	/* Some firmware leaves the BEV flag set, clear it.  */
 	clear_cp0_status(ST0_BEV);
 
@@ -852,8 +803,8 @@
 	/*
 	 * Setup default vectors
 	 */
-	for(i = 0; i <= 31; i++)
-		(void)set_except_vector(i, handle_reserved);
+	for (i = 0; i <= 31; i++)
+		set_except_vector(i, handle_reserved);
 
 	/* 
 	 * Copy the EJTAG debug exception vector handler code to it's final 
@@ -866,7 +817,15 @@
 	 * interrupt vector.
 	 */
 	watch_init();
-	setup_dedicated_int();
+
+	/*
+	 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
+	 * interrupt processing overhead.  Use it where available.
+	 */
+	if (mips_cpu.options & MIPS_CPU_DIVEC) {
+		memcpy((void *)(KSEG0 + 0x200), &except_vec4, 8);
+		set_cp0_cause(CAUSEF_IV);
+	}
 
 	/*
 	 * Some CPUs can enable/disable for cache parity detection, but does
@@ -874,35 +833,38 @@
 	 */
 	parity_protection_init();
 
-	(void)set_except_vector(1, handle_mod);
-	(void)set_except_vector(2, handle_tlbl);
-	(void)set_except_vector(3, handle_tlbs);
-	(void)set_except_vector(4, handle_adel);
-	(void)set_except_vector(5, handle_ades);
+	set_except_vector(1, handle_mod);
+	set_except_vector(2, handle_tlbl);
+	set_except_vector(3, handle_tlbs);
+	set_except_vector(4, handle_adel);
+	set_except_vector(5, handle_ades);
+
 	/*
 	 * The Data Bus Error/ Instruction Bus Errors are signaled
 	 * by external hardware.  Therefore these two expection have
 	 * board specific handlers.
 	 */
-	(void)set_except_vector(6, handle_ibe);
-	(void)set_except_vector(7, handle_dbe);
+	set_except_vector(6, handle_ibe);
+	set_except_vector(7, handle_dbe);
 	ibe_board_handler = default_be_board_handler;
 	dbe_board_handler = default_be_board_handler;
 
-	(void)set_except_vector(8, handle_sys);
-	(void)set_except_vector(9, handle_bp);
-	(void)set_except_vector(10, handle_ri);
-	(void)set_except_vector(11, handle_cpu);
-	(void)set_except_vector(12, handle_ov);
-	(void)set_except_vector(13, handle_tr);
-	(void)set_except_vector(15, handle_fpe);
-	
+	set_except_vector(8, handle_sys);
+	set_except_vector(9, handle_bp);
+	set_except_vector(10, handle_ri);
+	set_except_vector(11, handle_cpu);
+	set_except_vector(12, handle_ov);
+	set_except_vector(13, handle_tr);
+
+	if (mips_cpu.options & MIPS_CPU_FPU)
+		set_except_vector(15, handle_fpe);
+
 	/*
 	 * Handling the following exceptions depends mostly of the cpu type
 	 */
 	if ((mips_cpu.options & MIPS_CPU_4KEX)
 	    && (mips_cpu.options & MIPS_CPU_4KTLB)) {
-		if(mips_cpu.cputype == CPU_NEVADA) {
+		if (mips_cpu.cputype == CPU_NEVADA) {
 			memcpy((void *)KSEG0, &except_vec0_nevada, 0x80);
 		} else if (mips_cpu.cputype == CPU_R4600)
 			memcpy((void *)KSEG0, &except_vec0_r4600, 0x80);
@@ -919,36 +881,25 @@
 			       0x80);
 		}
 
-		if(mips_cpu.options & MIPS_CPU_FPU) {
+		if (mips_cpu.options & MIPS_CPU_FPU) {
 		        save_fp_context = _save_fp_context;
 			restore_fp_context = _restore_fp_context;
-#ifdef CONFIG_MIPS_FPU_EMULATOR
 		} else {
 		        save_fp_context = fpu_emulator_save_context;
 			restore_fp_context = fpu_emulator_restore_context;
-#endif
 		}
-	} else switch(mips_cpu.cputype) {
-	case CPU_R10000:
-		/*
-		 * The R10000 is in most aspects similar to the R4400.  It
-		 * should get some special optimizations.
-		 */
-		write_32bit_cp0_register(CP0_FRAMEMASK, 0);
-		set_cp0_status(ST0_XX);
+	} else switch (mips_cpu.cputype) {
+	case CPU_SB1:
 		/*
-		 * The R10k might even work for Linux/MIPS - but we're paranoid
-		 * and refuse to run until this is tested on real silicon
+		 * XXX - This should be folded in to the "cleaner" handling,
+		 * above
 		 */
-		panic("CPU too expensive - making holiday in the ANDES!");
-		break;
-	case CPU_SB1:
-		/* XXX - This should be folded in to the "cleaner" handling, above */
 		memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
 		memcpy((void *)(KSEG0 + 0x180), &except_vec3_r4000, 0x80);
 		save_fp_context = _save_fp_context;
 		restore_fp_context = _restore_fp_context;
-		/* Enable timer interrupt and scd mapped interrupt in status register */
+
+		/* Enable timer interrupt and scd mapped interrupt */
 		clear_cp0_status(0xf000);
 		set_cp0_status(0xc00);
 		break;
@@ -983,17 +934,15 @@
 		memcpy((void *)KSEG0, &except_vec0_r2300, 0x80);
 		memcpy((void *)(KSEG0 + 0x80), &except_vec3_generic, 0x80);
 		break;
-	case CPU_R8000:
-		printk("Detected unsupported CPU type %s.\n",
-			cpu_names[mips_cpu.cputype]);
-		panic("Can't handle CPU");
-		break;
 
 	case CPU_UNKNOWN:
 	default:
 		panic("Unknown CPU type");
 	}
 	flush_icache_range(KSEG0, KSEG0 + 0x200);
+
+	if (mips_cpu.isa_level == MIPS_CPU_ISA_IV)
+		set_cp0_status(ST0_XX);
 
 	atomic_inc(&init_mm.mm_count);	/* XXX  UP?  */
 	current->active_mm = &init_mm;
diff -urN linux-2.4.10-pre6/arch/mips/kernel/unaligned.c linux/arch/mips/kernel/unaligned.c
--- linux-2.4.10-pre6/arch/mips/kernel/unaligned.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/kernel/unaligned.c	Mon Dec  3 23:08:45 2001
@@ -72,6 +72,7 @@
  *       A store crossing a page boundary might be executed only partially.
  *       Undo the partial store in this case.
  */
+#include <linux/config.h>
 #include <linux/mm.h>
 #include <linux/signal.h>
 #include <linux/smp.h>
@@ -378,26 +379,26 @@
 	return;
 }
 
+#ifdef CONFIG_PROC_FS
 unsigned long unaligned_instructions;
+#endif
 
 asmlinkage void do_ade(struct pt_regs *regs)
 {
 	unsigned long pc;
-#ifdef CONFIG_MIPS_FPU_EMULATOR
-        extern int do_dsemulret(struct pt_regs *);
+	extern int do_dsemulret(struct pt_regs *);
+
+	/* 
+	 * Address errors may be deliberately induced
+	 * by the FPU emulator to take retake control
+	 * of the CPU after executing the instruction
+	 * in the delay slot of an emulated branch.
+	 */
 
-        /* 
-         * Address errors may be deliberately induced
-         * by the FPU emulator to take retake control
-         * of the CPU after executing the instruction
-         * in the delay slot of an emulated branch.
-         */
-
-        if((unsigned long)regs->cp0_epc == current->thread.dsemul_aerpc) {
-                (void)do_dsemulret(regs);
-                return;
-        }
-#endif /* CONFIG_MIPS_FPU_EMULATOR */
+	if ((unsigned long)regs->cp0_epc == current->thread.dsemul_aerpc) {
+		do_dsemulret(regs);
+		return;
+	}
 
 	/*
 	 * Did we catch a fault trying to load an instruction?
@@ -414,7 +415,9 @@
 		goto sigbus;
 
 	emulate_load_store_insn(regs, regs->cp0_badvaddr, pc);
+#ifdef CONFIG_PROC_FS
 	unaligned_instructions++;
+#endif
 
 	return;
 
diff -urN linux-2.4.10-pre6/arch/mips/lib/ide-std.c linux/arch/mips/lib/ide-std.c
--- linux-2.4.10-pre6/arch/mips/lib/ide-std.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/lib/ide-std.c	Mon Dec  3 23:08:45 2001
@@ -1,12 +1,11 @@
-/* $Id: ide-std.c,v 1.4 1999/06/11 14:29:45 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
  * IDE routines for typical pc-like standard configurations.
  *
- * Copyright (C) 1998, 1999 by Ralf Baechle
+ * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
  */
 #include <linux/sched.h>
 #include <linux/ide.h>
@@ -60,6 +59,7 @@
 	}
 	if (irq != NULL)
 		*irq = 0;
+	hw->io_ports[IDE_IRQ_OFFSET] = 0;
 }
 
 static int std_ide_request_irq(unsigned int irq,
diff -urN linux-2.4.10-pre6/arch/mips/lib/memcpy.S linux/arch/mips/lib/memcpy.S
--- linux-2.4.10-pre6/arch/mips/lib/memcpy.S	Tue Dec  5 23:15:12 2000
+++ linux/arch/mips/lib/memcpy.S	Mon Dec  3 23:08:45 2001
@@ -402,16 +402,20 @@
 
 	.align	5
 LEAF(memmove)
-	sltu	t0, a0, a1			# dst < src -> memcpy
-	bnez	t0, memcpy
-	 addu	v0, a0, a2
-	sltu	t0, v0, a1			# dst + len < src -> non-
-	bnez	t0, __memcpy			# overlapping, can use memcpy
+	addu	t0, a0, a2
+	sltu	t0, a1, t0			# dst + len <= src -> memcpy
+	addu	t1, a1, a2
+	sltu	t1, a0, t1			# dst >= src + len -> memcpy
+	and	t0, t1
+	beqz	t0, __memcpy
 	 move	v0, a0				/* return value */
 	beqz	a2, r_out
 	END(memmove)
 
 LEAF(__rmemcpy)					/* a0=dst a1=src a2=len */
+	sltu	t0, a1, a0
+	beqz	t0, r_end_bytes_up		# src >= dst
+	 nop
 	addu	a0, a2				# dst = dst + len
 	addu	a1, a2				# src = src + len
 
@@ -563,6 +567,17 @@
 	 subu	a0, a0, 0x1
 
 r_out:
+	jr	ra
+	 move	a2, zero
+
+r_end_bytes_up:
+	lb	t0, (a1)
+	subu	a2, a2, 0x1
+	sb	t0, (a0)
+	addu	a1, a1, 0x1
+	bnez	a2, r_end_bytes_up
+	 addu	a0, a0, 0x1
+
 	jr	ra
 	 move	a2, zero
 
diff -urN linux-2.4.10-pre6/arch/mips/math-emu/cp1emu.c linux/arch/mips/math-emu/cp1emu.c
--- linux-2.4.10-pre6/arch/mips/math-emu/cp1emu.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/math-emu/cp1emu.c	Mon Dec  3 23:08:45 2001
@@ -5,7 +5,8 @@
  * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
  * http://www.algor.co.uk
  *
- * ########################################################################
+ * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000  MIPS Technologies, Inc.
  *
  *  This program is free software; you can distribute it and/or modify it
  *  under the terms of the GNU General Public License (Version 2) as
@@ -20,8 +21,6 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  *
- * ########################################################################
- *
  * A complete emulator for MIPS coprocessor 1 instructions.  This is
  * required for #float(switch) or #float(trap), where it catches all
  * COP1 instructions via the "CoProcessor Unusable" exception.  
@@ -32,24 +31,9 @@
  * quite nasty because emulation of some non-COP1 instructions is
  * required, e.g. in branch delay slots.
  * 
- * Notes: 
- *  1) the IEEE754 library (-le) performs the actual arithmetic;
- *  2) if you know that you won't have an fpu, then you'll get much 
- *     better performance by compiling with -msoft-float!  */
-
-/**************************************************************************
- *  Nov 7, 2000
- *  Massive changes to integrate with Linux kernel.
- *
- *  Replace use of kernel data area with use of user stack 
- *  for execution of instructions in branch delay slots.
- *
- *  Replace use of static kernel variables with thread_struct elements.
- *
- *  Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- *  Copyright (C) 2000  MIPS Technologies, Inc.  All rights reserved.
- *************************************************************************/
-#include <linux/config.h>
+ * Note if you know that you won't have an fpu, then you'll get much 
+ * better performance by compiling with -msoft-float!
+ */
 #include <linux/mm.h>
 #include <linux/signal.h>
 #include <linux/smp.h>
@@ -57,7 +41,9 @@
 
 #include <asm/asm.h>
 #include <asm/branch.h>
+#include <asm/bootinfo.h>
 #include <asm/byteorder.h>
+#include <asm/cpu.h>
 #include <asm/inst.h>
 #include <asm/uaccess.h>
 #include <asm/processor.h>
@@ -181,19 +167,17 @@
 #define REG_TO_VA (vaddr_t)
 #define VA_TO_REG (unsigned long)
 
-static unsigned long
-mips_get_word(struct pt_regs *xcp, void *va, int *perr)
+static unsigned long mips_get_word(struct pt_regs *xcp, void *va, int *perr)
 {
 	unsigned long temp;
 
 	if (!user_mode(xcp)) {
 		*perr = 0;
 		return (*(unsigned long *) va);
-	} else {
-		/* Use kernel get_user() macro */
-		*perr = (int) get_user(temp, (unsigned long *) va);
-		return temp;
 	}
+
+	*perr = (int) get_user(temp, (unsigned long *) va);
+	return temp;
 }
 
 static unsigned long long
@@ -204,11 +188,10 @@
 	if (!user_mode(xcp)) {
 		*perr = 0;
 		return (*(unsigned long long *) va);
-	} else {
-		/* Use kernel get_user() macro */
-		*perr = (int) get_user(temp, (unsigned long long *) va);
-		return temp;
 	}
+
+	*perr = (int) get_user(temp, (unsigned long long *) va);
+	return temp;
 }
 
 static int mips_put_word(struct pt_regs *xcp, void *va, unsigned long val)
@@ -216,10 +199,9 @@
 	if (!user_mode(xcp)) {
 		*(unsigned long *) va = val;
 		return 0;
-	} else {
-		/* Use kernel get_user() macro */
-		return (int) put_user(val, (unsigned long *) va);
 	}
+
+	return put_user(val, (unsigned long *) va);
 }
 
 static int mips_put_dword(struct pt_regs *xcp, void *va, long long val)
@@ -227,10 +209,9 @@
 	if (!user_mode(xcp)) {
 		*(unsigned long long *) va = val;
 		return 0;
-	} else {
-		/* Use kernel get_user() macro */
-		return (int) put_user(val, (unsigned long long *) va);
 	}
+
+	return put_user(val, (unsigned long long *) va);
 }
 
 
@@ -249,9 +230,7 @@
  * Two instructions if the instruction is in a branch delay slot.
  */
 
-static int
-cop1Emulate(int xcptno, struct pt_regs *xcp,
-	    struct mips_fpu_soft_struct *ctx)
+static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
 {
 	mips_instruction ir;
 	vaddr_t emulpc;
@@ -259,7 +238,6 @@
 	unsigned int cond;
 	int err = 0;
 
-
 	ir = mips_get_word(xcp, REG_TO_VA xcp->cp0_epc, &err);
 	if (err) {
 		fpuemuprivate.stats.errors++;
@@ -303,7 +281,7 @@
 		contpc = REG_TO_VA xcp->cp0_epc + 4;
 	}
 
-      emul:
+emul:
 	fpuemuprivate.stats.emulated++;
 	switch (MIPSInst_OPCODE(ir)) {
 #ifdef CP0_STATUS_FR_SUPPORT
@@ -491,9 +469,8 @@
 			}
 			break;
 
-		case dmtc_op:
+		case dmtc_op: {
 			/* copregister fs <- rt */
-			{
 				fpureg_t value;
 				int fs = MIPSInst_RD(ir);
 				if (!(xcp->cp0_status & ST0_FR))
@@ -502,8 +479,8 @@
 				    (MIPSInst_RT(ir) ==
 				     0) ? 0 : xcp->regs[MIPSInst_RT(ir)];
 				ctx->regs[fs] = value;
-			}
 			break;
+		}
 #endif
 
 		case mfc_op:
@@ -638,95 +615,92 @@
 			}
 			break;
 
-		case bc_op:
-			if (xcp->cp0_cause & CAUSEF_BD) {
+		case bc_op: {
+			int likely = 0;
+
+			if (xcp->cp0_cause & CAUSEF_BD)
 				return SIGILL;
-			}
-			{
-				int likely = 0;
 
 #if __mips >= 4
-				cond =
-				    ctx->
-				    sr & fpucondbit[MIPSInst_RT(ir) >> 2];
+			cond = ctx-> sr & fpucondbit[MIPSInst_RT(ir) >> 2];
 #else
-				cond = ctx->sr & FPU_CSR_COND;
+			cond = ctx->sr & FPU_CSR_COND;
 #endif
-				switch (MIPSInst_RT(ir) & 3) {
-				case bcfl_op:
-					likely = 1;
-				case bcf_op:
-					cond = !cond;
-					break;
-				case bctl_op:
-					likely = 1;
-				case bct_op:
-					break;
-				default:
-					/* thats an illegal instruction */
-					return SIGILL;
-				}
+			switch (MIPSInst_RT(ir) & 3) {
+			case bcfl_op:
+				likely = 1;
+			case bcf_op:
+				cond = !cond;
+				break;
+			case bctl_op:
+				likely = 1;
+			case bct_op:
+				break;
+			default:
+				/* thats an illegal instruction */
+				return SIGILL;
+			}
 
-				xcp->cp0_cause |= CAUSEF_BD;
-				if (cond) {
-					/* branch taken: emulate dslot instruction */
-					xcp->cp0_epc += 4;
-					contpc =
-					    REG_TO_VA xcp->cp0_epc +
-					    (MIPSInst_SIMM(ir) << 2);
-
-					ir =
-					    mips_get_word(xcp,
-							  REG_TO_VA(xcp->
-								    cp0_epc),
-							  &err);
-					if (err) {
-						fpuemuprivate.stats.
-						    errors++;
-						return SIGBUS;
-					}
+			xcp->cp0_cause |= CAUSEF_BD;
+			if (cond) {
+				/* branch taken: emulate dslot instruction */
+				xcp->cp0_epc += 4;
+				contpc = REG_TO_VA xcp->cp0_epc +
+				         (MIPSInst_SIMM(ir) << 2);
+
+				ir = mips_get_word(xcp, REG_TO_VA(xcp->cp0_epc),
+				      &err);
+				if (err) {
+					fpuemuprivate.stats.errors++;
+					return SIGBUS;
+				}
 
-					switch (MIPSInst_OPCODE(ir)) {
-					case lwc1_op:
-					case swc1_op:
+				switch (MIPSInst_OPCODE(ir)) {
+				case lwc1_op:
+				case swc1_op:
 #if (__mips >= 2 || __mips64) && !defined(SINGLE_ONLY_FPU)
-					case ldc1_op:
-					case sdc1_op:
+				case ldc1_op:
+				case sdc1_op:
 #endif
-					case cop1_op:
+				case cop1_op:
 #if __mips >= 4 && __mips != 32
-					case cop1x_op:
+				case cop1x_op:
 #endif
-						/* its one of ours */
-						goto emul;
+					/* its one of ours */
+					goto emul;
 #if __mips >= 4
-					case spec_op:
-						if (MIPSInst_FUNC(ir) ==
-						    movc_op) goto emul;
-						break;
+				case spec_op:
+					if (MIPSInst_FUNC(ir) == movc_op)
+						goto emul;
+					break;
 #endif
-					}
+				}
 
-					/* single step the non-cp1 instruction in the dslot */
-					return mips_dsemul(xcp, ir,
-							   contpc);
-				} else {
-					/* branch not taken */
-					if (likely)
-						/* branch likely nullifies dslot if not taken */
-						xcp->cp0_epc += 4;
+				/*
+				 * Single step the non-cp1 instruction in the
+				 * dslot
+				 */
+				return mips_dsemul(xcp, ir, contpc);
+			} else {
+				/* branch not taken */
+				if (likely)
+					/*
+					 * branch likely nullifies dslot if not
+					 * taken
+					 */
+					xcp->cp0_epc += 4;
 					/* else continue & execute dslot as normal insn */
-				}
 			}
 			break;
+		}
 
-		default:
-			if (!(MIPSInst_RS(ir) & 0x10)) {
+		default: {
+			int sig;
+
+			if (!(MIPSInst_RS(ir) & 0x10))
 				return SIGILL;
-			}
+
 			/* a real fpu computation instruction */
-			{
-				int sig;
 				if ((sig = fpu_emu(xcp, ctx, ir)))
 					return sig;
 			}
@@ -822,14 +796,15 @@
 	 */
 	dsemul_insns = (mips_instruction *) (xcp->regs[29] & ~3);
 	dsemul_insns -= 3;	/* Two instructions, plus one for luck ;-) */
+
 	/* Verify that the stack pointer is not competely insane */
-	if (verify_area
-	    (VERIFY_WRITE, dsemul_insns, sizeof(mips_instruction) * 2))
+	if (verify_area(VERIFY_WRITE, dsemul_insns,
+	                sizeof(mips_instruction) * 2))
 		return SIGBUS;
 
 	if (mips_put_word(xcp, &dsemul_insns[0], ir)) {
 		fpuemuprivate.stats.errors++;
-		return (SIGBUS);
+		return SIGBUS;
 	}
 
 	/* 
@@ -856,11 +831,8 @@
 	current->thread.dsemul_epc = (unsigned long) cpc;
 	current->thread.dsemul_aerpc = (unsigned long) &dsemul_insns[1];
 	xcp->cp0_epc = VA_TO_REG & dsemul_insns[0];
+	flush_cache_sigtramp((unsigned long) dsemul_insns);
 
-	/* What we'd really like to do is just flush the line(s) of the */
-	/* icache containing the dsemulret instructions, but there's no */
-	/* mechanism to do this yet...  */
-	flush_cache_all();
 	return SIGILL;		/* force out of emulation loop */
 }
 
@@ -971,9 +943,8 @@
 	return ieee754sp_neg(ieee754sp_sub(ieee754sp_mul(s, t), r));
 }
 
-static int
-fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
-	 mips_instruction ir)
+static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
+                    mips_instruction ir)
 {
 	unsigned rcsr = 0;	/* resulting csr */
 
@@ -1226,9 +1197,8 @@
 /*
  * Emulate a single COP1 arithmetic instruction.
  */
-static int
-fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
-	mips_instruction ir)
+static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
+                   mips_instruction ir)
 {
 	int rfmt;		/* resulting format */
 	unsigned rcsr = 0;	/* resulting csr */
@@ -1244,8 +1214,7 @@
 
 	fpuemuprivate.stats.cp1ops++;
 	switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
-
-	case s_fmt:{		/* 0 */
+	case s_fmt: {		/* 0 */
 		ieee754sp(*handler) ();
 
 		switch (MIPSInst_FUNC(ir)) {
@@ -1342,73 +1311,68 @@
 				/* unary conv ops */
 		case fcvts_op:
 			return SIGILL;	/* not defined */
-		case fcvtd_op:
-#if defined(SINGLE_ONLY_FPU)
+		case fcvtd_op: {
+#ifdef SINGLE_ONLY_FPU
 			return SIGILL;	/* not defined */
 #else
-			{
-				ieee754sp fs;
+			ieee754sp fs;
 
-				SPFROMREG(fs, MIPSInst_FS(ir));
-				rv.d = ieee754dp_fsp(fs);
-				rfmt = d_fmt;
-				goto copcsr;
-			}
+			SPFROMREG(fs, MIPSInst_FS(ir));
+			rv.d = ieee754dp_fsp(fs);
+			rfmt = d_fmt;
+			goto copcsr;
+		}
 #endif
-		case fcvtw_op:
-			{
-				ieee754sp fs;
+		case fcvtw_op: {
+			ieee754sp fs;
 
-				SPFROMREG(fs, MIPSInst_FS(ir));
-				rv.w = ieee754sp_tint(fs);
-				rfmt = w_fmt;
-				goto copcsr;
-			}
+			SPFROMREG(fs, MIPSInst_FS(ir));
+			rv.w = ieee754sp_tint(fs);
+			rfmt = w_fmt;
+			goto copcsr;
+		}
 
 #if __mips >= 2 || __mips64
 		case fround_op:
 		case ftrunc_op:
 		case fceil_op:
-		case ffloor_op:
-			{
-				unsigned int oldrm = ieee754_csr.rm;
-				ieee754sp fs;
-
-				SPFROMREG(fs, MIPSInst_FS(ir));
-				ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
-				rv.w = ieee754sp_tint(fs);
-				ieee754_csr.rm = oldrm;
-				rfmt = w_fmt;
-				goto copcsr;
-			}
-#endif			/* __mips >= 2 */
+		case ffloor_op: {
+			unsigned int oldrm = ieee754_csr.rm;
+			ieee754sp fs;
+
+			SPFROMREG(fs, MIPSInst_FS(ir));
+			ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
+			rv.w = ieee754sp_tint(fs);
+			ieee754_csr.rm = oldrm;
+			rfmt = w_fmt;
+			goto copcsr;
+		}
+#endif /* __mips >= 2 */
 
 #if __mips64 && !defined(SINGLE_ONLY_FPU)
-		case fcvtl_op:
-			{
-				ieee754sp fs;
+		case fcvtl_op: {
+			ieee754sp fs;
 
-				SPFROMREG(fs, MIPSInst_FS(ir));
-				rv.l = ieee754sp_tlong(fs);
-				rfmt = l_fmt;
-				goto copcsr;
-			}
+			SPFROMREG(fs, MIPSInst_FS(ir));
+			rv.l = ieee754sp_tlong(fs);
+			rfmt = l_fmt;
+			goto copcsr;
+		}
 
 		case froundl_op:
 		case ftruncl_op:
 		case fceill_op:
-		case ffloorl_op:
-			{
-				unsigned int oldrm = ieee754_csr.rm;
-				ieee754sp fs;
-
-				SPFROMREG(fs, MIPSInst_FS(ir));
-				ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
-				rv.l = ieee754sp_tlong(fs);
-				ieee754_csr.rm = oldrm;
-				rfmt = l_fmt;
-				goto copcsr;
-			}
+		case ffloorl_op: {
+			unsigned int oldrm = ieee754_csr.rm;
+			ieee754sp fs;
+
+			SPFROMREG(fs, MIPSInst_FS(ir));
+			ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
+			rv.l = ieee754sp_tlong(fs);
+			ieee754_csr.rm = oldrm;
+			rfmt = l_fmt;
+			goto copcsr;
+		}
 #endif /* __mips64 && !fpu(single) */
 
 		default:
@@ -1484,9 +1448,11 @@
 		case fabs_op:
 			handler = ieee754dp_abs;
 			goto dcopuop;
+
 		case fneg_op:
 			handler = ieee754dp_neg;
 			goto dcopuop;
+
 		case fmov_op:
 			/* an easy one */
 			DPFROMREG(rv.d, MIPSInst_FS(ir));
@@ -1513,71 +1479,67 @@
 			}
 
 		/* unary conv ops */
-		case fcvts_op:
-			{
-				ieee754dp fs;
+		case fcvts_op: {
+			ieee754dp fs;
 
-				DPFROMREG(fs, MIPSInst_FS(ir));
-				rv.s = ieee754sp_fdp(fs);
-				rfmt = s_fmt;
-				goto copcsr;
-			}
+			DPFROMREG(fs, MIPSInst_FS(ir));
+			rv.s = ieee754sp_fdp(fs);
+			rfmt = s_fmt;
+			goto copcsr;
+		}
 		case fcvtd_op:
 			return SIGILL;	/* not defined */
-		case fcvtw_op:
-			{
-				ieee754dp fs;
 
-				DPFROMREG(fs, MIPSInst_FS(ir));
-				rv.w = ieee754dp_tint(fs);	/* wrong */
-				rfmt = w_fmt;
-				goto copcsr;
-			}
+		case fcvtw_op: {
+			ieee754dp fs;
+
+			DPFROMREG(fs, MIPSInst_FS(ir));
+			rv.w = ieee754dp_tint(fs);	/* wrong */
+			rfmt = w_fmt;
+			goto copcsr;
+		}
 
 #if __mips >= 2 || __mips64
 		case fround_op:
 		case ftrunc_op:
 		case fceil_op:
-		case ffloor_op:
-			{
-				unsigned int oldrm = ieee754_csr.rm;
-				ieee754dp fs;
-
-				DPFROMREG(fs, MIPSInst_FS(ir));
-				ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
-				rv.w = ieee754dp_tint(fs);
-				ieee754_csr.rm = oldrm;
-				rfmt = w_fmt;
-				goto copcsr;
-			}
+		case ffloor_op: {
+			unsigned int oldrm = ieee754_csr.rm;
+			ieee754dp fs;
+
+			DPFROMREG(fs, MIPSInst_FS(ir));
+			ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
+			rv.w = ieee754dp_tint(fs);
+			ieee754_csr.rm = oldrm;
+			rfmt = w_fmt;
+			goto copcsr;
+		}
 #endif
 
 #if __mips64 && !defined(SINGLE_ONLY_FPU)
-		case fcvtl_op:
-			{
-				ieee754dp fs;
+		case fcvtl_op: {
+			ieee754dp fs;
 
-				DPFROMREG(fs, MIPSInst_FS(ir));
-				rv.l = ieee754dp_tlong(fs);
-				rfmt = l_fmt;
-				goto copcsr;
-			}
+			DPFROMREG(fs, MIPSInst_FS(ir));
+			rv.l = ieee754dp_tlong(fs);
+			rfmt = l_fmt;
+			goto copcsr;
+		}
 
 		case froundl_op:
 		case ftruncl_op:
 		case fceill_op:
-		case ffloorl_op:
-			{
-				unsigned int oldrm = ieee754_csr.rm;
-				ieee754dp fs;
-
-				DPFROMREG(fs, MIPSInst_FS(ir));
-				ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
-				rv.l = ieee754dp_tlong(fs);
-				ieee754_csr.rm = oldrm;
-				rfmt = l_fmt;
-				goto copcsr;
-			}
+		case ffloorl_op: {
+			unsigned int oldrm = ieee754_csr.rm;
+			ieee754dp fs;
+
+			DPFROMREG(fs, MIPSInst_FS(ir));
+			ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
+			rv.l = ieee754dp_tlong(fs);
+			ieee754_csr.rm = oldrm;
+			rfmt = l_fmt;
+			goto copcsr;
+		}
 #endif /* __mips >= 3 && !fpu(single) */
 
 		default:
@@ -1598,7 +1560,7 @@
 		}
 		break;
 	}
-#endif				/* !defined(SINGLE_ONLY_FPU) */
+#endif /* !defined(SINGLE_ONLY_FPU) */
 
 	case w_fmt: {
 		switch (MIPSInst_FUNC(ir)) {
@@ -1698,12 +1660,11 @@
 
 
 /*
- * Emulate the floating point instruction at EPC, and continue
- * to run until we hit a non-fp instruction, or a backward
- * branch.  This cuts down dramatically on the per instruction 
- * exception overhead.
+ * Emulate the floating point instruction at EPC, and continue to run until we
+ * hit a non-fp instruction, or a backward branch.  This cuts down dramatically
+ * on the per instruction exception overhead.
  */
-int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp)
+int fpu_emulator_cop1Handler(struct pt_regs *xcp)
 {
 	struct mips_fpu_soft_struct *ctx = &current->thread.fpu.soft;
 	unsigned long oldepc, prevepc;
@@ -1713,6 +1674,9 @@
 
 	oldepc = xcp->cp0_epc;
 	do {
+		if (current->need_resched)
+			schedule();
+
 		prevepc = xcp->cp0_epc;
 		insn = mips_get_word(xcp, REG_TO_VA(xcp->cp0_epc), &err);
 		if (err) {
@@ -1720,9 +1684,12 @@
 			return SIGBUS;
 		}
 		if (insn != 0)
-			sig = cop1Emulate(xcptno, xcp, ctx);
+			sig = cop1Emulate(xcp, ctx);
 		else
 			xcp->cp0_epc += 4;	/* skip nops */
+
+		if (mips_cpu.options & MIPS_CPU_FPU)
+			break;
 	} while (xcp->cp0_epc > prevepc && sig == 0);
 
 	/* SIGILL indicates a non-fpu instruction */
@@ -1753,7 +1720,7 @@
 
 	/* get current rounding mode for IEEE library, and emulate insn */
 	ieee754_csr.rm = ieee_rm[ctx->sr & 0x3];
-	sig = cop1Emulate(xcptno, xcp, ctx);
+	sig = cop1Emulate(xcp, ctx);
 
 	/* don't return with f.p. exceptions pending */
 	ctx->sr &= ~FPU_CSR_ALL_X;
@@ -1809,4 +1776,3 @@
 	}
 }
 #endif
-
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/atlas/atlas_int.c linux/arch/mips/mips-boards/atlas/atlas_int.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/atlas/atlas_int.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/atlas/atlas_int.c	Mon Dec  3 23:08:45 2001
@@ -51,6 +51,11 @@
 #define DEBUG_INT(x...)
 #endif
 
+void inline disable_irq_nosync(unsigned int irq_nr)
+{
+	disable_atlas_irq(irq_nr);
+}
+
 void disable_atlas_irq(unsigned int irq_nr)
 {
 	atlas_hw0_icregs->intrsten = (1 << irq_nr);
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/atlas/atlas_rtc.c linux/arch/mips/mips-boards/atlas/atlas_rtc.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/atlas/atlas_rtc.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/atlas/atlas_rtc.c	Mon Dec  3 23:08:45 2001
@@ -22,7 +22,6 @@
  * RTC routines for Atlas style attached Dallas chip.
  *
  */
-#include <linux/spinlock.h>
 #include <linux/mc146818rtc.h>
 #include <asm/mips-boards/atlas.h>
 
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/atlas/atlas_setup.c linux/arch/mips/mips-boards/atlas/atlas_setup.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/atlas/atlas_setup.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/atlas/atlas_setup.c	Mon Dec  3 23:08:45 2001
@@ -54,8 +54,8 @@
 	char rs_getDebugChar(void);
 	int saa9730_putDebugChar(char);
 	char saa9730_getDebugChar(void);
-	extern int (*putDebugChar)(char);
-	extern char (*getDebugChar)(void);
+	extern int (*generic_putDebugChar)(char);
+	extern char (*generic_getDebugChar)(void);
 #endif
 	char *argptr;
 
@@ -89,12 +89,12 @@
 
 		if(line == 0) {
 			rs_kgdb_hook(line);
-			putDebugChar = rs_putDebugChar;
-			getDebugChar = rs_getDebugChar;
+			generic_putDebugChar = rs_putDebugChar;
+			generic_getDebugChar = rs_getDebugChar;
 		} else {
 			saa9730_kgdb_hook();
-			putDebugChar = saa9730_putDebugChar;
-			getDebugChar = saa9730_getDebugChar;
+			generic_putDebugChar = saa9730_putDebugChar;
+			generic_getDebugChar = saa9730_getDebugChar;
 		}
 
 		prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/generic/cmdline.c linux/arch/mips/mips-boards/generic/cmdline.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/generic/cmdline.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/generic/cmdline.c	Mon Dec  3 23:08:45 2001
@@ -17,6 +17,7 @@
  *
  * Kernel command line creation using the prom monitor (YAMON) argc/argv.
  */
+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/string.h>
 
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/generic/gdb_hook.c linux/arch/mips/mips-boards/generic/gdb_hook.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/generic/gdb_hook.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/generic/gdb_hook.c	Mon Dec  3 23:08:45 2001
@@ -23,7 +23,6 @@
  *
  */
 
-#include <linux/config.h>
 #include <linux/serialP.h>
 #include <linux/serial_reg.h>
 
@@ -36,8 +35,8 @@
 
 static struct async_struct kdb_port_info = {0};
 
-int (*putDebugChar)(char);
-char (*getDebugChar)(void);
+int (*generic_putDebugChar)(char);
+char (*generic_getDebugChar)(void);
 
 static __inline__ unsigned int serial_in(struct async_struct *info, int offset)
 {
@@ -96,6 +95,16 @@
 	serial_out(&kdb_port_info, UART_DLM, t >> 8);  /* MS of divisor */
 	/* reset DLAB */
 	serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8);
+}
+
+int putDebugChar(char c)
+{
+	return generic_putDebugChar(c);
+}
+
+char getDebugChar(void) 
+{
+	return generic_getDebugChar();
 }
 
 int rs_putDebugChar(char c)
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/generic/memory.c linux/arch/mips/mips-boards/generic/memory.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/generic/memory.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/generic/memory.c	Mon Dec  3 23:08:45 2001
@@ -50,6 +50,11 @@
 };
 #endif
 
+/* References to section boundaries */
+extern char _end;
+
+#define PFN_ALIGN(x)    (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
 
 struct prom_pmemblock * __init prom_getmdesc(void)
 {
@@ -94,9 +99,13 @@
 	mdesc[2].size = 0x00010000;
 #endif
 
-	mdesc[3].type = yamon_free;
+	mdesc[3].type = yamon_dontuse;
 	mdesc[3].base = 0x00100000;
-	mdesc[3].size = memsize - mdesc[3].base;
+	mdesc[3].size = PHYSADDR(PFN_ALIGN(&_end)) - mdesc[3].base;
+
+	mdesc[4].type = yamon_free;
+	mdesc[4].base = PHYSADDR(PFN_ALIGN(&_end));
+	mdesc[4].size = memsize - mdesc[4].base;
 
 	return &mdesc[0];
 }
@@ -118,11 +127,10 @@
 	struct prom_pmemblock *p;
 
 #ifdef DEBUG
-	int i = 0;
-
 	prom_printf("YAMON MEMORY DESCRIPTOR dump:\n");
 	p = prom_getmdesc();
 	while (p->size) {
+		int i = 0;
 		prom_printf("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n",
 			    i, p, p->base, p->size, mtypes[p->type]);
 		p++;
@@ -130,24 +138,24 @@
 	}
 #endif
 	p = prom_getmdesc();
+
 	while (p->size) {
-		unsigned long base, size;
 		long type;
+		unsigned long base, size;
 
 		type = prom_memtype_classify (p->type);
 		base = p->base;
 		size = p->size;
 
 		add_memory_region(base, size, type);
-
-		p++;
+                p++; 
 	}
 }
 
-void prom_free_prom_memory (void)
+void __init
+prom_free_prom_memory (void)
 {
 	int i;
-	struct prom_pmemblock *p;
 	unsigned long freed = 0;
 	unsigned long addr;
 
@@ -158,9 +166,9 @@
 		addr = boot_mem_map.map[i].addr;
 		while (addr < boot_mem_map.map[i].addr
 			      + boot_mem_map.map[i].size) {
-		        ClearPageReserved(virt_to_page(phys_to_virt(addr)));
-			set_page_count(virt_to_page(phys_to_virt(addr)), 1);
-			free_page(phys_to_virt(addr));
+			ClearPageReserved(virt_to_page(__va(addr)));
+			set_page_count(virt_to_page(__va(addr)), 1);
+			free_page(__va(addr));
 			addr += PAGE_SIZE;
 			freed += PAGE_SIZE;
 		}
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/generic/pci.c linux/arch/mips/mips-boards/generic/pci.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/generic/pci.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/generic/pci.c	Mon Dec  3 23:08:45 2001
@@ -325,4 +325,9 @@
 	pci_read_bridge_bases(b);
 }
 
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 1;
+}
+
 #endif /* CONFIG_PCI */
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/generic/time.c linux/arch/mips/mips-boards/generic/time.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/generic/time.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/generic/time.c	Mon Dec  3 23:08:45 2001
@@ -275,7 +275,7 @@
 
 /* This is for machines which generate the exact clock. */
 #define USECS_PER_JIFFY (1000000/HZ)
-#define USECS_PER_JIFFY_FRAC (0x100000000*1000000/HZ&0xffffffff)
+#define USECS_PER_JIFFY_FRAC ((1000000 << 32) / HZ & 0xffffffff)
 
 /* Cycle counter value at the previous timer interrupt.. */
 
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/malta/malta_int.c linux/arch/mips/mips-boards/malta/malta_int.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/malta/malta_int.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/malta/malta_int.c	Mon Dec  3 23:08:45 2001
@@ -1,6 +1,7 @@
 /*
  * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ * Copyright (C) 2000, 2001 MIPS Technologies, Inc.
+ * Copyright (C) 2001 Ralf Baechle
  *
  *  This program is free software; you can distribute it and/or modify it
  *  under the terms of the GNU General Public License (Version 2) as
@@ -20,6 +21,7 @@
  * The interrupt controller is located in the South Bridge a PIIX4 device 
  * with two internal 82C95 interrupt controllers.
  */
+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/sched.h>
 #include <linux/slab.h>
@@ -37,342 +39,42 @@
 
 extern asmlinkage void mipsIRQ(void);
 
-unsigned int local_bh_count[NR_CPUS];
-unsigned int local_irq_count[NR_CPUS];
-unsigned long spurious_count = 0;
-
-static struct irqaction *hw0_irq_action[MALTAINT_END] = {
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL
-};
-
-static struct irqaction r4ktimer_action = {
-	NULL, 0, 0, "R4000 timer/counter", NULL, NULL,
-};
-
-static struct irqaction *irq_action[8] = {
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, &r4ktimer_action
-};
-
-#if 0
-#define DEBUG_INT(x...) printk(x)
-#else
-#define DEBUG_INT(x...)
-#endif
-
-/*
- * This contains the interrupt mask for both 82C59 interrupt controllers.
- */
-static unsigned int cached_int_mask = 0xffff;
-
-
-void disable_irq(unsigned int irq_nr)
-{
-        unsigned long flags;
-
-	if(irq_nr >= MALTAINT_END) {
-		printk("whee, invalid irq_nr %d\n", irq_nr);
-		panic("IRQ, you lose...");
-	}
-
-	save_and_cli(flags);
-	cached_int_mask |= (1 << irq_nr);
-	if (irq_nr & 8) {
-	        outb((cached_int_mask >> 8) & 0xff, PIIX4_ICTLR2_OCW1);
-	} else {
-		outb(cached_int_mask & 0xff, PIIX4_ICTLR1_OCW1);
-	}
-	restore_flags(flags);
-}
-
-
-void enable_irq(unsigned int irq_nr)
-{
-        unsigned long flags;
-
-	if(irq_nr >= MALTAINT_END) {
-		printk("whee, invalid irq_nr %d\n", irq_nr);
-		panic("IRQ, you lose...");
-	}
-
-	save_and_cli(flags);
-	cached_int_mask &= ~(1 << irq_nr);
-	if (irq_nr & 8) {
-		outb((cached_int_mask >> 8) & 0xff, PIIX4_ICTLR2_OCW1);
-
-		/* Enable irq 2 (cascade interrupt). */
-	        cached_int_mask &= ~(1 << 2); 
-		outb(cached_int_mask & 0xff, PIIX4_ICTLR1_OCW1);
-	} else {
-		outb(cached_int_mask & 0xff, PIIX4_ICTLR1_OCW1);
-	}	
-	restore_flags(flags);
-}
-
-
-int get_irq_list(char *buf)
-{
-	int i, len = 0;
-	int num = 0;
-	struct irqaction *action;
-
-	for (i = 0; i < 8; i++, num++) {
-		action = irq_action[i];
-		if (!action) 
-			continue;
-		len += sprintf(buf+len, "%2d: %8d %c %s",
-			num, kstat.irqs[0][num],
-			(action->flags & SA_INTERRUPT) ? '+' : ' ',
-			action->name);
-		for (action=action->next; action; action = action->next) {
-			len += sprintf(buf+len, ",%s %s",
-				(action->flags & SA_INTERRUPT) ? " +" : "",
-				action->name);
-		}
-		len += sprintf(buf+len, " [on-chip]\n");
-	}
-	for (i = 0; i < MALTAINT_END; i++, num++) {
-		action = hw0_irq_action[i];
-		if (!action) 
-			continue;
-		len += sprintf(buf+len, "%2d: %8d %c %s",
-			num, kstat.irqs[0][num],
-			(action->flags & SA_INTERRUPT) ? '+' : ' ',
-			action->name);
-		for (action=action->next; action; action = action->next) {
-			len += sprintf(buf+len, ",%s %s",
-				(action->flags & SA_INTERRUPT) ? " +" : "",
-				action->name);
-		}
-		len += sprintf(buf+len, " [hw0]\n");
-	}
-	return len;
-}
-
-
-static int setup_irq(unsigned int irq, struct irqaction * new)
-{
-	int shared = 0;
-	struct irqaction *old, **p;
-
-	p = &hw0_irq_action[irq];
-	if ((old = *p) != NULL) {
-		/* Can't share interrupts unless both agree to */
-		if (!(old->flags & new->flags & SA_SHIRQ))
-			return -EBUSY;
-
-		/* Can't share interrupts unless both are same type */
-		if ((old->flags ^ new->flags) & SA_INTERRUPT)
-			return -EBUSY;
-
-		/* add new interrupt at end of irq queue */
-		do {
-			p = &old->next;
-			old = *p;
-		} while (old);
-		shared = 1;
-	}
-
-	if (new->flags & SA_SAMPLE_RANDOM)
-		rand_initialize_irq(irq);
-
-	*p = new;
-	if (!shared)
-		enable_irq(irq);
-
-	return 0;
-}
-
-int request_irq(unsigned int irq, 
-		void (*handler)(int, void *, struct pt_regs *),
-		unsigned long irqflags, 
-		const char * devname,
-		void *dev_id)
-{  
-        struct irqaction *action;
-	int retval;
-
-	DEBUG_INT("request_irq: irq=%d, devname = %s\n", irq, devname);
-
-        if (irq >= MALTAINT_END)
-	        return -EINVAL;
-	if (!handler)
-	        return -EINVAL;
-
-	action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL);
-	if(!action)
-	        return -ENOMEM;
-
-	action->handler = handler;
-	action->flags = irqflags;
-	action->mask = 0;
-	action->name = devname;
-	action->dev_id = dev_id;
-	action->next = 0;
-
-	retval = setup_irq(irq, action);
-	if (retval)
-		kfree(action);
-
-	return retval;	
-}
-
-
-void free_irq(unsigned int irq, void *dev_id)
-{
-	struct irqaction *action, **p;
-
-	if (irq >= MALTAINT_END) {
-		printk("Trying to free IRQ%d\n",irq);
-		return;
-	}
-	
-	for (p = &hw0_irq_action[irq]; (action = *p) != NULL; 
-	     p = &action->next) 
-	{
-		if (action->dev_id != dev_id)
-			continue;
-
-		/* Found it - now free it */
-		*p = action->next;
-		kfree(action);
-		if (!hw0_irq_action[irq])
-			disable_irq(irq);
-		return;
-	}
-	printk("Trying to free IRQ%d\n",irq);
-}
-
-void __init init_IRQ(void)
+void malta_hw0_irqdispatch(struct pt_regs *regs)
 {
-	irq_setup();
-}
+	int irq;
 
-static inline int get_int(int *irq)
-{
 	/*  
-	 * Determine highest priority pending interrupt by performing
-         * a PCI Interrupt Acknowledge cycle.
+	 * Determine highest priority pending interrupt by performing a PCI
+	 * Interrupt Acknowledge cycle.
 	 */
-	GT_READ(GT_PCI0_IACK_OFS, *irq);
-	*irq &= 0xFF;
+	GT_READ(GT_PCI0_IACK_OFS, irq);
+	irq &= 0xFF;
 
 	/*  
-	 * IRQ7 is used to detect spurious interrupts.
-	 * The interrupt acknowledge cycle returns IRQ7, if no 
-	 * interrupts is requested.
-	 * We can differentiate between this situation and a
-	 * "Normal" IRQ7 by reading the ISR.
+	 * IRQ7 is used to detect spurious interrupts.  The interrupt
+	 * acknowledge cycle returns IRQ7, if no interrupts is requested.  We
+	 * can differentiate between this situation and a "normal" IRQ7 by
+	 * reading the ISR.
 	 */
-	if (*irq == 7) 
-	{
+	if (irq == 7) {
 		outb(PIIX4_OCW3_SEL | PIIX4_OCW3_ISR, PIIX4_ICTLR1_OCW3);
 		if (!(inb(PIIX4_ICTLR1_OCW3) & (1 << 7)))
-		        return -1;    /* Spurious interrupt. */
-	}
-
-	return 0;
-}
-
-static inline void ack_int(int irq)
-{
-	if (irq & 8) {
-	        /* Specific EOI to cascade */
-		outb(PIIX4_OCW2_SEL | PIIX4_OCW2_NSEOI | PIIX4_OCW2_ILS_2, 
-		     PIIX4_ICTLR1_OCW2);
-
-	        /* Non specific EOI to cascade */
-		outb(PIIX4_OCW2_SEL | PIIX4_OCW2_NSEOI, PIIX4_ICTLR2_OCW2);
-	} else {
-	        /* Non specific EOI to cascade */
-		outb(PIIX4_OCW2_SEL | PIIX4_OCW2_NSEOI, PIIX4_ICTLR1_OCW2);
+		        return;    /* Spurious interrupt. */
 	}
-}
-
-void malta_hw0_irqdispatch(struct pt_regs *regs)
-{
-        struct irqaction *action;
-	int irq=0, cpu = smp_processor_id();
-
-	DEBUG_INT("malta_hw0_irqdispatch\n");
-	
-	if (get_int(&irq))
-	        return;  /* interrupt has already been cleared */
 
-	disable_irq(irq);
-	ack_int(irq);
-
-	DEBUG_INT("malta_hw0_irqdispatch: irq=%d\n", irq);
-	action = hw0_irq_action[irq];
-
-	/* 
-	 * if action == NULL, then we don't have a handler 
-	 * for the irq 
-	 */
-	if ( action == NULL )
-		return;
-
-	irq_enter(cpu, irq);
-	kstat.irqs[0][irq + 8]++;
-	do {
-	        action->handler(irq, action->dev_id, regs);
-		action = action->next;
-	} while (action);
-
-	enable_irq(irq);
-	irq_exit(cpu, irq);
+	do_IRQ(irq, regs);
 }
 
-
-unsigned long probe_irq_on (void)
+void __init init_IRQ(void)
 {
-	unsigned int i, irqs = 0;
-	unsigned long delay;
+	set_except_vector(0, mipsIRQ);
+	init_generic_irq();
+	init_i8259_irqs();
 
-	/* first, enable any unassigned irqs */
-	for (i = MALTAINT_END-1; i > 0; i--) {
-		if (!hw0_irq_action[i]) {
-			enable_irq(i);
-			irqs |= (1 << i);
-		}
+#ifdef CONFIG_REMOTE_DEBUG
+	if (remote_debug) {
+		set_debug_traps();
+		breakpoint();
 	}
-
-	/* wait for spurious interrupts to mask themselves out again */
-	for (delay = jiffies + HZ/10; time_before(jiffies, delay); )
-		/* about 100ms delay */;
-
-	/* now filter out any obviously spurious interrupts */
-	return irqs & ~cached_int_mask;
-}
-
-
-int probe_irq_off (unsigned long irqs)
-{
-	unsigned int i;
-
-	irqs &= cached_int_mask;
-	if (!irqs)
-		return 0;
-	i = ffz(~irqs);
-	if (irqs != (irqs & (1 << i)))
-		i = -i;
-
-	return i;
-}
-
-
-void __init maltaint_init(void)
-{
-        /* 
-	 * Mask out all interrupt by writing "1" to all bit position in 
-	 * the IMR register. 
-	 */
-	outb(cached_int_mask & 0xff, PIIX4_ICTLR1_OCW1);
-	outb((cached_int_mask >> 8) & 0xff, PIIX4_ICTLR2_OCW1);
-
-	/* Now safe to set the exception vector. */
-	set_except_vector(0, mipsIRQ);
+#endif
 }
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/malta/malta_rtc.c linux/arch/mips/mips-boards/malta/malta_rtc.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/malta/malta_rtc.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/malta/malta_rtc.c	Mon Dec  3 23:08:45 2001
@@ -23,7 +23,6 @@
  * Motorola MC146818A-compatible Real Time Clock.
  *
  */
-#include <linux/spinlock.h>
 #include <linux/mc146818rtc.h>
 #include <asm/mips-boards/malta.h>
 
diff -urN linux-2.4.10-pre6/arch/mips/mips-boards/malta/malta_setup.c linux/arch/mips/mips-boards/malta/malta_setup.c
--- linux-2.4.10-pre6/arch/mips/mips-boards/malta/malta_setup.c	Fri Apr 13 20:26:07 2001
+++ linux/arch/mips/mips-boards/malta/malta_setup.c	Mon Dec  3 23:08:45 2001
@@ -2,8 +2,6 @@
  * Carsten Langgaard, carstenl@mips.com
  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
  *
- * ########################################################################
- *
  *  This program is free software; you can distribute it and/or modify it
  *  under the terms of the GNU General Public License (Version 2) as
  *  published by the Free Software Foundation.
@@ -16,11 +14,6 @@
  *  You should have received a copy of the GNU General Public License along
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Malta specific setup, including init of the feature struct.
- *
  */
 #include <linux/config.h>
 #include <linux/init.h>
@@ -56,53 +49,33 @@
 static int remote_debug = 0;
 #endif
 
-#ifdef CONFIG_BLK_DEV_IDE
 extern struct ide_ops std_ide_ops;
-#endif
-#ifdef CONFIG_BLK_DEV_FD
 extern struct fd_ops std_fd_ops;
-#endif
 extern struct rtc_ops malta_rtc_ops;
+extern struct kbd_ops std_kbd_ops;
 
 extern void mips_reboot_setup(void);
 
 struct resource standard_io_resources[] = {
 	{ "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
-	{ "pic1", 0x20, 0x3f, IORESOURCE_BUSY },
 	{ "timer", 0x40, 0x5f, IORESOURCE_BUSY },
 	{ "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
-	{ "pic2", 0xa0, 0xbf, IORESOURCE_BUSY },
 	{ "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
 };
 
 #define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource))
 
-static void __init malta_irq_setup(void)
-{
-  	maltaint_init();
-
-#ifdef CONFIG_REMOTE_DEBUG
-	if (remote_debug) {
-		set_debug_traps();
-		breakpoint(); 
-	}
-#endif
-}
-
-
 void __init malta_setup(void)
 {
 #ifdef CONFIG_REMOTE_DEBUG
 	int rs_putDebugChar(char);
 	char rs_getDebugChar(void);
-	extern int (*putDebugChar)(char);
-	extern char (*getDebugChar)(void);
+	extern int (*generic_putDebugChar)(char);
+	extern char (*generic_getDebugChar)(void);
 #endif
 	char *argptr;
 	int i;
 
-	irq_setup = malta_irq_setup;
-
 	/* Request I/O space for devices used on the Malta board. */
 	for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 		request_resource(&ioport_resource, standard_io_resources+i);
@@ -133,14 +106,14 @@
 		       line ? 1 : 0);
 
 		rs_kgdb_hook(line);
-		putDebugChar = rs_putDebugChar;
-		getDebugChar = rs_getDebugChar;
+		generic_putDebugChar = rs_putDebugChar;
+		generic_getDebugChar = rs_getDebugChar;
 
 		prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
 			    "please connect your debugger\n", line ? 1 : 0);
 
 		remote_debug = 1;
-		/* Breakpoints and stuff are in malta_irq_setup() */
+		/* Breakpoints are in init_IRQ() */
 	}
 #endif
 
@@ -154,6 +127,9 @@
 #endif
 #ifdef CONFIG_BLK_DEV_FD
         fd_ops = &std_fd_ops;
+#endif
+#ifdef CONFIG_PC_KEYB
+	kbd_ops = &std_kbd_ops;
 #endif
 	mips_reboot_setup();
 }
diff -urN linux-2.4.10-pre6/arch/mips/mm/Makefile linux/arch/mips/mm/Makefile
--- linux-2.4.10-pre6/arch/mips/mm/Makefile	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips/mm/Makefile	Mon Dec  3 23:08:45 2001
@@ -15,11 +15,13 @@
 obj-$(CONFIG_CPU_R3000)		+= r2300.o
 obj-$(CONFIG_CPU_R4300)		+= r4xx0.o
 obj-$(CONFIG_CPU_R4X00)		+= r4xx0.o
+obj-$(CONFIG_CPU_VR41XX)	+= r4xx0.o
 obj-$(CONFIG_CPU_R5000)		+= r4xx0.o
 obj-$(CONFIG_CPU_NEVADA)	+= r4xx0.o
 obj-$(CONFIG_CPU_R5432)		+= r5432.o
 obj-$(CONFIG_CPU_RM7000)	+= rm7k.o
 obj-$(CONFIG_CPU_MIPS32)	+= mips32.o
+obj-$(CONFIG_CPU_MIPS64)	+= mips32.o
 obj-$(CONFIG_SGI_IP22)		+= umap.o
 obj-$(CONFIG_BAGET_MIPS)	+= umap.o
 
diff -urN linux-2.4.10-pre6/arch/mips/mm/andes.c linux/arch/mips/mm/andes.c
--- linux-2.4.10-pre6/arch/mips/mm/andes.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips/mm/andes.c	Mon Dec  3 23:08:45 2001
@@ -132,7 +132,8 @@
 
 static void andes_flush_cache_sigtramp(unsigned long page)
 {
-	/* XXX */
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
 }
 
 /* TLB operations. XXX Write these dave... */
@@ -182,6 +183,14 @@
 	_flush_icache_page = andes_flush_icache_page;
 	_flush_icache_range = andes_flush_icache_range;
 
+	write_32bit_cp0_register(CP0_FRAMEMASK, 0);
+
 	flush_cache_all();
 	flush_tlb_all();
+
+	/*
+	 * The R10k might even work for Linux/MIPS - but we're paranoid
+	 * and refuse to run until this is tested on real silicon
+	 */
+	panic("CPU too expensive - making holiday in the ANDES!");
 }
diff -urN linux-2.4.10-pre6/arch/mips/mm/loadmmu.c linux/arch/mips/mm/loadmmu.c
--- linux-2.4.10-pre6/arch/mips/mm/loadmmu.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips/mm/loadmmu.c	Mon Dec  3 23:08:45 2001
@@ -52,8 +52,9 @@
 {
 
 	if (mips_cpu.options & MIPS_CPU_4KTLB) {
-#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_R4300) || \
-    defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_NEVADA)
+#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \
+    defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \
+    defined(CONFIG_CPU_NEVADA)
 		printk("Loading R4000 MMU routines.\n");
 		ld_mmu_r4xx0();
 #endif
@@ -66,7 +67,7 @@
 		ld_mmu_r5432();
 #endif
 
-#if defined(CONFIG_CPU_MIPS32)
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
 		printk("Loading MIPS32 MMU routines.\n");
 		ld_mmu_mips32();
 #endif
diff -urN linux-2.4.10-pre6/arch/mips/mm/mips32.c linux/arch/mips/mm/mips32.c
--- linux-2.4.10-pre6/arch/mips/mm/mips32.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips/mm/mips32.c	Mon Dec  3 23:08:45 2001
@@ -69,10 +69,8 @@
 {
 	unsigned long i;
 
-        if (mips_cpu.options & MIPS_CPU_CACHE_CDEX)
-	{
-	        for (i=page; i<page+PAGE_SIZE; i+=dc_lsize)
-		{
+        if (mips_cpu.options & MIPS_CPU_CACHE_CDEX) {
+	        for (i=page; i<page+PAGE_SIZE; i+=dc_lsize) {
 		        __asm__ __volatile__(
 			        ".set\tnoreorder\n\t"
 				".set\tnoat\n\t"
@@ -94,10 +92,8 @@
 {
 	unsigned long i;
 
-        if (mips_cpu.options & MIPS_CPU_CACHE_CDEX)
-	{
-	        for (i=page; i<page+PAGE_SIZE; i+=sc_lsize)
-		{
+        if (mips_cpu.options & MIPS_CPU_CACHE_CDEX) {
+	        for (i=page; i<page+PAGE_SIZE; i+=sc_lsize) {
 		        __asm__ __volatile__(
 				".set\tnoreorder\n\t"
 				".set\tnoat\n\t"
@@ -119,10 +115,8 @@
 {
 	unsigned long i;
 
-        if (mips_cpu.options & MIPS_CPU_CACHE_CDEX)
-	{
-	        for (i=to; i<to+PAGE_SIZE; i+=dc_lsize)
-		{
+        if (mips_cpu.options & MIPS_CPU_CACHE_CDEX) {
+	        for (i=to; i<to+PAGE_SIZE; i+=dc_lsize) {
 		        __asm__ __volatile__(
 			        ".set\tnoreorder\n\t"
 				".set\tnoat\n\t"
@@ -144,10 +138,8 @@
 {
 	unsigned long i;
 
-        if (mips_cpu.options & MIPS_CPU_CACHE_CDEX)
-	{
-	        for (i=to; i<to+PAGE_SIZE; i+=sc_lsize)
-		{
+        if (mips_cpu.options & MIPS_CPU_CACHE_CDEX) {
+	        for (i=to; i<to+PAGE_SIZE; i+=sc_lsize) {
 		        __asm__ __volatile__(
 				".set\tnoreorder\n\t"
 				".set\tnoat\n\t"
@@ -514,14 +506,8 @@
  */
 static void mips32_flush_cache_sigtramp(unsigned long addr)
 {
-	unsigned long daddr, iaddr;
-
-	daddr = addr & ~(dc_lsize - 1);
-	protected_writeback_dcache_line(daddr);
-	protected_writeback_dcache_line(daddr + dc_lsize);
-	iaddr = addr & ~(ic_lsize - 1);
-	protected_flush_icache_line(iaddr);
-	protected_flush_icache_line(iaddr + ic_lsize);
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
 }
 
 #undef DEBUG_TLB
diff -urN linux-2.4.10-pre6/arch/mips/mm/r2300.c linux/arch/mips/mm/r2300.c
--- linux-2.4.10-pre6/arch/mips/mm/r2300.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips/mm/r2300.c	Mon Dec  3 23:08:45 2001
@@ -33,7 +33,7 @@
 /* For R3000 cores with R4000 style caches */
 static unsigned long icache_size, dcache_size;		/* Size in bytes */
 static unsigned long icache_lsize, dcache_lsize;	/* Size in bytes */
-static unsigned long scache_size = 0;
+static unsigned long scache_size;
 
 #include <asm/cacheops.h>
 #include <asm/r4kcache.h>
@@ -134,31 +134,64 @@
 	dummy = *p;
 	status = read_32bit_cp0_register(CP0_STATUS);
 
-	if (dummy != 0xa5a55a5a || (status & (1<<19))) {
+	if (dummy != 0xa5a55a5a || (status & ST0_CM)) {
 		size = 0;
 	} else {
-		for (size = 512; size <= 0x40000; size <<= 1)
+		for (size = 128; size <= 0x40000; size <<= 1)
 			*(p + size) = 0;
 		*p = -1;
-		for (size = 512; 
+		for (size = 128; 
 		     (size <= 0x40000) && (*(p + size) == 0); 
 		     size <<= 1)
 			;
 		if (size > 0x40000)
 			size = 0;
 	}
+
 	write_32bit_cp0_register(CP0_STATUS, flags);
 
 	return size * sizeof(*p);
 }
 
+unsigned long __init r3k_cache_lsize(unsigned long ca_flags)
+{
+	unsigned long flags, status, lsize, i, j;
+	volatile unsigned long *p;
+
+	p = (volatile unsigned long *) KSEG0;
+
+	flags = read_32bit_cp0_register(CP0_STATUS);
+
+	/* isolate cache space */
+	write_32bit_cp0_register(CP0_STATUS, (ca_flags|flags)&~ST0_IEC);
+
+	for (i = 0; i < 128; i++)
+		*(p + i) = 0;
+	*(volatile unsigned char *)p = 0;
+	for (lsize = 1; lsize < 128; lsize <<= 1) {
+		*(p + lsize);
+		status = read_32bit_cp0_register(CP0_STATUS);
+		if (!(status & ST0_CM))
+			break;
+	}
+	for (i = 0; i < 128; i += lsize)
+		*(volatile unsigned char *)(p + i) = 0;
+
+	write_32bit_cp0_register(CP0_STATUS, flags);
+
+	return lsize * sizeof(*p);
+}
+
 static void __init r3k_probe_cache(void)
 {
 	dcache_size = r3k_cache_size(ST0_ISC);
-	dcache_lsize = 4;
+	if (dcache_size)
+		dcache_lsize = r3k_cache_lsize(ST0_ISC);
+	
 
 	icache_size = r3k_cache_size(ST0_ISC|ST0_SWC);
-	icache_lsize = 4;
+	if (icache_size)
+		icache_lsize = r3k_cache_lsize(ST0_ISC|ST0_SWC);
 }
 
 static void r3k_flush_icache_range(unsigned long start, unsigned long end)
@@ -391,11 +424,17 @@
 
 	flags = read_32bit_cp0_register(CP0_STATUS);
 
+	write_32bit_cp0_register(CP0_STATUS, flags&~ST0_IEC);
+
+	/* Fill the TLB to avoid an exception with caches isolated. */
+	asm ( 	"lw\t$0,0x000(%0)\n\t"
+		"lw\t$0,0x004(%0)\n\t"
+		: : "r" (addr) );
+
 	write_32bit_cp0_register(CP0_STATUS, (ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
 
 	asm ( 	"sb\t$0,0x000(%0)\n\t"
 		"sb\t$0,0x004(%0)\n\t"
-		"sb\t$0,0x008(%0)\n\t"
 		: : "r" (addr) );
 
 	write_32bit_cp0_register(CP0_STATUS, flags);
diff -urN linux-2.4.10-pre6/arch/mips/mm/r4xx0.c linux/arch/mips/mm/r4xx0.c
--- linux-2.4.10-pre6/arch/mips/mm/r4xx0.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips/mm/r4xx0.c	Mon Dec  3 23:08:45 2001
@@ -2088,43 +2088,29 @@
  */
 static void r4k_flush_cache_sigtramp(unsigned long addr)
 {
-	unsigned long daddr, iaddr;
-
-	daddr = addr & ~(dc_lsize - 1);
 	__asm__ __volatile__("nop;nop;nop;nop");	/* R4600 V1.7 */
-	protected_writeback_dcache_line(daddr);
-	protected_writeback_dcache_line(daddr + dc_lsize);
-	iaddr = addr & ~(ic_lsize - 1);
-	protected_flush_icache_line(iaddr);
-	protected_flush_icache_line(iaddr + ic_lsize);
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
 }
 
 static void r4600v20k_flush_cache_sigtramp(unsigned long addr)
 {
-	unsigned long daddr, iaddr;
 	unsigned int flags;
 
-	daddr = addr & ~(dc_lsize - 1);
 	__save_and_cli(flags);
 
 	/* Clear internal cache refill buffer */
 	*(volatile unsigned int *)KSEG1;
 
-	protected_writeback_dcache_line(daddr);
-	protected_writeback_dcache_line(daddr + dc_lsize);
-	iaddr = addr & ~(ic_lsize - 1);
-	protected_flush_icache_line(iaddr);
-	protected_flush_icache_line(iaddr + ic_lsize);
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
+
 	__restore_flags(flags);
 }
 
 #undef DEBUG_TLB
 #undef DEBUG_TLBUPDATE
 
-#define NTLB_ENTRIES       48  /* Fixed on all R4XX0 variants... */
-
-#define NTLB_ENTRIES_HALF  24  /* Fixed on all R4XX0 variants... */
-
 void flush_tlb_all(void)
 {
 	unsigned long flags;
@@ -2146,7 +2132,7 @@
 	entry = get_wired();
 
 	/* Blast 'em all away. */
-	while(entry < NTLB_ENTRIES) {
+	while(entry < mips_cpu.tlbsize) {
 		set_index(entry);
 		BARRIER;
 		tlb_write_indexed();
@@ -2188,7 +2174,7 @@
 		__save_and_cli(flags);
 		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
 		size = (size + 1) >> 1;
-		if(size <= NTLB_ENTRIES_HALF) {
+		if(size <= mips_cpu.tlbsize/2) {
 			int oldpid = (get_entryhi() & 0xff);
 			int newpid = (mm->context & 0xff);
 
@@ -2416,7 +2402,14 @@
 /* Detect and size the various r4k caches. */
 static void __init probe_icache(unsigned long config)
 {
-	icache_size = 1 << (12 + ((config >> 9) & 7));
+        switch (mips_cpu.cputype) {
+        case CPU_VR41XX:
+                icache_size = 1 << (10 + ((config >> 9) & 7));
+                break;
+        default:
+                icache_size = 1 << (12 + ((config >> 9) & 7));
+                break;
+        }
 	ic_lsize = 16 << ((config >> 5) & 1);
 
 	printk("Primary instruction cache %dkb, linesize %d bytes.\n",
@@ -2425,7 +2418,14 @@
 
 static void __init probe_dcache(unsigned long config)
 {
-	dcache_size = 1 << (12 + ((config >> 6) & 7));
+        switch (mips_cpu.cputype) {
+        case CPU_VR41XX:
+                dcache_size = 1 << (10 + ((config >> 6) & 7));
+                break;
+        default:
+                dcache_size = 1 << (12 + ((config >> 6) & 7));
+                break;
+        }
 	dc_lsize = 16 << ((config >> 4) & 1);
 
 	printk("Primary data cache %dkb, linesize %d bytes.\n",
@@ -2708,6 +2708,6 @@
 	 *   - The entire mm handling assumes the c0_pagemask register to
 	 *     be set for 4kb pages.
 	 */
-	write_32bit_cp0_register(CP0_PAGEMASK, PM_4K);
+	set_pagemask(PM_4K);
 	flush_tlb_all();
 }
diff -urN linux-2.4.10-pre6/arch/mips/mm/r5432.c linux/arch/mips/mm/r5432.c
--- linux-2.4.10-pre6/arch/mips/mm/r5432.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips/mm/r5432.c	Mon Dec  3 23:08:45 2001
@@ -531,14 +531,8 @@
  */
 static void r5432_flush_cache_sigtramp(unsigned long addr)
 {
-	unsigned long daddr, iaddr;
-
-	daddr = addr & ~(dc_lsize - 1);
-	protected_writeback_dcache_line(daddr);
-	protected_writeback_dcache_line(daddr + dc_lsize);
-	iaddr = addr & ~(ic_lsize - 1);
-	protected_flush_icache_line(iaddr);
-	protected_flush_icache_line(iaddr + ic_lsize);
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
 }
 
 #undef DEBUG_TLB
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/Makefile linux/arch/mips/philips/nino/Makefile
--- linux-2.4.10-pre6/arch/mips/philips/nino/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,33 @@
+#
+# Makefile for the Philips Nino specific parts of the kernel
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(AFLAGS) $< -o $@
+.S.o:
+	$(CC) $(AFLAGS) -c $< -o $@
+
+O_TARGET := nino.o
+
+all: nino.o
+
+obj-y	 := int-handler.o setup.o irq.o time.o reset.o rtc.o prom.o power.o
+
+int-handler.o: int-handler.S
+
+obj-$(CONFIG_REMOTE_DEBUG)	+= kgdb.o
+
+obj-$(CONFIG_BLK_DEV_INITRD)	+= ramdisk.o
+
+ramdisk.o:
+		$(MAKE) -C ramdisk
+		mv ramdisk/ramdisk.o ramdisk.o
+
+clean:
+		rm -f *.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/int-handler.S linux/arch/mips/philips/nino/int-handler.S
--- linux-2.4.10-pre6/arch/mips/philips/nino/int-handler.S	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/int-handler.S	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,137 @@
+/*
+ *  linux/arch/mips/philips/nino/int-handler.S
+ *
+ *  Copyright (C) 1999 Harald Koerfgen
+ *  Copyright (C) 2000 Jim Pick (jim@jimpick.com)
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Interrupt handler for Philips Nino.
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+#include <asm/stackframe.h>
+#include <asm/tx3912.h>
+
+		.data
+	        .globl  HighPriVect
+
+HighPriVect:	.word   spurious        # Reserved
+	        .word   io_posnegint0   # IOPOSINT(0) or IONEGINT(0)
+	        .word   spurious        # CHIDMACNTINT
+	        .word   spurious        # TELDMACNTINT
+	        .word   spurious        # SNDDMACNTINT
+	        .word   spurious        # Reserved
+	        .word   io_negint56     # IONEGINT(6) or IONEGINT(5)
+	        .word   spurious        # Reserved
+	        .word   io_posint56     # IOPOSINT(6) or IOPOSINT(5)
+	        .word   spurious        # Reserved
+	        .word   spurious        # UARTBRXINT
+	        .word   uarta_rx        # UARTARXINT
+	        .word   spurious        # Reserved
+	        .word   periodic_timer  # PERINT
+	        .word   spurious        # ALARMINT
+	        .word   spurious        # POSPWROKINT or NEGPWROKINT
+
+/*
+ *  Here is the entry point to handle all interrupts.
+ */
+		.text
+		.set	noreorder
+		.align	5
+		NESTED(nino_handle_int, PT_SIZE, ra)
+		.set	noat
+		SAVE_ALL
+		CLI
+		.set	at
+	
+		/*
+		 * Get pending Interrupts
+		 */
+		mfc0	t0, CP0_CAUSE		# Get pending interrupts
+		andi	t2, t0, IE_IRQ4		# IRQ4 (high priority)
+		bne	t2, IE_IRQ4, low_priority
+		nop
+
+/*
+ *  Ok, we've got a high priority interrupt (a.k.a. an external interrupt).
+ *  Read Interrupt Status Register 6 to get vector.
+ */
+high_priority:
+		lui	t0, %hi(IntStatus6)
+		lw	t1, %lo(IntStatus6)(t0)
+		andi	t1, INT6_INTVECT
+		la	t2, HighPriVect
+		addu	t1, t1, t2
+		lw	t2, 0(t1)
+		jr	t2
+		nop
+
+/*
+ * Ok, we've got one of over a hundred other interupts.
+ */
+low_priority:
+		lui	t0, %hi(IntStatus1)
+		lw	t1, %lo(IntStatus1)(t0)
+		j	handle_it
+		li	a0, 20
+
+/*
+ * We don't currently handle spurious interrupts.
+ */
+spurious:	
+		j	spurious_interrupt
+		nop
+
+/*
+ * We have the IRQ number, dispatch to the real handler.
+ */
+handle_it:	jal	do_IRQ
+		move	a1,sp
+		j	ret_from_irq
+		nop
+
+/************************************
+ * High priority interrupt mappings *
+ ************************************/
+		
+/* 
+ *  Periodic timer - IRQ 0
+ */
+periodic_timer:
+		j	handle_it
+		li	a0, 0
+
+/* 
+ *  UARTA RX - IRQ 3
+ */
+uarta_rx:
+		j	handle_it
+		li	a0, 3
+
+/* 
+ *  GPIO Pin 0 transition - IRQ 10
+ */
+io_posnegint0:
+		j	handle_it
+		li	a0, 10
+
+/* 
+ *  GPIO Pin 5 or 6 transition (0-to-1) - IRQ 11
+ */
+io_posint56:
+		j	handle_it
+		li	a0, 11
+
+/*
+ *  GPIO Pin 5 or 6 transition (1-to-0) - IRQ 12
+ */
+io_negint56:
+		j	handle_it
+		li	a0, 12
+
+		END(nino_handle_int)
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/irq.c linux/arch/mips/philips/nino/irq.c
--- linux-2.4.10-pre6/arch/mips/philips/nino/irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/irq.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,314 @@
+/*
+ *  linux/arch/mips/philips/nino/irq.c
+ *
+ *  Copyright (C) 1992 Linus Torvalds
+ *  Copyright (C) 1999 Harald Koerfgen
+ *  Copyright (C) 2000 Pavel Machek (pavel@suse.cz)
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *  
+ *  Generic interrupt handler for Philips Nino.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/tx3912.h>
+
+unsigned long spurious_count = 0;
+
+irq_cpustat_t irq_stat [NR_CPUS];
+
+static inline void mask_irq(unsigned int irq_nr)
+{
+	switch (irq_nr) {
+	case 0:  /* Periodic Timer Interrupt */ 
+		IntClear5 = INT5_PERIODICINT;
+		IntClear6 = INT6_PERIODICINT;
+		IntEnable6 &= ~INT6_PERIODICINT;
+		break;
+
+	case 3:
+		/* Serial port receive interrupt */
+		break;
+
+	case 2:
+		/* Serial port transmit interrupt */
+		break;
+
+	default:
+		printk( "Attempt to mask unknown IRQ %d?\n", irq_nr );
+	}
+}
+
+static inline void unmask_irq(unsigned int irq_nr)
+{
+	switch (irq_nr) {
+	case 0:
+		IntEnable6 |= INT6_PERIODICINT;
+		break;
+
+	case 3:
+		/* Serial port receive interrupt */
+		break;
+
+	case 2:
+		/* Serial port transmit interrupt */
+		break;
+
+	default:
+		printk( "Attempt to unmask unknown IRQ %d?\n", irq_nr );
+	}
+}
+
+void disable_irq(unsigned int irq_nr)
+{
+    unsigned long flags;
+
+    save_and_cli(flags);
+    mask_irq(irq_nr);
+    restore_flags(flags);
+}
+
+void enable_irq(unsigned int irq_nr)
+{
+    unsigned long flags;
+
+    save_and_cli(flags);
+    unmask_irq(irq_nr);
+    restore_flags(flags);
+}
+
+/*
+ * Pointers to the low-level handlers: first the general ones, then the
+ * fast ones, then the bad ones.
+ */
+extern void interrupt(void);
+
+static struct irqaction *irq_action[NR_IRQS] =
+{
+    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
+};
+
+int get_irq_list(char *buf)
+{
+    int i, len = 0;
+    struct irqaction *action;
+
+    for (i = 0; i < NR_IRQS; i++) {
+	action = irq_action[i];
+	if (!action)
+	    continue;
+	len += sprintf(buf + len, "%2d: %8d %c %s",
+		       i, kstat.irqs[0][i],
+		       (action->flags & SA_INTERRUPT) ? '+' : ' ',
+		       action->name);
+	for (action = action->next; action; action = action->next) {
+	    len += sprintf(buf + len, ",%s %s",
+			   (action->flags & SA_INTERRUPT) ? " +" : "",
+			   action->name);
+	}
+	len += sprintf(buf + len, "\n");
+    }
+    return len;
+}
+
+atomic_t __mips_bh_counter;
+
+/*
+ * do_IRQ handles IRQ's that have been installed without the
+ * SA_INTERRUPT flag: it uses the full signal-handling return
+ * and runs with other interrupts enabled. All relatively slow
+ * IRQ's should use this format: notably the keyboard/timer
+ * routines.
+ */
+asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
+{
+    struct irqaction *action;
+    int do_random, cpu;
+
+    if (irq == 20) {
+        if (IntStatus2 & 0xfffff00) {
+		if (IntStatus2 & 0x0f000000)
+		return do_IRQ(2, regs);
+	}
+    }
+
+    cpu = smp_processor_id();
+    irq_enter(cpu, irq);
+    kstat.irqs[cpu][irq]++;
+
+    if (irq == 20) {
+            printk("20 %08lx %08lx\n   %08lx %08lx\n   %08lx\n",
+                   IntStatus1, IntStatus2, IntStatus3,
+                   IntStatus4, IntStatus5 );
+            printk("20 %08lx %08lx\n   %08lx %08lx\n   %08lx\n",
+                   IntEnable1, IntEnable2, IntEnable3,
+                   IntEnable4, IntEnable5 );
+
+    }
+
+    mask_irq(irq);
+    action = *(irq + irq_action);
+    if (action) {
+	if (!(action->flags & SA_INTERRUPT))
+	    __sti();
+	do_random = 0;
+	do {
+	    do_random |= action->flags;
+	    action->handler(irq, action->dev_id, regs);
+	    action = action->next;
+	} while (action);
+	if (do_random & SA_SAMPLE_RANDOM)
+	    add_interrupt_randomness(irq);
+	unmask_irq(irq);
+	__cli();
+    } else {
+            IntClear1 = ~0;
+            IntClear3 = ~0;
+	    IntClear4 = ~0;
+	    IntClear5 = ~0;
+	    unmask_irq(irq);
+    }
+    irq_exit(cpu, irq);
+
+    /* unmasking and bottom half handling is done magically for us. */
+}
+
+/*
+ * Idea is to put all interrupts
+ * in a single table and differenciate them just by number.
+ */
+int setup_nino_irq(int irq, struct irqaction *new)
+{
+    int shared = 0;
+    struct irqaction *old, **p;
+    unsigned long flags;
+
+    p = irq_action + irq;
+    if ((old = *p) != NULL) {
+	/* Can't share interrupts unless both agree to */
+	if (!(old->flags & new->flags & SA_SHIRQ))
+	    return -EBUSY;
+
+	/* Can't share interrupts unless both are same type */
+	if ((old->flags ^ new->flags) & SA_INTERRUPT)
+	    return -EBUSY;
+
+	/* add new interrupt at end of irq queue */
+	do {
+	    p = &old->next;
+	    old = *p;
+	} while (old);
+	shared = 1;
+    }
+    if (new->flags & SA_SAMPLE_RANDOM)
+	rand_initialize_irq(irq);
+
+    save_and_cli(flags);
+    *p = new;
+
+    if (!shared) {
+	unmask_irq(irq);
+    }
+    restore_flags(flags);
+    return 0;
+}
+
+int request_irq(unsigned int irq,
+		void (*handler) (int, void *, struct pt_regs *),
+		unsigned long irqflags,
+		const char *devname,
+		void *dev_id)
+{
+    int retval;
+    struct irqaction *action;
+
+    if (irq >= NR_IRQS)
+	return -EINVAL;
+    if (!handler)
+	return -EINVAL;
+
+    action = (struct irqaction *) kmalloc(sizeof(struct irqaction), GFP_KERNEL);
+    if (!action)
+	return -ENOMEM;
+
+    action->handler = handler;
+    action->flags = irqflags;
+    action->mask = 0;
+    action->name = devname;
+    action->next = NULL;
+    action->dev_id = dev_id;
+
+    retval = setup_nino_irq(irq, action);
+
+    if (retval)
+	kfree(action);
+    return retval;
+}
+
+void free_irq(unsigned int irq, void *dev_id)
+{
+    struct irqaction *action, **p;
+    unsigned long flags;
+
+    if (irq >= NR_IRQS) {
+	printk(KERN_CRIT __FUNCTION__ ": trying to free IRQ%d\n", irq);
+	return;
+    }
+    for (p = irq + irq_action; (action = *p) != NULL; p = &action->next) {
+	if (action->dev_id != dev_id)
+	    continue;
+
+	/* Found it - now free it */
+	save_and_cli(flags);
+	*p = action->next;
+	if (!irq[irq_action])
+	    mask_irq(irq);
+	restore_flags(flags);
+	kfree(action);
+	return;
+    }
+    printk(KERN_CRIT __FUNCTION__ ": trying to free free IRQ%d\n", irq);
+}
+
+unsigned long probe_irq_on(void)
+{
+    /* TODO */
+    return 0;
+}
+
+int probe_irq_off(unsigned long irqs)
+{
+    /* TODO */
+    return 0;
+}
+
+void __init init_IRQ(void)
+{
+    irq_setup();
+}
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/kgdb.c linux/arch/mips/philips/nino/kgdb.c
--- linux-2.4.10-pre6/arch/mips/philips/nino/kgdb.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/kgdb.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,83 @@
+/*
+ *  linux/arch/mips/philips/nino/kgdb.c
+ *
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Kernel debugging on the Philips Nino.
+ */
+#include <asm/system.h>
+#include <asm/tx3912.h>
+
+static int remoteDebugInitialized = 0;
+
+void debugInit(void)
+{
+/*
+ * If low-level debugging (before GDB or console operational) is
+ * configured, then we do not need to re-initialize the UART.
+ */
+#ifndef CONFIG_DEBUG_LL
+	earlyInitUartPR31700();
+#endif
+}
+
+char getDebugChar(void)
+{
+	char buf;
+	unsigned long int2, flags;
+
+	if (!remoteDebugInitialized) {
+		debugInit();
+		remoteDebugInitialized = 1;
+	}
+
+	save_and_cli(flags);
+
+	int2 = IntEnable2;
+
+	IntEnable2 = 0;
+
+	while(!(UartA_Ctrl1 & UART_RX_HOLD_FULL));
+
+	buf = UartA_Data;
+
+	IntEnable2 = int2;
+
+	restore_flags(flags);
+
+	return buf;	
+}
+
+int putDebugChar(char c)
+{
+	int i;
+	unsigned long int2;
+
+	if (!remoteDebugInitialized) {
+		debugInit();
+		remoteDebugInitialized = 1;
+	}
+
+	int2 = IntEnable2;
+
+	IntEnable2 &=
+		~(INT2_UARTATXINT | INT2_UARTATXOVERRUN | INT2_UARTAEMPTY);
+
+	for (i = 0; !(IntStatus2 & INT2_UARTATXINT) && (i < 10000); i++);
+
+	IntClear2 = INT2_UARTATXINT | INT2_UARTATXOVERRUN | INT2_UARTAEMPTY;
+
+	UartA_Data = c;
+
+	for (i = 0; !(IntStatus2 & INT2_UARTATXINT) && (i < 10000); i++);
+
+	IntClear2 = INT2_UARTATXINT | INT2_UARTATXOVERRUN | INT2_UARTAEMPTY;
+
+	IntEnable2 = int2;
+
+	return 1;
+}
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/power.c linux/arch/mips/philips/nino/power.c
--- linux-2.4.10-pre6/arch/mips/philips/nino/power.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/power.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,36 @@
+/*
+ *  linux/arch/mips/philips/nino/power.c
+ *
+ *  Copyright (C) 2000 Jim Pick <jim@jimpick.com>
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Power management routines on the Philips Nino.
+ */
+#include <asm/tx3912.h>
+
+void nino_wait(void)
+{
+	/* We stop the CPU to conserve power */
+	PowerControl |= PWR_STOPCPU;
+
+	/* 
+	 * We wait until an interrupt happens...
+	 */
+
+	/* We resume here */
+	PowerControl &= ~PWR_STOPCPU;
+
+	/* Give ourselves a little delay */
+	__asm__ __volatile__(
+		"nop\n\t"
+		"nop\n\t"
+		"nop\n\t"
+		"nop\n\t"
+		"nop\n\t"
+		"nop\n\t"
+		"nop\n\t");
+}
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/prom.c linux/arch/mips/philips/nino/prom.c
--- linux-2.4.10-pre6/arch/mips/philips/nino/prom.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/prom.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,80 @@
+/*
+ *  linux/arch/mips/philips/nino/prom.c
+ *
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *  
+ *  Early initialization code for the Philips Nino.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+#include <asm/page.h>
+
+char arcs_cmdline[COMMAND_LINE_SIZE];
+
+#ifdef CONFIG_FB_TX3912
+extern u_long tx3912fb_paddr;
+extern u_long tx3912fb_vaddr;
+extern u_long tx3912fb_size;
+#endif
+
+/* Do basic initialization */
+void __init prom_init(int argc, char **argv,
+		unsigned long magic, int *prom_vec)
+{
+	u_long free_end, mem_size;
+	u_int i;
+
+	/*
+	 * collect args and prepare cmd_line
+	 */
+	for (i = 1; i < argc; i++) {
+		strcat(arcs_cmdline, argv[i]);
+		if (i < (argc - 1))
+			strcat(arcs_cmdline, " ");
+	}
+
+	mips_machgroup = MACH_GROUP_PHILIPS;
+	mips_machtype = MACH_PHILIPS_NINO;
+
+#ifdef CONFIG_NINO_4MB
+	mem_size = 4 << 20;
+#elif CONFIG_NINO_8MB
+	mem_size = 8 << 20;
+#elif CONFIG_NINO_16MB
+	mem_size = 16 << 20;
+#endif
+
+#ifdef CONFIG_FB_TX3912
+	/*
+	 * The LCD controller requires that the framebuffer
+	 * start address fall within a 1MB segment and is
+	 * aligned on a 16 byte boundary. The way to assure
+	 * this is to place the framebuffer at the end of
+	 * memory and mark it as reserved.
+	 */
+	free_end = (mem_size - tx3912fb_size) & PAGE_MASK;
+	add_memory_region(0, free_end, BOOT_MEM_RAM); 
+	add_memory_region(free_end, (mem_size - free_end), BOOT_MEM_RESERVED); 
+
+	/*
+	 * Calculate physical and virtual addresses for
+	 * the beginning of the framebuffer.
+	 */
+	tx3912fb_paddr = PHYSADDR(free_end);
+	tx3912fb_vaddr = KSEG1ADDR(free_end);
+#else
+	add_memory_region(0, mem_size, BOOT_MEM_RAM); 
+#endif
+}
+
+void __init prom_free_prom_memory (void)
+{
+}
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/ramdisk/Makefile linux/arch/mips/philips/nino/ramdisk/Makefile
--- linux-2.4.10-pre6/arch/mips/philips/nino/ramdisk/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/ramdisk/Makefile	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,12 @@
+#
+# Makefile for the Philips Nino ramdisk
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+ramdisk.o: ramdisk.gz ld.script
+	$(LD) -T ld.script -b binary -o $@ ramdisk.gz
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/ramdisk/ld.script linux/arch/mips/philips/nino/ramdisk/ld.script
--- linux-2.4.10-pre6/arch/mips/philips/nino/ramdisk/ld.script	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/ramdisk/ld.script	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,9 @@
+OUTPUT_FORMAT("ecoff-littlemips")
+OUTPUT_ARCH(mips)
+SECTIONS
+{
+  .initrd :
+  {
+        *(.data)
+  }
+}
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/reset.c linux/arch/mips/philips/nino/reset.c
--- linux-2.4.10-pre6/arch/mips/philips/nino/reset.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/reset.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,37 @@
+/*
+ *  linux/arch/mips/philips/nino/reset.c
+ *
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Generic restart, halt and power off functions for Philips Nino.
+ */
+#include <linux/init.h>
+#include <asm/reboot.h>
+
+void (*reset_vector)(void) = (void (*)(void)) 0xBFC00000;
+
+void nino_machine_restart(char *command)
+{
+	reset_vector();
+}
+
+void nino_machine_halt(void)
+{
+	reset_vector();
+}
+
+void nino_machine_power_off(void)
+{
+	reset_vector();
+}
+
+void __init setup_nino_reset_vectors(void)
+{
+	_machine_restart = nino_machine_restart;
+	_machine_halt = nino_machine_halt;
+	_machine_power_off = nino_machine_power_off;
+}
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/rtc.c linux/arch/mips/philips/nino/rtc.c
--- linux-2.4.10-pre6/arch/mips/philips/nino/rtc.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/rtc.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,34 @@
+/*
+ *  linux/arch/mips/philips/nino/rtc.c
+ *
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Functions to access RTC on the Philips Nino.
+ */
+#include <linux/spinlock.h>
+#include <linux/mc146818rtc.h>
+
+static unsigned char nino_rtc_read_data(unsigned long addr)
+{
+	return 0;
+}
+
+static void nino_rtc_write_data(unsigned char data, unsigned long addr)
+{
+}
+
+static int nino_rtc_bcd_mode(void)
+{
+	return 0;
+}
+
+struct rtc_ops nino_rtc_ops =
+{
+	&nino_rtc_read_data,
+	&nino_rtc_write_data,
+	&nino_rtc_bcd_mode
+};
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/setup.c linux/arch/mips/philips/nino/setup.c
--- linux-2.4.10-pre6/arch/mips/philips/nino/setup.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/setup.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,120 @@
+/*
+ *  linux/arch/mips/philips/nino/setup.c
+ *
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Interrupt and exception initialization for Philips Nino.
+ */
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/mc146818rtc.h>
+#include <linux/sched.h>
+#include <asm/addrspace.h>
+#include <asm/gdb-stub.h>
+#include <asm/irq.h>
+#include <asm/wbflush.h>
+#include <asm/tx3912.h>
+
+extern struct rtc_ops nino_rtc_ops;
+
+extern void nino_wait(void);
+extern void setup_nino_reset_vectors(void);
+extern asmlinkage void nino_handle_int(void);
+extern int setup_nino_irq(int, struct irqaction *);
+void (*board_time_init) (struct irqaction * irq);
+
+#ifdef CONFIG_REMOTE_DEBUG
+extern void set_debug_traps(void);
+extern void breakpoint(void);
+static int remote_debug = 0;
+#endif
+
+static void __init nino_irq_setup(void)
+{
+	unsigned int tmp;
+
+	/* Turn all interrupts off */
+	IntEnable1 = 0;
+	IntEnable2 = 0;
+	IntEnable3 = 0;
+	IntEnable4 = 0;
+	IntEnable5 = 0;
+	IntEnable6 = 0;
+
+	/* Clear all interrupts */
+	IntClear1 = 0xffffffff;
+	IntClear2 = 0xffffffff;
+	IntClear3 = 0xffffffff;
+	IntClear4 = 0xffffffff;
+	IntClear5 = 0xffffffff;
+	IntClear6 = 0xffffffff;
+
+	/*
+	 * Enable only the interrupts for the UART and negative
+	 * edge (1-to-0) triggered multi-function I/O pins.
+	 */
+    	change_cp0_status(ST0_BEV, 0);
+	tmp = read_32bit_cp0_register(CP0_STATUS);
+    	change_cp0_status(ST0_IM, tmp | IE_IRQ2 | IE_IRQ4);
+
+	/* Register the global interrupt handler */
+	set_except_vector(0, nino_handle_int);
+
+#ifdef CONFIG_REMOTE_DEBUG
+	if (remote_debug) {
+		set_debug_traps();
+		breakpoint();
+	}
+#endif
+}
+
+static __init void nino_time_init(struct irqaction *irq)
+{
+	unsigned int scratch = 0;
+
+	/*
+	 * Enable periodic interrupts
+	 */
+	setup_nino_irq(0, irq);
+
+	RTCperiodTimer = PER_TIMER_COUNT;
+	RTCtimerControl = TIM_ENPERTIMER;
+	IntEnable5 |= INT5_PERIODICINT;
+
+	scratch = inl(TX3912_CLK_CTRL_BASE);
+	scratch |= TX3912_CLK_CTRL_ENTIMERCLK;
+	outl(scratch, TX3912_CLK_CTRL_BASE);
+
+	/* Enable all interrupts */
+	IntEnable6 |= INT6_GLOBALEN | INT6_PERIODICINT;
+}
+
+void __init nino_setup(void)
+{
+	irq_setup = nino_irq_setup;
+
+	board_time_init = nino_time_init;
+
+	/* Base address to use for PC type I/O accesses */
+	mips_io_port_base = KSEG1ADDR(0xB0C00000);
+
+	setup_nino_reset_vectors();
+
+	/* Function called during process idle (cpu_idle) */
+	cpu_wait = nino_wait;
+
+#ifdef CONFIG_FB
+	conswitchp = &dummy_con;
+#endif
+
+#ifdef CONFIG_REMOTE_DEBUG
+	remote_debug = 1;
+#endif
+
+	rtc_ops = &nino_rtc_ops;
+}
diff -urN linux-2.4.10-pre6/arch/mips/philips/nino/time.c linux/arch/mips/philips/nino/time.c
--- linux-2.4.10-pre6/arch/mips/philips/nino/time.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/philips/nino/time.c	Mon Dec  3 23:08:45 2001
@@ -0,0 +1,216 @@
+/*
+ *  linux/arch/mips/philips/nino/time.c
+ *
+ *  Copyright (C) 1999 Harald Koerfgen
+ *  Copyright (C) 2000 Pavel Machek (pavel@suse.cz)
+ *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Time handling functinos for Philips Nino.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/timex.h>
+#include <linux/delay.h>
+#include <asm/tx3912.h>
+
+extern volatile unsigned long wall_jiffies;
+extern rwlock_t xtime_lock;
+
+static struct timeval xbase;
+
+#define USECS_PER_JIFFY (1000000/HZ)
+
+/*
+ * Poll the Interrupt Status Registers
+ */
+#undef POLL_STATUS
+
+static unsigned long do_gettimeoffset(void)
+{
+    /*
+     * This is a kludge
+     */
+    return 0;
+}
+
+static
+void inline readRTC(unsigned long *high, unsigned long *low)
+{
+	/* read twice, and keep reading till we find two
+	 * the same pairs. This is needed in case the RTC
+	 * was updating its registers and we read a old
+	 * High but a new Low. */
+	do {
+		*high = RTChigh & RTC_HIGHMASK;
+		*low = RTClow;
+	} while (*high != (RTChigh & RTC_HIGHMASK) || RTClow!=*low);
+}
+
+/*
+ * This version of gettimeofday has near millisecond resolution.
+ */
+void do_gettimeofday(struct timeval *tv)
+{
+    unsigned long flags;
+    unsigned long high, low;
+
+    read_lock_irqsave(&xtime_lock, flags);
+    // 40 bit RTC, driven by 32khz source:
+    // +-----------+-----------------------------------------+
+    // | HHHH.HHHH | LLLL.LLLL.LLLL.LLLL.LMMM.MMMM.MMMM.MMMM |
+    // +-----------+-----------------------------------------+
+    readRTC(&high,&low);
+    tv->tv_sec  = (high << 17) | (low >> 15);
+    tv->tv_usec = (low % 32768) * 1953 / 64;
+    tv->tv_sec += xbase.tv_sec;
+    tv->tv_usec += xbase.tv_usec;
+
+    tv->tv_usec += do_gettimeoffset();
+
+    /*
+     * xtime is atomically updated in timer_bh. lost_ticks is
+     * nonzero if the timer bottom half hasnt executed yet.
+     */
+    if (jiffies - wall_jiffies)
+	tv->tv_usec += USECS_PER_JIFFY;
+
+    read_unlock_irqrestore(&xtime_lock, flags);
+
+    if (tv->tv_usec >= 1000000) {
+	tv->tv_usec -= 1000000;
+	tv->tv_sec++;
+    }
+}
+
+void do_settimeofday(struct timeval *tv)
+{
+    write_lock_irq(&xtime_lock);
+    /* This is revolting. We need to set the xtime.tv_usec
+     * correctly. However, the value in this location is
+     * is value at the last tick.
+     * Discover what correction gettimeofday
+     * would have done, and then undo it!
+     */
+    tv->tv_usec -= do_gettimeoffset();
+
+    if (tv->tv_usec < 0) {
+	tv->tv_usec += 1000000;
+	tv->tv_sec--;
+    }
+
+    /* reset RTC to 0 (real time is xbase + RTC) */
+    xbase = *tv;
+    RTCtimerControl |=  TIM_RTCCLEAR;
+    RTCtimerControl &= ~TIM_RTCCLEAR;
+    RTCalarmHigh = RTCalarmLow = ~0UL;
+
+    xtime = *tv;
+    time_state = TIME_BAD;
+    time_maxerror = MAXPHASE;
+    time_esterror = MAXPHASE;
+    write_unlock_irq(&xtime_lock);
+}
+
+static int set_rtc_mmss(unsigned long nowtime)
+{
+    int retval = 0;
+
+    return retval;
+}
+
+/* last time the cmos clock got updated */
+static long last_rtc_update = 0;
+
+/*
+ * timer_interrupt() needs to keep up the real-time clock,
+ * as well as call the "do_timer()" routine every clocktick
+ */
+
+int do_write = 1;
+
+static void
+timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+#ifdef POLL_STATUS
+    static unsigned long old_IntStatus1 = 0;
+    static unsigned long old_IntStatus3 = 0;
+    static unsigned long old_IntStatus4 = 0;
+    static unsigned long old_IntStatus5 = 0;
+    static int counter = 0;
+    int i;
+
+    new_spircv = SPIData & 0xff;
+    if ((old_spircv != new_spircv) && (new_spircv != 0xff)) {
+	    printk( "SPIData changed: %x\n", new_spircv );
+    }
+    old_spircv = new_spircv;
+    if (do_write)
+	    SPIData = 0;
+#endif
+
+    if (!user_mode(regs)) {
+	if (prof_buffer && current->pid) {
+	    extern int _stext;
+	    unsigned long pc = regs->cp0_epc;
+
+	    pc -= (unsigned long) &_stext;
+	    pc >>= prof_shift;
+	    /*
+	     * Dont ignore out-of-bounds pc values silently,
+	     * put them into the last histogram slot, so if
+	     * present, they will show up as a sharp peak.
+	     */
+	    if (pc > prof_len - 1)
+		pc = prof_len - 1;
+		atomic_inc((atomic_t *) & prof_buffer[pc]);
+	    }
+    }
+
+    /*
+     * aaaand... action!
+     */
+    do_timer(regs);
+
+    /*
+     * If we have an externally syncronized Linux clock, then update
+     * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
+     * called as close as possible to 500 ms before the new second starts.
+     */
+    if (time_state != TIME_BAD && xtime.tv_sec > last_rtc_update + 660 &&
+	xtime.tv_usec > 500000 - (tick >> 1) &&
+	xtime.tv_usec < 500000 + (tick >> 1))
+    {
+	if (set_rtc_mmss(xtime.tv_sec) == 0)
+	    last_rtc_update = xtime.tv_sec;
+	else
+	    last_rtc_update = xtime.tv_sec - 600;  /* do it again in 60 s */
+    }
+}
+
+static struct irqaction irq0 = {timer_interrupt, SA_INTERRUPT, 0,
+ 			 "timer", NULL, NULL};
+
+void (*board_time_init) (struct irqaction * irq);
+
+int __init time_init(void)
+{
+    struct timeval starttime;
+
+    starttime.tv_sec = mktime(2000, 1, 1, 0, 0, 0);
+    starttime.tv_usec = 0;
+    do_settimeofday(&starttime);
+
+    board_time_init(&irq0);
+
+    return 0;
+}
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_hpc.c linux/arch/mips/sgi/kernel/indy_hpc.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_hpc.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/sgi/kernel/indy_hpc.c	Mon Dec  3 23:08:45 2001
@@ -12,6 +12,7 @@
 #include <asm/sgi/sgihpc.h>
 #include <asm/sgi/sgint23.h>
 #include <asm/sgialib.h>
+#include <asm/bootinfo.h>
 
 /* #define DEBUG_SGIHPC */
 
@@ -50,10 +51,12 @@
 		prom_printf("GUINESS ");
 #endif
 		sgi_guiness = 1;
+		mips_machtype = MACH_SGI_INDY;
 	} else {
 #ifdef DEBUG_SGIHPC
 		prom_printf("FULLHOUSE ");
 #endif
+                mips_machtype = MACH_SGI_INDIGO2;
 		sgi_guiness = 0;
 	}
 	sgi_boardid = brev;
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_int.c linux/arch/mips/sgi/kernel/indy_int.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_int.c	Fri Feb  9 11:29:44 2001
+++ linux/arch/mips/sgi/kernel/indy_int.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: indy_int.c,v 1.18 2000/03/02 02:36:50 ralf Exp $
- *
+/*
  * indy_int.c: Routines for generic manipulation of the INT[23] ASIC
  *             found on INDY workstations..
  *
@@ -70,8 +69,6 @@
 
 extern asmlinkage void indyIRQ(void);
 
-unsigned long spurious_count = 0;
-
 /* Local IRQ's are layed out logically like this:
  *
  * 0  --> 7   ==   local 0 interrupts
@@ -79,433 +76,333 @@
  * 16 --> 23  ==   vectored level 2 interrupts
  * 24 --> 31  ==   vectored level 3 interrupts (not used)
  */
-void disable_local_irq(unsigned int irq_nr)
+static void enable_local0_irq(unsigned int irq)
 {
 	unsigned long flags;
 
 	save_and_cli(flags);
-	switch(irq_nr) {
-	case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
-		ioc_icontrol->imask0 &= ~(1 << irq_nr);
-		break;
-
-	case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15:
-		ioc_icontrol->imask1 &= ~(1 << (irq_nr - 8));
-		break;
-
-	case 16: case 17: case 18: case 19: case 20: case 21: case 22: case 23:
-		ioc_icontrol->cmeimask0 &= ~(1 << (irq_nr - 16));
-		break;
-
-	default:
-		/* This way we'll see if anyone would ever want vectored
-		 * level 3 interrupts.  Highly unlikely.
-		 */
-		printk("Yeeee, got passed irq_nr %d at disable_irq\n", irq_nr);
-		panic("INVALID IRQ level!");
-	};
+	ioc_icontrol->imask0 |= (1 << (irq - SGINT_LOCAL0));
 	restore_flags(flags);
 }
 
-void enable_local_irq(unsigned int irq_nr)
+static unsigned int startup_local0_irq(unsigned int irq)
+{
+	enable_local0_irq(irq);
+
+	return 0;		/* Never anything pending  */
+}
+
+static void disable_local0_irq(unsigned int irq)
 {
 	unsigned long flags;
+
 	save_and_cli(flags);
-	switch(irq_nr) {
-	case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
-		ioc_icontrol->imask0 |= (1 << irq_nr);
-		break;
-
-	case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15:
-		ioc_icontrol->imask1 |= (1 << (irq_nr - 8));
-		break;
-
-	case 16: case 17: case 18: case 19: case 20: case 21: case 22: case 23:
-		enable_local_irq(7);
-		ioc_icontrol->cmeimask0 |= (1 << (irq_nr - 16));
-		break;
-
-	default:
-		printk("Yeeee, got passed irq_nr %d at disable_irq\n", irq_nr);
-		panic("INVALID IRQ level!");
-	};
+	ioc_icontrol->imask0 &= ~(1 << (irq - SGINT_LOCAL0));
 	restore_flags(flags);
 }
 
-void disable_gio_irq(unsigned int irq_nr)
+#define shutdown_local0_irq	disable_local0_irq
+#define mask_and_ack_local0_irq	disable_local0_irq
+
+static void end_local0_irq (unsigned int irq)
 {
-	/* XXX TODO XXX */
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_local0_irq(irq);
 }
 
-void enable_gio_irq(unsigned int irq_nr)
+static struct hw_interrupt_type ip22_local0_irq_type = {
+	"IP22 local 0",
+	startup_local0_irq,
+	shutdown_local0_irq,
+	enable_local0_irq,
+	disable_local0_irq,
+	mask_and_ack_local0_irq,
+	end_local0_irq,
+	NULL
+};
+
+static void enable_local1_irq(unsigned int irq)
 {
-	/* XXX TODO XXX */
+	unsigned long flags;
+
+	save_and_cli(flags);
+	ioc_icontrol->imask1 |= (1 << (irq - SGINT_LOCAL1));
+	restore_flags(flags);
 }
 
-void disable_hpcdma_irq(unsigned int irq_nr)
+static unsigned int startup_local1_irq(unsigned int irq)
 {
-	/* XXX TODO XXX */
+	enable_local1_irq(irq);
+
+	return 0;		/* Never anything pending  */
 }
 
-void enable_hpcdma_irq(unsigned int irq_nr)
+void disable_local1_irq(unsigned int irq)
 {
-	/* XXX TODO XXX */
+	unsigned long flags;
+
+	save_and_cli(flags);
+	ioc_icontrol->imask1 &= ~(1 << (irq- SGINT_LOCAL1));
+	restore_flags(flags);
 }
 
-void disable_irq(unsigned int irq_nr)
+#define shutdown_local1_irq	disable_local1_irq
+#define mask_and_ack_local1_irq	disable_local1_irq
+
+static void end_local1_irq (unsigned int irq)
 {
-	unsigned int n = irq_nr;
-	if(n >= SGINT_END) {
-		printk("whee, invalid irq_nr %d\n", irq_nr);
-		panic("IRQ, you lose...");
-	}
-	if(n >= SGINT_LOCAL0 && n < SGINT_GIO) {
-		disable_local_irq(n - SGINT_LOCAL0);
-	} else if(n >= SGINT_GIO && n < SGINT_HPCDMA) {
-		disable_gio_irq(n - SGINT_GIO);
-	} else if(n >= SGINT_HPCDMA && n < SGINT_END) {
-		disable_hpcdma_irq(n - SGINT_HPCDMA);
-	} else {
-		panic("how did I get here?");
-	}
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_local1_irq(irq);
 }
 
-void enable_irq(unsigned int irq_nr)
+static struct hw_interrupt_type ip22_local1_irq_type = {
+	"IP22 local 1",
+	startup_local1_irq,
+	shutdown_local1_irq,
+	enable_local1_irq,
+	disable_local1_irq,
+	mask_and_ack_local1_irq,
+	end_local1_irq,
+	NULL
+};
+
+static void enable_local2_irq(unsigned int irq)
 {
-	unsigned int n = irq_nr;
-	if(n >= SGINT_END) {
-		printk("whee, invalid irq_nr %d\n", irq_nr);
-		panic("IRQ, you lose...");
-	}
-	if(n >= SGINT_LOCAL0 && n < SGINT_GIO) {
-		enable_local_irq(n - SGINT_LOCAL0);
-	} else if(n >= SGINT_GIO && n < SGINT_HPCDMA) {
-		enable_gio_irq(n - SGINT_GIO);
-	} else if(n >= SGINT_HPCDMA && n < SGINT_END) {
-		enable_hpcdma_irq(n - SGINT_HPCDMA);
-	} else {
-		panic("how did I get here?");
-	}
+	unsigned long flags;
+
+	save_and_cli(flags);
+	enable_local0_irq(7);
+	ioc_icontrol->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
+	restore_flags(flags);
 }
 
-#if 0
-/*
- * Currently unused.
- */
-static void local_unex(int irq, void *data, struct pt_regs *regs)
+static unsigned int startup_local2_irq(unsigned int irq)
 {
-	printk("Whee: unexpected local IRQ at %08lx\n",
-	       (unsigned long) regs->cp0_epc);
-	printk("DUMP: stat0<%x> stat1<%x> vmeistat<%x>\n",
-	       ioc_icontrol->istat0, ioc_icontrol->istat1,
-	       ioc_icontrol->vmeistat);
-}
-#endif
+	enable_local2_irq(irq);
 
-static struct irqaction *local_irq_action[24] = {
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL
-};
+	return 0;		/* Never anything pending  */
+}
 
-int setup_indy_irq(int irq, struct irqaction * new)
+void disable_local2_irq(unsigned int irq)
 {
-	printk("setup_indy_irq: Yeee, don't know how to setup irq<%d> for %s  %p\n",
-	       irq, new->name, new->handler);
-	return 0;
+	unsigned long flags;
+
+	save_and_cli(flags);
+	ioc_icontrol->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
+	restore_flags(flags);
 }
 
-static struct irqaction r4ktimer_action = {
-	NULL, 0, 0, "R4000 timer/counter", NULL, NULL,
-};
+#define shutdown_local2_irq disable_local2_irq
+#define mask_and_ack_local2_irq	disable_local2_irq
 
-static struct irqaction indy_berr_action = {
-	NULL, 0, 0, "IP22 Bus Error", NULL, NULL,
-};
+static void end_local2_irq (unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_local2_irq(irq);
+}
 
-static struct irqaction *irq_action[16] = {
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, &indy_berr_action, &r4ktimer_action,
-	NULL, NULL, NULL, NULL,
-	NULL, NULL, NULL, NULL
+static struct hw_interrupt_type ip22_local2_irq_type = {
+	"IP22 local 2",
+	startup_local2_irq,
+	shutdown_local2_irq,
+	enable_local2_irq,
+	disable_local2_irq,
+	mask_and_ack_local2_irq,
+	end_local2_irq,
+	NULL
 };
 
-int get_irq_list(char *buf)
+static void enable_local3_irq(unsigned int irq)
 {
-	int i, len = 0;
-	int num = 0;
-	struct irqaction * action;
-
-	for (i = 0 ; i < 16 ; i++, num++) {
-		action = irq_action[i];
-		if (!action) 
-			continue;
-		len += sprintf(buf+len, "%2d: %8d %c %s",
-			num, kstat.irqs[0][num],
-			(action->flags & SA_INTERRUPT) ? '+' : ' ',
-			action->name);
-		for (action=action->next; action; action = action->next) {
-			len += sprintf(buf+len, ",%s %s",
-				(action->flags & SA_INTERRUPT) ? " +" : "",
-				action->name);
-		}
-		len += sprintf(buf+len, " [on-chip]\n");
-	}
-	for (i = 0 ; i < 24 ; i++, num++) {
-		action = local_irq_action[i];
-		if (!action) 
-			continue;
-		len += sprintf(buf+len, "%2d: %8d %c %s",
-			num, kstat.irqs[0][num],
-			(action->flags & SA_INTERRUPT) ? '+' : ' ',
-			action->name);
-		for (action=action->next; action; action = action->next) {
-			len += sprintf(buf+len, ",%s %s",
-				(action->flags & SA_INTERRUPT) ? " +" : "",
-				action->name);
-		}
-		len += sprintf(buf+len, " [local]\n");
-	}
-	return len;
+	unsigned long flags;
+
+	save_and_cli(flags);
+	printk("Yeeee, got passed irq_nr %d at enable_local3_irq\n", irq);
+	panic("INVALID IRQ level!");
+	restore_flags(flags);
 }
 
-/*
- * do_IRQ handles IRQ's that have been installed without the
- * SA_INTERRUPT flag: it uses the full signal-handling return
- * and runs with other interrupts enabled. All relatively slow
- * IRQ's should use this format: notably the keyboard/timer
- * routines.
- */
-asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
+static unsigned int startup_local3_irq(unsigned int irq)
 {
-	struct irqaction *action;
-	int do_random, cpu;
+	enable_local3_irq(irq);
 
-	cpu = smp_processor_id();
-	irq_enter(cpu);
-	kstat.irqs[0][irq]++;
+	return 0;		/* Never anything pending  */
+}
 
-	printk("Got irq %d, press a key.", irq);
-	prom_getchar();
-	romvec->imode();
+void disable_local3_irq(unsigned int irq)
+{
+	unsigned long flags;
 
+	save_and_cli(flags);
 	/*
-	 * mask and ack quickly, we don't want the irq controller
-	 * thinking we're snobs just because some other CPU has
-	 * disabled global interrupts (we have already done the
-	 * INT_ACK cycles, it's too late to try to pretend to the
-	 * controller that we aren't taking the interrupt).
-	 *
-	 * Commented out because we've already done this in the
-	 * machinespecific part of the handler.  It's reasonable to
-	 * do this here in a highlevel language though because that way
-	 * we could get rid of a good part of duplicated code ...
+	 * This way we'll see if anyone would ever want vectored level 3
+	 * interrupts.  Highly unlikely.
 	 */
-        /* mask_and_ack_irq(irq); */
+	printk("Yeeee, got passed irq_nr %d at disable_local3_irq\n", irq);
+	panic("INVALID IRQ level!");
+	restore_flags(flags);
+}
 
-	action = *(irq + irq_action);
-	if (action) {
-		if (!(action->flags & SA_INTERRUPT))
-			__sti();
-		action = *(irq + irq_action);
-		do_random = 0;
-		do {
-			do_random |= action->flags;
-			action->handler(irq, action->dev_id, regs);
-			action = action->next;
-		} while (action);
-		if (do_random & SA_SAMPLE_RANDOM)
-			add_interrupt_randomness(irq);
-		__cli();
-	}
-	irq_exit(cpu);
+#define shutdown_local3_irq disable_local3_irq
+#define mask_and_ack_local3_irq	disable_local3_irq
 
-	/* unmasking and bottom half handling is done magically for us. */
+static void end_local3_irq (unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_local3_irq(irq);
 }
 
-int request_local_irq(unsigned int lirq, void (*func)(int, void *, struct pt_regs *),
-		      unsigned long iflags, const char *dname, void *devid)
+static struct hw_interrupt_type ip22_local3_irq_type = {
+	"IP22 local 3",
+	startup_local3_irq,
+	shutdown_local3_irq,
+	enable_local3_irq,
+	disable_local3_irq,
+	mask_and_ack_local3_irq,
+	end_local3_irq,
+	NULL
+};
+
+void enable_gio_irq(unsigned int irq)
 {
-	struct irqaction *action;
+	/* XXX TODO XXX */
+}
 
-	lirq -= SGINT_LOCAL0;
-	if(lirq >= 24 || !func)
-		return -EINVAL;
+static unsigned int startup_gio_irq(unsigned int irq)
+{
+	enable_gio_irq(irq);
 
-	action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL);
-	if(!action)
-		return -ENOMEM;
+	return 0;		/* Never anything pending  */
+}
 
-	action->handler = func;
-	action->flags = iflags;
-	action->mask = 0;
-	action->name = dname;
-	action->dev_id = devid;
-	action->next = 0;
-	local_irq_action[lirq] = action;
-	enable_irq(lirq + SGINT_LOCAL0);
-	return 0;
+void disable_gio_irq(unsigned int irq)
+{
+	/* XXX TODO XXX */
 }
 
-void free_local_irq(unsigned int lirq, void *dev_id)
+#define shutdown_gio_irq	disable_gio_irq
+#define mask_and_ack_gio_irq	disable_gio_irq
+
+static void end_gio_irq (unsigned int irq)
 {
-	struct irqaction *action;
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_gio_irq(irq);
+}
 
-	lirq -= SGINT_LOCAL0;
-	if(lirq >= 24) {
-		printk("Aieee: trying to free bogus local irq %d\n",
-		       lirq + SGINT_LOCAL0);
-		return;
-	}
-	action = local_irq_action[lirq];
-	local_irq_action[lirq] = NULL;
-	disable_irq(lirq + SGINT_LOCAL0);
-	kfree(action);
-}
-
-int request_irq(unsigned int irq, 
-		void (*handler)(int, void *, struct pt_regs *),
-		unsigned long irqflags, 
-		const char * devname,
-		void *dev_id)
-{
-	int retval;
-	struct irqaction * action;
-
-	if (irq >= SGINT_END)
-		return -EINVAL;
-	if (!handler)
-		return -EINVAL;
-
-	if((irq >= SGINT_LOCAL0) && (irq < SGINT_GIO))
-		return request_local_irq(irq, handler, irqflags, devname, dev_id);
-
-	action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL);
-	if (!action)
-		return -ENOMEM;
-
-	action->handler = handler;
-	action->flags = irqflags;
-	action->mask = 0;
-	action->name = devname;
-	action->next = NULL;
-	action->dev_id = dev_id;
-
-	retval = setup_indy_irq(irq, action);
-
-	if (retval)
-		kfree(action);
-	return retval;
+static struct hw_interrupt_type ip22_gio_irq_type = {
+	"IP22 GIO",
+	startup_gio_irq,
+	shutdown_gio_irq,
+	enable_gio_irq,
+	disable_gio_irq,
+	mask_and_ack_gio_irq,
+	end_gio_irq,
+	NULL
+};
+
+void enable_hpcdma_irq(unsigned int irq)
+{
+	/* XXX TODO XXX */
 }
-		
-void free_irq(unsigned int irq, void *dev_id)
+
+static unsigned int startup_hpcdma_irq(unsigned int irq)
 {
-	struct irqaction * action, **p;
-	unsigned long flags;
+	enable_hpcdma_irq(irq);
 
-	if (irq >= SGINT_END) {
-		printk("Trying to free IRQ%d\n",irq);
-		return;
-	}
-	if((irq >= SGINT_LOCAL0) && (irq < SGINT_GIO)) {
-		free_local_irq(irq, dev_id);
-		return;
-	}
-	for (p = irq + irq_action; (action = *p) != NULL; p = &action->next) {
-		if (action->dev_id != dev_id)
-			continue;
-
-		/* Found it - now free it */
-		save_and_cli(flags);
-		*p = action->next;
-		restore_flags(flags);
-		kfree(action);
-		return;
-	}
-	printk("Trying to free free IRQ%d\n",irq);
+	return 0;		/* Never anything pending  */
 }
 
-int (*irq_cannonicalize)(int irq);
-
-static int indy_irq_cannonicalize(int irq)
+void disable_hpcdma_irq(unsigned int irq)
 {
-	return irq;	/* Sane hardware, sane code ... */
+	/* XXX TODO XXX */
 }
 
-void __init init_IRQ(void)
+#define shutdown_hpcdma_irq	disable_hpcdma_irq
+#define mask_and_ack_hpcdma_irq	disable_hpcdma_irq
+
+static void end_hpcdma_irq (unsigned int irq)
 {
-	irq_cannonicalize = indy_irq_cannonicalize;
-	irq_setup();
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_hpcdma_irq(irq);
 }
 
+static struct hw_interrupt_type ip22_hpcdma_irq_type = {
+	"IP22 HPC DMA",
+	startup_hpcdma_irq,
+	shutdown_hpcdma_irq,
+	enable_hpcdma_irq,
+	disable_hpcdma_irq,
+	mask_and_ack_hpcdma_irq,
+	end_hpcdma_irq,
+	NULL
+};
+
+static struct irqaction r4ktimer_action = {
+	NULL, 0, 0, "R4000 timer/counter", NULL, NULL,
+};
+
+static struct irqaction indy_berr_action = {
+	NULL, 0, 0, "IP22 Bus Error", NULL, NULL,
+};
+
+static struct irqaction *irq_action[16] = {
+	NULL, NULL, NULL, NULL,
+	NULL, NULL, &indy_berr_action, &r4ktimer_action,
+	NULL, NULL, NULL, NULL,
+	NULL, NULL, NULL, NULL
+};
+
 void indy_local0_irqdispatch(struct pt_regs *regs)
 {
-	struct irqaction *action;
 	unsigned char mask = ioc_icontrol->istat0;
 	unsigned char mask2 = 0;
-	int irq, cpu = smp_processor_id();;
+	int irq;
 
 	mask &= ioc_icontrol->imask0;
-	if(mask & ISTAT0_LIO2) {
+	if (mask & ISTAT0_LIO2) {
 		mask2 = ioc_icontrol->vmeistat;
 		mask2 &= ioc_icontrol->cmeimask0;
 		irq = lc2msk_to_irqnr[mask2];
-		action = local_irq_action[irq];
 	} else {
 		irq = lc0msk_to_irqnr[mask];
-		action = local_irq_action[irq];
 	}
 
 	/* if irq == 0, then the interrupt has already been cleared */
-	if ( irq == 0 ) { goto end; }
-	/* if action == NULL, then we do have a handler for the irq */
-	if ( action == NULL ) { goto no_handler; }
-	
-	irq_enter(cpu);
-	kstat.irqs[0][irq + 16]++;
-	action->handler(irq, action->dev_id, regs);
-	irq_exit(cpu);
+	if (irq == 0)
+		goto end;
+
+	do_IRQ(irq, regs);
 	goto end;
 
 no_handler:
 	printk("No handler for local0 irq: %i\n", irq);
 
 end:	
-	return;	
-	
+	return;
 }
 
 void indy_local1_irqdispatch(struct pt_regs *regs)
 {
-	struct irqaction *action;
 	unsigned char mask = ioc_icontrol->istat1;
 	unsigned char mask2 = 0;
-	int irq, cpu = smp_processor_id();;
+	int irq;
 
 	mask &= ioc_icontrol->imask1;
-	if(mask & ISTAT1_LIO3) {
+	if (mask & ISTAT1_LIO3) {
 		printk("WHee: Got an LIO3 irq, winging it...\n");
 		mask2 = ioc_icontrol->vmeistat;
 		mask2 &= ioc_icontrol->cmeimask1;
 		irq = lc3msk_to_irqnr[ioc_icontrol->vmeistat];
-		action = local_irq_action[irq];
 	} else {
 		irq = lc1msk_to_irqnr[mask];
-		action = local_irq_action[irq];
 	}
+
 	/* if irq == 0, then the interrupt has already been cleared */
 	/* not sure if it is needed here, but it is needed for local0 */
-	if ( irq == 0 ) { goto end; }
-	/* if action == NULL, then we do have a handler for the irq */
-	if ( action == NULL ) { goto no_handler; }
-	
-	irq_enter(cpu);
-	kstat.irqs[0][irq + 24]++;
-	action->handler(irq, action->dev_id, regs);
-	irq_exit(cpu);
+	if (irq == 0)
+		goto end;
+
+	do_IRQ(irq, regs);
 	goto end;
 	
 no_handler:
@@ -520,27 +417,16 @@
 	int cpu = smp_processor_id();
 	int irq = 6;
 
-	irq_enter(cpu);
+	irq_enter(cpu, irq);
 	kstat.irqs[0][irq]++;
 	printk("Got a bus error IRQ, shouldn't happen yet\n");
 	show_regs(regs);
 	printk("Spinning...\n");
 	while(1);
-	irq_exit(cpu);
-}
-
-/* Misc. crap just to keep the kernel linking... */
-unsigned long probe_irq_on (void)
-{
-	return 0;
+	irq_exit(cpu, irq);
 }
 
-int probe_irq_off (unsigned long irqs)
-{
-	return 0;
-}
-
-void __init sgint_init(void)
+void __init init_IRQ(void)
 {
 	int i;
 
@@ -548,43 +434,43 @@
 	sgi_i3regs = (struct sgi_int3_regs *) (KSEG1 + SGI_INT3_BASE);
 
 	/* Init local mask --> irq tables. */
-	for(i = 0; i < 256; i++) {
-		if(i & 0x80) {
+	for (i = 0; i < 256; i++) {
+		if (i & 0x80) {
 			lc0msk_to_irqnr[i] = 7;
 			lc1msk_to_irqnr[i] = 15;
 			lc2msk_to_irqnr[i] = 23;
 			lc3msk_to_irqnr[i] = 31;
-		} else if(i & 0x40) {
+		} else if (i & 0x40) {
 			lc0msk_to_irqnr[i] = 6;
 			lc1msk_to_irqnr[i] = 14;
 			lc2msk_to_irqnr[i] = 22;
 			lc3msk_to_irqnr[i] = 30;
-		} else if(i & 0x20) {
+		} else if (i & 0x20) {
 			lc0msk_to_irqnr[i] = 5;
 			lc1msk_to_irqnr[i] = 13;
 			lc2msk_to_irqnr[i] = 21;
 			lc3msk_to_irqnr[i] = 29;
-		} else if(i & 0x10) {
+		} else if (i & 0x10) {
 			lc0msk_to_irqnr[i] = 4;
 			lc1msk_to_irqnr[i] = 12;
 			lc2msk_to_irqnr[i] = 20;
 			lc3msk_to_irqnr[i] = 28;
-		} else if(i & 0x08) {
+		} else if (i & 0x08) {
 			lc0msk_to_irqnr[i] = 3;
 			lc1msk_to_irqnr[i] = 11;
 			lc2msk_to_irqnr[i] = 19;
 			lc3msk_to_irqnr[i] = 27;
-		} else if(i & 0x04) {
+		} else if (i & 0x04) {
 			lc0msk_to_irqnr[i] = 2;
 			lc1msk_to_irqnr[i] = 10;
 			lc2msk_to_irqnr[i] = 18;
 			lc3msk_to_irqnr[i] = 26;
-		} else if(i & 0x02) {
+		} else if (i & 0x02) {
 			lc0msk_to_irqnr[i] = 1;
 			lc1msk_to_irqnr[i] = 9;
 			lc2msk_to_irqnr[i] = 17;
 			lc3msk_to_irqnr[i] = 25;
-		} else if(i & 0x01) {
+		} else if (i & 0x01) {
 			lc0msk_to_irqnr[i] = 0;
 			lc1msk_to_irqnr[i] = 8;
 			lc2msk_to_irqnr[i] = 16;
@@ -614,6 +500,29 @@
 	ioc_icontrol->cmeimask0 = 0;
 	ioc_icontrol->cmeimask1 = 0;
 
-	/* Now safe to set the exception vector. */
 	set_except_vector(0, indyIRQ);
+
+	init_generic_irq();
+
+	for (i = SGINT_LOCAL0; i < SGINT_END; i++) {
+		hw_irq_controller *handler;
+
+		if (i < SGINT_LOCAL1)
+			handler		= &ip22_local0_irq_type;
+		else if (i < SGINT_LOCAL2)
+			handler		= &ip22_local1_irq_type;
+		else if (i < SGINT_LOCAL3)
+			handler		= &ip22_local2_irq_type;
+		else if (i < SGINT_GIO)
+			handler		= &ip22_local3_irq_type;
+		else if (i < SGINT_HPCDMA)
+			handler		= &ip22_gio_irq_type;
+		else if (i < SGINT_END)
+			handler		= &ip22_hpcdma_irq_type;
+
+		irq_desc[i].status	= IRQ_DISABLED;
+		irq_desc[i].action	= 0;
+		irq_desc[i].depth	= 1;
+		irq_desc[i].handler	= handler;
+	}
 }
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_rtc.c linux/arch/mips/sgi/kernel/indy_rtc.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_rtc.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/sgi/kernel/indy_rtc.c	Mon Dec  3 23:08:46 2001
@@ -1,12 +1,11 @@
-/* $Id: indy_rtc.c,v 1.1 1998/06/30 00:21:58 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
  * RTC routines for Indy style attached Dallas chip.
  *
- * Copyright (C) 1998 by Ralf Baechle
+ * Copyright (C) 1998, 2001 by Ralf Baechle
  */
 #include <linux/mc146818rtc.h>
 #include <asm/sgi/sgihpc.h>
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_sc.c linux/arch/mips/sgi/kernel/indy_sc.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_sc.c	Tue Mar  6 19:44:36 2001
+++ linux/arch/mips/sgi/kernel/indy_sc.c	Mon Dec  3 23:08:46 2001
@@ -1,8 +1,7 @@
-/* $Id: indy_sc.c,v 1.14 2000/03/25 22:35:07 ralf Exp $
- *
+/*
  * indy_sc.c: Indy cache management functions.
  *
- * Copyright (C) 1997 Ralf Baechle (ralf@gnu.org),
+ * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org),
  * derived from r4xx0.c by David S. Miller (dm@engr.sgi.com).
  */
 #include <linux/init.h>
@@ -34,30 +33,30 @@
 {
 	unsigned long tmp;
 
-	__asm__ __volatile__("
-		.set	noreorder
-		.set	mips3
-		.set	noat
-		mfc0	%2, $12
-		li	$1, 0x80	# Go 64 bit
-		mtc0	$1, $12
-
-		dli	$1, 0x9000000080000000
-		or	%0, $1		# first line to flush
-		or	%1, $1		# last line to flush
-		.set	at
-
-1:		sw	$0, 0(%0)
-		bne	%0, %1, 1b
-		daddu	%0, 32
-
-		mtc0	%2, $12		# Back to 32 bit
-		nop; nop; nop; nop;
-		.set mips0
-		.set reorder"
-		: "=r" (first), "=r" (last), "=&r" (tmp)
-		: "0" (first), "1" (last)
-		: "$1");
+	__asm__ __volatile__(
+	".set\tnoreorder\t\t\t# indy_sc_wipe\n\t"
+	".set\tmips3\n\t"
+	".set\tnoat\n\t"
+	"mfc0\t%2, $12\n\t"
+	"li\t$1, 0x80\t\t\t# Go 64 bit\n\t"
+	"mtc0\t$1, $12\n\t"
+
+	"dli\t$1, 0x9000000080000000\n\t"
+	"or\t%0, $1\t\t\t# first line to flush\n\t"
+	"or\t%1, $1\t\t\t# last line to flush\n\t"
+	".set\tat\n\t"
+
+	"1:\tsw\t$0, 0(%0)\n\t"
+	"bne\t%0, %1, 1b\n\t"
+	"daddu\t%0, 32\n\t"
+
+	"mtc0\t%2, $12\t\t\t# Back to 32 bit\n\t"
+	"nop; nop; nop; nop;\n\t"
+	".set\tmips0\n\t"
+	".set\treorder"
+	: "=r" (first), "=r" (last), "=&r" (tmp)
+	: "0" (first), "1" (last)
+	: "$1");
 }
 
 static void indy_sc_wback_invalidate(unsigned long addr, unsigned long size)
@@ -96,27 +95,27 @@
 #ifdef DEBUG_CACHE
 	printk("Enabling R4600 SCACHE\n");
 #endif
-	__asm__ __volatile__("
-		.set	push
-		.set	noreorder
-		.set	mips3
-		mfc0	%2, $12
-		nop; nop; nop; nop;
-		li	%1, 0x80
-		mtc0	%1, $12
-		nop; nop; nop; nop;
-		li	%0, 0x1
-		dsll	%0, 31
-		lui	%1, 0x9000
-		dsll32	%1, 0
-		or	%0, %1, %0
-		sb	$0, 0(%0)
-		mtc0	$0, $12
-		nop; nop; nop; nop;
-		mtc0	%2, $12
-		nop; nop; nop; nop;
-		.set	pop"
-		: "=r" (tmp1), "=r" (tmp2), "=r" (addr));
+	__asm__ __volatile__(
+	".set\tpush\n\t"
+	".set\tnoreorder\n\t"
+	".set\tmips3\n\t"
+	"mfc0\t%2, $12\n\t"
+	"nop; nop; nop; nop;\n\t"
+	"li\t%1, 0x80\n\t"
+	"mtc0\t%1, $12\n\t"
+	"nop; nop; nop; nop;\n\t"
+	"li\t%0, 0x1\n\t"
+	"dsll\t%0, 31\n\t"
+	"lui\t%1, 0x9000\n\t"
+	"dsll32\t%1, 0\n\t"
+	"or\t%0, %1, %0\n\t"
+	"sb\t$0, 0(%0)\n\t"
+	"mtc0\t$0, $12\n\t"
+	"nop; nop; nop; nop;\n\t"
+	"mtc0\t%2, $12\n\t"
+	"nop; nop; nop; nop;\n\t"
+	".set\tpop"
+	: "=r" (tmp1), "=r" (tmp2), "=r" (addr));
 }
 
 static void indy_sc_disable(void)
@@ -126,27 +125,27 @@
 #ifdef DEBUG_CACHE
 	printk("Disabling R4600 SCACHE\n");
 #endif
-	__asm__ __volatile__("
-		.set	push
-		.set	noreorder
-		.set	mips3
-		li	%0, 0x1
-		dsll	%0, 31
-		lui	%1, 0x9000
-		dsll32	%1, 0
-		or	%0, %1, %0
-		mfc0	%2, $12
-		nop; nop; nop; nop;
-		li	%1, 0x80
-		mtc0	%1, $12
-		nop; nop; nop; nop;
-		sh	$0, 0(%0)
-		mtc0	$0, $12
-		nop; nop; nop; nop;
-		mtc0	%2, $12
-		nop; nop; nop; nop;
-		.set	pop"
-		: "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));
+	__asm__ __volatile__(
+	".set\tpush\n\t"
+	".set\tnoreorder\n\t"
+	".set\tmips3\n\t"
+	"li\t%0, 0x1\n\t"
+	"dsll\t%0, 31\n\t"
+	"lui\t%1, 0x9000\n\t"
+	"dsll32\t%1, 0\n\t"
+	"or\t%0, %1, %0\n\t"
+	"mfc0\t%2, $12\n\t"
+	"nop; nop; nop; nop\n\t"
+	"li\t%1, 0x80\n\t"
+	"mtc0\t%1, $12\n\t"
+	"nop; nop; nop; nop\n\t"
+	"sh\t$0, 0(%0)\n\t"
+	"mtc0\t$0, $12\n\t"
+	"nop; nop; nop; nop\n\t"
+	"mtc0\t%2, $12\n\t"
+	"nop; nop; nop; nop\n\t"
+	".set\tpop"
+	: "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));
 }
 
 static inline int __init indy_sc_probe(void)
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_timer.c linux/arch/mips/sgi/kernel/indy_timer.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/indy_timer.c	Mon Oct 16 12:58:51 2000
+++ linux/arch/mips/sgi/kernel/indy_timer.c	Wed Dec 31 16:00:00 1969
@@ -1,266 +0,0 @@
-/* $Id: indy_timer.c,v 1.17 2000/01/21 22:34:03 ralf Exp $
- *
- * indy_timer.c: Setting up the clock on the INDY 8254 controller.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copytight (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
- */
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/kernel_stat.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/ptrace.h>
-#include <asm/system.h>
-#include <asm/sgialib.h>
-#include <asm/sgi/sgi.h>
-#include <asm/sgi/sgihpc.h>
-#include <asm/sgi/sgint23.h>
-
-
-/* Because of a bug in the i8254 timer we need to use the onchip r4k
- * counter as our system wide timer interrupt running at 100HZ.
- */
-static unsigned long r4k_offset; /* Amount to increment compare reg each time */
-static unsigned long r4k_cur;    /* What counter should be at next timer irq */
-
-extern rwlock_t xtime_lock;
-
-static inline void ack_r4ktimer(unsigned long newval)
-{
-	write_32bit_cp0_register(CP0_COMPARE, newval);
-}
-
-static int set_rtc_mmss(unsigned long nowtime)
-{
-	struct indy_clock *clock = (struct indy_clock *)INDY_CLOCK_REGS;
-	int retval = 0;
-	int real_seconds, real_minutes, clock_minutes;
-
-#define FROB_FROM_CLOCK(x) (((x) & 0xf) | ((((x) & 0xf0) >> 4) * 10));
-#define FROB_TO_CLOCK(x)  ((((((x) & 0xff) / 10)<<4) | (((x) & 0xff) % 10)) & 0xff)
-
-	clock->cmd &= ~(0x80);
-	clock_minutes = clock->min;
-	clock->cmd |= (0x80);
-
-	clock_minutes = FROB_FROM_CLOCK(clock_minutes);
-	real_seconds = nowtime % 60;
-	real_minutes = nowtime / 60;
-
-	if(((abs(real_minutes - clock_minutes) + 15)/30) & 1)
-		real_minutes += 30; /* correct for half hour time zone */
-
-	real_minutes %= 60;
-	if(abs(real_minutes - clock_minutes) < 30) {
-		/* Force clock oscillator to be on. */
-		clock->month &= ~(0x80);
-
-		/* Write real_seconds and real_minutes into the Dallas. */
-		clock->cmd &= ~(0x80);
-		clock->sec = real_seconds;
-		clock->min = real_minutes;
-		clock->cmd |= (0x80);
-	} else
-		return -1;
-
-#undef FROB_FROM_CLOCK
-#undef FROB_TO_CLOCK
-
-	return retval;
-}
-
-static long last_rtc_update;
-unsigned long missed_heart_beats;
-
-void indy_timer_interrupt(struct pt_regs *regs)
-{
-	unsigned long count;
-	int irq = 7;
-
-	write_lock(&xtime_lock);
-	/* Ack timer and compute new compare. */
-	count = read_32bit_cp0_register(CP0_COUNT);
-	/* This has races.  */
-	if ((count - r4k_cur) >= r4k_offset) {
-		/* If this happens to often we'll need to compensate.  */
-		missed_heart_beats++;
-		r4k_cur = count + r4k_offset;
-	}
-        else
-            r4k_cur += r4k_offset;
-	ack_r4ktimer(r4k_cur);
-	kstat.irqs[0][irq]++;
-	do_timer(regs);
-
-	/* We update the Dallas time of day approx. every 11 minutes,
-	 * because of how the numbers work out we need to make
-	 * absolutely sure we do this update within 500ms before the
-	 * next second starts, thus the following code.
-	 */
-	if ((time_status & STA_UNSYNC) == 0 &&
-	    xtime.tv_sec > last_rtc_update + 660 &&
-	    xtime.tv_usec >= 500000 - (tick >> 1) &&
-	    xtime.tv_usec <= 500000 + (tick >> 1)) {
-		if (set_rtc_mmss(xtime.tv_sec) == 0)
-			last_rtc_update = xtime.tv_sec;
-		else
-			/* do it again in 60 s */
-			last_rtc_update = xtime.tv_sec - 600;
-	}
-	write_unlock(&xtime_lock);
-}
-
-static unsigned long dosample(volatile unsigned char *tcwp,
-                              volatile unsigned char *tc2p)
-{
-	unsigned long ct0, ct1;
-	unsigned char msb, lsb;
-
-	/* Start the counter. */
-	*tcwp = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | SGINT_TCWORD_MRGEN);
-	*tc2p = (SGINT_TCSAMP_COUNTER & 0xff);
-	*tc2p = (SGINT_TCSAMP_COUNTER >> 8);
-
-	/* Get initial counter invariant */
-	ct0 = read_32bit_cp0_register(CP0_COUNT);
-
-	/* Latch and spin until top byte of counter2 is zero */
-	do {
-		*tcwp = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT);
-		lsb = *tc2p;
-		msb = *tc2p;
-		ct1 = read_32bit_cp0_register(CP0_COUNT);
-	} while(msb);
-
-	/* Stop the counter. */
-	*tcwp = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | SGINT_TCWORD_MSWST);
-
-	/* Return the difference, this is how far the r4k counter increments
-	 * for every one HZ.
-	 */
-	return ct1 - ct0;
-}
-
-static unsigned long __init get_indy_time(void)
-{
-	struct indy_clock *clock = (struct indy_clock *)INDY_CLOCK_REGS;
-	unsigned int year, mon, day, hour, min, sec;
-
-	/* Freeze it. */
-	clock->cmd &= ~(0x80);
-
-	/* Read regs. */
-	sec = clock->sec;
-	min = clock->min;
-	hour = (clock->hr & 0x3f);
-	day = (clock->date & 0x3f);
-	mon = (clock->month & 0x1f);
-	year = clock->year;
-
-	/* Unfreeze clock. */
-	clock->cmd |= 0x80;
-
-	/* Frob the bits. */
-#define FROB1(x)  (((x) & 0xf) + ((((x) & 0xf0) >> 4) * 10));
-#define FROB2(x)  (((x) & 0xf) + (((((x) & 0xf0) >> 4) & 0x3) * 10));
-
-	/* XXX Should really check that secs register is the same
-	 * XXX as when we first read it and if not go back and
-	 * XXX read the regs above again.
-	 */
-	sec = FROB1(sec); min = FROB1(min); day = FROB1(day);
-	mon = FROB1(mon); year = FROB1(year);
-	hour = FROB2(hour);
-
-#undef FROB1
-#undef FROB2
-
-	/* Wheee... */
-	if(year < 45)
-		year += 30;
-	if ((year += 1940) < 1970)
-		year += 100;
-
-	return mktime(year, mon, day, hour, min, sec);
-}
-
-#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
-
-void __init indy_timer_init(void)
-{
-	struct sgi_ioc_timers *p;
-	volatile unsigned char *tcwp, *tc2p;
-
-	/* Figure out the r4k offset, the algorithm is very simple
-	 * and works in _all_ cases as long as the 8254 counter
-	 * register itself works ok (as an interrupt driving timer
-	 * it does not because of bug, this is why we are using
-	 * the onchip r4k counter/compare register to serve this
-	 * purpose, but for r4k_offset calculation it will work
-	 * ok for us).  There are other very complicated ways
-	 * of performing this calculation but this one works just
-	 * fine so I am not going to futz around. ;-)
-	 */
-	p = ioc_timers;
-	tcwp = &p->tcword;
-	tc2p = &p->tcnt2;
-
-	printk("calculating r4koff... ");
-	dosample(tcwp, tc2p);			/* First sample. */
-	dosample(tcwp, tc2p);			/* Eat one.	*/
-	r4k_offset = dosample(tcwp, tc2p);	/* Second sample. */
-
-	printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
-
-	r4k_cur = (read_32bit_cp0_register(CP0_COUNT) + r4k_offset);
-	write_32bit_cp0_register(CP0_COMPARE, r4k_cur);
-	set_cp0_status(ST0_IM, ALLINTS);
-	sti();
-
-	write_lock_irq(&xtime_lock);
-	xtime.tv_sec = get_indy_time();		/* Read time from RTC. */
-	xtime.tv_usec = 0;
-	write_unlock_irq(&xtime_lock);
-}
-
-void indy_8254timer_irq(void)
-{
-	int cpu = smp_processor_id();
-	int irq = 4;
-
-	irq_enter(cpu);
-	kstat.irqs[0][irq]++;
-	printk("indy_8254timer_irq: Whoops, should not have gotten this IRQ\n");
-	prom_getchar();
-	prom_imode();
-	irq_exit(cpu);
-}
-
-void do_gettimeofday(struct timeval *tv)
-{
-	unsigned long flags;
-
-	read_lock_irqsave(&xtime_lock, flags);
-	*tv = xtime;
-	read_unlock_irqrestore(&xtime_lock, flags);
-}
-
-void do_settimeofday(struct timeval *tv)
-{
-	write_lock_irq(&xtime_lock);
-	xtime = *tv;
-	time_state = TIME_BAD;
-	time_maxerror = MAXPHASE;
-	time_esterror = MAXPHASE;
-	write_unlock_irq(&xtime_lock);
-}
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/promcon.c linux/arch/mips/sgi/kernel/promcon.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/promcon.c	Thu Oct 12 14:20:48 2000
+++ linux/arch/mips/sgi/kernel/promcon.c	Wed Dec 31 16:00:00 1969
@@ -1,68 +0,0 @@
-/*
- * Wrap-around code for a console using the
- * SGI PROM io-routines.
- *
- * Copyright (c) 1999 Ulf Carlsson
- *
- * Derived from DECstation promcon.c
- * Copyright (c) 1998 Harald Koerfgen 
- */
-
-#include <linux/tty.h>
-#include <linux/major.h>
-#include <linux/ptrace.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/fs.h>
-
-#include <asm/sgialib.h>
-
-static void prom_console_write(struct console *co, const char *s,
-			       unsigned count)
-{
-    unsigned i;
-
-    /*
-     *    Now, do each character
-     */
-    for (i = 0; i < count; i++) {
-	if (*s == 10)
-	    prom_printf("%c", 13);
-	prom_printf("%c", *s++);
-    }
-}
-
-static int prom_console_wait_key(struct console *co)
-{
-    return prom_getchar();
-}
-
-static int __init prom_console_setup(struct console *co, char *options)
-{
-    return 0;
-}
-
-static kdev_t prom_console_device(struct console *c)
-{
-    return MKDEV(TTY_MAJOR, 64 + c->index);
-}
-
-static struct console sercons =
-{
-    name:	"ttyS",
-    write:	prom_console_write,
-    device:	prom_console_device,
-    wait_key:	prom_console_wait_key,
-    setup:	prom_console_setup,
-    flags:	CON_PRINTBUFFER,
-    index:	-1,
-};
-
-/*
- *    Register console.
- */
-
-void __init sgi_prom_console_init(void )
-{
-    register_console(&sercons);
-}
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/reset.c linux/arch/mips/sgi/kernel/reset.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/reset.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/sgi/kernel/reset.c	Mon Dec  3 23:08:46 2001
@@ -1,12 +1,9 @@
-/* $Id: reset.c,v 1.7 1999/08/11 20:26:51 andrewb Exp $
- *
- * Reset a SGI.
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1997, 1998 by Ralf Baechle
+ * Copyright (C) 1997, 1998, 2001 by Ralf Baechle
  */
 #include <linux/kernel.h>
 #include <linux/sched.h>
@@ -54,7 +51,7 @@
 {
 	if (shuting_down)
 		sgi_machine_power_off();
-	prom_imode();
+	ArcEnterInteractiveMode();
 }
 
 static void sgi_machine_power_off(void)
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/setup.c linux/arch/mips/sgi/kernel/setup.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/setup.c	Tue Mar  6 19:44:36 2001
+++ linux/arch/mips/sgi/kernel/setup.c	Mon Dec  3 23:08:46 2001
@@ -24,6 +24,7 @@
 #include <asm/sgi/sgimc.h>
 #include <asm/sgi/sgihpc.h>
 #include <asm/sgi/sgint23.h>
+#include <asm/time.h>
 #include <asm/gdb-stub.h>
 
 #ifdef CONFIG_REMOTE_DEBUG
@@ -32,7 +33,7 @@
 static int remote_debug = 0;
 #endif
 
-#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_SGI_PROM_CONSOLE)
+#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_ARC_CONSOLE)
 extern void console_setup(char *);
 #endif
 
@@ -117,28 +118,6 @@
 	sgi_read_status
 };
 
-static void __init sgi_irq_setup(void)
-{
-	sgint_init();
-
-#ifdef CONFIG_REMOTE_DEBUG
-	if (remote_debug)
-		set_debug_traps();
-	breakpoint(); /* you may move this line to whereever you want :-) */
-#endif
-}
-
-int __init page_is_ram(unsigned long pagenr)
-{
-	if ((pagenr<<PAGE_SHIFT) < 0x2000UL)
-		return 1;
-	if ((pagenr<<PAGE_SHIFT) > 0x08002000)
-		return 1;
-	return 0;
-}
-
-void (*board_time_init)(struct irqaction *irq);
-
 static unsigned long dosample(volatile unsigned char *tcwp,
                               volatile unsigned char *tc2p)
 {
@@ -161,14 +140,16 @@
                 ct1 = read_32bit_cp0_register(CP0_COUNT);
         } while(msb);
 
-        /* Stop the counter. */
-        *tcwp = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | SGINT_TCWORD_MSWST);
+	/* Stop the counter. */
+	*tcwp = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | SGINT_TCWORD_MSWST);
 
-        /* Return the difference, this is how far the r4k counter increments
-         * for every 1/HZ seconds. We round off the nearest 1 MHz of
-	 * master clock (= 1000000 / 100 / 2 = 5000 count).
-         */
-        return ((ct1 - ct0) / 5000) * 5000;
+	/*
+	 * Return the difference, this is how far the r4k counter increments
+	 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
+	 * clock (= 1000000 / 100 / 2 = 5000 count).
+	 */
+
+	return ((ct1 - ct0) / 5000) * 5000;
 }
 
 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
@@ -180,7 +161,7 @@
 	 */
         struct sgi_ioc_timers *p;
         volatile unsigned char *tcwp, *tc2p;
-	unsigned long r4k_ticks[3] = { 0, 0, 0 };
+	unsigned long r4k_ticks[3];
 	unsigned long r4k_next;
 
         /* Figure out the r4k offset, the algorithm is very simple
@@ -201,10 +182,12 @@
         dosample(tcwp, tc2p);                   /* Prime cache. */
         dosample(tcwp, tc2p);                   /* Prime cache. */
 	/* Zero is NOT an option. */
-	while (!r4k_ticks[0])
+	do {
 		r4k_ticks[0] = dosample (tcwp, tc2p);
-	while (!r4k_ticks[1])
+	} while (!r4k_ticks[0]);
+	do {
 		r4k_ticks[1] = dosample (tcwp, tc2p);
+	} while (!r4k_ticks[1]);
 
 	if (r4k_ticks[0] != r4k_ticks[1]) {
 		printk ("warning: timer counts differ, retrying...");
@@ -226,7 +209,7 @@
 	/* Set ourselves up for future interrupts */
         r4k_next = (read_32bit_cp0_register(CP0_COUNT) + r4k_interval);
         write_32bit_cp0_register(CP0_COMPARE, r4k_next);
-        set_cp0_status(ST0_IM, ALLINTS);
+        change_cp0_status(ST0_IM, ALLINTS);
 	sti ();
 }
 
@@ -239,8 +222,6 @@
 	char *kgdb_ttyd;
 #endif
 
-
-	irq_setup = sgi_irq_setup;
 	board_time_init = sgi_time_init;
 
 	/* Init the INDY HPC I/O controller.  Need to call this before
@@ -282,7 +263,7 @@
 		       line ? 1 : 2);
 		rs_kgdb_hook(line);
 
-		prom_printf("KGDB: Using serial line /dev/ttyd%d for session, "
+		printk("KGDB: Using serial line /dev/ttyd%d for session, "
 			    "please connect your debugger\n", line ? 1 : 2);
 
 		remote_debug = 1;
@@ -290,7 +271,7 @@
 	}
 #endif
 
-#ifdef CONFIG_SGI_PROM_CONSOLE
+#ifdef CONFIG_ARC_CONSOLE
 	console_setup("ttyS0");
 #endif
  
@@ -324,5 +305,4 @@
 #ifdef CONFIG_VIDEO_VINO
 	init_vino();
 #endif
-
 }
diff -urN linux-2.4.10-pre6/arch/mips/sgi/kernel/time.c linux/arch/mips/sgi/kernel/time.c
--- linux-2.4.10-pre6/arch/mips/sgi/kernel/time.c	Sun Jul  9 22:18:15 2000
+++ linux/arch/mips/sgi/kernel/time.c	Mon Dec  3 23:08:46 2001
@@ -9,13 +9,13 @@
 
 void indy_8254timer_irq(void)
 {
-        int cpu = smp_processor_id();
-        int irq = 4;
+	int cpu = smp_processor_id();
+	int irq = 4;
 
-        irq_enter(cpu);
-        kstat.irqs[0][irq]++;
-        printk("indy_8254timer_irq: Whoops, should not have gotten this IRQ\n");
-        prom_getchar();
-        prom_imode();
-        irq_exit(cpu);
+	irq_enter(cpu, irq);
+	kstat.irqs[0][irq]++;
+	printk("indy_8254timer_irq: Whoops, should not have gotten this IRQ\n");
+	prom_getchar();
+	ArcEnterInteractiveMode();
+	irq_exit(cpu, irq);
 }
diff -urN linux-2.4.10-pre6/arch/mips/sni/dma.c linux/arch/mips/sni/dma.c
--- linux-2.4.10-pre6/arch/mips/sni/dma.c	Sat May 13 08:29:14 2000
+++ linux/arch/mips/sni/dma.c	Wed Dec 31 16:00:00 1969
@@ -1,42 +0,0 @@
-/* $Id: dma.c,v 1.1 2000/02/18 00:24:30 ralf Exp $
- *
- * Dynamic DMA mapping support.
- *
- * On RM200 there is no hardware dynamic DMA address translation,
- * so consistent alloc/free are merely page allocation/freeing.
- * The rest of the dynamic DMA mapping interface is implemented
- * in <asm/pci.h>.
- *
- * These routines assume that the RM has all it's memory at physical
- * addresses of < 512mb.
- */
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/string.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-
-void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
-			   dma_addr_t *dma_handle)
-{
-	void *ret;
-	int gfp = GFP_ATOMIC;
-	int order = get_order(size);
-
-	if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
-		gfp |= GFP_DMA;
-	ret = (void *)__get_free_pages(gfp, order);
-
-	if (ret != NULL) {
-		memset(ret, 0, size);
-		*dma_handle = virt_to_bus(ret);
-	}
-	dma_cache_wback_inv(ret, PAGE_SIZE << order);
-	return KSEG1ADDR(ret);
-}
-
-void pci_free_consistent(struct pci_dev *hwdev, size_t size,
-			 void *vaddr, dma_addr_t dma_handle)
-{
-	free_pages((unsigned long)vaddr, get_order(size));
-}
diff -urN linux-2.4.10-pre6/arch/mips/sni/int-handler.S linux/arch/mips/sni/int-handler.S
--- linux-2.4.10-pre6/arch/mips/sni/int-handler.S	Sat May 13 08:29:14 2000
+++ linux/arch/mips/sni/int-handler.S	Mon Dec  3 23:08:46 2001
@@ -1,8 +1,7 @@
-/* $Id: int-handler.S,v 1.4 1999/01/04 16:03:58 ralf Exp $
- *
+/*
  * SNI RM200 PCI specific interrupt handler code.
  *
- * Copyright (C) 1994 - 1997 by Ralf Baechle
+ * Copyright (C) 1994, 95, 96, 97, 98, 1999, 2000 by Ralf Baechle
  */
 #include <asm/asm.h>
 #include <asm/mipsregs.h>
@@ -37,22 +36,14 @@
 		mfc0	t1, CP0_CAUSE
 		and	t0, t1
 
-		/* The following interrupt dispatch tests for hwint 1 /
-		   EISA bridge first such that the timer interrupt get the
-		   highest priority.  */
-		 andi	t1, t0, 0x0800			# hardware interrupt 1
-		bnez	t1, hwint1
-		 andi	t1, t0, 0x4000			# hardware interrupt 4
-		bnez	t1, hwint4
-
+		 andi	t1, t0, 0x4a00			# hardware interrupt 1
+		bnez	t1, _hwint134
 		 andi	t1, t0, 0x1000			# hardware interrupt 2
-		bnez	t1, hwint2
-		 andi	t1, t0, 0x2000			# hardware interrupt 3
-		bnez	t1, hwint3
+		bnez	t1, _hwint2
 		 andi	t1, t0, 0x8000			# hardware interrupt 5
-		bnez	t1, hwint5
+		bnez	t1, _hwint5
 		 andi	t1, t0, 0x0400			# hardware interrupt 0
-		bnez	t1, hwint0
+		bnez	t1, _hwint0
 		 nop
 
 		j	return				# spurious interrupt
@@ -60,66 +51,23 @@
 
  ##############################################################################
 
-swint0:		PANIC("swint0")
-swint1:		PANIC("swint1")
-
- /* ------------------------------------------------------------------------ */
-
-/* hwint1 deals with EISA and SCSI interrupts.  */
-hwint1:		lbu	s0, PCIMT_CSITPEND
-
-		andi	t1, s0, 0x20
-		beqz	t1, 1f
-		 andi	s1, s0, 0x40
-		lbu	a0, PCIMT_INT_ACKNOWLEDGE	# IACK cycle
-		xori	t0, a0, 0xff
-		beqz	t0, 1f				# spurious interrupt?
-		 nop
-		jal	i8259_do_irq			# call real handler
-		 move	a1, sp
-
-1:		bnez	s1, 1f
-		 li	a0, PCIMT_IRQ_SCSI
-		jal	do_IRQ
-		 move	a1, sp
-
-1:		lui	t0, %hi(PCIMT_CSITPEND)
-		j	ret_from_irq
-		 lbu	zero, %lo(PCIMT_CSITPEND)(t0)
-
- /* ------------------------------------------------------------------------ */
-
 /* hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug
    button interrupts.  */
-hwint0:		PANIC("Received int0 but no handler yet ...\n")
-1:		j	1b
-		 nop
-
-go_spurious:	j	spurious_interrupt		# we got fooled
-		 nop
-
-/* hwint4 is used for only the onboard PCnet 32.  */
-hwint4:		mfc0	s0, CP0_STATUS
-		ori	t0, s0, 0x4000
-		xori	t0, 0x4000
-		mtc0	t0, CP0_STATUS
-
-		li	a0, PCIMT_IRQ_ETHERNET
-		jal	do_IRQ
+_hwint0:	jal	pciasic_hwint0
 		 move	a1, sp
 
-		mtc0	s0, CP0_STATUS
+/*
+ * hwint 1 deals with EISA and SCSI interrupts,
+ * hwint 3 should deal with the PCI A - D interrupts,
+ * hwint 4 is used for only the onboard PCnet 32.
+ */
+_hwint134:	jal	pciasic_hwint134
 
-		j	ret_from_irq
-		 nop
 
 /* This interrupt was used for the com1 console on the first prototypes.  */
-hwint2:		PANIC("hwint2 and no handler yet")
-
-/* hwint3 should deal with the PCI A - D interrupts.  */
-hwint3:		PANIC("hwint3 and no handler yet")
+_hwint2:	jal	pciasic_hwint2
 
 /* hwint5 is the r4k count / compare interrupt  */
-hwint5:		PANIC("hwint5 and no handler yet")
+_hwint5:	jal	pciasic_hwint5
 
 		END(sni_rm200_pci_handle_int)
diff -urN linux-2.4.10-pre6/arch/mips/sni/irq.c linux/arch/mips/sni/irq.c
--- linux-2.4.10-pre6/arch/mips/sni/irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips/sni/irq.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,159 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 Linus Torvalds
+ * Copyright (C) 1994 - 2000 Ralf Baechle
+ */
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
+
+#include <asm/io.h>
+#include <asm/sni.h>
+
+spinlock_t pciasic_lock = SPIN_LOCK_UNLOCKED;
+
+extern asmlinkage void sni_rm200_pci_handle_int(void);
+extern void do_IRQ(int irq, struct pt_regs *regs);
+
+static void enable_pciasic_irq(unsigned int irq);
+
+static unsigned int startup_pciasic_irq(unsigned int irq)
+{
+	enable_pciasic_irq(irq);
+	return 0; /* never anything pending */
+}
+
+#define shutdown_pciasic_irq	disable_pciasic_irq
+
+void disable_pciasic_irq(unsigned int irq)
+{
+	unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2));
+	unsigned long flags;
+
+	spin_lock_irqsave(&pciasic_lock, flags);
+	*(volatile u8 *) PCIMT_IRQSEL &= mask;
+	spin_unlock_irqrestore(&pciasic_lock, flags);
+}
+
+static void enable_pciasic_irq(unsigned int irq)
+{
+	unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2);
+	unsigned long flags;
+
+	spin_lock_irqsave(&pciasic_lock, flags);
+	*(volatile u8 *) PCIMT_IRQSEL |= mask;
+	spin_unlock_irqrestore(&pciasic_lock, flags);
+}
+
+#define mask_and_ack_pciasic_irq disable_pciasic_irq
+
+static void end_pciasic_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_pciasic_irq(irq);
+}
+
+static struct hw_interrupt_type pciasic_irq_type = {
+	"PCIASIC",
+	startup_pciasic_irq,
+	shutdown_pciasic_irq,
+	enable_pciasic_irq,
+	disable_pciasic_irq,
+	mask_and_ack_pciasic_irq,
+	end_pciasic_irq,
+	NULL
+};
+
+/*
+ * hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug
+ * button interrupts.  Later ...
+ */
+void pciasic_hwint0(struct pt_regs *regs)
+{
+	panic("Received int0 but no handler yet ...");
+}
+
+/* This interrupt was used for the com1 console on the first prototypes.  */
+void pciasic_hwint2(struct pt_regs *regs)
+{
+	/* I think this shouldn't happen on production machines.  */
+	panic("hwint2 and no handler yet");
+}
+
+/* hwint5 is the r4k count / compare interrupt  */
+void pciasic_hwint5(struct pt_regs *regs)
+{
+	panic("hwint5 and no handler yet");
+}
+
+static inline int ls1bit8(unsigned int x)
+{
+	int b = 8, s;
+
+	x <<= 24;
+	s = 4; if ((x & 0x0f) == 0) s = 0; b -= s; x <<= s;
+	s = 2; if ((x & 0x03) == 0) s = 0; b -= s; x <<= s;
+	s = 1; if ((x & 0x01) == 0) s = 0; b -= s;
+
+	return b;
+}
+
+/*
+ * hwint 1 deals with EISA and SCSI interrupts,
+ * hwint 3 should deal with the PCI A - D interrupts,
+ * hwint 4 is used for only the onboard PCnet 32.
+ */
+void pciasic_hwint134(struct pt_regs *regs)
+{
+	u8 pend = *(volatile char *)PCIMT_CSITPEND;
+	int irq;
+
+	irq = PCIMT_IRQ_INT2 + ls1bit8(pend);
+	if (irq == PCIMT_IRQ_EISA) {
+		pend = *(volatile char *)PCIMT_INT_ACKNOWLEDGE;
+		if (!(pend ^ 0xff))
+			return;
+	}
+	do_IRQ(irq, regs);
+	return;
+}
+
+void __init init_pciasic(void)
+{
+	unsigned int flags;
+
+	spin_lock_irqsave(&pciasic_lock, flags);
+	* (volatile u8 *) PCIMT_IRQSEL =
+		IT_EISA | IT_INTA | IT_INTB | IT_INTC | IT_INTD;
+	spin_unlock_irqrestore(&pciasic_lock, flags);
+}
+
+/*
+ * On systems with i8259-style interrupt controllers we assume for
+ * driver compatibility reasons interrupts 0 - 15 to be the i8295
+ * interrupts even if the hardware uses a different interrupt numbering.
+ */
+void __init init_IRQ (void)
+{
+	int i;
+
+	set_except_vector(0, sni_rm200_pci_handle_int);
+
+	init_generic_irq();
+	init_i8259_irqs();			/* Integrated i8259  */
+	init_pciasic();
+
+	/* Actually we've got more interrupts to handle ...  */
+	for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_ETHERNET; i++) {
+		irq_desc[i].status     = IRQ_DISABLED;
+		irq_desc[i].action     = 0;
+		irq_desc[i].depth      = 1;
+		irq_desc[i].handler    = &pciasic_irq_type;
+	}
+}
diff -urN linux-2.4.10-pre6/arch/mips/sni/pci.c linux/arch/mips/sni/pci.c
--- linux-2.4.10-pre6/arch/mips/sni/pci.c	Mon Aug  7 14:31:40 2000
+++ linux/arch/mips/sni/pci.c	Mon Dec  3 23:08:46 2001
@@ -203,6 +203,11 @@
 {
 }
 
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 0;
+}
+
 char * __init
 pcibios_setup(char *str)
 {
diff -urN linux-2.4.10-pre6/arch/mips/sni/setup.c linux/arch/mips/sni/setup.c
--- linux-2.4.10-pre6/arch/mips/sni/setup.c	Sun Jul  9 22:18:15 2000
+++ linux/arch/mips/sni/setup.c	Mon Dec  3 23:08:46 2001
@@ -31,18 +31,6 @@
 #include <asm/reboot.h>
 #include <asm/sni.h>
 
-/*
- * Initial irq handlers.
- */
-static void no_action(int cpl, void *dev_id, struct pt_regs *regs) { }
-
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2  = { no_action, 0, 0, "cascade", NULL, NULL};
-
-extern asmlinkage void sni_rm200_pci_handle_int(void);
-
 extern void sni_machine_restart(char *command);
 extern void sni_machine_halt(void);
 extern void sni_machine_power_off(void);
@@ -51,20 +39,6 @@
 extern struct rtc_ops std_rtc_ops;
 extern struct kbd_ops std_kbd_ops;
 
-static void __init sni_irq_setup(void)
-{
-	set_except_vector(0, sni_rm200_pci_handle_int);
-	request_region(0x20,0x20, "pic1");
-	request_region(0xa0,0x20, "pic2");	
-	i8259_setup_irq(2, &irq2);
-	/*
-	 * IRQ0 seems to be the irq for PC style stuff.
-	 * I don't know how to handle the debug button interrupt, so
-	 * don't use this button yet or bad things happen ...
-	 */
-	set_cp0_status(ST0_IM, IE_IRQ1 | IE_IRQ3 | IE_IRQ4);
-}
-
 void (*board_time_init)(struct irqaction *irq);
 
 static void __init sni_rm200_pci_time_init(struct irqaction *irq)
@@ -73,7 +47,7 @@
 	outb_p(0x34,0x43);		/* binary, mode 2, LSB/MSB, ch 0 */
 	outb_p(LATCH & 0xff , 0x40);	/* LSB */
 	outb(LATCH >> 8 , 0x40);	/* MSB */
-	i8259_setup_irq(0, irq);
+	setup_irq(0, irq);
 }
 
 unsigned char aux_device_present;
@@ -101,45 +75,11 @@
 	printk("%s.\n", boardtype);
 }
 
-int __init page_is_ram(unsigned long pagenr)
-{
-	return 1;
-}
-
 void __init sni_rm200_pci_setup(void)
 {
-#if 0 /* XXX Tag me deeper  */
-	tag *atag;
-
-	/*
-	 * We just check if a tag_screen_info can be gathered
-	 * in setup_arch(), if yes we don't proceed futher...
-	 */
-	atag = bi_TagFind(tag_screen_info);
-	if (!atag) {
-		/*
-		 * If no, we try to find the tag_arc_displayinfo which is
-		 * always created by Milo for an ARC box (for now Milo only
-		 * works on ARC boxes :) -Stoned.
-		 */
-		atag = bi_TagFind(tag_arcdisplayinfo);
-		if (atag) {
-			screen_info.orig_x = 
-				((mips_arc_DisplayInfo*)TAGVALPTR(atag))->cursor_x;
-			screen_info.orig_y = 
-				((mips_arc_DisplayInfo*)TAGVALPTR(atag))->cursor_y;
-			screen_info.orig_video_cols  = 
-				((mips_arc_DisplayInfo*)TAGVALPTR(atag))->columns;
-			screen_info.orig_video_lines  = 
-				((mips_arc_DisplayInfo*)TAGVALPTR(atag))->lines;
-		}
-	}
-#endif
-
 	sni_pcimt_detect();
 	sni_pcimt_sc_init();
 
-	irq_setup = sni_irq_setup;
 	mips_io_port_base = SNI_PORT_BASE;
 
 	/*
diff -urN linux-2.4.10-pre6/arch/mips64/Makefile linux/arch/mips64/Makefile
--- linux-2.4.10-pre6/arch/mips64/Makefile	Wed Jul  4 11:50:38 2001
+++ linux/arch/mips64/Makefile	Mon Dec  3 23:08:46 2001
@@ -84,7 +84,8 @@
 endif
 
 ifdef CONFIG_SGI_IP27
-LIBS          += arch/mips64/sgi-ip27/ip27.a arch/mips64/arc/arclib.a
+CORE_FILES    += arch/mips64/sgi-ip27/ip27.o
+LIBS          += arch/mips64/arc/arclib.a
 SUBDIRS       += arch/mips64/sgi-ip27 arch/mips64/arc
 #
 # Set LOADADDR to >= 0xc000000000300000 if you want to leave space for
@@ -97,6 +98,17 @@
 else
 LOADADDR      += 0x8001c000
 endif
+endif
+
+ifdef CONFIG_SGI_IP32
+LIBS		+= arch/mips64/sgi-ip32/ip32-kern.a arch/mips64/arc/arclib.a
+SUBDIRS		+= arch/mips64/sgi-ip32 arch/mips64/arc
+#
+# Set LOADADDR to >= 0x????????? if you want to leave space for symmon,
+# 0x80002000 for production kernels.  Note that the value must be
+# 16kb aligned or the handling of the current variable will break.
+#
+LOADADDR	+= 0x80002000
 endif
 
 #
diff -urN linux-2.4.10-pre6/arch/mips64/arc/env.c linux/arch/mips64/arc/env.c
--- linux-2.4.10-pre6/arch/mips64/arc/env.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/arc/env.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: env.c,v 1.4 1999/10/19 20:51:44 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/arc/file.c linux/arch/mips64/arc/file.c
--- linux-2.4.10-pre6/arch/mips64/arc/file.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/arc/file.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: file.c,v 1.3 1999/10/19 20:51:44 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/arc/init.c linux/arch/mips64/arc/init.c
--- linux-2.4.10-pre6/arch/mips64/arc/init.c	Mon Feb 28 07:18:20 2000
+++ linux/arch/mips64/arc/init.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: init.c,v 1.3 1999/11/19 23:29:05 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/arc/memory.c linux/arch/mips64/arc/memory.c
--- linux-2.4.10-pre6/arch/mips64/arc/memory.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/arc/memory.c	Mon Dec  3 23:08:46 2001
@@ -54,7 +54,8 @@
 	"FirmwarePermanent",
 	"FreeContiguous"
 };
-#define mtypes(a) (prom_flags & PROM_FLAG_ARCS) ? arcs_mtypes[a.arcs] : arc_mtypes[a.arc]
+#define mtypes(a) (prom_flags & PROM_FLAG_ARCS) ? arcs_mtypes[a.arcs] \
+						: arc_mtypes[a.arc]
 #endif
 
 static inline int memtype_classify_arcs (union linux_memtypes type)
@@ -138,10 +139,8 @@
 	}
 }
 
-void __init
-prom_free_prom_memory (void)
+void __init prom_free_prom_memory (void)
 {
-	struct prom_pmemblock *p;
 	unsigned long freed = 0;
 	unsigned long addr;
 	int i;
@@ -160,5 +159,5 @@
 			freed += PAGE_SIZE;
 		}
 	}
-	printk("Freeing prom memory: %ldkb freed\n", freed >> 10);
+	printk(KERN_INFO "Freeing prom memory: %ldkb freed\n", freed >> 10);
 }
diff -urN linux-2.4.10-pre6/arch/mips64/arc/misc.c linux/arch/mips64/arc/misc.c
--- linux-2.4.10-pre6/arch/mips64/arc/misc.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/arc/misc.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: misc.c,v 1.2 1999/08/21 21:42:59 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/arc/salone.c linux/arch/mips64/arc/salone.c
--- linux-2.4.10-pre6/arch/mips64/arc/salone.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/arc/salone.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: salone.c,v 1.2 1999/08/21 21:42:59 ralf Exp $
- *
+/*
  * Routines to load into memory and execute stand-along program images using
  * ARCS PROM firmware.
  *
diff -urN linux-2.4.10-pre6/arch/mips64/arc/time.c linux/arch/mips64/arc/time.c
--- linux-2.4.10-pre6/arch/mips64/arc/time.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/arc/time.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: time.c,v 1.2 1999/08/21 21:42:59 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/arc/tree.c linux/arch/mips64/arc/tree.c
--- linux-2.4.10-pre6/arch/mips64/arc/tree.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/arc/tree.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: tree.c,v 1.3 1999/09/27 16:01:37 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/config.in linux/arch/mips64/config.in
--- linux-2.4.10-pre6/arch/mips64/config.in	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/config.in	Mon Dec  3 23:08:46 2001
@@ -41,6 +41,7 @@
 unset CONFIG_BOOT_ELF64
 unset CONFIG_COHERENT_IO
 unset CONFIG_ISA
+unset CONFIG_MAPPED_PCI_IO
 unset CONFIG_PCI
 
 if [ "$CONFIG_SGI_IP22" = "y" ]; then
@@ -56,6 +57,7 @@
    define_bool CONFIG_BOOT_ELF64 y
    define_bool CONFIG_ARC64 y
    define_bool CONFIG_COHERENT_IO y
+   define_bool CONFIG_MAPPED_PCI_IO y
    define_bool CONFIG_PCI y
    define_bool CONFIG_QL_ISP_A64 y
    define_int CONFIG_L1_CACHE_SHIFT 7
@@ -177,7 +179,7 @@
 fi
 endmenu
 
-source drivers/message/i2o/Config.in
+#source drivers/message/i2o/Config.in
 
 if [ "$CONFIG_NET" = "y" ]; then
    mainmenu_option next_comment
@@ -270,7 +272,7 @@
 fi
 bool 'Remote GDB kernel debugging' CONFIG_REMOTE_DEBUG
 bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ
-if [ "$CONFIG_SMP" != "n" ]; then
+if [ "$CONFIG_SMP" != "y" ]; then
    bool 'Run uncached' CONFIG_MIPS_UNCACHED
 fi
 endmenu
diff -urN linux-2.4.10-pre6/arch/mips64/defconfig linux/arch/mips64/defconfig
--- linux-2.4.10-pre6/arch/mips64/defconfig	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/defconfig	Mon Dec  3 23:08:46 2001
@@ -24,6 +24,7 @@
 CONFIG_BOOT_ELF64=y
 CONFIG_ARC64=y
 CONFIG_COHERENT_IO=y
+CONFIG_MAPPED_PCI_IO=y
 CONFIG_PCI=y
 CONFIG_QL_ISP_A64=y
 CONFIG_L1_CACHE_SHIFT=7
@@ -142,6 +143,7 @@
 #
 # CONFIG_PHONE is not set
 # CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
 
 #
 # ATA/IDE/MFM/RLL support
@@ -184,6 +186,7 @@
 # CONFIG_SCSI_AHA1740 is not set
 # CONFIG_SCSI_AIC7XXX is not set
 # CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
 # CONFIG_SCSI_AM53C974 is not set
@@ -201,6 +204,7 @@
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
 # CONFIG_SCSI_NCR53C7xx is not set
 # CONFIG_SCSI_NCR53C8XX is not set
 # CONFIG_SCSI_SYM53C8XX is not set
@@ -219,16 +223,6 @@
 # CONFIG_SCSI_U14_34F is not set
 
 #
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_PCI is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
 # Network device support
 #
 CONFIG_NETDEVICES=y
@@ -241,18 +235,22 @@
 # CONFIG_BONDING is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
 
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_SGI_IOC3_ETH=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_LANCE is not set
 # CONFIG_NET_VENDOR_SMC is not set
 # CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_DEPCA is not set
 # CONFIG_HP100 is not set
 # CONFIG_NET_ISA is not set
 # CONFIG_NET_PCI is not set
@@ -262,9 +260,14 @@
 # Ethernet (1000 Mbit)
 #
 # CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_FDDI is not set
+# CONFIG_PLIP is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
 
@@ -329,7 +332,11 @@
 #
 # Joysticks
 #
-# CONFIG_JOYSTICK is not set
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
 
 #
 # Input core support is needed for joysticks
@@ -367,24 +374,30 @@
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 # CONFIG_ISO9660_FS is not set
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -398,7 +411,6 @@
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -408,6 +420,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_ROOT_NFS=y
@@ -441,6 +454,7 @@
 # CONFIG_MINIX_SUBPARTITION is not set
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
 CONFIG_SGI_PARTITION=y
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
@@ -459,9 +473,107 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
@@ -469,4 +581,3 @@
 CONFIG_CROSSCOMPILE=y
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips64/defconfig-ip22 linux/arch/mips64/defconfig-ip22
--- linux-2.4.10-pre6/arch/mips64/defconfig-ip22	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/defconfig-ip22	Mon Dec  3 23:08:46 2001
@@ -149,6 +149,7 @@
 #
 # CONFIG_PHONE is not set
 # CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
 
 #
 # ATA/IDE/MFM/RLL support
@@ -193,6 +194,7 @@
 # CONFIG_SCSI_AHA1740 is not set
 # CONFIG_SCSI_AIC7XXX is not set
 # CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
 # CONFIG_SCSI_AM53C974 is not set
@@ -209,6 +211,7 @@
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
 # CONFIG_SCSI_NCR53C7xx is not set
 # CONFIG_SCSI_PAS16 is not set
 # CONFIG_SCSI_PCI2000 is not set
@@ -222,15 +225,6 @@
 # CONFIG_SCSI_DEBUG is not set
 
 #
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
 # Network device support
 #
 CONFIG_NETDEVICES=y
@@ -244,18 +238,20 @@
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 # CONFIG_ETHERTAP is not set
-# CONFIG_NET_SB1000 is not set
 
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_LANCE is not set
 # CONFIG_NET_VENDOR_SMC is not set
 # CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
 # CONFIG_NET_ISA is not set
 # CONFIG_NET_PCI is not set
 # CONFIG_NET_POCKET is not set
@@ -265,11 +261,15 @@
 # Ethernet (1000 Mbit)
 #
 # CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
 
@@ -336,7 +336,11 @@
 #
 # Joysticks
 #
-# CONFIG_JOYSTICK is not set
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
 
 #
 # Input core support is needed for joysticks
@@ -353,6 +357,7 @@
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
+# CONFIG_SONYPI is not set
 
 #
 # Ftape, the floppy tape device driver
@@ -374,24 +379,30 @@
 CONFIG_AUTOFS4_FS=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 CONFIG_ISO9660_FS=y
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -405,7 +416,6 @@
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -415,6 +425,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
 CONFIG_ROOT_NFS=y
@@ -447,6 +458,7 @@
 # CONFIG_MINIX_SUBPARTITION is not set
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
 CONFIG_SGI_PARTITION=y
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
@@ -484,9 +496,107 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
diff -urN linux-2.4.10-pre6/arch/mips64/defconfig-ip27 linux/arch/mips64/defconfig-ip27
--- linux-2.4.10-pre6/arch/mips64/defconfig-ip27	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/defconfig-ip27	Mon Dec  3 23:08:46 2001
@@ -24,6 +24,7 @@
 CONFIG_BOOT_ELF64=y
 CONFIG_ARC64=y
 CONFIG_COHERENT_IO=y
+CONFIG_MAPPED_PCI_IO=y
 CONFIG_PCI=y
 CONFIG_QL_ISP_A64=y
 CONFIG_L1_CACHE_SHIFT=7
@@ -142,6 +143,7 @@
 #
 # CONFIG_PHONE is not set
 # CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
 
 #
 # ATA/IDE/MFM/RLL support
@@ -184,6 +186,7 @@
 # CONFIG_SCSI_AHA1740 is not set
 # CONFIG_SCSI_AIC7XXX is not set
 # CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
 # CONFIG_SCSI_AM53C974 is not set
@@ -201,6 +204,7 @@
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR_D700 is not set
 # CONFIG_SCSI_NCR53C7xx is not set
 # CONFIG_SCSI_NCR53C8XX is not set
 # CONFIG_SCSI_SYM53C8XX is not set
@@ -219,16 +223,6 @@
 # CONFIG_SCSI_U14_34F is not set
 
 #
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_PCI is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
 # Network device support
 #
 CONFIG_NETDEVICES=y
@@ -241,18 +235,22 @@
 # CONFIG_BONDING is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
 
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_SGI_IOC3_ETH=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_LANCE is not set
 # CONFIG_NET_VENDOR_SMC is not set
 # CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_DEPCA is not set
 # CONFIG_HP100 is not set
 # CONFIG_NET_ISA is not set
 # CONFIG_NET_PCI is not set
@@ -262,9 +260,14 @@
 # Ethernet (1000 Mbit)
 #
 # CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_FDDI is not set
+# CONFIG_PLIP is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
 
@@ -329,7 +332,11 @@
 #
 # Joysticks
 #
-# CONFIG_JOYSTICK is not set
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
 
 #
 # Input core support is needed for joysticks
@@ -367,24 +374,30 @@
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
 # CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
 # CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_TMPFS is not set
 # CONFIG_RAMFS is not set
 # CONFIG_ISO9660_FS is not set
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
+# CONFIG_FREEVXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
@@ -398,7 +411,6 @@
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -408,6 +420,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_ROOT_NFS=y
@@ -441,6 +454,7 @@
 # CONFIG_MINIX_SUBPARTITION is not set
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
 CONFIG_SGI_PARTITION=y
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
@@ -459,9 +473,107 @@
 # CONFIG_USB is not set
 
 #
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PLUSB is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# Miscellaneous USB drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ID75 is not set
+
+#
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Kernel hacking
@@ -469,4 +581,3 @@
 CONFIG_CROSSCOMPILE=y
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_MIPS_UNCACHED is not set
diff -urN linux-2.4.10-pre6/arch/mips64/defconfig-ip32 linux/arch/mips64/defconfig-ip32
--- linux-2.4.10-pre6/arch/mips64/defconfig-ip32	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/defconfig-ip32	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,511 @@
+#
+# Automatically generated make config: don't edit
+#
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Machine selection
+#
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+CONFIG_SGI_IP32=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_BOOT_ELF32=y
+CONFIG_ARC32=y
+CONFIG_PC_KEYB=y
+CONFIG_PCI=y
+CONFIG_ARC_MEMORY=y
+CONFIG_L1_CACHE_SHIFT=5
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+
+#
+# General setup
+#
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+# CONFIG_MIPS_FPU_EMULATOR is not set
+CONFIG_NET=y
+CONFIG_PCI_NAMES=y
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SYSCTL=y
+# CONFIG_PROM_CONSOLE is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_MIPS32_COMPAT=y
+CONFIG_BINFMT_ELF32=y
+CONFIG_BINFMT_MISC=y
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+CONFIG_PCI_NAMES=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_SD_EXTRA_DEVS=40
+CONFIG_CHR_DEV_ST=y
+CONFIG_CHR_DEV_OSST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_SR_EXTRA_DEVS=2
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_DEBUG_QUEUES=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AHA1740 is not set
+CONFIG_SCSI_AIC7XXX=y
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_DMA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_NCR53C8XX is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_SIM710 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_PCI is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_NET_SB1000 is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+CONFIG_TULIP=y
+# CONFIG_DE4X5 is not set
+# CONFIG_DGRS is not set
+# CONFIG_DM9102 is not set
+CONFIG_EEPRO100=y
+# CONFIG_EEPRO100_PM is not set
+# CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NE3210 is not set
+# CONFIG_ES3210 is not set
+# CONFIG_8139TOO is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_WINBOND_840 is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+CONFIG_MOUSE=y
+CONFIG_PSMOUSE=y
+# CONFIG_82C710_MOUSE is not set
+# CONFIG_PC110_PAD is not set
+
+#
+# Joysticks
+#
+# CONFIG_JOYSTICK is not set
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_CRAMFS is not set
+CONFIG_TMPFS=y
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_SYSV_FS_WRITE is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+CONFIG_KCORE_ELF=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_REMOTE_DEBUG is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MIPS_UNCACHED=y
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/binfmt_elf32.c linux/arch/mips64/kernel/binfmt_elf32.c
--- linux-2.4.10-pre6/arch/mips64/kernel/binfmt_elf32.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/binfmt_elf32.c	Mon Dec  3 23:08:46 2001
@@ -32,7 +32,7 @@
 
 #define TASK32_SIZE		0x80000000UL
 #undef ELF_ET_DYN_BASE
-#define ELF_ET_DYN_BASE         (2 * TASK32_SIZE / 3)
+#define ELF_ET_DYN_BASE         (TASK32_SIZE / 3 * 2)
 
 #include <asm/processor.h>
 #include <linux/module.h>
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/entry.S linux/arch/mips64/kernel/entry.S
--- linux-2.4.10-pre6/arch/mips64/kernel/entry.S	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/entry.S	Mon Dec  3 23:08:46 2001
@@ -5,8 +5,9 @@
  *
  * Low level exception handling
  *
- * Copyright (C) 1994 - 2000 by Ralf Baechle
+ * Copyright (C) 1994 - 2000, 2001 Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #include <linux/config.h>
 
@@ -15,53 +16,61 @@
 #include <asm/mipsregs.h>
 #include <asm/stackframe.h>
 
+/* This duplicates the definition from <linux/sched.h> */
+#define PT_TRACESYS	0x00000002		/* tracing system calls */
+
+#define KU_USER 0x10
+
 		.text
-		.set	noreorder
 		.align 4
 FEXPORT(ret_from_fork)
+		move	a0, v0			# prev
 		jal	schedule_tail
-		 move	a0, v0					# prev
+		lw	t0, TASK_PTRACE($28)	# syscall tracing enabled?
+		andi	t0, PT_TRACESYS
+		bnez	t0, tracesys_exit
 		j	ret_from_sys_call
-		 nop
-FEXPORT(handle_softirq)
-		jal	do_softirq
-		 nop
-		b	9f
-		 nop
+
+tracesys_exit:
+		jal	syscall_trace
+		b	ret_from_sys_call
+
+EXPORT(ret_from_irq)
+EXPORT(ret_from_exception)
+		lw	t0, PT_STATUS(sp)	# returning to kernel mode?
+		andi	t0, t0, KU_USER
+		bnez	t0, ret_from_sys_call
+		j	restore_all
 
 reschedule:	jal	schedule 
-		 nop
 
 FEXPORT(ret_from_sys_call)
-FEXPORT(ret_from_irq)
-		la	t1, irq_stat		# softirq_active
-#ifdef CONFIG_SMP
-		lwu	t0, TASK_PROCESSOR($28)
-		dsll	t0, t0, 5
-		daddu	t1, t0
-#endif
-		lw	t0, 0 (t1)		# softirq_active
-		lw	t1, 4 (t1)		# softirq_mask.  unused delay slot
-		and	t0, t1
-		bnez	t0, handle_softirq
-9:		 ld	t0, PT_STATUS(sp)	# returning to kernel mode?
-
-		andi	t1, t0, 0x10
-		beqz	t1, return		# -> yes
-		 ld	t1, TASK_NEED_RESCHED($28)
-		bnez	t1, reschedule
-		lw	v0, TASK_SIGPENDING($28)
-		 move	a0, zero
-		beqz	v0, return
-		 nop
-		jal	do_signal
-		 move	a1, sp
+		mfc0	t0, CP0_STATUS	# need_resched and signals atomic test
+		ori	t0, t0, 1
+		xori	t0, t0, 1
+		mtc0	t0, CP0_STATUS
+
+		ld	v0, TASK_NEED_RESCHED($28)
+		lw	v1, TASK_SIGPENDING($28)
+		bnez	v0, reschedule
+		bnez	v1, signal_return
 
-FEXPORT(return)	.set	noat
+restore_all:	.set	noat
 		RESTORE_ALL
 		eret
 		.set	at
 
+signal_return:	.type	signal_return, @function
+
+		mfc0	t0, CP0_STATUS
+		ori	t0, t0, 1
+		mtc0	t0, CP0_STATUS
+
+		move	a0, zero
+		move	a1, sp
+		jal	do_signal
+		b	restore_all
+
 /*
  * Common spurious interrupt handler.
  */
@@ -75,6 +84,6 @@
 		lui     t1,%hi(spurious_count)
 		lw      t0,%lo(spurious_count)(t1)
 		addiu   t0,1
+		sw      t0,%lo(spurious_count)(t1)
 		j	ret_from_irq
-		 sw      t0,%lo(spurious_count)(t1)
 		END(spurious_interrupt)
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/linux32.c linux/arch/mips64/kernel/linux32.c
--- linux-2.4.10-pre6/arch/mips64/kernel/linux32.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/linux32.c	Mon Dec  3 23:08:46 2001
@@ -1538,11 +1538,11 @@
 	err = -EFAULT;
 	if (get_user (pad, (u32 *)uptr))
 		return err;
-	if(third == SETVAL)
+	if ((third & ~IPC_64) == SETVAL)
 		fourth.val = (int)pad;
 	else
 		fourth.__pad = (void *)A(pad);
-	switch (third) {
+	switch (third & ~IPC_64) {
 
 	case IPC_INFO:
 	case IPC_RMID:
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/mips64_ksyms.c linux/arch/mips64/kernel/mips64_ksyms.c
--- linux-2.4.10-pre6/arch/mips64/kernel/mips64_ksyms.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/mips64_ksyms.c	Mon Dec  3 23:08:46 2001
@@ -17,6 +17,7 @@
 #include <linux/in6.h>
 #include <linux/pci.h>
 
+#include <asm/bootinfo.h>
 #include <asm/dma.h>
 #include <asm/floppy.h>
 #include <asm/io.h>
@@ -37,6 +38,7 @@
 extern long __strnlen_user_nocheck_asm(const char *s);
 extern long __strnlen_user_asm(const char *s);
 
+EXPORT_SYMBOL(mips_machtype);
 EXPORT_SYMBOL(EISA_bus);
 
 /*
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/proc.c linux/arch/mips64/kernel/proc.c
--- linux-2.4.10-pre6/arch/mips64/kernel/proc.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/proc.c	Mon Dec  3 23:08:46 2001
@@ -1,12 +1,10 @@
-/* $Id: proc.c,v 1.1 1999/09/28 22:25:51 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995, 1996, 1999 Ralf Baechle
- *
- * XXX Rewrite this mess.
+ * Copyright (C) 1995, 1996, 1999, 2001 Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #include <linux/delay.h>
 #include <linux/kernel.h>
@@ -17,7 +15,7 @@
 #include <asm/processor.h>
 #include <asm/watch.h>
 
-unsigned long unaligned_instructions;
+extern unsigned long unaligned_instructions;
 unsigned int vced_count, vcei_count;
 
 /*
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/ptrace.c linux/arch/mips64/kernel/ptrace.c
--- linux-2.4.10-pre6/arch/mips64/kernel/ptrace.c	Fri Jul 20 12:39:55 2001
+++ linux/arch/mips64/kernel/ptrace.c	Mon Dec  3 23:08:46 2001
@@ -104,6 +104,9 @@
 			break;
 		case FPR_BASE ... FPR_BASE + 31:
 			if (child->used_math) {
+				unsigned long *fregs =
+					(void *) child->thread.fpu.hard.fp_regs;
+
 #ifndef CONFIG_SMP
 				if (last_task_used_math == child) {
 					set_cp0_status(ST0_CU1, ST0_CU1);
@@ -112,7 +115,15 @@
 					last_task_used_math = NULL;
 				}
 #endif
-				tmp = child->thread.fpu.hard.fp_regs[addr - 32];
+				/*
+				 * The odd registers are actually the high
+				 * order bits of the values stored in the even
+				 * registers.
+				 */
+				if (addr & 1)
+					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
+				else
+					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
 			} else {
 				tmp = -EIO;
 			}
@@ -171,7 +182,8 @@
 			regs->regs[addr] = data;
 			break;
 		case FPR_BASE ... FPR_BASE + 31: {
-			unsigned long *fregs;
+			unsigned long *fregs =
+				(void *) child->thread.fpu.hard.fp_regs;
 			if (child->used_math) {
 #ifndef CONFIG_SMP
 				if (last_task_used_math == child) {
@@ -188,8 +200,18 @@
 				       sizeof(child->thread.fpu.hard));
 				child->thread.fpu.hard.control = 0;
 			}
-			fregs = child->thread.fpu.hard.fp_regs;
-			fregs[addr - FPR_BASE] = data;
+			/*
+			 * The odd registers are actually the high order bits
+			 * of the values stored in the even registers - unless
+			 * we're using r2k_switch.S.
+			 */
+			if (addr & 1) {
+				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
+				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long) data) << 32;
+			} else {
+				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
+				fregs[addr - FPR_BASE] |= data;
+			}
 			break;
 		}
 		case PC:
@@ -354,6 +376,9 @@
 			break;
 		case FPR_BASE ... FPR_BASE + 31:
 			if (child->used_math) {
+				unsigned long long *fregs
+					= (unsigned long long *)
+					&child->thread.fpu.hard.fp_regs[0];
 #ifndef CONFIG_SMP
 				if (last_task_used_math == child) {
 					set_cp0_status(ST0_CU1, ST0_CU1);
@@ -362,7 +387,15 @@
 					last_task_used_math = NULL;
 				}
 #endif
-				tmp = child->thread.fpu.hard.fp_regs[addr - 32];
+				/*
+				 * The odd registers are actually the high
+				 * order bits of the values stored in the even
+				 * registers.
+				 */
+				if (addr & 1)
+					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
+				else
+					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
 			} else {
 				tmp = -EIO;
 			}
@@ -421,7 +454,8 @@
 			regs->regs[addr] = data;
 			break;
 		case FPR_BASE ... FPR_BASE + 31: {
-			unsigned long *fregs;
+			unsigned long *fregs =
+				(void *) child->thread.fpu.hard.fp_regs;
 			if (child->used_math) {
 #ifndef CONFIG_SMP
 				if (last_task_used_math == child) {
@@ -438,8 +472,18 @@
 				       sizeof(child->thread.fpu.hard));
 				child->thread.fpu.hard.control = 0;
 			}
-			fregs = child->thread.fpu.hard.fp_regs;
-			fregs[addr - FPR_BASE] = data;
+			/*
+			 * The odd registers are actually the high order bits
+			 * of the values stored in the even registers - unless
+			 * we're using r2k_switch.S.
+			 */
+			if (addr & 1) {
+				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
+				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long) data) << 32;
+			} else {
+				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
+				fregs[addr - FPR_BASE] |= data;
+			}
 			break;
 		}
 		case PC:
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/r4k_cache.S linux/arch/mips64/kernel/r4k_cache.S
--- linux-2.4.10-pre6/arch/mips64/kernel/r4k_cache.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/kernel/r4k_cache.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: r4k_cache.S,v 1.1 1999/10/10 18:49:17 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/r4k_genex.S linux/arch/mips64/kernel/r4k_genex.S
--- linux-2.4.10-pre6/arch/mips64/kernel/r4k_genex.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/kernel/r4k_genex.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: r4k_genex.S,v 1.3 1999/11/23 17:12:49 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/r4k_switch.S linux/arch/mips64/kernel/r4k_switch.S
--- linux-2.4.10-pre6/arch/mips64/kernel/r4k_switch.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/kernel/r4k_switch.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: r4k_switch.S,v 1.1 1999/12/04 03:59:00 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/r4k_tlb_debug.c linux/arch/mips64/kernel/r4k_tlb_debug.c
--- linux-2.4.10-pre6/arch/mips64/kernel/r4k_tlb_debug.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/kernel/r4k_tlb_debug.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: r4k_tlb_debug.c,v 1.2 2000/01/17 23:32:46 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/r4k_tlb_glue.S linux/arch/mips64/kernel/r4k_tlb_glue.S
--- linux-2.4.10-pre6/arch/mips64/kernel/r4k_tlb_glue.S	Tue Jul 11 11:14:48 2000
+++ linux/arch/mips64/kernel/r4k_tlb_glue.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: r4k_tlb_glue.S,v 1.5 1999/11/23 17:12:49 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/scall_64.S linux/arch/mips64/kernel/scall_64.S
--- linux-2.4.10-pre6/arch/mips64/kernel/scall_64.S	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/scall_64.S	Mon Dec  3 23:08:46 2001
@@ -3,8 +3,9 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01 by Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #include <linux/config.h>
 #include <asm/asm.h>
@@ -62,44 +63,39 @@
 	sd	v0, PT_R0(sp)		# set flag for syscall restarting
 1:	sd	v0, PT_R2(sp)		# result
 
-FEXPORT(ret_from_sys_call_64)
-	la	t1, irq_stat		# softirq_active
-#ifdef CONFIG_SMP
-	lwu	t0, TASK_PROCESSOR($28)
-	dsll	t0, t0, 5
-	daddu	t1, t0
-#endif
-	lw	t0, 0(t1)		# softirq_active
-	lw	t1, 4(t1)		# softirq_mask.  unused delay slot
-	and	t0, t1
-	bnez	t0, handle_softirq_64
+ret_from_sys_call:
+	mfc0	t0, CP0_STATUS
+	xori	t0, t0, 1
+	ori	t0, t0, 1
+	mtc0	t0, CP0_STATUS
 
-9:	ld	t0, PT_STATUS(sp)	# returning to kernel mode?
-	andi	t1, t0, 0x10
 	ld	t2, TASK_NEED_RESCHED($28)
-	beqz	t1, return_64		# -> yes
-	bnez	t2, reschedule_64
+	bnez	t2, reschedule
 	lw	v0, TASK_SIGPENDING($28)
-	move	a0, zero
-	beqz	v0, return_64
-	move	a1, sp
-	SAVE_STATIC
-	jal	do_signal
+	bnez	v0, signal_return
 
-return_64:
+restore_all:
 	RESTORE_SOME
 	RESTORE_SP
-	.set	mips3
 	eret
-	.set	mips0
 
-handle_softirq_64:
-	jal	do_softirq
-	b	9b
-reschedule_64:
+/* Put this behind restore_all for the sake of the branch prediction.  */
+signal_return:
+	.type	signal_return, @function
+
+	mfc0	t0, CP0_STATUS
+	ori	t0, t0, 1
+	mtc0	t0, CP0_STATUS
+
+	move	a0, zero
+	move	a1, sp
+	jal	do_signal
+	b	restore_all
+
+reschedule:
 	SAVE_STATIC
 	jal	schedule
-	b	ret_from_sys_call_64
+	b	ret_from_sys_call
 
 /* ------------------------------------------------------------------------ */
 
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/scall_o32.S linux/arch/mips64/kernel/scall_o32.S
--- linux-2.4.10-pre6/arch/mips64/kernel/scall_o32.S	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/scall_o32.S	Mon Dec  3 23:08:46 2001
@@ -3,8 +3,9 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995 - 2000 by Ralf Baechle
+ * Copyright (C) 1995 - 2000, 2001 by Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  *
  * Hairy, the userspace application uses a different argument passing
  * convention than the kernel, so we have to translate things from o32
@@ -18,6 +19,7 @@
 #include <asm/regdef.h>
 #include <asm/stackframe.h>
 #include <asm/unistd.h>
+#include <asm/sysmips.h>
 
 /* This duplicates the definition from <linux/sched.h> */
 #define PT_TRACESYS	0x00000002	/* tracing system calls */
@@ -34,14 +36,6 @@
 	SAVE_SOME
 	STI
 	.set	at
-#if DEBUG_MIPS64
- jal dodebug
- ld $4, PT_R4(sp)
- ld $5, PT_R5(sp)
- ld $6, PT_R6(sp)
- ld $7, PT_R7(sp)
- ld $2, PT_R2(sp)
-#endif
 	ld	t1, PT_EPC(sp)		# skip syscall on return
 
 	subu	t0, v0, __NR_Linux32	# check syscall number
@@ -60,59 +54,50 @@
 	bgez	t0, stackargs
 
 stack_done:
-	ld	t0, TASK_PTRACE($28)	# syscall tracing enabled?
-	andi	t0, PT_TRACESYS
-	bnez	t0, trace_a_syscall
-
-	jalr	t2			# Do The Real Thing (TM)
-
-	li	t0, -EMAXERRNO - 1	# error?
-	sltu	t0, t0, v0
-	sd	t0, PT_R7(sp)		# set error flag
-	beqz	t0, 1f
+		ld	t0, TASK_PTRACE($28)	# syscall tracing enabled?
+		andi	t0, PT_TRACESYS
+		bnez	t0, trace_a_syscall
+
+		jalr	t2			# Do The Real Thing (TM)
+
+		li	t0, -EMAXERRNO - 1	# error?
+		sltu	t0, t0, v0
+		sd	t0, PT_R7(sp)		# set error flag
+		beqz	t0, 1f
+
+		negu	v0			# error
+		sd	v0, PT_R0(sp)		# flag for syscall restarting
+1:		sd	v0, PT_R2(sp)		# result
 
-	negu	v0			# error
-	sd	v0, PT_R0(sp)		# set flag for syscall restarting
-1:	sd	v0, PT_R2(sp)		# result
-	
 FEXPORT(o32_ret_from_sys_call)
-	la	t1, irq_stat		# softirq_active
-#ifdef CONFIG_SMP
-	lwu	t0, TASK_PROCESSOR($28)
-	dsll	t0, t0, 5
-	daddu	t1, t0
-#endif
-	lw	t0, 0(t1)		# softirq_active
-	lw	t1, 4(t1)		# softirq_mask.  unused delay slot
-	and	t0, t1
-	bnez	t0, o32_handle_softirq
-
-9:	ld	t0,PT_STATUS(sp)	# returning to kernel mode?
-	andi	t1, t0, 0x10
-	ld	t2, TASK_NEED_RESCHED($28)
-	beqz	t1, o32_return		# -> yes
-	bnez	t2, o32_reschedule
-	lw	v0, TASK_SIGPENDING($28)
-	move	a0, zero
-	beqz	v0, o32_return
-	move	a1, sp
-	SAVE_STATIC
-	jal	do_signal
+		mfc0	t0, CP0_STATUS	# need_resched and signals atomic test
+		ori	t0, t0, 1
+		xori	t0, t0, 1
+		mtc0	t0, CP0_STATUS
+
+		ld	t2, TASK_NEED_RESCHED($28)
+		bnez	t2, o32_reschedule
+		lw	v0, TASK_SIGPENDING($28)
+		bnez	v0, signal_return
+
+restore_all:	RESTORE_SOME
+		RESTORE_SP
+		.set	mips3
+		eret
+		.set	mips0
+
+signal_return:	mfc0	t0, CP0_STATUS	# need_resched and signals atomic test
+		ori	t0, t0, 1
+		mtc0	t0, CP0_STATUS
+		move	a0, zero
+		move	a1, sp
+		SAVE_STATIC
+		jal	do_signal
 
-o32_return:
-	RESTORE_SOME
-	RESTORE_SP
-	.set	mips3
-	eret
-	.set	mips0
-
-o32_handle_softirq:
-	jal	do_softirq
-	b	9b
 o32_reschedule:
-	SAVE_STATIC
-	jal	schedule
-	b	o32_ret_from_sys_call
+		SAVE_STATIC
+		jal	schedule
+		b	o32_ret_from_sys_call
 
 /* ------------------------------------------------------------------------ */
 
@@ -205,6 +190,47 @@
 	sd	t0, PT_R7(sp)
 	j	ret_from_sys_call
 	END(handle_sys)
+
+	LEAF(mips_atomic_set)
+	ld	v1, THREAD_CURDS($28)
+	daddiu	a0, a1, 4
+	or	a0, a0, a1
+	li	v0, -EFAULT
+	and	a0, a0, v1
+	bltz	a0, 9f
+
+	/* Ok, this is the ll/sc case.  World is sane :-)  */
+1:	ll	v0, (a1)
+	move	a0, a2
+2:	sc	a0, (a1)
+	beqz	a0, 1b
+
+	.section __ex_table,"a"
+	PTR	1b, bad_stack
+	PTR	2b, bad_stack
+	.previous
+
+1:	sd	v0, PT_R2(sp)		# result
+
+	/* Success, so skip usual error handling garbage.  */
+	ld	t0, TASK_PTRACE($28)	# syscall tracing enabled?
+	andi	t0, PT_TRACESYS
+	bnez	t0, 1f
+	b	o32_ret_from_sys_call
+
+1:	SAVE_STATIC
+	jal	syscall_trace
+	li	a3, 0			# success
+	j	ret_from_sys_call
+
+9:	li	v0, -EFAULT
+	jr	ra
+	END(mips_atomic_set)
+
+	LEAF(sys_sysmips)
+	beq	a0, MIPS_ATOMIC_SET, mips_atomic_set
+	j	_sys_sysmips
+	END(sys_sysmips)
 
 	.macro	syscalltable
 	sys	sys_syscall	0			/* 4000 */
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/setup.c linux/arch/mips64/kernel/setup.c
--- linux-2.4.10-pre6/arch/mips64/kernel/setup.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/setup.c	Mon Dec  3 23:08:46 2001
@@ -81,7 +81,6 @@
  *
  * These are initialized so they are in the .data section
  */
-unsigned long mips_memory_upper = KSEG0;
 unsigned long mips_cputype = CPU_UNKNOWN;
 unsigned long mips_machtype = MACH_UNKNOWN;
 unsigned long mips_machgroup = MACH_GROUP_UNKNOWN;
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/signal.c linux/arch/mips64/kernel/signal.c
--- linux-2.4.10-pre6/arch/mips64/kernel/signal.c	Wed Jan 24 15:22:55 2001
+++ linux/arch/mips64/kernel/signal.c	Mon Dec  3 23:08:46 2001
@@ -267,8 +267,7 @@
 	struct ucontext rs_uc;
 };
 
-asmlinkage void
-sys_sigreturn(abi64_no_regargs, struct pt_regs regs)
+asmlinkage void sys_sigreturn(abi64_no_regargs, struct pt_regs regs)
 {
 	struct sigframe *frame;
 	sigset_t blocked;
@@ -304,8 +303,7 @@
 	force_sig(SIGSEGV, current);
 }
 
-asmlinkage void
-sys_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
+asmlinkage void sys_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
 {
 	struct rt_sigframe *frame;
 	sigset_t set;
@@ -346,8 +344,8 @@
 	force_sig(SIGSEGV, current);
 }
 
-static int inline
-setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
+static int inline setup_sigcontext(struct pt_regs *regs,
+				   struct sigcontext *sc)
 {
 	int err = 0;
 
@@ -392,8 +390,8 @@
 /*
  * Determine which stack to use..
  */
-static inline void *
-get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
+static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
+				 size_t frame_size)
 {
 	unsigned long sp;
 
@@ -407,9 +405,8 @@
 	return (void *)((sp - frame_size) & ALMASK);
 }
 
-static void inline
-setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
-            int signr, sigset_t *set)
+static void inline setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
+			       int signr, sigset_t *set)
 {
 	struct sigframe *frame;
 	int err = 0;
@@ -470,9 +467,9 @@
 	force_sig(SIGSEGV, current);
 }
 
-static void inline
-setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
-               int signr, sigset_t *set, siginfo_t *info)
+static void inline setup_rt_frame(struct k_sigaction * ka,
+				  struct pt_regs *regs, int signr,
+				  sigset_t *set, siginfo_t *info)
 {
 	struct rt_sigframe *frame;
 	int err = 0;
@@ -489,10 +486,10 @@
 		/*
 		 * Set up the return code ...
 		 *
-		 *         li      v0, __NR_sigreturn
+		 *         li      v0, __NR_rt_sigreturn
 		 *         syscall
 		 */
-		err |= __put_user(0x24020000 + __NR_sigreturn,
+		err |= __put_user(0x24020000 + __NR_rt_sigreturn,
 		                  frame->rs_code + 0);
 		err |= __put_user(0x0000000c                 ,
 		                  frame->rs_code + 1);
@@ -546,9 +543,9 @@
 	force_sig(SIGSEGV, current);
 }
 
-static inline void
-handle_signal(unsigned long sig, struct k_sigaction *ka,
-	siginfo_t *info, sigset_t *oldset, struct pt_regs * regs)
+static inline void handle_signal(unsigned long sig, struct k_sigaction *ka,
+				 siginfo_t *info, sigset_t *oldset,
+				 struct pt_regs *regs)
 {
 	if (ka->sa.sa_flags & SA_SIGINFO)
 		setup_rt_frame(ka, regs, sig, oldset, info);
@@ -566,8 +563,8 @@
 	}
 }
 
-static inline void
-syscall_restart(struct pt_regs *regs, struct k_sigaction *ka)
+static inline void syscall_restart(struct pt_regs *regs,
+				   struct k_sigaction *ka)
 {
 	switch(regs->regs[0]) {
 	case ERESTARTNOHAND:
@@ -599,11 +596,6 @@
 	if (current->thread.mflags & MF_32BIT) {
 		return do_signal32(oldset, regs);
 	}
-#endif
-
-#ifdef CONFIG_BINFMT_IRIX
-	if (current->personality != PER_LINUX)
-		return do_irix_signal(oldset, regs);
 #endif
 
 	if (!oldset)
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/signal32.c linux/arch/mips64/kernel/signal32.c
--- linux-2.4.10-pre6/arch/mips64/kernel/signal32.c	Wed Jan 24 15:22:55 2001
+++ linux/arch/mips64/kernel/signal32.c	Mon Dec  3 23:08:46 2001
@@ -152,10 +152,6 @@
 	sigset32_t *uset;
 	sigset_t newset, saveset;
 
-#if DEBUG_MIPS64
-printk("%s called.\n", __FUNCTION__);
-#endif
-
 	save_static(&regs);
 	uset = (sigset32_t *) regs.regs[4];
 	if (get_sigset(&newset, uset))
@@ -185,10 +181,6 @@
 	sigset_t newset, saveset;
         size_t sigsetsize;
 
-#if DEBUG_MIPS64
-printk("%s called.\n", __FUNCTION__);
-#endif
-
 	save_static(&regs);
 	/* XXX Don't preclude handling different sized sigset_t's.  */
 	sigsetsize = regs.regs[5];
@@ -359,10 +351,6 @@
 	struct sigframe *frame;
 	sigset_t blocked;
 
-#if DEBUG_MIPS64
-printk("%s called.\n", __FUNCTION__);
-#endif
-
 	frame = (struct sigframe *) regs.regs[29];
 	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
 		goto badframe;
@@ -400,7 +388,6 @@
 	struct rt_sigframe *frame;
 	sigset_t set;
 	stack_t st;
-printk("%s called.\n", __FUNCTION__);
 
 	frame = (struct rt_sigframe *) regs.regs[29];
 	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
@@ -580,10 +567,10 @@
 		/*
 		 * Set up the return code ...
 		 *
-		 *         li      v0, __NR_Linux32_sigreturn
+		 *         li      v0, __NR_Linux32_rt_sigreturn
 		 *         syscall
 		 */
-		err |= __put_user(0x24020000 + __NR_Linux32_sigreturn,
+		err |= __put_user(0x24020000 + __NR_Linux32_rt_sigreturn,
 		                  frame->rs_code + 0);
 		err |= __put_user(0x0000000c                 ,
 		                  frame->rs_code + 1);
@@ -683,10 +670,6 @@
 	struct k_sigaction *ka;
 	siginfo_t info;
 
-#if DEBUG_MIPS64
-printk("%s: delivering signal.\n", current->comm);
-#endif
-
 	if (!oldset)
 		oldset = &current->blocked;
 
@@ -785,9 +768,6 @@
 		if (regs->regs[0])
 			syscall_restart(regs, ka);
 		/* Whee!  Actually deliver the signal.  */
-#if DEBUG_MIPS64
-printk("%s: delivering signal.\n", __FUNCTION__);
-#endif
 		handle_signal(signr, ka, &info, oldset, regs);
 		return 1;
 	}
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/syscall.c linux/arch/mips64/kernel/syscall.c
--- linux-2.4.10-pre6/arch/mips64/kernel/syscall.c	Mon Mar 19 12:35:10 2001
+++ linux/arch/mips64/kernel/syscall.c	Mon Dec  3 23:08:46 2001
@@ -3,8 +3,9 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995 - 2000 by Ralf Baechle
+ * Copyright (C) 1995 - 2000, 2001 by Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #include <linux/errno.h>
 #include <linux/linkage.h>
@@ -129,7 +130,7 @@
 }
 
 asmlinkage int
-sys_sysmips(int cmd, long arg1, int arg2, int arg3)
+_sys_sysmips(int cmd, long arg1, int arg2, int arg3)
 {
 	int	*p;
 	char	*name;
@@ -155,50 +156,9 @@
 		return 0;
 	}
 
-	case MIPS_ATOMIC_SET: {
-		unsigned int tmp;
-
-		p = (int *) arg1;
-		errno = verify_area(VERIFY_WRITE, p, sizeof(*p));
-		if (errno)
-			return errno;
-		errno = 0;
-
-		__asm__(".set\tpush\t\t\t# sysmips(MIPS_ATOMIC, ...)\n\t"
-			".set\tnoreorder\n\t"
-			".set\tnoat\n\t"
-			"1:\tll\t%0, %4\n\t"
-			"2:\tmove\t$1, %3\n\t"
-			"3:\tsc\t$1, %1\n\t"
-			"beqzl\t$1, 2b\n\t"
-			"4:\t ll\t%0, %4\n\t"
-			".set\tpop\n\t"
-			".section\t.fixup,\"ax\"\n"
-			"5:\tli\t%2, 1\t\t\t# error\n\t"
-			".previous\n\t"
-			".section\t__ex_table,\"a\"\n\t"
-			".dword\t1b, 5b\n\t"
-			".dword\t3b, 5b\n\t"
-			".dword\t4b, 5b\n\t"
-			".previous\n\t"
-			: "=&r" (tmp), "=o" (* (u32 *) p), "=r" (errno)
-			: "r" (arg2), "o" (* (u32 *) p), "2" (errno)
-			: "$1");
-
-		if (errno)
-			return -EFAULT;
-
-		/* We're skipping error handling etc.  */
-		if (current->ptrace & PT_TRACESYS)
-			syscall_trace();
-
-		__asm__ __volatile__(
-			"move\t$29, %0\n\t"
-			"j\tret_from_sys_call"
-			: /* No outputs */
-			: "r" (&cmd));
-		/* Unreached */
-	}
+	case MIPS_ATOMIC_SET:
+		printk(KERN_CRIT "How did I get here?\n");
+		return -EINVAL;
 
 	case MIPS_FIXADE:
 		tmp = current->thread.mflags & ~3;
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/traps.c linux/arch/mips64/kernel/traps.c
--- linux-2.4.10-pre6/arch/mips64/kernel/traps.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/traps.c	Mon Dec  3 23:08:46 2001
@@ -258,58 +258,91 @@
 	printk(KERN_DEBUG "Should send SIGFPE to %s\n", current->comm);
 }
 
-static inline int get_insn_opcode(struct pt_regs *regs, unsigned int *opcode)
-{
-	unsigned int *epc;
-
-	epc = (unsigned int *) (unsigned long) regs->cp0_epc;
-	if (regs->cp0_cause & CAUSEF_BD)
-		epc++;
-
-	if (verify_area(VERIFY_READ, epc, 4)) {
-		force_sig(SIGSEGV, current);
-		return 1;
-	}
-	*opcode = *epc;
-
-	return 0;
-}
-
 void do_bp(struct pt_regs *regs)
 {
 	unsigned int opcode, bcode;
+	unsigned int *epc;
+	siginfo_t info;
+
+	epc = (unsigned int *) regs->cp0_epc +
+	      ((regs->cp0_cause & CAUSEF_BD) != 0);
+	if (get_user(opcode, epc))
+		goto sigsegv;
 
 	/*
 	 * There is the ancient bug in the MIPS assemblers that the break
 	 * code starts left to bit 16 instead to bit 6 in the opcode.
 	 * Gas is bug-compatible ...
 	 */
-	if (get_insn_opcode(regs, &opcode))
-		return;
 	bcode = ((opcode >> 16) & ((1 << 20) - 1));
 
 	/*
 	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
 	 * insns, even for break codes that indicate arithmetic failures.
 	 * Weird ...)
+	 * But should we continue the brokenness???  --macro
 	 */
+	switch (bcode) {
+	case 6:
+	case 7:
+		if (bcode == 7)
+			info.si_code = FPE_INTDIV;
+		else
+			info.si_code = FPE_INTOVF;
+		info.si_signo = SIGFPE;
+		info.si_errno = 0;
+		info.si_addr = (void *)compute_return_epc(regs);
+		force_sig_info(SIGFPE, &info, current);
+		break;
+	default:
+		force_sig(SIGTRAP, current);
+	}
+
 	force_sig(SIGTRAP, current);
+	return;
+
+sigsegv:
+	force_sig(SIGSEGV, current);
 }
 
 void do_tr(struct pt_regs *regs)
 {
 	unsigned int opcode, bcode;
+	unsigned int *epc;
+	siginfo_t info;
+
+	epc = (unsigned int *) regs->cp0_epc +
+	      ((regs->cp0_cause & CAUSEF_BD) != 0);
+	if (get_user(opcode, epc))
+		goto sigsegv;
 
-	if (get_insn_opcode(regs, &opcode))
-		return;
 	bcode = ((opcode >> 6) & ((1 << 20) - 1));
 
 	/*
 	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
 	 * insns, even for break codes that indicate arithmetic failures.
 	 * Wiered ...)
+	 * But should we continue the brokenness???  --macro
 	 */
-	force_sig(SIGTRAP, current);
+	switch (bcode) {
+	case 6:
+	case 7:
+		if (bcode == 7)
+			info.si_code = FPE_INTDIV;
+		else
+			info.si_code = FPE_INTOVF;
+		info.si_signo = SIGFPE;
+		info.si_errno = 0;
+		info.si_addr = (void *)compute_return_epc(regs);
+		force_sig_info(SIGFPE, &info, current);
+		break;
+	default:
+		force_sig(SIGTRAP, current);
+	}
+	return;
+
+sigsegv:
+	force_sig(SIGSEGV, current);
 }
 
 void do_ri(struct pt_regs *regs)
diff -urN linux-2.4.10-pre6/arch/mips64/kernel/unaligned.c linux/arch/mips64/kernel/unaligned.c
--- linux-2.4.10-pre6/arch/mips64/kernel/unaligned.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/kernel/unaligned.c	Mon Dec  3 23:08:46 2001
@@ -72,6 +72,7 @@
  *       A store crossing a page boundary might be executed only partially.
  *       Undo the partial store in this case.
  */
+#include <linux/config.h>
 #include <linux/mm.h>
 #include <linux/signal.h>
 #include <linux/smp.h>
@@ -378,7 +379,9 @@
 	return;
 }
 
+#ifdef CONFIG_PROC_FS
 unsigned long unaligned_instructions;
+#endif
 
 asmlinkage void do_ade(struct pt_regs *regs)
 {
@@ -399,7 +402,9 @@
 		goto sigbus;
 
 	emulate_load_store_insn(regs, regs->cp0_badvaddr, pc);
+#ifdef CONFIG_PROC_FS
 	unaligned_instructions++;
+#endif
 
 	return;
 
diff -urN linux-2.4.10-pre6/arch/mips64/lib/csum_partial.S linux/arch/mips64/lib/csum_partial.S
--- linux-2.4.10-pre6/arch/mips64/lib/csum_partial.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/csum_partial.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: csum_partial.S,v 1.1 1999/08/21 21:43:00 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/lib/csum_partial_copy.c linux/arch/mips64/lib/csum_partial_copy.c
--- linux-2.4.10-pre6/arch/mips64/lib/csum_partial_copy.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/csum_partial_copy.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: csum_partial_copy.c,v 1.2 1999/12/04 03:59:00 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/lib/dump_tlb.c linux/arch/mips64/lib/dump_tlb.c
--- linux-2.4.10-pre6/arch/mips64/lib/dump_tlb.c	Sun Jul  9 22:18:16 2000
+++ linux/arch/mips64/lib/dump_tlb.c	Mon Dec  3 23:08:46 2001
@@ -168,14 +168,12 @@
 	printk("\n");
 }
 
-void
-dump_list_current(void *address)
+void dump_list_current(void *address)
 {
 	dump_list_process(current, address);
 }
 
-unsigned int
-vtop(void *address)
+unsigned int vtop(void *address)
 {
 	pgd_t	*pgd;
 	pmd_t	*pmd;
@@ -192,16 +190,17 @@
 	return paddr;
 }
 
-void
-dump16(unsigned long *p)
+void dump16(unsigned long *p)
 {
 	int i;
 
 	for(i=0;i<8;i++)
 	{
 		printk("*%08lx == %08lx, ",
-		       (unsigned long)p, (unsigned long)*p++);
+		       (unsigned long)p, (unsigned long)*p);
+		p++;
 		printk("*%08lx == %08lx\n",
-		       (unsigned long)p, (unsigned long)*p++);
+		       (unsigned long)p, (unsigned long)*p);
+		p++;
 	}
 }
diff -urN linux-2.4.10-pre6/arch/mips64/lib/floppy-no.c linux/arch/mips64/lib/floppy-no.c
--- linux-2.4.10-pre6/arch/mips64/lib/floppy-no.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/floppy-no.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: floppy-no.c,v 1.1 1999/08/21 21:43:00 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/lib/ide-no.c linux/arch/mips64/lib/ide-no.c
--- linux-2.4.10-pre6/arch/mips64/lib/ide-no.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/ide-no.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: ide-no.c,v 1.1 1999/08/21 21:43:00 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/lib/ide-std.c linux/arch/mips64/lib/ide-std.c
--- linux-2.4.10-pre6/arch/mips64/lib/ide-std.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/ide-std.c	Mon Dec  3 23:08:46 2001
@@ -1,12 +1,11 @@
-/* $Id: ide-std.c,v 1.1 1999/08/21 21:43:00 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
  * IDE routines for typical pc-like standard configurations.
  *
- * Copyright (C) 1998, 1999 by Ralf Baechle
+ * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
  */
 #include <linux/sched.h>
 #include <linux/ide.h>
@@ -60,6 +59,7 @@
 	}
 	if (irq != NULL)
 		*irq = 0;
+	hw->io_ports[IDE_IRQ_OFFSET] = 0;
 }
 
 static int std_ide_request_irq(unsigned int irq,
diff -urN linux-2.4.10-pre6/arch/mips64/lib/kbd-no.c linux/arch/mips64/lib/kbd-no.c
--- linux-2.4.10-pre6/arch/mips64/lib/kbd-no.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/kbd-no.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: kbd-no.c,v 1.1 1999/08/21 21:43:00 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/lib/kbd-std.c linux/arch/mips64/lib/kbd-std.c
--- linux-2.4.10-pre6/arch/mips64/lib/kbd-std.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/kbd-std.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: kbd-std.c,v 1.1 1999/08/21 21:43:01 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/lib/memcpy.S linux/arch/mips64/lib/memcpy.S
--- linux-2.4.10-pre6/arch/mips64/lib/memcpy.S	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/lib/memcpy.S	Mon Dec  3 23:08:46 2001
@@ -5,7 +5,7 @@
  *
  * Unified implementation of memcpy, memmove and the __copy_user backend.
  *
- * Copyright (C) 1998, 1999, 2000 Ralf Baechle
+ * Copyright (C) 1998, 1999, 2000, 2001 Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  *
  * For __rmemcpy and memmove an exception is always a kernel bug, therefore
@@ -238,10 +238,8 @@
 	 andi	ta2, a2, 0x40
 
 move_128bytes:
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4)
-	pref	0, 2*128(a0)
-	pref	1, 2*128(a1)
-#endif
+	PREF	(0, 2*128(a0))
+	PREF	(1, 2*128(a1))
 	MOVE_BIGGERCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
 	MOVE_BIGGERCHUNK(a1, a0, 0x40, ta0, ta1, ta3, t0)
 	dsubu	t8, t8, 0x01
@@ -454,16 +452,21 @@
 
 	.align	5
 LEAF(memmove)
-	sltu	ta0, a0, a1			# dst < src -> memcpy
-	bnez	ta0, memcpy
-	 daddu	v0, a0, a2
-	sltu	ta0, v0, a1			# dst + len < src -> non-
-	bnez	ta0, __memcpy			# overlapping, can use memcpy
+	daddu	t0, a0, a2
+	sltu	t0, a1, t0			# dst + len <= src -> memcpy
+	daddu	t1, a1, a2
+	sltu	t1, a0, t1			# dst >= src + len -> memcpy
+	and	t0, t1
+	beqz	t0, __memcpy
+
 	 move	v0, a0				/* return value */
 	beqz	a2, r_out
 	END(memmove)
 
 LEAF(__rmemcpy)					/* a0=dst a1=src a2=len */
+	sltu	t0, a1, a0
+	beqz	t0, r_end_bytes_up		# src >= dst
+	 nop
 	daddu	a0, a2				# dst = dst + len
 	daddu	a1, a2				# src = src + len
 
@@ -615,6 +618,17 @@
 	 dsubu	a0, a0, 0x1
 
 r_out:
+	jr      ra
+	 move   a2, zero
+
+r_end_bytes_up:
+	lb	t0, (a1)
+	dsubu	a2, a2, 0x1
+	sb	t0, (a0)
+	daddu	a1, a1, 0x1
+	bnez	a2, r_end_bytes_up
+	 daddu	a0, a0, 0x1
+
 	jr	ra
 	 move	a2, zero
 
diff -urN linux-2.4.10-pre6/arch/mips64/lib/strlen_user.S linux/arch/mips64/lib/strlen_user.S
--- linux-2.4.10-pre6/arch/mips64/lib/strlen_user.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/strlen_user.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: strlen_user.S,v 1.2 1999/11/19 20:35:22 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/lib/strncpy_user.S linux/arch/mips64/lib/strncpy_user.S
--- linux-2.4.10-pre6/arch/mips64/lib/strncpy_user.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/strncpy_user.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: strncpy_user.S,v 1.2 1999/11/19 20:35:23 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/lib/strnlen_user.S linux/arch/mips64/lib/strnlen_user.S
--- linux-2.4.10-pre6/arch/mips64/lib/strnlen_user.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/lib/strnlen_user.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: strnlen_user.S,v 1.1 1999/11/19 20:35:23 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/math-emu/cp1emu.c linux/arch/mips64/math-emu/cp1emu.c
--- linux-2.4.10-pre6/arch/mips64/math-emu/cp1emu.c	Mon Jul  2 13:56:40 2001
+++ linux/arch/mips64/math-emu/cp1emu.c	Mon Dec  3 23:08:46 2001
@@ -53,7 +53,9 @@
 
 #include <asm/asm.h>
 #include <asm/branch.h>
+#include <asm/bootinfo.h>
 #include <asm/byteorder.h>
+#include <asm/cpu.h>
 #include <asm/inst.h>
 #include <asm/uaccess.h>
 #include <asm/processor.h>
@@ -851,11 +853,8 @@
 	current->thread.dsemul_epc = (unsigned long) cpc;
 	current->thread.dsemul_aerpc = (unsigned long) &dsemul_insns[1];
 	xcp->cp0_epc = VA_TO_REG & dsemul_insns[0];
+	flush_cache_sigtramp((unsigned long) dsemul_insns);
 
-	/* What we'd really like to do is just flush the line(s) of the */
-	/* icache containing the dsemulret instructions, but there's no */
-	/* mechanism to do this yet...  */
-	flush_cache_all();
 	return SIGILL;		/* force out of emulation loop */
 }
 
@@ -1708,6 +1707,9 @@
 
 	oldepc = xcp->cp0_epc;
 	do {
+		if (current->need_resched)
+			schedule();
+
 		prevepc = xcp->cp0_epc;
 		insn = mips_get_word(xcp, REG_TO_VA(xcp->cp0_epc), &err);
 		if (err) {
@@ -1718,6 +1720,9 @@
 			sig = cop1Emulate(xcptno, xcp, ctx);
 		else
 			xcp->cp0_epc += 4;	/* skip nops */
+
+		if (mips_cpu.options & MIPS_CPU_FPU)
+			break;
 	} while (xcp->cp0_epc > prevepc && sig == 0);
 
 	/* SIGILL indicates a non-fpu instruction */
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/atlas/Makefile linux/arch/mips64/mips-boards/atlas/Makefile
--- linux-2.4.10-pre6/arch/mips64/mips-boards/atlas/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/atlas/Makefile	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,42 @@
+#
+# Carsten Langgaard, carstenl@mips.com
+# Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+#
+# ########################################################################
+#
+# This program is free software; you can distribute it and/or modify it
+# under the terms of the GNU General Public License (Version 2) as
+# published by the Free Software Foundation.
+# 
+# This program is distributed in the hope it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+# 
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+#
+# #######################################################################
+#
+# Makefile for the MIPS Atlas specific kernel interface routines
+# under Linux.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+# Note 2! The CFLAGS definitions are now in the main makefile...
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+all: atlas.o
+
+O_TARGET := atlas.o
+
+obj-y   := atlas_int.o atlas_rtc.o atlas_setup.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/atlas/atlas_int.c linux/arch/mips64/mips-boards/atlas/atlas_int.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/atlas/atlas_int.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/atlas/atlas_int.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,249 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Routines for generic manipulation of the interrupts found on the MIPS 
+ * Atlas board.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+
+#include <asm/irq.h>
+#include <asm/mips-boards/atlas.h>
+#include <asm/mips-boards/atlasint.h>
+#ifdef CONFIG_REMOTE_DEBUG
+#include <asm/gdb-stub.h>
+#endif
+
+struct atlas_ictrl_regs *atlas_hw0_icregs
+	= (struct atlas_ictrl_regs *)ATLAS_ICTRL_REGS_BASE;
+
+extern asmlinkage void mipsIRQ(void);
+extern void do_IRQ(int irq, struct pt_regs *regs);
+
+unsigned long spurious_count = 0;
+irq_desc_t irq_desc[NR_IRQS];
+
+#if 0
+#define DEBUG_INT(x...) printk(x)
+#else
+#define DEBUG_INT(x...)
+#endif
+
+void disable_atlas_irq(unsigned int irq_nr)
+{
+	atlas_hw0_icregs->intrsten = (1 << irq_nr);
+}
+
+void enable_atlas_irq(unsigned int irq_nr)
+{
+	atlas_hw0_icregs->intseten = (1 << irq_nr);
+}
+
+static unsigned int startup_atlas_irq(unsigned int irq)
+{
+	enable_atlas_irq(irq);
+	return 0; /* never anything pending */
+}
+
+#define shutdown_atlas_irq	disable_atlas_irq
+
+#define mask_and_ack_atlas_irq disable_atlas_irq
+
+static void end_atlas_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_atlas_irq(irq);
+}
+
+static struct hw_interrupt_type atlas_irq_type = {
+	"Atlas",
+	startup_atlas_irq,
+	shutdown_atlas_irq,
+	enable_atlas_irq,
+	disable_atlas_irq,
+	mask_and_ack_atlas_irq,
+	end_atlas_irq,
+	NULL
+};
+
+int get_irq_list(char *buf)
+{
+	int i, len = 0;
+	int num = 0;
+	struct irqaction *action;
+
+	for (i = 0; i < ATLASINT_END; i++, num++) {
+		action = irq_desc[i].action;
+		if (!action) 
+			continue;
+		len += sprintf(buf+len, "%2d: %8d %c %s",
+			num, kstat.irqs[0][num],
+			(action->flags & SA_INTERRUPT) ? '+' : ' ',
+			action->name);
+		for (action=action->next; action; action = action->next) {
+			len += sprintf(buf+len, ",%s %s",
+				(action->flags & SA_INTERRUPT) ? " +" : "",
+				action->name);
+		}
+		len += sprintf(buf+len, " [hw0]\n");
+	}
+	return len;
+}
+
+int request_irq(unsigned int irq, 
+		void (*handler)(int, void *, struct pt_regs *),
+		unsigned long irqflags, 
+		const char * devname,
+		void *dev_id)
+{  
+        struct irqaction *action;
+
+	DEBUG_INT("request_irq: irq=%d, devname = %s\n", irq, devname);
+
+        if (irq >= ATLASINT_END)
+	        return -EINVAL;
+	if (!handler)
+	        return -EINVAL;
+
+	action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL);
+	if(!action)
+	        return -ENOMEM;
+
+	action->handler = handler;
+	action->flags = irqflags;
+	action->mask = 0;
+	action->name = devname;
+	action->dev_id = dev_id;
+	action->next = 0;
+	irq_desc[irq].action = action;
+	enable_atlas_irq(irq);
+
+	return 0;
+}
+
+void free_irq(unsigned int irq, void *dev_id)
+{
+	struct irqaction *action;
+
+	if (irq >= ATLASINT_END) {
+		printk("Trying to free IRQ%d\n",irq);
+		return;
+	}
+
+	action = irq_desc[irq].action;
+	irq_desc[irq].action = NULL;
+	disable_atlas_irq(irq);
+	kfree(action);
+}
+
+static inline int ls1bit32(unsigned int x)
+{
+	int b = 31, s;
+
+	s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
+	s =  8; if (x <<  8 == 0) s = 0; b -= s; x <<= s;
+	s =  4; if (x <<  4 == 0) s = 0; b -= s; x <<= s;
+	s =  2; if (x <<  2 == 0) s = 0; b -= s; x <<= s;
+	s =  1; if (x <<  1 == 0) s = 0; b -= s;
+
+	return b;
+}
+
+void atlas_hw0_irqdispatch(struct pt_regs *regs)
+{
+	struct irqaction *action;
+	unsigned long int_status;
+	int irq, cpu = smp_processor_id();
+
+	int_status = atlas_hw0_icregs->intstatus; 
+
+	/* if int_status == 0, then the interrupt has already been cleared */
+	if (int_status == 0)
+		return;
+
+	irq = ls1bit32(int_status);
+	action = irq_desc[irq].action;
+
+	DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
+
+	/* if action == NULL, then we don't have a handler for the irq */
+	if ( action == NULL ) {
+	        printk("No handler for hw0 irq: %i\n", irq);
+		spurious_count++;
+		return;
+	}
+
+	irq_enter(cpu, irq);
+	kstat.irqs[0][irq]++;
+	action->handler(irq, action->dev_id, regs);
+	irq_exit(cpu, irq);
+
+	return;		
+}
+
+unsigned long probe_irq_on (void)
+{
+	return 0;
+}
+
+
+int probe_irq_off (unsigned long irqs)
+{
+	return 0;
+}
+
+#ifdef CONFIG_REMOTE_DEBUG
+extern void breakpoint(void);
+extern int remote_debug;
+#endif
+
+void __init init_IRQ(void)
+{
+	int i;
+
+	/* 
+	 * Mask out all interrupt by writing "1" to all bit position in 
+	 * the interrupt reset reg. 
+	 */
+	atlas_hw0_icregs->intrsten = 0xffffffff;    
+
+	/* Now safe to set the exception vector. */
+	set_except_vector(0, mipsIRQ);
+
+	for (i = 0; i <= ATLASINT_END; i++) {
+		irq_desc[i].status	= IRQ_DISABLED;
+		irq_desc[i].action	= 0;
+		irq_desc[i].depth	= 1;
+		irq_desc[i].handler	= &atlas_irq_type;
+	}
+
+#ifdef CONFIG_REMOTE_DEBUG
+	if (remote_debug) {
+		set_debug_traps();
+		breakpoint();
+	}
+#endif
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/atlas/atlas_rtc.c linux/arch/mips64/mips-boards/atlas/atlas_rtc.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/atlas/atlas_rtc.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/atlas/atlas_rtc.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,58 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * RTC routines for Atlas style attached Dallas chip.
+ *
+ */
+#include <asm/mc146818rtc.h>
+#include <asm/mips-boards/atlas.h>
+
+
+static unsigned char atlas_rtc_read_data(unsigned long addr)
+{
+	volatile unsigned int *rtc_adr_reg = (void *)ATLAS_RTC_ADR_REG;
+	volatile unsigned int *rtc_dat_reg = (void *)ATLAS_RTC_DAT_REG;
+
+	*rtc_adr_reg = addr;
+
+	return *rtc_dat_reg;
+}
+
+static void atlas_rtc_write_data(unsigned char data, unsigned long addr)
+{
+	volatile unsigned int *rtc_adr_reg = (void *)ATLAS_RTC_ADR_REG;
+	volatile unsigned int *rtc_dat_reg = (void *)ATLAS_RTC_DAT_REG;
+
+	*rtc_adr_reg = addr;
+	*rtc_dat_reg = data;
+}
+
+static int atlas_rtc_bcd_mode(void)
+{
+	return 0;
+}
+
+struct rtc_ops atlas_rtc_ops = {
+	&atlas_rtc_read_data,
+	&atlas_rtc_write_data,
+	&atlas_rtc_bcd_mode
+};
+
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/atlas/atlas_setup.c linux/arch/mips64/mips-boards/atlas/atlas_setup.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/atlas/atlas_setup.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/atlas/atlas_setup.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,123 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Atlas specific setup, including init of the feature struct.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/mc146818rtc.h>
+#include <linux/ioport.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+#include <asm/mips-boards/gt64120.h>
+#include <asm/mips-boards/atlasint.h>
+
+#include <asm/mmu_context.h>
+
+#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
+extern void console_setup(char *, int *);
+char serial_console[20];
+#endif
+
+#ifdef CONFIG_REMOTE_DEBUG
+extern void rs_kgdb_hook(int);
+extern void saa9730_kgdb_hook(void);
+extern void breakpoint(void);
+int remote_debug = 0;
+#endif
+
+extern struct rtc_ops atlas_rtc_ops;
+
+extern void mips_reboot_setup(void);
+
+void __init atlas_setup(void)
+{
+#ifdef CONFIG_REMOTE_DEBUG
+	int rs_putDebugChar(char);
+	char rs_getDebugChar(void);
+	int saa9730_putDebugChar(char);
+	char saa9730_getDebugChar(void);
+	extern int (*putDebugChar)(char);
+	extern char (*getDebugChar)(void);
+#endif
+	char *argptr;
+
+	current_cpu_data.asid_cache = ASID_FIRST_VERSION;
+	TLBMISS_HANDLER_SETUP();
+
+	ioport_resource.end = 0x7fffffff;
+
+#ifdef CONFIG_SERIAL_CONSOLE
+	argptr = prom_getcmdline();
+	if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) {
+		int i = 0;
+		char *s = prom_getenv("modetty0");
+		while(s[i] >= '0' && s[i] <= '9')
+			i++;
+		strcpy(serial_console, "ttyS0,");
+		strncpy(serial_console + 6, s, i);
+		prom_printf("Config serial console: %s\n", serial_console);
+		console_setup(serial_console, NULL);
+	}
+#endif	  
+
+#ifdef CONFIG_REMOTE_DEBUG
+	argptr = prom_getcmdline();
+	if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
+		int line;
+		argptr += strlen("kgdb=ttyS");
+		if (*argptr != '0' && *argptr != '1')
+			printk("KGDB: Uknown serial line /dev/ttyS%c, "
+			       "falling back to /dev/ttyS1\n", *argptr);
+		line = *argptr == '0' ? 0 : 1;
+		printk("KGDB: Using serial line /dev/ttyS%d for session\n",
+		       line ? 1 : 0);
+
+		if(line == 0) {
+			rs_kgdb_hook(line);
+			putDebugChar = rs_putDebugChar;
+			getDebugChar = rs_getDebugChar;
+		} else {
+			saa9730_kgdb_hook();
+			putDebugChar = saa9730_putDebugChar;
+			getDebugChar = saa9730_getDebugChar;
+		}
+
+		prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
+			    "please connect your debugger\n", line ? 1 : 0);
+
+		remote_debug = 1;
+		/* Breakpoints and stuff are in atlas_irq_setup() */
+	}
+#endif
+	argptr = prom_getcmdline();
+
+	if ((argptr = strstr(argptr, "nofpu")) != NULL)
+		mips_cpu.options &= ~MIPS_CPU_FPU;
+
+	rtc_ops = &atlas_rtc_ops;
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/Makefile linux/arch/mips64/mips-boards/generic/Makefile
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/Makefile	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,43 @@
+#
+# Carsten Langgaard, carstenl@mips.com
+# Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+#
+# ########################################################################
+#
+# This program is free software; you can distribute it and/or modify it
+# under the terms of the GNU General Public License (Version 2) as
+# published by the Free Software Foundation.
+# 
+# This program is distributed in the hope it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+# 
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+#
+# #######################################################################
+#
+# Makefile for the MIPS boards generic routines under Linux.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+# Note 2! The CFLAGS definitions are now in the main makefile...
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+all: mipsboards.o
+
+O_TARGET := mipsboards.o
+
+obj-y                           := mipsIRQ.o pci.o reset.o display.o init.o \
+                                   memory.o printf.o cmdline.o time.o
+obj-$(CONFIG_REMOTE_DEBUG)      += gdb_hook.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/cmdline.c linux/arch/mips64/mips-boards/generic/cmdline.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/cmdline.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/cmdline.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,71 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ * 
+ * Kernel command line creation using the prom monitor (YAMON) argc/argv.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+
+/*#define DEBUG_CMDLINE*/
+
+extern int prom_argc;
+extern int *_prom_argv;
+
+/*
+ * A 32-bit PROM pass arguments and environment as 32-bit pointer.
+ * This macro take care of sign extension.
+ */
+#define prom_argv(index) ((char *)(((int *)(int)_prom_argv)[(index)]))
+
+char arcs_cmdline[CL_SIZE];
+
+char * __init prom_getcmdline(void)
+{
+	return &(arcs_cmdline[0]);
+}
+
+
+void  __init prom_init_cmdline(void)
+{
+	char *cp;
+	int actr;
+
+	actr = 1; /* Always ignore argv[0] */
+
+	cp = &(arcs_cmdline[0]);
+	while(actr < prom_argc) {
+	        strcpy(cp, prom_argv(actr));
+		cp += strlen(prom_argv(actr));
+		*cp++ = ' ';
+		actr++;
+	}
+	if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
+		--cp;
+	*cp = '\0';
+
+#ifdef DEBUG_CMDLINE
+	prom_printf("prom_init_cmdline: %s\n", &(arcs_cmdline[0]));
+#endif
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/display.c linux/arch/mips64/mips-boards/generic/display.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/display.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/display.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,47 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ * 
+ * Display routines for display messages in MIPS boards ascii display.
+ *
+ */
+
+#include <asm/mips-boards/generic.h>
+
+
+void mips_display_message(const char *str)
+{
+        volatile unsigned int *display = (void *)ASCII_DISPLAY_POS_BASE;
+	int i;
+
+	for (i = 0; i <= 14; i=i+2) {
+	         if (*str)
+		         display[i] = *str++;
+		 else
+		         display[i] = ' ';
+	}
+}
+
+void mips_display_word(unsigned int num)
+{
+        volatile unsigned int *display = (void *)ASCII_DISPLAY_WORD_BASE;
+	
+	*display = num;
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/gdb_hook.c linux/arch/mips64/mips-boards/generic/gdb_hook.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/gdb_hook.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/gdb_hook.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,202 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * This is the interface to the remote debugger stub.
+ *
+ */
+
+#include <linux/serialP.h>
+#include <linux/serial_reg.h>
+
+#include <asm/serial.h>
+#include <asm/io.h>
+
+static struct serial_state rs_table[RS_TABLE_SIZE] = {
+	SERIAL_PORT_DFNS	/* Defined in serial.h */
+};
+
+static struct async_struct kdb_port_info = {0};
+
+
+static __inline__ unsigned int serial_in(struct async_struct *info, int offset)
+{
+	return inb(info->port + offset);
+}
+
+static __inline__ void serial_out(struct async_struct *info, int offset,
+				int value)
+{
+	outb(value, info->port+offset);
+}
+
+void rs_kgdb_hook(int tty_no) {
+	int t;
+	struct serial_state *ser = &rs_table[tty_no];
+
+	kdb_port_info.state = ser;
+	kdb_port_info.magic = SERIAL_MAGIC;
+	kdb_port_info.port = ser->port;
+	kdb_port_info.flags = ser->flags;
+
+	/*
+	 * Clear all interrupts
+	 */
+	serial_in(&kdb_port_info, UART_LSR);
+	serial_in(&kdb_port_info, UART_RX);
+	serial_in(&kdb_port_info, UART_IIR);
+	serial_in(&kdb_port_info, UART_MSR);
+
+	/*
+	 * Now, initialize the UART 
+	 */
+	serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8);	/* reset DLAB */
+	if (kdb_port_info.flags & ASYNC_FOURPORT) {
+		kdb_port_info.MCR = UART_MCR_DTR | UART_MCR_RTS;
+		t = UART_MCR_DTR | UART_MCR_OUT1;
+	} else {
+		kdb_port_info.MCR 
+			= UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2;
+		t = UART_MCR_DTR | UART_MCR_RTS;
+	}
+
+	kdb_port_info.MCR = t;		/* no interrupts, please */
+	serial_out(&kdb_port_info, UART_MCR, kdb_port_info.MCR);
+	
+	/*
+	 * and set the speed of the serial port
+	 * (currently hardwired to 9600 8N1
+	 */
+
+	/* baud rate is fixed to 9600 (is this sufficient?)*/
+	t = kdb_port_info.state->baud_base / 9600;	
+	/* set DLAB */
+	serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8 | UART_LCR_DLAB);
+	serial_out(&kdb_port_info, UART_DLL, t & 0xff);/* LS of divisor */
+	serial_out(&kdb_port_info, UART_DLM, t >> 8);  /* MS of divisor */
+	/* reset DLAB */
+	serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8);
+}
+
+int rs_putDebugChar(char c)
+{
+
+	if (!kdb_port_info.state) { 	/* need to init device first */
+		return 0;
+	}
+
+	while ((serial_in(&kdb_port_info, UART_LSR) & UART_LSR_THRE) == 0)
+		;
+
+	serial_out(&kdb_port_info, UART_TX, c);
+
+	return 1;
+}
+
+char rs_getDebugChar(void)
+{
+	if (!kdb_port_info.state) { 	/* need to init device first */
+		return 0;
+	}
+
+	while (!(serial_in(&kdb_port_info, UART_LSR) & 1))
+		;
+
+	return(serial_in(&kdb_port_info, UART_RX));
+}
+
+
+#ifdef CONFIG_MIPS_ATLAS
+
+#include <asm/mips-boards/atlas.h>
+#include <asm/mips-boards/saa9730_uart.h>
+
+#define INB(a)     inb((unsigned long)a)
+#define OUTB(x,a)  outb(x,(unsigned long)a)
+
+/*
+ * This is the interface to the remote debugger stub
+ * if the Philips part is used for the debug port,
+ * called from the platform setup code.
+ *
+ * PCI init will not have been done yet, we make a
+ * universal assumption about the way the bootloader (YAMON)
+ * have located and set up the chip.
+ */
+static t_uart_saa9730_regmap *kgdb_uart = (void *)(ATLAS_SAA9730_REG + SAA9730_UART_REGS_ADDR);
+
+static int saa9730_kgdb_active = 0;
+
+void saa9730_kgdb_hook(void) 
+{
+        volatile unsigned char t;
+
+        /*
+         * Clear all interrupts
+         */
+	t = INB(&kgdb_uart->Lsr);
+	t += INB(&kgdb_uart->Msr);
+	t += INB(&kgdb_uart->Thr_Rbr);
+	t += INB(&kgdb_uart->Iir_Fcr);
+
+        /*
+         * Now, initialize the UART
+         */
+	/* 8 data bits, one stop bit, no parity */
+	OUTB(SAA9730_LCR_DATA8, &kgdb_uart->Lcr);
+
+        /* baud rate is fixed to 9600 (is this sufficient?)*/
+	OUTB(0, &kgdb_uart->BaudDivMsb); /* HACK - Assumes standard crystal */
+	OUTB(23, &kgdb_uart->BaudDivLsb); /* HACK - known for MIPS Atlas */
+
+	/* Set RTS/DTR active */
+	OUTB(SAA9730_MCR_DTR | SAA9730_MCR_RTS, &kgdb_uart->Mcr);
+	saa9730_kgdb_active = 1;
+}
+
+int saa9730_putDebugChar(char c)
+{
+
+        if (!saa9730_kgdb_active) {     /* need to init device first */
+                return 0;
+        }
+
+        while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_THRE))
+                ;
+	OUTB(c, &kgdb_uart->Thr_Rbr);
+
+        return 1;
+}
+
+char saa9730_getDebugChar(void)
+{
+	char c;
+
+        if (!saa9730_kgdb_active) {     /* need to init device first */
+                return 0;
+        }
+        while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_DR))
+                ;
+
+	c = INB(&kgdb_uart->Thr_Rbr);
+        return(c);
+}
+
+#endif
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/init.c linux/arch/mips64/mips-boards/generic/init.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/init.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/init.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,152 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * PROM library initialisation code.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+
+#include <asm/io.h>
+#include <asm/mips-boards/prom.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/gt64120.h>
+#include <asm/mips-boards/malta.h>
+
+/* Environment variable */
+typedef struct
+{
+    char *name;
+    char *val;
+}t_env_var;
+
+int prom_argc;
+int *_prom_argv, *_prom_envp;
+
+/*
+ * A 32-bit PROM pass arguments and environment as 32-bit pointer.
+ * This macro take care of sign extension.
+ */
+#define prom_envp(index) ((char *)(((int *)(int)_prom_envp)[(index)]))
+
+int init_debug = 0;
+
+char *prom_getenv(char *envname)
+{
+        /*
+	 * Return a pointer to the given environment variable.
+	 * We're using 64-bit pointers, but all pointers in the PROM 
+	 * structures are only 32-bit, so we need some workarounds.
+	 */
+	int i, index=0;
+
+	i = strlen(envname);
+
+	while(prom_envp(index)) {
+		if(strncmp(envname, prom_envp(index), i) == 0) {
+			return(prom_envp(index+1));
+		}
+		index += 2;
+	}
+
+	return(NULL);
+}
+
+static inline unsigned char str2hexnum(unsigned char c)
+{
+	if(c >= '0' && c <= '9')
+		return c - '0';
+	if(c >= 'a' && c <= 'f')
+		return c - 'a' + 10;
+	return 0; /* foo */
+}
+
+static inline void str2eaddr(unsigned char *ea, unsigned char *str)
+{
+	int i;
+
+	for(i = 0; i < 6; i++) {
+		unsigned char num;
+
+		if((*str == '.') || (*str == ':'))
+			str++;
+		num = str2hexnum(*str++) << 4;
+		num |= (str2hexnum(*str++));
+		ea[i] = num;
+	}
+}
+ 
+int get_ethernet_addr(char *ethernet_addr)
+{
+        char *ethaddr_str;
+
+        ethaddr_str = prom_getenv("ethaddr");
+	if (!ethaddr_str) {
+	        printk("ethaddr not set in boot prom\n");
+		return -1;
+	}
+	str2eaddr(ethernet_addr, ethaddr_str);
+
+	if (init_debug > 1)
+	{
+	        int i;
+		printk("get_ethernet_addr: ");
+	        for (i=0; i<5; i++)
+		        printk("%02x:", (unsigned char)*(ethernet_addr+i));
+		printk("%02x\n", *(ethernet_addr+i));
+	}
+
+	return 0;
+}
+
+int __init prom_init(int argc, char **argv, char **envp)
+{
+	prom_argc = argc;
+	_prom_argv = (int *)argv;
+	_prom_envp = (int *)envp;
+
+	mips_display_message("LINUX");
+
+	/*
+	 * Setup the North bridge to do Master byte-lane swapping when 
+	 * running in bigendian.
+	 */
+#if defined(__MIPSEL__)
+	GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
+		 GT_PCI0_CMD_SBYTESWAP_BIT);
+#else
+	GT_WRITE(GT_PCI0_CMD_OFS, 0);
+#endif
+
+#if defined(CONFIG_MIPS_MALTA)
+	mips_io_port_base = MALTA_PORT_BASE;
+#else
+	mips_io_port_base = KSEG1;
+#endif
+
+	setup_prom_printf(0);
+	prom_printf("\nLINUX started...\n");
+	prom_init_cmdline();
+	prom_meminit();
+
+	return 0;
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/memory.c linux/arch/mips64/mips-boards/generic/memory.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/memory.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/memory.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,263 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * PROM library functions for acquiring/using memory descriptors given to 
+ * us from the YAMON.
+ * 
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+
+#include <asm/mips-boards/prom.h>
+
+/*#define DEBUG*/
+
+enum yamon_memtypes {
+	yamon_dontuse,
+	yamon_prom,
+	yamon_free,
+};
+struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
+
+#define MEMTYPE_DONTUSE 0
+#define MEMTYPE_PROM    1
+#define MEMTYPE_FREE    2
+
+#ifdef DEBUG
+static char *mtypes[3] = {
+	"Dont use memory",
+	"YAMON PROM memory",
+	"Free memmory",
+};
+#endif
+
+/* References to section boundaries */
+extern char _end;
+
+#define PFN_ALIGN(x)    (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
+struct prom_pmemblock * __init prom_getmdesc(void)
+{
+	char *memsize_str;
+	unsigned int memsize;
+
+	memsize_str = prom_getenv("memsize");
+	if (!memsize_str) {
+		prom_printf("memsize not set in boot prom, set to default (32Mb)\n");
+		memsize = 0x02000000;
+	} else {
+#ifdef DEBUG
+		prom_printf("prom_memsize = %s\n", memsize_str);
+#endif
+		memsize = simple_strtol(memsize_str, NULL, 0);
+	}
+
+	memset(mdesc, 0, sizeof(mdesc));
+
+	mdesc[0].type = yamon_dontuse;
+	mdesc[0].base = 0x00000000;
+	mdesc[0].size = 0x00001000;
+
+	mdesc[1].type = yamon_prom;
+	mdesc[1].base = 0x00001000;
+	mdesc[1].size = 0x000ef000;
+
+#if (CONFIG_MIPS_MALTA)
+	/* 
+	 * The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
+	 * south bridge and PCI access always forwarded to the ISA Bus and 
+	 * BIOSCS# is always generated.
+	 * This mean that this area can't be used as DMA memory for PCI 
+	 * devices.
+	 */
+	mdesc[2].type = yamon_dontuse;
+	mdesc[2].base = 0x000f0000;
+	mdesc[2].size = 0x00010000;
+#else
+	mdesc[2].type = yamon_prom;
+	mdesc[2].base = 0x000f0000;
+	mdesc[2].size = 0x00010000;
+#endif
+
+	mdesc[3].type = yamon_dontuse;
+	mdesc[3].base = 0x00100000;
+	mdesc[3].size = CPHYSADDR(PFN_ALIGN(&_end)) - mdesc[3].base;
+
+	mdesc[4].type = yamon_free;
+	mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end));
+	mdesc[4].size = memsize - mdesc[4].base;
+
+	return &mdesc[0];
+}
+
+int __init page_is_ram(unsigned long pagenr)
+{
+	if ((pagenr << PAGE_SHIFT) < mdesc[4].base + mdesc[4].size)
+		return 1;
+
+	return 0;
+}
+
+static struct prom_pmemblock pblocks[PROM_MAX_PMEMBLOCKS];
+
+static int __init prom_memtype_classify (unsigned int type)
+{
+	switch (type) {
+	case yamon_free:
+		return MEMTYPE_FREE;
+	case yamon_prom:
+		return MEMTYPE_PROM;
+	default:
+		return MEMTYPE_DONTUSE;
+	}
+}
+
+static inline unsigned long find_max_low_pfn(void)
+{
+	struct prom_pmemblock *p, *highest;
+	unsigned long pfn;
+
+	p = pblocks;
+	highest = 0;
+	while (p->size != 0) {
+		if (!highest || p->base > highest->base)
+			highest = p;
+		p++;
+        }
+
+	pfn = (highest->base + highest->size) >> PAGE_SHIFT;
+#ifdef DEBUG
+	prom_printf("find_max_low_pfn: 0x%lx pfns.\n", pfn);
+#endif
+	return pfn;
+}
+
+static inline struct prom_pmemblock *find_largest_memblock(void)
+{
+	struct prom_pmemblock *p, *largest;
+
+	p = pblocks;
+	largest = 0;
+	while (p->size != 0) {
+		if (!largest || p->size > largest->size)
+			largest = p;
+		p++;
+	}
+
+	return largest;
+}
+
+void __init prom_meminit(void)
+{
+	struct prom_pmemblock *largest, *p;
+	unsigned long bootmap_size;
+	int totram;
+	int i = 0;
+
+#ifdef DEBUG
+	prom_printf("YAMON MEMORY DESCRIPTOR dump:\n");
+	p = prom_getmdesc();
+	while (p->size) {
+		prom_printf("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n",
+			    i, p, p->base, p->size, mtypes[p->type]);
+		p++;
+		i++;
+	}
+#endif
+	totram = 0;
+	i = 0;
+	p = prom_getmdesc();
+
+	while (p->size) {
+		pblocks[i].type = prom_memtype_classify (p->type);
+		pblocks[i].base = p->base;
+		pblocks[i].size = p->size;
+		switch (pblocks[i].type) {
+		case MEMTYPE_FREE:
+			totram += pblocks[i].size;
+#ifdef DEBUG
+			prom_printf("free_chunk[%d]: base=%08lx size=%d\n",
+				    i, pblocks[i].base, pblocks[i].size);
+#endif
+			i++;
+			break;
+		case MEMTYPE_PROM:
+#ifdef DEBUG
+		        prom_printf("prom_chunk[%d]: base=%08lx size=%d\n",
+				    i, pblocks[i].base, pblocks[i].size);
+#endif
+			i++;
+			break;
+		default:
+			break;
+		}
+		p++;
+	}
+	pblocks[i].base = 0xdeadbeef;
+	pblocks[i].size = 0; /* indicates last elem. of array */
+
+	max_low_pfn = find_max_low_pfn();
+	largest = find_largest_memblock();
+	bootmap_size = init_bootmem(largest->base >> PAGE_SHIFT, max_low_pfn);
+
+	for (i = 0; pblocks[i].size; i++)
+		if (pblocks[i].type == MEMTYPE_FREE)
+			free_bootmem(pblocks[i].base, pblocks[i].size);
+
+	/* This test is simpleminded.  It will fail if the bootmem bitmap
+	   falls into multiple adjacent PROM memory areas.  */
+	if (bootmap_size > largest->size) {
+		prom_printf("CRITIAL: overwriting PROM data.\n");
+		BUG();
+	}
+
+	/* Reserve the memory bootmap itself */
+	reserve_bootmem(largest->base, bootmap_size);
+	printk("PROMLIB: Total free ram %d bytes (%dK,%dMB)\n",
+	       totram, (totram/1024), (totram/1024/1024));
+}
+
+void prom_free_prom_memory (void)
+{
+	struct prom_pmemblock *p;
+	unsigned long freed = 0;
+	unsigned long addr;
+
+	for (p = pblocks; p->size != 0; p++) {
+		if (p->type != MEMTYPE_PROM)
+			continue;
+
+		addr = p->base;
+		while (addr < p->base + p->size) {
+		        ClearPageReserved(virt_to_page(__va(addr)));
+			set_page_count(virt_to_page(__va(addr)), 1);
+			free_page(__va(addr));
+			addr += PAGE_SIZE;
+			freed += PAGE_SIZE;
+		}
+	}
+	printk("Freeing prom memory: %ldkb freed\n", freed >> 10);
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/mipsIRQ.S linux/arch/mips64/mips-boards/generic/mipsIRQ.S
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/mipsIRQ.S	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/mipsIRQ.S	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,122 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Interrupt exception dispatch code.
+ *
+ */
+#include <linux/config.h>
+
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+/* A lot of complication here is taken away because:
+ *
+ * 1) We handle one interrupt and return, sitting in a loop and moving across
+ *    all the pending IRQ bits in the cause register is _NOT_ the answer, the
+ *    common case is one pending IRQ so optimize in that direction.
+ *
+ * 2) We need not check against bits in the status register IRQ mask, that
+ *    would make this routine slow as hell.
+ *
+ * 3) Linux only thinks in terms of all IRQs on or all IRQs off, nothing in
+ *    between like BSD spl() brain-damage.
+ *
+ * Furthermore, the IRQs on the MIPS board look basically (barring software
+ * IRQs which we don't use at all and all external interrupt sources are
+ * combined together on hardware interrupt 0 (MIPS IRQ 2)) like:
+ *
+ *	MIPS IRQ	Source
+ *      --------        ------
+ *             0	Software (ignored)
+ *             1        Software (ignored)
+ *             2        Combined hardware interrupt (hw0)
+ *             3        Hardware (ignored)
+ *             4        Hardware (ignored)
+ *             5        Hardware (ignored)
+ *             6        Hardware (ignored)
+ *             7        R4k timer (what we use)
+ *
+ * We handle the IRQ according to _our_ priority which is:
+ *
+ * Highest ----     R4k Timer
+ * Lowest  ----     Combined hardware interrupt
+ *
+ * then we just return, if multiple IRQs are pending then we will just take
+ * another exception, big deal.
+ */
+
+	.text
+	.set	noreorder
+	.set	noat
+	.align	5
+	NESTED(mipsIRQ, PT_SIZE, sp)
+	SAVE_ALL
+	CLI
+	.set	at
+
+	mfc0	s0, CP0_CAUSE		# get irq mask
+
+	/* First we check for r4k counter/timer IRQ. */
+	andi	a0, s0, CAUSEF_IP7
+	beq	a0, zero, 1f
+	 andi	a0, s0, CAUSEF_IP2	# delay slot, check hw0 interrupt
+
+	/* Wheee, a timer interrupt. */
+	move	a0, sp
+	jal	mips_timer_interrupt
+	 nop
+
+	j	ret_from_irq
+	 nop
+
+1:
+	beq	a0, zero, 1f
+	 nop
+
+	/* Wheee, combined hardware level zero interrupt. */
+#if defined(CONFIG_MIPS_ATLAS)
+	jal	atlas_hw0_irqdispatch
+#elif defined(CONFIG_MIPS_MALTA)
+	jal	malta_hw0_irqdispatch
+#else
+#error "MIPS board not supported\n"	
+#endif
+	 move	a0, sp			# delay slot
+
+	j	ret_from_irq
+	 nop				# delay slot
+
+1:
+	/*
+	 * Here by mistake?  This is possible, what can happen is that by the
+	 * time we take the exception the IRQ pin goes low, so just leave if
+	 * this is the case.
+	 */
+	move	a1,s0
+	PRINT("Got interrupt: c0_cause = %08x\n")
+	mfc0	a1, CP0_EPC
+	PRINT("c0_epc = %08x\n")
+
+	j	ret_from_irq
+	 nop
+	END(mipsIRQ)
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/pci.c linux/arch/mips64/mips-boards/generic/pci.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/pci.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/pci.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,337 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * MIPS boards specific PCI support.
+ *
+ */
+#include <linux/config.h>
+
+#ifdef CONFIG_PCI
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/gt64120.h>
+#ifdef CONFIG_MIPS_MALTA
+#include <asm/mips-boards/malta.h>
+#endif
+
+#define PCI_ACCESS_READ  0
+#define PCI_ACCESS_WRITE 1
+
+static int
+mips_pcibios_config_access(unsigned char access_type, struct pci_dev *dev,
+                           unsigned char where, u32 *data)
+{
+	unsigned char bus = dev->bus->number;
+	unsigned char dev_fn = dev->devfn;
+        u32 intr;
+
+	if ((bus == 0) && (dev_fn >= PCI_DEVFN(31,0)))
+	        return -1; /* Because of a bug in the galileo (for slot 31). */
+
+	/* Clear cause register bits */
+	GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT | 
+	                             GT_INTRCAUSE_TARABORT0_BIT));
+
+	/* Setup address */
+	GT_WRITE(GT_PCI0_CFGADDR_OFS, 
+		 (bus         << GT_PCI0_CFGADDR_BUSNUM_SHF)   |
+		 (dev_fn      << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+		 ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF)   |
+		 GT_PCI0_CFGADDR_CONFIGEN_BIT);
+
+	if (access_type == PCI_ACCESS_WRITE) {
+	        if (bus == 0 && dev_fn == 0) {
+		        /* 
+			 * Galileo is acting differently than other devices. 
+			 */
+		        GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
+		} else {
+		        GT_PCI_WRITE(GT_PCI0_CFGDATA_OFS, *data);
+		}
+	} else {
+	        if (bus == 0 && dev_fn == 0) {
+		        /* 
+			 * Galileo is acting differently than other devices. 
+			 */
+		        GT_READ(GT_PCI0_CFGDATA_OFS, *data);
+		} else {
+		        GT_PCI_READ(GT_PCI0_CFGDATA_OFS, *data);
+		}
+	}
+
+	/* Check for master or target abort */
+	GT_READ(GT_INTRCAUSE_OFS, intr);
+
+	if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT))
+	{
+	        /* Error occured */
+
+	        /* Clear bits */
+	        GT_WRITE( GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT | 
+					      GT_INTRCAUSE_TARABORT0_BIT) );
+
+		return -1;
+	}
+
+	return 0;
+}
+
+
+/*
+ * We can't address 8 and 16 bit words directly.  Instead we have to
+ * read/write a 32bit word and mask/modify the data we actually want.
+ */
+static int
+mips_pcibios_read_config_byte (struct pci_dev *dev, int where, u8 *val)
+{
+	u32 data = 0;
+
+	if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+		return -1;
+
+	*val = (data >> ((where & 3) << 3)) & 0xff;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int
+mips_pcibios_read_config_word (struct pci_dev *dev, int where, u16 *val)
+{
+	u32 data = 0;
+
+	if (where & 1)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+
+	if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+	       return -1;
+
+	*val = (data >> ((where & 3) << 3)) & 0xffff;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+mips_pcibios_read_config_dword (struct pci_dev *dev, int where, u32 *val)
+{
+	u32 data = 0;
+
+	if (where & 3)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+	
+	if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+		return -1;
+
+	*val = data;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int
+mips_pcibios_write_config_byte (struct pci_dev *dev, int where, u8 val)
+{
+	u32 data = 0;
+       
+	if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+		return -1;
+
+	data = (data & ~(0xff << ((where & 3) << 3))) |
+	       (val << ((where & 3) << 3));
+
+	if (mips_pcibios_config_access(PCI_ACCESS_WRITE, dev, where, &data))
+		return -1;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+mips_pcibios_write_config_word (struct pci_dev *dev, int where, u16 val)
+{
+        u32 data = 0;
+
+	if (where & 1)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+       
+        if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+	       return -1;
+
+	data = (data & ~(0xffff << ((where & 3) << 3))) | 
+	       (val << ((where & 3) << 3));
+
+	if (mips_pcibios_config_access(PCI_ACCESS_WRITE, dev, where, &data))
+	       return -1;
+
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+mips_pcibios_write_config_dword(struct pci_dev *dev, int where, u32 val)
+{
+	if (where & 3)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+
+	if (mips_pcibios_config_access(PCI_ACCESS_WRITE, dev, where, &val))
+	       return -1;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops mips_pci_ops = {
+	mips_pcibios_read_config_byte,
+        mips_pcibios_read_config_word,
+	mips_pcibios_read_config_dword,
+	mips_pcibios_write_config_byte,
+	mips_pcibios_write_config_word,
+	mips_pcibios_write_config_dword
+};
+
+void __init pcibios_init(void)
+{
+#ifdef CONFIG_MIPS_MALTA
+	struct pci_dev *pdev;
+	unsigned char reg_val;
+#endif
+
+	printk("PCI: Probing PCI hardware on host bus 0.\n");
+	pci_scan_bus(0, &mips_pci_ops, NULL);
+
+	/* 
+	 * Due to a bug in the Galileo system controller, we need to setup 
+	 * the PCI BAR for the Galileo internal registers.
+	 * This should be done in the bios/bootprom and will be fixed in
+	 * a later revision of YAMON (the MIPS boards boot prom).
+	 */
+	GT_WRITE(GT_PCI0_CFGADDR_OFS,
+		 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF)   |  /* Local bus */
+		 (0 << GT_PCI0_CFGADDR_DEVNUM_SHF)   |  /* GT64120 device */
+		 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |  /* Function 0 */
+		 ((0x20/4) << GT_PCI0_CFGADDR_REGNUM_SHF) |  /* BAR 4 */
+		 GT_PCI0_CFGADDR_CONFIGEN_BIT );
+
+	/* Perform the write */
+	GT_WRITE( GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE)); 
+
+#ifdef CONFIG_MIPS_MALTA
+	pci_for_each_dev(pdev) {
+		if ((pdev->vendor == PCI_VENDOR_ID_INTEL)
+		    && (pdev->device == PCI_DEVICE_ID_INTEL_82371AB)
+		    && (PCI_SLOT(pdev->devfn) == 0x0a)) {
+			/*
+			 * IDE Decode enable.
+			 */
+			pci_read_config_byte(pdev, 0x41, &reg_val);
+        		pci_write_config_byte(pdev, 0x41, reg_val | 0x80);
+			pci_read_config_byte(pdev, 0x43, &reg_val);
+        		pci_write_config_byte(pdev, 0x43, reg_val | 0x80);
+		}
+
+		if ((pdev->vendor == PCI_VENDOR_ID_INTEL)
+		    && (pdev->device == PCI_DEVICE_ID_INTEL_82371AB_0)
+		    && (PCI_SLOT(pdev->devfn) == 0x0a)) {
+			/*
+			 * Set top of main memory accessible by ISA or DMA
+			 * devices to 16 Mb.
+			 */
+			pci_read_config_byte(pdev, 0x69, &reg_val);
+			pci_write_config_byte(pdev, 0x69, reg_val | 0xf0);
+		}
+	}
+
+	/* 
+	 * Activate Floppy Controller in the SMSC FDC37M817 Super I/O 
+	 * Controller.
+	 * This should be done in the bios/bootprom and will be fixed in
+         * a later revision of YAMON (the MIPS boards boot prom).
+	 */
+	/* Entering config state. */
+	SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG); 
+       
+	/* Activate floppy controller. */
+	SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
+	SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
+	SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
+	SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
+
+	/* Exit config state. */
+	SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
+#endif
+}
+
+int __init
+pcibios_enable_device(struct pci_dev *dev)
+{
+	/* Not needed, since we enable all devices at startup.  */
+	return 0;
+}
+
+void __init
+pcibios_align_resource(void *data, struct resource *res, unsigned long size)
+{
+}
+
+char * __init
+pcibios_setup(char *str)
+{
+	/* Nothing to do for now.  */
+
+	return str;
+}
+
+struct pci_fixup pcibios_fixups[] = {
+	{ 0 }
+};
+
+void __init
+pcibios_update_resource(struct pci_dev *dev, struct resource *root,
+                        struct resource *res, int resource)
+{
+	unsigned long where, size;
+	u32 reg;
+
+	where = PCI_BASE_ADDRESS_0 + (resource * 4);
+	size = res->end - res->start;
+	pci_read_config_dword(dev, where, &reg);
+	reg = (reg & size) | (((u32)(res->start - root->start)) & ~size);
+	pci_write_config_dword(dev, where, reg);
+}
+
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 1;
+}
+
+/*
+ *  Called after each bus is probed, but before its children
+ *  are examined.
+ */
+void __init pcibios_fixup_bus(struct pci_bus *b)
+{
+	pci_read_bridge_bases(b);
+}
+
+#endif /* CONFIG_PCI */
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/printf.c linux/arch/mips64/mips-boards/generic/printf.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/printf.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/printf.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,140 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Putting things on the screen/serial line using YAMONs facilities.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/serialP.h>
+#include <linux/serial_reg.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/serial.h>
+
+
+#ifdef CONFIG_MIPS_ATLAS 
+/* 
+ * Atlas registers are memory mapped on 64-bit aligned boundaries and 
+ * only word access are allowed.
+ * When reading the UART 8 bit registers only the LSB are valid.
+ */
+unsigned int atlas_serial_in(struct async_struct *info, int offset)
+{
+	return (*(volatile unsigned int *)(info->port + mips_io_port_base + offset*8) & 0xff);
+}
+
+void atlas_serial_out(struct async_struct *info, int offset, int value)
+{
+	*(volatile unsigned int *)(info->port + mips_io_port_base + offset*8) = value;
+}
+
+#define serial_in  atlas_serial_in
+#define serial_out atlas_serial_out
+
+#else
+
+static unsigned int serial_in(struct async_struct *info, int offset)
+{
+	return inb(info->port + offset);
+}
+
+static void serial_out(struct async_struct *info, int offset,
+				int value)
+{
+	outb(value, info->port + offset);
+}
+#endif
+
+static struct serial_state rs_table[] = {
+	SERIAL_PORT_DFNS	/* Defined in serial.h */
+};
+
+/*
+ * Hooks to fake "prom" console I/O before devices 
+ * are fully initialized. 
+ */
+static struct async_struct prom_port_info = {0};
+
+void __init setup_prom_printf(int tty_no) {
+	struct serial_state *ser = &rs_table[tty_no];
+
+	prom_port_info.state = ser;
+	prom_port_info.magic = SERIAL_MAGIC;
+	prom_port_info.port = ser->port;
+	prom_port_info.flags = ser->flags;
+
+	/* No setup of UART - assume YAMON left in sane state */
+}
+
+int putPromChar(char c)
+{
+        if (!prom_port_info.state) { 	/* need to init device first */
+		return 0;
+	}
+
+	while ((serial_in(&prom_port_info, UART_LSR) & UART_LSR_THRE) == 0)
+		;
+
+	serial_out(&prom_port_info, UART_TX, c);
+
+	return 1;
+}
+
+char getPromChar(void)
+{
+	if (!prom_port_info.state) { 	/* need to init device first */
+		return 0;
+	}
+
+	while (!(serial_in(&prom_port_info, UART_LSR) & 1))
+		;
+
+	return(serial_in(&prom_port_info, UART_RX));
+}
+
+static char buf[1024];
+
+void __init prom_printf(char *fmt, ...)
+{
+	va_list args;
+	int l;
+	char *p, *buf_end;
+	long flags;
+
+	int putPromChar(char);
+
+	/* Low level, brute force, not SMP safe... */
+	save_and_cli(flags);
+	va_start(args, fmt);
+	l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
+	va_end(args);
+
+	buf_end = buf + l;
+
+	for (p = buf; p < buf_end; p++) {
+		/* Crude cr/nl handling is better than none */
+		if(*p == '\n')putPromChar('\r');
+		putPromChar(*p);
+	}
+	restore_flags(flags);
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/reset.c linux/arch/mips64/mips-boards/generic/reset.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/reset.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/reset.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,61 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Reset the MIPS boards.
+ *
+ */
+#include <linux/config.h>
+
+#include <asm/mips-boards/generic.h>
+#if defined(CONFIG_MIPS_ATLAS)
+#include <asm/mips-boards/atlas.h>
+#endif
+
+void machine_restart(char *command) __attribute__((noreturn));
+void machine_halt(void) __attribute__((noreturn));
+#if defined(CONFIG_MIPS_ATLAS)
+void machine_power_off(void) __attribute__((noreturn));
+#endif
+
+void machine_restart(char *command)
+{
+        volatile unsigned int *softres_reg = (void *)SOFTRES_REG;
+
+	*softres_reg = GORESET;
+}
+
+void machine_halt(void)
+{
+        volatile unsigned int *softres_reg = (void *)SOFTRES_REG;
+
+	*softres_reg = GORESET;
+}
+
+void machine_power_off(void)
+{
+#if defined(CONFIG_MIPS_ATLAS)
+        volatile unsigned int *psustby_reg = (void *)ATLAS_PSUSTBY_REG;
+
+	*psustby_reg = ATLAS_GOSTBY;
+#else
+	machine_halt();
+#endif
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/generic/time.c linux/arch/mips64/mips-boards/generic/time.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/generic/time.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/generic/time.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,399 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Setting up the clock on the MIPS boards.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+
+#include <asm/mipsregs.h>
+#include <asm/ptrace.h>
+
+#include <linux/mc146818rtc.h>
+#include <linux/timex.h>
+
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+
+extern volatile unsigned long wall_jiffies;
+static long last_rtc_update = 0;
+unsigned long missed_heart_beats = 0;
+
+static unsigned long r4k_offset; /* Amount to increment compare reg each time */
+static unsigned long r4k_cur;    /* What counter should be at next timer irq */
+extern rwlock_t xtime_lock;
+
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+
+#if defined(CONFIG_MIPS_ATLAS)
+static char display_string[] = "        LINUX ON ATLAS       ";
+#endif
+#if defined(CONFIG_MIPS_MALTA)
+static char display_string[] = "        LINUX ON MALTA       ";
+#endif
+static unsigned int display_count = 0;
+#define MAX_DISPLAY_COUNT (sizeof(display_string) - 8) 
+
+static unsigned int timer_tick_count=0;
+
+
+static inline void ack_r4ktimer(unsigned long newval)
+{
+	write_32bit_cp0_register(CP0_COMPARE, newval);
+}
+
+
+/*
+ * In order to set the CMOS clock precisely, set_rtc_mmss has to be
+ * called 500 ms after the second nowtime has started, because when
+ * nowtime is written into the registers of the CMOS clock, it will
+ * jump to the next second precisely 500 ms later. Check the Motorola
+ * MC146818A or Dallas DS12887 data sheet for details.
+ *
+ * BUG: This routine does not handle hour overflow properly; it just
+ *      sets the minutes. Usually you won't notice until after reboot!
+ */
+static int set_rtc_mmss(unsigned long nowtime)
+{
+	int retval = 0;
+	int real_seconds, real_minutes, cmos_minutes;
+	unsigned char save_control, save_freq_select;
+
+	save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
+	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
+
+	save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
+	CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
+
+	cmos_minutes = CMOS_READ(RTC_MINUTES);
+
+	/*
+	 * since we're only adjusting minutes and seconds,
+	 * don't interfere with hour overflow. This avoids
+	 * messing with unknown time zones but requires your
+	 * RTC not to be off by more than 15 minutes
+	 */
+	real_seconds = nowtime % 60;
+	real_minutes = nowtime / 60;
+	if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
+		real_minutes += 30;		/* correct for half hour time zone */
+	real_minutes %= 60;
+
+	if (abs(real_minutes - cmos_minutes) < 30) {
+		CMOS_WRITE(real_seconds,RTC_SECONDS);
+		CMOS_WRITE(real_minutes,RTC_MINUTES);
+	} else {
+		printk(KERN_WARNING
+		       "set_rtc_mmss: can't update from %d to %d\n",
+		       cmos_minutes, real_minutes);
+ 		retval = -1;
+	}
+
+	/* The following flags have to be released exactly in this order,
+	 * otherwise the DS12887 (popular MC146818A clone with integrated
+	 * battery and quartz) will not reset the oscillator and will not
+	 * update precisely 500 ms later. You won't find this mentioned in
+	 * the Dallas Semiconductor data sheets, but who believes data
+	 * sheets anyway ...                           -- Markus Kuhn
+	 */
+	CMOS_WRITE(save_control, RTC_CONTROL);
+	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
+
+	return retval;
+}
+
+/*
+ * There are a lot of conceptually broken versions of the MIPS timer interrupt
+ * handler floating around.  This one is rather different, but the algorithm
+ * is provably more robust.
+ */
+void mips_timer_interrupt(struct pt_regs *regs)
+{
+	int irq = 7;
+
+	if (r4k_offset == 0)
+		goto null;
+
+	do {
+		kstat.irqs[0][irq]++;
+		do_timer(regs);
+
+		/* Historical comment/code:
+ 		 * RTC time of day s updated approx. every 11 
+ 		 * minutes.  Because of how the numbers work out 
+ 		 * we need to make absolutely sure we do this update
+ 		 * within 500ms before the * next second starts, 
+ 		 * thus the following code.
+ 		 */
+		read_lock(&xtime_lock);
+		if ((time_status & STA_UNSYNC) == 0 
+		    && xtime.tv_sec > last_rtc_update + 660 
+		    && xtime.tv_usec >= 500000 - (tick >> 1) 
+		    && xtime.tv_usec <= 500000 + (tick >> 1))
+			if (set_rtc_mmss(xtime.tv_sec) == 0)
+				last_rtc_update = xtime.tv_sec;
+			else
+				/* do it again in 60 s */
+	    			last_rtc_update = xtime.tv_sec - 600; 
+		read_unlock(&xtime_lock);
+
+		if ((timer_tick_count++ % HZ) == 0) {
+		    mips_display_message(&display_string[display_count++]);
+		    if (display_count == MAX_DISPLAY_COUNT)
+		        display_count = 0;
+		}
+
+		r4k_cur += r4k_offset;
+		ack_r4ktimer(r4k_cur);
+
+	} while (((unsigned int)read_32bit_cp0_register(CP0_COUNT)
+	         - (unsigned int)r4k_cur) < 0x7fffffff);
+
+	return;
+
+null:
+	ack_r4ktimer(0);
+}
+
+/* 
+ * Figure out the r4k offset, the amount to increment the compare
+ * register for each time tick. 
+ * Use the RTC to calculate offset.
+ */
+static unsigned long __init cal_r4koff(void)
+{
+	unsigned long count;
+	unsigned int flags;
+
+	__save_and_cli(flags);
+
+	/* Start counter exactly on falling edge of update flag */
+	while (CMOS_READ(RTC_REG_A) & RTC_UIP);
+	while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
+
+	/* Start r4k counter. */
+	write_32bit_cp0_register(CP0_COUNT, 0);
+
+	/* Read counter exactly on falling edge of update flag */
+	while (CMOS_READ(RTC_REG_A) & RTC_UIP);
+	while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
+
+	count = read_32bit_cp0_register(CP0_COUNT);
+
+	/* restore interrupts */
+	__restore_flags(flags);
+
+	return (count / HZ);
+}
+
+static unsigned long __init get_mips_time(void)
+{
+	unsigned int year, mon, day, hour, min, sec;
+	unsigned char save_control;
+
+	save_control = CMOS_READ(RTC_CONTROL);
+
+	/* Freeze it. */
+	CMOS_WRITE(save_control | RTC_SET, RTC_CONTROL);
+
+	/* Read regs. */
+	sec = CMOS_READ(RTC_SECONDS);
+	min = CMOS_READ(RTC_MINUTES);
+	hour = CMOS_READ(RTC_HOURS);
+
+	if (!(save_control & RTC_24H))
+	{
+		if ((hour & 0xf) == 0xc)
+		        hour &= 0x80;
+	        if (hour & 0x80)
+		        hour = (hour & 0xf) + 12;     
+	}
+	day = CMOS_READ(RTC_DAY_OF_MONTH);
+	mon = CMOS_READ(RTC_MONTH);
+	year = CMOS_READ(RTC_YEAR);
+
+	/* Unfreeze clock. */
+	CMOS_WRITE(save_control, RTC_CONTROL);
+
+	if ((year += 1900) < 1970)
+	        year += 100;
+
+	return mktime(year, mon, day, hour, min, sec);
+}
+
+void __init time_init(void)
+{
+        unsigned int est_freq, flags;
+
+        /* Set Data mode - binary. */ 
+        CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
+
+	printk("calculating r4koff... ");
+	r4k_offset = cal_r4koff();
+	printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
+
+	est_freq = 2*r4k_offset*HZ;	
+	est_freq += 5000;    /* round */
+	est_freq -= est_freq%10000;
+	printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, 
+	       (est_freq%1000000)*100/1000000);
+	r4k_cur = (read_32bit_cp0_register(CP0_COUNT) + r4k_offset);
+
+	write_32bit_cp0_register(CP0_COMPARE, r4k_cur);
+	set_cp0_status(ST0_IM, ALLINTS);
+
+	/* Read time from the RTC chipset. */
+	write_lock_irqsave (&xtime_lock, flags);
+	xtime.tv_sec = get_mips_time();
+	xtime.tv_usec = 0;
+	write_unlock_irqrestore(&xtime_lock, flags);
+}
+
+/* This is for machines which generate the exact clock. */
+#define USECS_PER_JIFFY (1000000/HZ)
+#define USECS_PER_JIFFY_FRAC (0x100000000*1000000/HZ&0xffffffff)
+
+/* Cycle counter value at the previous timer interrupt.. */
+
+static unsigned int timerhi = 0, timerlo = 0;
+
+/*
+ * FIXME: Does playing with the RP bit in c0_status interfere with this code?
+ */
+static unsigned long do_fast_gettimeoffset(void)
+{
+	u32 count;
+	unsigned long res, tmp;
+
+	/* Last jiffy when do_fast_gettimeoffset() was called. */
+	static unsigned long last_jiffies=0;
+	unsigned long quotient;
+
+	/*
+	 * Cached "1/(clocks per usec)*2^32" value.
+	 * It has to be recalculated once each jiffy.
+	 */
+	static unsigned long cached_quotient=0;
+
+	tmp = jiffies;
+
+	quotient = cached_quotient;
+
+	if (tmp && last_jiffies != tmp) {
+		last_jiffies = tmp;
+		__asm__(".set\tnoreorder\n\t"
+			".set\tnoat\n\t"
+			".set\tmips3\n\t"
+			"lwu\t%0,%2\n\t"
+			"dsll32\t$1,%1,0\n\t"
+			"or\t$1,$1,%0\n\t"
+			"ddivu\t$0,$1,%3\n\t"
+			"mflo\t$1\n\t"
+			"dsll32\t%0,%4,0\n\t"
+			"nop\n\t"
+			"ddivu\t$0,%0,$1\n\t"
+			"mflo\t%0\n\t"
+			".set\tmips0\n\t"
+			".set\tat\n\t"
+			".set\treorder"
+			:"=&r" (quotient)
+			:"r" (timerhi),
+			 "m" (timerlo),
+			 "r" (tmp),
+			 "r" (USECS_PER_JIFFY)
+			:"$1");
+		cached_quotient = quotient;
+	}
+
+	/* Get last timer tick in absolute kernel time */
+	count = read_32bit_cp0_register(CP0_COUNT);
+
+	/* .. relative to previous jiffy (32 bits is enough) */
+	count -= timerlo;
+
+	__asm__("multu\t%1,%2\n\t"
+		"mfhi\t%0"
+		:"=r" (res)
+		:"r" (count),
+		 "r" (quotient));
+
+	/*
+ 	 * Due to possible jiffies inconsistencies, we need to check 
+	 * the result so that we'll get a timer that is monotonic.
+	 */
+	if (res >= USECS_PER_JIFFY)
+		res = USECS_PER_JIFFY-1;
+
+	return res;
+}
+
+void do_gettimeofday(struct timeval *tv)
+{
+	unsigned int flags;
+
+	read_lock_irqsave (&xtime_lock, flags);
+	*tv = xtime;
+	tv->tv_usec += do_fast_gettimeoffset();
+
+	/*
+	 * xtime is atomically updated in timer_bh. jiffies - wall_jiffies
+	 * is nonzero if the timer bottom half hasnt executed yet.
+	 */
+	if (jiffies - wall_jiffies)
+		tv->tv_usec += USECS_PER_JIFFY;
+
+	read_unlock_irqrestore (&xtime_lock, flags);
+
+	if (tv->tv_usec >= 1000000) {
+		tv->tv_usec -= 1000000;
+		tv->tv_sec++;
+	}
+}
+
+void do_settimeofday(struct timeval *tv)
+{
+	write_lock_irq (&xtime_lock);
+
+	/* This is revolting. We need to set the xtime.tv_usec correctly.
+	 * However, the value in this location is is value at the last tick.
+	 * Discover what correction gettimeofday would have done, and then
+	 * undo it!
+	 */
+	tv->tv_usec -= do_fast_gettimeoffset();
+
+	if (tv->tv_usec < 0) {
+		tv->tv_usec += 1000000;
+		tv->tv_sec--;
+	}
+
+	xtime = *tv;
+	time_adjust = 0;		/* stop active adjtime() */
+	time_status |= STA_UNSYNC;
+	time_maxerror = NTP_PHASE_LIMIT;
+	time_esterror = NTP_PHASE_LIMIT;
+
+	write_unlock_irq (&xtime_lock);
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/malta/Makefile linux/arch/mips64/mips-boards/malta/Makefile
--- linux-2.4.10-pre6/arch/mips64/mips-boards/malta/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/malta/Makefile	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,42 @@
+#
+# Carsten Langgaard, carstenl@mips.com
+# Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+#
+# ########################################################################
+#
+# This program is free software; you can distribute it and/or modify it
+# under the terms of the GNU General Public License (Version 2) as
+# published by the Free Software Foundation.
+# 
+# This program is distributed in the hope it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+# 
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+#
+# #######################################################################
+#
+# Makefile for the MIPS Malta specific kernel interface routines
+# under Linux.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+# Note 2! The CFLAGS definitions are now in the main makefile...
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+all: malta.o
+
+O_TARGET := malta.o
+
+obj-y := malta_int.o malta_rtc.o malta_setup.o
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/malta/malta_int.c linux/arch/mips64/mips-boards/malta/malta_int.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/malta/malta_int.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/malta/malta_int.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,383 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Routines for generic manipulation of the interrupts found on the MIPS 
+ * Malta board.
+ * The interrupt controller is located in the South Bridge a PIIX4 device 
+ * with two internal 82C95 interrupt controllers.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+#include <linux/random.h>
+
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/mips-boards/malta.h>
+#include <asm/mips-boards/maltaint.h>
+#include <asm/mips-boards/piix4.h>
+#include <asm/mips-boards/gt64120.h>
+#include <asm/mips-boards/generic.h>
+
+extern asmlinkage void mipsIRQ(void);
+
+unsigned int local_bh_count[NR_CPUS];
+unsigned int local_irq_count[NR_CPUS];
+unsigned long spurious_count = 0;
+
+static struct irqaction *hw0_irq_action[MALTAINT_END] = {
+	NULL, NULL, NULL, NULL,
+	NULL, NULL, NULL, NULL,
+	NULL, NULL, NULL, NULL,
+	NULL, NULL, NULL, NULL
+};
+
+static struct irqaction r4ktimer_action = {
+	NULL, 0, 0, "R4000 timer/counter", NULL, NULL,
+};
+
+static struct irqaction *irq_action[8] = {
+	NULL, NULL, NULL, NULL,
+	NULL, NULL, NULL, &r4ktimer_action
+};
+
+#if 0
+#define DEBUG_INT(x...) printk(x)
+#else
+#define DEBUG_INT(x...)
+#endif
+
+/*
+ * This contains the interrupt mask for both 82C59 interrupt controllers.
+ */
+static unsigned int cached_int_mask = 0xffff;
+
+
+void disable_irq(unsigned int irq_nr)
+{
+        unsigned long flags;
+
+	if(irq_nr >= MALTAINT_END) {
+		printk("whee, invalid irq_nr %d\n", irq_nr);
+		panic("IRQ, you lose...");
+	}
+
+	save_and_cli(flags);
+	cached_int_mask |= (1 << irq_nr);
+	if (irq_nr & 8) {
+	        outb((cached_int_mask >> 8) & 0xff, PIIX4_ICTLR2_OCW1);
+	} else {
+		outb(cached_int_mask & 0xff, PIIX4_ICTLR1_OCW1);
+	}
+	restore_flags(flags);
+}
+
+
+void enable_irq(unsigned int irq_nr)
+{
+        unsigned long flags;
+
+	if(irq_nr >= MALTAINT_END) {
+		printk("whee, invalid irq_nr %d\n", irq_nr);
+		panic("IRQ, you lose...");
+	}
+
+	save_and_cli(flags);
+	cached_int_mask &= ~(1 << irq_nr);
+	if (irq_nr & 8) {
+		outb((cached_int_mask >> 8) & 0xff, PIIX4_ICTLR2_OCW1);
+
+		/* Enable irq 2 (cascade interrupt). */
+	        cached_int_mask &= ~(1 << 2); 
+		outb(cached_int_mask & 0xff, PIIX4_ICTLR1_OCW1);
+	} else {
+		outb(cached_int_mask & 0xff, PIIX4_ICTLR1_OCW1);
+	}	
+	restore_flags(flags);
+}
+
+
+int get_irq_list(char *buf)
+{
+	int i, len = 0;
+	int num = 0;
+	struct irqaction *action;
+
+	for (i = 0; i < 8; i++, num++) {
+		action = irq_action[i];
+		if (!action) 
+			continue;
+		len += sprintf(buf+len, "%2d: %8d %c %s",
+			num, kstat.irqs[0][num],
+			(action->flags & SA_INTERRUPT) ? '+' : ' ',
+			action->name);
+		for (action=action->next; action; action = action->next) {
+			len += sprintf(buf+len, ",%s %s",
+				(action->flags & SA_INTERRUPT) ? " +" : "",
+				action->name);
+		}
+		len += sprintf(buf+len, " [on-chip]\n");
+	}
+	for (i = 0; i < MALTAINT_END; i++, num++) {
+		action = hw0_irq_action[i];
+		if (!action) 
+			continue;
+		len += sprintf(buf+len, "%2d: %8d %c %s",
+			num, kstat.irqs[0][num],
+			(action->flags & SA_INTERRUPT) ? '+' : ' ',
+			action->name);
+		for (action=action->next; action; action = action->next) {
+			len += sprintf(buf+len, ",%s %s",
+				(action->flags & SA_INTERRUPT) ? " +" : "",
+				action->name);
+		}
+		len += sprintf(buf+len, " [hw0]\n");
+	}
+	return len;
+}
+
+int request_irq(unsigned int irq, 
+		void (*handler)(int, void *, struct pt_regs *),
+		unsigned long irqflags, 
+		const char * devname,
+		void *dev_id)
+{  
+        struct irqaction *action;
+	int retval;
+
+	DEBUG_INT("request_irq: irq=%d, devname = %s\n", irq, devname);
+
+        if (irq >= MALTAINT_END)
+	        return -EINVAL;
+	if (!handler)
+	        return -EINVAL;
+
+	action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL);
+	if(!action)
+	        return -ENOMEM;
+
+	action->handler = handler;
+	action->flags = irqflags;
+	action->mask = 0;
+	action->name = devname;
+	action->dev_id = dev_id;
+	action->next = 0;
+
+	retval = setup_irq(irq, action);
+	if (retval)
+		kfree(action);
+
+	return retval;	
+}
+
+
+void free_irq(unsigned int irq, void *dev_id)
+{
+	struct irqaction *action, **p;
+
+	if (irq >= MALTAINT_END) {
+		printk("Trying to free IRQ%d\n",irq);
+		return;
+	}
+	
+	for (p = &hw0_irq_action[irq]; (action = *p) != NULL; 
+	     p = &action->next) 
+	{
+		if (action->dev_id != dev_id)
+			continue;
+
+		/* Found it - now free it */
+		*p = action->next;
+		kfree(action);
+		if (!hw0_irq_action[irq])
+			disable_irq(irq);
+		return;
+	}
+	printk("Trying to free IRQ%d\n",irq);
+}
+
+void __init init_IRQ(void)
+{
+	irq_setup();
+}
+
+static int setup_irq(unsigned int irq, struct irqaction * new)
+{
+	int shared = 0;
+	struct irqaction *old, **p;
+
+	p = &hw0_irq_action[irq];
+	if ((old = *p) != NULL) {
+		/* Can't share interrupts unless both agree to */
+		if (!(old->flags & new->flags & SA_SHIRQ))
+			return -EBUSY;
+
+		/* Can't share interrupts unless both are same type */
+		if ((old->flags ^ new->flags) & SA_INTERRUPT)
+			return -EBUSY;
+
+		/* add new interrupt at end of irq queue */
+		do {
+			p = &old->next;
+			old = *p;
+		} while (old);
+		shared = 1;
+	}
+
+	if (new->flags & SA_SAMPLE_RANDOM)
+		rand_initialize_irq(irq);
+
+	*p = new;
+	if (!shared)
+		enable_irq(irq);
+
+	return 0;
+}
+
+static inline int get_int(int *irq)
+{
+	/*  
+	 * Determine highest priority pending interrupt by performing
+         * a PCI Interrupt Acknowledge cycle.
+	 */
+	GT_READ(GT_PCI0_IACK_OFS, *irq);
+	*irq &= 0xFF;
+
+	/*  
+	 * IRQ7 is used to detect spurious interrupts.
+	 * The interrupt acknowledge cycle returns IRQ7, if no 
+	 * interrupts is requested.
+	 * We can differentiate between this situation and a
+	 * "Normal" IRQ7 by reading the ISR.
+	 */
+	if (*irq == 7) 
+	{
+		outb(PIIX4_OCW3_SEL | PIIX4_OCW3_ISR, PIIX4_ICTLR1_OCW3);
+		if (!(inb(PIIX4_ICTLR1_OCW3) & (1 << 7)))
+		        return -1;    /* Spurious interrupt. */
+	}
+
+	return 0;
+}
+
+static inline void ack_int(int irq)
+{
+	if (irq & 8) {
+	        /* Specific EOI to cascade */
+		outb(PIIX4_OCW2_SEL | PIIX4_OCW2_NSEOI | PIIX4_OCW2_ILS_2, 
+		     PIIX4_ICTLR1_OCW2);
+
+	        /* Non specific EOI to cascade */
+		outb(PIIX4_OCW2_SEL | PIIX4_OCW2_NSEOI, PIIX4_ICTLR2_OCW2);
+	} else {
+	        /* Non specific EOI to cascade */
+		outb(PIIX4_OCW2_SEL | PIIX4_OCW2_NSEOI, PIIX4_ICTLR1_OCW2);
+	}
+}
+
+void malta_hw0_irqdispatch(struct pt_regs *regs)
+{
+        struct irqaction *action;
+	int irq=0, cpu = smp_processor_id();
+
+	DEBUG_INT("malta_hw0_irqdispatch\n");
+	
+	if (get_int(&irq))
+	        return;  /* interrupt has already been cleared */
+
+	disable_irq(irq);
+	ack_int(irq);
+
+	DEBUG_INT("malta_hw0_irqdispatch: irq=%d\n", irq);
+	action = hw0_irq_action[irq];
+
+	/* 
+	 * if action == NULL, then we don't have a handler 
+	 * for the irq 
+	 */
+	if ( action == NULL )
+		return;
+
+	irq_enter(cpu, irq);
+	kstat.irqs[0][irq + 8]++;
+	do {
+	        action->handler(irq, action->dev_id, regs);
+		action = action->next;
+	} while (action);
+
+	enable_irq(irq);
+	irq_exit(cpu, irq);
+}
+
+
+unsigned long probe_irq_on (void)
+{
+	unsigned int i, irqs = 0;
+	unsigned long delay;
+
+	/* first, enable any unassigned irqs */
+	for (i = MALTAINT_END-1; i > 0; i--) {
+		if (!hw0_irq_action[i]) {
+			enable_irq(i);
+			irqs |= (1 << i);
+		}
+	}
+
+	/* wait for spurious interrupts to mask themselves out again */
+	for (delay = jiffies + HZ/10; time_before(jiffies, delay); )
+		/* about 100ms delay */;
+
+	/* now filter out any obviously spurious interrupts */
+	return irqs & ~cached_int_mask;
+}
+
+
+int probe_irq_off (unsigned long irqs)
+{
+	unsigned int i;
+
+	irqs &= cached_int_mask;
+	if (!irqs)
+		return 0;
+	i = ffz(~irqs);
+	if (irqs != (irqs & (1 << i)))
+		i = -i;
+
+	return i;
+}
+
+
+void __init maltaint_init(void)
+{
+        /* 
+	 * Mask out all interrupt by writing "1" to all bit position in 
+	 * the IMR register. 
+	 */
+	outb(cached_int_mask & 0xff, PIIX4_ICTLR1_OCW1);
+	outb((cached_int_mask >> 8) & 0xff, PIIX4_ICTLR2_OCW1);
+
+	/* Now safe to set the exception vector. */
+	set_except_vector(0, mipsIRQ);
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/malta/malta_rtc.c linux/arch/mips64/mips-boards/malta/malta_rtc.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/malta/malta_rtc.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/malta/malta_rtc.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,50 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * RTC routines for Malta style attached PIIX4 device, which contains a
+ * Motorola MC146818A-compatible Real Time Clock.
+ *
+ */
+#include <asm/mc146818rtc.h>
+#include <asm/mips-boards/malta.h>
+
+static unsigned char malta_rtc_read_data(unsigned long addr)
+{
+	outb(addr, MALTA_RTC_ADR_REG);
+	return inb(MALTA_RTC_DAT_REG);
+}
+
+static void malta_rtc_write_data(unsigned char data, unsigned long addr)
+{
+	outb(addr, MALTA_RTC_ADR_REG);
+	outb(data, MALTA_RTC_DAT_REG);
+}
+
+static int malta_rtc_bcd_mode(void)
+{
+	return 0;
+}
+
+struct rtc_ops malta_rtc_ops = {
+	&malta_rtc_read_data,
+	&malta_rtc_write_data,
+	&malta_rtc_bcd_mode
+};
diff -urN linux-2.4.10-pre6/arch/mips64/mips-boards/malta/malta_setup.c linux/arch/mips64/mips-boards/malta/malta_setup.c
--- linux-2.4.10-pre6/arch/mips64/mips-boards/malta/malta_setup.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/mips-boards/malta/malta_setup.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,170 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Malta specific setup, including init of the feature struct.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/mc146818rtc.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+#ifdef CONFIG_BLK_DEV_IDE
+#include <linux/ide.h>
+#endif
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+#include <asm/mips-boards/gt64120.h>
+#include <asm/mips-boards/malta.h>
+#include <asm/mips-boards/maltaint.h>
+#ifdef CONFIG_BLK_DEV_FD
+#include <asm/floppy.h>
+#endif
+#include <asm/dma.h>
+#include <asm/mmu_context.h>
+
+#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
+extern void console_setup(char *, int *);
+char serial_console[20];
+#endif
+
+#ifdef CONFIG_REMOTE_DEBUG
+extern void set_debug_traps(void);
+extern void rs_kgdb_hook(int);
+extern void breakpoint(void);
+static int remote_debug = 0;
+#endif
+
+#ifdef CONFIG_BLK_DEV_IDE
+extern struct ide_ops std_ide_ops;
+#endif
+#ifdef CONFIG_BLK_DEV_FD
+extern struct fd_ops std_fd_ops;
+#endif
+extern struct rtc_ops malta_rtc_ops;
+
+extern void mips_reboot_setup(void);
+
+struct resource standard_io_resources[] = {
+	{ "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
+	{ "pic1", 0x20, 0x3f, IORESOURCE_BUSY },
+	{ "timer", 0x40, 0x5f, IORESOURCE_BUSY },
+	{ "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
+	{ "pic2", 0xa0, 0xbf, IORESOURCE_BUSY },
+	{ "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+};
+
+#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource))
+
+static void __init malta_irq_setup(void)
+{
+  	maltaint_init();
+
+#ifdef CONFIG_REMOTE_DEBUG
+	if (remote_debug) {
+		set_debug_traps();
+		breakpoint(); 
+	}
+#endif
+}
+
+
+void __init malta_setup(void)
+{
+#ifdef CONFIG_REMOTE_DEBUG
+	int rs_putDebugChar(char);
+	char rs_getDebugChar(void);
+	extern int (*putDebugChar)(char);
+	extern char (*getDebugChar)(void);
+#endif
+	char *argptr;
+	int i;
+
+	current_cpu_data.asid_cache = ASID_FIRST_VERSION;
+	TLBMISS_HANDLER_SETUP();
+
+	irq_setup = malta_irq_setup;
+
+	/* Request I/O space for devices used on the Malta board. */
+	for (i = 0; i < STANDARD_IO_RESOURCES; i++)
+		request_resource(&ioport_resource, standard_io_resources+i);
+
+	/* 
+	 * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
+	 */
+	enable_dma(4);
+
+#ifdef CONFIG_SERIAL_CONSOLE
+        argptr = prom_getcmdline();
+	if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) 
+	{
+	        int i=0;
+	        char *s = prom_getenv("modetty0");
+		while(s[i] >= '0' && s[i] <= '9')
+			i++;
+		strcpy(serial_console, "ttyS0,");
+		strncpy(serial_console + 6, s, i);
+		prom_printf("Config serial console: %s\n", serial_console);
+	        console_setup(serial_console, NULL);
+	}
+#endif	  
+
+#ifdef CONFIG_REMOTE_DEBUG
+	argptr = prom_getcmdline();
+	if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
+		int line;
+		argptr += strlen("kgdb=ttyS");
+		if (*argptr != '0' && *argptr != '1')
+			printk("KGDB: Uknown serial line /dev/ttyS%c, "
+			       "falling back to /dev/ttyS1\n", *argptr);
+		line = *argptr == '0' ? 0 : 1;
+		printk("KGDB: Using serial line /dev/ttyS%d for session\n",
+		       line ? 1 : 0);
+
+		rs_kgdb_hook(line);
+		putDebugChar = rs_putDebugChar;
+		getDebugChar = rs_getDebugChar;
+
+		prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
+			    "please connect your debugger\n", line ? 1 : 0);
+
+		remote_debug = 1;
+		/* Breakpoints and stuff are in malta_irq_setup() */
+	}
+#endif
+
+	argptr = prom_getcmdline();
+	if ((argptr = strstr(argptr, "nofpu")) != NULL)
+		mips_cpu.options &= ~MIPS_CPU_FPU;
+
+	rtc_ops = &malta_rtc_ops;
+#ifdef CONFIG_BLK_DEV_IDE
+        ide_ops = &std_ide_ops;
+#endif
+#ifdef CONFIG_BLK_DEV_FD
+        fd_ops = &std_fd_ops;
+#endif
+}
diff -urN linux-2.4.10-pre6/arch/mips64/mm/andes.c linux/arch/mips64/mm/andes.c
--- linux-2.4.10-pre6/arch/mips64/mm/andes.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/mm/andes.c	Mon Dec  3 23:08:46 2001
@@ -125,14 +125,8 @@
 static void
 andes_flush_cache_sigtramp(unsigned long addr)
 {
-	unsigned long daddr, iaddr;
-
-	daddr = addr & ~(dc_lsize - 1);
-	protected_writeback_dcache_line(daddr);
-	protected_writeback_dcache_line(daddr + dc_lsize);
-	iaddr = addr & ~(ic_lsize - 1);
-	protected_flush_icache_line(iaddr);
-	protected_flush_icache_line(iaddr + ic_lsize);
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
 }
 
 #define NTLB_ENTRIES       64
diff -urN linux-2.4.10-pre6/arch/mips64/mm/extable.c linux/arch/mips64/mm/extable.c
--- linux-2.4.10-pre6/arch/mips64/mm/extable.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/mm/extable.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: extable.c,v 1.2 1999/11/23 17:12:50 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -38,8 +37,7 @@
 
 extern spinlock_t modlist_lock;
 
-unsigned long
-search_exception_table(unsigned long addr)
+unsigned long search_exception_table(unsigned long addr)
 {
 	unsigned long ret = 0;
 	unsigned long flags;
diff -urN linux-2.4.10-pre6/arch/mips64/mm/fault.c linux/arch/mips64/mm/fault.c
--- linux-2.4.10-pre6/arch/mips64/mm/fault.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/mm/fault.c	Mon Dec  3 23:08:46 2001
@@ -32,7 +32,6 @@
 #define development_version (LINUX_VERSION_CODE & 0x100)
 
 extern void die(char *, struct pt_regs *, unsigned long write);
-extern int console_loglevel;
 
 /*
  * Macro for exception fixup code to access integer registers.
@@ -59,11 +58,11 @@
 	printk("Got exception 0x%lx at 0x%lx\n", retaddr, regs.cp0_epc);
 }
 
-extern spinlock_t timerlist_lock;
+extern spinlock_t console_lock, timerlist_lock;
 
 /*
  * Unlock any spinlocks which will prevent us from getting the
- * message out (timerlist_lock is aquired through the
+ * message out (timerlist_lock is acquired through the
  * console unblank code)
  */
 void bust_spinlocks(int yes)
@@ -71,12 +70,11 @@
 	spin_lock_init(&timerlist_lock);
 	if (yes) {
 		oops_in_progress = 1;
-#ifdef CONFIG_SMP
-		global_irq_lock = 0;	/* Many serial drivers do __global_cli() */
-#endif
 	} else {
 		int loglevel_save = console_loglevel;
+#ifdef CONFIG_VT
 		unblank_screen();
+#endif
 		oops_in_progress = 0;
 		/*
 		 * OK, the message is on the console.  Now we call printk()
@@ -228,7 +226,6 @@
                (unsigned int) regs->regs[31]);
 	die("Oops", regs, write);
 	do_exit(SIGKILL);
-	bust_spinlocks(0);
 
 /*
  * We ran out of memory, or some other thing happened to us that made
diff -urN linux-2.4.10-pre6/arch/mips64/mm/loadmmu.c linux/arch/mips64/mm/loadmmu.c
--- linux-2.4.10-pre6/arch/mips64/mm/loadmmu.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/mm/loadmmu.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: loadmmu.c,v 1.5 2000/01/27 01:05:24 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/mm/r4xx0.c linux/arch/mips64/mm/r4xx0.c
--- linux-2.4.10-pre6/arch/mips64/mm/r4xx0.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/mm/r4xx0.c	Mon Dec  3 23:08:46 2001
@@ -776,9 +776,9 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_range_s16d16i16(struct mm_struct *mm, unsigned long start,
-                                unsigned long end)
+static void r4k_flush_cache_range_s16d16i16(struct mm_struct *mm,
+					    unsigned long start,
+					    unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -815,9 +815,9 @@
 	}
 }
 
-static void
-r4k_flush_cache_range_s32d16i16(struct mm_struct *mm, unsigned long start,
-                                unsigned long end)
+static void r4k_flush_cache_range_s32d16i16(struct mm_struct *mm,
+					    unsigned long start,
+					    unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -854,9 +854,9 @@
 	}
 }
 
-static void
-r4k_flush_cache_range_s64d16i16(struct mm_struct *mm, unsigned long start,
-                                unsigned long end)
+static void r4k_flush_cache_range_s64d16i16(struct mm_struct *mm,
+					    unsigned long start,
+					    unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -893,9 +893,9 @@
 	}
 }
 
-static void
-r4k_flush_cache_range_s128d16i16(struct mm_struct *mm, unsigned long start,
-                                 unsigned long end)
+static void r4k_flush_cache_range_s128d16i16(struct mm_struct *mm,
+					     unsigned long start,
+					     unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -932,9 +932,9 @@
 	}
 }
 
-static void
-r4k_flush_cache_range_s32d32i32(struct mm_struct *mm, unsigned long start,
-                                unsigned long end)
+static void r4k_flush_cache_range_s32d32i32(struct mm_struct *mm,
+					    unsigned long start,
+					    unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -971,9 +971,9 @@
 	}
 }
 
-static void
-r4k_flush_cache_range_s64d32i32(struct mm_struct *mm, unsigned long start,
-                                unsigned long end)
+static void r4k_flush_cache_range_s64d32i32(struct mm_struct *mm,
+					    unsigned long start,
+					    unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -1010,9 +1010,9 @@
 	}
 }
 
-static void
-r4k_flush_cache_range_s128d32i32(struct mm_struct *mm, unsigned long start,
-                                 unsigned long end)
+static void r4k_flush_cache_range_s128d32i32(struct mm_struct *mm,
+					     unsigned long start,
+					     unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -1049,9 +1049,9 @@
 	}
 }
 
-static void
-r4k_flush_cache_range_d16i16(struct mm_struct *mm, unsigned long start,
-                             unsigned long end)
+static void r4k_flush_cache_range_d16i16(struct mm_struct *mm,
+					 unsigned long start,
+					 unsigned long end)
 {
 	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
 		unsigned long flags;
@@ -1065,9 +1065,9 @@
 	}
 }
 
-static void
-r4k_flush_cache_range_d32i32(struct mm_struct *mm, unsigned long start,
-                             unsigned long end)
+static void r4k_flush_cache_range_d32i32(struct mm_struct *mm,
+					 unsigned long start,
+					 unsigned long end)
 {
 	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
 		unsigned long flags;
@@ -1176,8 +1176,8 @@
 	}
 }
 
-static void
-r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma,
+					   unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1213,8 +1213,8 @@
 	 * for every cache flush operation.  So we do indexed flushes
 	 * in that case, which doesn't overly flush the cache too much.
 	 */
-	if (CPU_CONTEXT(smp_processor_id(), mm) != 
-				CPU_CONTEXT(smp_processor_id(), current->mm)) {
+	if (CPU_CONTEXT(smp_processor_id(), mm) !=
+	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
 		/* Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
 		 */
@@ -1227,8 +1227,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma,
+					   unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1263,8 +1263,8 @@
 	 * for every cache flush operation.  So we do indexed flushes
 	 * in that case, which doesn't overly flush the cache too much.
 	 */
-	if (CPU_CONTEXT(smp_processor_id(), mm) != 
-				CPU_CONTEXT(smp_processor_id(), current->mm)) {
+	if (CPU_CONTEXT(smp_processor_id(), mm) !=
+	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
 		/* Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
 		 */
@@ -1277,8 +1277,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma,
+					   unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1315,7 +1315,7 @@
 	 * in that case, which doesn't overly flush the cache too much.
 	 */
 	if (CPU_CONTEXT(smp_processor_id(), mm) != 
-				CPU_CONTEXT(smp_processor_id(), current->mm)) {
+	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
 		/* Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
 		 */
@@ -1328,8 +1328,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma,
+					    unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1366,7 +1366,7 @@
 	 * in that case, which doesn't overly flush the cache too much.
 	 */
 	if (CPU_CONTEXT(smp_processor_id(), mm) != 
-				CPU_CONTEXT(smp_processor_id(), current->mm)) {
+	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
 		/*
 		 * Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
@@ -1380,8 +1380,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma,
+					   unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1419,7 +1419,7 @@
 	 * in that case, which doesn't overly flush the cache too much.
 	 */
 	if (CPU_CONTEXT(smp_processor_id(), mm) != 
-				CPU_CONTEXT(smp_processor_id(), current->mm)) {
+	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
 		/*
 		 * Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
@@ -1433,8 +1433,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma,
+					   unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1472,7 +1472,7 @@
 	 * in that case, which doesn't overly flush the cache too much.
 	 */
 	if (CPU_CONTEXT(smp_processor_id(), mm) != 
-				CPU_CONTEXT(smp_processor_id(), current->mm)) {
+	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
 		/*
 		 * Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
@@ -1486,8 +1486,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma,
+					    unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1524,7 +1524,7 @@
 	 * in that case, which doesn't overly flush the cache too much.
 	 */
 	if (CPU_CONTEXT(smp_processor_id(), mm) != 
-				CPU_CONTEXT(smp_processor_id(), current->mm)) {
+	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
 		/* Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
 		 */
@@ -1537,8 +1537,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_d16i16(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_d16i16(struct vm_area_struct *vma,
+					unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1587,8 +1587,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_d32i32(struct vm_area_struct *vma, unsigned long page)
+static void r4k_flush_cache_page_d32i32(struct vm_area_struct *vma,
+					unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1639,9 +1639,8 @@
 	__restore_flags(flags);
 }
 
-static void
-r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
-                                  unsigned long page)
+static void r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
+					      unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1741,8 +1740,7 @@
  * (Revision 2.0 device errata from IDT available on http://www.idt.com/
  * in .pdf format.)
  */
-static void
-r4k_dma_cache_wback_inv_pc(unsigned long addr, unsigned long size)
+static void r4k_dma_cache_wback_inv_pc(unsigned long addr, unsigned long size)
 {
 	unsigned long end, a;
 	unsigned int flags;
@@ -1766,8 +1764,7 @@
 	bc_wback_inv(addr, size);
 }
 
-static void
-r4k_dma_cache_wback_inv_sc(unsigned long addr, unsigned long size)
+static void r4k_dma_cache_wback_inv_sc(unsigned long addr, unsigned long size)
 {
 	unsigned long end, a;
 
@@ -1785,8 +1782,7 @@
 	}
 }
 
-static void
-r4k_dma_cache_inv_pc(unsigned long addr, unsigned long size)
+static void r4k_dma_cache_inv_pc(unsigned long addr, unsigned long size)
 {
 	unsigned long end, a;
 	unsigned int flags;
@@ -1811,8 +1807,7 @@
 	bc_inv(addr, size);
 }
 
-static void
-r4k_dma_cache_inv_sc(unsigned long addr, unsigned long size)
+static void r4k_dma_cache_inv_sc(unsigned long addr, unsigned long size)
 {
 	unsigned long end, a;
 
@@ -1830,8 +1825,7 @@
 	}
 }
 
-static void
-r4k_dma_cache_wback(unsigned long addr, unsigned long size)
+static void r4k_dma_cache_wback(unsigned long addr, unsigned long size)
 {
 	panic("r4k_dma_cache called - should not happen.\n");
 }
@@ -1843,33 +1837,24 @@
  */
 static void r4k_flush_cache_sigtramp(unsigned long addr)
 {
-	unsigned long daddr, iaddr;
-
-	daddr = addr & ~((unsigned long)dc_lsize - 1);
 	__asm__ __volatile__("nop;nop;nop;nop");	/* R4600 V1.7 */
-	protected_writeback_dcache_line(daddr);
-	protected_writeback_dcache_line(daddr + dc_lsize);
-	iaddr = addr & ~((unsigned long)ic_lsize - 1);
-	protected_flush_icache_line(iaddr);
-	protected_flush_icache_line(iaddr + ic_lsize);
+
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
 }
 
 static void r4600v20k_flush_cache_sigtramp(unsigned long addr)
 {
-	unsigned long daddr, iaddr;
 	unsigned int flags;
 
-	daddr = addr & ~((unsigned long)dc_lsize - 1);
 	__save_and_cli(flags);
 
 	/* Clear internal cache refill buffer */
 	*(volatile unsigned int *)KSEG1;
 
-	protected_writeback_dcache_line(daddr);
-	protected_writeback_dcache_line(daddr + dc_lsize);
-	iaddr = addr & ~((unsigned long)ic_lsize - 1);
-	protected_flush_icache_line(iaddr);
-	protected_flush_icache_line(iaddr + ic_lsize);
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
+
 	__restore_flags(flags);
 }
 
@@ -2011,8 +1996,7 @@
 	}
 }
 
-static void
-r4k_flush_cache_l2(void)
+static void r4k_flush_cache_l2(void)
 {
 }
 
diff -urN linux-2.4.10-pre6/arch/mips64/mm/umap.c linux/arch/mips64/mm/umap.c
--- linux-2.4.10-pre6/arch/mips64/mm/umap.c	Wed Jul  4 11:50:39 2001
+++ linux/arch/mips64/mm/umap.c	Mon Dec  3 23:08:46 2001
@@ -25,8 +25,8 @@
 #include <asm/pgalloc.h>
 #include <asm/page.h>
 
-static inline void
-remove_mapping_pte_range (pmd_t *pmd, unsigned long address, unsigned long size)
+static inline void remove_mapping_pte_range (pmd_t *pmd, unsigned long address,
+					     unsigned long size)
 {
 	pte_t *pte;
 	unsigned long end;
@@ -34,7 +34,8 @@
 	if (pmd_none (*pmd))
 		return;
 	if (pmd_bad (*pmd)){
-		printk ("remove_graphics_pte_range: bad pmd (%08lx)\n", pmd_val (*pmd));
+		printk ("remove_graphics_pte_range: bad pmd (%08lx)\n",
+			pmd_val (*pmd));
 		pmd_clear (pmd);
 		return;
 	}
@@ -53,8 +54,8 @@
 						  
 }
 
-static inline void
-remove_mapping_pmd_range (pgd_t *pgd, unsigned long address, unsigned long size)
+static inline void remove_mapping_pmd_range (pgd_t *pgd, unsigned long address,
+					     unsigned long size)
 {
 	pmd_t *pmd;
 	unsigned long end;
@@ -63,7 +64,8 @@
 		return;
 
 	if (pgd_bad (*pgd)){
-		printk ("remove_graphics_pmd_range: bad pgd (%08lx)\n", pgd_val (*pgd));
+		printk ("remove_graphics_pmd_range: bad pgd (%08lx)\n",
+			pgd_val (*pgd));
 		pgd_clear (pgd);
 		return;
 	}
@@ -84,8 +86,8 @@
  * This routine is called from the page fault handler to remove a
  * range of active mappings at this point
  */
-void
-remove_mapping (struct task_struct *task, unsigned long start, unsigned long end)
+void remove_mapping (struct task_struct *task, unsigned long start,
+		     unsigned long end)
 {
 	unsigned long beg = start;
 	pgd_t *dir;
@@ -137,8 +139,8 @@
  * maps a range of vmalloc()ed memory into the requested pages. the old
  * mappings are removed. 
  */
-static inline void
-vmap_pte_range (pte_t *pte, unsigned long address, unsigned long size, unsigned long vaddr)
+static inline void vmap_pte_range (pte_t *pte, unsigned long address,
+				   unsigned long size, unsigned long vaddr)
 {
 	unsigned long end;
 	pgd_t *vdir;
@@ -167,8 +169,8 @@
 	} while (address < end);
 }
 
-static inline int
-vmap_pmd_range (pmd_t *pmd, unsigned long address, unsigned long size, unsigned long vaddr)
+static inline int vmap_pmd_range (pmd_t *pmd, unsigned long address,
+				  unsigned long size, unsigned long vaddr)
 {
 	unsigned long end;
 
@@ -178,7 +180,7 @@
 		end = PGDIR_SIZE;
 	vaddr -= address;
 	do {
-		pte_t * pte = pte_alloc(pmd, address);
+		pte_t * pte = pte_alloc(current->mm, pmd, address);
 		if (!pte)
 			return -ENOMEM;
 		vmap_pte_range(pte, address, end - address, address + vaddr);
@@ -188,8 +190,8 @@
 	return 0;
 }
 
-int
-vmap_page_range (unsigned long from, unsigned long size, unsigned long vaddr)
+int vmap_page_range (unsigned long from, unsigned long size,
+		     unsigned long vaddr)
 {
 	int error = 0;
 	pgd_t * dir;
@@ -200,7 +202,7 @@
 	dir = pgd_offset(current->mm, from);
 	flush_cache_range(current->mm, beg, end);
 	while (from < end) {
-		pmd_t *pmd = pmd_alloc(dir, from);
+		pmd_t *pmd = pmd_alloc(current->mm, dir, from);
 		error = -ENOMEM;
 		if (!pmd)
 			break;
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-berr.c linux/arch/mips64/sgi-ip22/ip22-berr.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-berr.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/sgi-ip22/ip22-berr.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: ip22-berr.c,v 1.1 2000/01/21 22:34:03 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -9,6 +8,9 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/module.h>
+
+#include <asm/module.h>
 #include <asm/uaccess.h>
 #include <asm/paccess.h>
 #include <asm/addrspace.h>
@@ -41,16 +43,43 @@
 	return 0;
 }
 
+extern spinlock_t modlist_lock;
+
 static inline unsigned long
 search_dbe_table(unsigned long addr)
 {
-	unsigned long ret;
+	unsigned long ret = 0;
 
+#ifndef CONFIG_MODULES
 	/* There is only the kernel to search.  */
 	ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr);
-	if (ret) return ret;
-
-	return 0;
+	return ret;
+#else
+	unsigned long flags;
+
+	/* The kernel is the last "module" -- no need to treat it special.  */
+	struct module *mp;
+	struct archdata *ap;
+
+	spin_lock_irqsave(&modlist_lock, flags);
+	for (mp = module_list; mp != NULL; mp = mp->next) {
+		if (!mod_member_present(mp, archdata_end) ||
+        	    !mod_archdata_member_present(mp, struct archdata,
+						 dbe_table_end))
+			continue;
+		ap = (struct archdata *)(mod->archdata_start);
+
+		if (ap->dbe_table_start == NULL ||
+		    !(mp->flags & (MOD_RUNNING | MOD_INITIALIZING)))
+			continue;
+		ret = search_one_table(ap->dbe_table_start,
+				       ap->dbe_table_end - 1, addr);
+		if (ret)
+			break;
+	}
+	spin_unlock_irqrestore(&modlist_lock, flags);
+	return ret;
+#endif
 }
 
 void do_ibe(struct pt_regs *regs)
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-hpc.c linux/arch/mips64/sgi-ip22/ip22-hpc.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-hpc.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip22/ip22-hpc.c	Mon Dec  3 23:08:46 2001
@@ -1,9 +1,8 @@
-/* $Id: ip22-hpc.c,v 1.2 1999/10/19 20:51:52 ralf Exp $
- *
+/*
  * ip22-hpc.c: Routines for generic manipulation of the HPC controllers.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1998, 1999 Ralf Baechle
+ * Copyright (C) 1998, 1999, 2001 Ralf Baechle
  */
 #include <linux/init.h>
 #include <linux/types.h>
@@ -11,7 +10,6 @@
 #include <asm/addrspace.h>
 #include <asm/sgi/sgihpc.h>
 #include <asm/sgi/sgint23.h>
-#include <asm/sgialib.h>
 #include <asm/bootinfo.h>
 
 #undef DEBUG_SGIHPC
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-int.c linux/arch/mips64/sgi-ip22/ip22-int.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-int.c	Fri Feb  9 11:29:44 2001
+++ linux/arch/mips64/sgi-ip22/ip22-int.c	Mon Dec  3 23:08:46 2001
@@ -34,7 +34,6 @@
 #include <asm/sgi/sgi.h>
 #include <asm/sgi/sgihpc.h>
 #include <asm/sgi/sgint23.h>
-#include <asm/sgialib.h>
 
 /*
  * Linux has a controller-independent x86 interrupt architecture.
@@ -287,9 +286,7 @@
 	irq_enter(cpu, irq);
 	kstat.irqs[0][irq]++;
 
-	printk("Got irq %d, press a key.", irq);
-	prom_getchar();
-	ArcEnterInteractiveMode();
+	panic(KERN_DEBUG "Got irq %d, press a key.", irq);
 
 	/*
 	 * mask and ack quickly, we don't want the irq controller
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-irq.S linux/arch/mips64/sgi-ip22/ip22-irq.S
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-irq.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/sgi-ip22/ip22-irq.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: ip22-irq.S,v 1.1 1999/08/20 21:13:33 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-mc.c linux/arch/mips64/sgi-ip22/ip22-mc.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-mc.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/sgi-ip22/ip22-mc.c	Mon Dec  3 23:08:46 2001
@@ -1,12 +1,10 @@
-/* $Id: ip22-mc.c,v 1.2 1999/10/19 20:51:52 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * indy_mc.c: Routines for manipulating the INDY memory controller.
- *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 2001 Ralf Baechle (ralf@gnu.org)
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -15,7 +13,6 @@
 #include <asm/ptrace.h>
 #include <asm/sgi/sgimc.h>
 #include <asm/sgi/sgihpc.h>
-#include <asm/sgialib.h>
 
 /* #define DEBUG_SGIMC */
 
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-reset.c linux/arch/mips64/sgi-ip22/ip22-reset.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-reset.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/sgi-ip22/ip22-reset.c	Mon Dec  3 23:08:46 2001
@@ -1,12 +1,11 @@
-/* $Id: ip22-reset.c,v 1.3 1999/10/08 21:07:51 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
  * Reset an IP22.
  *
- * Copyright (C) 1997, 1998, 1999 by Ralf Baechle
+ * Copyright (C) 1997, 1998, 1999, 2001 by Ralf Baechle
  */
 #include <linux/kernel.h>
 #include <linux/sched.h>
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-rtc.c linux/arch/mips64/sgi-ip22/ip22-rtc.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-rtc.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/sgi-ip22/ip22-rtc.c	Mon Dec  3 23:08:46 2001
@@ -1,12 +1,11 @@
-/* $Id: ip22-rtc.c,v 1.1 1999/08/20 21:13:34 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
  * RTC routines for Indy style attached Dallas chip.
  *
- * Copyright (C) 1998 by Ralf Baechle
+ * Copyright (C) 1998, 2001 by Ralf Baechle
  */
 #include <linux/mc146818rtc.h>
 #include <asm/sgi/sgihpc.h>
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-sc.c linux/arch/mips64/sgi-ip22/ip22-sc.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-sc.c	Tue Mar  6 19:44:36 2001
+++ linux/arch/mips64/sgi-ip22/ip22-sc.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: ip22-sc.c,v 1.2 1999/12/04 03:59:01 ralf Exp $
- *
+/*
  * indy_sc.c: Indy cache management functions.
  *
  * Copyright (C) 1997 Ralf Baechle (ralf@gnu.org),
@@ -16,7 +15,6 @@
 #include <asm/pgtable.h>
 #include <asm/system.h>
 #include <asm/bootinfo.h>
-#include <asm/sgialib.h>
 #include <asm/mmu_context.h>
 
 /* Secondary cache size in bytes, if present.  */
@@ -31,17 +29,17 @@
 
 static inline void indy_sc_wipe(unsigned long first, unsigned long last)
 {
-	__asm__ __volatile__("
-		.set	noreorder
-		or	%0, %4		# first line to flush
-		or	%1, %4		# last line to flush
-1:		sw	$0, 0(%0)
-		bne	%0, %1, 1b
-		daddu	%0, 32
-		.set reorder"
-		: "=r" (first), "=r" (last)
-		: "0" (first), "1" (last), "r" (0x9000000080000000)
-		: "$1");
+	__asm__ __volatile__(
+	".set\tnoreorder\n\t"
+	"or\t%0, %4\t\t\t# first line to flush\n\t"
+	"or\t%1, %4\t\t\t# last line to flush\n"
+	"1:\tsw	$0, 0(%0)\n\t"
+	"bne\t%0, %1, 1b\n\t"
+	"daddu\t%0, 32\n\t"
+	".set reorder"
+	: "=r" (first), "=r" (last)
+	: "0" (first), "1" (last), "r" (0x9000000080000000)
+	: "$1");
 }
 
 static void indy_sc_wback_invalidate(unsigned long addr, unsigned long size)
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-setup.c linux/arch/mips64/sgi-ip22/ip22-setup.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-setup.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip22/ip22-setup.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: ip22-setup.c,v 1.4 1999/10/08 21:07:51 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -145,7 +144,7 @@
 	 * graphics console, it is set to "d" for the first serial
 	 * line and "d2" for the second serial line.
 	 */
-	ctype = ArcArcGetEnvironmentVariable("console");
+	ctype = ArcGetEnvironmentVariable("console");
 	if(*ctype == 'd') {
 		if(*(ctype+1)=='2')
 			console_setup ("ttyS1");
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-timer.c linux/arch/mips64/sgi-ip22/ip22-timer.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/ip22-timer.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip22/ip22-timer.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: ip22-timer.c,v 1.6 2000/02/04 07:40:24 ralf Exp $
- *
+/*
  * indy_timer.c: Setting up the clock on the INDY 8254 controller.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
@@ -238,9 +237,7 @@
 
 	irq_enter(cpu, irq);
 	kstat.irqs[0][irq]++;
-	printk("indy_8254timer_irq: Whoops, should not have gotten this IRQ\n");
-	prom_getchar();
-	ArcEnterInteractiveMode();
+	panic("indy_8254timer_irq: Whoops, should not have gotten this IRQ\n");
 	irq_exit(cpu, irq);
 }
 
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/system.c linux/arch/mips64/sgi-ip22/system.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/system.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/sgi-ip22/system.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: system.c,v 1.3 1999/10/19 20:51:52 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -7,6 +6,7 @@
  * system.c: Probe the system type using ARCS prom interface library.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -17,8 +17,6 @@
 #include <asm/sgialib.h>
 #include <asm/bootinfo.h>
 
-enum sgi_mach sgimach;
-
 struct smatch {
 	char *name;
 	int type;
@@ -46,10 +44,7 @@
 		if(!strcmp(s, sgi_cputable[i].name))
 			return sgi_cputable[i].type;
 	}
-	prom_printf("\nYeee, could not determine MIPS cpu type <%s>\n", s);
-	prom_printf("press a key to reboot\n");
-	prom_getchar();
-	ArcEnterInteractiveMode();
+	panic("\nYeee, could not determine MIPS cpu type <%s>", s);
 	return 0;
 }
 
@@ -74,23 +69,16 @@
 		int ncpus = 0;
 
 		if(p->type == Cpu) {
-			if(++ncpus > 1) {
-				prom_printf("\nYeee, SGI MP not ready yet\n");
-				prom_printf("press a key to reboot\n");
-				prom_getchar();
-				ArcEnterInteractiveMode();
-			}
+			if (++ncpus > 1)
+				panic("\nYeee, SGI MP not ready yet");
 			printk("CPU: %s ", p->iname);
 			cpup = p;
 			cputype = string_to_cpu(cpup->iname);
 		}
 		p = ArcGetPeer(p);
 	}
-	if(cputype == -1) {
-		prom_printf("\nYeee, could not find cpu ARCS component\n");
-		prom_printf("press a key to reboot\n");
-		prom_getchar();
-		ArcEnterInteractiveMode();
+	if (cputype == -1) {
+		panic("\nYeee, could not find cpu ARCS component");
 	}
 	p = ArcGetChild(cpup);
 	while(p) {
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip22/time.c linux/arch/mips64/sgi-ip22/time.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip22/time.c	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/sgi-ip22/time.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: time.c,v 1.1 1999/08/20 21:13:34 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/Makefile linux/arch/mips64/sgi-ip27/Makefile
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/Makefile	Sun Feb  4 21:48:46 2001
+++ linux/arch/mips64/sgi-ip27/Makefile	Mon Dec  3 23:08:46 2001
@@ -7,7 +7,7 @@
 .S.o:
 	$(CC) $(CFLAGS) -c $< -o $*.o
 
-O_TARGET = ip27.a
+O_TARGET = ip27.o
 
 obj-y	:= ip27-berr.o ip27-console.o ip27-irq.o ip27-init.o ip27-irq-glue.o \
 	   ip27-klconfig.o ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-pci.o \
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-berr.c linux/arch/mips64/sgi-ip27/ip27-berr.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-berr.c	Sun Jul  9 22:18:16 2000
+++ linux/arch/mips64/sgi-ip27/ip27-berr.c	Mon Dec  3 23:08:46 2001
@@ -8,6 +8,9 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/module.h>
+
+#include <asm/module.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/arch.h>
 #include <asm/sn/sn0/hub.h>
@@ -43,16 +46,43 @@
 	return 0;
 }
 
+extern spinlock_t modlist_lock;
+
 static inline unsigned long
 search_dbe_table(unsigned long addr)
 {
 	unsigned long ret;
 
+#ifndef CONFIG_MODULES
 	/* There is only the kernel to search.  */
 	ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr);
-	if (ret) return ret;
-
-	return 0;
+	return ret;
+#else
+	unsigned long flags;
+
+	/* The kernel is the last "module" -- no need to treat it special.  */
+	struct module *mp;
+	struct archdata *ap;
+
+	spin_lock_irqsave(&modlist_lock, flags);
+	for (mp = module_list; mp != NULL; mp = mp->next) {
+		if (!mod_member_present(mp, archdata_end) ||
+        	    !mod_archdata_member_present(mp, struct archdata,
+						 dbe_table_end))
+			continue;
+		ap = (struct archdata *)(mod->archdata_start);
+
+		if (ap->dbe_table_start == NULL ||
+		    !(mp->flags & (MOD_RUNNING | MOD_INITIALIZING)))
+			continue;
+		ret = search_one_table(ap->dbe_table_start,
+				       ap->dbe_table_end - 1, addr);
+		if (ret)
+			break;
+	}
+	spin_unlock_irqrestore(&modlist_lock, flags);
+	return ret;
+#endif
 }
 
 void do_ibe(struct pt_regs *regs)
@@ -64,9 +94,43 @@
 	while(1);
 }
 
+static void dump_hub_information(unsigned long errst0, unsigned long errst1)
+{
+	static char *err_type[2][8] = {
+		{ NULL, "Uncached Partial Read PRERR", "DERR", "Read Timeout",
+		  NULL, NULL, NULL, NULL },
+		{ "WERR", "Uncached Partial Write", "PWERR", "Write Timeout",
+		  NULL, NULL, NULL, NULL }
+	};
+	int wrb = errst1 & PI_ERR_ST1_WRBRRB_MASK;
+
+	if (!(errst0 & PI_ERR_ST0_VALID_MASK)) {
+		printk("Hub does not contain valid error information\n");
+		return;
+	}
+
+	
+	printk("Hub has valid error information:\n");
+	if (errst0 & PI_ERR_ST0_OVERRUN_MASK)
+		printk("Overrun is set.  Error stack may contain additional "
+		       "information.\n");
+	printk("Hub error address is %08lx\n",
+	       (errst0 & PI_ERR_ST0_ADDR_MASK) >> (PI_ERR_ST0_ADDR_SHFT - 3));
+	printk("Incoming message command 0x%lx\n",
+	       (errst0 & PI_ERR_ST0_CMD_MASK) >> PI_ERR_ST0_CMD_SHFT);
+	printk("Supplemental field of incoming message is 0x%lx\n",
+	       (errst0 & PI_ERR_ST0_SUPPL_MASK) >> PI_ERR_ST0_SUPPL_SHFT);
+	printk("T5 Rn (for RRB only) is 0x%lx\n",
+	       (errst0 & PI_ERR_ST0_REQNUM_MASK) >> PI_ERR_ST0_REQNUM_SHFT);
+	printk("Error type is %s\n", err_type[wrb]
+	       [(errst0 & PI_ERR_ST0_TYPE_MASK) >> PI_ERR_ST0_TYPE_SHFT]
+		? : "invalid");
+}
+
 void do_dbe(struct pt_regs *regs)
 {
-	unsigned long fixup;
+	unsigned long fixup, errst0, errst1;
+	int cpu = LOCAL_HUB_L(PI_CPU_NUM);
 
 	fixup = search_dbe_table(regs->cp0_epc);
 	if (fixup) {
@@ -77,7 +141,12 @@
 		return;
 	}
 
-	printk("Got dbe at 0x%lx\n", regs->cp0_epc);
+	printk("Slice %c got dbe at 0x%lx\n", 'A' + cpu, regs->cp0_epc);
+	printk("Hub information:\n");
+	printk("ERR_INT_PEND = 0x%06lx\n", LOCAL_HUB_L(PI_ERR_INT_PEND));
+	errst0 = LOCAL_HUB_L(cpu ? PI_ERR_STATUS0_B : PI_ERR_STATUS0_A);
+	errst1 = LOCAL_HUB_L(cpu ? PI_ERR_STATUS1_B : PI_ERR_STATUS1_A);
+	dump_hub_information(errst0, errst1);
 	show_regs(regs);
 	dump_tlb_all();
 	while(1);
@@ -95,7 +164,7 @@
 	set_except_vector(7, handle_dbe);
 
 	LOCAL_HUB_S(PI_ERR_INT_PEND,
-	            cpu ? PI_ERR_CLEAR_ALL_A : PI_ERR_CLEAR_ALL_B);
+	            cpu ? PI_ERR_CLEAR_ALL_B : PI_ERR_CLEAR_ALL_A);
 	LOCAL_HUB_S(PI_ERR_INT_MASK_A + cpuoff, 0);
 	LOCAL_HUB_S(PI_ERR_STACK_ADDR_A + cpuoff, 0);
 	LOCAL_HUB_S(PI_ERR_STACK_SIZE, 0);	/* Disable error stack */
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-console.c linux/arch/mips64/sgi-ip27/ip27-console.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-console.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip27/ip27-console.c	Mon Dec  3 23:08:46 2001
@@ -2,6 +2,8 @@
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
+ *
+ * Copyright (C) 2001 Ralf Baechle
  */
 #include <linux/init.h>
 #include <linux/console.h>
@@ -11,7 +13,6 @@
 #include <asm/sn/sn0/hub.h>
 #include <asm/sn/klconfig.h>
 #include <asm/sn/ioc3.h>
-#include <asm/sgialib.h>
 #include <asm/sn/sn_private.h>
 
 void prom_putchar(char c)
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-init.c linux/arch/mips64/sgi-ip27/ip27-init.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-init.c	Sun Feb  4 21:48:46 2001
+++ linux/arch/mips64/sgi-ip27/ip27-init.c	Mon Dec  3 23:08:46 2001
@@ -1,3 +1,12 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file "COPYING" in the main directory of this
+ * archive for more details.
+ *
+ * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
+ * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
+ */
+
 #include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -23,14 +32,14 @@
 #include <asm/sn/sn_private.h>
 #include <asm/sn/sn0/ip27.h>
 #include <asm/sn/mapped_kernel.h>
+#include <asm/sn/sn0/addrs.h>
+#include <asm/sn/gda.h>
 
 #define CPU_NONE		(cpuid_t)-1
 
-#define	CPUMASK_CLRALL(p)	(p) = 0
-#define CPUMASK_SETB(p, bit)	(p) |= 1 << (bit)
-#define CPUMASK_CLRB(p, bit)	(p) &= ~(1ULL << (bit))
-#define CPUMASK_TSTB(p, bit)	((p) & (1ULL << (bit)))
-
+/*
+ * The following should work till 64 nodes, ie 128p SN0s.
+ */
 #define CNODEMASK_CLRALL(p)	(p) = 0
 #define CNODEMASK_TSTB(p, bit)	((p) & (1ULL << (bit)))
 #define CNODEMASK_SETB(p, bit)	((p) |= 1ULL << (bit))
@@ -42,11 +51,13 @@
 static spinlock_t hub_mask_lock = SPIN_LOCK_UNLOCKED;
 static cnodemask_t hub_init_mask;
 static atomic_t numstarted = ATOMIC_INIT(1);
+static int router_distance;
 nasid_t master_nasid = INVALID_NASID;
 
 cnodeid_t	nasid_to_compact_node[MAX_NASIDS];
 nasid_t		compact_to_nasid_node[MAX_COMPACT_NODES];
 cnodeid_t	cpuid_to_compact_node[MAXCPUS];
+char		node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
 
 hubreg_t get_region(cnodeid_t cnode)
 {
@@ -89,9 +100,13 @@
 		return brd->brd_nasid;
 }
 
+/* Tweak this for maximum number of CPUs to activate */
+static int max_cpus = NR_CPUS;
+
 int do_cpumask(cnodeid_t cnode, nasid_t nasid, cpumask_t *boot_cpumask, 
 							int *highest)
 {
+	static int tot_cpus_found = 0;
 	lboard_t *brd;
 	klcpu_t *acpu;
 	int cpus_found = 0;
@@ -109,9 +124,11 @@
 			if (cpuid > *highest)
 				*highest = cpuid;
 			/* Only let it join in if it's marked enabled */
-			if (acpu->cpu_info.flags & KLINFO_ENABLE) {
+			if ((acpu->cpu_info.flags & KLINFO_ENABLE) &&
+						(tot_cpus_found != max_cpus)) {
 				CPUMASK_SETB(*boot_cpumask, cpuid);
 				cpus_found++;
+				tot_cpus_found++;
 			}
 			acpu = (klcpu_t *)find_component(brd, (klinfo_t *)acpu, 
 								KLSTRUCT_CPU);
@@ -172,6 +189,9 @@
 void mlreset (void)
 {
 	int i;
+	void init_topology_matrix(void);
+	void dump_topology(void);
+
 
 	master_nasid = get_nasid();
 	fine_mode = is_fine_dirmode();
@@ -184,6 +204,9 @@
 	maxcpus = cpu_node_probe(&boot_cpumask, &numnodes);
 	printk("Discovered %d cpus on %d nodes\n", maxcpus, numnodes);
 
+	init_topology_matrix();
+	dump_topology();
+
 	gen_region_mask(&region_mask, numnodes);
 	CNODEMASK_CLRALL(hub_init_mask);
 
@@ -534,3 +557,284 @@
 #else /* CONFIG_SMP */
 void cboot(void) {}
 #endif /* CONFIG_SMP */
+
+
+#define	rou_rflag	rou_flags
+
+void
+router_recurse(klrou_t *router_a, klrou_t *router_b, int depth)
+{
+	klrou_t *router;
+	lboard_t *brd;
+	int	port;
+
+	if (router_a->rou_rflag == 1)
+		return;
+
+	if (depth >= router_distance)
+		return;
+
+	router_a->rou_rflag = 1;
+
+	for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
+		if (router_a->rou_port[port].port_nasid == INVALID_NASID)
+			continue;
+
+		brd = (lboard_t *)NODE_OFFSET_TO_K0(
+			router_a->rou_port[port].port_nasid,
+			router_a->rou_port[port].port_offset);
+
+		if (brd->brd_type == KLTYPE_ROUTER) {
+			router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
+			if (router == router_b) {
+				if (depth < router_distance)
+					router_distance = depth;
+			}
+			else
+				router_recurse(router, router_b, depth + 1);
+		}
+	}
+
+	router_a->rou_rflag = 0;
+}
+
+int
+node_distance(nasid_t nasid_a, nasid_t nasid_b)
+{
+	nasid_t nasid;
+	cnodeid_t cnode;
+	lboard_t *brd, *dest_brd;
+	int port;
+	klrou_t *router, *router_a = NULL, *router_b = NULL;
+
+	/* Figure out which routers nodes in question are connected to */
+	for (cnode = 0; cnode < numnodes; cnode++) {
+		nasid = COMPACT_TO_NASID_NODEID(cnode);
+
+		if (nasid == -1) continue;
+
+		brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
+					KLTYPE_ROUTER);
+
+		if (!brd)
+			continue;
+
+		do {
+			if (brd->brd_flags & DUPLICATE_BOARD)
+				continue;
+
+			router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
+			router->rou_rflag = 0;
+
+			for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
+				if (router->rou_port[port].port_nasid == INVALID_NASID)
+					continue;
+
+				dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
+					router->rou_port[port].port_nasid,
+					router->rou_port[port].port_offset);
+
+				if (dest_brd->brd_type == KLTYPE_IP27) {
+					if (dest_brd->brd_nasid == nasid_a)
+						router_a = router;
+					if (dest_brd->brd_nasid == nasid_b)
+						router_b = router;
+				}
+			}
+			
+		} while ( (brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)) );
+	}
+
+	if (router_a == NULL) {
+		printk("node_distance: router_a NULL\n");
+		return -1;
+	}
+	if (router_b == NULL) {
+		printk("node_distance: router_b NULL\n");
+		return -1;
+	}
+
+	if (nasid_a == nasid_b)
+		return 0;
+
+	if (router_a == router_b)
+		return 1;
+
+	router_distance = 100;
+	router_recurse(router_a, router_b, 2);
+
+	return router_distance;
+}
+
+void
+init_topology_matrix(void)
+{
+	nasid_t nasid, nasid2;
+	cnodeid_t row, col;
+
+	for (row = 0; row < MAX_COMPACT_NODES; row++)
+		for (col = 0; col < MAX_COMPACT_NODES; col++)
+			node_distances[row][col] = -1;
+
+	for (row = 0; row < numnodes; row++) {
+		nasid = COMPACT_TO_NASID_NODEID(row);
+		for (col = 0; col < numnodes; col++) {
+			nasid2 = COMPACT_TO_NASID_NODEID(col);
+			node_distances[row][col] = node_distance(nasid, nasid2);
+		}
+	}
+}
+
+void
+dump_topology(void)
+{
+	nasid_t nasid;
+	cnodeid_t cnode;
+	lboard_t *brd, *dest_brd;
+	int port;
+	int router_num = 0;
+	klrou_t *router;
+	cnodeid_t row, col;
+
+	printk("************** Topology ********************\n");
+
+	printk("    ");
+	for (col = 0; col < numnodes; col++)
+		printk("%02d ", col);
+	printk("\n");
+	for (row = 0; row < numnodes; row++) {
+		printk("%02d  ", row);
+		for (col = 0; col < numnodes; col++)
+			printk("%2d ", node_distances[row][col]);
+		printk("\n");
+	}
+
+	for (cnode = 0; cnode < numnodes; cnode++) {
+		nasid = COMPACT_TO_NASID_NODEID(cnode);
+
+		if (nasid == -1) continue;
+
+		brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
+					KLTYPE_ROUTER);
+
+		if (!brd)
+			continue;
+
+		do {
+			if (brd->brd_flags & DUPLICATE_BOARD)
+				continue;
+			printk("Router %d:", router_num);
+			router_num++;
+
+			router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
+
+			for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
+				if (router->rou_port[port].port_nasid == INVALID_NASID)
+					continue;
+
+				dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
+					router->rou_port[port].port_nasid,
+					router->rou_port[port].port_offset);
+
+				if (dest_brd->brd_type == KLTYPE_IP27)
+					printk(" %d", dest_brd->brd_nasid);
+				if (dest_brd->brd_type == KLTYPE_ROUTER)
+					printk(" r");
+			}
+			printk("\n");
+			
+		} while ( (brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)) );
+	}
+}
+
+#if 0
+#define		brd_widgetnum	brd_slot
+#define NODE_OFFSET_TO_KLINFO(n,off)    ((klinfo_t*) TO_NODE_CAC(n,off))
+void
+dump_klcfg(void)
+{
+	cnodeid_t       cnode;
+	int i;
+	nasid_t         nasid;
+	lboard_t        *lbptr;
+	gda_t           *gdap;
+	
+	gdap = (gda_t *)GDA_ADDR(get_nasid());
+	if (gdap->g_magic != GDA_MAGIC) {
+		printk("dumpklcfg_cmd: Invalid GDA MAGIC\n");
+		return;
+	}
+
+	for (cnode = 0; cnode < MAX_COMPACT_NODES; cnode ++) {
+		nasid = gdap->g_nasidtable[cnode];
+
+		if (nasid == INVALID_NASID)
+			continue;
+
+		printk("\nDumpping klconfig Nasid %d:\n", nasid);
+	
+		lbptr = KL_CONFIG_INFO(nasid);
+
+		while (lbptr) {
+			printk("    %s, Nasid %d, Module %d, widget 0x%x, partition %d, NIC 0x%x lboard 0x%lx",
+				"board name here", /* BOARD_NAME(lbptr->brd_type), */
+				lbptr->brd_nasid, lbptr->brd_module, 
+				lbptr->brd_widgetnum,
+				lbptr->brd_partition, 
+				(lbptr->brd_nic), lbptr);
+			if (lbptr->brd_flags & DUPLICATE_BOARD)
+				printk(" -D");
+			printk("\n");
+			for (i = 0; i < lbptr->brd_numcompts; i++) {
+				klinfo_t *kli;
+				kli = NODE_OFFSET_TO_KLINFO(NASID_GET(lbptr), lbptr->brd_compts[i]);                       
+				printk("        type %2d, flags 0x%04x, diagval %3d, physid %4d, virtid %2d: %s\n", 
+					kli->struct_type, 
+					kli->flags,
+					kli->diagval,
+					kli->physid,
+					kli->virtid,
+					"comp. name here");
+					/* COMPONENT_NAME(kli->struct_type)); */
+			}
+			lbptr = KLCF_NEXT(lbptr);
+		}
+	}
+	printk("\n");
+
+	/* Useful to print router maps also */
+
+	for (cnode = 0; cnode < MAX_COMPACT_NODES; cnode ++) {
+		klrou_t *kr;
+		int i;
+
+        	nasid = gdap->g_nasidtable[cnode];
+        	if (nasid == INVALID_NASID)
+            		continue;
+        	lbptr = KL_CONFIG_INFO(nasid);
+
+        	while (lbptr) {
+			
+			lbptr = find_lboard_class(lbptr, KLCLASS_ROUTER);
+			if(!lbptr)
+				break;
+			if (!KL_CONFIG_DUPLICATE_BOARD(lbptr)) {
+				printk("%llx -> \n", lbptr->brd_nic);
+				kr = (klrou_t *)find_first_component(lbptr,
+					KLSTRUCT_ROU);
+				for (i = 1; i <= MAX_ROUTER_PORTS; i++) {
+					printk("[%d, %llx]; ",
+						kr->rou_port[i].port_nasid,
+						kr->rou_port[i].port_offset);
+				}
+				printk("\n");
+			}
+			lbptr = KLCF_NEXT(lbptr);
+        	}
+        	printk("\n");
+    	}
+
+	dump_topology();
+}
+#endif
+
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-irq-glue.S linux/arch/mips64/sgi-ip27/ip27-irq-glue.S
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-irq-glue.S	Sat May 13 08:30:17 2000
+++ linux/arch/mips64/sgi-ip27/ip27-irq-glue.S	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-irq.c linux/arch/mips64/sgi-ip27/ip27-irq.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-irq.c	Fri Feb  9 11:29:44 2001
+++ linux/arch/mips64/sgi-ip27/ip27-irq.c	Mon Dec  3 23:08:46 2001
@@ -3,6 +3,7 @@
  *
  * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 1999 - 2001 Kanoj Sarcar
  */
 #include <linux/config.h>
 #include <linux/init.h>
@@ -25,6 +26,7 @@
 #include <asm/io.h>
 #include <asm/mipsregs.h>
 #include <asm/system.h>
+#include <asm/irq.h>
 
 #include <asm/ptrace.h>
 #include <asm/processor.h>
@@ -42,6 +44,10 @@
 #define DBG(x...)
 #endif
 
+/* These should die */
+unsigned char bus_to_wid[256];	/* widget id for linux pci bus */
+unsigned char bus_to_nid[256];	/* nasid for linux pci bus */
+unsigned char num_bridges;	/* number of bridges in the system */
 
 /*
  * Linux has a controller-independent x86 interrupt architecture.
@@ -67,11 +73,11 @@
 unsigned long spurious_count = 0;
 
 /*
- * we need to map irq's up to at least bit 7 of the INT_MASK0_A register
- * since bits 0-6 are pre-allocated for other purposes.
+ * There is a single intpend register per node, and we want to have
+ * distinct levels for intercpu intrs for both cpus A and B on a node.
  */
-#define IRQ_TO_SWLEVEL(cpu, i)	i + 7
-#define SWLEVEL_TO_IRQ(cpu, s)	s - 7
+int node_level_to_irq[MAX_COMPACT_NODES][PERNODE_LEVELS];
+
 /*
  * use these macros to get the encoded nasid and widget id
  * from the irq value
@@ -82,6 +88,41 @@
 #define WID_FROM_PCI_IRQ(i)		bus_to_wid[IRQ_TO_BUS(i)]
 #define	SLOT_FROM_PCI_IRQ(i)		irq_to_slot[i]
 
+static inline int alloc_level(cpuid_t cpunum, int irq)
+{
+	cnodeid_t nodenum = CPUID_TO_COMPACT_NODEID(cpunum);
+	int j = LEAST_LEVEL + 3;	/* resched & crosscall entries taken */
+
+	while (++j < PERNODE_LEVELS) {
+		if (node_level_to_irq[nodenum][j] == -1) {
+			node_level_to_irq[nodenum][j] = irq;
+			return j;
+		}
+	}
+	printk("Cpu %ld flooded with devices\n", cpunum);
+	while(1);
+	return -1;
+}
+
+static inline int find_level(cpuid_t *cpunum, int irq)
+{
+	int j;
+	cnodeid_t nodenum = INVALID_CNODEID;
+
+	while (++nodenum < MAX_COMPACT_NODES) {
+		j = LEAST_LEVEL + 3;	/* resched & crosscall entries taken */
+		while (++j < PERNODE_LEVELS)
+			if (node_level_to_irq[nodenum][j] == irq) {
+				*cpunum = 0;	/* XXX Fixme */
+				return(j);
+			}
+	}
+	printk("Could not identify cpu/level for irq %d\n", irq);
+	while(1);
+	return(-1);
+}
+
+
 void disable_irq(unsigned int irq_nr)
 {
 	panic("disable_irq() called ...");
@@ -146,7 +187,8 @@
 	}
 	irq_exit(thiscpu, irq);
 
-	/* unmasking and bottom half handling is done magically for us. */
+	if (softirq_pending(thiscpu))
+		do_softirq();
 }
 
 /*
@@ -196,7 +238,7 @@
 				swlevel = ms1bit(pend0);
 				LOCAL_HUB_CLR_INTR(swlevel);
 				/* "map" swlevel to irq */
-				irq = SWLEVEL_TO_IRQ(thiscpu, swlevel);
+				irq = LEVEL_TO_IRQ(thiscpu, swlevel);
 				do_IRQ(thiscpu, irq, regs);
 				/* clear bit in pend0 */
 				pend0 ^= 1ULL << swlevel;
@@ -227,7 +269,7 @@
 	 * "map" irq to a swlevel greater than 6 since the first 6 bits
 	 * of INT_PEND0 are taken
 	 */
-	swlevel = IRQ_TO_SWLEVEL(cpu, irq);
+	swlevel = alloc_level(cpu, irq);
 	intr_connect_level(cpu, swlevel);
 
 	bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (master << 8));
@@ -254,6 +296,7 @@
 {
 	bridge_t *bridge;
 	int pin, swlevel;
+	cpuid_t cpu;
 
 	bridge = (bridge_t *) NODE_SWIN_BASE(NASID_FROM_PCI_IRQ(irq), 
 	                                     WID_FROM_PCI_IRQ(irq));
@@ -264,8 +307,9 @@
 	 * map irq to a swlevel greater than 6 since the first 6 bits
 	 * of INT_PEND0 are taken
 	 */
-	swlevel = IRQ_TO_SWLEVEL(cpu, irq);
-	intr_disconnect_level(smp_processor_id(), swlevel);
+	swlevel = find_level(&cpu, irq);
+	intr_disconnect_level(cpu, swlevel);
+	LEVEL_TO_IRQ(cpu, swlevel) = -1;
 
 	bridge->b_int_enable &= ~(1 << pin);
 	bridge->b_widget.w_tflush;                      /* Flush */
@@ -423,7 +467,6 @@
 
 	printk(" ]\nStack dumps:");
 	for(i = 0; i < smp_num_cpus; i++) {
-		unsigned long esp;
 		if (i == cpu)
 			continue;
 		printk("\nCPU %d:",i);
@@ -661,37 +704,50 @@
 #ifdef CONFIG_SMP
 #if (CPUS_PER_NODE == 2)
 	static int done = 0;
-	int irq;
 
 	/*
 	 * This is a hack till we have a pernode irqlist. Currently,
 	 * just have the master cpu set up the handlers for the per
 	 * cpu irqs.
 	 */
+	if (done == 0) {
+		int j;
 
-	irq = CPU_RESCHED_A_IRQ + cputoslice(cpu);
-	intr_connect_level(cpu, IRQ_TO_SWLEVEL(cpu, irq));
-	if (done == 0)
-	if (request_irq(irq, handle_resched_intr, 0, "resched", 0))
-		panic("intercpu intr unconnectible\n");
-	irq = CPU_CALL_A_IRQ + cputoslice(cpu);
-	intr_connect_level(cpu, IRQ_TO_SWLEVEL(cpu, irq));
-	if (done == 0)
-	if (request_irq(irq, smp_call_function_interrupt, 0,
-						"callfunc", 0))
-		panic("intercpu intr unconnectible\n");
-	/* HACK STARTS */
-	if (done)
-		return;
-	irq = CPU_RESCHED_A_IRQ + cputoslice(cpu) + 1;
-	if (request_irq(irq, handle_resched_intr, 0, "resched", 0))
-		panic("intercpu intr unconnectible\n");
-	irq = CPU_CALL_A_IRQ + cputoslice(cpu) + 1;
-	if (request_irq(irq, smp_call_function_interrupt, 0,
-						"callfunc", 0))
-		panic("intercpu intr unconnectible\n");
-	done = 1;
-	/* HACK ENDS */
+		if (request_irq(CPU_RESCHED_A_IRQ, handle_resched_intr, 
+							0, "resched", 0))
+			panic("intercpu intr unconnectible\n");
+		if (request_irq(CPU_RESCHED_B_IRQ, handle_resched_intr, 
+							0, "resched", 0))
+			panic("intercpu intr unconnectible\n");
+		if (request_irq(CPU_CALL_A_IRQ, smp_call_function_interrupt,
+							0, "callfunc", 0))
+			panic("intercpu intr unconnectible\n");
+		if (request_irq(CPU_CALL_B_IRQ, smp_call_function_interrupt,
+							0, "callfunc", 0))
+			panic("intercpu intr unconnectible\n");
+
+		for (j = 0; j < PERNODE_LEVELS; j++)
+			LEVEL_TO_IRQ(0, j) = -1;
+		LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_RESCHED_A_IRQ)) = 
+							CPU_RESCHED_A_IRQ;
+		LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_RESCHED_B_IRQ)) = 
+							CPU_RESCHED_B_IRQ;
+		LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_CALL_A_IRQ)) = 
+							CPU_CALL_A_IRQ;
+		LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_CALL_B_IRQ)) = 
+							CPU_CALL_B_IRQ;
+		for (j = 1; j < MAX_COMPACT_NODES; j++)
+			memcpy(&node_level_to_irq[j][0], 
+			&node_level_to_irq[0][0], 
+			sizeof(node_level_to_irq[0][0])*PERNODE_LEVELS);
+
+		done = 1;
+	}
+
+	intr_connect_level(cpu, FAST_IRQ_TO_LEVEL(CPU_RESCHED_A_IRQ + 
+							cputoslice(cpu)));
+	intr_connect_level(cpu, FAST_IRQ_TO_LEVEL(CPU_CALL_A_IRQ +
+							cputoslice(cpu)));
 #else /* CPUS_PER_NODE */
 #error Must redefine this for more than 2 CPUS.
 #endif /* CPUS_PER_NODE */
@@ -700,7 +756,9 @@
 
 void install_tlbintr(int cpu)
 {
+#if 0
 	int intr_bit = N_INTPEND_BITS + TLB_INTR_A + cputoslice(cpu);
 
 	intr_connect_level(cpu, intr_bit);
+#endif
 }
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-klconfig.c linux/arch/mips64/sgi-ip27/ip27-klconfig.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-klconfig.c	Sun Jul  9 22:18:16 2000
+++ linux/arch/mips64/sgi-ip27/ip27-klconfig.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  */
@@ -57,6 +56,19 @@
 			return start;
 		start = KLCF_NEXT(start);
 	}
+	/* Didn't find it. */
+	return (lboard_t *)NULL;
+}
+
+lboard_t * find_lboard_class(lboard_t *start, unsigned char brd_type)
+{
+	/* Search all boards stored on this node. */
+	while (start) {
+		if (KLCLASS(start->brd_type) == KLCLASS(brd_type))
+			return start;
+		start = KLCF_NEXT(start);
+	}
+
 	/* Didn't find it. */
 	return (lboard_t *)NULL;
 }
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-klnuma.c linux/arch/mips64/sgi-ip27/ip27-klnuma.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-klnuma.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip27/ip27-klnuma.c	Mon Dec  3 23:08:46 2001
@@ -1,6 +1,7 @@
 /*
  * Ported from IRIX to Linux by Kanoj Sarcar, 06/08/00.
- * Copyright 2000 Silicon Graphics, Inc.
+ * Copyright 2000 - 2001 Silicon Graphics, Inc.
+ * Copyright 2000 - 2001 Kanoj Sarcar (kanoj@sgi.com)
  */
 #include <linux/config.h>
 #include <linux/init.h>
@@ -9,6 +10,7 @@
 #include <linux/string.h>
 
 #include <asm/page.h>
+#include <asm/smp.h>
 #include <asm/sn/types.h>
 #include <asm/sn/arch.h>
 #include <asm/sn/gda.h>
@@ -16,10 +18,6 @@
 #include <asm/sn/klkernvars.h>
 #include <asm/sn/mapped_kernel.h>
 #include <asm/sn/sn_private.h>
-
-#define CPUMASK_CLRALL(p)	(p) = 0
-#define CPUMASK_SETB(p, bit)	(p) |= 1 << (bit)
-#define CPUMASK_TSTB(p, bit)	((p) & (1ULL << (bit)))
 
 extern char _end;
 static cpumask_t ktext_repmask;
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-memory.c linux/arch/mips64/sgi-ip27/ip27-memory.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-memory.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip27/ip27-memory.c	Mon Dec  3 23:08:46 2001
@@ -20,6 +20,7 @@
 #include <asm/bootinfo.h>
 #include <asm/addrspace.h>
 #include <asm/pgtable.h>
+#include <asm/pgalloc.h>
 #include <asm/sn/types.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/klconfig.h>
@@ -227,15 +228,24 @@
 
 void __init paging_init(void)
 {
+	pmd_t *pmd = kpmdtbl;
+	pte_t *pte = kptbl;
+
 	cnodeid_t node;
 	unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
+	int i;
 
 	/* Initialize the entire pgd.  */
 	pgd_init((unsigned long)swapper_pg_dir);
 	pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table);
 	memset((void *)invalid_pte_table, 0, sizeof(pte_t) * PTRS_PER_PTE);
-	pmd_init((unsigned long)empty_bad_pmd_table, (unsigned long)empty_bad_page_table);
-	memset((void *)empty_bad_page_table, 0, sizeof(pte_t) * PTRS_PER_PTE);
+
+	/* This is for vmalloc  */
+	memset((void *)kptbl, 0, PAGE_SIZE << KPTBL_PAGE_ORDER);
+	memset((void *)kpmdtbl, 0, PAGE_SIZE);
+	pgd_set(swapper_pg_dir, kpmdtbl);
+	for (i = 0; i < (1 << KPTBL_PAGE_ORDER); pmd++,i++,pte+=PTRS_PER_PTE)
+		pmd_val(*pmd) = (unsigned long)pte;
 
 	for (node = 0; node < numnodes; node++) {
 		pfn_t start_pfn = slot_getbasepfn(node, 0);
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-pci-dma.c linux/arch/mips64/sgi-ip27/ip27-pci-dma.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-pci-dma.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip27/ip27-pci-dma.c	Mon Dec  3 23:08:46 2001
@@ -1,5 +1,4 @@
-/* $Id: ip27-pci-dma.c,v 1.1 2000/02/16 21:22:00 ralf Exp $
- *
+/*
  * Dynamic DMA mapping support.
  *
  * On the Origin there is dynamic DMA address translation for all PCI DMA.
@@ -52,4 +51,114 @@
 			 void *vaddr, dma_addr_t dma_handle)
 {
 	free_pages((unsigned long)vaddr, __get_order(size));
+}
+
+/*
+ * Map a single buffer of the indicated size for DMA in streaming mode.
+ * The 32-bit bus address to use is returned.
+ *
+ * Once the device is given the dma address, the device owns this memory
+ * until either pci_unmap_single or pci_dma_sync_single is performed.
+ */
+dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size,
+                          int direction)
+{
+	if (direction == PCI_DMA_NONE)
+		BUG();
+
+	return (bus_to_baddr[hwdev->bus->number] | __pa(ptr));
+}
+
+/*
+ * Unmap a single streaming mode DMA translation.  The dma_addr and size
+ * must match what was provided for in a previous pci_map_single call.  All
+ * other usages are undefined.
+ *
+ * After this call, reads by the cpu to the buffer are guarenteed to see
+ * whatever the device wrote there.
+ */
+void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
+                     size_t size, int direction)
+{
+	if (direction == PCI_DMA_NONE)
+		BUG();
+
+	/* Nothing to do */
+}
+
+/*
+ * Map a set of buffers described by scatterlist in streaming
+ * mode for DMA.  This is the scather-gather version of the
+ * above pci_map_single interface.  Here the scatter gather list
+ * elements are each tagged with the appropriate dma address
+ * and length.  They are obtained via sg_dma_{address,length}(SG).
+ *
+ * NOTE: An implementation may be able to use a smaller number of
+ *       DMA address/length pairs than there are SG table elements.
+ *       (for example via virtual mapping capabilities)
+ *       The routine returns the number of addr/length pairs actually
+ *       used, at most nents.
+ *
+ * Device ownership issues as mentioned above for pci_map_single are
+ * the same here.
+ */
+int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents,
+               int direction)
+{
+	int i;
+
+	if (direction == PCI_DMA_NONE)
+		BUG();
+
+	/* Make sure that gcc doesn't leave the empty loop body.  */
+	for (i = 0; i < nents; i++, sg++) {
+		sg->address = (char *)(bus_to_baddr[hwdev->bus->number] | __pa(sg->address));
+	}
+
+	return nents;
+}
+
+/*
+ * Unmap a set of streaming mode DMA translations.
+ * Again, cpu read rules concerning calls here are the same as for
+ * pci_unmap_single() above.
+ */
+void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents,
+                  int direction)
+{
+	if (direction == PCI_DMA_NONE)
+		BUG();
+
+	/* Nothing to do */
+}
+
+/*
+ * Make physical memory consistent for a single
+ * streaming mode DMA translation after a transfer.
+ *
+ * If you perform a pci_map_single() but wish to interrogate the
+ * buffer using the cpu, yet do not wish to teardown the PCI dma
+ * mapping, you must call this function before doing so.  At the
+ * next point you give the PCI dma address back to the card, the
+ * device again owns the buffer.
+ */
+void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
+                         size_t size, int direction)
+{
+	if (direction == PCI_DMA_NONE)
+		BUG();
+}
+
+/*
+ * Make physical memory consistent for a set of streaming
+ * mode DMA translations after a transfer.
+ *
+ * The same as pci_dma_sync_single but for a scatter-gather list,
+ * same rules and usage.
+ */
+void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
+                     int nelems, int direction)
+{
+	if (direction == PCI_DMA_NONE)
+		BUG();
 }
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-pci.c linux/arch/mips64/sgi-ip27/ip27-pci.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-pci.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip27/ip27-pci.c	Mon Dec  3 23:08:46 2001
@@ -18,7 +18,7 @@
 /*
  * Max #PCI busses we can handle; ie, max #PCI bridges.
  */
-#define MAX_PCI_BUSSES		20
+#define MAX_PCI_BUSSES		40
 
 /*
  * Max #PCI devices (like scsi controllers) we handle on a bus.
@@ -55,8 +55,12 @@
 	bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],        \
                                              bus_to_wid[bus_id]);       \
                                                                         \
-	/*if (dev->bus->number)			 */			\
-	/*	return PCIBIOS_DEVICE_NOT_FOUND; */			\
+	if (dev->vendor == PCI_VENDOR_ID_SGI				\
+	    && dev->device == PCI_DEVICE_ID_SGI_IOC3			\
+	    && ((where >= 0x14 && where < 0x40) || (where >= 0x48))) {	\
+		*value = 0;						\
+		return PCIBIOS_SUCCESSFUL;				\
+	}								\
 									\
 	__bit = (((where) & (bm)) << 3);				\
 	addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];	\
@@ -96,11 +100,9 @@
 	bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],        \
                                              bus_to_wid[bus_id]);       \
                                                                         \
-	/* if (dev->bus->number)		 */			\
-	/* 	return PCIBIOS_DEVICE_NOT_FOUND; */			\
-									\
 	if (dev->vendor == PCI_VENDOR_ID_SGI				\
-	    && dev->device == PCI_DEVICE_ID_SGI_IOC3)			\
+	    && dev->device == PCI_DEVICE_ID_SGI_IOC3			\
+	    && ((where >= 0x14 && where < 0x40) || (where >= 0x48)))	\
 		return PCIBIOS_SUCCESSFUL;				\
 									\
 	__bit = (((where) & (bm)) << 3);				\
@@ -147,6 +149,7 @@
 	int	i;
 
 	ioport_resource.end = ~0UL;
+	iomem_resource.end = ~0UL;
 
 	for (i=0; i<num_bridges; i++) {
 		printk("PCI: Probing PCI hardware on host bus %2d.\n", i);
@@ -178,7 +181,7 @@
  * All observed requests have pin == 1. We could have a global here, that
  * gets incremented and returned every time - unfortunately, pci_map_irq
  * may be called on the same device over and over, and need to return the
- * same value. On o2000, pin can be 0 or 1, and PCI slots can be [0..7]. 
+ * same value. On O2000, pin can be 0 or 1, and PCI slots can be [0..7]. 
  *
  * A given PCI device, in general, should be able to intr any of the cpus
  * on any one of the hubs connected to its xbow.
@@ -186,25 +189,23 @@
 static int __init
 pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 {
-	if ((dev->bus->number >= MAX_PCI_BUSSES) || (pin != 1) || \
-					(slot >= MAX_DEVICES_PER_PCIBUS)) {
-		printk("Increase supported PCI busses %d,%d,%d\n", \
-						dev->bus->number, slot, pin);
-		while(1);
-	}
+	if ((dev->bus->number >= MAX_PCI_BUSSES)
+	    || (pin != 1)
+	    || (slot >= MAX_DEVICES_PER_PCIBUS))
+		panic("Increase supported PCI busses %d,%d,%d\n",
+		      dev->bus->number, slot, pin);
 
 	/*
 	 * Already assigned? Then return previously assigned value ...
 	 */
 	if (irqstore[dev->bus->number][slot])
-		return(irqstore[dev->bus->number][slot]);
-	else {
-		irq_to_bus[lastirq] = dev->bus->number;
-		irq_to_slot[lastirq] = slot;
-		irqstore[dev->bus->number][slot] = lastirq;
-		lastirq++;
-		return (lastirq - 1);
-	}
+		return irqstore[dev->bus->number][slot];
+
+	irq_to_bus[lastirq] = dev->bus->number;
+	irq_to_slot[lastirq] = slot;
+	irqstore[dev->bus->number][slot] = lastirq;
+	lastirq++;
+	return lastirq - 1;
 }
 
 void __init
@@ -237,10 +238,10 @@
 pcibios_fixup_pbus_ranges(struct pci_bus * bus,
                           struct pbus_set_ranges_data * ranges)
 {
-	ranges->io_start -= bus->resource[0]->start;
-	ranges->io_end -= bus->resource[0]->start;
+	ranges->io_start  -= bus->resource[0]->start;
+	ranges->io_end    -= bus->resource[0]->start;
 	ranges->mem_start -= bus->resource[1]->start;
-	ranges->mem_end -= bus->resource[1]->start;
+	ranges->mem_end   -= bus->resource[1]->start;
 }
 
 int __init
@@ -255,6 +256,11 @@
 {
 }
 
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 0;
+}
+
 char * __init
 pcibios_setup(char *str)
 {
@@ -263,19 +269,23 @@
 	return str;
 }
 
+/*
+ * Device might live on a subordinate PCI bus.  XXX Walk up the chain of buses
+ * to find the slot number in sense of the bridge device register.
+ * XXX This also means multiple devices might rely on conflicting bridge
+ * settings.
+ */
+
 static void __init
 pci_disable_swapping(struct pci_dev *dev)
 {
 	unsigned int bus_id = (unsigned) dev->bus->number;
 	bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],
-				     bus_to_wid[bus_id]);
+	                                               bus_to_wid[bus_id]);
 	int		slot = PCI_SLOT(dev->devfn);
-	bridgereg_t 	devreg;
-
-	devreg = bridge->b_device[slot].reg;
-	devreg &= ~BRIDGE_DEV_SWAP_DIR;		/* turn off byte swapping */
-	bridge->b_device[slot].reg = devreg;
 
+	/* Turn off byte swapping */
+	bridge->b_device[slot].reg &= ~BRIDGE_DEV_SWAP_DIR;
 	bridge->b_widget.w_tflush;		/* Flush */
 }
 
@@ -284,56 +294,25 @@
 {
 	unsigned int bus_id = (unsigned) dev->bus->number;
 	bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],
-				     bus_to_wid[bus_id]);
+	                                               bus_to_wid[bus_id]);
 	int		slot = PCI_SLOT(dev->devfn);
-	bridgereg_t 	devreg;
-
-	devreg = bridge->b_device[slot].reg;
-	devreg |= BRIDGE_DEV_SWAP_DIR;		/* turn on byte swapping */
-	bridge->b_device[slot].reg = devreg;
 
+	/* Turn on byte swapping */
+	bridge->b_device[slot].reg |= BRIDGE_DEV_SWAP_DIR;
 	bridge->b_widget.w_tflush;		/* Flush */
 }
 
 static void __init
 pci_fixup_ioc3(struct pci_dev *d)
 {
-	unsigned int bus_id = (unsigned) d->bus->number;
-	int i;
+	unsigned long bus_id = (unsigned) d->bus->number;
 
-	/* IOC3 only decodes 0x20 bytes of the config space, so we end up
-	   with tons of bogus information in the pci_dev.  On Origins the
-	   INTA, INTB and INTC pins are all wired together as if it'd only
-	   use INTA.  */
 	printk("PCI: Fixing base addresses for IOC3 device %s\n", d->slot_name);
 
 	d->resource[0].start |= NODE_OFFSET(bus_to_nid[bus_id]);
-	d->resource[0].end |= NODE_OFFSET(bus_to_nid[bus_id]);
-
-	for (i = 1; i <= PCI_ROM_RESOURCE; i++) {
-		d->resource[i].start = 0UL;
-		d->resource[i].end = 0UL;
-		d->resource[i].flags = 0UL;
-	}
+	d->resource[0].end   |= NODE_OFFSET(bus_to_nid[bus_id]);
 
 	pci_disable_swapping(d);
-
-	/*
-	 * The serial driver will try to probe for serial ports
-	 * later on. MENET boards dbe out unrecoverably on sio space
-	 * access to the 4th ioc3. (The first 3 iocs work okay, they
-	 * have kbd/ms ports; all have ethernet ports). Catch this
-	 * case now and disable the serial driver from looking at 
-	 * these ioc3s. Identify MENET cards by seeing if an ioc3 is
-	 * at slot 3.
-	 */
-	d->subsystem_vendor = 0xFF00;
-	if (PCI_SLOT(d->devfn) == 3) {
-		struct list_head *p;
-		list_for_each(p, &d->bus->devices) {
-			list_entry(p, struct pci_dev, bus_list)->subsystem_vendor = 0;
-		}
-	}
 }
 
 static void __init
@@ -344,7 +323,8 @@
 	d->resource[0].start |= ((unsigned long)(bus_to_nid[d->bus->number])<<32);
 	printk("PCI: Fixing isp1020 in [bus:slot.fn] %s\n", d->slot_name);
 
-	/* Configure device to allow bus mastering, i/o and memory mapping. 
+	/*
+	 * Configure device to allow bus mastering, i/o and memory mapping. 
 	 * Older qlogicisp driver expects to have the IO space enable 
 	 * bit set. Things stop working if we program the controllers as not 
 	 * having PCI_COMMAND_MEMORY, so we have to fudge the mem_flags.
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-setup.c linux/arch/mips64/sgi-ip27/ip27-setup.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-setup.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip27/ip27-setup.c	Mon Dec  3 23:08:46 2001
@@ -14,6 +14,7 @@
 #include <linux/spinlock.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
+#include <asm/io.h>
 #include <asm/sn/types.h>
 #include <asm/sn/sn0/addrs.h>
 #include <asm/sn/sn0/hubni.h>
@@ -39,6 +40,7 @@
 #define DBG(x...)
 #endif
 
+unsigned long mips_io_port_base = IO_BASE;
 
 /*
  * get_nasid() returns the physical node id number of the caller.
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-timer.c linux/arch/mips64/sgi-ip27/ip27-timer.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip27/ip27-timer.c	Tue Nov 28 21:42:04 2000
+++ linux/arch/mips64/sgi-ip27/ip27-timer.c	Mon Dec  3 23:08:46 2001
@@ -145,6 +145,9 @@
         }
 
 	write_unlock(&xtime_lock);
+
+	if (softirq_pending(cpu))
+		do_softirq();
 }
 
 unsigned long inline do_gettimeoffset(void)
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/Makefile linux/arch/mips64/sgi-ip32/Makefile
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/Makefile	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/Makefile	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,27 @@
+#
+# Makefile for the SGI specific kernel interface routines
+# under Linux.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+# Note 2! The CFLAGS definitions are now in the main makefile...
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+O_TARGET := ip32-kern.a
+
+all: ip32-kern.a ip32-irq-glue.o
+
+obj-y	+= ip32-irq.o ip32-rtc.o ip32-setup.o ip32-irq-glue.o \
+	 ip32-berr.o ip32-timer.o crime.o
+
+ifdef CONFIG_PCI
+obj-y   += ip32-pci.o ip32-pci-dma.o
+endif
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/crime.c linux/arch/mips64/sgi-ip32/crime.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/crime.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/crime.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,50 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 Keith M Wesolowski
+ */
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/ip32/crime.h>
+#include <asm/ptrace.h>
+#include <asm/promlib.h>
+
+void __init crime_init (void)
+{
+	u64 id = crime_read_64 (CRIME_ID);
+	u64 rev = id & CRIME_ID_REV;
+
+	id = (id & CRIME_ID_IDBITS) >> 4;
+
+	printk ("CRIME id %1lx rev %ld detected at %016lx\n", id, rev,
+		(unsigned long) CRIME_BASE);
+}
+
+/* XXX Like on Sun, these give us various useful information to printk. */
+void crime_memerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
+{
+	u64 memerr = crime_read_64 (CRIME_MEM_ERROR_STAT);
+	u64 addr = crime_read_64 (CRIME_MEM_ERROR_ADDR);
+	memerr &= CRIME_MEM_ERROR_STAT_MASK;
+	
+	printk ("CRIME memory error at physaddr 0x%08lx status %08lx\n",
+		addr << 2, memerr);
+
+	crime_write_64 (CRIME_MEM_ERROR_STAT, 0);
+}
+
+void crime_cpuerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
+{
+	u64 cpuerr = crime_read_64 (CRIME_CPU_ERROR_STAT);
+	u64 addr = crime_read_64 (CRIME_CPU_ERROR_ADDR);
+	cpuerr &= CRIME_CPU_ERROR_MASK;
+	addr <<= 2UL;
+
+	printk ("CRIME CPU interface error detected at %09lx status %08lx\n",
+		addr, cpuerr);
+
+	crime_write_64 (CRIME_CPU_ERROR_STAT, 0);
+}
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-berr.c linux/arch/mips64/sgi-ip32/ip32-berr.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-berr.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/ip32-berr.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,97 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 1995, 1996, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 by Silicon Graphics
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/uaccess.h>
+#include <asm/paccess.h>
+#include <asm/addrspace.h>
+#include <asm/ptrace.h>
+
+/* XXX I have no idea what this does --kmw */
+
+extern asmlinkage void handle_ibe(void);
+extern asmlinkage void handle_dbe(void);
+
+extern const struct exception_table_entry __start___dbe_table[];
+extern const struct exception_table_entry __stop___dbe_table[];
+
+static inline unsigned long
+search_one_table(const struct exception_table_entry *first,
+                 const struct exception_table_entry *last,
+                 unsigned long value)
+{
+	while (first <= last) {
+		const struct exception_table_entry *mid;
+		long diff;
+
+		mid = (last - first) / 2 + first;
+		diff = mid->insn - value;
+		if (diff == 0)
+			return mid->nextinsn;
+		else if (diff < 0)
+			first = mid+1;
+		else
+			last = mid-1;
+	}
+	return 0;
+}
+
+static inline unsigned long
+search_dbe_table(unsigned long addr)
+{
+	unsigned long ret;
+
+	/* There is only the kernel to search.  */
+	ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr);
+	if (ret) return ret;
+
+	return 0;
+}
+
+void do_ibe(struct pt_regs *regs)
+{
+	printk("Got ibe at 0x%lx\n", regs->cp0_epc);
+	show_regs(regs);
+	dump_tlb_addr(regs->cp0_epc);
+	force_sig(SIGBUS, current);
+	while(1);
+}
+
+void do_dbe(struct pt_regs *regs)
+{
+	unsigned long fixup;
+
+	fixup = search_dbe_table(regs->cp0_epc);
+	if (fixup) {
+		long new_epc;
+
+		new_epc = fixup_exception(dpf_reg, fixup, regs->cp0_epc);
+		regs->cp0_epc = new_epc;
+		return;
+	}
+
+	printk("Got dbe at 0x%lx\n", regs->cp0_epc);
+	show_regs(regs);
+	dump_tlb_all();
+	while(1);
+	force_sig(SIGBUS, current);
+}
+
+void __init
+bus_error_init(void)
+{
+	int dummy;
+
+	set_except_vector(6, handle_ibe);
+	set_except_vector(7, handle_dbe);
+
+	/* At this time nothing uses the DBE protection mechanism on the
+	   O2, so this here is needed to make the kernel link.  */
+	get_dbe(dummy, (int *)KSEG0);
+}
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-irq-glue.S linux/arch/mips64/sgi-ip32/ip32-irq-glue.S
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-irq-glue.S	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/ip32-irq-glue.S	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,87 @@
+/*
+ * Low level interrupt handler for the SGI O2 aka IP32 aka Moosehead
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Harald Koerfgen
+ * Copyright (C) 2001 Keith M Wesolowski
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+#include <asm/stackframe.h>
+#include <asm/addrspace.h>
+#include <asm/ip32/ip32_ints.h>
+
+		.text
+		.set    noreorder
+		.set    noat
+		.align  5
+		NESTED(ip32_handle_int, PT_SIZE, ra)
+		.set    noat
+		SAVE_ALL
+		CLI			# TEST: interrupts should be off
+		.set    at
+		.set    noreorder
+
+		mfc0	s0,CP0_CAUSE
+
+		andi	t1, s0, IE_IRQ0
+		bnez	t1, handle_irq0
+		 andi	t1, s0, IE_IRQ1
+		bnez	t1, handle_irq1
+		 andi	t1, s0, IE_IRQ2
+		bnez	t1, handle_irq2
+		 andi	t1, s0, IE_IRQ3
+		bnez	t1, handle_irq3
+		 andi	t1, s0, IE_IRQ4
+		bnez	t1, handle_irq4
+		 andi	t1, s0, IE_IRQ5
+		bnez	t1, handle_irq5
+		 nop
+
+		/* Either someone has triggered the "software interrupts"
+		 * or we lost an interrupt somehow.  Ignore it.
+		 */
+		j	ret_from_irq
+		 nop
+
+handle_irq0:
+		jal	ip32_irq0
+		 move	a0, sp
+		j	ret_from_irq
+		 nop
+
+handle_irq1:
+		jal	ip32_irq1
+		 move	a0, sp
+		j	ret_from_irq
+		 nop
+
+handle_irq2:
+		jal	ip32_irq2
+		 move	a0, sp
+		j	ret_from_irq
+		 nop
+
+handle_irq3:
+		jal	ip32_irq3
+		 move	a0, sp
+		j	ret_from_irq
+		 nop
+
+handle_irq4:
+		jal	ip32_irq4
+		 move	a0, sp
+		j	ret_from_irq
+		 nop
+
+handle_irq5:
+		jal	ip32_irq5
+		move	a0, sp
+		j	ret_from_irq
+		 nop
+
+		END(ip32_handle_int)
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-irq.c linux/arch/mips64/sgi-ip32/ip32-irq.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-irq.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/ip32-irq.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,556 @@
+/*
+ * Code to handle IP32 IRQs
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Harald Koerfgen
+ * Copyright (C) 2001 Keith M Wesolowski
+ */
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/bitops.h>
+
+#include <asm/bitops.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/ip32/ip32_ints.h>
+#include <asm/ip32/crime.h>
+#include <asm/ip32/mace.h>
+#include <asm/signal.h>
+
+#undef DEBUG_IRQ
+#ifdef DEBUG_IRQ
+#define DBG(x...) printk(x)
+#else
+#define DBG(x...)
+#endif
+
+/* O2 irq map
+ *
+ * IP0 -> software (ignored)
+ * IP1 -> software (ignored)
+ * IP2 -> (irq0) C crime 1.1 all interrupts; crime 1.5 ???
+ * IP3 -> (irq1) X unknown
+ * IP4 -> (irq2) X unknown
+ * IP5 -> (irq3) X unknown
+ * IP6 -> (irq4) X unknown
+ * IP7 -> (irq5) 0 CPU count/compare timer (system timer)
+ *
+ * crime: (C)
+ *
+ * CRIME_INT_STAT 31:0:
+ *
+ * 0 -> 1 Video in 1
+ * 1 -> 2 Video in 2
+ * 2 -> 3 Video out
+ * 3 -> 4 Mace ethernet
+ * 4 -> S  SuperIO sub-interrupt
+ * 5 -> M  Miscellaneous sub-interrupt
+ * 6 -> A  Audio sub-interrupt
+ * 7 -> 8  PCI bridge errors
+ * 8 -> 9  PCI SCSI aic7xxx 0
+ * 9 -> 10  PCI SCSI aic7xxx 1
+ * 10 -> 11 PCI slot 0
+ * 11 -> 12 unused (PCI slot 1)
+ * 12 -> 13 unused (PCI slot 2)
+ * 13 -> 14 unused (PCI shared 0)
+ * 14 -> 15 unused (PCI shared 1)
+ * 15 -> 16 unused (PCI shared 2)
+ * 16 -> 17 GBE0 (E)
+ * 17 -> 18 GBE1 (E)
+ * 18 -> 19 GBE2 (E)
+ * 19 -> 20 GBE3 (E)
+ * 20 -> 21 CPU errors
+ * 21 -> 22 Memory errors
+ * 22 -> 23 RE empty edge (E)
+ * 23 -> 24 RE full edge (E)
+ * 24 -> 25 RE idle edge (E)
+ * 25 -> 26 RE empty level
+ * 26 -> 27 RE full level
+ * 27 -> 28 RE idle level
+ * 28 -> 29  unused (software 0) (E)
+ * 29 -> 30  unused (software 1) (E)
+ * 30 -> 31  unused (software 2) - crime 1.5 CPU SysCorError (E)
+ * 31 -> 32 VICE
+ *
+ * S, M, A: Use the MACE ISA interrupt register
+ * MACE_ISA_INT_STAT 31:0
+ *
+ * 0-7 -> 33-40 Audio
+ * 8 -> 41 RTC
+ * 9 -> 42 Keyboard
+ * 10 -> X Keyboard polled
+ * 11 -> 44 Mouse
+ * 12 -> X Mouse polled
+ * 13-15 -> 46-48 Count/compare timers
+ * 16-19 -> 49-52 Parallel (16 E)
+ * 20-25 -> 53-58 Serial 1 (22 E)
+ * 26-31 -> 59-64 Serial 2 (28 E)
+ *
+ * Note that this means IRQs 5-7, 43, and 45 do not exist.  This is a
+ * different IRQ map than IRIX uses, but that's OK as Linux irq handling
+ * is quite different anyway.
+ */
+
+/* Some initial interrupts to set up */
+extern void crime_memerr_intr (unsigned int irq, void *dev_id,
+			       struct pt_regs *regs);
+extern void crime_cpuerr_intr (unsigned int irq, void *dev_id,
+			       struct pt_regs *regs);
+
+struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT,
+			       0, "CRIME memory error", NULL,
+			       NULL };
+struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT,
+			       0, "CRIME CPU error", NULL,
+			       NULL };
+
+unsigned long spurious_count = 0;
+extern void ip32_handle_int (void);
+extern void do_IRQ (unsigned int irq, struct pt_regs *regs);
+
+/* For interrupts wired from a single device to the CPU.  Only the clock
+ * uses this it seems, which is IRQ 0 and IP7.
+ */
+
+static void enable_cpu_irq (unsigned int irq)
+{
+	set_cp0_status (STATUSF_IP7);
+}
+
+static unsigned int startup_cpu_irq (unsigned int irq) {
+	enable_cpu_irq (irq);
+	return 0;
+}
+
+static void disable_cpu_irq (unsigned int irq)
+{
+	clear_cp0_status (STATUSF_IP7);
+}
+
+static void end_cpu_irq (unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_cpu_irq (irq);
+}
+
+#define shutdown_cpu_irq disable_cpu_irq
+#define mask_and_ack_cpu_irq disable_cpu_irq
+
+static struct hw_interrupt_type ip32_cpu_interrupt = {
+	"IP32 CPU",
+	startup_cpu_irq,
+	shutdown_cpu_irq,
+	enable_cpu_irq,
+	disable_cpu_irq,
+	mask_and_ack_cpu_irq,
+	end_cpu_irq,
+	NULL
+};
+
+/*
+ * This is for pure CRIME interrupts - ie not MACE.  The advantage?
+ * We get to split the register in half and do faster lookups.
+ */
+
+static void enable_crime_irq (unsigned int irq)
+{
+	u64 crime_mask;
+	unsigned long flags;
+
+	save_and_cli (flags);
+	crime_mask = crime_read_64 (CRIME_INT_MASK);
+	crime_mask |= 1 << (irq - 1);
+	crime_write_64 (CRIME_INT_MASK, crime_mask);
+	restore_flags (flags);
+}
+
+static unsigned int startup_crime_irq (unsigned int irq)
+{
+	enable_crime_irq (irq);
+	return 0; /* This is probably not right; we could have pending irqs */
+}
+
+static void disable_crime_irq (unsigned int irq)
+{
+	u64 crime_mask;
+	unsigned long flags;
+
+	save_and_cli (flags);
+	crime_mask = crime_read_64 (CRIME_INT_MASK);
+	crime_mask &= ~(1 << (irq - 1));
+	crime_write_64 (CRIME_INT_MASK, crime_mask);
+	restore_flags (flags);
+}
+
+static void mask_and_ack_crime_irq (unsigned int irq)
+{
+	u64 crime_mask;
+	unsigned long flags;
+
+	/* Edge triggered interrupts must be cleared. */
+	if ((irq <= CRIME_GBE0_IRQ && irq >= CRIME_GBE3_IRQ)
+	    || (irq <= CRIME_RE_EMPTY_E_IRQ && irq >= CRIME_RE_IDLE_E_IRQ)
+	    || (irq <= CRIME_SOFT0_IRQ && irq >= CRIME_SOFT2_IRQ)) {
+		save_and_cli (flags);
+		crime_mask = crime_read_64 (CRIME_HARD_INT);
+		crime_mask &= ~(1 << (irq - 1));
+		crime_write_64 (CRIME_HARD_INT, crime_mask);
+		restore_flags (flags);
+	}
+	disable_crime_irq (irq);
+}
+	
+static void end_crime_irq (unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_crime_irq (irq);
+}
+
+#define shutdown_crime_irq disable_crime_irq
+
+static struct hw_interrupt_type ip32_crime_interrupt = {
+	"IP32 CRIME",
+	startup_crime_irq,
+	shutdown_crime_irq,
+	enable_crime_irq,
+	disable_crime_irq,
+	mask_and_ack_crime_irq,
+	end_crime_irq,
+	NULL
+};
+
+/* This is for MACE PCI interrupts.  We can decrease bus traffic by masking
+ * as close to the source as possible.  This also means we can take the
+ * next chunk of the CRIME register in one piece.
+ */
+
+static void enable_macepci_irq (unsigned int irq)
+{
+	u32 mace_mask;
+	u64 crime_mask;
+	unsigned long flags;
+
+	save_and_cli (flags);
+	mace_mask = mace_read_32 (MACEPCI_CONTROL);
+	mace_mask |= MACEPCI_CONTROL_INT (irq - 9);
+	mace_write_32 (MACEPCI_CONTROL, mace_mask);
+	/* In case the CRIME interrupt isn't enabled, we must enable it;
+	 * however, we never disable interrupts at that level.
+	 */
+	crime_mask = crime_read_64 (CRIME_INT_MASK);
+	crime_mask |= 1 << (irq - 1);
+	crime_write_64 (CRIME_INT_MASK, crime_mask);
+	restore_flags (flags);
+}
+
+static unsigned int startup_macepci_irq (unsigned int irq) {
+	enable_macepci_irq (irq);
+	return 0; /* XXX */
+}
+
+static void disable_macepci_irq (unsigned int irq)
+{
+	u32 mace_mask;
+	unsigned long flags;
+
+	save_and_cli (flags);
+	mace_mask = mace_read_32 (MACEPCI_CONTROL);
+	mace_mask &= ~MACEPCI_CONTROL_INT (irq - 9);
+	mace_write_32 (MACEPCI_CONTROL, mace_mask);
+	restore_flags (flags);
+}
+
+static void end_macepci_irq (unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_macepci_irq (irq);
+}
+
+#define shutdown_macepci_irq disable_macepci_irq
+#define mask_and_ack_macepci_irq disable_macepci_irq
+
+static struct hw_interrupt_type ip32_macepci_interrupt = {
+	"IP32 MACE PCI",
+	startup_macepci_irq,
+	shutdown_macepci_irq,
+	enable_macepci_irq,
+	disable_macepci_irq,
+	mask_and_ack_macepci_irq,
+	end_macepci_irq,
+	NULL
+};
+
+/* This is used for MACE ISA interrupts.  That means bits 4-6 in the
+ * CRIME register.
+ */
+
+static void enable_maceisa_irq (unsigned int irq)
+{
+	u64 crime_mask;
+	u32 mace_mask;
+	unsigned int crime_int = 0;
+	unsigned long flags;
+
+	DBG ("maceisa enable: %u\n", irq);
+	
+	switch (irq) {
+	case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
+		crime_int = MACE_AUDIO_INT;
+		break;
+	case MACEISA_RTC_IRQ ... MACEISA_TIMER2_IRQ:
+		crime_int = MACE_MISC_INT;
+		break;
+	case MACEISA_PARALLEL_IRQ ... MACEISA_SERIAL2_RDMAOR_IRQ:
+		crime_int = MACE_SUPERIO_INT;
+		break;
+	}
+	DBG ("crime_int %016lx enabled\n", crime_int);
+	save_and_cli (flags);
+	crime_mask = crime_read_64 (CRIME_INT_MASK);
+	crime_mask |= crime_int;
+	crime_write_64 (CRIME_INT_MASK, crime_mask);
+	mace_mask = mace_read_32 (MACEISA_INT_MASK);
+	mace_mask |= 1 << (irq - 33);
+	mace_write_32 (MACEISA_INT_MASK, mace_mask);
+	restore_flags (flags);
+}
+
+static unsigned int startup_maceisa_irq (unsigned int irq) {
+	enable_maceisa_irq (irq);
+	return 0;
+}
+
+static void disable_maceisa_irq (unsigned int irq)
+{
+	u32 mace_mask;
+	unsigned long flags;
+
+	save_and_cli (flags);
+	mace_mask = mace_read_32 (MACEISA_INT_MASK);
+	mace_mask &= ~(1 << (irq - 33));
+	mace_write_32 (MACEISA_INT_MASK, mace_mask);
+	restore_flags (flags);
+}
+
+static void mask_and_ack_maceisa_irq (unsigned int irq)
+{
+	u32 mace_mask;
+	unsigned long flags;
+
+	switch (irq) {
+	case MACEISA_PARALLEL_IRQ:
+	case MACEISA_SERIAL1_TDMAPR_IRQ:
+	case MACEISA_SERIAL2_TDMAPR_IRQ:
+		save_and_cli (flags);
+		mace_mask = mace_read_32 (MACEISA_INT_STAT);
+		mace_mask &= ~(1 << (irq - 33));
+		mace_write_32 (MACEISA_INT_STAT, mace_mask);
+		restore_flags (flags);
+		break;
+	}
+	disable_maceisa_irq (irq);
+}
+
+static void end_maceisa_irq (unsigned irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_maceisa_irq (irq);
+}
+
+#define shutdown_maceisa_irq disable_maceisa_irq
+
+static struct hw_interrupt_type ip32_maceisa_interrupt = {
+	"IP32 MACE ISA",
+	startup_maceisa_irq,
+	shutdown_maceisa_irq,
+	enable_maceisa_irq,
+	disable_maceisa_irq,
+	mask_and_ack_maceisa_irq,
+	end_maceisa_irq,
+	NULL
+};
+
+/* This is used for regular non-ISA, non-PCI MACE interrupts.  That means
+ * bits 0-3 and 7 in the CRIME register.
+ */
+
+static void enable_mace_irq (unsigned int irq)
+{
+	u64 crime_mask;
+	unsigned long flags;
+
+	save_and_cli (flags);
+	crime_mask = crime_read_64 (CRIME_INT_MASK);
+	crime_mask |= 1 << (irq - 1);
+	crime_write_64 (CRIME_INT_MASK, crime_mask);
+	restore_flags (flags);
+}
+
+static unsigned int startup_mace_irq (unsigned int irq)
+{
+	enable_mace_irq (irq);
+	return 0;
+}
+
+static void disable_mace_irq (unsigned int irq)
+{
+	u64 crime_mask;
+	unsigned long flags;
+
+	save_and_cli (flags);
+	crime_mask = crime_read_64 (CRIME_INT_MASK);
+	crime_mask &= ~(1 << (irq - 1));
+	crime_write_64 (CRIME_INT_MASK, crime_mask);
+	restore_flags (flags);
+}
+
+static void end_mace_irq (unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_mace_irq (irq);
+}
+
+#define shutdown_mace_irq disable_mace_irq
+#define mask_and_ack_mace_irq disable_mace_irq
+
+static struct hw_interrupt_type ip32_mace_interrupt = {
+	"IP32 MACE",
+	startup_mace_irq,
+	shutdown_mace_irq,
+	enable_mace_irq,
+	disable_mace_irq,
+	mask_and_ack_mace_irq,
+	end_mace_irq,
+	NULL
+};
+
+static void ip32_unknown_interrupt (struct pt_regs *regs)
+{
+	u64 crime;
+	u32 mace;
+	
+	printk ("Unknown interrupt occurred!\n");
+	printk ("cp0_status: %08x\tcp0_cause: %08x\n",
+		read_32bit_cp0_register (CP0_STATUS),
+		read_32bit_cp0_register (CP0_CAUSE));
+	crime = crime_read_64 (CRIME_INT_MASK);
+	printk ("CRIME interrupt mask: %016lx\n", crime);
+	crime = crime_read_64 (CRIME_INT_STAT);
+	printk ("CRIME interrupt status: %016lx\n", crime);
+	crime = crime_read_64 (CRIME_HARD_INT);
+	printk ("CRIME hardware interrupt register: %016lx\n", crime);
+	mace = mace_read_32 (MACEISA_INT_MASK);
+	printk ("MACE ISA interrupt mask: %08x\n", mace);
+	mace = mace_read_32 (MACEISA_INT_STAT);
+	printk ("MACE ISA interrupt status: %08x\n", mace);
+	mace = mace_read_32 (MACEPCI_CONTROL);
+	printk ("MACE PCI control register: %08x\n", mace);
+
+	printk ("Register dump:\n");
+	show_regs (regs);
+
+	printk ("Please mail this report to linux-mips@oss.sgi.com\n");
+	printk ("Spinning...");
+	while (1) ;
+}
+
+void __init ip32_irq_init(void)
+{
+	unsigned int irq;
+	extern void init_generic_irq (void);
+	
+	/* Install our interrupt handler, then clear and disable all
+	 * CRIME and MACE interrupts.
+	 */
+	crime_write_64 (CRIME_INT_MASK, 0);
+	crime_write_64 (CRIME_HARD_INT, 0);
+	crime_write_64 (CRIME_SOFT_INT, 0);
+	mace_write_32 (MACEISA_INT_STAT, 0);
+	mace_write_32 (MACEISA_INT_MASK, 0);
+	set_except_vector(0, ip32_handle_int);
+
+	init_generic_irq ();
+
+	for (irq = 0; irq <= IP32_IRQ_MAX; irq++) {
+		hw_irq_controller *controller;
+
+		if (irq == CLOCK_IRQ)
+			controller = &ip32_cpu_interrupt;
+		else if (irq <= MACE_PCI_BRIDGE_IRQ && irq >= MACE_VID_IN1_IRQ)
+			controller = &ip32_mace_interrupt;
+		else if (irq <= MACEPCI_SHARED2_IRQ && irq >= MACEPCI_SCSI0_IRQ)
+			controller = &ip32_macepci_interrupt;
+		else if (irq <= CRIME_VICE_IRQ && irq >= CRIME_GBE0_IRQ)
+			controller = &ip32_crime_interrupt;
+		else
+			controller = &ip32_maceisa_interrupt;
+
+		irq_desc[irq].status = IRQ_DISABLED;
+		irq_desc[irq].action = 0;
+		irq_desc[irq].depth = 0;
+		irq_desc[irq].handler = controller;
+	}
+	setup_irq (CRIME_MEMERR_IRQ, &memerr_irq);
+	setup_irq (CRIME_CPUERR_IRQ, &cpuerr_irq);
+}
+
+/* CRIME 1.1 appears to deliver all interrupts to this one pin. */
+void ip32_irq0 (struct pt_regs *regs)
+{
+	u64 crime_int = crime_read_64 (CRIME_INT_STAT);
+	int irq = 0;
+	
+	if (crime_int & CRIME_MACE_INT_MASK) {
+		crime_int &= CRIME_MACE_INT_MASK;
+		irq = ffs (crime_int);
+	} else if (crime_int & CRIME_MACEISA_INT_MASK) {
+		u32 mace_int;
+		mace_int = mace_read_32 (MACEISA_INT_STAT);
+		if (mace_int == 0)
+			irq = 0;
+		else
+			irq = ffs (mace_int) + 32;
+	} else if (crime_int & CRIME_MACEPCI_INT_MASK) {
+		crime_int &= CRIME_MACEPCI_INT_MASK;
+		crime_int >>= 8;
+		irq = ffs (crime_int) + 8;
+	} else if (crime_int & 0xffff0000) {
+		crime_int >>= 16;
+		irq = ffs (crime_int) + 16;
+	}
+	if (irq == 0)
+		ip32_unknown_interrupt (regs);
+	DBG ("*irq %u*\n", irq);
+	do_IRQ (irq, regs);
+}
+
+void ip32_irq1 (struct pt_regs *regs)
+{
+	ip32_unknown_interrupt (regs);
+}
+
+void ip32_irq2 (struct pt_regs *regs)
+{
+	ip32_unknown_interrupt (regs);
+}
+
+void ip32_irq3 (struct pt_regs *regs)
+{
+	ip32_unknown_interrupt (regs);
+}
+
+void ip32_irq4 (struct pt_regs *regs)
+{
+	ip32_unknown_interrupt (regs);
+}
+
+void ip32_irq5 (struct pt_regs *regs)
+{
+	do_IRQ (CLOCK_IRQ, regs);
+}
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-pci-dma.c linux/arch/mips64/sgi-ip32/ip32-pci-dma.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-pci-dma.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/ip32-pci-dma.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,41 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000  Ani Joshi <ajoshi@unixbox.com>
+ * Copyright (C) 2000  Ralf Baechle <ralf@gnu.org>
+ * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
+ */
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/string.h>
+#include <linux/pci.h>
+
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/ip32/mace.h>
+
+void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
+			   dma_addr_t * dma_handle)
+{
+	void *ret;
+	int gfp = GFP_ATOMIC;
+
+	if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
+		gfp |= GFP_DMA;
+	ret = (void *) __get_free_pages(gfp, get_order(size));
+
+	if (ret != NULL) {
+		memset(ret, 0, size);
+		dma_cache_wback_inv((unsigned long) ret, size);
+		*dma_handle = virt_to_bus(ret);
+	}
+	return ret;
+}
+
+void pci_free_consistent(struct pci_dev *hwdev, size_t size,
+			 void *vaddr, dma_addr_t dma_handle)
+{
+	free_pages((unsigned long) vaddr, get_order(size));
+}
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-pci.c linux/arch/mips64/sgi-ip32/ip32-pci.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-pci.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/ip32-pci.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,438 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000, 2001 Keith M Wesolowski
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/types.h>
+#include <asm/pci.h>
+#include <asm/ip32/mace.h>
+#include <asm/ip32/crime.h>
+#include <asm/ip32/ip32_ints.h>
+#include <linux/delay.h>
+
+#undef DEBUG_MACE_PCI
+
+/*
+ * O2 has up to 5 PCI devices connected into the MACE bridge.  The device
+ * map looks like this:
+ *
+ * 0  aic7xxx 0
+ * 1  aic7xxx 1
+ * 2  expansion slot
+ * 3  N/C
+ * 4  N/C
+ */
+
+#define chkslot(dev)							\
+do {									\
+	if ((dev)->bus->number > 0 || PCI_SLOT ((dev)->devfn) < 1	\
+	    || PCI_SLOT ((dev)->devfn) > 3)				\
+		return PCIBIOS_DEVICE_NOT_FOUND;			\
+} while (0)
+		
+#define mkaddr(dev, where) \
+((((dev)->devfn & 0xffUL) << 8) | ((where) & 0xfcUL))
+
+void macepci_error (int irq, void *dev, struct pt_regs *regs);
+
+static int macepci_read_config_byte (struct pci_dev *dev, int where,
+				     u8 *val)
+{
+	*val = 0xff;
+	chkslot (dev);
+	mace_write_32 (MACEPCI_CONFIG_ADDR, mkaddr (dev, where));
+	*val = mace_read_8 (MACEPCI_CONFIG_DATA + ((where & 3UL) ^ 3UL));
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int macepci_read_config_word (struct pci_dev *dev, int where,
+				     u16 *val)
+{
+	*val = 0xffff;
+	chkslot (dev);
+	if (where & 1)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+ 	mace_write_32 (MACEPCI_CONFIG_ADDR, mkaddr (dev, where));
+	*val = mace_read_16 (MACEPCI_CONFIG_DATA + ((where & 2UL) ^ 2UL));
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int macepci_read_config_dword (struct pci_dev *dev, int where,
+				      u32 *val)
+{
+	*val = 0xffffffff;
+	chkslot (dev);
+	if (where & 3)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+	mace_write_32 (MACEPCI_CONFIG_ADDR, mkaddr (dev, where));
+	*val = mace_read_32 (MACEPCI_CONFIG_DATA);
+	
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int macepci_write_config_byte (struct pci_dev *dev, int where,
+				      u8 val)
+{
+	chkslot (dev);
+	mace_write_32 (MACEPCI_CONFIG_ADDR, mkaddr (dev, where));
+	mace_write_8 (MACEPCI_CONFIG_DATA + ((where & 3UL) ^ 3UL), val);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int macepci_write_config_word (struct pci_dev *dev, int where,
+				      u16 val)
+{
+	chkslot (dev);
+	if (where & 1)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+	mace_write_32 (MACEPCI_CONFIG_ADDR, mkaddr (dev, where));
+	mace_write_16 (MACEPCI_CONFIG_DATA + ((where & 2UL) ^ 2UL), val);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int macepci_write_config_dword (struct pci_dev *dev, int where,
+                                          u32 val)
+{
+	chkslot (dev);
+	if (where & 3)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+	mace_write_32 (MACEPCI_CONFIG_ADDR, mkaddr (dev, where));
+	mace_write_32 (MACEPCI_CONFIG_DATA, val);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops macepci_ops = {
+	macepci_read_config_byte,
+	macepci_read_config_word,
+	macepci_read_config_dword,
+	macepci_write_config_byte,
+	macepci_write_config_word,
+	macepci_write_config_dword
+};
+
+struct pci_fixup pcibios_fixups[] = { { 0 } };
+
+void __init pcibios_init (void)
+{
+	struct pci_dev *dev;
+	u32 start, size;
+	u16 cmd;
+	u32 base_io = 0x3000; /* The first i/o address to assign after SCSI */
+	u32 base_mem = 0x80100000; /* Likewise */
+	u32 rev = mace_read_32 (MACEPCI_REV);
+	int i;
+
+	printk ("MACE: PCI rev %d detected at %016lx\n", rev,
+		(u64) MACE_BASE + MACE_PCI);
+
+	/* These are *bus* addresses */
+	ioport_resource.start = 0;
+	ioport_resource.end = 0xffffffffUL;
+	iomem_resource.start = 0x80000000UL;
+	iomem_resource.end = 0xffffffffUL;
+
+	/* Clear any outstanding errors and enable interrupts */
+	mace_write_32 (MACEPCI_ERROR_ADDR, 0);
+	mace_write_32 (MACEPCI_ERROR_FLAGS, 0);
+	mace_write_32 (MACEPCI_CONTROL, 0xff008500);
+	crime_write_64 (CRIME_HARD_INT, 0UL);
+	crime_write_64 (CRIME_SOFT_INT, 0UL);
+	crime_write_64 (CRIME_INT_STAT, 0x000000000000ff00UL);
+
+	if (request_irq (MACE_PCI_BRIDGE_IRQ, macepci_error, 0,
+			 "MACE PCI error", NULL))
+		panic ("PCI bridge can't get interrupt; can't happen.\n");
+
+	pci_scan_bus (0, &macepci_ops, NULL);
+
+#ifdef DEBUG_MACE_PCI
+	pci_for_each_dev (dev) {
+		printk ("Device: %d/%d/%d ARCS-assigned bus resource map\n",
+			dev->bus->number, PCI_SLOT (dev->devfn),
+			PCI_FUNC (dev->devfn));
+		for (i=0; i < DEVICE_COUNT_RESOURCE; i++) {
+			if (dev->resource[i].start == 0)
+				continue;
+			printk ("%d: %016lx - %016lx (flags %04lx)\n",
+				i, dev->resource[i].start,
+				dev->resource[i].end, dev->resource[i].flags);
+		}
+	}
+#endif
+	/*
+	 * Assign sane resources to and enable all devices.  The requirement
+	 * for the SCSI controllers is well-known: a 256-byte I/O region
+	 * which we must assign, and a 1-page memory region which is
+	 * assigned by the system firmware.
+	 */
+	pci_for_each_dev (dev) {
+		switch (PCI_SLOT (dev->devfn)) {
+		case 1: /* SCSI bus 0 */
+			dev->resource[0].start = 0x1000UL;
+			dev->resource[0].end = 0x10ffUL;
+			break;
+		case 2: /* SCSI bus 1 */
+			dev->resource[0].start = 0x2000UL;
+			dev->resource[0].end = 0x20ffUL;
+			break;
+		default: /* Slots - I guess we have only 1 */
+			for (i=0; i < 6; i++) {
+				size = dev->resource[i].end
+					- dev->resource[i].start;
+				if (!size
+				    || !(dev->resource[i].flags
+					 & (IORESOURCE_IO|IORESOURCE_MEM))) {
+					dev->resource[i].start
+						= dev->resource[i].end = 0UL;
+					continue;
+				}
+				if (dev->resource[i].flags & IORESOURCE_IO) {
+					dev->resource[i].start = base_io;
+					base_io += PAGE_ALIGN (size);
+				} else {
+					dev->resource[i].start = base_mem;
+					base_mem += 0x100000UL;
+				}
+				dev->resource[i].end =
+					dev->resource[i].start + size;
+			}
+			break;
+		}
+		for (i=0; i < 6; i++) {
+			if (dev->resource[i].start == 0)
+				continue;
+			start = dev->resource[i].start;
+			if (dev->resource[i].flags & IORESOURCE_IO)
+				start |= 1;
+			pci_write_config_dword (dev, 
+				PCI_BASE_ADDRESS_0 + (i << 2), (u32) start);
+		}
+		pci_write_config_byte (dev, PCI_CACHE_LINE_SIZE, 0x20);
+		pci_write_config_byte (dev, PCI_LATENCY_TIMER, 0x30);
+		pci_read_config_word (dev, PCI_COMMAND, &cmd);
+		cmd |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_PARITY);
+		pci_write_config_word (dev, PCI_COMMAND, cmd);
+		pci_set_master (dev);
+	}
+
+#ifdef DEBUG_MACE_PCI
+	printk ("Triggering PCI bridge interrupt...\n");
+	mace_write_32 (MACEPCI_ERROR_FLAGS, MACEPCI_ERROR_INTERRUPT_TEST);
+
+	pci_for_each_dev (dev) {
+		printk ("Device: %d/%d/%d final bus resource map\n",
+			dev->bus->number, PCI_SLOT (dev->devfn),
+			PCI_FUNC (dev->devfn));
+		for (i=0; i < DEVICE_COUNT_RESOURCE; i++) {
+			if (dev->resource[i].start == 0)
+				continue;
+			printk ("%d: %016lx - %016lx (flags %04lx)\n",
+				i, dev->resource[i].start,
+				dev->resource[i].end, dev->resource[i].flags);
+		}
+	}
+#endif
+}
+
+/*
+ * Given a PCI slot number (a la PCI_SLOT(...)) and the interrupt pin of
+ * the device (1-4 => A-D), tell what irq to use.  Note that we don't
+ * in theory have slots 4 and 5, and we never normally use the shared
+ * irqs.  I suppose a device without a pin A will thank us for doing it
+ * right if there exists such a broken piece of crap.
+ */
+static int __init macepci_map_irq (struct pci_dev *dev, u8 slot, u8 pin)
+{
+	chkslot (dev);
+	if (pin == 0)
+		pin = 1;
+	switch (slot) {
+	case 1:
+		return MACEPCI_SCSI0_IRQ;
+	case 2:
+		return MACEPCI_SCSI1_IRQ;
+	case 3:
+		switch (pin) {
+		case 2:
+			return MACEPCI_SHARED0_IRQ;
+		case 3:
+			return MACEPCI_SHARED1_IRQ;
+		case 4:
+			return MACEPCI_SHARED2_IRQ;
+		case 1:
+		default:
+			return MACEPCI_SLOT0_IRQ;
+		}
+	case 4:
+		switch (pin) {
+		case 2:
+			return MACEPCI_SHARED2_IRQ;
+		case 3:
+			return MACEPCI_SHARED0_IRQ;
+		case 4:
+			return MACEPCI_SHARED1_IRQ;
+		case 1:
+		default:
+			return MACEPCI_SLOT1_IRQ;
+		}
+		return MACEPCI_SLOT1_IRQ;
+	case 5:
+		switch (pin) {
+		case 2:
+			return MACEPCI_SHARED1_IRQ;
+		case 3:
+			return MACEPCI_SHARED2_IRQ;
+		case 4:
+			return MACEPCI_SHARED0_IRQ;
+		case 1:
+		default:
+			return MACEPCI_SLOT2_IRQ;
+		}
+	default:
+		return 0;
+	}
+}
+
+/*
+ * It's not entirely clear what this does in a system with no bridges.
+ * In any case, bridges are not supported by Linux in O2.
+ */
+static u8 __init macepci_swizzle (struct pci_dev *dev, u8 *pinp)
+{
+	if (PCI_SLOT (dev->devfn) == 2)
+		*pinp = 2;
+	else
+		*pinp = 1;
+	return PCI_SLOT (dev->devfn);
+}
+
+/* All devices are enabled during initialization. */
+int pcibios_enable_device (struct pci_dev *dev)
+{
+	return PCIBIOS_SUCCESSFUL;
+}
+
+char * __init pcibios_setup (char *str)
+{
+	return str;
+}
+
+void __init pcibios_align_resource (void *data, struct resource *res,
+				    unsigned long size)
+{
+}
+
+void __init pcibios_update_resource (struct pci_dev *dev, struct resource *root,
+				     struct resource *res, int resource)
+{
+}
+
+void __init pcibios_update_irq (struct pci_dev *dev, int irq)
+{
+	pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
+}
+
+void __init pcibios_fixup_bus (struct pci_bus *b)
+{
+	pci_fixup_irqs (macepci_swizzle, macepci_map_irq);
+}
+
+/* XXX anybody know what this is supposed to do? */
+void __init pcibios_fixup_pbus_ranges(struct pci_bus * bus,
+				      struct pbus_set_ranges_data * ranges)
+{
+	ranges->io_start -= bus->resource[0]->start;
+	ranges->io_end -= bus->resource[0]->start;
+	ranges->mem_start -= bus->resource[1]->start;
+	ranges->mem_end -= bus->resource[1]->start;
+}
+
+/*
+ * Handle errors from the bridge.  This includes master and target aborts,
+ * various command and address errors, and the interrupt test.  This gets
+ * registered on the bridge error irq.  It's conceivable that some of these
+ * conditions warrant a panic.  Anybody care to say which ones?
+ */
+void macepci_error (int irq, void *dev, struct pt_regs *regs) {
+	u32 flags, error_addr;
+	char space;
+
+	flags = mace_read_32 (MACEPCI_ERROR_FLAGS);
+	error_addr = mace_read_32 (MACEPCI_ERROR_ADDR);
+
+	if (flags & MACEPCI_ERROR_MEMORY_ADDR)
+		space = 'M';
+	else if (flags & MACEPCI_ERROR_CONFIG_ADDR)
+		space = 'C';
+	else space = 'X';
+	
+	if (flags & MACEPCI_ERROR_MASTER_ABORT) {
+		printk ("MACEPCI: Master abort at 0x%08x (%c)\n", error_addr,
+			space);
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_MASTER_ABORT);
+	}
+	if (flags & MACEPCI_ERROR_TARGET_ABORT) {
+		printk ("MACEPCI: Target abort at 0x%08x (%c)\n", error_addr,
+			space);
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_TARGET_ABORT);
+	}
+	if (flags & MACEPCI_ERROR_DATA_PARITY_ERR) {
+		printk ("MACEPCI: Data parity error at 0x%08x (%c)\n",
+			error_addr, space);
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_DATA_PARITY_ERR);
+	}
+	if (flags & MACEPCI_ERROR_RETRY_ERR) {
+		printk ("MACEPCI: Retry error at 0x%08x (%c)\n", error_addr,
+			space);
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_RETRY_ERR);
+	}
+	if (flags & MACEPCI_ERROR_ILLEGAL_CMD) {
+		printk ("MACEPCI: Illegal command at 0x%08x (%c)\n",
+			error_addr, space);
+		mace_write_32 (MACEPCI_ERROR_FLAGS,
+			       flags & ~MACEPCI_ERROR_ILLEGAL_CMD);
+	}
+	if (flags & MACEPCI_ERROR_SYSTEM_ERR) {
+		printk ("MACEPCI: System error at 0x%08x (%c)\n",
+			error_addr, space);
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_SYSTEM_ERR);
+	}
+	if (flags & MACEPCI_ERROR_PARITY_ERR) {
+		printk ("MACEPCI: Parity error at 0x%08x (%c)\n", error_addr,
+			space);
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_PARITY_ERR);
+	}
+	if (flags & MACEPCI_ERROR_OVERRUN) {
+		printk ("MACEPCI: Overrun error at 0x%08x (%c)\n",
+			error_addr, space);
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_OVERRUN);
+	}
+	if (flags & MACEPCI_ERROR_SIG_TABORT) {
+		printk ("MACEPCI: Signaled target abort (clearing)\n");
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_SIG_TABORT);
+	}
+	if (flags & MACEPCI_ERROR_INTERRUPT_TEST) {
+		printk ("MACEPCI: Interrupt test triggered (clearing)\n");
+		mace_write_32 (MACEPCI_ERROR_FLAGS, flags
+			       & ~MACEPCI_ERROR_INTERRUPT_TEST);
+	}
+}
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-rtc.c linux/arch/mips64/sgi-ip32/ip32-rtc.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-rtc.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/ip32-rtc.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,32 @@
+/*
+ * RTC routines for IP32 style attached Dallas chip.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Harald Koerfgen
+ */
+#include <linux/mc146818rtc.h>
+#include <asm/ip32/mace.h>
+
+static unsigned char ip32_rtc_read_data(unsigned long addr)
+{
+	return (unsigned char) mace_read_8 (MACEISA_RTC_BASE + (addr << 8));
+}
+
+static void ip32_rtc_write_data(unsigned char data, unsigned long addr)
+{
+	mace_write_8 (MACEISA_RTC_BASE + (addr << 8), data);
+}
+
+static int ip32_rtc_bcd_mode(void)
+{
+	return 0;
+}
+
+struct rtc_ops ip32_rtc_ops = {
+	&ip32_rtc_read_data,
+	&ip32_rtc_write_data,
+	&ip32_rtc_bcd_mode
+};
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-setup.c linux/arch/mips64/sgi-ip32/ip32-setup.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-setup.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/ip32-setup.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,62 @@
+/*
+ * IP32 basic setup
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Harald Koerfgen
+ */
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/mc146818rtc.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mmu_context.h>
+#include <asm/ip32/crime.h>
+#include <asm/ip32/mace.h>
+#include <asm/ip32/ip32_ints.h>
+#include <asm/sgialib.h>
+
+extern struct rtc_ops ip32_rtc_ops;
+extern u32 cc_interval;
+
+void __init ip32_init (int argc, char **argv, char **envp) {
+	arc_meminit ();
+}
+
+void __init ip32_setup(void)
+{
+#ifdef CONFIG_SERIAL_CONSOLE
+	char *ctype;
+#endif
+	TLBMISS_HANDLER_SETUP ();
+
+#ifdef CONFIG_SERIAL_CONSOLE
+	ctype = ArcGetEnvironmentVariable("console");
+	if (*ctype == 'd') {
+		if (ctype[1] == '2')
+			console_setup ("ttyS1");
+		else
+			console_setup ("ttyS0");
+	}
+#endif
+
+#ifdef CONFIG_VT
+	conswitchp = &dummy_con;
+#endif
+
+	rtc_ops = &ip32_rtc_ops;
+
+	crime_init ();
+}
+
+int __init page_is_ram (unsigned long pagenr)
+{
+	/* XXX: to do? */
+	return 1;
+}
diff -urN linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-timer.c linux/arch/mips64/sgi-ip32/ip32-timer.c
--- linux-2.4.10-pre6/arch/mips64/sgi-ip32/ip32-timer.c	Wed Dec 31 16:00:00 1969
+++ linux/arch/mips64/sgi-ip32/ip32-timer.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,47 @@
+/*
+ * IP32 timer calibration
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 Keith M Wesolowski
+ */
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/mipsregs.h>
+#include <asm/param.h>
+#include <asm/ip32/crime.h>
+#include <asm/ip32/ip32_ints.h>
+
+extern u32 cc_interval;
+
+/* An arbitrary time; this can be decreased if reliability looks good */
+#define WAIT_MS 10
+#define PER_MHZ (1000000 / 2 / HZ)
+
+void __init ip32_timer_setup (struct irqaction *irq) {
+	u64 crime_time;
+	u32 cc_tick;
+
+	printk("Calibrating system timer... ");
+
+	crime_time = crime_read_64 (CRIME_TIME) & CRIME_TIME_MASK;
+	cc_tick = read_32bit_cp0_register (CP0_COUNT);
+
+	while ((crime_read_64 (CRIME_TIME) & CRIME_TIME_MASK) - crime_time 
+		< WAIT_MS * 1000000 / CRIME_NS_PER_TICK)
+		;
+	cc_tick = read_32bit_cp0_register (CP0_COUNT) - cc_tick;
+	cc_interval = cc_tick / HZ * (1000 / WAIT_MS);
+	/* The round-off seems unnecessary; in testing, the error of the
+	 * above procedure is < 100 ticks, which means it gets filtered
+	 * out by the HZ adjustment. 
+	 */
+	cc_interval = (cc_interval / PER_MHZ) * PER_MHZ;
+
+	printk("%d MHz CPU detected\n", (int) (cc_interval / PER_MHZ));
+
+	setup_irq (CLOCK_IRQ, irq);
+}
diff -urN linux-2.4.10-pre6/drivers/acorn/block/mfmhd.c linux/drivers/acorn/block/mfmhd.c
--- linux-2.4.10-pre6/drivers/acorn/block/mfmhd.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/acorn/block/mfmhd.c	Mon Dec  3 23:08:46 2001
@@ -1311,15 +1311,13 @@
 }
 
 static struct gendisk mfm_gendisk = {
-	MAJOR_NR,		/* Major number */
-	"mfm",			/* Major name */
-	6,			/* Bits to shift to get real from partition */
-	1 << 6,			/* Number of partitions per real */
-	mfm,			/* hd struct */
-	mfm_sizes,		/* block sizes */
-	0,			/* number */
-	(void *) mfm_info,	/* internal */
-	NULL			/* next */
+	major:		MAJOR_NR,
+	major_name:	"mfm",
+	minor_shift:	6,
+	max_p:		1 << 6,
+	part:		mfm,
+	sizes:		mfm_sizes,
+	real_devices:	(void *)mfm_info,
 };
 
 static struct block_device_operations mfm_fops =
diff -urN linux-2.4.10-pre6/drivers/block/DAC960.c linux/drivers/block/DAC960.c
--- linux-2.4.10-pre6/drivers/block/DAC960.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/block/DAC960.c	Mon Dec  3 23:08:46 2001
@@ -1883,7 +1883,6 @@
 static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
 {
   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
-  GenericDiskInfo_T *GenericDiskInfo;
   RequestQueue_T *RequestQueue;
   int MinorNumber;
   /*
diff -urN linux-2.4.10-pre6/drivers/block/Makefile linux/drivers/block/Makefile
--- linux-2.4.10-pre6/drivers/block/Makefile	Fri Dec 29 14:07:21 2000
+++ linux/drivers/block/Makefile	Mon Dec  3 23:08:46 2001
@@ -10,7 +10,7 @@
 
 O_TARGET := block.o
 
-export-objs	:= ll_rw_blk.o blkpg.o loop.o DAC960.o
+export-objs	:= ll_rw_blk.o blkpg.o loop.o DAC960.o genhd.o
 
 obj-y	:= ll_rw_blk.o blkpg.o genhd.o elevator.o
 
diff -urN linux-2.4.10-pre6/drivers/block/acsi.c linux/drivers/block/acsi.c
--- linux-2.4.10-pre6/drivers/block/acsi.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/block/acsi.c	Mon Dec  3 23:08:46 2001
@@ -1386,16 +1386,14 @@
 extern struct block_device_operations acsi_fops;
 
 static struct gendisk acsi_gendisk = {
-	MAJOR_NR,		/* Major number */	
-	"ad",			/* Major name */
-	4,			/* Bits to shift to get real from partition */
-	1 << 4,			/* Number of partitions per real */
-	acsi_part,		/* hd struct */
-	acsi_sizes,		/* block sizes */
-	0,			/* number */
-	(void *)acsi_info,	/* internal */
-	NULL,			/* next */
-	&acsi_fops,		/* file operations */
+	major:		MAJOR_NR,
+	major_name:	"ad",
+	minor_shift:	4,
+	max_p:		1 << 4,
+	part:		acsi_part,
+	sizes:		acsi_sizes,
+	real_devices:	(void *)acsi_info,
+	fops:		&acsi_fops,
 };
 	
 #define MAX_SCSI_DEVICE_CODE 10
diff -urN linux-2.4.10-pre6/drivers/block/genhd.c linux/drivers/block/genhd.c
--- linux-2.4.10-pre6/drivers/block/genhd.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/block/genhd.c	Mon Dec  3 23:08:46 2001
@@ -10,47 +10,101 @@
  *  (linux@arm.uk.linux.org)
  */
 
+/*
+ * TODO:  rip out the remaining init crap from this file  --hch
+ */
+
 #include <linux/config.h>
+#include <linux/module.h>
 #include <linux/fs.h>
 #include <linux/genhd.h>
 #include <linux/kernel.h>
 #include <linux/blk.h>
 #include <linux/init.h>
+#include <linux/spinlock.h>
+
+
+static rwlock_t gendisk_lock;
 
+/*
+ * Global kernel list of partitioning information.
+ *
+ * XXX: you should _never_ access this directly.
+ *	the only reason this is exported is source compatiblity.
+ */
+/*static*/ struct gendisk *gendisk_head;
 
-struct gendisk *gendisk_head;
+EXPORT_SYMBOL(gendisk_head);
 
+
+/**
+ * add_gendisk - add partitioning information to kernel list
+ * @gp: per-device partitioning information
+ *
+ * This function registers the partitioning information in @gp
+ * with the kernel.
+ */
 void
 add_gendisk(struct gendisk *gp)
 {
+	write_lock(&gendisk_lock);
 	gp->next = gendisk_head;
 	gendisk_head = gp;
+	write_unlock(&gendisk_lock);
 }
 
+EXPORT_SYMBOL(add_gendisk);
+
+
+/**
+ * del_gendisk - remove partitioning information from kernel list
+ * @gp: per-device partitioning information
+ *
+ * This function unregisters the partitioning information in @gp
+ * with the kernel.
+ */
 void
 del_gendisk(struct gendisk *gp)
 {
 	struct gendisk **gpp;
 
+	write_lock(&gendisk_lock);
 	for (gpp = &gendisk_head; *gpp; gpp = &((*gpp)->next))
 		if (*gpp == gp)
 			break;
 	if (*gpp)
 		*gpp = (*gpp)->next;
+	write_unlock(&gendisk_lock);
 }
 
+EXPORT_SYMBOL(del_gendisk);
+
+
+/**
+ * get_gendisk - get partitioning information for a given device
+ * @dev: device to get partitioning information for
+ *
+ * This function gets the structure containing partitioning
+ * information for the given device @dev.
+ */
 struct gendisk *
 get_gendisk(kdev_t dev)
 {
 	struct gendisk *gp = NULL;
 	int maj = MAJOR(dev);
 
+	read_lock(&gendisk_lock);
 	for (gp = gendisk_head; gp; gp = gp->next)
 		if (gp->major == maj)
-			return gp;
-	return NULL;
+			break;
+	read_unlock(&gendisk_lock);
+
+	return gp;
 }
 
+EXPORT_SYMBOL(get_gendisk);
+
+
 #ifdef CONFIG_PROC_FS
 int
 get_partition_list(char *page, char **start, off_t offset, int count)
@@ -60,6 +114,7 @@
 	int len, n;
 
 	len = sprintf(page, "major minor  #blocks  name\n\n");
+	read_lock(&gendisk_lock);
 	for (gp = gendisk_head; gp; gp = gp->next) {
 		for (n = 0; n < (gp->nr_real << gp->minor_shift); n++) {
 			if (gp->part[n].nr_sects == 0)
@@ -77,6 +132,7 @@
 	}
 
 out:
+	read_unlock(&gendisk_lock);
 	*start = page + offset;
 	len -= offset;
 	if (len < 0)
@@ -102,6 +158,7 @@
 
 int __init device_init(void)
 {
+	rwlock_init(&gendisk_lock);
 	blk_dev_init();
 	sti();
 #ifdef CONFIG_I2O
diff -urN linux-2.4.10-pre6/drivers/block/paride/pd.c linux/drivers/block/paride/pd.c
--- linux-2.4.10-pre6/drivers/block/paride/pd.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/block/paride/pd.c	Mon Dec  3 23:08:46 2001
@@ -343,16 +343,13 @@
 extern struct block_device_operations pd_fops;
 
 static struct gendisk pd_gendisk = {
-        PD_MAJOR,       /* Major number */
-        PD_NAME,        /* Major name */
-        PD_BITS,        /* Bits to shift to get real from partition */
-        PD_PARTNS,      /* Number of partitions per real */
-        pd_hd,          /* hd struct */
-        pd_sizes,       /* block sizes */
-        0,              /* number */
-        NULL,           /* internal */
-        NULL,           /* next */
-	&pd_fops,       /* block device operations */
+	major:		PD_MAJOR,
+	major_name:	PD_NAME,
+	minor_shift:	PD_BITS,
+	max_p:		PD_PARTNS,
+	part:		pd_hd,
+	sizes:		pd_sizes,
+	fops:		&pd_fops,
 };
 
 static struct block_device_operations pd_fops = {
diff -urN linux-2.4.10-pre6/drivers/block/ps2esdi.c linux/drivers/block/ps2esdi.c
--- linux-2.4.10-pre6/drivers/block/ps2esdi.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/block/ps2esdi.c	Mon Dec  3 23:08:46 2001
@@ -157,16 +157,14 @@
 
 static struct gendisk ps2esdi_gendisk =
 {
-	MAJOR_NR,		/* Major number */
-	"ed",			/* Major name */
-	6,			/* Bits to shift to get real from partition */
-	1 << 6,			/* Number of partitions per real disk */
-	ps2esdi,		/* hd struct */
-	ps2esdi_sizes,		/* block sizes */
-	0,			/* number */
-	(void *) ps2esdi_info,	/* internal */
-	NULL,			/* next */
-	&ps2esdi_fops,          /* file operations */
+	major:		MAJOR_NR,
+	major_name:	"ed",
+	minor_shift:	6,
+	max_p:		1 << 6,
+	part:		ps2esdi,
+	sizes:		ps2esdi_sizes,
+	real_devices:	(void *)ps2esdi_info,
+	fops:		&ps2esdi_fops,
 };
 
 /* initialization routine called by ll_rw_blk.c   */
@@ -222,14 +220,13 @@
 void
 cleanup_module(void)
 {
-	if(ps2esdi_slot)
-	{
+	if(ps2esdi_slot) {
 		mca_mark_as_unused(ps2esdi_slot);
 		mca_set_adapter_procfn(ps2esdi_slot, NULL, NULL);
 	}
 	release_region(io_base, 4);
 	free_dma(dma_arb_level);
-  	free_irq(PS2ESDI_IRQ, NULL)
+  	free_irq(PS2ESDI_IRQ, NULL);
 	devfs_unregister_blkdev(MAJOR_NR, "ed");
 	del_gendisk(&ps2esdi_gendisk);
 	blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR));
diff -urN linux-2.4.10-pre6/drivers/block/rd.c linux/drivers/block/rd.c
--- linux-2.4.10-pre6/drivers/block/rd.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/block/rd.c	Mon Dec  3 23:08:46 2001
@@ -259,7 +259,7 @@
 			/* special: we want to release the ramdisk memory,
 			   it's not like with the other blockdevices where
 			   this ioctl only flushes away the buffer cache. */
-			if ((atomic_read(rd_bdev[minor]->bd_openers) > 2))
+			if ((atomic_read(&rd_bdev[minor]->bd_openers) > 2))
 				return -EBUSY;
 			destroy_buffers(inode->i_rdev);
 			rd_blocksizes[minor] = 0;
@@ -372,7 +372,7 @@
 		struct block_device *bdev = rd_bdev[i];
 		rd_bdev[i] = NULL;
 		if (bdev) {
-			blkdev_put(bdev);
+			blkdev_put(bdev, BDEV_FILE);
 			bdput(bdev);
 		}
 		destroy_buffers(MKDEV(MAJOR_NR, i));
diff -urN linux-2.4.10-pre6/drivers/block/xd.c linux/drivers/block/xd.c
--- linux-2.4.10-pre6/drivers/block/xd.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/block/xd.c	Mon Dec  3 23:08:46 2001
@@ -126,17 +126,16 @@
 extern struct block_device_operations xd_fops;
 
 static struct gendisk xd_gendisk = {
-	MAJOR_NR,	/* Major number */
-	"xd",		/* Major name */
-	6,		/* Bits to shift to get real from partition */
-	1 << 6,		/* Number of partitions per real */
-	xd_struct,	/* hd struct */
-	xd_sizes,	/* block sizes */
-	0,		/* number */
-	(void *) xd_info,	/* internal */
-	NULL,		/* next */
-	&xd_fops,	/* file operations */
+	major:		MAJOR_NR,
+	major_name:	"xd",
+	minor_shift:	6,
+	max_p:		1 << 6,
+	part:		xd_struct,
+	sizes:		xd_sizes,
+	real_devices:	(void *)xd_info,
+	fops:		&xd_fops,
 };
+
 static struct block_device_operations xd_fops = {
 	open:		xd_open,
 	release:	xd_release,
diff -urN linux-2.4.10-pre6/drivers/cdrom/aztcd.c linux/drivers/cdrom/aztcd.c
--- linux-2.4.10-pre6/drivers/cdrom/aztcd.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/cdrom/aztcd.c	Mon Dec  3 23:08:46 2001
@@ -167,7 +167,7 @@
 
 #include <linux/version.h>
 
-#define MAJOR_NR AZTECH_CDROM_MAJOR 
+#define MAJOR_NR AZTECH_CDROM_MAJOR
 
 #include <linux/blk.h>
 #include "aztcd.h"
@@ -191,7 +191,7 @@
 #include <asm/io.h>
 
 #include <asm/uaccess.h>
-static int aztcd_blocksizes[1] = {2048};
+static int aztcd_blocksizes[1] = { 2048 };
 
 
 /*###########################################################################
@@ -200,7 +200,7 @@
 */
 #define SET_TIMER(func, jifs)   delay_timer.expires = jiffies + (jifs); \
                                 delay_timer.function = (void *) (func); \
-                                add_timer(&delay_timer); 
+                                add_timer(&delay_timer);
 
 #define CLEAR_TIMER             del_timer(&delay_timer);
 
@@ -213,17 +213,17 @@
 #define SWITCH_IDE_SLAVE  outb_p(0xa0,azt_port+6); \
 	                  outb_p(0x10,azt_port+6); \
 	                  outb_p(0x00,azt_port+7); \
-	                  outb_p(0x10,azt_port+6); 
+	                  outb_p(0x10,azt_port+6);
 #define SWITCH_IDE_MASTER outb_p(0xa0,azt_port+6);
 
 
 #if 0
 #define AZT_TEST
-#define AZT_TEST1 /* <int-..> */
-#define AZT_TEST2 /* do_aztcd_request */
-#define AZT_TEST3 /* AZT_S_state */
-#define AZT_TEST4 /* QUICK_LOOP-counter */
-#define AZT_TEST5 /* port(1) state */
+#define AZT_TEST1		/* <int-..> */
+#define AZT_TEST2		/* do_aztcd_request */
+#define AZT_TEST3		/* AZT_S_state */
+#define AZT_TEST4		/* QUICK_LOOP-counter */
+#define AZT_TEST5		/* port(1) state */
 #define AZT_DEBUG
 #define AZT_DEBUG_MULTISESSION
 #endif
@@ -237,25 +237,23 @@
 
 #define READ_TIMEOUT 3000
 
-#define azt_port aztcd  /*needed for the modutils*/
+#define azt_port aztcd		/*needed for the modutils */
 
 /*##########################################################################
   Type Definitions
   ##########################################################################
 */
-enum azt_state_e 
-{ AZT_S_IDLE,    /* 0 */
-  AZT_S_START,   /* 1 */
-  AZT_S_MODE,    /* 2 */
-  AZT_S_READ,    /* 3 */
-  AZT_S_DATA,    /* 4 */
-  AZT_S_STOP,    /* 5 */
-  AZT_S_STOPPING /* 6 */
+enum azt_state_e { AZT_S_IDLE,	/* 0 */
+	AZT_S_START,		/* 1 */
+	AZT_S_MODE,		/* 2 */
+	AZT_S_READ,		/* 3 */
+	AZT_S_DATA,		/* 4 */
+	AZT_S_STOP,		/* 5 */
+	AZT_S_STOPPING		/* 6 */
 };
-enum azt_read_modes 
-{ AZT_MODE_0,     /*read mode for audio disks, not supported by Aztech firmware*/
-  AZT_MODE_1,     /*read mode for normal CD-ROMs*/
-  AZT_MODE_2      /*read mode for XA CD-ROMs*/
+enum azt_read_modes { AZT_MODE_0,	/*read mode for audio disks, not supported by Aztech firmware */
+	AZT_MODE_1,		/*read mode for normal CD-ROMs */
+	AZT_MODE_2		/*read mode for XA CD-ROMs */
 };
 
 /*##########################################################################
@@ -264,20 +262,20 @@
 */
 static int aztPresent = 0;
 
-static volatile int azt_transfer_is_active=0;
+static volatile int azt_transfer_is_active = 0;
 
-static char azt_buf[CD_FRAMESIZE_RAW*AZT_BUF_SIZ];/*buffer for block size conversion*/
+static char azt_buf[CD_FRAMESIZE_RAW * AZT_BUF_SIZ];	/*buffer for block size conversion */
 #if AZT_PRIVATE_IOCTLS
-static char buf[CD_FRAMESIZE_RAW];              /*separate buffer for the ioctls*/
+static char buf[CD_FRAMESIZE_RAW];	/*separate buffer for the ioctls */
 #endif
 
 static volatile int azt_buf_bn[AZT_BUF_SIZ], azt_next_bn;
 static volatile int azt_buf_in, azt_buf_out = -1;
-static volatile int azt_error=0;
-static int azt_open_count=0;
+static volatile int azt_error = 0;
+static int azt_open_count = 0;
 static volatile enum azt_state_e azt_state = AZT_S_IDLE;
 #ifdef AZT_TEST3
-static volatile enum azt_state_e azt_state_old = AZT_S_STOP;  
+static volatile enum azt_state_e azt_state_old = AZT_S_STOP;
 static volatile int azt_st_old = 0;
 #endif
 static volatile enum azt_read_modes azt_read_mode = AZT_MODE_1;
@@ -291,9 +289,9 @@
 
 static int azt_port_auto[16] = AZT_BASE_AUTO;
 
-static char  azt_cont = 0;
-static char  azt_init_end = 0;
-static char  azt_auto_eject = AZT_AUTO_EJECT;
+static char azt_cont = 0;
+static char azt_init_end = 0;
+static char azt_auto_eject = AZT_AUTO_EJECT;
 
 static int AztTimeout, AztTries;
 static DECLARE_WAIT_QUEUE_HEAD(azt_waitq);
@@ -303,7 +301,7 @@
 static struct azt_Toc Toc[MAX_TRACKS];
 static struct azt_Play_msf azt_Play;
 
-static int  aztAudioStatus = CDROM_AUDIO_NO_STATUS;
+static int aztAudioStatus = CDROM_AUDIO_NO_STATUS;
 static char aztDiskChanged = 1;
 static char aztTocUpToDate = 0;
 
@@ -316,50 +314,51 @@
   ###########################################################################
 */
 /* CDROM Drive Low Level I/O Functions */
-void        op_ok(void);
-void        pa_ok(void);
-void        sten_low(void);
-void        dten_low(void);
-void        statusAzt(void);
+void op_ok(void);
+void pa_ok(void);
+void sten_low(void);
+void dten_low(void);
+void statusAzt(void);
 static void aztStatTimer(void);
 
 /* CDROM Drive Command Functions */
-static int  aztSendCmd(int cmd);
-static int  sendAztCmd(int cmd, struct azt_Play_msf *params);
-static int  aztSeek(struct azt_Play_msf *params);
-static int  aztSetDiskType(int type);
-static int  aztStatus(void);
-static int  getAztStatus(void);
-static int  aztPlay(struct azt_Play_msf *arg);
+static int aztSendCmd(int cmd);
+static int sendAztCmd(int cmd, struct azt_Play_msf *params);
+static int aztSeek(struct azt_Play_msf *params);
+static int aztSetDiskType(int type);
+static int aztStatus(void);
+static int getAztStatus(void);
+static int aztPlay(struct azt_Play_msf *arg);
 static void aztCloseDoor(void);
 static void aztLockDoor(void);
 static void aztUnlockDoor(void);
-static int  aztGetValue(unsigned char *result);
-static int  aztGetQChannelInfo(struct azt_Toc *qp);
-static int  aztUpdateToc(void);
-static int  aztGetDiskInfo(void);
-#if AZT_MULTISESSION 
- static int aztGetMultiDiskInfo(void);
+static int aztGetValue(unsigned char *result);
+static int aztGetQChannelInfo(struct azt_Toc *qp);
+static int aztUpdateToc(void);
+static int aztGetDiskInfo(void);
+#if AZT_MULTISESSION
+static int aztGetMultiDiskInfo(void);
 #endif
-static int  aztGetToc(int multi);
+static int aztGetToc(int multi);
 
 /* Kernel Interface Functions */
-static int  check_aztcd_media_change(kdev_t full_dev);
-static int  aztcd_ioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg);
+static int check_aztcd_media_change(kdev_t full_dev);
+static int aztcd_ioctl(struct inode *ip, struct file *fp, unsigned int cmd,
+		       unsigned long arg);
 static void azt_transfer(void);
 static void do_aztcd_request(request_queue_t *);
 static void azt_invalidate_buffers(void);
-int         aztcd_open(struct inode *ip, struct file *fp);
+int aztcd_open(struct inode *ip, struct file *fp);
 
-static int  aztcd_release(struct inode * inode, struct file * file);
+static int aztcd_release(struct inode *inode, struct file *file);
 
-int       aztcd_init(void);
+int aztcd_init(void);
 
 static struct block_device_operations azt_fops = {
-	open:			aztcd_open,
-	release:		aztcd_release,
-	ioctl:			aztcd_ioctl,
-	check_media_change:	check_aztcd_media_change,
+	open:aztcd_open,
+	release:aztcd_release,
+	ioctl:aztcd_ioctl,
+	check_media_change:check_aztcd_media_change,
 };
 
 /* Aztcd State Machine: Controls Drive Operating State */
@@ -369,7 +368,7 @@
 static void azt_hsg2msf(long hsg, struct msf *msf);
 static long azt_msf2hsg(struct msf *mp);
 static void azt_bin2bcd(unsigned char *p);
-static int  azt_bcd2bin(unsigned char bcd);
+static int azt_bcd2bin(unsigned char bcd);
 
 /*##########################################################################
   CDROM Drive Low Level I/O Functions
@@ -380,53 +379,64 @@
 /* Wait for OP_OK = drive answers with AFL_OP_OK after receiving a command*/
 # define OP_OK op_ok()
 void op_ok(void)
-{ aztTimeOutCount=0; 
-  do { aztIndatum=inb(DATA_PORT);
-       aztTimeOutCount++;
-       if (aztTimeOutCount>=AZT_TIMEOUT)
-	{ printk("aztcd: Error Wait OP_OK\n");
-	  break;
-	}
-     } while (aztIndatum!=AFL_OP_OK);
+{
+	aztTimeOutCount = 0;
+	do {
+		aztIndatum = inb(DATA_PORT);
+		aztTimeOutCount++;
+		if (aztTimeOutCount >= AZT_TIMEOUT) {
+			printk("aztcd: Error Wait OP_OK\n");
+			break;
+		}
+	} while (aztIndatum != AFL_OP_OK);
 }
 
 /* Wait for PA_OK = drive answers with AFL_PA_OK after receiving parameters*/
 # define PA_OK pa_ok()
 void pa_ok(void)
-{ aztTimeOutCount=0; 
-  do { aztIndatum=inb(DATA_PORT);
-       aztTimeOutCount++;
-       if (aztTimeOutCount>=AZT_TIMEOUT)
-	{ printk("aztcd: Error Wait PA_OK\n");
-	  break;
-	}
-     } while (aztIndatum!=AFL_PA_OK);
+{
+	aztTimeOutCount = 0;
+	do {
+		aztIndatum = inb(DATA_PORT);
+		aztTimeOutCount++;
+		if (aztTimeOutCount >= AZT_TIMEOUT) {
+			printk("aztcd: Error Wait PA_OK\n");
+			break;
+		}
+	} while (aztIndatum != AFL_PA_OK);
 }
-     
+
 /* Wait for STEN=Low = handshake signal 'AFL_.._OK available or command executed*/
 # define STEN_LOW  sten_low()
 void sten_low(void)
-{ aztTimeOutCount=0; 
-  do { aztIndatum=inb(STATUS_PORT);
-       aztTimeOutCount++;
-       if (aztTimeOutCount>=AZT_TIMEOUT)
-	{ if (azt_init_end) printk("aztcd: Error Wait STEN_LOW commands:%x\n",aztCmd);
-	  break;
-	}
-     } while (aztIndatum&AFL_STATUS);
+{
+	aztTimeOutCount = 0;
+	do {
+		aztIndatum = inb(STATUS_PORT);
+		aztTimeOutCount++;
+		if (aztTimeOutCount >= AZT_TIMEOUT) {
+			if (azt_init_end)
+				printk
+				    ("aztcd: Error Wait STEN_LOW commands:%x\n",
+				     aztCmd);
+			break;
+		}
+	} while (aztIndatum & AFL_STATUS);
 }
 
 /* Wait for DTEN=Low = handshake signal 'Data available'*/
 # define DTEN_LOW dten_low()
 void dten_low(void)
-{ aztTimeOutCount=0; 
-  do { aztIndatum=inb(STATUS_PORT);
-       aztTimeOutCount++;
-       if (aztTimeOutCount>=AZT_TIMEOUT)
-	{ printk("aztcd: Error Wait DTEN_OK\n");
-	  break;
-	}
-     } while (aztIndatum&AFL_DATA);
+{
+	aztTimeOutCount = 0;
+	do {
+		aztIndatum = inb(STATUS_PORT);
+		aztTimeOutCount++;
+		if (aztTimeOutCount >= AZT_TIMEOUT) {
+			printk("aztcd: Error Wait DTEN_OK\n");
+			break;
+		}
+	} while (aztIndatum & AFL_DATA);
 }
 
 /* 
@@ -435,25 +445,29 @@
 */
 #define STEN_LOW_WAIT   statusAzt()
 void statusAzt(void)
-{ AztTimeout = AZT_STATUS_DELAY;
-  SET_TIMER(aztStatTimer, HZ/100); 
-  sleep_on(&azt_waitq);
-  if (AztTimeout <= 0) printk("aztcd: Error Wait STEN_LOW_WAIT command:%x\n",aztCmd);
-  return;
+{
+	AztTimeout = AZT_STATUS_DELAY;
+	SET_TIMER(aztStatTimer, HZ / 100);
+	sleep_on(&azt_waitq);
+	if (AztTimeout <= 0)
+		printk("aztcd: Error Wait STEN_LOW_WAIT command:%x\n",
+		       aztCmd);
+	return;
 }
 
 static void aztStatTimer(void)
-{ if (!(inb(STATUS_PORT) & AFL_STATUS))
-     { wake_up(&azt_waitq);
-       return;
-     }
-  AztTimeout--;
-  if (AztTimeout <= 0)
-     { wake_up(&azt_waitq);
-       printk("aztcd: Error aztStatTimer: Timeout\n");
-       return;
-     }
-  SET_TIMER(aztStatTimer, HZ/100);
+{
+	if (!(inb(STATUS_PORT) & AFL_STATUS)) {
+		wake_up(&azt_waitq);
+		return;
+	}
+	AztTimeout--;
+	if (AztTimeout <= 0) {
+		wake_up(&azt_waitq);
+		printk("aztcd: Error aztStatTimer: Timeout\n");
+		return;
+	}
+	SET_TIMER(aztStatTimer, HZ / 100);
 }
 
 /*##########################################################################
@@ -464,111 +478,125 @@
  * Send a single command, return -1 on error, else 0
 */
 static int aztSendCmd(int cmd)
-{  unsigned char data;
-   int retry;
+{
+	unsigned char data;
+	int retry;
 
 #ifdef AZT_DEBUG
-   printk("aztcd: Executing command %x\n",cmd);
+	printk("aztcd: Executing command %x\n", cmd);
 #endif
 
-   if ((azt_port==0x1f0)||(azt_port==0x170))  
-      SWITCH_IDE_SLAVE; /*switch IDE interface to slave configuration*/
-   
-   aztCmd=cmd;
-   outb(POLLED,MODE_PORT);
-   do { if (inb(STATUS_PORT)&AFL_STATUS) break;
-	inb(DATA_PORT);    /* if status left from last command, read and */
-      } while (1);         /* discard it */
-   do { if (inb(STATUS_PORT)&AFL_DATA) break;
-	inb(DATA_PORT);    /* if data left from last command, read and */
-      } while (1);         /* discard it */
-   for (retry=0;retry<AZT_RETRY_ATTEMPTS;retry++)
-     { outb((unsigned char) cmd,CMD_PORT);
-       STEN_LOW;
-       data=inb(DATA_PORT);
-       if (data==AFL_OP_OK)
-	 { return 0;}           /*OP_OK?*/
-       if (data==AFL_OP_ERR)
-	 { STEN_LOW;
-	   data=inb(DATA_PORT);
-	   printk("### Error 1 aztcd: aztSendCmd %x  Error Code %x\n",cmd,data);
-	 }
-     }
-   if (retry>=AZT_RETRY_ATTEMPTS)
-     { printk("### Error 2 aztcd: aztSendCmd %x \n",cmd);
-       azt_error=0xA5;
-     }
-   RETURNM("aztSendCmd",-1);
+	if ((azt_port == 0x1f0) || (azt_port == 0x170))
+		SWITCH_IDE_SLAVE;	/*switch IDE interface to slave configuration */
+
+	aztCmd = cmd;
+	outb(POLLED, MODE_PORT);
+	do {
+		if (inb(STATUS_PORT) & AFL_STATUS)
+			break;
+		inb(DATA_PORT);	/* if status left from last command, read and */
+	} while (1);		/* discard it */
+	do {
+		if (inb(STATUS_PORT) & AFL_DATA)
+			break;
+		inb(DATA_PORT);	/* if data left from last command, read and */
+	} while (1);		/* discard it */
+	for (retry = 0; retry < AZT_RETRY_ATTEMPTS; retry++) {
+		outb((unsigned char) cmd, CMD_PORT);
+		STEN_LOW;
+		data = inb(DATA_PORT);
+		if (data == AFL_OP_OK) {
+			return 0;
+		}		/*OP_OK? */
+		if (data == AFL_OP_ERR) {
+			STEN_LOW;
+			data = inb(DATA_PORT);
+			printk
+			    ("### Error 1 aztcd: aztSendCmd %x  Error Code %x\n",
+			     cmd, data);
+		}
+	}
+	if (retry >= AZT_RETRY_ATTEMPTS) {
+		printk("### Error 2 aztcd: aztSendCmd %x \n", cmd);
+		azt_error = 0xA5;
+	}
+	RETURNM("aztSendCmd", -1);
 }
 
 /*
  * Send a play or read command to the drive, return -1 on error, else 0
 */
 static int sendAztCmd(int cmd, struct azt_Play_msf *params)
-{  unsigned char data;
-   int retry;
+{
+	unsigned char data;
+	int retry;
 
 #ifdef AZT_DEBUG
-   printk("aztcd: play start=%02x:%02x:%02x  end=%02x:%02x:%02x\n", \
-	   params->start.min, params->start.sec, params->start.frame, \
-	   params->end.min,   params->end.sec,   params->end.frame);
-#endif   
-   for (retry=0;retry<AZT_RETRY_ATTEMPTS;retry++)
-     { aztSendCmd(cmd);
-       outb(params -> start.min,CMD_PORT);
-       outb(params -> start.sec,CMD_PORT);
-       outb(params -> start.frame,CMD_PORT);
-       outb(params -> end.min,CMD_PORT);
-       outb(params -> end.sec,CMD_PORT);
-       outb(params -> end.frame,CMD_PORT);
-       STEN_LOW;
-       data=inb(DATA_PORT);
-       if (data==AFL_PA_OK)
-	 { return 0;}           /*PA_OK ?*/
-       if (data==AFL_PA_ERR)
-	 { STEN_LOW;
-	   data=inb(DATA_PORT);
-	   printk("### Error 1 aztcd: sendAztCmd %x  Error Code %x\n",cmd,data);
-	 }
-     }
-   if (retry>=AZT_RETRY_ATTEMPTS)
-     { printk("### Error 2 aztcd: sendAztCmd %x\n ",cmd);
-       azt_error=0xA5;
-     }
-   RETURNM("sendAztCmd",-1);
+	printk("aztcd: play start=%02x:%02x:%02x  end=%02x:%02x:%02x\n",
+	       params->start.min, params->start.sec, params->start.frame,
+	       params->end.min, params->end.sec, params->end.frame);
+#endif
+	for (retry = 0; retry < AZT_RETRY_ATTEMPTS; retry++) {
+		aztSendCmd(cmd);
+		outb(params->start.min, CMD_PORT);
+		outb(params->start.sec, CMD_PORT);
+		outb(params->start.frame, CMD_PORT);
+		outb(params->end.min, CMD_PORT);
+		outb(params->end.sec, CMD_PORT);
+		outb(params->end.frame, CMD_PORT);
+		STEN_LOW;
+		data = inb(DATA_PORT);
+		if (data == AFL_PA_OK) {
+			return 0;
+		}		/*PA_OK ? */
+		if (data == AFL_PA_ERR) {
+			STEN_LOW;
+			data = inb(DATA_PORT);
+			printk
+			    ("### Error 1 aztcd: sendAztCmd %x  Error Code %x\n",
+			     cmd, data);
+		}
+	}
+	if (retry >= AZT_RETRY_ATTEMPTS) {
+		printk("### Error 2 aztcd: sendAztCmd %x\n ", cmd);
+		azt_error = 0xA5;
+	}
+	RETURNM("sendAztCmd", -1);
 }
 
 /*
  * Send a seek command to the drive, return -1 on error, else 0
 */
 static int aztSeek(struct azt_Play_msf *params)
-{  unsigned char data;
-   int retry;
+{
+	unsigned char data;
+	int retry;
 
 #ifdef AZT_DEBUG
-   printk("aztcd: aztSeek %02x:%02x:%02x\n", \
-	   params->start.min, params->start.sec, params->start.frame);
-#endif   
-   for (retry=0;retry<AZT_RETRY_ATTEMPTS;retry++)
-     { aztSendCmd(ACMD_SEEK);
-       outb(params -> start.min,CMD_PORT);
-       outb(params -> start.sec,CMD_PORT);
-       outb(params -> start.frame,CMD_PORT);
-       STEN_LOW;
-       data=inb(DATA_PORT);
-       if (data==AFL_PA_OK)
-	 { return 0;}           /*PA_OK ?*/
-       if (data==AFL_PA_ERR)
-	 { STEN_LOW;
-	   data=inb(DATA_PORT);
-	   printk("### Error 1 aztcd: aztSeek\n");
-	 }
-     }
-   if (retry>=AZT_RETRY_ATTEMPTS)
-     { printk("### Error 2 aztcd: aztSeek\n ");
-       azt_error=0xA5;
-     }
-   RETURNM("aztSeek",-1);
+	printk("aztcd: aztSeek %02x:%02x:%02x\n",
+	       params->start.min, params->start.sec, params->start.frame);
+#endif
+	for (retry = 0; retry < AZT_RETRY_ATTEMPTS; retry++) {
+		aztSendCmd(ACMD_SEEK);
+		outb(params->start.min, CMD_PORT);
+		outb(params->start.sec, CMD_PORT);
+		outb(params->start.frame, CMD_PORT);
+		STEN_LOW;
+		data = inb(DATA_PORT);
+		if (data == AFL_PA_OK) {
+			return 0;
+		}		/*PA_OK ? */
+		if (data == AFL_PA_ERR) {
+			STEN_LOW;
+			data = inb(DATA_PORT);
+			printk("### Error 1 aztcd: aztSeek\n");
+		}
+	}
+	if (retry >= AZT_RETRY_ATTEMPTS) {
+		printk("### Error 2 aztcd: aztSeek\n ");
+		azt_error = 0xA5;
+	}
+	RETURNM("aztSeek", -1);
 }
 
 /* Send a Set Disk Type command
@@ -576,79 +604,86 @@
    dent on which mode is set ???
 */
 static int aztSetDiskType(int type)
-{  unsigned char data;
-   int retry;
+{
+	unsigned char data;
+	int retry;
 
 #ifdef AZT_DEBUG
-   printk("aztcd: set disk type command: type= %i\n",type);
+	printk("aztcd: set disk type command: type= %i\n", type);
 #endif
-   for (retry=0;retry<AZT_RETRY_ATTEMPTS;retry++)
-     { aztSendCmd(ACMD_SET_DISK_TYPE);
-       outb(type,CMD_PORT);
-       STEN_LOW;
-       data=inb(DATA_PORT);
-       if (data==AFL_PA_OK)     /*PA_OK ?*/
-	 { azt_read_mode=type;
-	   return 0;            
-	 }  
-       if (data==AFL_PA_ERR)
-	 { STEN_LOW;
-	   data=inb(DATA_PORT);
-	   printk("### Error 1 aztcd: aztSetDiskType %x Error Code %x\n",type,data);
-	 }
-     }
-   if (retry>=AZT_RETRY_ATTEMPTS)
-     { printk("### Error 2 aztcd: aztSetDiskType %x\n ",type);
-       azt_error=0xA5;
-     }
-   RETURNM("aztSetDiskType",-1);
+	for (retry = 0; retry < AZT_RETRY_ATTEMPTS; retry++) {
+		aztSendCmd(ACMD_SET_DISK_TYPE);
+		outb(type, CMD_PORT);
+		STEN_LOW;
+		data = inb(DATA_PORT);
+		if (data == AFL_PA_OK) {	/*PA_OK ? */
+			azt_read_mode = type;
+			return 0;
+		}
+		if (data == AFL_PA_ERR) {
+			STEN_LOW;
+			data = inb(DATA_PORT);
+			printk
+			    ("### Error 1 aztcd: aztSetDiskType %x Error Code %x\n",
+			     type, data);
+		}
+	}
+	if (retry >= AZT_RETRY_ATTEMPTS) {
+		printk("### Error 2 aztcd: aztSetDiskType %x\n ", type);
+		azt_error = 0xA5;
+	}
+	RETURNM("aztSetDiskType", -1);
 }
 
 
 /* used in azt_poll to poll the status, expects another program to issue a 
  * ACMD_GET_STATUS directly before 
  */
-static int aztStatus(void)  
-{       int st;
+static int aztStatus(void)
+{
+	int st;
 /*	int i;
 
 	i = inb(STATUS_PORT) & AFL_STATUS;    is STEN=0?    ???
 	if (!i)
-*/      STEN_LOW;
-        if (aztTimeOutCount<AZT_TIMEOUT)	
-	{   	st = inb(DATA_PORT) & 0xFF;
+*/ STEN_LOW;
+	if (aztTimeOutCount < AZT_TIMEOUT) {
+		st = inb(DATA_PORT) & 0xFF;
 		return st;
-	}
-	else
-		RETURNM("aztStatus",-1);
+	} else
+		RETURNM("aztStatus", -1);
 }
 
 /*
  * Get the drive status
  */
 static int getAztStatus(void)
-{       int st;
+{
+	int st;
 
-	if (aztSendCmd(ACMD_GET_STATUS)) RETURNM("getAztStatus 1",-1);
+	if (aztSendCmd(ACMD_GET_STATUS))
+		RETURNM("getAztStatus 1", -1);
 	STEN_LOW;
 	st = inb(DATA_PORT) & 0xFF;
 #ifdef AZT_DEBUG
-	printk("aztcd: Status = %x\n",st);
+	printk("aztcd: Status = %x\n", st);
 #endif
-	if ((st == 0xFF)||(st&AST_CMD_CHECK))
-	 { printk("aztcd: AST_CMD_CHECK error or no status available\n");
-	   return -1;
-	 }
-
-	if (((st&AST_MODE_BITS)!=AST_BUSY) && (aztAudioStatus == CDROM_AUDIO_PLAY))
-	   /* XXX might be an error? look at q-channel? */
-	   aztAudioStatus = CDROM_AUDIO_COMPLETED;
-
-	if ((st & AST_DSK_CHG)||(st & AST_NOT_READY))
-	 { aztDiskChanged = 1;
-	   aztTocUpToDate = 0;
-	   aztAudioStatus = CDROM_AUDIO_NO_STATUS;
-	 }
+	if ((st == 0xFF) || (st & AST_CMD_CHECK)) {
+		printk
+		    ("aztcd: AST_CMD_CHECK error or no status available\n");
+		return -1;
+	}
+
+	if (((st & AST_MODE_BITS) != AST_BUSY)
+	    && (aztAudioStatus == CDROM_AUDIO_PLAY))
+		/* XXX might be an error? look at q-channel? */
+		aztAudioStatus = CDROM_AUDIO_COMPLETED;
+
+	if ((st & AST_DSK_CHG) || (st & AST_NOT_READY)) {
+		aztDiskChanged = 1;
+		aztTocUpToDate = 0;
+		aztAudioStatus = CDROM_AUDIO_NO_STATUS;
+	}
 	return st;
 }
 
@@ -657,7 +692,9 @@
  * Send a 'Play' command and get the status.  Use only from the top half.
  */
 static int aztPlay(struct azt_Play_msf *arg)
-{       if (sendAztCmd(ACMD_PLAY_AUDIO, arg) < 0) RETURNM("aztPlay",-1);
+{
+	if (sendAztCmd(ACMD_PLAY_AUDIO, arg) < 0)
+		RETURNM("aztPlay", -1);
 	return 0;
 }
 
@@ -668,27 +705,27 @@
  */
 static void aztCloseDoor(void)
 {
-  aztSendCmd(ACMD_CLOSE);
-  STEN_LOW;
-  return;
+	aztSendCmd(ACMD_CLOSE);
+	STEN_LOW;
+	return;
 }
 
 static void aztLockDoor(void)
 {
 #if AZT_ALLOW_TRAY_LOCK
-  aztSendCmd(ACMD_LOCK);
-  STEN_LOW;
+	aztSendCmd(ACMD_LOCK);
+	STEN_LOW;
 #endif
-  return;
+	return;
 }
 
 static void aztUnlockDoor(void)
 {
 #if AZT_ALLOW_TRAY_LOCK
-  aztSendCmd(ACMD_UNLOCK);
-  STEN_LOW;
+	aztSendCmd(ACMD_UNLOCK);
+	STEN_LOW;
 #endif
-  return;
+	return;
 }
 
 /*
@@ -697,11 +734,12 @@
  * be issued with aztSendCmd() directly before
  */
 static int aztGetValue(unsigned char *result)
-{       int s;
+{
+	int s;
 
 	STEN_LOW;
-	if (aztTimeOutCount>=AZT_TIMEOUT)
-	{       printk("aztcd: aztGetValue timeout\n");
+	if (aztTimeOutCount >= AZT_TIMEOUT) {
+		printk("aztcd: aztGetValue timeout\n");
 		return -1;
 	}
 	s = inb(DATA_PORT) & 0xFF;
@@ -714,42 +752,55 @@
  * table of contents.
  */
 int aztGetQChannelInfo(struct azt_Toc *qp)
-{       unsigned char notUsed;
+{
+	unsigned char notUsed;
 	int st;
 
 #ifdef AZT_DEBUG
-	printk("aztcd: starting aztGetQChannelInfo  Time:%li\n",jiffies);
+	printk("aztcd: starting aztGetQChannelInfo  Time:%li\n", jiffies);
 #endif
-	if ((st=getAztStatus())==-1)        RETURNM("aztGetQChannelInfo 1",-1);
-	if (aztSendCmd(ACMD_GET_Q_CHANNEL)) RETURNM("aztGetQChannelInfo 2",-1);
-	/*STEN_LOW_WAIT; ??? Dosemu0.60's cdrom.c does not like STEN_LOW_WAIT here*/
-	if (aztGetValue(&notUsed)) RETURNM("aztGetQChannelInfo 3",-1); /*??? Nullbyte einlesen*/
-	if ((st&AST_MODE_BITS)==AST_INITIAL)
-	 { qp->ctrl_addr=0;      /* when audio stop ACMD_GET_Q_CHANNEL returns */
-	   qp->track=0;          /* only one byte with Aztech drives */
-	   qp->pointIndex=0;
-	   qp->trackTime.min=0;
-	   qp->trackTime.sec=0;
-	   qp->trackTime.frame=0;
-	   qp->diskTime.min=0;
-	   qp->diskTime.sec=0;
-	   qp->diskTime.frame=0;
-	   return 0;  
-	 }
-	else
-	 { if (aztGetValue(&qp -> ctrl_addr) < 0)       RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&qp -> track) < 0)           RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&qp -> pointIndex) < 0)      RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&qp -> trackTime.min) < 0)   RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&qp -> trackTime.sec) < 0)   RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&qp -> trackTime.frame) < 0) RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&notUsed) < 0)               RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&qp -> diskTime.min) < 0)    RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&qp -> diskTime.sec) < 0)    RETURNM("aztGetQChannelInfo 4",-1);
-	   if (aztGetValue(&qp -> diskTime.frame) < 0)  RETURNM("aztGetQChannelInfo 4",-1);
-	 }
+	if ((st = getAztStatus()) == -1)
+		RETURNM("aztGetQChannelInfo 1", -1);
+	if (aztSendCmd(ACMD_GET_Q_CHANNEL))
+		RETURNM("aztGetQChannelInfo 2", -1);
+	/*STEN_LOW_WAIT; ??? Dosemu0.60's cdrom.c does not like STEN_LOW_WAIT here */
+	if (aztGetValue(&notUsed))
+		RETURNM("aztGetQChannelInfo 3", -1);	/*??? Nullbyte einlesen */
+	if ((st & AST_MODE_BITS) == AST_INITIAL) {
+		qp->ctrl_addr = 0;	/* when audio stop ACMD_GET_Q_CHANNEL returns */
+		qp->track = 0;	/* only one byte with Aztech drives */
+		qp->pointIndex = 0;
+		qp->trackTime.min = 0;
+		qp->trackTime.sec = 0;
+		qp->trackTime.frame = 0;
+		qp->diskTime.min = 0;
+		qp->diskTime.sec = 0;
+		qp->diskTime.frame = 0;
+		return 0;
+	} else {
+		if (aztGetValue(&qp->ctrl_addr) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&qp->track) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&qp->pointIndex) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&qp->trackTime.min) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&qp->trackTime.sec) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&qp->trackTime.frame) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&notUsed) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&qp->diskTime.min) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&qp->diskTime.sec) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+		if (aztGetValue(&qp->diskTime.frame) < 0)
+			RETURNM("aztGetQChannelInfo 4", -1);
+	}
 #ifdef AZT_DEBUG
-	printk("aztcd: exiting aztGetQChannelInfo  Time:%li\n",jiffies);
+	printk("aztcd: exiting aztGetQChannelInfo  Time:%li\n", jiffies);
 #endif
 	return 0;
 }
@@ -758,11 +809,12 @@
  * Read the table of contents (TOC) and TOC header if necessary
  */
 static int aztUpdateToc()
-{       int st;
+{
+	int st;
 
 #ifdef AZT_DEBUG
-	printk("aztcd: starting aztUpdateToc  Time:%li\n",jiffies);
-#endif  
+	printk("aztcd: starting aztUpdateToc  Time:%li\n", jiffies);
+#endif
 	if (aztTocUpToDate)
 		return 0;
 
@@ -772,57 +824,63 @@
 	if (aztGetToc(0) < 0)
 		return -EIO;
 
-        /*audio disk detection
-          with my Aztech drive there is no audio status bit, so I use the copy
-          protection bit of the first track. If this track is copy protected 
-          (copy bit = 0), I assume, it's an audio  disk. Strange, but works ??? */
-        if (!(Toc[DiskInfo.first].ctrl_addr & 0x40)) 
-           DiskInfo.audio=1;
-        else 
-           DiskInfo.audio=0;
-
-        /* XA detection */
-	if (! DiskInfo.audio) 
-	   { azt_Play.start.min   = 0;  /*XA detection only seems to work*/
-             azt_Play.start.sec   = 2;  /*when we play a track*/
-	     azt_Play.start.frame = 0;
-	     azt_Play.end.min     = 0;
-	     azt_Play.end.sec     = 0;
-	     azt_Play.end.frame   = 1;
-	     if (sendAztCmd(ACMD_PLAY_READ, &azt_Play)) return -1;
-	     DTEN_LOW;
-	     for (st=0;st<CD_FRAMESIZE;st++) inb(DATA_PORT);
-           } 
-        DiskInfo.xa = getAztStatus() & AST_MODE;
-        if (DiskInfo.xa) 
-           { printk("aztcd: XA support experimental - mail results to Werner.Zimmermann@fht-esslingen.de\n");
-           }
-        
-        /*multisession detection
-          support for multisession CDs is done automatically with Aztech drives,
-          we don't have to take care about TOC redirection; if we want the isofs
-          to take care about redirection, we have to set AZT_MULTISESSION to 1*/
-        DiskInfo.multi=0;
+	/*audio disk detection
+	   with my Aztech drive there is no audio status bit, so I use the copy
+	   protection bit of the first track. If this track is copy protected 
+	   (copy bit = 0), I assume, it's an audio  disk. Strange, but works ??? */
+	if (!(Toc[DiskInfo.first].ctrl_addr & 0x40))
+		DiskInfo.audio = 1;
+	else
+		DiskInfo.audio = 0;
+
+	/* XA detection */
+	if (!DiskInfo.audio) {
+		azt_Play.start.min = 0;	/*XA detection only seems to work */
+		azt_Play.start.sec = 2;	/*when we play a track */
+		azt_Play.start.frame = 0;
+		azt_Play.end.min = 0;
+		azt_Play.end.sec = 0;
+		azt_Play.end.frame = 1;
+		if (sendAztCmd(ACMD_PLAY_READ, &azt_Play))
+			return -1;
+		DTEN_LOW;
+		for (st = 0; st < CD_FRAMESIZE; st++)
+			inb(DATA_PORT);
+	}
+	DiskInfo.xa = getAztStatus() & AST_MODE;
+	if (DiskInfo.xa) {
+		printk
+		    ("aztcd: XA support experimental - mail results to Werner.Zimmermann@fht-esslingen.de\n");
+	}
+
+	/*multisession detection
+	   support for multisession CDs is done automatically with Aztech drives,
+	   we don't have to take care about TOC redirection; if we want the isofs
+	   to take care about redirection, we have to set AZT_MULTISESSION to 1 */
+	DiskInfo.multi = 0;
 #if AZT_MULTISESSION
-  	if (DiskInfo.xa) 
-  	   { aztGetMultiDiskInfo(); /*here Disk.Info.multi is set*/
-  	   }
-#endif
-        if (DiskInfo.multi)
-           { DiskInfo.lastSession.min  = Toc[DiskInfo.next].diskTime.min;
-	     DiskInfo.lastSession.sec  = Toc[DiskInfo.next].diskTime.sec;
-             DiskInfo.lastSession.frame= Toc[DiskInfo.next].diskTime.frame;
-             printk("aztcd: Multisession support experimental\n");
-           }
-        else
-           { DiskInfo.lastSession.min  = Toc[DiskInfo.first].diskTime.min;
-	     DiskInfo.lastSession.sec  = Toc[DiskInfo.first].diskTime.sec;
-             DiskInfo.lastSession.frame= Toc[DiskInfo.first].diskTime.frame;
-           }
+	if (DiskInfo.xa) {
+		aztGetMultiDiskInfo();	/*here Disk.Info.multi is set */
+	}
+#endif
+	if (DiskInfo.multi) {
+		DiskInfo.lastSession.min = Toc[DiskInfo.next].diskTime.min;
+		DiskInfo.lastSession.sec = Toc[DiskInfo.next].diskTime.sec;
+		DiskInfo.lastSession.frame =
+		    Toc[DiskInfo.next].diskTime.frame;
+		printk("aztcd: Multisession support experimental\n");
+	} else {
+		DiskInfo.lastSession.min =
+		    Toc[DiskInfo.first].diskTime.min;
+		DiskInfo.lastSession.sec =
+		    Toc[DiskInfo.first].diskTime.sec;
+		DiskInfo.lastSession.frame =
+		    Toc[DiskInfo.first].diskTime.frame;
+	}
 
 	aztTocUpToDate = 1;
 #ifdef AZT_DEBUG
-	printk("aztcd: exiting aztUpdateToc  Time:%li\n",jiffies);
+	printk("aztcd: exiting aztUpdateToc  Time:%li\n", jiffies);
 #endif
 	return 0;
 }
@@ -832,56 +890,58 @@
  * track
  */
 static int aztGetDiskInfo()
-{ int limit;
-  unsigned char test;
-  struct azt_Toc qInfo;
-
-#ifdef AZT_DEBUG
-  printk("aztcd: starting aztGetDiskInfo  Time:%li\n",jiffies);
-#endif
-  if (aztSendCmd(ACMD_SEEK_TO_LEADIN)) RETURNM("aztGetDiskInfo 1",-1);
-  STEN_LOW_WAIT;
-  test=0;
-  for (limit=300;limit>0;limit--)
-   {  if (aztGetQChannelInfo(&qInfo)<0) RETURNM("aztGetDiskInfo 2",-1);
-      if (qInfo.pointIndex==0xA0)   /*Number of FirstTrack*/
-	{ DiskInfo.first = qInfo.diskTime.min;
-	  DiskInfo.first = azt_bcd2bin(DiskInfo.first);
-	  test=test|0x01;
-	}
-      if (qInfo.pointIndex==0xA1)   /*Number of LastTrack*/
-	{ DiskInfo.last  = qInfo.diskTime.min;
-	  DiskInfo.last  = azt_bcd2bin(DiskInfo.last);
-	  test=test|0x02;
-	}
-      if (qInfo.pointIndex==0xA2)   /*DiskLength*/
-	{ DiskInfo.diskLength.min=qInfo.diskTime.min;
-	  DiskInfo.diskLength.sec=qInfo.diskTime.sec;
-	  DiskInfo.diskLength.frame=qInfo.diskTime.frame;
-	  test=test|0x04;
-	}
-      if ((qInfo.pointIndex==DiskInfo.first)&&(test&0x01))   /*StartTime of First Track*/
-	{ DiskInfo.firstTrack.min=qInfo.diskTime.min;
-	  DiskInfo.firstTrack.sec=qInfo.diskTime.sec;
-	  DiskInfo.firstTrack.frame=qInfo.diskTime.frame;
-	  test=test|0x08;
-	}
-      if (test==0x0F) break;
-   }
-#ifdef AZT_DEBUG
-  printk ("aztcd: exiting aztGetDiskInfo  Time:%li\n",jiffies);
-  printk("Disk Info: first %d last %d length %02X:%02X.%02X dez  first %02X:%02X.%02X dez\n",
-  	  DiskInfo.first,
-	  DiskInfo.last,
-	  DiskInfo.diskLength.min,
-	  DiskInfo.diskLength.sec,
-	  DiskInfo.diskLength.frame,
-	  DiskInfo.firstTrack.min,
-	  DiskInfo.firstTrack.sec,
-	  DiskInfo.firstTrack.frame);
+{
+	int limit;
+	unsigned char test;
+	struct azt_Toc qInfo;
+
+#ifdef AZT_DEBUG
+	printk("aztcd: starting aztGetDiskInfo  Time:%li\n", jiffies);
+#endif
+	if (aztSendCmd(ACMD_SEEK_TO_LEADIN))
+		RETURNM("aztGetDiskInfo 1", -1);
+	STEN_LOW_WAIT;
+	test = 0;
+	for (limit = 300; limit > 0; limit--) {
+		if (aztGetQChannelInfo(&qInfo) < 0)
+			RETURNM("aztGetDiskInfo 2", -1);
+		if (qInfo.pointIndex == 0xA0) {	/*Number of FirstTrack */
+			DiskInfo.first = qInfo.diskTime.min;
+			DiskInfo.first = azt_bcd2bin(DiskInfo.first);
+			test = test | 0x01;
+		}
+		if (qInfo.pointIndex == 0xA1) {	/*Number of LastTrack */
+			DiskInfo.last = qInfo.diskTime.min;
+			DiskInfo.last = azt_bcd2bin(DiskInfo.last);
+			test = test | 0x02;
+		}
+		if (qInfo.pointIndex == 0xA2) {	/*DiskLength */
+			DiskInfo.diskLength.min = qInfo.diskTime.min;
+			DiskInfo.diskLength.sec = qInfo.diskTime.sec;
+			DiskInfo.diskLength.frame = qInfo.diskTime.frame;
+			test = test | 0x04;
+		}
+		if ((qInfo.pointIndex == DiskInfo.first) && (test & 0x01)) {	/*StartTime of First Track */
+			DiskInfo.firstTrack.min = qInfo.diskTime.min;
+			DiskInfo.firstTrack.sec = qInfo.diskTime.sec;
+			DiskInfo.firstTrack.frame = qInfo.diskTime.frame;
+			test = test | 0x08;
+		}
+		if (test == 0x0F)
+			break;
+	}
+#ifdef AZT_DEBUG
+	printk("aztcd: exiting aztGetDiskInfo  Time:%li\n", jiffies);
+	printk
+	    ("Disk Info: first %d last %d length %02X:%02X.%02X dez  first %02X:%02X.%02X dez\n",
+	     DiskInfo.first, DiskInfo.last, DiskInfo.diskLength.min,
+	     DiskInfo.diskLength.sec, DiskInfo.diskLength.frame,
+	     DiskInfo.firstTrack.min, DiskInfo.firstTrack.sec,
+	     DiskInfo.firstTrack.frame);
 #endif
-  if (test!=0x0F) return -1;
-  return 0;
+	if (test != 0x0F)
+		return -1;
+	return 0;
 }
 
 #if AZT_MULTISESSION
@@ -889,93 +949,105 @@
  * Get Multisession Disk Info
  */
 static int aztGetMultiDiskInfo(void)
-{ int limit, k=5;
-  unsigned char test;
-  struct azt_Toc qInfo;
-
-#ifdef AZT_DEBUG
-  printk("aztcd: starting aztGetMultiDiskInfo\n");
-#endif
-
-  do { azt_Play.start.min   = Toc[DiskInfo.last+1].diskTime.min;
-       azt_Play.start.sec   = Toc[DiskInfo.last+1].diskTime.sec;
-       azt_Play.start.frame = Toc[DiskInfo.last+1].diskTime.frame;
-       test=0;
-
-       for (limit=30;limit>0;limit--)   /*Seek for LeadIn of next session*/
-           { if (aztSeek(&azt_Play)) RETURNM("aztGetMultiDiskInfo 1",-1);
-             if (aztGetQChannelInfo(&qInfo)<0) RETURNM("aztGetMultiDiskInfo 2",-1);
-             if ((qInfo.track==0)&&(qInfo.pointIndex)) break;  /*LeadIn found*/
-             if ((azt_Play.start.sec+=10) > 59)
-                { azt_Play.start.sec=0;
-                  azt_Play.start.min++;
-                }
-           }
-       if (!limit) break;  /*Check, if a leadin track was found, if not we're
-                             at the end of the disk*/
+{
+	int limit, k = 5;
+	unsigned char test;
+	struct azt_Toc qInfo;
+
+#ifdef AZT_DEBUG
+	printk("aztcd: starting aztGetMultiDiskInfo\n");
+#endif
+
+	do {
+		azt_Play.start.min = Toc[DiskInfo.last + 1].diskTime.min;
+		azt_Play.start.sec = Toc[DiskInfo.last + 1].diskTime.sec;
+		azt_Play.start.frame =
+		    Toc[DiskInfo.last + 1].diskTime.frame;
+		test = 0;
+
+		for (limit = 30; limit > 0; limit--) {	/*Seek for LeadIn of next session */
+			if (aztSeek(&azt_Play))
+				RETURNM("aztGetMultiDiskInfo 1", -1);
+			if (aztGetQChannelInfo(&qInfo) < 0)
+				RETURNM("aztGetMultiDiskInfo 2", -1);
+			if ((qInfo.track == 0) && (qInfo.pointIndex))
+				break;	/*LeadIn found */
+			if ((azt_Play.start.sec += 10) > 59) {
+				azt_Play.start.sec = 0;
+				azt_Play.start.min++;
+			}
+		}
+		if (!limit)
+			break;	/*Check, if a leadin track was found, if not we're
+				   at the end of the disk */
 #ifdef AZT_DEBUG_MULTISESSION
-       printk("leadin found track %d  pointIndex %x  limit %d\n",qInfo.track,qInfo.pointIndex,limit);
+		printk("leadin found track %d  pointIndex %x  limit %d\n",
+		       qInfo.track, qInfo.pointIndex, limit);
 #endif
-       for (limit=300;limit>0;limit--)
-           { if (++azt_Play.start.frame>74)
-                { azt_Play.start.frame=0;
-                  if (azt_Play.start.sec > 59)
-                     { azt_Play.start.sec=0;
-                       azt_Play.start.min++;
-                     }
-                }     
-             if (aztSeek(&azt_Play)) RETURNM("aztGetMultiDiskInfo 3",-1);
-             if (aztGetQChannelInfo(&qInfo)<0) RETURNM("aztGetMultiDiskInfo 4",-1);
-             if (qInfo.pointIndex==0xA0)   /*Number of NextTrack*/
-	        { DiskInfo.next = qInfo.diskTime.min;
-	          DiskInfo.next = azt_bcd2bin(DiskInfo.next);
-	          test=test|0x01;
-	        }
-             if (qInfo.pointIndex==0xA1)   /*Number of LastTrack*/
-	 	{ DiskInfo.last  = qInfo.diskTime.min;
-	   	  DiskInfo.last  = azt_bcd2bin(DiskInfo.last);
-	   	  test=test|0x02;
-	 	}
-      	     if (qInfo.pointIndex==0xA2)   /*DiskLength*/
-	 	{ DiskInfo.diskLength.min  =qInfo.diskTime.min;
-	   	  DiskInfo.diskLength.sec  =qInfo.diskTime.sec;
-	   	  DiskInfo.diskLength.frame=qInfo.diskTime.frame;
-	  	  test=test|0x04;
-	 	}
-      	     if ((qInfo.pointIndex==DiskInfo.next)&&(test&0x01))   /*StartTime of Next Track*/
-		{ DiskInfo.nextSession.min=qInfo.diskTime.min;
-	  	  DiskInfo.nextSession.sec=qInfo.diskTime.sec;
-	  	  DiskInfo.nextSession.frame=qInfo.diskTime.frame;
-	  	  test=test|0x08;
+		for (limit = 300; limit > 0; limit--) {
+			if (++azt_Play.start.frame > 74) {
+				azt_Play.start.frame = 0;
+				if (azt_Play.start.sec > 59) {
+					azt_Play.start.sec = 0;
+					azt_Play.start.min++;
+				}
+			}
+			if (aztSeek(&azt_Play))
+				RETURNM("aztGetMultiDiskInfo 3", -1);
+			if (aztGetQChannelInfo(&qInfo) < 0)
+				RETURNM("aztGetMultiDiskInfo 4", -1);
+			if (qInfo.pointIndex == 0xA0) {	/*Number of NextTrack */
+				DiskInfo.next = qInfo.diskTime.min;
+				DiskInfo.next = azt_bcd2bin(DiskInfo.next);
+				test = test | 0x01;
+			}
+			if (qInfo.pointIndex == 0xA1) {	/*Number of LastTrack */
+				DiskInfo.last = qInfo.diskTime.min;
+				DiskInfo.last = azt_bcd2bin(DiskInfo.last);
+				test = test | 0x02;
+			}
+			if (qInfo.pointIndex == 0xA2) {	/*DiskLength */
+				DiskInfo.diskLength.min =
+				    qInfo.diskTime.min;
+				DiskInfo.diskLength.sec =
+				    qInfo.diskTime.sec;
+				DiskInfo.diskLength.frame =
+				    qInfo.diskTime.frame;
+				test = test | 0x04;
+			}
+			if ((qInfo.pointIndex == DiskInfo.next) && (test & 0x01)) {	/*StartTime of Next Track */
+				DiskInfo.nextSession.min =
+				    qInfo.diskTime.min;
+				DiskInfo.nextSession.sec =
+				    qInfo.diskTime.sec;
+				DiskInfo.nextSession.frame =
+				    qInfo.diskTime.frame;
+				test = test | 0x08;
+			}
+			if (test == 0x0F)
+				break;
 		}
-      	     if (test==0x0F) break;
-   	   }
 #ifdef AZT_DEBUG_MULTISESSION
-       printk ("MultiDisk Info: first %d next %d last %d length %02x:%02x.%02x dez  first %02x:%02x.%02x dez  next %02x:%02x.%02x dez\n",
-     		DiskInfo.first,
-		DiskInfo.next,
-		DiskInfo.last,
-		DiskInfo.diskLength.min,
-		DiskInfo.diskLength.sec,
-		DiskInfo.diskLength.frame,
-		DiskInfo.firstTrack.min,
-		DiskInfo.firstTrack.sec,
-		DiskInfo.firstTrack.frame,
-		DiskInfo.nextSession.min,
-		DiskInfo.nextSession.sec,
-		DiskInfo.nextSession.frame);
-#endif
-       if (test!=0x0F) 
-           break;
-       else 
-           DiskInfo.multi=1;   /*found TOC of more than one session*/
-       aztGetToc(1);
-     } while(--k);
+		printk
+		    ("MultiDisk Info: first %d next %d last %d length %02x:%02x.%02x dez  first %02x:%02x.%02x dez  next %02x:%02x.%02x dez\n",
+		     DiskInfo.first, DiskInfo.next, DiskInfo.last,
+		     DiskInfo.diskLength.min, DiskInfo.diskLength.sec,
+		     DiskInfo.diskLength.frame, DiskInfo.firstTrack.min,
+		     DiskInfo.firstTrack.sec, DiskInfo.firstTrack.frame,
+		     DiskInfo.nextSession.min, DiskInfo.nextSession.sec,
+		     DiskInfo.nextSession.frame);
+#endif
+		if (test != 0x0F)
+			break;
+		else
+			DiskInfo.multi = 1;	/*found TOC of more than one session */
+		aztGetToc(1);
+	} while (--k);
 
 #ifdef AZT_DEBUG
-  printk ("aztcd: exiting aztGetMultiDiskInfo  Time:%li\n",jiffies);
+	printk("aztcd: exiting aztGetMultiDiskInfo  Time:%li\n", jiffies);
 #endif
-  return 0;
+	return 0;
 }
 #endif
 
@@ -983,75 +1055,81 @@
  * Read the table of contents (TOC)
  */
 static int aztGetToc(int multi)
-{ int i, px;
-  int limit;
-  struct azt_Toc qInfo;
-
-#ifdef AZT_DEBUG
-  printk("aztcd: starting aztGetToc  Time:%li\n",jiffies);
-#endif
-  if (!multi)
-     { for (i = 0; i < MAX_TRACKS; i++)
- 	    Toc[i].pointIndex = 0;
-       i = DiskInfo.last + 3;
-     }
-  else
-     { for (i = DiskInfo.next; i < MAX_TRACKS; i++)
-     	    Toc[i].pointIndex = 0; 
-       i = DiskInfo.last + 4 - DiskInfo.next;
-     }
+{
+	int i, px;
+	int limit;
+	struct azt_Toc qInfo;
+
+#ifdef AZT_DEBUG
+	printk("aztcd: starting aztGetToc  Time:%li\n", jiffies);
+#endif
+	if (!multi) {
+		for (i = 0; i < MAX_TRACKS; i++)
+			Toc[i].pointIndex = 0;
+		i = DiskInfo.last + 3;
+	} else {
+		for (i = DiskInfo.next; i < MAX_TRACKS; i++)
+			Toc[i].pointIndex = 0;
+		i = DiskInfo.last + 4 - DiskInfo.next;
+	}
 
 /*Is there a good reason to stop motor before TOC read?
   if (aztSendCmd(ACMD_STOP)) RETURNM("aztGetToc 1",-1);
       STEN_LOW_WAIT;
 */
 
-  if (!multi)
-     { azt_mode = 0x05;
-       if (aztSendCmd(ACMD_SEEK_TO_LEADIN)) RETURNM("aztGetToc 2",-1);
-       STEN_LOW_WAIT;
-     }
-  for (limit = 300; limit > 0; limit--)
-      { if (multi)
-           { if (++azt_Play.start.sec > 59)
-                { azt_Play.start.sec=0;
-                  azt_Play.start.min++;
-                }
-             if (aztSeek(&azt_Play)) RETURNM("aztGetToc 3",-1);
-           }
-	if (aztGetQChannelInfo(&qInfo) < 0)
-	    break;
-
-	px = azt_bcd2bin(qInfo.pointIndex);
-
-	if (px > 0 && px < MAX_TRACKS && qInfo.track == 0)
-  	    if (Toc[px].pointIndex == 0)
-	       { Toc[px] = qInfo;
-		 i--;
-	       }
-
-	if (i <= 0)
-	    break;
-      }
-
-  Toc[DiskInfo.last + 1].diskTime = DiskInfo.diskLength;
-  Toc[DiskInfo.last].trackTime    = DiskInfo.diskLength;
-
-#ifdef AZT_DEBUG_MULTISESSION 
-  printk("aztcd: exiting aztGetToc\n");
-  for (i = 1; i <= DiskInfo.last+1; i++)
-       printk("i = %2d ctl-adr = %02X track %2d px %02X %02X:%02X.%02X dez  %02X:%02X.%02X dez\n",
-               i, Toc[i].ctrl_addr, Toc[i].track, Toc[i].pointIndex,
-               Toc[i].trackTime.min, Toc[i].trackTime.sec, Toc[i].trackTime.frame,
-               Toc[i].diskTime.min, Toc[i].diskTime.sec, Toc[i].diskTime.frame);
-  for (i = 100; i < 103; i++)
-       printk("i = %2d ctl-adr = %02X track %2d px %02X %02X:%02X.%02X dez  %02X:%02X.%02X dez\n",
-               i, Toc[i].ctrl_addr, Toc[i].track, Toc[i].pointIndex,
-               Toc[i].trackTime.min, Toc[i].trackTime.sec, Toc[i].trackTime.frame,
-               Toc[i].diskTime.min, Toc[i].diskTime.sec, Toc[i].diskTime.frame);
+	if (!multi) {
+		azt_mode = 0x05;
+		if (aztSendCmd(ACMD_SEEK_TO_LEADIN))
+			RETURNM("aztGetToc 2", -1);
+		STEN_LOW_WAIT;
+	}
+	for (limit = 300; limit > 0; limit--) {
+		if (multi) {
+			if (++azt_Play.start.sec > 59) {
+				azt_Play.start.sec = 0;
+				azt_Play.start.min++;
+			}
+			if (aztSeek(&azt_Play))
+				RETURNM("aztGetToc 3", -1);
+		}
+		if (aztGetQChannelInfo(&qInfo) < 0)
+			break;
+
+		px = azt_bcd2bin(qInfo.pointIndex);
+
+		if (px > 0 && px < MAX_TRACKS && qInfo.track == 0)
+			if (Toc[px].pointIndex == 0) {
+				Toc[px] = qInfo;
+				i--;
+			}
+
+		if (i <= 0)
+			break;
+	}
+
+	Toc[DiskInfo.last + 1].diskTime = DiskInfo.diskLength;
+	Toc[DiskInfo.last].trackTime = DiskInfo.diskLength;
+
+#ifdef AZT_DEBUG_MULTISESSION
+	printk("aztcd: exiting aztGetToc\n");
+	for (i = 1; i <= DiskInfo.last + 1; i++)
+		printk
+		    ("i = %2d ctl-adr = %02X track %2d px %02X %02X:%02X.%02X dez  %02X:%02X.%02X dez\n",
+		     i, Toc[i].ctrl_addr, Toc[i].track, Toc[i].pointIndex,
+		     Toc[i].trackTime.min, Toc[i].trackTime.sec,
+		     Toc[i].trackTime.frame, Toc[i].diskTime.min,
+		     Toc[i].diskTime.sec, Toc[i].diskTime.frame);
+	for (i = 100; i < 103; i++)
+		printk
+		    ("i = %2d ctl-adr = %02X track %2d px %02X %02X:%02X.%02X dez  %02X:%02X.%02X dez\n",
+		     i, Toc[i].ctrl_addr, Toc[i].track, Toc[i].pointIndex,
+		     Toc[i].trackTime.min, Toc[i].trackTime.sec,
+		     Toc[i].trackTime.frame, Toc[i].diskTime.min,
+		     Toc[i].diskTime.sec, Toc[i].diskTime.frame);
 #endif
 
-  return limit > 0 ? 0 : -1;
+	return limit > 0 ? 0 : -1;
 }
 
 
@@ -1063,160 +1141,185 @@
 #ifndef MODULE
 static int __init aztcd_setup(char *str)
 {
-    int ints[4];
-    
-    (void)get_options(str, ARRAY_SIZE(ints), ints);
-    
-    if (ints[0] > 0)
-        azt_port = ints[1];
-    if (ints[1] > 1)
-        azt_cont = ints[2];
-    return 1;
+	int ints[4];
+
+	(void) get_options(str, ARRAY_SIZE(ints), ints);
+
+	if (ints[0] > 0)
+		azt_port = ints[1];
+	if (ints[1] > 1)
+		azt_cont = ints[2];
+	return 1;
 }
 
 __setup("aztcd=", aztcd_setup);
 
-#endif /* !MODULE */
+#endif				/* !MODULE */
 
 /* 
  * Checking if the media has been changed
 */
 static int check_aztcd_media_change(kdev_t full_dev)
-{ if (aztDiskChanged)          /* disk changed */
-     { aztDiskChanged=0;
-       return 1;
-     }
-  else
-       return 0;               /* no change */
+{
+	if (aztDiskChanged) {	/* disk changed */
+		aztDiskChanged = 0;
+		return 1;
+	} else
+		return 0;	/* no change */
 }
 
 /*
  * Kernel IO-controls
 */
-static int aztcd_ioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg)
-{       int i;
+static int aztcd_ioctl(struct inode *ip, struct file *fp, unsigned int cmd,
+		       unsigned long arg)
+{
+	int i;
 	struct azt_Toc qInfo;
 	struct cdrom_ti ti;
 	struct cdrom_tochdr tocHdr;
 	struct cdrom_msf msf;
 	struct cdrom_tocentry entry;
-	struct azt_Toc *tocPtr;            
+	struct azt_Toc *tocPtr;
 	struct cdrom_subchnl subchnl;
-        struct cdrom_volctrl volctrl;
+	struct cdrom_volctrl volctrl;
 
 #ifdef AZT_DEBUG
-	printk("aztcd: starting aztcd_ioctl - Command:%x   Time: %li\n",cmd, jiffies);
-        printk("aztcd Status %x\n", getAztStatus());
-#endif
-	if (!ip) RETURNM("aztcd_ioctl 1",-EINVAL);
-	if (getAztStatus()<0) RETURNM("aztcd_ioctl 2", -EIO);
-	if ((!aztTocUpToDate)||(aztDiskChanged))
-	{ if ((i=aztUpdateToc())<0) RETURNM("aztcd_ioctl 3", i); /* error reading TOC */
+	printk("aztcd: starting aztcd_ioctl - Command:%x   Time: %li\n",
+	       cmd, jiffies);
+	printk("aztcd Status %x\n", getAztStatus());
+#endif
+	if (!ip)
+		RETURNM("aztcd_ioctl 1", -EINVAL);
+	if (getAztStatus() < 0)
+		RETURNM("aztcd_ioctl 2", -EIO);
+	if ((!aztTocUpToDate) || (aztDiskChanged)) {
+		if ((i = aztUpdateToc()) < 0)
+			RETURNM("aztcd_ioctl 3", i);	/* error reading TOC */
 	}
 
-	switch (cmd)
-	{
-	case CDROMSTART:     /* Spin up the drive. Don't know, what to do,
-	                        at least close the tray */
-#if AZT_PRIVATE_IOCTLS 
-	        if (aztSendCmd(ACMD_CLOSE)) RETURNM("aztcd_ioctl 4",-1);
-	        STEN_LOW_WAIT;
+	switch (cmd) {
+	case CDROMSTART:	/* Spin up the drive. Don't know, what to do,
+				   at least close the tray */
+#if AZT_PRIVATE_IOCTLS
+		if (aztSendCmd(ACMD_CLOSE))
+			RETURNM("aztcd_ioctl 4", -1);
+		STEN_LOW_WAIT;
 #endif
 		break;
-	case CDROMSTOP:      /* Spin down the drive */
-		if (aztSendCmd(ACMD_STOP)) RETURNM("aztcd_ioctl 5",-1);
+	case CDROMSTOP:	/* Spin down the drive */
+		if (aztSendCmd(ACMD_STOP))
+			RETURNM("aztcd_ioctl 5", -1);
 		STEN_LOW_WAIT;
 		/* should we do anything if it fails? */
 		aztAudioStatus = CDROM_AUDIO_NO_STATUS;
 		break;
-	case CDROMPAUSE:     /* Pause the drive */
-                if (aztAudioStatus != CDROM_AUDIO_PLAY) return -EINVAL; 
-
-		if (aztGetQChannelInfo(&qInfo) < 0)
-		{ /* didn't get q channel info */
-		  aztAudioStatus = CDROM_AUDIO_NO_STATUS;
-		  RETURNM("aztcd_ioctl 7",0);
+	case CDROMPAUSE:	/* Pause the drive */
+		if (aztAudioStatus != CDROM_AUDIO_PLAY)
+			return -EINVAL;
+
+		if (aztGetQChannelInfo(&qInfo) < 0) {	/* didn't get q channel info */
+			aztAudioStatus = CDROM_AUDIO_NO_STATUS;
+			RETURNM("aztcd_ioctl 7", 0);
 		}
-		azt_Play.start = qInfo.diskTime;        /* remember restart point */
+		azt_Play.start = qInfo.diskTime;	/* remember restart point */
 
-		if (aztSendCmd(ACMD_PAUSE)) RETURNM("aztcd_ioctl 8",-1);
+		if (aztSendCmd(ACMD_PAUSE))
+			RETURNM("aztcd_ioctl 8", -1);
 		STEN_LOW_WAIT;
 		aztAudioStatus = CDROM_AUDIO_PAUSED;
 		break;
-	case CDROMRESUME:    /* Play it again, Sam */
-		if (aztAudioStatus != CDROM_AUDIO_PAUSED) return -EINVAL;
+	case CDROMRESUME:	/* Play it again, Sam */
+		if (aztAudioStatus != CDROM_AUDIO_PAUSED)
+			return -EINVAL;
 		/* restart the drive at the saved position. */
 		i = aztPlay(&azt_Play);
-		if (i < 0)
-		{ aztAudioStatus = CDROM_AUDIO_ERROR;
-		  return -EIO;
+		if (i < 0) {
+			aztAudioStatus = CDROM_AUDIO_ERROR;
+			return -EIO;
 		}
 		aztAudioStatus = CDROM_AUDIO_PLAY;
 		break;
-	case CDROMMULTISESSION: /*multisession support -- experimental*/
-	        { struct cdrom_multisession ms;
-#ifdef AZT_DEBUG
-   		  printk("aztcd ioctl MULTISESSION\n");
-#endif
-		  if(copy_from_user(&ms, (void*) arg, sizeof(struct cdrom_multisession)))
-	  		return -EFAULT;
-		  if (ms.addr_format == CDROM_MSF) 
-		     { ms.addr.msf.minute = azt_bcd2bin(DiskInfo.lastSession.min);
-		       ms.addr.msf.second = azt_bcd2bin(DiskInfo.lastSession.sec);
-		       ms.addr.msf.frame  = azt_bcd2bin(DiskInfo.lastSession.frame);
-		     } 
-		  else if (ms.addr_format == CDROM_LBA)
-		       ms.addr.lba = azt_msf2hsg(&DiskInfo.lastSession);
-		  else
-		       return -EINVAL;
-		  ms.xa_flag = DiskInfo.xa;
-	  	  if(copy_to_user((void*) arg, &ms, sizeof(struct cdrom_multisession)))
-			return -EFAULT;
-#ifdef AZT_DEBUG 
- 		  if (ms.addr_format == CDROM_MSF) 
-                      printk("aztcd multisession xa:%d, msf:%02x:%02x.%02x [%02x:%02x.%02x])\n",
-			      ms.xa_flag, ms.addr.msf.minute, ms.addr.msf.second, 
-			      ms.addr.msf.frame, DiskInfo.lastSession.min,
-			      DiskInfo.lastSession.sec, DiskInfo.lastSession.frame);
-		  else
-		      printk("aztcd multisession %d, lba:0x%08x [%02x:%02x.%02x])\n",
-			      ms.xa_flag, ms.addr.lba, DiskInfo.lastSession.min,
-			      DiskInfo.lastSession.sec, DiskInfo.lastSession.frame);
+	case CDROMMULTISESSION:	/*multisession support -- experimental */
+		{
+			struct cdrom_multisession ms;
+#ifdef AZT_DEBUG
+			printk("aztcd ioctl MULTISESSION\n");
+#endif
+			if (copy_from_user
+			    (&ms, (void *) arg,
+			     sizeof(struct cdrom_multisession)))
+				return -EFAULT;
+			if (ms.addr_format == CDROM_MSF) {
+				ms.addr.msf.minute =
+				    azt_bcd2bin(DiskInfo.lastSession.min);
+				ms.addr.msf.second =
+				    azt_bcd2bin(DiskInfo.lastSession.sec);
+				ms.addr.msf.frame =
+				    azt_bcd2bin(DiskInfo.lastSession.
+						frame);
+			} else if (ms.addr_format == CDROM_LBA)
+				ms.addr.lba =
+				    azt_msf2hsg(&DiskInfo.lastSession);
+			else
+				return -EINVAL;
+			ms.xa_flag = DiskInfo.xa;
+			if (copy_to_user
+			    ((void *) arg, &ms,
+			     sizeof(struct cdrom_multisession)))
+				return -EFAULT;
+#ifdef AZT_DEBUG
+			if (ms.addr_format == CDROM_MSF)
+				printk
+				    ("aztcd multisession xa:%d, msf:%02x:%02x.%02x [%02x:%02x.%02x])\n",
+				     ms.xa_flag, ms.addr.msf.minute,
+				     ms.addr.msf.second, ms.addr.msf.frame,
+				     DiskInfo.lastSession.min,
+				     DiskInfo.lastSession.sec,
+				     DiskInfo.lastSession.frame);
+			else
+				printk
+				    ("aztcd multisession %d, lba:0x%08x [%02x:%02x.%02x])\n",
+				     ms.xa_flag, ms.addr.lba,
+				     DiskInfo.lastSession.min,
+				     DiskInfo.lastSession.sec,
+				     DiskInfo.lastSession.frame);
 #endif
-   		  return 0;
+			return 0;
 		}
-	case CDROMPLAYTRKIND:     /* Play a track.  This currently ignores index. */
-		if(copy_from_user(&ti, (void *) arg, sizeof ti))
+	case CDROMPLAYTRKIND:	/* Play a track.  This currently ignores index. */
+		if (copy_from_user(&ti, (void *) arg, sizeof ti))
 			return -EFAULT;
 		if (ti.cdti_trk0 < DiskInfo.first
-			|| ti.cdti_trk0 > DiskInfo.last
-			|| ti.cdti_trk1 < ti.cdti_trk0)
-		{ return -EINVAL;
+		    || ti.cdti_trk0 > DiskInfo.last
+		    || ti.cdti_trk1 < ti.cdti_trk0) {
+			return -EINVAL;
 		}
 		if (ti.cdti_trk1 > DiskInfo.last)
-		    ti.cdti_trk1 = DiskInfo.last;
+			ti.cdti_trk1 = DiskInfo.last;
 		azt_Play.start = Toc[ti.cdti_trk0].diskTime;
 		azt_Play.end = Toc[ti.cdti_trk1 + 1].diskTime;
 #ifdef AZT_DEBUG
-printk("aztcd play: %02x:%02x.%02x to %02x:%02x.%02x\n",
-	azt_Play.start.min, azt_Play.start.sec, azt_Play.start.frame,
-	azt_Play.end.min, azt_Play.end.sec, azt_Play.end.frame);
+		printk("aztcd play: %02x:%02x.%02x to %02x:%02x.%02x\n",
+		       azt_Play.start.min, azt_Play.start.sec,
+		       azt_Play.start.frame, azt_Play.end.min,
+		       azt_Play.end.sec, azt_Play.end.frame);
 #endif
 		i = aztPlay(&azt_Play);
-		if (i < 0)
-		{ aztAudioStatus = CDROM_AUDIO_ERROR;
-		  return -EIO;
+		if (i < 0) {
+			aztAudioStatus = CDROM_AUDIO_ERROR;
+			return -EIO;
 		}
 		aztAudioStatus = CDROM_AUDIO_PLAY;
 		break;
-	case CDROMPLAYMSF:   /* Play starting at the given MSF address. */
+	case CDROMPLAYMSF:	/* Play starting at the given MSF address. */
 /*              if (aztAudioStatus == CDROM_AUDIO_PLAY) 
 		{ if (aztSendCmd(ACMD_STOP)) RETURNM("aztcd_ioctl 9",-1);
 		  STEN_LOW;
 		  aztAudioStatus = CDROM_AUDIO_NO_STATUS;
 		}
 */
-		if(copy_from_user(&msf, (void *) arg, sizeof msf))
+		if (copy_from_user(&msf, (void *) arg, sizeof msf))
 			return -EFAULT;
 		/* convert to bcd */
 		azt_bin2bcd(&msf.cdmsf_min0);
@@ -1232,163 +1335,189 @@
 		azt_Play.end.sec = msf.cdmsf_sec1;
 		azt_Play.end.frame = msf.cdmsf_frame1;
 #ifdef AZT_DEBUG
-printk("aztcd play: %02x:%02x.%02x to %02x:%02x.%02x\n",
-azt_Play.start.min, azt_Play.start.sec, azt_Play.start.frame,
-azt_Play.end.min, azt_Play.end.sec, azt_Play.end.frame);
+		printk("aztcd play: %02x:%02x.%02x to %02x:%02x.%02x\n",
+		       azt_Play.start.min, azt_Play.start.sec,
+		       azt_Play.start.frame, azt_Play.end.min,
+		       azt_Play.end.sec, azt_Play.end.frame);
 #endif
 		i = aztPlay(&azt_Play);
-		if (i < 0)
-		{ aztAudioStatus = CDROM_AUDIO_ERROR;
-		  return -EIO;
+		if (i < 0) {
+			aztAudioStatus = CDROM_AUDIO_ERROR;
+			return -EIO;
 		}
 		aztAudioStatus = CDROM_AUDIO_PLAY;
 		break;
 
-	case CDROMREADTOCHDR:        /* Read the table of contents header */
+	case CDROMREADTOCHDR:	/* Read the table of contents header */
 		tocHdr.cdth_trk0 = DiskInfo.first;
 		tocHdr.cdth_trk1 = DiskInfo.last;
-		if(copy_to_user((void *) arg, &tocHdr, sizeof tocHdr))
+		if (copy_to_user((void *) arg, &tocHdr, sizeof tocHdr))
 			return -EFAULT;
 		break;
-	case CDROMREADTOCENTRY:      /* Read an entry in the table of contents */
-		if(copy_from_user(&entry, (void *) arg, sizeof entry))
+	case CDROMREADTOCENTRY:	/* Read an entry in the table of contents */
+		if (copy_from_user(&entry, (void *) arg, sizeof entry))
 			return -EFAULT;
-		if ((!aztTocUpToDate)||aztDiskChanged) aztUpdateToc();
+		if ((!aztTocUpToDate) || aztDiskChanged)
+			aztUpdateToc();
 		if (entry.cdte_track == CDROM_LEADOUT)
-		  tocPtr = &Toc[DiskInfo.last + 1];
+			tocPtr = &Toc[DiskInfo.last + 1];
 		else if (entry.cdte_track > DiskInfo.last
-				|| entry.cdte_track < DiskInfo.first)
-		{ return -EINVAL;
-		}
-		else 
-		  tocPtr = &Toc[entry.cdte_track];
-		entry.cdte_adr = tocPtr -> ctrl_addr;
-		entry.cdte_ctrl = tocPtr -> ctrl_addr >> 4;
+			 || entry.cdte_track < DiskInfo.first) {
+			return -EINVAL;
+		} else
+			tocPtr = &Toc[entry.cdte_track];
+		entry.cdte_adr = tocPtr->ctrl_addr;
+		entry.cdte_ctrl = tocPtr->ctrl_addr >> 4;
 		if (entry.cdte_format == CDROM_LBA)
-		  entry.cdte_addr.lba = azt_msf2hsg(&tocPtr -> diskTime);
-		else if (entry.cdte_format == CDROM_MSF)
-		{ entry.cdte_addr.msf.minute = azt_bcd2bin(tocPtr -> diskTime.min);
-		  entry.cdte_addr.msf.second = azt_bcd2bin(tocPtr -> diskTime.sec);
-		  entry.cdte_addr.msf.frame  = azt_bcd2bin(tocPtr -> diskTime.frame);
-		}
-		else
-		{ return -EINVAL;
+			entry.cdte_addr.lba =
+			    azt_msf2hsg(&tocPtr->diskTime);
+		else if (entry.cdte_format == CDROM_MSF) {
+			entry.cdte_addr.msf.minute =
+			    azt_bcd2bin(tocPtr->diskTime.min);
+			entry.cdte_addr.msf.second =
+			    azt_bcd2bin(tocPtr->diskTime.sec);
+			entry.cdte_addr.msf.frame =
+			    azt_bcd2bin(tocPtr->diskTime.frame);
+		} else {
+			return -EINVAL;
 		}
-		if(copy_to_user((void *) arg, &entry, sizeof entry))
+		if (copy_to_user((void *) arg, &entry, sizeof entry))
 			return -EFAULT;
 		break;
-	case CDROMSUBCHNL:   /* Get subchannel info */
-		if(copy_from_user(&subchnl, (void *) arg, sizeof (struct cdrom_subchnl)))
+	case CDROMSUBCHNL:	/* Get subchannel info */
+		if (copy_from_user
+		    (&subchnl, (void *) arg, sizeof(struct cdrom_subchnl)))
 			return -EFAULT;
 		if (aztGetQChannelInfo(&qInfo) < 0) {
 #ifdef AZT_DEBUG
-		          printk("aztcd: exiting aztcd_ioctl - Error 3 - Command:%x\n",cmd);
+			printk
+			    ("aztcd: exiting aztcd_ioctl - Error 3 - Command:%x\n",
+			     cmd);
 #endif
-     		  	  return -EIO;
-     		  	}  
+			return -EIO;
+		}
 		subchnl.cdsc_audiostatus = aztAudioStatus;
 		subchnl.cdsc_adr = qInfo.ctrl_addr;
 		subchnl.cdsc_ctrl = qInfo.ctrl_addr >> 4;
 		subchnl.cdsc_trk = azt_bcd2bin(qInfo.track);
 		subchnl.cdsc_ind = azt_bcd2bin(qInfo.pointIndex);
-		if (subchnl.cdsc_format == CDROM_LBA)
-		{ subchnl.cdsc_absaddr.lba = azt_msf2hsg(&qInfo.diskTime);
-		  subchnl.cdsc_reladdr.lba = azt_msf2hsg(&qInfo.trackTime);
-		}
-		else  /*default*/
-		{ subchnl.cdsc_format = CDROM_MSF;
-		  subchnl.cdsc_absaddr.msf.minute = azt_bcd2bin(qInfo.diskTime.min);
-		  subchnl.cdsc_absaddr.msf.second = azt_bcd2bin(qInfo.diskTime.sec);
-		  subchnl.cdsc_absaddr.msf.frame  = azt_bcd2bin(qInfo.diskTime.frame);
-		  subchnl.cdsc_reladdr.msf.minute = azt_bcd2bin(qInfo.trackTime.min);
-		  subchnl.cdsc_reladdr.msf.second = azt_bcd2bin(qInfo.trackTime.sec);
-		  subchnl.cdsc_reladdr.msf.frame  = azt_bcd2bin(qInfo.trackTime.frame);
+		if (subchnl.cdsc_format == CDROM_LBA) {
+			subchnl.cdsc_absaddr.lba =
+			    azt_msf2hsg(&qInfo.diskTime);
+			subchnl.cdsc_reladdr.lba =
+			    azt_msf2hsg(&qInfo.trackTime);
+		} else {	/*default */
+			subchnl.cdsc_format = CDROM_MSF;
+			subchnl.cdsc_absaddr.msf.minute =
+			    azt_bcd2bin(qInfo.diskTime.min);
+			subchnl.cdsc_absaddr.msf.second =
+			    azt_bcd2bin(qInfo.diskTime.sec);
+			subchnl.cdsc_absaddr.msf.frame =
+			    azt_bcd2bin(qInfo.diskTime.frame);
+			subchnl.cdsc_reladdr.msf.minute =
+			    azt_bcd2bin(qInfo.trackTime.min);
+			subchnl.cdsc_reladdr.msf.second =
+			    azt_bcd2bin(qInfo.trackTime.sec);
+			subchnl.cdsc_reladdr.msf.frame =
+			    azt_bcd2bin(qInfo.trackTime.frame);
 		}
-		if(copy_to_user((void *) arg, &subchnl, sizeof (struct cdrom_subchnl)))
+		if (copy_to_user
+		    ((void *) arg, &subchnl, sizeof(struct cdrom_subchnl)))
 			return -EFAULT;
 		break;
-	case CDROMVOLCTRL:   /* Volume control 
-	 * With my Aztech CD268-01A volume control does not work, I can only
-	   turn the channels on (any value !=0) or off (value==0). Maybe it
-           works better with your drive */
-                if(copy_from_user(&volctrl,(char *) arg,sizeof(volctrl)))
-                	return -EFAULT;
+	case CDROMVOLCTRL:	/* Volume control 
+				   * With my Aztech CD268-01A volume control does not work, I can only
+				   turn the channels on (any value !=0) or off (value==0). Maybe it
+				   works better with your drive */
+		if (copy_from_user
+		    (&volctrl, (char *) arg, sizeof(volctrl)))
+			return -EFAULT;
 		azt_Play.start.min = 0x21;
 		azt_Play.start.sec = 0x84;
 		azt_Play.start.frame = volctrl.channel0;
-		azt_Play.end.min =     volctrl.channel1;
-		azt_Play.end.sec =     volctrl.channel2;
-		azt_Play.end.frame =   volctrl.channel3;
-                sendAztCmd(ACMD_SET_VOLUME, &azt_Play);
-                STEN_LOW_WAIT;
-                break;
+		azt_Play.end.min = volctrl.channel1;
+		azt_Play.end.sec = volctrl.channel2;
+		azt_Play.end.frame = volctrl.channel3;
+		sendAztCmd(ACMD_SET_VOLUME, &azt_Play);
+		STEN_LOW_WAIT;
+		break;
 	case CDROMEJECT:
-                aztUnlockDoor(); /* Assume user knows what they're doing */
-	       /* all drives can at least stop! */
-		if (aztAudioStatus == CDROM_AUDIO_PLAY) 
-		{ if (aztSendCmd(ACMD_STOP)) RETURNM("azt_ioctl 10",-1);
-		  STEN_LOW_WAIT;
+		aztUnlockDoor();	/* Assume user knows what they're doing */
+		/* all drives can at least stop! */
+		if (aztAudioStatus == CDROM_AUDIO_PLAY) {
+			if (aztSendCmd(ACMD_STOP))
+				RETURNM("azt_ioctl 10", -1);
+			STEN_LOW_WAIT;
 		}
-		if (aztSendCmd(ACMD_EJECT)) RETURNM("azt_ioctl 11",-1);
+		if (aztSendCmd(ACMD_EJECT))
+			RETURNM("azt_ioctl 11", -1);
 		STEN_LOW_WAIT;
 		aztAudioStatus = CDROM_AUDIO_NO_STATUS;
 		break;
 	case CDROMEJECT_SW:
 		azt_auto_eject = (char) arg;
-		break;	
-        case CDROMRESET:
-        	outb(ACMD_SOFT_RESET,CMD_PORT);   /*send reset*/
-	        STEN_LOW;
-	        if (inb(DATA_PORT)!=AFL_OP_OK)    /*OP_OK?*/
-	          { printk("aztcd: AZTECH CD-ROM drive does not respond\n");
-                  }
-                break;
+		break;
+	case CDROMRESET:
+		outb(ACMD_SOFT_RESET, CMD_PORT);	/*send reset */
+		STEN_LOW;
+		if (inb(DATA_PORT) != AFL_OP_OK) {	/*OP_OK? */
+			printk
+			    ("aztcd: AZTECH CD-ROM drive does not respond\n");
+		}
+		break;
 /*Take care, the following code is not compatible with other CD-ROM drivers,
   use it at your own risk with cdplay.c. Set AZT_PRIVATE_IOCTLS to 0 in aztcd.h,
   if you do not want to use it!
-*/                  
-#if AZT_PRIVATE_IOCTLS 
-	case CDROMREADCOOKED: /*read data in mode 1 (2048 Bytes)*/
-	case CDROMREADRAW:    /*read data in mode 2 (2336 Bytes)*/
-		{ 
-		  if(copy_from_user(&msf, (void *) arg, sizeof msf))
-	  		return -EFAULT;
-		  /* convert to bcd */
-		  azt_bin2bcd(&msf.cdmsf_min0);
-		  azt_bin2bcd(&msf.cdmsf_sec0);
-		  azt_bin2bcd(&msf.cdmsf_frame0);
-		  msf.cdmsf_min1=0;
-		  msf.cdmsf_sec1=0;
-		  msf.cdmsf_frame1=1; /*read only one frame*/
-		  azt_Play.start.min = msf.cdmsf_min0;
-		  azt_Play.start.sec = msf.cdmsf_sec0;
-		  azt_Play.start.frame = msf.cdmsf_frame0;
-		  azt_Play.end.min = msf.cdmsf_min1;
-		  azt_Play.end.sec = msf.cdmsf_sec1;
-		  azt_Play.end.frame = msf.cdmsf_frame1;
-		  if (cmd==CDROMREADRAW)
-		  { if (DiskInfo.xa)
-		       { return -1;         /*XA Disks can't be read raw*/
-		       }
-		    else   
-		       { if (sendAztCmd(ACMD_PLAY_READ_RAW, &azt_Play)) return -1;
-		         DTEN_LOW;
-		         insb(DATA_PORT,buf,CD_FRAMESIZE_RAW);
-		         if(copy_to_user((void *) arg, &buf, CD_FRAMESIZE_RAW))
-	         		return -EFAULT;
-		       }  
-		  }
-		  else /*CDROMREADCOOKED*/
-		  { if (sendAztCmd(ACMD_PLAY_READ, &azt_Play)) return -1;
-		    DTEN_LOW;
-		    insb(DATA_PORT,buf,CD_FRAMESIZE);
-		    if(copy_to_user((void *) arg, &buf, CD_FRAMESIZE))
-	    		return -EFAULT;
-		  }
-		 } 
-                break;
-	case CDROMSEEK:    /*seek msf address*/
-		if(copy_from_user(&msf, (void *) arg, sizeof msf))
+*/
+#if AZT_PRIVATE_IOCTLS
+	case CDROMREADCOOKED:	/*read data in mode 1 (2048 Bytes) */
+	case CDROMREADRAW:	/*read data in mode 2 (2336 Bytes) */
+		{
+			if (copy_from_user(&msf, (void *) arg, sizeof msf))
+				return -EFAULT;
+			/* convert to bcd */
+			azt_bin2bcd(&msf.cdmsf_min0);
+			azt_bin2bcd(&msf.cdmsf_sec0);
+			azt_bin2bcd(&msf.cdmsf_frame0);
+			msf.cdmsf_min1 = 0;
+			msf.cdmsf_sec1 = 0;
+			msf.cdmsf_frame1 = 1;	/*read only one frame */
+			azt_Play.start.min = msf.cdmsf_min0;
+			azt_Play.start.sec = msf.cdmsf_sec0;
+			azt_Play.start.frame = msf.cdmsf_frame0;
+			azt_Play.end.min = msf.cdmsf_min1;
+			azt_Play.end.sec = msf.cdmsf_sec1;
+			azt_Play.end.frame = msf.cdmsf_frame1;
+			if (cmd == CDROMREADRAW) {
+				if (DiskInfo.xa) {
+					return -1;	/*XA Disks can't be read raw */
+				} else {
+					if (sendAztCmd
+					    (ACMD_PLAY_READ_RAW,
+					     &azt_Play))
+						return -1;
+					DTEN_LOW;
+					insb(DATA_PORT, buf,
+					     CD_FRAMESIZE_RAW);
+					if (copy_to_user
+					    ((void *) arg, &buf,
+					     CD_FRAMESIZE_RAW))
+						return -EFAULT;
+				}
+			} else
+				/*CDROMREADCOOKED*/ {
+				if (sendAztCmd(ACMD_PLAY_READ, &azt_Play))
+					return -1;
+				DTEN_LOW;
+				insb(DATA_PORT, buf, CD_FRAMESIZE);
+				if (copy_to_user
+				    ((void *) arg, &buf, CD_FRAMESIZE))
+					return -EFAULT;
+				}
+		}
+		break;
+	case CDROMSEEK:	/*seek msf address */
+		if (copy_from_user(&msf, (void *) arg, sizeof msf))
 			return -EFAULT;
 		/* convert to bcd */
 		azt_bin2bcd(&msf.cdmsf_min0);
@@ -1397,18 +1526,20 @@
 		azt_Play.start.min = msf.cdmsf_min0;
 		azt_Play.start.sec = msf.cdmsf_sec0;
 		azt_Play.start.frame = msf.cdmsf_frame0;
-		if (aztSeek(&azt_Play)) return -1;
-                break;
-#endif /*end of incompatible code*/       
-	case CDROMREADMODE1: /*set read data in mode 1*/
-                return aztSetDiskType(AZT_MODE_1);
-	case CDROMREADMODE2: /*set read data in mode 2*/
-                return aztSetDiskType(AZT_MODE_2);	    
+		if (aztSeek(&azt_Play))
+			return -1;
+		break;
+#endif				/*end of incompatible code */
+	case CDROMREADMODE1:	/*set read data in mode 1 */
+		return aztSetDiskType(AZT_MODE_1);
+	case CDROMREADMODE2:	/*set read data in mode 2 */
+		return aztSetDiskType(AZT_MODE_2);
 	default:
 		return -EINVAL;
 	}
 #ifdef AZT_DEBUG
-        printk("aztcd: exiting aztcd_ioctl Command:%x  Time:%li\n",cmd,jiffies);
+	printk("aztcd: exiting aztcd_ioctl Command:%x  Time:%li\n", cmd,
+	       jiffies);
 #endif
 	return 0;
 }
@@ -1418,131 +1549,139 @@
  * When Linux gets variable block sizes this will probably go away.
  */
 static void azt_transfer(void)
-{ 
+{
 #ifdef AZT_TEST
-  printk("aztcd: executing azt_transfer Time:%li\n",jiffies);
+	printk("aztcd: executing azt_transfer Time:%li\n", jiffies);
 #endif
-  if (CURRENT_VALID) {
-    while (CURRENT -> nr_sectors) {
-      int bn = CURRENT -> sector / 4;
-      int i;
-      for (i = 0; i < AZT_BUF_SIZ && azt_buf_bn[i] != bn; ++i)
-	;
-      if (i < AZT_BUF_SIZ) {
-	int offs = (i * 4 + (CURRENT -> sector & 3)) * 512;
-	int nr_sectors = 4 - (CURRENT -> sector & 3);
-	if (azt_buf_out != i) {
-	  azt_buf_out = i;
-	  if (azt_buf_bn[i] != bn) {
-	    azt_buf_out = -1;
-	    continue;
-	  }
-	}
-	if (nr_sectors > CURRENT -> nr_sectors)
-	  nr_sectors = CURRENT -> nr_sectors;
-	memcpy(CURRENT -> buffer, azt_buf + offs, nr_sectors * 512);
-	CURRENT -> nr_sectors -= nr_sectors;
-	CURRENT -> sector += nr_sectors;
-	CURRENT -> buffer += nr_sectors * 512;
-      } else {
-	azt_buf_out = -1;
-	break;
-      }
-    }
-  }
+	if (CURRENT_VALID) {
+		while (CURRENT->nr_sectors) {
+			int bn = CURRENT->sector / 4;
+			int i;
+			for (i = 0; i < AZT_BUF_SIZ && azt_buf_bn[i] != bn;
+			     ++i);
+			if (i < AZT_BUF_SIZ) {
+				int offs =
+				    (i * 4 + (CURRENT->sector & 3)) * 512;
+				int nr_sectors = 4 - (CURRENT->sector & 3);
+				if (azt_buf_out != i) {
+					azt_buf_out = i;
+					if (azt_buf_bn[i] != bn) {
+						azt_buf_out = -1;
+						continue;
+					}
+				}
+				if (nr_sectors > CURRENT->nr_sectors)
+					nr_sectors = CURRENT->nr_sectors;
+				memcpy(CURRENT->buffer, azt_buf + offs,
+				       nr_sectors * 512);
+				CURRENT->nr_sectors -= nr_sectors;
+				CURRENT->sector += nr_sectors;
+				CURRENT->buffer += nr_sectors * 512;
+			} else {
+				azt_buf_out = -1;
+				break;
+			}
+		}
+	}
 }
 
 static void do_aztcd_request(request_queue_t * q)
 {
 #ifdef AZT_TEST
-  printk(" do_aztcd_request(%ld+%ld) Time:%li\n", CURRENT -> sector, CURRENT -> nr_sectors,jiffies);
+	printk(" do_aztcd_request(%ld+%ld) Time:%li\n", CURRENT->sector,
+	       CURRENT->nr_sectors, jiffies);
 #endif
-  if (DiskInfo.audio) 
-    { printk("aztcd: Error, tried to mount an Audio CD\n");
-      end_request(0);
-      return;
-    }
-  azt_transfer_is_active = 1;
-  while (CURRENT_VALID) {
-    if (CURRENT->bh) {
-      if (!buffer_locked(CURRENT->bh))
-	panic(DEVICE_NAME ": block not locked");
-    }
-    azt_transfer();
-    if (CURRENT -> nr_sectors == 0) {
-      end_request(1);
-    } else {
-      azt_buf_out = -1;         /* Want to read a block not in buffer */
-      if (azt_state == AZT_S_IDLE) {
-	if ((!aztTocUpToDate)||aztDiskChanged) {
-	  if (aztUpdateToc() < 0) {
-	    while (CURRENT_VALID)
-	      end_request(0);
-	    break;
-	  }
-	}
-	azt_state = AZT_S_START;
-	AztTries = 5;
-	SET_TIMER(azt_poll, HZ/100);
-      }
-      break;
-    }
-  }
-  azt_transfer_is_active = 0;
+	if (DiskInfo.audio) {
+		printk("aztcd: Error, tried to mount an Audio CD\n");
+		end_request(0);
+		return;
+	}
+	azt_transfer_is_active = 1;
+	while (CURRENT_VALID) {
+		if (CURRENT->bh) {
+			if (!buffer_locked(CURRENT->bh))
+				panic(DEVICE_NAME ": block not locked");
+		}
+		azt_transfer();
+		if (CURRENT->nr_sectors == 0) {
+			end_request(1);
+		} else {
+			azt_buf_out = -1;	/* Want to read a block not in buffer */
+			if (azt_state == AZT_S_IDLE) {
+				if ((!aztTocUpToDate) || aztDiskChanged) {
+					if (aztUpdateToc() < 0) {
+						while (CURRENT_VALID)
+							end_request(0);
+						break;
+					}
+				}
+				azt_state = AZT_S_START;
+				AztTries = 5;
+				SET_TIMER(azt_poll, HZ / 100);
+			}
+			break;
+		}
+	}
+	azt_transfer_is_active = 0;
 #ifdef AZT_TEST2
-  printk("azt_next_bn:%x  azt_buf_in:%x azt_buf_out:%x  azt_buf_bn:%x\n", \
-	  azt_next_bn, azt_buf_in, azt_buf_out, azt_buf_bn[azt_buf_in]);
-  printk(" do_aztcd_request ends  Time:%li\n",jiffies);
+	printk
+	    ("azt_next_bn:%x  azt_buf_in:%x azt_buf_out:%x  azt_buf_bn:%x\n",
+	     azt_next_bn, azt_buf_in, azt_buf_out, azt_buf_bn[azt_buf_in]);
+	printk(" do_aztcd_request ends  Time:%li\n", jiffies);
 #endif
 }
 
 
 static void azt_invalidate_buffers(void)
-{ int i;
+{
+	int i;
 
 #ifdef AZT_DEBUG
-  printk("aztcd: executing azt_invalidate_buffers\n");
+	printk("aztcd: executing azt_invalidate_buffers\n");
 #endif
-  for (i = 0; i < AZT_BUF_SIZ; ++i)
-    azt_buf_bn[i] = -1;
-  azt_buf_out = -1;
+	for (i = 0; i < AZT_BUF_SIZ; ++i)
+		azt_buf_bn[i] = -1;
+	azt_buf_out = -1;
 }
 
 /*
  * Open the device special file.  Check that a disk is in.
  */
 int aztcd_open(struct inode *ip, struct file *fp)
-{       int st;
+{
+	int st;
 
 #ifdef AZT_DEBUG
 	printk("aztcd: starting aztcd_open\n");
 #endif
 
 	if (aztPresent == 0)
-		return -ENXIO;                  /* no hardware */
+		return -ENXIO;	/* no hardware */
+
+	MOD_INC_USE_COUNT;
+
+	if (!azt_open_count && azt_state == AZT_S_IDLE) {
+		azt_invalidate_buffers();
 
-        MOD_INC_USE_COUNT;
+		st = getAztStatus();	/* check drive status */
+		if (st == -1)
+			goto err_out;	/* drive doesn't respond */
+
+		if (st & AST_DOOR_OPEN) {	/* close door, then get the status again. */
+			printk("aztcd: Door Open?\n");
+			aztCloseDoor();
+			st = getAztStatus();
+		}
 
-	if (!azt_open_count && azt_state == AZT_S_IDLE) 
-	  { azt_invalidate_buffers();
+		if ((st & AST_NOT_READY) || (st & AST_DSK_CHG)) {	/*no disk in drive or changed */
+			printk
+			    ("aztcd: Disk Changed or No Disk in Drive?\n");
+			aztTocUpToDate = 0;
+		}
+		if (aztUpdateToc())
+			goto err_out;
 
-	    st = getAztStatus();                    /* check drive status */
-	    if (st == -1) goto err_out;              /* drive doesn't respond */
-
-            if (st & AST_DOOR_OPEN)
-               { /* close door, then get the status again. */
-	         printk("aztcd: Door Open?\n");
-                 aztCloseDoor();     
-                 st = getAztStatus();
-               }        
-
-	    if ((st & AST_NOT_READY) || (st & AST_DSK_CHG)) /*no disk in drive or changed*/
-	       { printk("aztcd: Disk Changed or No Disk in Drive?\n");
-                 aztTocUpToDate=0;
-               }
-            if (aztUpdateToc())	goto err_out;
-	       
-	  }
+	}
 	++azt_open_count;
 	aztLockDoor();
 
@@ -1551,7 +1690,7 @@
 #endif
 	return 0;
 
-err_out:
+      err_out:
 	MOD_DEC_USE_COUNT;
 	return -EIO;
 }
@@ -1560,21 +1699,22 @@
 /*
  * On close, we flush all azt blocks from the buffer cache.
  */
-static int  aztcd_release(struct inode * inode, struct file * file)
-{ 
+static int aztcd_release(struct inode *inode, struct file *file)
+{
 #ifdef AZT_DEBUG
-  printk("aztcd: executing aztcd_release\n");
-  printk("inode: %p, inode->i_rdev: %x    file: %p\n",inode,inode->i_rdev,file);
+	printk("aztcd: executing aztcd_release\n");
+	printk("inode: %p, inode->i_rdev: %x    file: %p\n", inode,
+	       inode->i_rdev, file);
 #endif
-  MOD_DEC_USE_COUNT;
-  if (!--azt_open_count) {
-	azt_invalidate_buffers();
-	aztUnlockDoor();
-        if (azt_auto_eject)
-           aztSendCmd(ACMD_EJECT);
-        CLEAR_TIMER;
-  }
-  return 0;
+	MOD_DEC_USE_COUNT;
+	if (!--azt_open_count) {
+		azt_invalidate_buffers();
+		aztUnlockDoor();
+		if (azt_auto_eject)
+			aztSendCmd(ACMD_EJECT);
+		CLEAR_TIMER;
+	}
+	return 0;
 }
 
 
@@ -1584,220 +1724,244 @@
  */
 
 int __init aztcd_init(void)
-{       long int count, max_count;
+{
+	long int count, max_count;
 	unsigned char result[50];
 	int st;
 	int i = 0;
 
-	if (azt_port == 0) 
-	{ printk("aztcd: no Aztech CD-ROM Initialization");
-          return -EIO;
+	if (azt_port == 0) {
+		printk("aztcd: no Aztech CD-ROM Initialization");
+		return -EIO;
 	}
 
-	printk("aztcd: AZTECH, ORCHID, OKANO, WEARNES, TXC, CyDROM CD-ROM Driver\n"); 
+	printk
+	    ("aztcd: AZTECH, ORCHID, OKANO, WEARNES, TXC, CyDROM CD-ROM Driver\n");
 	printk("aztcd: (C) 1994-98 W.Zimmermann\n");
-	if (azt_port == -1) 
-	{ printk("aztcd: KernelVersion=%s DriverVersion=%s For IDE/ATAPI-drives use ide-cd.c\n",UTS_RELEASE,AZT_VERSION);
+	if (azt_port == -1) {
+		printk
+		    ("aztcd: KernelVersion=%s DriverVersion=%s For IDE/ATAPI-drives use ide-cd.c\n",
+		     UTS_RELEASE, AZT_VERSION);
+	} else
+		printk
+		    ("aztcd: DriverVersion=%s BaseAddress=0x%x  For IDE/ATAPI-drives use ide-cd.c\n",
+		     AZT_VERSION, azt_port);
+	printk
+	    ("aztcd: If you have problems, read /usr/src/linux/Documentation/cdrom/aztcd\n");
+
+
+#ifdef AZT_SW32			/*CDROM connected to Soundwave32 card */
+	if ((0xFF00 & inw(AZT_SW32_ID_REG)) != 0x4500) {
+		printk
+		    ("aztcd: no Soundwave32 card detected at base:%x init:%x config:%x id:%x\n",
+		     AZT_SW32_BASE_ADDR, AZT_SW32_INIT,
+		     AZT_SW32_CONFIG_REG, AZT_SW32_ID_REG);
+		return -EIO;
+	} else {
+		printk(KERN_INFO
+		       "aztcd: Soundwave32 card detected at %x  Version %x\n",
+		       AZT_SW32_BASE_ADDR, inw(AZT_SW32_ID_REG));
+		outw(AZT_SW32_INIT, AZT_SW32_CONFIG_REG);
+		for (count = 0; count < 10000; count++);	/*delay a bit */
 	}
-        else
-	  printk("aztcd: DriverVersion=%s BaseAddress=0x%x  For IDE/ATAPI-drives use ide-cd.c\n",AZT_VERSION,azt_port);
-	printk("aztcd: If you have problems, read /usr/src/linux/Documentation/cdrom/aztcd\n");
-
- 
-#ifdef AZT_SW32   /*CDROM connected to Soundwave32 card*/
-        if ((0xFF00 & inw(AZT_SW32_ID_REG)) != 0x4500)
-           { printk("aztcd: no Soundwave32 card detected at base:%x init:%x config:%x id:%x\n",
-		 AZT_SW32_BASE_ADDR,AZT_SW32_INIT,AZT_SW32_CONFIG_REG,AZT_SW32_ID_REG);
-                 return -EIO;
-	   }
-        else                
-           { printk(KERN_INFO "aztcd: Soundwave32 card detected at %x  Version %x\n",
-	 	 AZT_SW32_BASE_ADDR, inw(AZT_SW32_ID_REG));
-	     outw(AZT_SW32_INIT,AZT_SW32_CONFIG_REG);
-	     for (count=0;count<10000;count++);          /*delay a bit*/    	 
-           }
-#endif	
+#endif
 
 	/* check for presence of drive */
 
-        if (azt_port == -1) 			/* autoprobing */
-        { for (i=0;(azt_port_auto[i]!=0)&&(i<16);i++)
-          { azt_port = azt_port_auto[i];
-            printk("aztcd: Autoprobing BaseAddress=0x%x \n",azt_port);
-            st = check_region(azt_port, 4);  /*proprietary interfaces need 4 bytes*/
-  	    if (st) continue;
-
-	    outb(POLLED,MODE_PORT);              
-	    inb(CMD_PORT);
-	    inb(CMD_PORT);
-	    outb(ACMD_GET_VERSION,CMD_PORT); /*Try to get version info*/
-
-            aztTimeOutCount=0;   
-  	    do { aztIndatum=inb(STATUS_PORT);
-	         aztTimeOutCount++; 
-	         if (aztTimeOutCount>=AZT_FAST_TIMEOUT) break; 
-	       } while (aztIndatum&AFL_STATUS); 
-	    if (inb(DATA_PORT)==AFL_OP_OK) 
-	      break;
-          }
-          if ((azt_port_auto[i]==0)||(i==16))  
-          { printk("aztcd: no AZTECH CD-ROM drive found\n");
-            return -EIO;
-          }
-        } 
-        else					/* no autoprobing */
-        { if ((azt_port==0x1f0)||(azt_port==0x170))  
-            st = check_region(azt_port, 8);  /*IDE-interfaces need 8 bytes*/
-          else
-            st = check_region(azt_port, 4);  /*proprietary interfaces need 4 bytes*/
-	  if (st) 
-	  { printk("aztcd: conflict, I/O port (%X) already used\n",azt_port);
-            return -EIO;
-	  }
-	
-          if ((azt_port==0x1f0)||(azt_port==0x170))  
-            SWITCH_IDE_SLAVE;  /*switch IDE interface to slave configuration*/
-        
-          outb(POLLED,MODE_PORT);              
-	  inb(CMD_PORT);
-	  inb(CMD_PORT);
-	  outb(ACMD_GET_VERSION,CMD_PORT); /*Try to get version info*/
-
-          aztTimeOutCount=0;   
-	  do { aztIndatum=inb(STATUS_PORT);
-	       aztTimeOutCount++; 
-	       if (aztTimeOutCount>=AZT_FAST_TIMEOUT) break; 
-	     } while (aztIndatum&AFL_STATUS); 
+	if (azt_port == -1) {	/* autoprobing */
+		for (i = 0; (azt_port_auto[i] != 0) && (i < 16); i++) {
+			azt_port = azt_port_auto[i];
+			printk("aztcd: Autoprobing BaseAddress=0x%x \n",
+			       azt_port);
+			st = check_region(azt_port, 4);	/*proprietary interfaces need 4 bytes */
+			if (st)
+				continue;
+
+			outb(POLLED, MODE_PORT);
+			inb(CMD_PORT);
+			inb(CMD_PORT);
+			outb(ACMD_GET_VERSION, CMD_PORT);	/*Try to get version info */
+
+			aztTimeOutCount = 0;
+			do {
+				aztIndatum = inb(STATUS_PORT);
+				aztTimeOutCount++;
+				if (aztTimeOutCount >= AZT_FAST_TIMEOUT)
+					break;
+			} while (aztIndatum & AFL_STATUS);
+			if (inb(DATA_PORT) == AFL_OP_OK)
+				break;
+		}
+		if ((azt_port_auto[i] == 0) || (i == 16)) {
+			printk("aztcd: no AZTECH CD-ROM drive found\n");
+			return -EIO;
+		}
+	} else {		/* no autoprobing */
+		if ((azt_port == 0x1f0) || (azt_port == 0x170))
+			st = check_region(azt_port, 8);	/*IDE-interfaces need 8 bytes */
+		else
+			st = check_region(azt_port, 4);	/*proprietary interfaces need 4 bytes */
+		if (st) {
+			printk
+			    ("aztcd: conflict, I/O port (%X) already used\n",
+			     azt_port);
+			return -EIO;
+		}
+
+		if ((azt_port == 0x1f0) || (azt_port == 0x170))
+			SWITCH_IDE_SLAVE;	/*switch IDE interface to slave configuration */
 
-  	  if (inb(DATA_PORT)!=AFL_OP_OK) /*OP_OK? If not, reset and try again*/
-             { 
+		outb(POLLED, MODE_PORT);
+		inb(CMD_PORT);
+		inb(CMD_PORT);
+		outb(ACMD_GET_VERSION, CMD_PORT);	/*Try to get version info */
+
+		aztTimeOutCount = 0;
+		do {
+			aztIndatum = inb(STATUS_PORT);
+			aztTimeOutCount++;
+			if (aztTimeOutCount >= AZT_FAST_TIMEOUT)
+				break;
+		} while (aztIndatum & AFL_STATUS);
+
+		if (inb(DATA_PORT) != AFL_OP_OK) {	/*OP_OK? If not, reset and try again */
 #ifndef MODULE
-               if (azt_cont!=0x79)   
-	          { printk("aztcd: no AZTECH CD-ROM drive found-Try boot parameter aztcd=<BaseAddress>,0x79\n");
-	            return -EIO;
-                  }
-#else        
-               if (0)
-                  {
-                  }
-#endif	     
-               else   
-       	          { printk("aztcd: drive reset - please wait\n");
-	            for (count=0;count<50;count++)
-	              { inb(STATUS_PORT);    /*removing all data from earlier tries*/
-	                inb(DATA_PORT);
-	              }
-	            outb(POLLED,MODE_PORT);          
-	            inb(CMD_PORT);
-	            inb(CMD_PORT);
-		    getAztStatus(); 		    /*trap errors*/
-	            outb(ACMD_SOFT_RESET,CMD_PORT); /*send reset*/
-	            STEN_LOW;
-	            if (inb(DATA_PORT)!=AFL_OP_OK)    /*OP_OK?*/
-	               { printk("aztcd: no AZTECH CD-ROM drive found\n");
-                         return -EIO;
-	               } 
-	            
-	            for (count = 0; count < AZT_TIMEOUT; count++)
-	            	barrier();	/* Stop gcc 2.96 being smart */
-	            
-	            if ((st=getAztStatus())==-1)
-	               { printk("aztcd: Drive Status Error Status=%x\n",st);
-                         return -EIO;
-	               }
-#ifdef AZT_DEBUG
-	            printk("aztcd: Status = %x\n",st);
-#endif
-	            outb(POLLED,MODE_PORT);            
-	            inb(CMD_PORT);
-	            inb(CMD_PORT);
-	            outb(ACMD_GET_VERSION,CMD_PORT); /*GetVersion*/
-	            STEN_LOW;
-	            OP_OK;
-	          } 
-             }
+			if (azt_cont != 0x79) {
+				printk
+				    ("aztcd: no AZTECH CD-ROM drive found-Try boot parameter aztcd=<BaseAddress>,0x79\n");
+				return -EIO;
+			}
+#else
+			if (0) {
+			}
+#endif
+			else {
+				printk
+				    ("aztcd: drive reset - please wait\n");
+				for (count = 0; count < 50; count++) {
+					inb(STATUS_PORT);	/*removing all data from earlier tries */
+					inb(DATA_PORT);
+				}
+				outb(POLLED, MODE_PORT);
+				inb(CMD_PORT);
+				inb(CMD_PORT);
+				getAztStatus();	/*trap errors */
+				outb(ACMD_SOFT_RESET, CMD_PORT);	/*send reset */
+				STEN_LOW;
+				if (inb(DATA_PORT) != AFL_OP_OK) {	/*OP_OK? */
+					printk
+					    ("aztcd: no AZTECH CD-ROM drive found\n");
+					return -EIO;
+				}
+
+				for (count = 0; count < AZT_TIMEOUT;
+				     count++)
+					barrier();	/* Stop gcc 2.96 being smart */
+
+				if ((st = getAztStatus()) == -1) {
+					printk
+					    ("aztcd: Drive Status Error Status=%x\n",
+					     st);
+					return -EIO;
+				}
+#ifdef AZT_DEBUG
+				printk("aztcd: Status = %x\n", st);
+#endif
+				outb(POLLED, MODE_PORT);
+				inb(CMD_PORT);
+				inb(CMD_PORT);
+				outb(ACMD_GET_VERSION, CMD_PORT);	/*GetVersion */
+				STEN_LOW;
+				OP_OK;
+			}
+		}
 	}
-	
-	azt_init_end=1;
+
+	azt_init_end = 1;
 	STEN_LOW;
-	result[0]=inb(DATA_PORT);        /*reading in a null byte???*/
-	for (count=1;count<50;count++)   /*Reading version string*/
-	 { aztTimeOutCount=0;            /*here we must implement STEN_LOW differently*/
-	   do { aztIndatum=inb(STATUS_PORT);/*because we want to exit by timeout*/
-		aztTimeOutCount++; 
-		if (aztTimeOutCount>=AZT_FAST_TIMEOUT) break; 
-	      } while (aztIndatum&AFL_STATUS); 
-	   if (aztTimeOutCount>=AZT_FAST_TIMEOUT) break;  /*all chars read?*/
-	   result[count]=inb(DATA_PORT);
-	 }
-	if (count>30) max_count=30;  /*print max.30 chars of the version string*/
-	else          max_count=count;
+	result[0] = inb(DATA_PORT);	/*reading in a null byte??? */
+	for (count = 1; count < 50; count++) {	/*Reading version string */
+		aztTimeOutCount = 0;	/*here we must implement STEN_LOW differently */
+		do {
+			aztIndatum = inb(STATUS_PORT);	/*because we want to exit by timeout */
+			aztTimeOutCount++;
+			if (aztTimeOutCount >= AZT_FAST_TIMEOUT)
+				break;
+		} while (aztIndatum & AFL_STATUS);
+		if (aztTimeOutCount >= AZT_FAST_TIMEOUT)
+			break;	/*all chars read? */
+		result[count] = inb(DATA_PORT);
+	}
+	if (count > 30)
+		max_count = 30;	/*print max.30 chars of the version string */
+	else
+		max_count = count;
 	printk(KERN_INFO "aztcd: FirmwareVersion=");
-	for (count=1;count<max_count;count++) printk("%c",result[count]);
+	for (count = 1; count < max_count; count++)
+		printk("%c", result[count]);
 	printk("<<>> ");
 
-	if ((result[1]=='A')&&(result[2]=='Z')&&(result[3]=='T'))
-	 { printk("AZTECH drive detected\n"); /*AZTECH*/    
-	 }
-	else if ((result[2]=='C')&&(result[3]=='D')&&(result[4]=='D'))
-	 { printk("ORCHID or WEARNES drive detected\n"); /*ORCHID or WEARNES*/
-	 }
-	else if ((result[1]==0x03)&&(result[2]=='5'))
-	 { printk("TXC or CyCDROM drive detected\n"); /*Conrad TXC, CyCDROM*/
-	 }
-	else                                             /*OTHERS or none*/
-	 { printk("\nunknown drive or firmware version detected\n");
-	   printk("aztcd may not run stable, if you want to try anyhow,\n");
-	   printk("boot with: aztcd=<BaseAddress>,0x79\n");
-	   if ((azt_cont!=0x79))     
-	     { printk("aztcd: FirmwareVersion=");
-	       for (count=1;count<5;count++) printk("%c",result[count]);
-	       printk("<<>> ");
-	       printk("Aborted\n");
-               return -EIO;
-	     }
-	 }
-	devfs_register (NULL, "aztcd", DEVFS_FL_DEFAULT, MAJOR_NR, 0,
-			S_IFBLK | S_IRUGO | S_IWUGO, &azt_fops, NULL);
-	if (devfs_register_blkdev(MAJOR_NR, "aztcd", &azt_fops) != 0)
-	{
+	if ((result[1] == 'A') && (result[2] == 'Z') && (result[3] == 'T')) {
+		printk("AZTECH drive detected\n");
+	/*AZTECH*/}
+		else if ((result[2] == 'C') && (result[3] == 'D')
+			 && (result[4] == 'D')) {
+		printk("ORCHID or WEARNES drive detected\n");	/*ORCHID or WEARNES */
+	} else if ((result[1] == 0x03) && (result[2] == '5')) {
+		printk("TXC or CyCDROM drive detected\n");	/*Conrad TXC, CyCDROM */
+	} else {		/*OTHERS or none */
+		printk("\nunknown drive or firmware version detected\n");
+		printk
+		    ("aztcd may not run stable, if you want to try anyhow,\n");
+		printk("boot with: aztcd=<BaseAddress>,0x79\n");
+		if ((azt_cont != 0x79)) {
+			printk("aztcd: FirmwareVersion=");
+			for (count = 1; count < 5; count++)
+				printk("%c", result[count]);
+			printk("<<>> ");
+			printk("Aborted\n");
+			return -EIO;
+		}
+	}
+	devfs_register(NULL, "aztcd", DEVFS_FL_DEFAULT, MAJOR_NR, 0,
+		       S_IFBLK | S_IRUGO | S_IWUGO, &azt_fops, NULL);
+	if (devfs_register_blkdev(MAJOR_NR, "aztcd", &azt_fops) != 0) {
 		printk("aztcd: Unable to get major %d for Aztech CD-ROM\n",
 		       MAJOR_NR);
-                return -EIO;
+		return -EIO;
 	}
 	blk_init_queue(BLK_DEFAULT_QUEUE(MAJOR_NR), DEVICE_REQUEST);
 	blksize_size[MAJOR_NR] = aztcd_blocksizes;
 	read_ahead[MAJOR_NR] = 4;
-	register_disk(NULL, MKDEV(MAJOR_NR,0), 1, &azt_fops, 0);
+	register_disk(NULL, MKDEV(MAJOR_NR, 0), 1, &azt_fops, 0);
+
+	if ((azt_port == 0x1f0) || (azt_port == 0x170))
+		request_region(azt_port, 8, "aztcd");	/*IDE-interface */
+	else
+		request_region(azt_port, 4, "aztcd");	/*proprietary interface */
 
-        if ((azt_port==0x1f0)||(azt_port==0x170))  
-	   request_region(azt_port, 8, "aztcd");  /*IDE-interface*/
-        else
-	   request_region(azt_port, 4, "aztcd");  /*proprietary interface*/
-        
 	azt_invalidate_buffers();
 	aztPresent = 1;
 	aztCloseDoor();
-        return (0);
+	return (0);
 }
 
 void __exit aztcd_exit(void)
 {
-  devfs_unregister(devfs_find_handle(NULL, "aztcd", 0, 0, DEVFS_SPECIAL_BLK,
-				     0));
-  if ((devfs_unregister_blkdev(MAJOR_NR, "aztcd") == -EINVAL))    
-    { printk("What's that: can't unregister aztcd\n");
-      return;
-    }
-  blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR));
-  if ((azt_port==0x1f0)||(azt_port==0x170))  
-    { SWITCH_IDE_MASTER;
-      release_region(azt_port,8);  /*IDE-interface*/
-    }
-  else
-      release_region(azt_port,4);  /*proprietary interface*/
-  printk(KERN_INFO "aztcd module released.\n");
-}   
+	devfs_unregister(devfs_find_handle
+			 (NULL, "aztcd", 0, 0, DEVFS_SPECIAL_BLK, 0));
+	if ((devfs_unregister_blkdev(MAJOR_NR, "aztcd") == -EINVAL)) {
+		printk("What's that: can't unregister aztcd\n");
+		return;
+	}
+	blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR));
+	if ((azt_port == 0x1f0) || (azt_port == 0x170)) {
+		SWITCH_IDE_MASTER;
+		release_region(azt_port, 8);	/*IDE-interface */
+	} else
+		release_region(azt_port, 4);	/*proprietary interface */
+	printk(KERN_INFO "aztcd module released.\n");
+}
 
 #ifdef MODULE
 module_init(aztcd_init);
@@ -1810,405 +1974,485 @@
 */
 static void azt_poll(void)
 {
-    int st = 0;
-    int loop_ctl = 1;
-    int skip = 0;
-
-    if (azt_error) {                            
-	if (aztSendCmd(ACMD_GET_ERROR)) RETURN("azt_poll 1");
-	STEN_LOW;
-	azt_error=inb(DATA_PORT)&0xFF;
-	printk("aztcd: I/O error 0x%02x\n", azt_error);
-	azt_invalidate_buffers();
+	int st = 0;
+	int loop_ctl = 1;
+	int skip = 0;
+
+	if (azt_error) {
+		if (aztSendCmd(ACMD_GET_ERROR))
+			RETURN("azt_poll 1");
+		STEN_LOW;
+		azt_error = inb(DATA_PORT) & 0xFF;
+		printk("aztcd: I/O error 0x%02x\n", azt_error);
+		azt_invalidate_buffers();
 #ifdef WARN_IF_READ_FAILURE
-	if (AztTries == 5)
-	  printk("aztcd: Read of Block %d Failed - Maybe Audio Disk?\n", azt_next_bn);
-#endif
-	if (!AztTries--) {
-	  printk("aztcd: Read of Block %d Failed, Maybe Audio Disk? Giving up\n", azt_next_bn);
-	  if (azt_transfer_is_active) {
-	    AztTries = 0;
-	    loop_ctl = 0;
-	  }
-	  if (CURRENT_VALID)
-	    end_request(0);
-	  AztTries = 5;
-	}
-    azt_error = 0;
-    azt_state = AZT_S_STOP;
-    }
-
-    while (loop_ctl)
-    {
-      loop_ctl = 0;   /* each case must flip this back to 1 if we want
-			 to come back up here */
-      switch (azt_state) {
+		if (AztTries == 5)
+			printk
+			    ("aztcd: Read of Block %d Failed - Maybe Audio Disk?\n",
+			     azt_next_bn);
+#endif
+		if (!AztTries--) {
+			printk
+			    ("aztcd: Read of Block %d Failed, Maybe Audio Disk? Giving up\n",
+			     azt_next_bn);
+			if (azt_transfer_is_active) {
+				AztTries = 0;
+				loop_ctl = 0;
+			}
+			if (CURRENT_VALID)
+				end_request(0);
+			AztTries = 5;
+		}
+		azt_error = 0;
+		azt_state = AZT_S_STOP;
+	}
+
+	while (loop_ctl) {
+		loop_ctl = 0;	/* each case must flip this back to 1 if we want
+				   to come back up here */
+		switch (azt_state) {
 
-	case AZT_S_IDLE:
+		case AZT_S_IDLE:
 #ifdef AZT_TEST3
-	  if (azt_state!=azt_state_old) {
-	    azt_state_old=azt_state;
-	    printk("AZT_S_IDLE\n");
-	    }
+			if (azt_state != azt_state_old) {
+				azt_state_old = azt_state;
+				printk("AZT_S_IDLE\n");
+			}
 #endif
-	  return;
+			return;
 
-	case AZT_S_START:
+		case AZT_S_START:
 #ifdef AZT_TEST3
-	  if (azt_state!=azt_state_old) {
-	    azt_state_old=azt_state;
-	    printk("AZT_S_START\n");
-	  }
-#endif
-	  if(aztSendCmd(ACMD_GET_STATUS)) RETURN("azt_poll 2");  /*result will be checked by aztStatus() */
-	  azt_state = azt_mode == 1 ? AZT_S_READ : AZT_S_MODE;
-	  AztTimeout = 3000;
-	  break;
+			if (azt_state != azt_state_old) {
+				azt_state_old = azt_state;
+				printk("AZT_S_START\n");
+			}
+#endif
+			if (aztSendCmd(ACMD_GET_STATUS))
+				RETURN("azt_poll 2");	/*result will be checked by aztStatus() */
+			azt_state =
+			    azt_mode == 1 ? AZT_S_READ : AZT_S_MODE;
+			AztTimeout = 3000;
+			break;
 
-	case AZT_S_MODE:
+		case AZT_S_MODE:
 #ifdef AZT_TEST3
-	  if (azt_state!=azt_state_old) {
-	    azt_state_old=azt_state;
-	    printk("AZT_S_MODE\n");
-	  }
-#endif
-	  if (!skip) {
-	    if ((st = aztStatus()) != -1) {
-	      if ((st & AST_DSK_CHG)||(st & AST_NOT_READY)) {
-		aztDiskChanged = 1;
-		aztTocUpToDate = 0;
-		azt_invalidate_buffers();
-		end_request(0);
-		printk("aztcd: Disk Changed or Not Ready 1 - Unmount Disk!\n");
-	      }
-	    } else break;
-	  }
-	  skip = 0;
-
-	  if ((st & AST_DOOR_OPEN)||(st & AST_NOT_READY)) {
-	    aztDiskChanged = 1;
-	    aztTocUpToDate = 0;
-            printk("aztcd: Disk Changed or Not Ready 2 - Unmount Disk!\n");
-            end_request(0);
-	    printk((st & AST_DOOR_OPEN) ? "aztcd: door open\n" : "aztcd: disk removed\n");
-	    if (azt_transfer_is_active) {
-	      azt_state = AZT_S_START;
-	      loop_ctl = 1;   /* goto immediately */
-	      break;
-	    }
-	    azt_state = AZT_S_IDLE;
-	    while (CURRENT_VALID)
-	      end_request(0);
-	    return;
-	  }
-				
+			if (azt_state != azt_state_old) {
+				azt_state_old = azt_state;
+				printk("AZT_S_MODE\n");
+			}
+#endif
+			if (!skip) {
+				if ((st = aztStatus()) != -1) {
+					if ((st & AST_DSK_CHG)
+					    || (st & AST_NOT_READY)) {
+						aztDiskChanged = 1;
+						aztTocUpToDate = 0;
+						azt_invalidate_buffers();
+						end_request(0);
+						printk
+						    ("aztcd: Disk Changed or Not Ready 1 - Unmount Disk!\n");
+					}
+				} else
+					break;
+			}
+			skip = 0;
+
+			if ((st & AST_DOOR_OPEN) || (st & AST_NOT_READY)) {
+				aztDiskChanged = 1;
+				aztTocUpToDate = 0;
+				printk
+				    ("aztcd: Disk Changed or Not Ready 2 - Unmount Disk!\n");
+				end_request(0);
+				printk((st & AST_DOOR_OPEN) ?
+				       "aztcd: door open\n" :
+				       "aztcd: disk removed\n");
+				if (azt_transfer_is_active) {
+					azt_state = AZT_S_START;
+					loop_ctl = 1;	/* goto immediately */
+					break;
+				}
+				azt_state = AZT_S_IDLE;
+				while (CURRENT_VALID)
+					end_request(0);
+				return;
+			}
+
 /*	  if (aztSendCmd(ACMD_SET_MODE)) RETURN("azt_poll 3");
 	  outb(0x01, DATA_PORT);          
 	  PA_OK;
 	  STEN_LOW;
-*/        if (aztSendCmd(ACMD_GET_STATUS)) RETURN("azt_poll 4");
-	  STEN_LOW;
-	  azt_mode = 1;
-	  azt_state = AZT_S_READ;
-	  AztTimeout = 3000;
+*/
+			if (aztSendCmd(ACMD_GET_STATUS))
+				RETURN("azt_poll 4");
+			STEN_LOW;
+			azt_mode = 1;
+			azt_state = AZT_S_READ;
+			AztTimeout = 3000;
 
-	  break;
+			break;
 
 
-	case AZT_S_READ:
+		case AZT_S_READ:
 #ifdef AZT_TEST3
-	  if (azt_state!=azt_state_old)  {
-	    azt_state_old=azt_state;
-	    printk("AZT_S_READ\n");
-	  }
-#endif
-	  if (!skip) {
-	      if ((st = aztStatus()) != -1) {
-		if ((st & AST_DSK_CHG)||(st & AST_NOT_READY)) {
-		aztDiskChanged = 1;
-		aztTocUpToDate = 0;
-		azt_invalidate_buffers();
-		printk("aztcd: Disk Changed or Not Ready 3 - Unmount Disk!\n");
-                end_request(0);               
-		}
-	      } else break;
-	  } 
-	    
-	  skip = 0;
-	  if ((st & AST_DOOR_OPEN)||(st & AST_NOT_READY)) {
-	    aztDiskChanged = 1;
-	    aztTocUpToDate = 0;
-	    printk((st & AST_DOOR_OPEN) ? "aztcd: door open\n" : "aztcd: disk removed\n");
-	    if (azt_transfer_is_active) {
-	      azt_state = AZT_S_START;
-	      loop_ctl = 1;
-	      break;
-	    }
-	    azt_state = AZT_S_IDLE;
-	    while (CURRENT_VALID)
-	    end_request(0);
-	    return;
-	  }
-
-	  if (CURRENT_VALID) {
-	    struct azt_Play_msf msf;
-	    int i;
-	    azt_next_bn = CURRENT -> sector / 4;
-	    azt_hsg2msf(azt_next_bn, &msf.start);
-	    i = 0;
-	    /* find out in which track we are */
-	    while (azt_msf2hsg(&msf.start)>azt_msf2hsg(&Toc[++i].trackTime)) {};
-	    if (azt_msf2hsg(&msf.start)<azt_msf2hsg(&Toc[i].trackTime)-AZT_BUF_SIZ)
-               { azt_read_count=AZT_BUF_SIZ;  /*fast, because we read ahead*/
-               /*azt_read_count=CURRENT->nr_sectors;    slow, no read ahead*/
-               }
-	    else /* don't read beyond end of track */           
-#if AZT_MULTISESSION 
-               { azt_read_count=(azt_msf2hsg(&Toc[i].trackTime)/4)*4-azt_msf2hsg(&msf.start);  
-                 if (azt_read_count < 0) azt_read_count=0;
-		 if (azt_read_count > AZT_BUF_SIZ) azt_read_count=AZT_BUF_SIZ;
-                 printk("aztcd: warning - trying to read beyond end of track\n");
+			if (azt_state != azt_state_old) {
+				azt_state_old = azt_state;
+				printk("AZT_S_READ\n");
+			}
+#endif
+			if (!skip) {
+				if ((st = aztStatus()) != -1) {
+					if ((st & AST_DSK_CHG)
+					    || (st & AST_NOT_READY)) {
+						aztDiskChanged = 1;
+						aztTocUpToDate = 0;
+						azt_invalidate_buffers();
+						printk
+						    ("aztcd: Disk Changed or Not Ready 3 - Unmount Disk!\n");
+						end_request(0);
+					}
+				} else
+					break;
+			}
+
+			skip = 0;
+			if ((st & AST_DOOR_OPEN) || (st & AST_NOT_READY)) {
+				aztDiskChanged = 1;
+				aztTocUpToDate = 0;
+				printk((st & AST_DOOR_OPEN) ?
+				       "aztcd: door open\n" :
+				       "aztcd: disk removed\n");
+				if (azt_transfer_is_active) {
+					azt_state = AZT_S_START;
+					loop_ctl = 1;
+					break;
+				}
+				azt_state = AZT_S_IDLE;
+				while (CURRENT_VALID)
+					end_request(0);
+				return;
+			}
+
+			if (CURRENT_VALID) {
+				struct azt_Play_msf msf;
+				int i;
+				azt_next_bn = CURRENT->sector / 4;
+				azt_hsg2msf(azt_next_bn, &msf.start);
+				i = 0;
+				/* find out in which track we are */
+				while (azt_msf2hsg(&msf.start) >
+				       azt_msf2hsg(&Toc[++i].trackTime)) {
+				};
+				if (azt_msf2hsg(&msf.start) <
+				    azt_msf2hsg(&Toc[i].trackTime) -
+				    AZT_BUF_SIZ) {
+					azt_read_count = AZT_BUF_SIZ;	/*fast, because we read ahead */
+					/*azt_read_count=CURRENT->nr_sectors;    slow, no read ahead */
+				} else	/* don't read beyond end of track */
+#if AZT_MULTISESSION
+				{
+					azt_read_count =
+					    (azt_msf2hsg(&Toc[i].trackTime)
+					     / 4) * 4 -
+					    azt_msf2hsg(&msf.start);
+					if (azt_read_count < 0)
+						azt_read_count = 0;
+					if (azt_read_count > AZT_BUF_SIZ)
+						azt_read_count =
+						    AZT_BUF_SIZ;
+					printk
+					    ("aztcd: warning - trying to read beyond end of track\n");
 /*               printk("%i %i %li %li\n",i,azt_read_count,azt_msf2hsg(&msf.start),azt_msf2hsg(&Toc[i].trackTime));
-*/             }
+*/ }
 #else
-	       { azt_read_count=AZT_BUF_SIZ;
-	       }
-#endif
-	    msf.end.min = 0;
-	    msf.end.sec = 0;            
-	    msf.end.frame = azt_read_count ;/*Mitsumi here reads 0xffffff sectors*/
+				{
+					azt_read_count = AZT_BUF_SIZ;
+				}
+#endif
+				msf.end.min = 0;
+				msf.end.sec = 0;
+				msf.end.frame = azt_read_count;	/*Mitsumi here reads 0xffffff sectors */
 #ifdef AZT_TEST3
-	    printk("---reading msf-address %x:%x:%x  %x:%x:%x\n",msf.start.min,msf.start.sec,msf.start.frame,msf.end.min,msf.end.sec,msf.end.frame);
-	    printk("azt_next_bn:%x  azt_buf_in:%x azt_buf_out:%x  azt_buf_bn:%x\n", \
-		    azt_next_bn, azt_buf_in, azt_buf_out, azt_buf_bn[azt_buf_in]);
-#endif 
-            if (azt_read_mode==AZT_MODE_2)
-               { sendAztCmd(ACMD_PLAY_READ_RAW, &msf); /*XA disks in raw mode*/
-               }
-            else
-               { sendAztCmd(ACMD_PLAY_READ, &msf);     /*others in cooked mode*/
-               }
-	    azt_state = AZT_S_DATA;
-	    AztTimeout = READ_TIMEOUT;
-	  } else {
-	    azt_state = AZT_S_STOP;
-	    loop_ctl = 1;
-	    break;
-	  }
+				printk
+				    ("---reading msf-address %x:%x:%x  %x:%x:%x\n",
+				     msf.start.min, msf.start.sec,
+				     msf.start.frame, msf.end.min,
+				     msf.end.sec, msf.end.frame);
+				printk
+				    ("azt_next_bn:%x  azt_buf_in:%x azt_buf_out:%x  azt_buf_bn:%x\n",
+				     azt_next_bn, azt_buf_in, azt_buf_out,
+				     azt_buf_bn[azt_buf_in]);
+#endif
+				if (azt_read_mode == AZT_MODE_2) {
+					sendAztCmd(ACMD_PLAY_READ_RAW, &msf);	/*XA disks in raw mode */
+				} else {
+					sendAztCmd(ACMD_PLAY_READ, &msf);	/*others in cooked mode */
+				}
+				azt_state = AZT_S_DATA;
+				AztTimeout = READ_TIMEOUT;
+			} else {
+				azt_state = AZT_S_STOP;
+				loop_ctl = 1;
+				break;
+			}
 
-	  break;
+			break;
 
 
-	case AZT_S_DATA:
+		case AZT_S_DATA:
 #ifdef AZT_TEST3
-	  if (azt_state!=azt_state_old)  {
-	    azt_state_old=azt_state;
-	    printk("AZT_S_DATA\n");
-	  }
+			if (azt_state != azt_state_old) {
+				azt_state_old = azt_state;
+				printk("AZT_S_DATA\n");
+			}
 #endif
 
-	  st = inb(STATUS_PORT) & AFL_STATUSorDATA; 
+			st = inb(STATUS_PORT) & AFL_STATUSorDATA;
 
-	  switch (st) {
+			switch (st) {
 
-	    case AFL_DATA:
+			case AFL_DATA:
 #ifdef AZT_TEST3
-	      if (st!=azt_st_old)  {
-		azt_st_old=st; 
-		printk("---AFL_DATA st:%x\n",st);
-	      }
-#endif
-	      if (!AztTries--) {
-		printk("aztcd: Read of Block %d Failed, Maybe Audio Disk ? Giving up\n", azt_next_bn);
-		if (azt_transfer_is_active) {
-		  AztTries = 0;
-		  break;
-		}
-		if (CURRENT_VALID)
-		  end_request(0);
-		AztTries = 5;
-	      }
-	      azt_state = AZT_S_START;
-	      AztTimeout = READ_TIMEOUT;
-	      loop_ctl = 1;
-	      break;
+				if (st != azt_st_old) {
+					azt_st_old = st;
+					printk("---AFL_DATA st:%x\n", st);
+				}
+#endif
+				if (!AztTries--) {
+					printk
+					    ("aztcd: Read of Block %d Failed, Maybe Audio Disk ? Giving up\n",
+					     azt_next_bn);
+					if (azt_transfer_is_active) {
+						AztTries = 0;
+						break;
+					}
+					if (CURRENT_VALID)
+						end_request(0);
+					AztTries = 5;
+				}
+				azt_state = AZT_S_START;
+				AztTimeout = READ_TIMEOUT;
+				loop_ctl = 1;
+				break;
 
-	    case AFL_STATUSorDATA:
+			case AFL_STATUSorDATA:
 #ifdef AZT_TEST3
-	      if (st!=azt_st_old)  {
-		azt_st_old=st;
-		printk("---AFL_STATUSorDATA st:%x\n",st);
-	      }
+				if (st != azt_st_old) {
+					azt_st_old = st;
+					printk
+					    ("---AFL_STATUSorDATA st:%x\n",
+					     st);
+				}
 #endif
-	      break;
+				break;
 
-	    default:
+			default:
 #ifdef AZT_TEST3
-	      if (st!=azt_st_old)  {
-		azt_st_old=st;
-		printk("---default: st:%x\n",st);
-	      }
-#endif
-	      AztTries = 5;
-	      if (!CURRENT_VALID && azt_buf_in == azt_buf_out) {
-		azt_state = AZT_S_STOP;
-		loop_ctl = 1;
-		break;
-	      }
-	      if (azt_read_count<=0)
-		printk("aztcd: warning - try to read 0 frames\n");
-	      while (azt_read_count)      /*??? fast read ahead loop*/
-	       { azt_buf_bn[azt_buf_in] = -1;
-		 DTEN_LOW;                      /*??? unsolved problem, very
-						      seldom we get timeouts
-						      here, don't now the real
-						      reason. With my drive this
-						      sometimes also happens with
-						      Aztech's original driver under
-						      DOS. Is it a hardware bug? 
-						      I tried to recover from such
-						      situations here. Zimmermann*/
-		 if (aztTimeOutCount>=AZT_TIMEOUT) 
-		  { printk("read_count:%d CURRENT->nr_sectors:%ld azt_buf_in:%d\n", azt_read_count,CURRENT->nr_sectors,azt_buf_in);
-		    printk("azt_transfer_is_active:%x\n",azt_transfer_is_active);
-		    azt_read_count=0;
-		    azt_state = AZT_S_STOP;
-		    loop_ctl = 1;
-		    end_request(1);  /*should we have here (1) or (0)? */
-		  }
-		 else
-		  { if (azt_read_mode==AZT_MODE_2)
-		       { insb(DATA_PORT, azt_buf + CD_FRAMESIZE_RAW * azt_buf_in, CD_FRAMESIZE_RAW);
-		       }
-		    else
-		       { insb(DATA_PORT, azt_buf + CD_FRAMESIZE * azt_buf_in, CD_FRAMESIZE);
-                       }
-		    azt_read_count--;
+				if (st != azt_st_old) {
+					azt_st_old = st;
+					printk("---default: st:%x\n", st);
+				}
+#endif
+				AztTries = 5;
+				if (!CURRENT_VALID
+				    && azt_buf_in == azt_buf_out) {
+					azt_state = AZT_S_STOP;
+					loop_ctl = 1;
+					break;
+				}
+				if (azt_read_count <= 0)
+					printk
+					    ("aztcd: warning - try to read 0 frames\n");
+				while (azt_read_count) {	/*??? fast read ahead loop */
+					azt_buf_bn[azt_buf_in] = -1;
+					DTEN_LOW;	/*??? unsolved problem, very
+							   seldom we get timeouts
+							   here, don't now the real
+							   reason. With my drive this
+							   sometimes also happens with
+							   Aztech's original driver under
+							   DOS. Is it a hardware bug? 
+							   I tried to recover from such
+							   situations here. Zimmermann */
+					if (aztTimeOutCount >= AZT_TIMEOUT) {
+						printk
+						    ("read_count:%d CURRENT->nr_sectors:%ld azt_buf_in:%d\n",
+						     azt_read_count,
+						     CURRENT->nr_sectors,
+						     azt_buf_in);
+						printk
+						    ("azt_transfer_is_active:%x\n",
+						     azt_transfer_is_active);
+						azt_read_count = 0;
+						azt_state = AZT_S_STOP;
+						loop_ctl = 1;
+						end_request(1);	/*should we have here (1) or (0)? */
+					} else {
+						if (azt_read_mode ==
+						    AZT_MODE_2) {
+							insb(DATA_PORT,
+							     azt_buf +
+							     CD_FRAMESIZE_RAW
+							     * azt_buf_in,
+							     CD_FRAMESIZE_RAW);
+						} else {
+							insb(DATA_PORT,
+							     azt_buf +
+							     CD_FRAMESIZE *
+							     azt_buf_in,
+							     CD_FRAMESIZE);
+						}
+						azt_read_count--;
 #ifdef AZT_TEST3
-		    printk("AZT_S_DATA; ---I've read data- read_count: %d\n",azt_read_count);
-		    printk("azt_next_bn:%d  azt_buf_in:%d azt_buf_out:%d  azt_buf_bn:%d\n", \
-			 azt_next_bn, azt_buf_in, azt_buf_out, azt_buf_bn[azt_buf_in]);
-#endif
-		    azt_buf_bn[azt_buf_in] = azt_next_bn++;
-		    if (azt_buf_out == -1)
-		      azt_buf_out = azt_buf_in;
-		    azt_buf_in = azt_buf_in + 1 == AZT_BUF_SIZ ? 0 : azt_buf_in + 1;
-		  }
-	       }
-	      if (!azt_transfer_is_active) {
-		while (CURRENT_VALID) {
-		  azt_transfer();
-		  if (CURRENT -> nr_sectors == 0)
-		    end_request(1);
-		  else
-		    break;
-		}
-	      }
-
-	      if (CURRENT_VALID
-		&& (CURRENT -> sector / 4 < azt_next_bn ||
-		CURRENT -> sector / 4 > azt_next_bn + AZT_BUF_SIZ)) {
-		azt_state = AZT_S_STOP;
-		loop_ctl = 1;
-		break;
-	      }
-	      AztTimeout = READ_TIMEOUT;   
-	      if (azt_read_count==0) {
-		azt_state = AZT_S_STOP; 
-		loop_ctl = 1;
-		break;           
-	      } 
-	      break;
-	    }
-    break;
+						printk
+						    ("AZT_S_DATA; ---I've read data- read_count: %d\n",
+						     azt_read_count);
+						printk
+						    ("azt_next_bn:%d  azt_buf_in:%d azt_buf_out:%d  azt_buf_bn:%d\n",
+						     azt_next_bn,
+						     azt_buf_in,
+						     azt_buf_out,
+						     azt_buf_bn
+						     [azt_buf_in]);
+#endif
+						azt_buf_bn[azt_buf_in] =
+						    azt_next_bn++;
+						if (azt_buf_out == -1)
+							azt_buf_out =
+							    azt_buf_in;
+						azt_buf_in =
+						    azt_buf_in + 1 ==
+						    AZT_BUF_SIZ ? 0 :
+						    azt_buf_in + 1;
+					}
+				}
+				if (!azt_transfer_is_active) {
+					while (CURRENT_VALID) {
+						azt_transfer();
+						if (CURRENT->nr_sectors ==
+						    0)
+							end_request(1);
+						else
+							break;
+					}
+				}
+
+				if (CURRENT_VALID
+				    && (CURRENT->sector / 4 < azt_next_bn
+					|| CURRENT->sector / 4 >
+					azt_next_bn + AZT_BUF_SIZ)) {
+					azt_state = AZT_S_STOP;
+					loop_ctl = 1;
+					break;
+				}
+				AztTimeout = READ_TIMEOUT;
+				if (azt_read_count == 0) {
+					azt_state = AZT_S_STOP;
+					loop_ctl = 1;
+					break;
+				}
+				break;
+			}
+			break;
 
 
-	case AZT_S_STOP:
+		case AZT_S_STOP:
 #ifdef AZT_TEST3
-	  if (azt_state!=azt_state_old) {
-	    azt_state_old=azt_state;
-	    printk("AZT_S_STOP\n");
-	  }
-#endif
-	  if (azt_read_count!=0) printk("aztcd: discard data=%x frames\n",azt_read_count);
-	  while (azt_read_count!=0) {
-	    int i;
-	    if ( !(inb(STATUS_PORT) & AFL_DATA) ) {
-	      if (azt_read_mode==AZT_MODE_2)
-	         for (i=0; i<CD_FRAMESIZE_RAW; i++) inb(DATA_PORT);
-	      else   
-	         for (i=0; i<CD_FRAMESIZE; i++) inb(DATA_PORT);
-	    }
-	    azt_read_count--;
-	  }  
-	  if (aztSendCmd(ACMD_GET_STATUS)) RETURN("azt_poll 5");
-	  azt_state = AZT_S_STOPPING;
-	  AztTimeout = 1000;
-	  break;
+			if (azt_state != azt_state_old) {
+				azt_state_old = azt_state;
+				printk("AZT_S_STOP\n");
+			}
+#endif
+			if (azt_read_count != 0)
+				printk("aztcd: discard data=%x frames\n",
+				       azt_read_count);
+			while (azt_read_count != 0) {
+				int i;
+				if (!(inb(STATUS_PORT) & AFL_DATA)) {
+					if (azt_read_mode == AZT_MODE_2)
+						for (i = 0;
+						     i < CD_FRAMESIZE_RAW;
+						     i++)
+							inb(DATA_PORT);
+					else
+						for (i = 0;
+						     i < CD_FRAMESIZE; i++)
+							inb(DATA_PORT);
+				}
+				azt_read_count--;
+			}
+			if (aztSendCmd(ACMD_GET_STATUS))
+				RETURN("azt_poll 5");
+			azt_state = AZT_S_STOPPING;
+			AztTimeout = 1000;
+			break;
 
-	case AZT_S_STOPPING:
+		case AZT_S_STOPPING:
 #ifdef AZT_TEST3
-	  if (azt_state!=azt_state_old) {
-	    azt_state_old=azt_state;
-	    printk("AZT_S_STOPPING\n");
-	  }
-#endif
-
-	  if ((st = aztStatus()) == -1 && AztTimeout)
-	    break;
-
-	  if ((st != -1) && ((st & AST_DSK_CHG)||(st & AST_NOT_READY))) {
-	    aztDiskChanged = 1;
-	    aztTocUpToDate = 0;
-	    azt_invalidate_buffers();
-	    printk("aztcd: Disk Changed or Not Ready 4 - Unmount Disk!\n");
-	    end_request(0);
-	  }
-
+			if (azt_state != azt_state_old) {
+				azt_state_old = azt_state;
+				printk("AZT_S_STOPPING\n");
+			}
+#endif
+
+			if ((st = aztStatus()) == -1 && AztTimeout)
+				break;
+
+			if ((st != -1)
+			    && ((st & AST_DSK_CHG)
+				|| (st & AST_NOT_READY))) {
+				aztDiskChanged = 1;
+				aztTocUpToDate = 0;
+				azt_invalidate_buffers();
+				printk
+				    ("aztcd: Disk Changed or Not Ready 4 - Unmount Disk!\n");
+				end_request(0);
+			}
 
 #ifdef AZT_TEST3
-	  printk("CURRENT_VALID %d azt_mode %d\n",
-	     CURRENT_VALID, azt_mode);
+			printk("CURRENT_VALID %d azt_mode %d\n",
+			       CURRENT_VALID, azt_mode);
 #endif
 
-	  if (CURRENT_VALID) {
-	    if (st != -1) {
-	      if (azt_mode == 1) {
-		azt_state = AZT_S_READ;
-		loop_ctl = 1;
-		skip = 1;
-		break;
-	      } else {
-		azt_state = AZT_S_MODE;
-		loop_ctl = 1;
-		skip = 1;
-		break;
-	      }
-	    } else {
-	      azt_state = AZT_S_START;
-	      AztTimeout = 1;
-	    }
-	  } else {
-	    azt_state = AZT_S_IDLE;
-	    return;
-	  }
-	  break;
+			if (CURRENT_VALID) {
+				if (st != -1) {
+					if (azt_mode == 1) {
+						azt_state = AZT_S_READ;
+						loop_ctl = 1;
+						skip = 1;
+						break;
+					} else {
+						azt_state = AZT_S_MODE;
+						loop_ctl = 1;
+						skip = 1;
+						break;
+					}
+				} else {
+					azt_state = AZT_S_START;
+					AztTimeout = 1;
+				}
+			} else {
+				azt_state = AZT_S_IDLE;
+				return;
+			}
+			break;
+
+		default:
+			printk("aztcd: invalid state %d\n", azt_state);
+			return;
+		}		/* case */
+	}			/* while */
 
-	default:
-	  printk("aztcd: invalid state %d\n", azt_state);
-	  return;
-      }  /* case */
-    } /* while */
-  
-
-   if (!AztTimeout--) 
-    { printk("aztcd: timeout in state %d\n", azt_state);
-      azt_state = AZT_S_STOP;
-      if (aztSendCmd(ACMD_STOP)) RETURN("azt_poll 6"); 
-      STEN_LOW_WAIT;     
-    };
 
-  SET_TIMER(azt_poll, HZ/100);
+	if (!AztTimeout--) {
+		printk("aztcd: timeout in state %d\n", azt_state);
+		azt_state = AZT_S_STOP;
+		if (aztSendCmd(ACMD_STOP))
+			RETURN("azt_poll 6");
+		STEN_LOW_WAIT;
+	};
+
+	SET_TIMER(azt_poll, HZ / 100);
 }
 
 
@@ -2217,28 +2461,34 @@
   ###########################################################################
 */
 static void azt_hsg2msf(long hsg, struct msf *msf)
-{       hsg += 150;
-	msf -> min = hsg / 4500;
+{
+	hsg += 150;
+	msf->min = hsg / 4500;
 	hsg %= 4500;
-	msf -> sec = hsg / 75;
-	msf -> frame = hsg % 75;
+	msf->sec = hsg / 75;
+	msf->frame = hsg % 75;
 #ifdef AZT_DEBUG
-	if (msf->min  >=70) printk("aztcd: Error hsg2msf address Minutes\n");
-	if (msf->sec  >=60) printk("aztcd: Error hsg2msf address Seconds\n");
-	if (msf->frame>=75) printk("aztcd: Error hsg2msf address Frames\n");
-#endif
-	azt_bin2bcd(&msf -> min);           /* convert to BCD */
-	azt_bin2bcd(&msf -> sec);
-	azt_bin2bcd(&msf -> frame);
+	if (msf->min >= 70)
+		printk("aztcd: Error hsg2msf address Minutes\n");
+	if (msf->sec >= 60)
+		printk("aztcd: Error hsg2msf address Seconds\n");
+	if (msf->frame >= 75)
+		printk("aztcd: Error hsg2msf address Frames\n");
+#endif
+	azt_bin2bcd(&msf->min);	/* convert to BCD */
+	azt_bin2bcd(&msf->sec);
+	azt_bin2bcd(&msf->frame);
 }
 
 static long azt_msf2hsg(struct msf *mp)
-{ return azt_bcd2bin(mp -> frame) + azt_bcd2bin(mp -> sec) * 75
-		                  + azt_bcd2bin(mp -> min) * 4500 - CD_MSF_OFFSET;
+{
+	return azt_bcd2bin(mp->frame) + azt_bcd2bin(mp->sec) * 75
+	    + azt_bcd2bin(mp->min) * 4500 - CD_MSF_OFFSET;
 }
 
 static void azt_bin2bcd(unsigned char *p)
-{       int u, t;
+{
+	int u, t;
 
 	u = *p % 10;
 	t = *p / 10;
@@ -2246,7 +2496,8 @@
 }
 
 static int azt_bcd2bin(unsigned char bcd)
-{       return (bcd >> 4) * 10 + (bcd & 0xF);
+{
+	return (bcd >> 4) * 10 + (bcd & 0xF);
 }
 
 MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/cdrom/mcd.c linux/drivers/cdrom/mcd.c
--- linux-2.4.10-pre6/drivers/cdrom/mcd.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/cdrom/mcd.c	Mon Dec  3 23:08:46 2001
@@ -2,6 +2,7 @@
 	linux/kernel/blk_drv/mcd.c - Mitsumi CDROM driver
 
 	Copyright (C) 1992  Martin Harriss
+	Portions Copyright (C) 2001 Red Hat
 
 	martin@bdsi.com (no longer valid - where are you now, Martin?)
 
@@ -74,7 +75,8 @@
 			 module_init & module_exit.
 			 Torben Mathiasen <tmm@image.dk>
 		
-			 
+	September 2001 - Reformatted and cleaned up the code
+			 Alan Cox <alan@redhat.com>			 
 */
 
 #include <linux/module.h>
@@ -117,22 +119,8 @@
 /* Is the drive connected properly and responding?? */
 static int mcdPresent;
 
-#if 0
-#define TEST1			/* <int-..> */
-#define TEST2			/* do_mcd_req */
-#define TEST3 */		/* MCD_S_state */
-#define TEST4			/* QUICK_LOOP-counter */
-#define TEST5 */		/* port(1) state */
-#endif
-
-#if 1
 #define QUICK_LOOP_DELAY udelay(45)	/* use udelay */
 #define QUICK_LOOP_COUNT 20
-#else
-#define QUICK_LOOP_DELAY
-#define QUICK_LOOP_COUNT 140	/* better wait constant time */
-#endif
-/* #define DOUBLE_QUICK_ONLY */
 
 #define CURRENT_VALID \
 (!QUEUE_EMPTY && MAJOR(CURRENT -> rq_dev) == MAJOR_NR && CURRENT -> cmd == READ \
@@ -158,12 +146,10 @@
 static volatile enum mcd_state_e mcd_state = MCD_S_IDLE;
 static int mcd_mode = -1;
 static int MCMD_DATA_READ = MCMD_PLAY_READ;
+
 #define READ_TIMEOUT 3000
-#define WORK_AROUND_MITSUMI_BUG_92
-#define WORK_AROUND_MITSUMI_BUG_93
-#ifdef WORK_AROUND_MITSUMI_BUG_93
+
 int mitsumi_bug_93_wait;
-#endif				/* WORK_AROUND_MITSUMI_BUG_93 */
 
 static short mcd_port = CONFIG_MCD_BASE;	/* used as "mcd" by "insmod" */
 static int mcd_irq = CONFIG_MCD_IRQ;	/* must directly follow mcd_port */
@@ -234,10 +220,8 @@
 		mcd_port = ints[1];
 	if (ints[0] > 1)
 		mcd_irq = ints[2];
-#ifdef WORK_AROUND_MITSUMI_BUG_93
 	if (ints[0] > 2)
 		mitsumi_bug_93_wait = ints[3];
-#endif				/* WORK_AROUND_MITSUMI_BUG_93 */
 
 	return 1;
 }
@@ -248,23 +232,7 @@
 
 static int mcd_media_changed(struct cdrom_device_info *cdi, int disc_nr)
 {
-	int retval;
-
-
-#if 1				/* the below is not reliable */
 	return 0;
-#endif
-
-	if (cdi->dev) {
-		printk
-		    ("mcd: Mitsumi CD-ROM request error: invalid device.\n");
-		return 0;
-	}
-
-	retval = mcdDiskChanged;
-	mcdDiskChanged = 0;
-
-	return retval;
 }
 
 
@@ -278,7 +246,8 @@
 	int st = -1, retry;
 
 	for (retry = 0; retry < MCD_RETRY_ATTEMPTS; retry++) {
-		outb(MCMD_GET_STATUS, MCDPORT(0));	/* send get-status cmd */
+		/* send get-status cmd */
+		outb(MCMD_GET_STATUS, MCDPORT(0));
 
 		st = getMcdStatus(MCD_STATUS_DELAY);
 		if (st != -1)
@@ -335,8 +304,7 @@
 
 long msf2hsg(struct msf *mp)
 {
-	return bcd2bin(mp->frame)
-	    + bcd2bin(mp->sec) * 75 + bcd2bin(mp->min) * 4500 - 150;
+	return bcd2bin(mp->frame) + bcd2bin(mp->sec) * 75 + bcd2bin(mp->min) * 4500 - 150;
 }
 
 
@@ -538,18 +506,12 @@
 		subchnl->cdsc_ctrl = qInfo.ctrl_addr >> 4;
 		subchnl->cdsc_trk = bcd2bin(qInfo.track);
 		subchnl->cdsc_ind = bcd2bin(qInfo.pointIndex);
-		subchnl->cdsc_absaddr.msf.minute =
-		    bcd2bin(qInfo.diskTime.min);
-		subchnl->cdsc_absaddr.msf.second =
-		    bcd2bin(qInfo.diskTime.sec);
-		subchnl->cdsc_absaddr.msf.frame =
-		    bcd2bin(qInfo.diskTime.frame);
-		subchnl->cdsc_reladdr.msf.minute =
-		    bcd2bin(qInfo.trackTime.min);
-		subchnl->cdsc_reladdr.msf.second =
-		    bcd2bin(qInfo.trackTime.sec);
-		subchnl->cdsc_reladdr.msf.frame =
-		    bcd2bin(qInfo.trackTime.frame);
+		subchnl->cdsc_absaddr.msf.minute = bcd2bin(qInfo.diskTime.min);
+		subchnl->cdsc_absaddr.msf.second = bcd2bin(qInfo.diskTime.sec);
+		subchnl->cdsc_absaddr.msf.frame  = bcd2bin(qInfo.diskTime.frame);
+		subchnl->cdsc_reladdr.msf.minute = bcd2bin(qInfo.trackTime.min);
+		subchnl->cdsc_reladdr.msf.second = bcd2bin(qInfo.trackTime.sec);
+		subchnl->cdsc_reladdr.msf.frame  = bcd2bin(qInfo.trackTime.frame);
 		return (0);
 
 	case CDROMVOLCTRL:	/* Volume control */
@@ -594,8 +556,7 @@
 			for (i = 0; i < MCD_BUF_SIZ && mcd_buf_bn[i] != bn;
 			     ++i);
 			if (i < MCD_BUF_SIZ) {
-				int offs =
-				    (i * 4 + (CURRENT->sector & 3)) * 512;
+				int offs =(i * 4 + (CURRENT->sector & 3)) * 512;
 				int nr_sectors = 4 - (CURRENT->sector & 3);
 				if (mcd_buf_out != i) {
 					mcd_buf_out = i;
@@ -630,14 +591,10 @@
 	int st;
 
 	st = inb(MCDPORT(1)) & 0xFF;
-#ifdef TEST1
-	printk("<int1-%02X>", st);
-#endif
+	test1(printk("<int1-%02X>", st));
 	if (!(st & MFL_STATUS)) {
 		st = inb(MCDPORT(0)) & 0xFF;
-#ifdef TEST1
-		printk("<int0-%02X>", st);
-#endif
+		test1(printk("<int0-%02X>", st));
 		if ((st & 0xFF) != 0xFF)
 			mcd_error = st ? st & 0xFF : -1;
 	}
@@ -646,11 +603,10 @@
 
 static void do_mcd_request(request_queue_t * q)
 {
-#ifdef TEST2
-	printk(" do_mcd_request(%ld+%ld)\n", CURRENT->sector,
-	       CURRENT->nr_sectors);
-#endif
-	mcd_transfer_is_active = 1;
+	test2(printk(" do_mcd_request(%ld+%ld)\n", CURRENT->sector,
+	       CURRENT->nr_sectors));
+
+		mcd_transfer_is_active = 1;
 	while (CURRENT_VALID) {
 		if (CURRENT->bh) {
 			if (!buffer_locked(CURRENT->bh))
@@ -671,15 +627,14 @@
 				}
 				mcd_state = MCD_S_START;
 				McdTries = 5;
-				SET_TIMER(mcd_poll, 1);
+				mcd_timer.function = mcd_poll;
+				mod_timer(&mcd_timer, jiffies + 1);
 			}
 			break;
 		}
 	}
 	mcd_transfer_is_active = 0;
-#ifdef TEST2
-	printk(" do_mcd_request ends\n");
-#endif
+	test2(printk(" do_mcd_request ends\n"));
 }
 
 
@@ -691,7 +646,7 @@
 
 	if (mcd_error) {
 		if (mcd_error & 0xA5) {
-			printk("mcd: I/O error 0x%02x", mcd_error);
+			printk(KERN_ERR "mcd: I/O error 0x%02x", mcd_error);
 			if (mcd_error & 0x80)
 				printk(" (Door open)");
 			if (mcd_error & 0x20)
@@ -718,14 +673,13 @@
 			mcd_invalidate_buffers();
 #ifdef WARN_IF_READ_FAILURE
 			if (McdTries == MCD_RETRY_ATTEMPTS)
-				printk("mcd: read of block %d failed\n",
+				printk(KERN_ERR "mcd: read of block %d failed\n",
 				       mcd_next_bn);
 #endif
 			if (!McdTries--) {
 				/* Nuts! This cd is ready for recycling! */
 				/* When WAS the last time YOU cleaned it CORRECTLY?! */
-				printk
-				    ("mcd: read of block %d failed, giving up\n",
+				printk(KERN_ERR "mcd: read of block %d failed, giving up\n",
 				     mcd_next_bn);
 				if (mcd_transfer_is_active) {
 					McdTries = 0;
@@ -747,54 +701,35 @@
 		/* We ARE a double speed and we ARE bitching! */
 		if (mcd1xhold == 0) {	/* Okay, Like are we STILL at single speed? *//* We need to switch back to double speed now... */
 			MCMD_DATA_READ = MCMD_2X_READ;	/* Uhhh... BACK You GO! */
-			printk("mcd: Switching back to 2X speed!\n");	/* Tell 'em! */
+			printk(KERN_INFO "mcd: Switching back to 2X speed!\n");	/* Tell 'em! */
 		} else
 			mcd1xhold--;	/* No?! Count down the good reads some more... */
 		/* and try, try again! */
 	}
 
-
-
-      immediately:
+immediately:
 	switch (mcd_state) {
-
-
-
 	case MCD_S_IDLE:
-#ifdef TEST3
-		printk("MCD_S_IDLE\n");
-#endif
+		test3(printk("MCD_S_IDLE\n"));
 		goto out;
 
-
-
 	case MCD_S_START:
-#ifdef TEST3
-		printk("MCD_S_START\n");
-#endif
-
+		test3(printk("MCD_S_START\n"));
 		outb(MCMD_GET_STATUS, MCDPORT(0));
 		mcd_state = mcd_mode == 1 ? MCD_S_READ : MCD_S_MODE;
 		McdTimeout = 3000;
 		break;
 
-
-
 	case MCD_S_MODE:
-#ifdef TEST3
-		printk("MCD_S_MODE\n");
-#endif
-
+		test3(printk("MCD_S_MODE\n"));
 		if ((st = mcdStatus()) != -1) {
-
 			if (st & MST_DSK_CHG) {
 				mcdDiskChanged = 1;
 				tocUpToDate = 0;
 				mcd_invalidate_buffers();
 			}
 
-		      set_mode_immediately:
-
+set_mode_immediately:
 			if ((st & MST_DOOR_OPEN) || !(st & MST_READY)) {
 				mcdDiskChanged = 1;
 				tocUpToDate = 0;
@@ -802,6 +737,7 @@
 					mcd_state = MCD_S_START;
 					goto immediately;
 				}
+				printk(KERN_INFO);
 				printk((st & MST_DOOR_OPEN) ?
 				       "mcd: door open\n" :
 				       "mcd: disk removed\n");
@@ -810,33 +746,24 @@
 					end_request(0);
 				goto out;
 			}
-
 			outb(MCMD_SET_MODE, MCDPORT(0));
 			outb(1, MCDPORT(0));
 			mcd_mode = 1;
 			mcd_state = MCD_S_READ;
 			McdTimeout = 3000;
-
 		}
 		break;
 
-
-
 	case MCD_S_READ:
-#ifdef TEST3
-		printk("MCD_S_READ\n");
-#endif
-
+		test3(printk("MCD_S_READ\n"));
 		if ((st = mcdStatus()) != -1) {
-
 			if (st & MST_DSK_CHG) {
 				mcdDiskChanged = 1;
 				tocUpToDate = 0;
 				mcd_invalidate_buffers();
 			}
 
-		      read_immediately:
-
+read_immediately:
 			if ((st & MST_DOOR_OPEN) || !(st & MST_READY)) {
 				mcdDiskChanged = 1;
 				tocUpToDate = 0;
@@ -844,6 +771,7 @@
 					mcd_state = MCD_S_START;
 					goto immediately;
 				}
+				printk(KERN_INFO);
 				printk((st & MST_DOOR_OPEN) ?
 				       "mcd: door open\n" :
 				       "mcd: disk removed\n");
@@ -871,29 +799,20 @@
 		}
 		break;
 
-
 	case MCD_S_DATA:
-#ifdef TEST3
-		printk("MCD_S_DATA\n");
-#endif
-
+		test3(printk("MCD_S_DATA\n"));
 		st = inb(MCDPORT(1)) & (MFL_STATUSorDATA);
-	      data_immediately:
-#ifdef TEST5
-		printk("Status %02x\n", st);
-#endif
+data_immediately:
+		test5(printk("Status %02x\n", st))
 		switch (st) {
-
 		case MFL_DATA:
 #ifdef WARN_IF_READ_FAILURE
 			if (McdTries == 5)
-				printk("mcd: read of block %d failed\n",
+				printk(KERN_WARNING "mcd: read of block %d failed\n",
 				       mcd_next_bn);
 #endif
 			if (!McdTries--) {
-				printk
-				    ("mcd: read of block %d failed, giving up\n",
-				     mcd_next_bn);
+				printk(KERN_ERR "mcd: read of block %d failed, giving up\n", mcd_next_bn);
 				if (mcd_transfer_is_active) {
 					McdTries = 0;
 					break;
@@ -916,14 +835,12 @@
 				goto immediately;
 			}
 			mcd_buf_bn[mcd_buf_in] = -1;
-			READ_DATA(MCDPORT(0), mcd_buf + 2048 * mcd_buf_in,
+			insb(MCDPORT(0), mcd_buf + 2048 * mcd_buf_in,
 				  2048);
 			mcd_buf_bn[mcd_buf_in] = mcd_next_bn++;
 			if (mcd_buf_out == -1)
 				mcd_buf_out = mcd_buf_in;
-			mcd_buf_in =
-			    mcd_buf_in + 1 ==
-			    MCD_BUF_SIZ ? 0 : mcd_buf_in + 1;
+			mcd_buf_in = mcd_buf_in + 1 == MCD_BUF_SIZ ? 0 : mcd_buf_in + 1;
 			if (!mcd_transfer_is_active) {
 				while (CURRENT_VALID) {
 					mcd_transfer();
@@ -941,43 +858,23 @@
 				goto immediately;
 			}
 			McdTimeout = READ_TIMEOUT;
-#ifdef DOUBLE_QUICK_ONLY
-			if (MCMD_DATA_READ != MCMD_PLAY_READ)
-#endif
 			{
 				int count = QUICK_LOOP_COUNT;
 				while (count--) {
 					QUICK_LOOP_DELAY;
-					if ((st =
-					     (inb(MCDPORT(1))) &
-					     (MFL_STATUSorDATA)) !=
-					    (MFL_STATUSorDATA)) {
-#   ifdef TEST4
-/*	    printk("Quickloop success at %d\n",QUICK_LOOP_COUNT-count); */
-						printk(" %d ",
-						       QUICK_LOOP_COUNT -
-						       count);
-#   endif
+					if ((st = (inb(MCDPORT(1))) & (MFL_STATUSorDATA)) != (MFL_STATUSorDATA)) {
+						test4(printk(" %d ", QUICK_LOOP_COUNT - count));
 						goto data_immediately;
 					}
 				}
-#   ifdef TEST4
-/*      printk("Quickloop ended at %d\n",QUICK_LOOP_COUNT); */
-				printk("ended ");
-#   endif
+				test4(printk("ended "));
 			}
 			break;
 		}
 		break;
 
-
-
 	case MCD_S_STOP:
-#ifdef TEST3
-		printk("MCD_S_STOP\n");
-#endif
-
-#ifdef WORK_AROUND_MITSUMI_BUG_93
+		test3(printk("MCD_S_STOP\n"));
 		if (!mitsumi_bug_93_wait)
 			goto do_not_work_around_mitsumi_bug_93_1;
 
@@ -989,41 +886,29 @@
 		if (McdTimeout)
 			break;
 
-	      do_not_work_around_mitsumi_bug_93_1:
-#endif				/* WORK_AROUND_MITSUMI_BUG_93 */
-
+do_not_work_around_mitsumi_bug_93_1:
 		outb(MCMD_STOP, MCDPORT(0));
-
-#ifdef WORK_AROUND_MITSUMI_BUG_92
 		if ((inb(MCDPORT(1)) & MFL_STATUSorDATA) == MFL_STATUS) {
 			int i = 4096;
 			do {
 				inb(MCDPORT(0));
-			} while ((inb(MCDPORT(1)) & MFL_STATUSorDATA) ==
-				 MFL_STATUS && --i);
+			} while ((inb(MCDPORT(1)) & MFL_STATUSorDATA) == MFL_STATUS && --i);
 			outb(MCMD_STOP, MCDPORT(0));
-			if ((inb(MCDPORT(1)) & MFL_STATUSorDATA) ==
-			    MFL_STATUS) {
+			if ((inb(MCDPORT(1)) & MFL_STATUSorDATA) == MFL_STATUS) {
 				i = 4096;
 				do {
 					inb(MCDPORT(0));
-				} while ((inb(MCDPORT(1)) &
-					  MFL_STATUSorDATA) == MFL_STATUS
-					 && --i);
+				} while ((inb(MCDPORT(1)) & MFL_STATUSorDATA) == MFL_STATUS && --i);
 				outb(MCMD_STOP, MCDPORT(0));
 			}
 		}
-#endif				/* WORK_AROUND_MITSUMI_BUG_92 */
 
 		mcd_state = MCD_S_STOPPING;
 		McdTimeout = 1000;
 		break;
 
 	case MCD_S_STOPPING:
-#ifdef TEST3
-		printk("MCD_S_STOPPING\n");
-#endif
-
+		test3(printk("MCD_S_STOPPING\n"));
 		if ((st = mcdStatus()) == -1 && McdTimeout)
 			break;
 
@@ -1032,7 +917,6 @@
 			tocUpToDate = 0;
 			mcd_invalidate_buffers();
 		}
-#ifdef WORK_AROUND_MITSUMI_BUG_93
 		if (!mitsumi_bug_93_wait)
 			goto do_not_work_around_mitsumi_bug_93_2;
 
@@ -1043,17 +927,10 @@
 	case 9 + 3 + 2:
 		if (McdTimeout)
 			break;
-
 		st = -1;
 
-	      do_not_work_around_mitsumi_bug_93_2:
-#endif				/* WORK_AROUND_MITSUMI_BUG_93 */
-
-#ifdef TEST3
-		printk("CURRENT_VALID %d mcd_mode %d\n",
-		       CURRENT_VALID, mcd_mode);
-#endif
-
+do_not_work_around_mitsumi_bug_93_2:
+		test3(printk("CURRENT_VALID %d mcd_mode %d\n", CURRENT_VALID, mcd_mode));
 		if (CURRENT_VALID) {
 			if (st != -1) {
 				if (mcd_mode == 1)
@@ -1069,25 +946,21 @@
 			goto out;
 		}
 		break;
-
 	default:
-		printk("mcd: invalid state %d\n", mcd_state);
+		printk(KERN_ERR "mcd: invalid state %d\n", mcd_state);
 		goto out;
 	}
-
-      ret:
+ret:
 	if (!McdTimeout--) {
-		printk("mcd: timeout in state %d\n", mcd_state);
+		printk(KERN_WARNING "mcd: timeout in state %d\n", mcd_state);
 		mcd_state = MCD_S_STOP;
 	}
-
-	SET_TIMER(mcd_poll, 1);
-      out:
+	mcd_timer.function = mcd_poll;
+	mod_timer(&mcd_timer, jiffies + 1);
+out:
 	return;
 }
 
-
-
 static void mcd_invalidate_buffers(void)
 {
 	int i;
@@ -1096,7 +969,6 @@
 	mcd_buf_out = -1;
 }
 
-
 /*
  * Open the device special file.  Check that a disk is in.
  */
@@ -1125,11 +997,11 @@
 	if (updateToc() < 0)
 		goto err_out;
 
-      bump_count:
+bump_count:
 	++mcd_open_count;
 	return 0;
 
-      err_out:
+err_out:
 	MOD_DEC_USE_COUNT;
 	return -EIO;
 }
@@ -1140,10 +1012,10 @@
  */
 static void mcd_release(struct cdrom_device_info *cdi)
 {
-	MOD_DEC_USE_COUNT;
 	if (!--mcd_open_count) {
 		mcd_invalidate_buffers();
 	}
+	MOD_DEC_USE_COUNT;
 }
 
 
@@ -1155,8 +1027,7 @@
 	switch (level) {
 	case 3:
 		if (unregister_cdrom(&mcd_info)) {
-			printk(KERN_WARNING
-			       "Can't unregister cdrom mcd\n");
+			printk(KERN_WARNING "Can't unregister cdrom mcd\n");
 			return;
 		}
 		free_irq(mcd_irq, NULL);
@@ -1164,8 +1035,7 @@
 		release_region(mcd_port, 4);
 	case 1:
 		if (devfs_unregister_blkdev(MAJOR_NR, "mcd")) {
-			printk(KERN_WARNING
-			       "Can't unregister major mcd\n");
+			printk(KERN_WARNING "Can't unregister major mcd\n");
 			return;
 		}
 		blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR));
@@ -1186,19 +1056,17 @@
 	char msg[80];
 
 	if (mcd_port <= 0 || mcd_irq <= 0) {
-		printk("skip mcd_init\n");
+		printk(KERN_INFO "mcd: not probing.\n");
 		return -EIO;
 	}
 
 	if (devfs_register_blkdev(MAJOR_NR, "mcd", &cdrom_fops) != 0) {
-		printk("Unable to get major %d for Mitsumi CD-ROM\n",
-		       MAJOR_NR);
+		printk(KERN_ERR "mcd: Unable to get major %d for Mitsumi CD-ROM\n", MAJOR_NR);
 		return -EIO;
 	}
 	if (check_region(mcd_port, 4)) {
 		cleanup(1);
-		printk("Init failed, I/O port (%X) already in use\n",
-		       mcd_port);
+		printk(KERN_ERR "mcd: Initialization failed, I/O port (%X) already in use\n", mcd_port);
 		return -EIO;
 	}
 
@@ -1218,7 +1086,7 @@
 			break;
 
 	if (count >= 2000000) {
-		printk("Init failed. No mcd device at 0x%x irq %d\n",
+		printk(KERN_INFO "mcd: initialisation failed - No mcd device at 0x%x irq %d\n",
 		       mcd_port, mcd_irq);
 		cleanup(1);
 		return -EIO;
@@ -1228,7 +1096,7 @@
 	outb(MCMD_GET_VERSION, MCDPORT(0));
 	for (count = 0; count < 3; count++)
 		if (getValue(result + count)) {
-			printk("mitsumi get version failed at 0x%x\n",
+			printk(KERN_ERR "mcd: mitsumi get version failed at 0x%x\n",
 			       mcd_port);
 			cleanup(1);
 			return -EIO;
@@ -1246,10 +1114,8 @@
 
 	/* don't get the IRQ until we know for sure the drive is there */
 
-	if (request_irq
-	    (mcd_irq, mcd_interrupt, SA_INTERRUPT, "Mitsumi CD", NULL)) {
-		printk("Unable to get IRQ%d for Mitsumi CD-ROM\n",
-		       mcd_irq);
+	if (request_irq(mcd_irq, mcd_interrupt, SA_INTERRUPT, "Mitsumi CD", NULL)) {
+		printk(KERN_ERR "mcd: Unable to get IRQ%d for Mitsumi CD-ROM\n", mcd_irq);
 		cleanup(1);
 		return -EIO;
 	}
@@ -1282,7 +1148,7 @@
 	mcd_info.dev = MKDEV(MAJOR_NR, 0);
 
 	if (register_cdrom(&mcd_info) != 0) {
-		printk("Cannot register Mitsumi CD-ROM!\n");
+		printk(KERN_ERR "mcd: Unable to register Mitsumi CD-ROM.\n");
 		cleanup(3);
 		return -EIO;
 	}
@@ -1373,8 +1239,8 @@
 		wake_up(&mcd_waitq);
 		return;
 	}
-
-	SET_TIMER(mcdStatTimer, 1);
+	mcd_timer.function = mcdStatTimer;
+	mod_timer(&mcd_timer, jiffies + 1);
 }
 
 
@@ -1389,7 +1255,8 @@
 	int st;
 
 	McdTimeout = timeout;
-	SET_TIMER(mcdStatTimer, 1);
+	mcd_timer.function = mcdStatTimer;
+	mod_timer(&mcd_timer, jiffies + 1);
 	sleep_on(&mcd_waitq);
 	if (McdTimeout <= 0)
 		return -1;
@@ -1414,6 +1281,7 @@
 
 /* gives current state of the drive This function is quite unreliable, 
    and should probably be rewritten by someone, eventually... */
+
 int mcd_drive_status(struct cdrom_device_info *cdi, int slot_nr)
 {
 	int st;
@@ -1456,7 +1324,6 @@
 	return 0;
 }
 
-
 /*
  * Read the current Q-channel info.  Also used for reading the
  * table of contents.
@@ -1500,12 +1367,11 @@
 	return 0;
 }
 
-
 /*
  * Read the table of contents (TOC) and TOC header if necessary
  */
 
-static int updateToc()
+static int updateToc(void)
 {
 	if (tocUpToDate)
 		return 0;
@@ -1520,12 +1386,11 @@
 	return 0;
 }
 
-
 /*
  * Read the table of contents header
  */
 
-static int GetDiskInfo()
+static int GetDiskInfo(void)
 {
 	int retry;
 
@@ -1571,12 +1436,11 @@
 	return 0;
 }
 
-
 /*
  * Read the table of contents (TOC)
  */
 
-static int GetToc()
+static int GetToc(void)
 {
 	int i, px;
 	int limit;
@@ -1652,7 +1516,6 @@
 
 	return limit > 0 ? 0 : -1;
 }
-
 
 void __exit mcd_exit(void)
 {
diff -urN linux-2.4.10-pre6/drivers/cdrom/mcd.h linux/drivers/cdrom/mcd.h
--- linux-2.4.10-pre6/drivers/cdrom/mcd.h	Wed Jul  5 11:24:41 2000
+++ linux/drivers/cdrom/mcd.h	Mon Dec  3 23:08:46 2001
@@ -70,17 +70,6 @@
 
 /* borrowed from hd.c */
 
-#define READ_DATA(port, buf, nr) \
-insb(port, buf, nr)
-
-#define SET_TIMER(func, jifs) 				\
-	do {						\
-		mcd_timer.function = func;		\
-		mod_timer(&mcd_timer, jiffies + jifs);	\
-	} while (0)
-
-#define CLEAR_TIMER		del_timer_async(&mcd_timer);
-
 #define MAX_TRACKS		104
 
 struct msf {
@@ -108,3 +97,10 @@
 	struct msf	trackTime;
 	struct msf	diskTime;
 };
+
+#define test1(x)
+#define test2(x)
+#define test3(x)
+#define test4(x)
+#define test5(x)
+
diff -urN linux-2.4.10-pre6/drivers/cdrom/optcd.c linux/drivers/cdrom/optcd.c
--- linux-2.4.10-pre6/drivers/cdrom/optcd.c	Sun Feb  4 10:05:29 2001
+++ linux/drivers/cdrom/optcd.c	Mon Dec  3 23:08:46 2001
@@ -2097,3 +2097,4 @@
 module_exit(optcd_exit);
 
 
+MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/cdrom/sbpcd.c linux/drivers/cdrom/sbpcd.c
--- linux-2.4.10-pre6/drivers/cdrom/sbpcd.c	Mon Jul 16 15:13:32 2001
+++ linux/drivers/cdrom/sbpcd.c	Mon Dec  3 23:08:46 2001
@@ -4272,6 +4272,12 @@
 		D_S[d].aud_buf=NULL;
 		D_S[d].sbp_audsiz=arg;
 		
+		if (D_S[d].sbp_audsiz>16)
+		{
+			D_S[d].sbp_audsiz = 0;
+			RETURN_UP(D_S[d].sbp_audsiz);
+		}
+	
 		if (D_S[d].sbp_audsiz>0)
 		{
 			D_S[d].aud_buf=(u_char *) vmalloc(D_S[d].sbp_audsiz*CD_FRAMESIZE_RAW);
@@ -6016,6 +6022,9 @@
 {
    return sbpcd_chk_disk_change(cdi->dev);
 }
+
+MODULE_LICENSE("GPL");
+
 /*==========================================================================*/
 /*
  * Overrides for Emacs so that we follow Linus's tabbing style.
@@ -6033,3 +6042,4 @@
  * c-continued-brace-offset: 0
  * End:
  */
+
diff -urN linux-2.4.10-pre6/drivers/cdrom/sonycd535.c linux/drivers/cdrom/sonycd535.c
--- linux-2.4.10-pre6/drivers/cdrom/sonycd535.c	Fri Feb  9 11:30:22 2001
+++ linux/drivers/cdrom/sonycd535.c	Mon Dec  3 23:08:46 2001
@@ -1709,3 +1709,4 @@
 module_exit(sony535_exit);
 
 
+MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/char/Config.in linux/drivers/char/Config.in
--- linux-2.4.10-pre6/drivers/char/Config.in	Sun Aug 12 10:38:48 2001
+++ linux/drivers/char/Config.in	Mon Dec  3 23:08:46 2001
@@ -59,6 +59,24 @@
      tristate '    Stallion EasyIO or EC8/32 support' CONFIG_STALLION
      tristate '    Stallion EC8/64, ONboard, Brumby support' CONFIG_ISTALLION
    fi
+   if [ "$CONFIG_MIPS" = "y" ]; then
+     bool '  TMPTX3912/PR31700 serial port support' CONFIG_SERIAL_TX3912
+     dep_bool '     Console on TMPTX3912/PR31700 serial port' CONFIG_SERIAL_TX3912_CONSOLE $CONFIG_SERIAL_TX3912
+     bool '  Enable Au1000 UART Support' CONFIG_AU1000_UART
+     if [ "$CONFIG_AU1000_UART" = "y" ]; then
+         bool '        Enable Au1000 serial console' CONFIG_AU1000_SERIAL_CONSOLE
+     fi
+   fi
+fi
+if [ "$CONFIG_IT8712" = "y" ]; then
+   bool 'Enable Qtronix 990P Keyboard Support' CONFIG_QTRONIX_KEYBOARD
+   if [ "$CONFIG_QTRONIX_KEYBOARD" = "y" ]; then
+     define_bool CONFIG_IT8172_CIR y
+   else
+     bool '    Enable PS2 Keyboard Support' CONFIG_PC_KEYB
+   fi
+   bool 'Enable Smart Card Reader 0 Support ' CONFIG_IT8172_SCR0
+   bool 'Enable Smart Card Reader 1 Support ' CONFIG_IT8172_SCR1
 fi
 if [ "$CONFIG_EXPERIMENTAL" = "y" -a "$CONFIG_ZORRO" = "y" ]; then
    tristate 'Commodore A2232 serial support (EXPERIMENTAL)' CONFIG_A2232
diff -urN linux-2.4.10-pre6/drivers/char/Makefile linux/drivers/char/Makefile
--- linux-2.4.10-pre6/drivers/char/Makefile	Mon Dec  3 23:08:36 2001
+++ linux/drivers/char/Makefile	Mon Dec  3 23:08:46 2001
@@ -41,6 +41,12 @@
   SERIAL   =
 endif
 
+ifeq ($(ARCH),mips)
+  ifneq ($(CONFIG_PC_KEYB),y)
+    KEYBD    =
+  endif
+endif
+
 ifeq ($(ARCH),s390x)
   KEYMAP   =
   KEYBD    =
@@ -95,8 +101,9 @@
 endif
 
 ifeq ($(CONFIG_DECSTATION),y)
+  KEYMAP   =
   KEYBD    =
-  SERIAL   =
+  SERIAL   = decserial.o
 endif
 
 ifeq ($(CONFIG_BAGET_MIPS),y)
@@ -104,10 +111,18 @@
   SERIAL   =
 endif
 
+ifeq ($(CONFIG_NINO),y)
+  SERIAL   =
+endif
+
 ifneq ($(CONFIG_SUN_SERIAL),)
   SERIAL   =
 endif
 
+ifeq ($(CONFIG_QTRONIX_KEYBOARD),y)
+  KEYBD    = qtronix.o
+  KEYMAP   = qtronixmap.o
+endif
 
 obj-$(CONFIG_VT) += vt.o vc_screen.o consolemap.o consolemap_deftbl.o $(CONSOLE) selection.o
 obj-$(CONFIG_SERIAL) += $(SERIAL)
@@ -147,6 +162,7 @@
 obj-$(CONFIG_MVME147_SCC) += generic_serial.o vme_scc.o
 obj-$(CONFIG_MVME162_SCC) += generic_serial.o vme_scc.o
 obj-$(CONFIG_BVME6000_SCC) += generic_serial.o vme_scc.o
+obj-$(CONFIG_SERIAL_TX3912) += generic_serial.o serial_tx3912.o
 
 subdir-$(CONFIG_RIO) += rio
 subdir-$(CONFIG_INPUT) += joystick
@@ -230,4 +246,7 @@
 .DELETE_ON_ERROR:
 
 defkeymap.c: defkeymap.map
+	set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
+
+qtronixmap.c: qtronixmap.map
 	set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
diff -urN linux-2.4.10-pre6/drivers/char/decserial.c linux/drivers/char/decserial.c
--- linux-2.4.10-pre6/drivers/char/decserial.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/char/decserial.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,98 @@
+/*
+ * sercons.c
+ *      choose the right serial device at boot time
+ *
+ * triemer 6-SEP-1998
+ *      sercons.c is designed to allow the three different kinds 
+ *      of serial devices under the decstation world to co-exist
+ *      in the same kernel.  The idea here is to abstract 
+ *      the pieces of the drivers that are common to this file
+ *      so that they do not clash at compile time and runtime.
+ *
+ * HK 16-SEP-1998 v0.002
+ *      removed the PROM console as this is not a real serial
+ *      device. Added support for PROM console in drivers/char/tty_io.c
+ *      instead. Although it may work to enable more than one 
+ *      console device I strongly recommend to use only one.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <asm/dec/machtype.h>
+
+#ifdef CONFIG_ZS
+extern int zs_init(void);
+#endif
+
+#ifdef CONFIG_DZ
+extern int dz_init(void);
+#endif
+
+#ifdef CONFIG_SERIAL_CONSOLE
+
+#ifdef CONFIG_ZS
+extern void zs_serial_console_init(void);
+#endif
+
+#ifdef CONFIG_DZ
+extern void dz_serial_console_init(void);
+#endif
+
+#endif
+
+/* rs_init - starts up the serial interface -
+   handle normal case of starting up the serial interface */
+
+#ifdef CONFIG_SERIAL
+
+int __init rs_init(void)
+{
+
+#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
+    if (IOASIC)
+	return zs_init();
+    else
+	return dz_init();
+#else
+
+#ifdef CONFIG_ZS
+    return zs_init();
+#endif
+
+#ifdef CONFIG_DZ
+    return dz_init();
+#endif
+
+#endif
+}
+
+__initcall(rs_init);
+
+#endif
+
+#ifdef CONFIG_SERIAL_CONSOLE
+
+/* serial_console_init handles the special case of starting
+ *   up the console on the serial port
+ */
+void __init serial_console_init(void)
+{
+#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
+    if (IOASIC)
+	zs_serial_console_init();
+    else
+	dz_serial_console_init();
+#else
+
+#ifdef CONFIG_ZS
+    zs_serial_console_init();
+#endif
+
+#ifdef CONFIG_DZ
+    dz_serial_console_init();
+#endif
+
+#endif
+}
+
+#endif
diff -urN linux-2.4.10-pre6/drivers/char/dz.c linux/drivers/char/dz.c
--- linux-2.4.10-pre6/drivers/char/dz.c	Thu Aug 16 09:49:49 2001
+++ linux/drivers/char/dz.c	Mon Dec  3 23:08:46 2001
@@ -21,15 +21,10 @@
  * [07-SEP-99] Bugfixes 
  */
 
-#define DEBUG_DZ 1
+/* #define DEBUG_DZ 1 */
 
-#ifdef MODULE
-#include <linux/module.h>
 #include <linux/version.h>
-#else
-#define MOD_INC_USE_COUNT
-#define MOD_DEC_USE_COUNT
-#endif
+#include <linux/module.h>
 
 #include <linux/config.h>
 #include <linux/kernel.h>
@@ -41,9 +36,10 @@
 #include <linux/param.h>
 #include <linux/tqueue.h>
 #include <linux/interrupt.h>
+#include <linux/serial.h>
+#include <linux/serialP.h>
 #include <asm-mips/wbflush.h>
-/* for definition of SERIAL */
-#include <asm/dec/interrupts.h>
+#include <asm/dec/interrupts.h>			/* for definition of SERIAL */
 
 /* for definition of struct console */
 #ifdef CONFIG_SERIAL_CONSOLE
@@ -91,13 +87,13 @@
  */
 static void debug_console( const char *s,int count)
 {
-    unsigned i;
+	unsigned i;
 
-    for (i = 0; i < count; i++) {
-       if (*s == 10)
-           prom_printf("%c", 13);
-       prom_printf("%c", *s++);
-    }
+	for (i = 0; i < count; i++) {
+		if (*s == 10)
+			prom_printf("%c", 13);
+		prom_printf("%c", *s++);
+	}
 }
 #endif
 
@@ -112,16 +108,16 @@
 
 static inline unsigned short dz_in (struct dz_serial *info, unsigned offset)
 {
-  volatile unsigned short *addr = (volatile unsigned short *)(info->port + offset);
-  return *addr;
+	volatile u16 *addr = (volatile u16 *)(info->port + offset);
+
+	return *addr;
 }
 
-static inline void dz_out (struct dz_serial *info, unsigned offset, unsigned short value)
+static inline void dz_out (struct dz_serial *info, unsigned offset,
+                           unsigned short value)
 {
-
-    volatile unsigned short *addr = (volatile unsigned short *)(info->port + offset);
-  *addr = value;
-
+	volatile u16 *addr = (volatile u16 *)(info->port + offset);
+	*addr = value;
 }
 
 /*
@@ -136,33 +132,32 @@
 
 static void dz_stop (struct tty_struct *tty)
 {
-  struct dz_serial *info; 
-  unsigned short mask, tmp;
+	struct dz_serial *info; 
+	unsigned short mask, tmp;
 
-  if (tty==0) 
-    return; 
+	if (!tty) 
+		return; 
  
-  info = (struct dz_serial *)tty->driver_data; 
-         
-  mask = 1 << info->line;
-  tmp = dz_in (info, DZ_TCR);       /* read the TX flag */
-
-    tmp &= ~mask;                   /* clear the TX flag */
-    dz_out (info, DZ_TCR, tmp);
-}  
+	info = (struct dz_serial *)tty->driver_data; 
+
+	mask = 1 << info->line;
+	tmp = dz_in (info, DZ_TCR);       /* read the TX flag */
+
+	tmp &= ~mask;                   /* clear the TX flag */
+	dz_out (info, DZ_TCR, tmp);
+}
 
 static void dz_start (struct tty_struct *tty)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-  unsigned short mask, tmp;
-
-  mask = 1 << info->line;
-  tmp = dz_in (info, DZ_TCR);      /* read the TX flag */
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	unsigned short mask, tmp;
 
-    tmp |= mask;                   /* set the TX flag */
-    dz_out (info, DZ_TCR, tmp);
+	mask = 1 << info->line;
+	tmp = dz_in (info, DZ_TCR);      /* read the TX flag */
 
-}  
+	tmp |= mask;                   /* set the TX flag */
+	dz_out (info, DZ_TCR, tmp);
+}
 
 /*
  * ------------------------------------------------------------
@@ -194,9 +189,9 @@
  */
 static inline void dz_sched_event (struct dz_serial *info, int event)
 {
-  info->event |= 1 << event;
-  queue_task (&info->tqueue, &tq_serial);
-  mark_bh (SERIAL_BH);
+	info->event |= 1 << event;
+	queue_task(&info->tqueue, &tq_serial);
+	mark_bh(SERIAL_BH);
 }
 
 /*
@@ -208,98 +203,101 @@
  */
 static inline void receive_chars (struct dz_serial *info_in)
 {
+	struct dz_serial *info;
+	struct tty_struct *tty = 0;
+	struct async_icount *icount;
+	int ignore = 0;
+	unsigned short status, tmp;
+	unsigned char ch;
 
-  struct dz_serial *info;
-  struct tty_struct *tty = 0;
-  struct async_icount *icount;
-  int ignore = 0;
-  unsigned short status, tmp;
-  unsigned char ch;
-
-  /* this code is going to be a problem...
-     the call to tty_flip_buffer is going to need
-     to be rethought...
-   */
-  do
-    {
-      status = dz_in (info_in, DZ_RBUF);
-      info = lines[LINE(status)];
-
-      /* punt so we don't get duplicate characters */
-      if (!(status & DZ_DVAL))
-        goto ignore_char;
-
+	/*
+	 * This code is going to be a problem...  the call to tty_flip_buffer
+	 * is going to need to be rethought...
+	 */
+	do {
+		status = dz_in (info_in, DZ_RBUF);
+		info = lines[LINE(status)];
+
+		/* punt so we don't get duplicate characters */
+		if (!(status & DZ_DVAL))
+			goto ignore_char;
 
-    ch = UCHAR(status);                /* grab the char */
+		ch = UCHAR(status);			/* grab the char */
 
 #if 0
-    if (info->is_console) {
-      if (ch == 0) return;            /* it's a break ... */
+		if (info->is_console) {
+			if (ch == 0)
+				return;			/* it's a break ... */
 
-      wake_up (&keypress_wait);       /* It is a 'keyboard interrupt' ;-) */
-    }
+			wake_up (&keypress_wait);       /* It is a 'keyboard interrupt' ;-) */
+		}
 #endif
 
-    tty = info->tty;                  /* now tty points to the proper dev */
-    icount = &info->icount;
-
-    if (!tty) break;
-    if (tty->flip.count >= TTY_FLIPBUF_SIZE) break;
+		tty = info->tty;	/* now tty points to the proper dev */
+		icount = &info->icount;
 
-    *tty->flip.char_buf_ptr = ch;
-    *tty->flip.flag_buf_ptr = 0;
-    icount->rx++;
-
-    /* keep track of the statistics */
-    if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
-      if (status & DZ_PERR)                /* parity error */
-        icount->parity++;
-      else if (status & DZ_FERR)           /* frame error */
-        icount->frame++;
-      if (status & DZ_OERR)                /* overrun error */
-        icount->overrun++;
-
-      /*  check to see if we should ignore the character
-	 and mask off conditions that should be ignored
-      */
-
-      if (status & info->ignore_status_mask) {
-        if (++ignore > 100 ) break;
-        goto ignore_char;
-      }
+		if (!tty)
+			break;
+		if (tty->flip.count >= TTY_FLIPBUF_SIZE) break;
+
+		*tty->flip.char_buf_ptr = ch;
+		*tty->flip.flag_buf_ptr = 0;
+		icount->rx++;
+
+		/* keep track of the statistics */
+		if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
+			if (status & DZ_PERR)		/* parity error */
+				icount->parity++;
+			else if (status & DZ_FERR)	/* frame error */
+				icount->frame++;
+			if (status & DZ_OERR)		/* overrun error */
+				icount->overrun++;
+
+			/*
+			 * Check to see if we should ignore the character and
+			 * mask off conditions that should be ignored
+			 */
+
+			if (status & info->ignore_status_mask) {
+				if (++ignore > 100)
+					break;
+				goto ignore_char;
+			}
 
-      /* mask off the error conditions we want to ignore */
-      tmp = status & info->read_status_mask;
+			/* mask off the error conditions we want to ignore */
+			tmp = status & info->read_status_mask;
 
-      if (tmp & DZ_PERR)
-	{
-        *tty->flip.flag_buf_ptr = TTY_PARITY;
-	  debug_console("PERR\n",5);
-	}
-      else if (tmp & DZ_FERR)
-	{
-        *tty->flip.flag_buf_ptr = TTY_FRAME;
-	  debug_console("FERR\n",5);
-	}
-      if (tmp & DZ_OERR) 
-	{ 
-	  debug_console("OERR\n",5);
-	if (tty->flip.count < TTY_FLIPBUF_SIZE) {
-          tty->flip.count++;
-          tty->flip.flag_buf_ptr++;
-          tty->flip.char_buf_ptr++;
-          *tty->flip.flag_buf_ptr = TTY_OVERRUN;
-        }
-      }
-    }
-    tty->flip.flag_buf_ptr++;
-    tty->flip.char_buf_ptr++;
-    tty->flip.count++;
-  ignore_char:
-  } while (status & DZ_DVAL);
+			if (tmp & DZ_PERR) {
+				*tty->flip.flag_buf_ptr = TTY_PARITY;
+#ifdef DEBUG_DZ
+				debug_console("PERR\n",5);
+#endif /* DEBUG_DZ */
+			} else if (tmp & DZ_FERR) {
+				*tty->flip.flag_buf_ptr = TTY_FRAME;
+#ifdef DEBUG_DZ
+				debug_console("FERR\n",5);
+#endif /* DEBUG_DZ */
+			} if (tmp & DZ_OERR) { 
+#ifdef DEBUG_DZ
+				debug_console("OERR\n",5);
+#endif /* DEBUG_DZ */
+				if (tty->flip.count < TTY_FLIPBUF_SIZE) {
+					tty->flip.count++;
+					tty->flip.flag_buf_ptr++;
+					tty->flip.char_buf_ptr++;
+					*tty->flip.flag_buf_ptr = TTY_OVERRUN;
+				}
+			}
+		}
+	tty->flip.flag_buf_ptr++;
+	tty->flip.char_buf_ptr++;
+	tty->flip.count++;
+ignore_char:
+	;
+	} while (status & DZ_DVAL);
 
-  if (tty)
-    tty_flip_buffer_push(tty);
+	if (tty)
+		tty_flip_buffer_push(tty);
 }
 
 /*
@@ -311,35 +309,37 @@
  */
 static inline void transmit_chars (struct dz_serial *info)
 {
-  unsigned char tmp;
+	unsigned char tmp;
 
+	if (info->x_char) {           /* XON/XOFF chars */
+		dz_out(info, DZ_TDR, info->x_char);
+		info->icount.tx++;
+		info->x_char = 0;
+		return;
+	}
 
+	/* if nothing to do or stopped or hardware stopped */
+	if ((info->xmit_cnt <= 0) || info->tty->stopped ||
+	    info->tty->hw_stopped) {
+		dz_stop(info->tty);
+		return;
+	}
 
-  if (info->x_char) {           /* XON/XOFF chars */
-    dz_out (info, DZ_TDR, info->x_char);
-    info->icount.tx++;
-    info->x_char = 0;
-    return;
-  }
-
-  /* if nothing to do or stopped or hardware stopped */
-  if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tty->hw_stopped) {
-    dz_stop (info->tty);
-    return;
-  }
-
-  /* if something to do ... (rember the dz has no output fifo so we go one char at a time :-< */
-  tmp = (unsigned short)info->xmit_buf[info->xmit_tail++];
-  dz_out (info, DZ_TDR, tmp);
-  info->xmit_tail = info->xmit_tail & (DZ_XMIT_SIZE - 1);
-  info->icount.tx++;
-
-  if (--info->xmit_cnt < WAKEUP_CHARS)
-    dz_sched_event (info, DZ_EVENT_WRITE_WAKEUP);
-
-
-  /* Are we done */
-  if (info->xmit_cnt <= 0) dz_stop (info->tty);
+	/*
+	 * If something to do ... (rember the dz has no output fifo so we go
+	 * one char at a time :-<
+	 */
+	tmp = (unsigned short) info->xmit_buf[info->xmit_tail++];
+	dz_out(info, DZ_TDR, tmp);
+	info->xmit_tail = info->xmit_tail & (DZ_XMIT_SIZE - 1);
+	info->icount.tx++;
+
+	if (--info->xmit_cnt < WAKEUP_CHARS)
+	dz_sched_event(info, DZ_EVENT_WRITE_WAKEUP);
+
+	/* Are we done */
+	if (info->xmit_cnt <= 0)
+		dz_stop(info->tty);
 }
 
 /*
@@ -351,15 +351,17 @@
  */
 static inline void check_modem_status (struct dz_serial *info)
 {
-  unsigned short status;
+	unsigned short status;
 
-  /* if not ne modem line just return */
-  if (info->line != DZ_MODEM) return;
+	/* if not ne modem line just return */
+	if (info->line != DZ_MODEM)
+		return;
 
-  status = dz_in (info, DZ_MSR);
+	status = dz_in(info, DZ_MSR);
   
-  /* it's easy, since DSR2 is the only bit in the register */
-  if (status) info->icount.dsr++;
+	/* it's easy, since DSR2 is the only bit in the register */
+	if (status)
+		info->icount.dsr++;
 }
 
 /*
@@ -372,17 +374,18 @@
  */
 static void dz_interrupt (int irq, void *dev, struct pt_regs *regs)
 {
-  struct dz_serial *info;
-  unsigned short status;
+	struct dz_serial *info;
+	unsigned short status;
 
-  status = dz_in ((struct dz_serial *)dev, DZ_CSR); /* get the reason why we just got an irq */
-  info = lines[LINE(status)];     /* re-arrange info the proper port */
+	 /* get the reason why we just got an irq */
+	status = dz_in((struct dz_serial *)dev, DZ_CSR);
+	info = lines[LINE(status)];     /* re-arrange info the proper port */
 
-  if (status & DZ_RDONE) 
-      receive_chars (info);          /* the receive function */
+	if (status & DZ_RDONE) 
+		receive_chars(info);	/* the receive function */
 
-  if (status & DZ_TRDY) 
-    transmit_chars (info);
+	if (status & DZ_TRDY) 
+		transmit_chars (info);
 }
 
 /*
@@ -402,21 +405,23 @@
  */
 static void do_serial_bh (void)
 {
-        run_task_queue (&tq_serial);
+	run_task_queue (&tq_serial);
 }
 
 static void do_softint (void *private_data)
 {
-  struct dz_serial *info = (struct dz_serial *)private_data;
-  struct tty_struct *tty = info->tty;
+	struct dz_serial *info = (struct dz_serial *) private_data;
+	struct tty_struct *tty = info->tty;
 
-  if (!tty) return;
+	if (!tty)
+		return;
 
-  if (test_and_clear_bit (DZ_EVENT_WRITE_WAKEUP, &info->event)) {
-    if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
-      (tty->ldisc.write_wakeup) (tty);
-    wake_up_interruptible (&tty->write_wait);
-  }
+	if (test_and_clear_bit(DZ_EVENT_WRITE_WAKEUP, &info->event)) {
+		if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+		    tty->ldisc.write_wakeup)
+			(tty->ldisc.write_wakeup) (tty);
+		wake_up_interruptible (&tty->write_wait);
+	}
 }
 
 /*
@@ -431,12 +436,13 @@
  */
 static void do_serial_hangup (void *private_data)
 {
-  struct dz_serial *info = (struct dz_serial *)private_data;
-  struct tty_struct *tty = info->tty;;
+	struct dz_serial *info = (struct dz_serial *) private_data;
+	struct tty_struct *tty = info->tty;;
         
-  if (!tty) return;
+	if (!tty)
+		return;
 
-  tty_hangup (tty);
+	tty_hangup(tty);
 }
 
 /*
@@ -448,57 +454,52 @@
  */
 static int startup (struct dz_serial *info)
 {
-  unsigned long page, flags;
-  unsigned short tmp;
+	unsigned long page, flags;
+	unsigned short tmp;
 
-  if (info->is_initialized) return 0;
+	if (info->is_initialized)
+		return 0;
   
-  save_flags (flags);
-  cli ();
+	save_and_cli(flags);
 
-  if (!info->port) {
-    if (info->tty) set_bit (TTY_IO_ERROR, &info->tty->flags);
-    restore_flags (flags);
-    return -ENODEV;
-  }
-
-  if (!info->xmit_buf) {
-    page = get_free_page (GFP_KERNEL);
-    if (!page) {
-      restore_flags (flags);
-      return -ENOMEM;
-    }
-    info->xmit_buf = (unsigned char *)page;
-  }
-
-  if (info->tty) clear_bit (TTY_IO_ERROR, &info->tty->flags);
-
-  /* enable the interrupt and the scanning */
-  tmp = dz_in (info, DZ_CSR);
-  tmp |= (DZ_RIE | DZ_TIE | DZ_MSE);
-  dz_out (info, DZ_CSR, tmp);
-
-  info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
-
-  /* set up the speed */
-  change_speed (info);
-
-  /* clear the line transmitter buffer 
-     I can't figure out why I need to do this - but
-     its necessary - in order for the console portion
-     and the interrupt portion to live happily side by side.
-  */
-
-  /* clear the line transmitter buffer 
-     I can't figure out why I need to do this - but
-     its necessary - in order for the console portion
-     and the interrupt portion to live happily side by side.
-  */
+	if (!info->port) {
+		if (info->tty) set_bit(TTY_IO_ERROR, &info->tty->flags);
+		restore_flags(flags);
+		return -ENODEV;
+	}
+
+	if (!info->xmit_buf) {
+		page = get_free_page(GFP_KERNEL);
+		if (!page) {
+			restore_flags (flags);
+		return -ENOMEM;
+		}
+		info->xmit_buf = (unsigned char *)page;
+	}
 
-  info->is_initialized = 1;
+	if (info->tty)
+		clear_bit(TTY_IO_ERROR, &info->tty->flags);
 
-  restore_flags (flags);
-  return 0;
+	/* enable the interrupt and the scanning */
+	tmp = dz_in(info, DZ_CSR);
+	tmp |= (DZ_RIE | DZ_TIE | DZ_MSE);
+	dz_out(info, DZ_CSR, tmp);
+
+	info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
+
+	change_speed(info);			/* set up the speed */
+
+	/*
+	 * Clear the line transmitter buffer I can't figure out why I need to
+	 * do this - but its necessary - in order for the console portion and
+	 * the interrupt portion to live happily side by side.
+	 */
+
+	info->is_initialized = 1;
+
+	restore_flags(flags);
+
+	return 0;
 }
 
 /* 
@@ -511,38 +512,38 @@
  */
 static void shutdown (struct dz_serial *info)
 {
-  unsigned long flags;
-  unsigned short tmp;
+	unsigned long flags;
+	unsigned short tmp;
 
-  if (!info->is_initialized) return;
+	if (!info->is_initialized)
+		return;
 
-  save_flags (flags);
-  cli ();
+	save_and_cli(flags);
 
-  dz_stop (info->tty);
+	dz_stop (info->tty);
 
+	info->cflags &= ~DZ_CREAD;	/* turn off receive enable flag */
+	dz_out(info, DZ_LPR, info->cflags);
 
+	if (info->xmit_buf) {               /* free Tx buffer */
+		free_page((unsigned long)info->xmit_buf);
+		info->xmit_buf = 0;
+	}
 
-  info->cflags &= ~DZ_CREAD;          /* turn off receive enable flag */
-  dz_out (info, DZ_LPR, info->cflags);
-
-  if (info->xmit_buf) {               /* free Tx buffer */
-    free_page ((unsigned long)info->xmit_buf);
-    info->xmit_buf = 0;
-  }
+	if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
+		tmp = dz_in(info, DZ_TCR);
+		if (tmp & DZ_MODEM_DTR) {
+			tmp &= ~DZ_MODEM_DTR;
+			dz_out(info, DZ_TCR, tmp);
+		}
+	}
 
-  if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
-    tmp = dz_in (info, DZ_TCR);
-    if (tmp & DZ_MODEM_DTR) {
-      tmp &= ~DZ_MODEM_DTR;
-      dz_out (info, DZ_TCR, tmp);
-    }
-  }
+	if (info->tty)
+		set_bit (TTY_IO_ERROR, &info->tty->flags);
 
-  if (info->tty) set_bit (TTY_IO_ERROR, &info->tty->flags);
+	info->is_initialized = 0;
 
-  info->is_initialized = 0;
-  restore_flags (flags);
+	restore_flags (flags);
 }
 
 /* 
@@ -554,65 +555,104 @@
  */
 static void change_speed (struct dz_serial *info)
 {
-  unsigned long flags;
-  unsigned cflag;
-  int baud;
+	unsigned long flags;
+	unsigned cflag;
+	int baud;
 
-  if (!info->tty || !info->tty->termios) return;
+	if (!info->tty || !info->tty->termios)
+		return;
   
-  save_flags (flags);
-  cli ();
+	save_and_cli(flags);
   
-  info->cflags = info->line;
+	info->cflags = info->line;
 
-  cflag = info->tty->termios->c_cflag;
+	cflag = info->tty->termios->c_cflag;
 
-  switch (cflag & CSIZE) {
-  case CS5: info->cflags |= DZ_CS5; break;
-  case CS6: info->cflags |= DZ_CS6; break;
-  case CS7: info->cflags |= DZ_CS7; break;
-  case CS8: 
-  default:  info->cflags |= DZ_CS8;
-  }
-
-  if (cflag & CSTOPB) info->cflags |= DZ_CSTOPB;
-  if (cflag & PARENB) info->cflags |= DZ_PARENB;
-  if (cflag & PARODD) info->cflags |= DZ_PARODD;
+	switch (cflag & CSIZE) {
+		case CS5:
+			info->cflags |= DZ_CS5;
+			break;
+		case CS6:
+			info->cflags |= DZ_CS6;
+			break;
+		case CS7:
+			info->cflags |= DZ_CS7;
+			break;
+		case CS8: 
+		default:
+			info->cflags |= DZ_CS8;
+	}
+
+	if (cflag & CSTOPB)
+		info->cflags |= DZ_CSTOPB;
+	if (cflag & PARENB)
+		info->cflags |= DZ_PARENB;
+	if (cflag & PARODD)
+		info->cflags |= DZ_PARODD;
   
-  baud = tty_get_baud_rate (info->tty);
-  switch (baud) {
-  case 50  :  info->cflags |= DZ_B50;   break;
-  case 75  :  info->cflags |= DZ_B75;   break;
-  case 110 :  info->cflags |= DZ_B110;  break;
-  case 134 :  info->cflags |= DZ_B134;  break; 
-  case 150 :  info->cflags |= DZ_B150;  break;
-  case 300 :  info->cflags |= DZ_B300;  break; 
-  case 600 :  info->cflags |= DZ_B600;  break;
-  case 1200:  info->cflags |= DZ_B1200; break; 
-  case 1800:  info->cflags |= DZ_B1800; break;
-  case 2000:  info->cflags |= DZ_B2000; break;
-  case 2400:  info->cflags |= DZ_B2400; break;
-  case 3600:  info->cflags |= DZ_B3600; break; 
-  case 4800:  info->cflags |= DZ_B4800; break;
-  case 7200:  info->cflags |= DZ_B7200; break; 
-  case 9600: 
-  default  :  info->cflags |= DZ_B9600; 
-  }
-
-  info->cflags |= DZ_RXENAB;
-  dz_out (info, DZ_LPR, info->cflags);
-
-  /* setup accept flag */
-  info->read_status_mask = DZ_OERR;
-  if (I_INPCK(info->tty))
-   info->read_status_mask |= (DZ_FERR | DZ_PERR); 
+	baud = tty_get_baud_rate(info->tty);
+	switch (baud) {
+	case 50:
+		info->cflags |= DZ_B50;
+		break;
+	case 75:
+		info->cflags |= DZ_B75;
+		break;
+	case 110:
+		info->cflags |= DZ_B110;
+		break;
+	case 134:
+		info->cflags |= DZ_B134;
+		break; 
+	case 150:
+		info->cflags |= DZ_B150;
+		break;
+	case 300:
+		info->cflags |= DZ_B300;
+		break; 
+	case 600:
+		info->cflags |= DZ_B600;
+		break;
+	case 1200:
+		info->cflags |= DZ_B1200;
+		break; 
+	case 1800:
+		info->cflags |= DZ_B1800;
+		break;
+	case 2000:
+		info->cflags |= DZ_B2000;
+		break;
+	case 2400:
+		info->cflags |= DZ_B2400;
+		break;
+	case 3600:
+		info->cflags |= DZ_B3600;
+		break; 
+	case 4800:
+		info->cflags |= DZ_B4800;
+		break;
+	case 7200:
+		info->cflags |= DZ_B7200;
+		break; 
+	case 9600: 
+	default:
+		info->cflags |= DZ_B9600; 
+	}
+
+	info->cflags |= DZ_RXENAB;
+	dz_out(info, DZ_LPR, info->cflags);
+
+	/* setup accept flag */
+	info->read_status_mask = DZ_OERR;
+	if (I_INPCK(info->tty))
+		info->read_status_mask |= (DZ_FERR | DZ_PERR); 
   
-  /* characters to ignore */
-  info->ignore_status_mask = 0;
-  if (I_IGNPAR(info->tty))
-    info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
+	/* characters to ignore */
+	info->ignore_status_mask = 0;
+	if (I_IGNPAR(info->tty))
+		info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
 
-  restore_flags (flags);
+	restore_flags(flags);
 }
 
 /* 
@@ -624,18 +664,16 @@
  */
 static void dz_flush_chars (struct tty_struct *tty)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-  unsigned long flags;
-
- if (info->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || !info->xmit_buf)
-    return;
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	unsigned long flags;
 
- save_flags (flags);
- cli ();  
-
- dz_start (info->tty);
-
- restore_flags (flags);
+	if (info->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped ||
+	    !info->xmit_buf)
+		return;
+
+	save_and_cli(flags);
+	dz_start (info->tty);
+	restore_flags(flags);
 }
 
 
@@ -646,83 +684,81 @@
  * main output routine.
  * ------------------------------------------------------------------- 
  */
-static int dz_write (struct tty_struct *tty, int from_user, const unsigned char *buf, int count)
+static int dz_write (struct tty_struct *tty, int from_user,
+                     const unsigned char *buf, int count)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-  unsigned long flags;
-  int c, ret = 0;
-
-  if (!tty ) return ret;
-  if (!info->xmit_buf) return ret;
-  if (!tmp_buf) tmp_buf = tmp_buffer;
-
-
-
-  if (from_user) {
-
-    down (&tmp_buf_sem);
-    while (1) {
-      c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
-      if (c <= 0) break;
-
-      c -= copy_from_user (tmp_buf, buf, c);
-      if (!c) {
-        if (!ret) ret = -EFAULT;
-        break;
-      }
-
-      save_flags (flags);
-      cli ();
-
-      c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
-      memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
-      info->xmit_head = ((info->xmit_head + c) & (DZ_XMIT_SIZE-1));
-      info->xmit_cnt += c;
-
-      restore_flags(flags);
-
-      buf += c;
-      count -= c;
-      ret += c;
-    }
-    
-    up (&tmp_buf_sem);
-  } else {
-
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	unsigned long flags;
+	int c, ret = 0;
+
+	if (!tty )
+		return ret;
+	if (!info->xmit_buf)
+		return ret;
+	if (!tmp_buf)
+		tmp_buf = tmp_buffer;
+
+	if (from_user) {
+		down (&tmp_buf_sem);
+		while (1) {
+			c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1,
+			                   DZ_XMIT_SIZE - info->xmit_head));
+			if (c <= 0)
+				break;
+
+			c -= copy_from_user (tmp_buf, buf, c);
+			if (!c) {
+				if (!ret)
+					ret = -EFAULT;
+				break;
+			}
+
+			save_and_cli(flags);
+
+			c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1,
+			               DZ_XMIT_SIZE - info->xmit_head));
+			memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
+			info->xmit_head = ((info->xmit_head + c) &
+					   (DZ_XMIT_SIZE - 1));
+			info->xmit_cnt += c;
+			restore_flags(flags);
+
+			buf += c;
+			count -= c;
+			ret += c;
+		}
+		up(&tmp_buf_sem);
+	} else {
+		while (1) {
+			save_and_cli(flags);
+
+			c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1,
+			                   DZ_XMIT_SIZE - info->xmit_head));
+			if (c <= 0) {
+				restore_flags (flags);
+				break;
+			}
+			memcpy(info->xmit_buf + info->xmit_head, buf, c);
+			info->xmit_head = ((info->xmit_head + c) &
+			                   (DZ_XMIT_SIZE-1));
+			info->xmit_cnt += c;
+			restore_flags(flags);
+
+			buf += c;
+			count -= c;
+			ret += c;
+		}
+	}
 
-    while (1) {
-      save_flags (flags);
-      cli ();     
-
-      c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
-      if (c <= 0) {
-        restore_flags (flags);
-        break;
-      }
-      memcpy (info->xmit_buf + info->xmit_head, buf, c);
-      info->xmit_head = ((info->xmit_head + c) & (DZ_XMIT_SIZE-1));
-      info->xmit_cnt += c;
-
-      restore_flags (flags);
-
-      buf += c;
-      count -= c;
-      ret += c;
-    }
-  }
-
-
-  if (info->xmit_cnt)
-    {
-      if (!tty->stopped) 
-	{
-	  if (!tty->hw_stopped)
-	    {
-	      dz_start (info->tty);
-	    }
+	if (info->xmit_cnt) {
+		if (!tty->stopped) {
+			if (!tty->hw_stopped) {
+				dz_start (info->tty);
+			}
+		}
 	}
-    }
-  return ret;
+
+	return ret;
 }
 
 /* 
@@ -734,12 +770,14 @@
  */
 static int dz_write_room (struct tty_struct *tty)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-  int ret;
-                                
-  ret = DZ_XMIT_SIZE - info->xmit_cnt - 1;
-  if (ret < 0) ret = 0;
-  return ret;
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	int ret;
+
+	ret = DZ_XMIT_SIZE - info->xmit_cnt - 1;
+	if (ret < 0)
+		ret = 0;
+
+	return ret;
 }
 
 /* 
@@ -751,9 +789,9 @@
  */
 static int dz_chars_in_buffer (struct tty_struct *tty)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;
   
-  return info->xmit_cnt;
+	return info->xmit_cnt;
 }
 
 /* 
@@ -765,16 +803,17 @@
  */
 static void dz_flush_buffer (struct tty_struct *tty)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;
                                 
-  cli ();
-  info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
-  sti ();
-
-  wake_up_interruptible (&tty->write_wait);
-
-  if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
-    (tty->ldisc.write_wakeup)(tty);
+	cli();
+	info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
+	sti();
+
+	wake_up_interruptible (&tty->write_wait);
+
+	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+	     tty->ldisc.write_wakeup)
+		tty->ldisc.write_wakeup(tty);
 }
 
 /*
@@ -787,31 +826,32 @@
  */
 static void dz_throttle (struct tty_struct *tty)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;  
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;  
 
-  if (I_IXOFF(tty))
-    info->x_char = STOP_CHAR(tty);
+	if (I_IXOFF(tty))
+		info->x_char = STOP_CHAR(tty);
 }
 
 static void dz_unthrottle (struct tty_struct *tty)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;  
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;  
 
-  if (I_IXOFF(tty)) {
-    if (info->x_char)
-      info->x_char = 0;
-    else
-      info->x_char = START_CHAR(tty);
-  }
+	if (I_IXOFF(tty)) {
+		if (info->x_char)
+			info->x_char = 0;
+		else
+			info->x_char = START_CHAR(tty);
+	}
 }
 
 static void dz_send_xchar (struct tty_struct *tty, char ch)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;
 
-  info->x_char = ch;
+	info->x_char = ch;
 
-  if (ch) dz_start (info->tty);
+	if (ch)
+		dz_start(info->tty);
 }
 
 /*
@@ -819,59 +859,62 @@
  * rs_ioctl () and friends
  * ------------------------------------------------------------
  */
-static int get_serial_info (struct dz_serial *info, struct serial_struct *retinfo)
+static int get_serial_info(struct dz_serial *info,
+                           struct serial_struct *retinfo)
 {
-  struct serial_struct tmp;
+	struct serial_struct tmp;
   
-  if (!retinfo)
-    return -EFAULT;
+	if (!retinfo)
+		return -EFAULT;
 
-  memset (&tmp, 0, sizeof(tmp));
+	memset (&tmp, 0, sizeof(tmp));
 
-  tmp.type = info->type;
-  tmp.line = info->line;
-  tmp.port = info->port;
-  tmp.irq = SERIAL;
-  tmp.flags = info->flags;
-  tmp.baud_base = info->baud_base;
-  tmp.close_delay = info->close_delay;
-  tmp.closing_wait = info->closing_wait;
-  
-  return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
+	tmp.type = info->type;
+	tmp.line = info->line;
+	tmp.port = info->port;
+	tmp.irq = SERIAL;
+	tmp.flags = info->flags;
+	tmp.baud_base = info->baud_base;
+	tmp.close_delay = info->close_delay;
+	tmp.closing_wait = info->closing_wait;
+
+	return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
 }
 
-static int set_serial_info (struct dz_serial *info, struct serial_struct *new_info)
+static int set_serial_info (struct dz_serial *info,
+                            struct serial_struct *new_info)
 {
-  struct serial_struct new_serial;
-  struct dz_serial old_info;
-  int retval = 0;
+	struct serial_struct new_serial;
+	struct dz_serial old_info;
+	int retval = 0;
 
-  if (!new_info)
-    return -EFAULT;
+	if (!new_info)
+		return -EFAULT;
 
-  if(copy_from_user (&new_serial, new_info, sizeof(new_serial)))
-    return -EFAULT;
-    
-  old_info = *info;
+	if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
+		return -EFAULT;
 
-  if (!capable(CAP_SYS_ADMIN))
-    return -EPERM;
+	old_info = *info;
 
-  if (info->count > 1)
-    return -EBUSY;
+	if (!capable(CAP_SYS_ADMIN))
+		return -EPERM;
 
-  /*
-   * OK, past this point, all the error checking has been done.
-   * At this point, we start making changes.....
-   */
-  
-  info->baud_base = new_serial.baud_base;
-  info->type = new_serial.type;
-  info->close_delay = new_serial.close_delay;
-  info->closing_wait = new_serial.closing_wait;
+	if (info->count > 1)
+		return -EBUSY;
+
+	/*
+	 * OK, past this point, all the error checking has been done.
+	 * At this point, we start making changes.....
+	 */
 
-  retval = startup (info);
-  return retval;
+	info->baud_base = new_serial.baud_base;
+	info->type = new_serial.type;
+	info->close_delay = new_serial.close_delay;
+	info->closing_wait = new_serial.closing_wait;
+
+	retval = startup(info);
+
+	return retval;
 }
 
 /*
@@ -886,9 +929,9 @@
  */
 static int get_lsr_info (struct dz_serial *info, unsigned int *value)
 {
-  unsigned short status = dz_in (info, DZ_LPR);
+	unsigned short status = dz_in (info, DZ_LPR);
 
-  return put_user (status, value);
+	return put_user (status, value);
 }
 
 /*
@@ -896,106 +939,112 @@
  */
 static void send_break (struct dz_serial *info, int duration)
 {
-  unsigned long flags;
-  unsigned short tmp, mask;
-
-  if (!info->port)
-    return;
-
-  mask = 1 << info->line;
-  tmp = dz_in (info, DZ_TCR);
-  tmp |= mask;
+	unsigned long flags;
+	unsigned short tmp, mask;
 
-  current->state = TASK_INTERRUPTIBLE;
+	if (!info->port)
+		return;
 
-  save_flags (flags);
-  cli();
-  
-  dz_out (info, DZ_TCR, tmp);
-  
-  schedule_timeout(duration);
-  
-  tmp &= ~mask;
-  dz_out (info, DZ_TCR, tmp);
-  
-  restore_flags (flags);
-}
-
-static int dz_ioctl (struct tty_struct *tty, struct file *file,
-		     unsigned int cmd, unsigned long arg)
-{
-  struct dz_serial * info = (struct dz_serial *)tty->driver_data;
-  int retval;
+	mask = 1 << info->line;
+	tmp = dz_in (info, DZ_TCR);
+	tmp |= mask;
+
+	current->state = TASK_INTERRUPTIBLE;
+
+	save_and_cli(flags);
+	dz_out(info, DZ_TCR, tmp);
+	schedule_timeout(duration);
+	tmp &= ~mask;
+	dz_out(info, DZ_TCR, tmp);
+	restore_flags(flags);
+}
+
+static int dz_ioctl(struct tty_struct *tty, struct file *file,
+                    unsigned int cmd, unsigned long arg)
+{
+	int error;
+	struct dz_serial * info = (struct dz_serial *)tty->driver_data;
+	int retval;
+
+	if (cmd != TIOCGSERIAL && cmd != TIOCSSERIAL &&
+	    cmd != TIOCSERCONFIG && cmd != TIOCSERGWILD  &&
+	    cmd != TIOCSERSWILD && cmd != TIOCSERGSTRUCT) {
+		if (tty->flags & (1 << TTY_IO_ERROR))
+			return -EIO;
+	}
 
-  if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
-      (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD)  &&
-      (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
-    if (tty->flags & (1 << TTY_IO_ERROR))
-      return -EIO;
-  }
-
-  switch (cmd) {
-  case TCSBRK:    /* SVID version: non-zero arg --> no break */
-    retval = tty_check_change (tty);
-    if (retval)
-      return retval;
-    tty_wait_until_sent (tty, 0);
-    if (!arg)
-      send_break (info, HZ/4); /* 1/4 second */
-    return 0;
-
-  case TCSBRKP:   /* support for POSIX tcsendbreak() */
-    retval = tty_check_change (tty);
-    if (retval)
-      return retval;
-    tty_wait_until_sent (tty, 0);
-    send_break (info, arg ? arg*(HZ/10) : HZ/4);
-    return 0;
-
-  case TIOCGSOFTCAR:
-    return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
-
-  case TIOCSSOFTCAR:
-    if (get_user (arg, (unsigned long *)arg))
-      return -EFAULT;
-    tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
-    return 0;
-
-  case TIOCGSERIAL:
-    return get_serial_info (info, (struct serial_struct *)arg);
-
-  case TIOCSSERIAL:
-    return set_serial_info (info, (struct serial_struct *) arg);
-
-  case TIOCSERGETLSR: /* Get line status register */
-    return get_lsr_info (info, (unsigned int *)arg);
-
-  case TIOCSERGSTRUCT:
-    return copy_to_user((struct dz_serial *)arg, info,
-		        sizeof(struct dz_serial)) ? -EFAULT : 0;
-    
-  default:
-    return -ENOIOCTLCMD;
-  }
+	switch (cmd) {
+	case TCSBRK:		/* SVID version: non-zero arg --> no break */
+		retval = tty_check_change(tty);
+		if (retval)
+			return retval;
+		tty_wait_until_sent(tty, 0);
+		if (!arg)
+			send_break(info, HZ/4); /* 1/4 second */
+		return 0;
+
+	case TCSBRKP:		/* support for POSIX tcsendbreak() */
+		retval = tty_check_change(tty);
+		if (retval)
+			return retval;
+		tty_wait_until_sent(tty, 0);
+		send_break(info, arg ? arg*(HZ/10) : HZ/4);
+		return 0;
+
+	case TIOCGSOFTCAR:
+		error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(long));
+		if (error)
+			return error;
+		put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
+		return 0;
+
+	case TIOCSSOFTCAR:
+		if (get_user (arg, (unsigned long *)arg))
+			return -EFAULT;
+
+		tty->termios->c_cflag = (tty->termios->c_cflag & ~CLOCAL) |
+		                        (arg ? CLOCAL : 0);
+		return 0;
+
+	case TIOCGSERIAL:
+		error = verify_area(VERIFY_WRITE, (void *)arg,
+		                    sizeof(struct serial_struct));
+		if (error)
+			return error;
+		return get_serial_info(info, (struct serial_struct *)arg);
+
+	case TIOCSSERIAL:
+		return set_serial_info(info, (struct serial_struct *) arg);
+
+	case TIOCSERGETLSR:		/* Get line status register */
+		return get_lsr_info (info, (unsigned int *)arg);
+
+	case TIOCSERGSTRUCT:
+		return copy_to_user((struct dz_serial *)arg, info,
+		                    sizeof(struct dz_serial)) ? -EFAULT : 0;
+ 
+	default:
+		return -ENOIOCTLCMD;
+	}
 
-  return 0;
+	return 0;
 }
 
 static void dz_set_termios (struct tty_struct *tty,
 			    struct termios *old_termios)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	struct dz_serial *info = (struct dz_serial *)tty->driver_data;
 
-  if (tty->termios->c_cflag == old_termios->c_cflag)
-    return;
+	if (tty->termios->c_cflag == old_termios->c_cflag)
+		return;
 
-  change_speed (info);
+	change_speed (info);
 
-  if ((old_termios->c_cflag & CRTSCTS) &&
-      !(tty->termios->c_cflag & CRTSCTS)) {
-    tty->hw_stopped = 0;
-    dz_start (tty);
-  }
+	if ((old_termios->c_cflag & CRTSCTS) &&
+	    !(tty->termios->c_cflag & CRTSCTS)) {
+		tty->hw_stopped = 0;
+		dz_start(tty);
+	}
 }
 
 /*
@@ -1007,97 +1056,95 @@
  * the transmit enable and receive enable flags.
  * ------------------------------------------------------------
  */
-static void dz_close (struct tty_struct *tty, struct file *filp)
+static void dz_close(struct tty_struct *tty, struct file *filp)
 {
-  struct dz_serial * info = (struct dz_serial *)tty->driver_data;
-  unsigned long flags;
+	struct dz_serial * info = (struct dz_serial *)tty->driver_data;
+	unsigned long flags;
 
-  if (!info) return;
-        
-  save_flags (flags); 
-  cli();
-        
-  if (tty_hung_up_p (filp)) {
-    restore_flags (flags);
-    return;
-  }
-
-  if ((tty->count == 1) && (info->count != 1)) {
-    /*
-     * Uh, oh.  tty->count is 1, which means that the tty
-     * structure will be freed.  Info->count should always
-     * be one in these conditions.  If it's greater than
-     * one, we've got real problems, since it means the
-     * serial port won't be shutdown.
-     */
-    printk("dz_close: bad serial port count; tty->count is 1, "
-                       "info->count is %d\n", info->count);
-                info->count = 1;
-  }
-
-  if (--info->count < 0) {
-    printk("ds_close: bad serial port count for ttys%d: %d\n",
-	   info->line, info->count);
-    info->count = 0;
-  }
-
-  if (info->count) {
-    restore_flags (flags);
-    return;
-  }
-  info->flags |= DZ_CLOSING;
-  /*
-   * Save the termios structure, since this port may have
-   * separate termios for callout and dialin.
-   */
-  if (info->flags & DZ_NORMAL_ACTIVE)
-    info->normal_termios = *tty->termios;
-  if (info->flags & DZ_CALLOUT_ACTIVE)
-    info->callout_termios = *tty->termios;
-  /*
-   * Now we wait for the transmit buffer to clear; and we notify 
-   * the line discipline to only process XON/XOFF characters.
-   */
-  tty->closing = 1;
-
-  if (info->closing_wait != DZ_CLOSING_WAIT_NONE)
-    tty_wait_until_sent (tty, info->closing_wait);
-
-  /*
-   * At this point we stop accepting input.  To do this, we
-   * disable the receive line status interrupts.
-   */
-
-  shutdown (info);
-
-  if (tty->driver.flush_buffer)
-    tty->driver.flush_buffer (tty);
-  if (tty->ldisc.flush_buffer)
-    tty->ldisc.flush_buffer (tty);
-  tty->closing = 0;
-  info->event = 0;
-  info->tty = 0;
-
-  if (tty->ldisc.num != ldiscs[N_TTY].num) {
-    if (tty->ldisc.close)
-      (tty->ldisc.close)(tty);
-    tty->ldisc = ldiscs[N_TTY];
-    tty->termios->c_line = N_TTY;
-    if (tty->ldisc.open)
-      (tty->ldisc.open)(tty);
-  }
-  if (info->blocked_open) {
-    if (info->close_delay) {
-      current->state = TASK_INTERRUPTIBLE;
-      schedule_timeout(info->close_delay);
-    }
-    wake_up_interruptible (&info->open_wait);
-  }
+	if (!info)
+		return;
+ 
+	save_and_cli(flags); 
+
+	if (tty_hung_up_p(filp)) {
+		restore_flags(flags);
+		return;
+	}
 
-  info->flags &= ~(DZ_NORMAL_ACTIVE | DZ_CALLOUT_ACTIVE | DZ_CLOSING);
-  wake_up_interruptible (&info->close_wait);
+	if ((tty->count == 1) && (info->count != 1)) {
+		/*
+		 * Uh, oh.  tty->count is 1, which means that the tty structure
+		 * will be freed.  Info->count should always be one in these
+		 * conditions.  If it's greater than one, we've got real
+		 * problems, since it means the serial port won't be shutdown.
+		 */
+		printk("dz_close: bad serial port count; tty->count is 1, "
+		       "info->count is %d\n", info->count);
+		info->count = 1;
+	}
 
-  restore_flags (flags);
+	if (--info->count < 0) {
+		printk("ds_close: bad serial port count for ttyS%02d: %d\n",
+		       info->line, info->count);
+		info->count = 0;
+	}
+
+	if (info->count) {
+		restore_flags(flags);
+		return;
+	}
+	info->flags |= DZ_CLOSING;
+	/*
+	 * Save the termios structure, since this port may have
+	 * separate termios for callout and dialin.
+	 */
+	if (info->flags & DZ_NORMAL_ACTIVE)
+		info->normal_termios = *tty->termios;
+	if (info->flags & DZ_CALLOUT_ACTIVE)
+		info->callout_termios = *tty->termios;
+	/*
+	 * Now we wait for the transmit buffer to clear; and we notify the line
+	 * discipline to only process XON/XOFF characters.
+	 */
+	tty->closing = 1;
+
+	if (info->closing_wait != DZ_CLOSING_WAIT_NONE)
+		tty_wait_until_sent(tty, info->closing_wait);
+
+	/*
+	 * At this point we stop accepting input.  To do this, we disable the
+	 * receive line status interrupts.
+	 */
+	shutdown(info);
+
+	if (tty->driver.flush_buffer)
+		tty->driver.flush_buffer (tty);
+	if (tty->ldisc.flush_buffer)
+		tty->ldisc.flush_buffer (tty);
+	tty->closing = 0;
+	info->event = 0;
+	info->tty = 0;
+
+	if (tty->ldisc.num != ldiscs[N_TTY].num) {
+		if (tty->ldisc.close)
+			tty->ldisc.close(tty);
+		tty->ldisc = ldiscs[N_TTY];
+		tty->termios->c_line = N_TTY;
+		if (tty->ldisc.open)
+			tty->ldisc.open(tty);
+	}
+	if (info->blocked_open) {
+		if (info->close_delay) {
+			current->state = TASK_INTERRUPTIBLE;
+			schedule_timeout(info->close_delay);
+		}
+		wake_up_interruptible(&info->open_wait);
+	}
+
+	info->flags &= ~(DZ_NORMAL_ACTIVE | DZ_CALLOUT_ACTIVE | DZ_CLOSING);
+	wake_up_interruptible(&info->close_wait);
+
+	restore_flags(flags);
 }
 
 /*
@@ -1105,15 +1152,15 @@
  */
 static void dz_hangup (struct tty_struct *tty)
 {
-  struct dz_serial *info = (struct dz_serial *)tty->driver_data;
+	struct dz_serial *info = (struct dz_serial *) tty->driver_data;
   
-  dz_flush_buffer (tty);
-  shutdown (info);
-  info->event = 0;
-  info->count = 0;
-  info->flags &= ~(DZ_NORMAL_ACTIVE | DZ_CALLOUT_ACTIVE);
-  info->tty = 0;
-  wake_up_interruptible (&info->open_wait);
+	dz_flush_buffer(tty);
+	shutdown(info);
+	info->event = 0;
+	info->count = 0;
+	info->flags &= ~(DZ_NORMAL_ACTIVE | DZ_CALLOUT_ACTIVE);
+	info->tty = 0;
+	wake_up_interruptible(&info->open_wait);
 }
 
 /*
@@ -1121,101 +1168,103 @@
  * rs_open() and friends
  * ------------------------------------------------------------
  */
-static int block_til_ready (struct tty_struct *tty, struct file *filp, struct dz_serial *info)
+static int block_til_ready(struct tty_struct *tty, struct file *filp,
+                           struct dz_serial *info)
 {
-  DECLARE_WAITQUEUE(wait, current); 
-  int retval;
-  int do_clocal = 0;
-
-  /*
-   * If the device is in the middle of being closed, then block
-   * until it's done, and then try again.
-   */
-  if (info->flags & DZ_CLOSING) {
-    interruptible_sleep_on (&info->close_wait);
-    return -EAGAIN;
-  }
-
-  /*
-   * If this is a callout device, then just make sure the normal
-   * device isn't being used.
-   */
-  if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) {
-    if (info->flags & DZ_NORMAL_ACTIVE)
-      return -EBUSY;
+	DECLARE_WAITQUEUE(wait, current); 
+	int retval;
+	int do_clocal = 0;
+
+	/*
+	 * If the device is in the middle of being closed, then block
+	 * until it's done, and then try again.
+	 */
+	if (info->flags & DZ_CLOSING) {
+		interruptible_sleep_on(&info->close_wait);
+		return -EAGAIN;
+	}
+
+	/*
+	 * If this is a callout device, then just make sure the normal
+	 * device isn't being used.
+	 */
+	if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) {
+		if (info->flags & DZ_NORMAL_ACTIVE)
+			return -EBUSY;
     
-    if ((info->flags & DZ_CALLOUT_ACTIVE) &&
-	(info->flags & DZ_SESSION_LOCKOUT) &&
-	(info->session != current->session))
-      return -EBUSY;
+		if ((info->flags & DZ_CALLOUT_ACTIVE) &&
+		    (info->flags & DZ_SESSION_LOCKOUT) &&
+		    (info->session != current->session))
+			return -EBUSY;
     
-    if ((info->flags & DZ_CALLOUT_ACTIVE) &&
-	(info->flags & DZ_PGRP_LOCKOUT) &&
-	(info->pgrp != current->pgrp))
-      return -EBUSY;
-    info->flags |= DZ_CALLOUT_ACTIVE;
-    return 0;
-  }
-
-  /*
-   * If non-blocking mode is set, or the port is not enabled,
-   * then make the check up front and then exit.
-   */
-  if ((filp->f_flags & O_NONBLOCK) ||
-      (tty->flags & (1 << TTY_IO_ERROR))) {
-    if (info->flags & DZ_CALLOUT_ACTIVE)
-      return -EBUSY;
-    info->flags |= DZ_NORMAL_ACTIVE;
-    return 0;
-  }
-
-  if (info->flags & DZ_CALLOUT_ACTIVE) {
-    if (info->normal_termios.c_cflag & CLOCAL)
-      do_clocal = 1;
-  } else {
-    if (tty->termios->c_cflag & CLOCAL)
-      do_clocal = 1;
-  }
-
-  /*
-   * Block waiting for the carrier detect and the line to become
-   * free (i.e., not in use by the callout).  While we are in
-   * this loop, info->count is dropped by one, so that
-   * dz_close() knows when to free things.  We restore it upon
-   * exit, either normal or abnormal.
-   */
-  retval = 0;
-  add_wait_queue (&info->open_wait, &wait);
-
-  info->count--;
-  info->blocked_open++;
-  while (1) {
-    set_current_state(TASK_INTERRUPTIBLE);
-    if (tty_hung_up_p (filp) || !(info->is_initialized)) {
-      retval = -EAGAIN;
-      break;
-    }
-    if (!(info->flags & DZ_CALLOUT_ACTIVE) &&
-	!(info->flags & DZ_CLOSING) && do_clocal)
-      break;
-    if (signal_pending (current)) {
-      retval = -ERESTARTSYS;
-      break;
-    }
-    schedule();
-  }
+		if ((info->flags & DZ_CALLOUT_ACTIVE) &&
+		    (info->flags & DZ_PGRP_LOCKOUT) &&
+		    (info->pgrp != current->pgrp))
+			return -EBUSY;
+
+		info->flags |= DZ_CALLOUT_ACTIVE;
+		return 0;
+	}
+
+	/*
+	 * If non-blocking mode is set, or the port is not enabled, then make
+	 * the check up front and then exit.
+	 */
+	if ((filp->f_flags & O_NONBLOCK) ||
+	    (tty->flags & (1 << TTY_IO_ERROR))) {
+		if (info->flags & DZ_CALLOUT_ACTIVE)
+			return -EBUSY;
+		info->flags |= DZ_NORMAL_ACTIVE;
+
+		return 0;
+	}
+
+	if (info->flags & DZ_CALLOUT_ACTIVE) {
+		if (info->normal_termios.c_cflag & CLOCAL)
+			do_clocal = 1;
+	} else {
+		if (tty->termios->c_cflag & CLOCAL)
+		do_clocal = 1;
+	}
+
+	/*
+	 * Block waiting for the carrier detect and the line to become free
+	 * (i.e., not in use by the callout).  While we are in this loop,
+	 * info->count is dropped by one, so that dz_close() knows when to free
+	 * things.  We restore it upon exit, either normal or abnormal.
+	 */
+	retval = 0;
+	add_wait_queue(&info->open_wait, &wait);
+
+	info->count--;
+	info->blocked_open++;
+	while (1) {
+		set_current_state(TASK_INTERRUPTIBLE);
+		if (tty_hung_up_p (filp) || !(info->is_initialized)) {
+			retval = -EAGAIN;
+			break;
+		}
+		if (!(info->flags & DZ_CALLOUT_ACTIVE) &&
+		    !(info->flags & DZ_CLOSING) && do_clocal)
+			break;
+		if (signal_pending(current)) {
+			retval = -ERESTARTSYS;
+			break;
+		}
+		schedule();
+	}
 		
-  current->state = TASK_RUNNING;
-  remove_wait_queue (&info->open_wait, &wait);
-  if (!tty_hung_up_p(filp))
-    info->count++;
-  info->blocked_open--;
-
-  if (retval)
-    return retval;
-  info->flags |= DZ_NORMAL_ACTIVE;
-  return 0;
-}       
+	current->state = TASK_RUNNING;
+	remove_wait_queue (&info->open_wait, &wait);
+	if (!tty_hung_up_p(filp))
+		info->count++;
+	info->blocked_open--;
+
+	if (retval)
+		return retval;
+	info->flags |= DZ_NORMAL_ACTIVE;
+	return 0;
+}
 
 /*
  * This routine is called whenever a serial port is opened.  It
@@ -1224,201 +1273,220 @@
  */
 static int dz_open (struct tty_struct *tty, struct file *filp)
 {
-  struct dz_serial *info;
-  int retval, line;
-
-  line = MINOR(tty->device) - tty->driver.minor_start;
-
-  /* The dz lines for the mouse/keyboard must be
-   * opened using their respective drivers.
-   */
-  if ((line < 0) || (line >= DZ_NB_PORT))
-    return -ENODEV;
+	struct dz_serial *info;
+	int retval, line;
 
-  if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
-    return -ENODEV;
+	line = MINOR(tty->device) - tty->driver.minor_start;
 
-  info = lines[line];
-  info->count++;
-
-  tty->driver_data = info;
-  info->tty = tty;
-
-  /*
-   * Start up serial port
-   */
-  retval = startup (info);
-  if (retval)
-    return retval;
+	/*
+	 * The dz lines for the mouse/keyboard must be opened using their
+	 * respective drivers.
+	 */
+	if ((line < 0) || (line >= DZ_NB_PORT))
+		return -ENODEV;
 
+	if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
+		return -ENODEV;
 
+	info = lines[line];
+	info->count++;
 
-  retval = block_til_ready (tty, filp, info);
-  if (retval)
-    return retval;
+	tty->driver_data = info;
+	info->tty = tty;
 
-  if ((info->count == 1) && (info->flags & DZ_SPLIT_TERMIOS)) {
-    if (tty->driver.subtype == SERIAL_TYPE_NORMAL)
-      *tty->termios = info->normal_termios;
-    else 
-      *tty->termios = info->callout_termios;
-    change_speed (info);
+	/*
+	 * Start up serial port
+	 */
+	retval = startup (info);
+	if (retval)
+		return retval;
+
+	retval = block_til_ready (tty, filp, info);
+	if (retval)
+		return retval;
+
+	if ((info->count == 1) && (info->flags & DZ_SPLIT_TERMIOS)) {
+		if (tty->driver.subtype == SERIAL_TYPE_NORMAL)
+			*tty->termios = info->normal_termios;
+		else 
+			*tty->termios = info->callout_termios;
+		change_speed(info);
+	}
 
-  }
+	info->session = current->session;
+	info->pgrp = current->pgrp;
 
-  info->session = current->session;
-  info->pgrp = current->pgrp;
-  return 0;
+	return 0;
 }
 
 static void show_serial_version (void)
 {
-  printk("%s%s\n", dz_name, dz_version);
+	printk("%s%s\n", dz_name, dz_version);
 }
 
 
 int __init dz_init(void)
 {
-  int i;
-  unsigned long flags;
-  struct dz_serial *info;
-
-  /* Setup base handler, and timer table. */
-  init_bh (SERIAL_BH, do_serial_bh);
-
-  show_serial_version ();
-
-  memset(&serial_driver, 0, sizeof(struct tty_driver));
-  serial_driver.magic = TTY_DRIVER_MAGIC;
-  serial_driver.name = "ttyS";
-  serial_driver.major = TTY_MAJOR;
-  serial_driver.minor_start = 64;
-  serial_driver.num = DZ_NB_PORT;
-  serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
-  serial_driver.subtype = SERIAL_TYPE_NORMAL;
-  serial_driver.init_termios = tty_std_termios;
-
-  serial_driver.init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
-  serial_driver.flags = TTY_DRIVER_REAL_RAW;
-  serial_driver.refcount = &serial_refcount;
-  serial_driver.table = serial_table;
-  serial_driver.termios = serial_termios;
-  serial_driver.termios_locked = serial_termios_locked;
-
-  serial_driver.open = dz_open;
-  serial_driver.close = dz_close;
-  serial_driver.write = dz_write;
-  serial_driver.flush_chars = dz_flush_chars;
-  serial_driver.write_room = dz_write_room;
-  serial_driver.chars_in_buffer = dz_chars_in_buffer;
-  serial_driver.flush_buffer = dz_flush_buffer;
-  serial_driver.ioctl = dz_ioctl;
-  serial_driver.throttle = dz_throttle;
-  serial_driver.unthrottle = dz_unthrottle;
-  serial_driver.send_xchar = dz_send_xchar;
-  serial_driver.set_termios = dz_set_termios;
-  serial_driver.stop = dz_stop;
-  serial_driver.start = dz_start;
-  serial_driver.hangup = dz_hangup;
-
-  /*
-   * The callout device is just like normal device except for
-   * major number and the subtype code.
-   */
-  callout_driver = serial_driver;
-  callout_driver.name = "cua";
-  callout_driver.major = TTYAUX_MAJOR;
-  callout_driver.subtype = SERIAL_TYPE_CALLOUT;
-
-  if (tty_register_driver (&serial_driver))
-    panic("Couldn't register serial driver\n");
-  if (tty_register_driver (&callout_driver))
-    panic("Couldn't register callout driver\n");
-  save_flags(flags); cli();
- 
-  for (i=0; i < DZ_NB_PORT;  i++)  
-    {
-      info = &multi[i]; 
-      lines[i] = info;
-    info->magic = SERIAL_MAGIC;
-
-      if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100)) 
-      info->port = (unsigned long) KN01_DZ11_BASE;
-      else 
-      info->port = (unsigned long) KN02_DZ11_BASE;
-
-    info->line = i;
-    info->tty = 0;
-    info->close_delay = 50;
-    info->closing_wait = 3000;
-    info->x_char = 0;
-    info->event = 0;
-    info->count = 0;
-    info->blocked_open = 0;
-    info->tqueue.routine = do_softint;
-    info->tqueue.data = info;
-    info->tqueue_hangup.routine = do_serial_hangup;
-    info->tqueue_hangup.data = info;
-    info->callout_termios = callout_driver.init_termios;
-    info->normal_termios = serial_driver.init_termios;
-    init_waitqueue_head(&info->open_wait); 
-    init_waitqueue_head(&info->close_wait); 
-
-    /* If we are pointing to address zero then punt - not correctly
-       set up in setup.c to handle this. */
-    if (! info->port)
-      return 0;
+	int i, flags;
+	struct dz_serial *info;
 
-    printk("ttyS%02d at 0x%04x (irq = %d)\n", info->line, info->port, SERIAL);
-  }
+	/* Setup base handler, and timer table. */
+	init_bh(SERIAL_BH, do_serial_bh);
 
-  /* reset the chip */
+	show_serial_version();
+
+	memset(&serial_driver, 0, sizeof(struct tty_driver));
+	serial_driver.magic = TTY_DRIVER_MAGIC;
+#if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
+	serial_driver.name = "ttyS";
+#else
+	serial_driver.name = "tts/%d";
+#endif
+	serial_driver.major = TTY_MAJOR;
+	serial_driver.minor_start = 64;
+	serial_driver.num = DZ_NB_PORT;
+	serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
+	serial_driver.subtype = SERIAL_TYPE_NORMAL;
+	serial_driver.init_termios = tty_std_termios;
+
+	serial_driver.init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL |
+	                                     CLOCAL;
+	serial_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
+	serial_driver.refcount = &serial_refcount;
+	serial_driver.table = serial_table;
+	serial_driver.termios = serial_termios;
+	serial_driver.termios_locked = serial_termios_locked;
+
+	serial_driver.open = dz_open;
+	serial_driver.close = dz_close;
+	serial_driver.write = dz_write;
+	serial_driver.flush_chars = dz_flush_chars;
+	serial_driver.write_room = dz_write_room;
+	serial_driver.chars_in_buffer = dz_chars_in_buffer;
+	serial_driver.flush_buffer = dz_flush_buffer;
+	serial_driver.ioctl = dz_ioctl;
+	serial_driver.throttle = dz_throttle;
+	serial_driver.unthrottle = dz_unthrottle;
+	serial_driver.send_xchar = dz_send_xchar;
+	serial_driver.set_termios = dz_set_termios;
+	serial_driver.stop = dz_stop;
+	serial_driver.start = dz_start;
+	serial_driver.hangup = dz_hangup;
+
+	/*
+	 * The callout device is just like normal device except for major
+	 * number and the subtype code.
+	 */
+	callout_driver = serial_driver;
+#if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
+	callout_driver.name = "cua";
+#else
+	callout_driver.name = "cua/%d";
+#endif
+	callout_driver.major = TTYAUX_MAJOR;
+	callout_driver.subtype = SERIAL_TYPE_CALLOUT;
+
+	if (tty_register_driver (&serial_driver))
+		panic("Couldn't register serial driver\n");
+	if (tty_register_driver (&callout_driver))
+		panic("Couldn't register callout driver\n");
+
+	save_flags(flags); cli();
+	for (i=0; i < DZ_NB_PORT;  i++) {
+		info = &multi[i]; 
+		lines[i] = info;
+		info->magic = SERIAL_MAGIC;
+
+		if ((mips_machtype == MACH_DS23100) ||
+		    (mips_machtype == MACH_DS5100)) 
+			info->port = (unsigned long) KN01_DZ11_BASE;
+		else 
+			info->port = (unsigned long) KN02_DZ11_BASE;
+
+		info->line = i;
+		info->tty = 0;
+		info->close_delay = 50;
+		info->closing_wait = 3000;
+		info->x_char = 0;
+		info->event = 0;
+		info->count = 0;
+		info->blocked_open = 0;
+		info->tqueue.routine = do_softint;
+		info->tqueue.data = info;
+		info->tqueue_hangup.routine = do_serial_hangup;
+		info->tqueue_hangup.data = info;
+		info->callout_termios = callout_driver.init_termios;
+		info->normal_termios = serial_driver.init_termios;
+		init_waitqueue_head(&info->open_wait); 
+		init_waitqueue_head(&info->close_wait); 
+
+		/*
+		 * If we are pointing to address zero then punt - not correctly
+		 * set up in setup.c to handle this.
+		 */
+		if (! info->port)
+			return 0;
+
+		printk("ttyS%02d at 0x%08x (irq = %d)\n", info->line,
+		       info->port, SERIAL);
+
+		tty_register_devfs(&serial_driver, 0,
+		                   serial_driver.minor_start + info->line);
+		tty_register_devfs(&callout_driver, 0,
+		                   callout_driver.minor_start + info->line);
+	}
+
+	/* Reset the chip */
 #ifndef CONFIG_SERIAL_CONSOLE
-  dz_out(info, DZ_CSR, DZ_CLR);
-  while ((tmp = dz_in(info,DZ_CSR)) & DZ_CLR) ;
-  wbflush();
+	{
+		int tmp;
+		dz_out(info, DZ_CSR, DZ_CLR);
+		while ((tmp = dz_in(info,DZ_CSR)) & DZ_CLR);
+		wbflush();
   
-  /* enable scanning */
-   dz_out(info, DZ_CSR, DZ_MSE); 
+		/* Enable scanning */
+		dz_out(info, DZ_CSR, DZ_MSE); 
+	}
 #endif
   
-  /* order matters here... the trick is that flags
-     is updated... in request_irq - to immediatedly obliterate
-     it is unwise. */
-  restore_flags(flags);
- 
+	/*
+	 * Order matters here... the trick is that flags is updated... in
+	 * request_irq - to immediatedly obliterate it is unwise.
+	 */
+	restore_flags(flags);
 
-  if (request_irq (SERIAL, dz_interrupt, SA_INTERRUPT, "DZ", lines[0]))
-    panic ("Unable to register DZ interrupt\n");
+	if (request_irq(SERIAL, dz_interrupt, SA_INTERRUPT, "DZ", lines[0]))
+		panic("Unable to register DZ interrupt\n");
  
-  return 0;
+	return 0;
 }
 
 #ifdef CONFIG_SERIAL_CONSOLE
 static void dz_console_put_char (unsigned char ch)
 {
-  unsigned long flags;
-  int  loops = 2500;
-  unsigned short tmp = ch;
-  /* this code sends stuff out to serial device - spinning its
-      wheels and waiting. */
+	unsigned long flags;
+	int  loops = 2500;
+	unsigned short tmp = ch;
+	/*
+	 * this code sends stuff out to serial device - spinning its wheels and
+	 * waiting.
+	 */
 
-  /* force the issue - point it at lines[3]*/
-  dz_console=&multi[CONSOLE_LINE];
+	/* force the issue - point it at lines[3]*/
+	dz_console = &multi[CONSOLE_LINE];
 
-  save_flags(flags);
-  cli();
-  
+	save_and_cli(flags);
 
-  /* spin our wheels */
-  while (((dz_in(dz_console,DZ_CSR) & DZ_TRDY) != DZ_TRDY) &&  loops--)
-    ;
+	/* spin our wheels */
+	while (((dz_in(dz_console, DZ_CSR) & DZ_TRDY) != DZ_TRDY) &&  loops--)
+		;
   
-  /* Actually transmit the character. */
-  dz_out (dz_console, DZ_TDR, tmp);
+	/* Actually transmit the character. */
+	dz_out(dz_console, DZ_TDR, tmp);
 
-  restore_flags(flags); 
+	restore_flags(flags); 
 }
+
 /* 
  * -------------------------------------------------------------------
  * dz_console_print ()
@@ -1432,19 +1500,18 @@
 			      unsigned int count)
 {
 #ifdef DEBUG_DZ
-  prom_printf((char *)str);
+	prom_printf((char *)str);
 #endif
-  while (count--) 
-    {
-    if (*str == '\n')
-	dz_console_put_char ('\r');
-      dz_console_put_char (*str++);
-  }
+	while (count--) {
+		if (*str == '\n')
+			dz_console_put_char('\r');
+		dz_console_put_char(*str++);
+	}
 }
 
 static int dz_console_wait_key(struct console *co)
 {
-    return 0;
+	return 0;
 }
 
 static kdev_t dz_console_device(struct console *c)
@@ -1454,17 +1521,17 @@
 
 static int __init dz_console_setup(struct console *co, char *options)
 {
-  	int	baud = 9600;
-	int	bits = 8;
-	int	parity = 'n';
-	int	cflag = CREAD | HUPCL | CLOCAL;
-	char	*s;
+	int baud = 9600;
+	int bits = 8;
+	int parity = 'n';
+	int cflag = CREAD | HUPCL | CLOCAL;
+	char *s;
 	unsigned short mask,tmp;
 
 	if (options) {
 		baud = simple_strtoul(options, NULL, 10);
 		s = options;
-		while(*s >= '0' && *s <= '9')
+		while (*s >= '0' && *s <= '9')
 			s++;
 		if (*s)
 			parity = *s++;
@@ -1473,9 +1540,9 @@
 	}
 
 	/*
-	 *	Now construct a cflag setting.
+	 * Now construct a cflag setting.
 	 */
-	switch(baud) {
+	switch (baud) {
 	case 1200:
 		cflag |= DZ_B1200;
 		break;
@@ -1490,7 +1557,7 @@
 		cflag |= DZ_B9600;
 		break;
 	}
-	switch(bits) {
+	switch (bits) {
 	case 7:
 		cflag |= DZ_CS7;
 		break;
@@ -1499,11 +1566,13 @@
 		cflag |= DZ_CS8;
 		break;
 	}
-	switch(parity) {
-	case 'o': case 'O':
+	switch (parity) {
+	case 'o':
+	case 'O':
 		cflag |= DZ_PARODD;
 		break;
-	case 'e': case 'E':
+	case 'e':
+	case 'E':
 		cflag |= DZ_PARENB;
 		break;
 	}
@@ -1511,45 +1580,44 @@
 
 	/* TOFIX: force to console line */
 	dz_console = &multi[CONSOLE_LINE];
-    	if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100)) 
-	dz_console->port = KN01_DZ11_BASE;
-       	else 
-       		dz_console->port = KN02_DZ11_BASE; 
+	if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100)) 
+		dz_console->port = KN01_DZ11_BASE;
+	else 
+		dz_console->port = KN02_DZ11_BASE; 
 	dz_console->line = CONSOLE_LINE;
 
 	dz_out(dz_console, DZ_CSR, DZ_CLR);
 	while ((tmp = dz_in(dz_console,DZ_CSR)) & DZ_CLR)
-	  ;
+		;
 
 	/* enable scanning */
 	dz_out(dz_console, DZ_CSR, DZ_MSE); 
 
-        /*  Set up flags... */
+	/*  Set up flags... */
 	dz_console->cflags = 0;
 	dz_console->cflags |= DZ_B9600;
 	dz_console->cflags |= DZ_CS8;
 	dz_console->cflags |= DZ_PARENB;
-	dz_out (dz_console, DZ_LPR, dz_console->cflags);
+	dz_out(dz_console, DZ_LPR, dz_console->cflags);
 
 	mask = 1 << dz_console->line;
-	tmp = dz_in (dz_console, DZ_TCR);       /* read the TX flag */
+	tmp = dz_in (dz_console, DZ_TCR);		/* read the TX flag */
 	if (!(tmp & mask)) {
-	  tmp |= mask;                   /* set the TX flag */
-	  dz_out (dz_console, DZ_TCR, tmp); 
+		tmp |= mask;				/* set the TX flag */
+		dz_out (dz_console, DZ_TCR, tmp); 
 	}
-	
 
 	return 0;
 }
 
 static struct console dz_sercons = {
-	name:		"ttyS",
-	write:		dz_console_print,
-	device:		dz_console_device,
-	wait_key:	dz_console_wait_key,
-	setup:		dz_console_setup,
-	flags:		CON_CONSDEV | CON_PRINTBUFFER,
-	index:		CONSOLE_LINE,
+    name:	"ttyS",
+    write:	dz_console_print,
+    device:	dz_console_device,
+    wait_key:	dz_console_wait_key,
+    setup:	dz_console_setup,
+    flags:	CON_CONSDEV | CON_PRINTBUFFER,
+    index:	CONSOLE_LINE,
 };
 
 void __init dz_serial_console_init(void)
@@ -1559,3 +1627,4 @@
 
 #endif /* ifdef CONFIG_SERIAL_CONSOLE */
 
+MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/char/epca.c linux/drivers/char/epca.c
--- linux-2.4.10-pre6/drivers/char/epca.c	Wed Jun 27 14:13:01 2001
+++ linux/drivers/char/epca.c	Mon Dec  3 23:08:46 2001
@@ -610,9 +610,7 @@
 		                      ASYNC_CALLOUT_ACTIVE | ASYNC_CLOSING);
 		wake_up_interruptible(&ch->close_wait);
 
-#ifdef MODULE
 		MOD_DEC_USE_COUNT;
-#endif
 
 		restore_flags(flags);
 
@@ -700,10 +698,8 @@
 
 		shutdown(ch);
 
-#ifdef MODULE
 		if (ch->count)
 			MOD_DEC_USE_COUNT;
-#endif /* MODULE */
 		
 
 		ch->tty   = NULL;
@@ -1397,12 +1393,9 @@
 		return(-ENODEV);
 	}
 
-#ifdef MODULE
 
 	MOD_INC_USE_COUNT;
 
-#endif
-
 	ch = &digi_channels[line];
 	boardnum = ch->boardnum;
 
@@ -4106,3 +4099,5 @@
 } /* End init_PCI */
 
 #endif /* ENABLE_PCI */
+
+MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/char/ite_gpio.c linux/drivers/char/ite_gpio.c
--- linux-2.4.10-pre6/drivers/char/ite_gpio.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/char/ite_gpio.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,430 @@
+/*
+ * FILE NAME ite_gpio.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *  API for ITE GPIO device.
+ *  Driver for ITE GPIO device.
+ *
+ *  Author: MontaVista Software, Inc.  <source@mvista.com>
+ *          Hai-Pao Fan <haipao@mvista.com>
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE	LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/miscdevice.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <asm/uaccess.h>
+#include <asm/addrspace.h>
+#include <asm/it8172/it8172_int.h>
+#include <linux/sched.h>
+#include <linux/ite_gpio.h>
+
+#define ite_gpio_base 0x14013800
+
+#define	ITE_GPADR	(*(volatile __u8 *)(0x14013800 + KSEG1))
+#define	ITE_GPBDR	(*(volatile __u8 *)(0x14013808 + KSEG1))
+#define	ITE_GPCDR	(*(volatile __u8 *)(0x14013810 + KSEG1))
+#define	ITE_GPACR	(*(volatile __u16 *)(0x14013802 + KSEG1))
+#define	ITE_GPBCR	(*(volatile __u16 *)(0x1401380a + KSEG1))
+#define	ITE_GPCCR	(*(volatile __u16 *)(0x14013812 + KSEG1))
+#define ITE_GPAICR	(*(volatile __u16 *)(0x14013804 + KSEG1))
+#define	ITE_GPBICR	(*(volatile __u16 *)(0x1401380c + KSEG1))
+#define	ITE_GPCICR	(*(volatile __u16 *)(0x14013814 + KSEG1))
+#define	ITE_GPAISR	(*(volatile __u8 *)(0x14013806 + KSEG1))
+#define	ITE_GPBISR	(*(volatile __u8 *)(0x1401380e + KSEG1))
+#define	ITE_GPCISR	(*(volatile __u8 *)(0x14013816 + KSEG1))
+#define	ITE_GCR		(*(volatile __u8 *)(0x14013818 + KSEG1))
+
+#define MAX_GPIO_LINE		21
+static int ite_gpio_irq=IT8172_GPIO_IRQ;
+
+static long ite_irq_counter[MAX_GPIO_LINE];
+wait_queue_head_t ite_gpio_wait[MAX_GPIO_LINE];
+static int ite_gpio_irq_pending[MAX_GPIO_LINE];
+
+static int ite_gpio_debug=0;
+#define DEB(x)  if (ite_gpio_debug>=1) x
+
+int ite_gpio_in(__u32 device, __u32 mask, volatile __u32 *data)
+{
+	DEB(printk("ite_gpio_in mask=0x%x\n",mask)); 
+
+	switch (device) {
+	case ITE_GPIO_PORTA:
+		ITE_GPACR = (__u16)mask;	/* 0xffff */
+		*data = ITE_GPADR;
+		break;
+	case ITE_GPIO_PORTB:
+		ITE_GPBCR = (__u16)mask;	/* 0xffff */
+		*data = ITE_GPBDR;
+		break;
+	case ITE_GPIO_PORTC:
+		ITE_GPCCR = (__u16)mask;	/* 0x03ff */
+		*data = ITE_GPCDR;
+		break;
+	default:
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+
+int ite_gpio_out(__u32 device, __u32 mask, __u32 data)
+{
+	switch (device) {
+	case ITE_GPIO_PORTA:
+		ITE_GPACR = (__u16)mask;	/* 0x5555 */
+		ITE_GPADR = (__u8)data;
+		break;
+	case ITE_GPIO_PORTB:
+		ITE_GPBCR = (__u16)mask;	/* 0x5555 */
+		ITE_GPBDR = (__u8)data;
+		break;
+	case ITE_GPIO_PORTC:
+		ITE_GPCCR = (__u16)mask;	/* 0x0155 */
+		ITE_GPCDR = (__u8)data;
+		break;
+	default:
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+int ite_gpio_int_ctrl(__u32 device, __u32 mask, __u32 data)
+{
+	switch (device) {
+	case ITE_GPIO_PORTA:
+		ITE_GPAICR = (ITE_GPAICR & ~mask) | (data & mask);
+		break;
+	case ITE_GPIO_PORTB:
+		ITE_GPBICR = (ITE_GPBICR & ~mask) | (data & mask);
+		break;
+	case ITE_GPIO_PORTC:
+		ITE_GPCICR = (ITE_GPCICR & ~mask) | (data & mask);
+		break;
+	default:
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+int ite_gpio_in_status(__u32 device, __u32 mask, volatile __u32 *data)
+{
+	int ret=-1;
+
+	if (MAX_GPIO_LINE > *data >= 0) 
+		ret=ite_gpio_irq_pending[*data];
+ 
+	DEB(printk("ite_gpio_in_status %d ret=%d\n",*data, ret));
+
+	switch (device) {
+	case ITE_GPIO_PORTA:
+		*data = ITE_GPAISR & mask;
+		break;
+	case ITE_GPIO_PORTB:
+		*data = ITE_GPBISR & mask;
+		break;
+	case ITE_GPIO_PORTC:
+		*data = ITE_GPCISR & mask;
+		break;
+	default:
+		return -EFAULT;
+	}
+
+	return ret;
+}
+
+int ite_gpio_out_status(__u32 device, __u32 mask, __u32 data)
+{
+	switch (device) {
+	case ITE_GPIO_PORTA:
+		ITE_GPAISR = (ITE_GPAISR & ~mask) | (data & mask);
+		break;
+	case ITE_GPIO_PORTB:
+		ITE_GPBISR = (ITE_GPBISR & ~mask) | (data & mask);
+		break;
+	case ITE_GPIO_PORTC:
+		ITE_GPCISR = (ITE_GPCISR & ~mask) | (data & mask);
+		break;
+	default:
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+int ite_gpio_gen_ctrl(__u32 device, __u32 mask, __u32 data)
+{
+	ITE_GCR = (ITE_GCR & ~mask) | (data & mask);
+
+	return 0;
+}
+
+int ite_gpio_int_wait (__u32 device, __u32 mask, __u32 data)
+{
+	int i,line=0, ret=0;
+	unsigned long flags;
+
+	switch (device) {
+	case ITE_GPIO_PORTA:
+		line = data & mask;
+		break;
+	case ITE_GPIO_PORTB:
+		line = (data & mask) <<8;
+		break;
+	case ITE_GPIO_PORTC:
+		line = (data & mask) <<16;
+		break;
+	}
+	for (i=MAX_GPIO_LINE-1; i >= 0; i--) {
+		if ( (line) & (1 << i))
+			break;
+	}
+
+	DEB(printk("wait device=0x%d mask=0x%x data=0x%x index %d\n", 
+		device, mask, data, i));
+
+	if (line & ~(1<<i))
+		return -EFAULT;
+
+	if (ite_gpio_irq_pending[i]==1)
+		return -EFAULT;
+
+	save_flags (flags);
+	cli();
+	ite_gpio_irq_pending[i] = 1;
+	ret = interruptible_sleep_on_timeout(&ite_gpio_wait[i], 3*HZ);
+	restore_flags (flags);
+	ite_gpio_irq_pending[i] = 0;
+
+	return ret;
+}
+
+EXPORT_SYMBOL(ite_gpio_in);
+EXPORT_SYMBOL(ite_gpio_out);
+EXPORT_SYMBOL(ite_gpio_int_ctrl);
+EXPORT_SYMBOL(ite_gpio_in_status);
+EXPORT_SYMBOL(ite_gpio_out_status);
+EXPORT_SYMBOL(ite_gpio_gen_ctrl);
+EXPORT_SYMBOL(ite_gpio_int_wait);
+
+static int ite_gpio_open(struct inode *inode, struct file *file)
+{
+	unsigned int minor = MINOR(inode->i_rdev); 
+	if (minor != GPIO_MINOR)
+		return -ENODEV;
+
+#ifdef MODULE
+	MOD_INC_USE_COUNT;
+#endif
+
+	return 0;
+}
+
+
+static int ite_gpio_release(struct inode *inode, struct file *file)
+{
+
+#ifdef MODULE
+	MOD_DEC_USE_COUNT;
+#endif
+
+	return 0;
+}
+
+
+static int ite_gpio_ioctl(struct inode *inode, struct file *file,
+	unsigned int cmd, unsigned long arg)
+{
+
+	static struct ite_gpio_ioctl_data ioctl_data;
+
+	if (copy_from_user(&ioctl_data, (struct ite_gpio_ioctl_data *)arg,
+			sizeof(ioctl_data)))
+		return -EFAULT;
+	if ((ioctl_data.device < ITE_GPIO_PORTA) ||
+			(ioctl_data.device > ITE_GPIO_PORTC) )
+				return -EFAULT;
+
+	switch(cmd) {
+		case ITE_GPIO_IN:
+			if (ite_gpio_in(ioctl_data.device, ioctl_data.mask,
+					   &ioctl_data.data))
+				return -EFAULT;
+
+			if (copy_to_user((struct ite_gpio_ioctl_data *)arg,
+					 &ioctl_data, sizeof(ioctl_data)))
+				return -EFAULT;
+			break;
+
+		case ITE_GPIO_OUT:
+			return ite_gpio_out(ioctl_data.device,
+					ioctl_data.mask, ioctl_data.data);
+			break;
+
+		case ITE_GPIO_INT_CTRL:
+			return ite_gpio_int_ctrl(ioctl_data.device,
+					ioctl_data.mask, ioctl_data.data);
+			break;
+
+		case ITE_GPIO_IN_STATUS:
+			if (ite_gpio_in_status(ioctl_data.device, ioctl_data.mask,
+					&ioctl_data.data))
+				return -EFAULT;
+			if (copy_to_user((struct ite_gpio_ioctl_data *)arg,
+					&ioctl_data, sizeof(ioctl_data))) 
+				return -EFAULT;
+			break;
+
+		case ITE_GPIO_OUT_STATUS:
+			return ite_gpio_out_status(ioctl_data.device,
+					ioctl_data.mask, ioctl_data.data);
+			break;
+
+		case ITE_GPIO_GEN_CTRL:
+			return ite_gpio_gen_ctrl(ioctl_data.device,
+					ioctl_data.mask, ioctl_data.data);
+			break;
+
+		case ITE_GPIO_INT_WAIT:
+			return ite_gpio_int_wait(ioctl_data.device,
+					ioctl_data.mask, ioctl_data.data);
+			break;
+
+		default:
+			return -ENOIOCTLCMD;
+
+	}
+	return 0;
+}
+
+static void ite_gpio_irq_handler(int this_irq, void *dev_id, struct pt_regs *regs)
+{
+	int i,line;
+
+	line = ITE_GPCISR & 0x1f;
+	for (i=4; i >=0; i--) {
+		if ( line & (1 << i)) { 
+			++ite_irq_counter[i+16];
+			ite_gpio_irq_pending[i+16] = 2;
+			wake_up_interruptible(&ite_gpio_wait[i+16]);
+
+DEB(printk("interrupt 0x%x %d\n", &ite_gpio_wait[i+16], i+16));
+
+			ITE_GPCISR = ITE_GPCISR & (1<<i);
+			return;
+		}
+	}
+	line = ITE_GPBISR;
+	for (i=7; i >= 0; i--) {
+		if ( line & (1 << i)) {
+			++ite_irq_counter[i+8];
+			ite_gpio_irq_pending[i+8] = 2;
+			wake_up_interruptible(&ite_gpio_wait[i+8]);
+
+DEB(printk("interrupt 0x%x %d\n",ITE_GPBISR, i+8));
+
+			ITE_GPBISR = ITE_GPBISR & (1<<i);
+			return;
+		}
+	}
+	line = ITE_GPAISR;
+	for (i=7; i >= 0; i--) {
+		if ( line & (1 << i)) {
+			++ite_irq_counter[i];
+			ite_gpio_irq_pending[i] = 2;
+			wake_up_interruptible(&ite_gpio_wait[i]);
+
+DEB(printk("interrupt 0x%x %d\n",ITE_GPAISR, i));
+
+			ITE_GPAISR = ITE_GPAISR & (1<<i);
+			return;
+		}
+	}
+}
+
+static struct file_operations ite_gpio_fops =
+{
+	owner:		THIS_MODULE,
+	ioctl:		ite_gpio_ioctl,
+	open:		ite_gpio_open,
+	release:	ite_gpio_release,
+};
+
+/* GPIO_MINOR in include/linux/miscdevice.h */
+static struct miscdevice ite_gpio_miscdev =
+{
+	GPIO_MINOR,
+	"ite_gpio",
+	&ite_gpio_fops
+};
+
+int __init ite_gpio_init(void)
+{
+	int i;
+
+	misc_register(&ite_gpio_miscdev);
+
+	if (check_region(ite_gpio_base, 0x1c) < 0 ) {
+           return -ENODEV;
+        } else {
+           request_region(ite_gpio_base, 0x1c, "ITE GPIO");
+        }     
+
+	/* initialize registers */
+        ITE_GPACR = 0xffff;
+        ITE_GPBCR = 0xffff;
+        ITE_GPCCR = 0xffff;
+        ITE_GPAICR = 0x00ff;
+        ITE_GPBICR = 0x00ff;
+        ITE_GPCICR = 0x00ff;
+        ITE_GCR = 0;
+
+	for (i = 0; i < MAX_GPIO_LINE; i++) {
+		ite_gpio_irq_pending[i]=0;	
+		init_waitqueue_head(&ite_gpio_wait[i]);
+	}
+	if (request_irq(ite_gpio_irq, ite_gpio_irq_handler, SA_SHIRQ, "gpio", 0) < 0)
+		return 0;
+	printk("GPIO at 0x%x (irq = %d)\n", ite_gpio_base, ite_gpio_irq);
+
+	return 0;
+}	
+
+void __exit ite_gpio_exit(void)
+{
+	misc_deregister(&ite_gpio_miscdev);
+}
+
+module_init(ite_gpio_init);
+module_exit(ite_gpio_exit);
+
+MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/char/mem.c linux/drivers/char/mem.c
--- linux-2.4.10-pre6/drivers/char/mem.c	Sat Jul 28 12:37:23 2001
+++ linux/drivers/char/mem.c	Mon Dec  3 23:08:46 2001
@@ -153,8 +153,6 @@
 	/* Use no-cache mode, serialized */
 	else if (MMU_IS_040 || MMU_IS_060)
 		prot = (prot & _CACHEMASK040) | _PAGE_NOCACHE_S;
-#elif defined(__mips__)
-	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
 #endif
 
 	return __pgprot(prot);
diff -urN linux-2.4.10-pre6/drivers/char/moxa.c linux/drivers/char/moxa.c
--- linux-2.4.10-pre6/drivers/char/moxa.c	Wed Jul 25 14:12:02 2001
+++ linux/drivers/char/moxa.c	Mon Dec  3 23:08:46 2001
@@ -205,6 +205,7 @@
 
 MODULE_AUTHOR("William Chen");
 MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
+MODULE_LICENSE("GPL");
 MODULE_PARM(type, "1-4i");
 MODULE_PARM(baseaddr, "1-4i");
 MODULE_PARM(numports, "1-4i");
@@ -212,6 +213,8 @@
 MODULE_PARM(calloutmajor, "i");
 MODULE_PARM(verbose, "i");
 
+EXPORT_NO_SYMBOLS;
+
 #endif				//MODULE
 
 static struct tty_driver moxaDriver;
@@ -1717,27 +1720,6 @@
 		if(copy_to_user((void *)arg, temp_queue, sizeof(struct moxaq_str) * MAX_PORTS))
 			return -EFAULT;
 		return (0);
-	case MOXA_LOAD_BIOS:
-		if(copy_from_user(&dltmp, (void *)arg, sizeof(struct dl_str)))
-			return -EFAULT;
-		i = moxaloadbios(dltmp.cardno, dltmp.buf, dltmp.len);
-		return (i);
-	case MOXA_FIND_BOARD:
-		if(copy_from_user(&dltmp, (void *)arg, sizeof(struct dl_str)))
-			return -EFAULT;
-		return moxafindcard(dltmp.cardno);
-	case MOXA_LOAD_C320B:
-		if(copy_from_user(&dltmp, (void *)arg, sizeof(struct dl_str)))
-			return -EFAULT;
-		moxaload320b(dltmp.cardno, dltmp.buf, dltmp.len);
-		return (0);
-	case MOXA_LOAD_CODE:
-		if(copy_from_user(&dltmp, (void *)arg, sizeof(struct dl_str)))
-			return -EFAULT; 
-		i = moxaloadcode(dltmp.cardno, dltmp.buf, dltmp.len);
-		if (i == -1)
-			return (-EFAULT);
-		return (i);
 	case MOXA_GET_OQUEUE:
 		i = MoxaPortTxQueue(port);
 		return put_user(i, (unsigned long *) arg);
@@ -1778,9 +1760,38 @@
 		if(copy_to_user((void *)arg, GMStatus, sizeof(struct mxser_mstatus) * MAX_PORTS))
 			return -EFAULT;
 		return 0;
+	default:
+		return (-ENOIOCTLCMD);
+	case MOXA_LOAD_BIOS:
+	case MOXA_FIND_BOARD:
+	case MOXA_LOAD_C320B:
+	case MOXA_LOAD_CODE:
+		break;
+	}
+
+	if(copy_from_user(&dltmp, (void *)arg, sizeof(struct dl_str)))
+		return -EFAULT;
+	if(dltmp.cardno < 0 || dltmp.cardno >= MAX_BOARDS)
+		return -EINVAL;
+
+	switch(cmd)
+	{
+	case MOXA_LOAD_BIOS:
+		i = moxaloadbios(dltmp.cardno, dltmp.buf, dltmp.len);
+		return (i);
+	case MOXA_FIND_BOARD:
+		return moxafindcard(dltmp.cardno);
+	case MOXA_LOAD_C320B:
+		moxaload320b(dltmp.cardno, dltmp.buf, dltmp.len);
+	default: /* to keep gcc happy */
+		return (0);
+	case MOXA_LOAD_CODE:
+		i = moxaloadcode(dltmp.cardno, dltmp.buf, dltmp.len);
+		if (i == -1)
+			return (-EFAULT);
+		return (i);
 
 	}
-	return (-ENOIOCTLCMD);
 }
 
 int MoxaDriverPoll(void)
diff -urN linux-2.4.10-pre6/drivers/char/qtronix.c linux/drivers/char/qtronix.c
--- linux-2.4.10-pre6/drivers/char/qtronix.c	Fri Apr 13 20:26:07 2001
+++ linux/drivers/char/qtronix.c	Mon Dec  3 23:08:46 2001
@@ -6,7 +6,7 @@
  *
  * Copyright 2001 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *
  *  The bottom portion of this driver was take from 
@@ -71,7 +71,7 @@
 #include <linux/random.h>
 #include <linux/poll.h>
 #include <linux/miscdevice.h>
-#include <linux/malloc.h>
+#include <linux/slab.h>
 #include <linux/kbd_kern.h>
 #include <linux/smp_lock.h>
 #include <asm/io.h>
@@ -353,19 +353,19 @@
 static unsigned char handle_kbd_event(void);
 
 
-int pckbd_setkeycode(unsigned int scancode, unsigned int keycode)
+int kbd_setkeycode(unsigned int scancode, unsigned int keycode)
 {
-	printk("pckbd_setkeycode scancode %x keycode %x\n", scancode, keycode);
+	printk("kbd_setkeycode scancode %x keycode %x\n", scancode, keycode);
 	return 0;
 }
 
-int pckbd_getkeycode(unsigned int scancode)
+int kbd_getkeycode(unsigned int scancode)
 {
 	return scancode;
 }
 
 
-int pckbd_translate(unsigned char scancode, unsigned char *keycode,
+int kbd_translate(unsigned char scancode, unsigned char *keycode,
 		    char raw_mode)
 {
 	static int prev_scancode = 0;
@@ -406,9 +406,9 @@
  	return 1;
 }
 
-char pckbd_unexpected_up(unsigned char keycode)
+char kbd_unexpected_up(unsigned char keycode)
 {
-	//printk("pckbd_unexpected_up\n");
+	//printk("kbd_unexpected_up\n");
 	return 0;
 }
 
@@ -422,12 +422,12 @@
 }	
 
 
-void pckbd_leds(unsigned char leds)
+void kbd_leds(unsigned char leds)
 {
 }
 
 /* dummy */
-void pckbd_init_hw(void)
+void kbd_init_hw(void)
 {
 }
 
diff -urN linux-2.4.10-pre6/drivers/char/rtc.c linux/drivers/char/rtc.c
--- linux-2.4.10-pre6/drivers/char/rtc.c	Sun Aug 12 10:38:48 2001
+++ linux/drivers/char/rtc.c	Mon Dec  3 23:08:46 2001
@@ -40,9 +40,10 @@
  *	1.10b	Andrew Morton: SMP lock fix
  *	1.10c	Cesar Barros: SMP locking fixes and cleanup
  *	1.10d	Paul Gortmaker: delete paranoia check in rtc_exit
+ *	1.10e	Maciej W. Rozycki: Handle DECstation's year weirdness.
  */
 
-#define RTC_VERSION		"1.10d"
+#define RTC_VERSION		"1.10e"
 
 #define RTC_IO_EXTENT	0x10	/* Only really two ports, but...	*/
 
@@ -361,6 +362,9 @@
 		unsigned char mon, day, hrs, min, sec, leap_yr;
 		unsigned char save_control, save_freq_select;
 		unsigned int yrs;
+#ifdef CONFIG_DECSTATION
+		unsigned int real_yrs;
+#endif
 
 		if (!capable(CAP_SYS_TIME))
 			return -EACCES;
@@ -394,6 +398,20 @@
 			return -EINVAL;
 
 		spin_lock_irq(&rtc_lock);
+#ifdef CONFIG_DECSTATION
+		real_yrs = yrs;
+		yrs = 72;
+
+		/*
+		 * We want to keep the year set to 73 until March
+		 * for non-leap years, so that Feb, 29th is handled
+		 * correctly.
+		 */
+		if (!leap_yr && mon < 3) {
+			real_yrs--;
+			yrs = 73;
+		}
+#endif
 		if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY)
 		    || RTC_ALWAYS_BCD) {
 			if (yrs > 169) {
@@ -416,6 +434,9 @@
 		save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
 		CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
 
+#ifdef CONFIG_DECSTATION
+		CMOS_WRITE(real_yrs, RTC_DEC_YEAR);
+#endif
 		CMOS_WRITE(yrs, RTC_YEAR);
 		CMOS_WRITE(mon, RTC_MONTH);
 		CMOS_WRITE(day, RTC_DAY_OF_MONTH);
@@ -469,7 +490,7 @@
 		spin_unlock_irq(&rtc_lock);
 		return 0;
 	}
-#elif !defined(CONFIG_DECSTATION)
+#endif
 	case RTC_EPOCH_READ:	/* Read the epoch.	*/
 	{
 		return put_user (epoch, (unsigned long *)arg);
@@ -488,7 +509,6 @@
 		epoch = arg;
 		return 0;
 	}
-#endif
 	default:
 		return -EINVAL;
 	}
@@ -709,12 +729,12 @@
 	} else if (year >= 20 && year < 48) {
 		epoch = 1980;
 		guess = "ARC console";
-	} else if (year >= 48 && year < 70) {
+	} else if (year >= 48 && year < 72) {
 		epoch = 1952;
 		guess = "Digital UNIX";
 #if defined(__mips__)
-	} else if (year >= 70 && year < 100) {
-		epoch = 1928;
+	} else if (year >= 72 && year < 74) {
+		epoch = 2000;
 		guess = "Digital DECstation";
 #else
 	} else if (year >= 70) {
@@ -911,6 +931,9 @@
 {
 	unsigned long uip_watchdog = jiffies;
 	unsigned char ctrl;
+#ifdef CONFIG_DECSTATION
+	unsigned int real_year;
+#endif
 
 	/*
 	 * read RTC once any update in progress is done. The update
@@ -939,6 +962,9 @@
 	rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
 	rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
 	rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
+#ifdef CONFIG_DECSTATION
+	real_year = CMOS_READ(RTC_DEC_YEAR);
+#endif
 	ctrl = CMOS_READ(RTC_CONTROL);
 	spin_unlock_irq(&rtc_lock);
 
@@ -952,6 +978,10 @@
 		BCD_TO_BIN(rtc_tm->tm_year);
 	}
 
+#ifdef CONFIG_DECSTATION
+	rtc_tm->tm_year += real_year - 72;
+#endif
+
 	/*
 	 * Account for differences between how the RTC uses the values
 	 * and how they are defined in a struct rtc_time;
@@ -1024,3 +1054,6 @@
 	spin_unlock_irq(&rtc_lock);
 }
 #endif
+
+MODULE_AUTHOR("Paul Gortmaker");
+MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/i2c/i2c-adap-ite.c linux/drivers/i2c/i2c-adap-ite.c
--- linux-2.4.10-pre6/drivers/i2c/i2c-adap-ite.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/i2c/i2c-adap-ite.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,319 @@
+/*
+   -------------------------------------------------------------------------
+   i2c-adap-ite.c i2c-hw access for the IIC peripheral on the ITE MIPS system
+   -------------------------------------------------------------------------
+   Hai-Pao Fan, MontaVista Software, Inc.
+   hpfan@mvista.com or source@mvista.com
+
+   Copyright 2001 MontaVista Software Inc.
+
+   ----------------------------------------------------------------------------
+   This file was highly leveraged from i2c-elektor.c, which was created
+   by Simon G. Vogl and Hans Berglund:
+
+ 
+     Copyright (C) 1995-97 Simon G. Vogl
+                   1998-99 Hans Berglund
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.		     */
+/* ------------------------------------------------------------------------- */
+
+/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
+   Frodo Looijaard <frodol@dds.nl> */
+
+#include <linux/kernel.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/malloc.h>
+#include <linux/version.h>
+#include <linux/init.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <linux/i2c.h>
+#include <linux/i2c-algo-ite.h>
+#include <linux/i2c-adap-ite.h>
+#include "i2c-ite.h"
+
+#define DEFAULT_BASE  0x14014030
+#define ITE_IIC_IO_SIZE	0x40
+#define DEFAULT_IRQ   0
+#define DEFAULT_CLOCK 0x1b0e	/* default 16MHz/(27+14) = 400KHz */
+#define DEFAULT_OWN   0x55
+
+static int base  = 0;
+static int irq   = 0;
+static int clock = 0;
+static int own   = 0;
+
+static int i2c_debug=0;
+static struct iic_ite gpi;
+#if (LINUX_VERSION_CODE < 0x020301)
+static struct wait_queue *iic_wait = NULL;
+#else
+static wait_queue_head_t iic_wait;
+#endif
+static int iic_pending;
+
+/* ----- global defines -----------------------------------------------	*/
+#define DEB(x)	if (i2c_debug>=1) x
+#define DEB2(x) if (i2c_debug>=2) x
+#define DEB3(x) if (i2c_debug>=3) x
+#define DEBE(x)	x	/* error messages 				*/
+
+
+/* ----- local functions ----------------------------------------------	*/
+
+static void iic_ite_setiic(void *data, int ctl, short val)
+{
+        unsigned long j = jiffies + 10;
+
+	DEB3(printk(" Write 0x%02x to 0x%x\n",(unsigned short)val, ctl&0xff));
+	DEB3({while (jiffies < j) schedule();}) 
+	outw(val,ctl);
+}
+
+static short iic_ite_getiic(void *data, int ctl)
+{
+	short val;
+
+	val = inw(ctl);
+	DEB3(printk("Read 0x%02x from 0x%x\n",(unsigned short)val, ctl&0xff));  
+	return (val);
+}
+
+/* Return our slave address.  This is the address
+ * put on the I2C bus when another master on the bus wants to address us
+ * as a slave
+ */
+static int iic_ite_getown(void *data)
+{
+	return (gpi.iic_own);
+}
+
+
+static int iic_ite_getclock(void *data)
+{
+	return (gpi.iic_clock);
+}
+
+
+#if 0
+static void iic_ite_sleep(unsigned long timeout)
+{
+	schedule_timeout( timeout * HZ);
+}
+#endif
+
+
+/* Put this process to sleep.  We will wake up when the
+ * IIC controller interrupts.
+ */
+static void iic_ite_waitforpin(void) {
+
+   int timeout = 2;
+
+   /* If interrupts are enabled (which they are), then put the process to
+    * sleep.  This process will be awakened by two events -- either the
+    * the IIC peripheral interrupts or the timeout expires. 
+    * If interrupts are not enabled then delay for a reasonable amount 
+    * of time and return.
+    */
+   if (gpi.iic_irq > 0) {
+	cli();
+	if (iic_pending == 0) {
+		interruptible_sleep_on_timeout(&iic_wait, timeout*HZ );
+	} else
+		iic_pending = 0;
+	sti();
+   } else {
+      udelay(100);
+   }
+}
+
+
+static void iic_ite_handler(int this_irq, void *dev_id, struct pt_regs *regs) 
+{
+	
+   iic_pending = 1;
+
+   DEB2(printk("iic_ite_handler: in interrupt handler\n"));
+   wake_up_interruptible(&iic_wait);
+}
+
+
+/* Lock the region of memory where I/O registers exist.  Request our
+ * interrupt line and register its associated handler.
+ */
+static int iic_hw_resrc_init(void)
+{
+  	if (check_region(gpi.iic_base, ITE_IIC_IO_SIZE) < 0 ) {
+   	   return -ENODEV;
+  	} else {
+  	   request_region(gpi.iic_base, ITE_IIC_IO_SIZE, 
+		"i2c (i2c bus adapter)");
+  	}
+	if (gpi.iic_irq > 0) {
+	   if (request_irq(gpi.iic_irq, iic_ite_handler, 0, "ITE IIC", 0) < 0) {
+	      gpi.iic_irq = 0;
+	   } else
+	      DEB3(printk("Enabled IIC IRQ %d\n", gpi.iic_irq));
+	      enable_irq(gpi.iic_irq);
+	}
+	return 0;
+}
+
+
+static void iic_ite_release(void)
+{
+	if (gpi.iic_irq > 0) {
+		disable_irq(gpi.iic_irq);
+		free_irq(gpi.iic_irq, 0);
+	}
+	release_region(gpi.iic_base , 2);
+}
+
+
+static int iic_ite_reg(struct i2c_client *client)
+{
+	return 0;
+}
+
+
+static int iic_ite_unreg(struct i2c_client *client)
+{
+	return 0;
+}
+
+
+static void iic_ite_inc_use(struct i2c_adapter *adap)
+{
+#ifdef MODULE
+	MOD_INC_USE_COUNT;
+#endif
+}
+
+
+static void iic_ite_dec_use(struct i2c_adapter *adap)
+{
+#ifdef MODULE
+	MOD_DEC_USE_COUNT;
+#endif
+}
+
+
+/* ------------------------------------------------------------------------
+ * Encapsulate the above functions in the correct operations structure.
+ * This is only done when more than one hardware adapter is supported.
+ */
+static struct i2c_algo_iic_data iic_ite_data = {
+	NULL,
+	iic_ite_setiic,
+	iic_ite_getiic,
+	iic_ite_getown,
+	iic_ite_getclock,
+	iic_ite_waitforpin,
+	80, 80, 100,		/*	waits, timeout */
+};
+
+static struct i2c_adapter iic_ite_ops = {
+	"ITE IIC adapter",
+	I2C_HW_I_IIC,
+	NULL,
+	&iic_ite_data,
+	iic_ite_inc_use,
+	iic_ite_dec_use,
+	iic_ite_reg,
+	iic_ite_unreg,
+};
+
+/* Called when the module is loaded.  This function starts the
+ * cascade of calls up through the heirarchy of i2c modules (i.e. up to the
+ *  algorithm layer and into to the core layer)
+ */
+static int __init iic_ite_init(void) 
+{
+
+	struct iic_ite *piic = &gpi;
+
+	printk(KERN_INFO "Initialize ITE IIC adapter module\n");
+	if (base == 0)
+		piic->iic_base = DEFAULT_BASE;
+	else
+		piic->iic_base = base;
+
+	if (irq == 0)
+		piic->iic_irq = DEFAULT_IRQ;
+	else
+		piic->iic_irq = irq;
+
+	if (clock == 0)
+		piic->iic_clock = DEFAULT_CLOCK;
+	else
+		piic->iic_clock = clock;
+
+	if (own == 0)
+		piic->iic_own = DEFAULT_OWN;
+	else
+		piic->iic_own = own;
+
+	iic_ite_data.data = (void *)piic;
+#if (LINUX_VERSION_CODE >= 0x020301)
+	init_waitqueue_head(&iic_wait);
+#endif
+	if (iic_hw_resrc_init() == 0) {
+		if (i2c_iic_add_bus(&iic_ite_ops) < 0)
+			return -ENODEV;
+	} else {
+		return -ENODEV;
+	}
+	printk(KERN_INFO " found device at %#x irq %d.\n", 
+		piic->iic_base, piic->iic_irq);
+	return 0;
+}
+
+
+static void iic_ite_exit(void)
+{
+	i2c_iic_del_bus(&iic_ite_ops);
+        iic_ite_release();
+}
+
+EXPORT_NO_SYMBOLS;
+
+/* If modules is NOT defined when this file is compiled, then the MODULE_*
+ * macros will resolve to nothing
+ */
+MODULE_AUTHOR("MontaVista Software <www.mvista.com>");
+MODULE_DESCRIPTION("I2C-Bus adapter routines for ITE IIC bus adapter");
+
+MODULE_PARM(base, "i");
+MODULE_PARM(irq, "i");
+MODULE_PARM(clock, "i");
+MODULE_PARM(own, "i");
+MODULE_PARM(i2c_debug,"i");
+
+
+/* Called when module is loaded or when kernel is intialized.
+ * If MODULES is defined when this file is compiled, then this function will
+ * resolve to init_module (the function called when insmod is invoked for a
+ * module).  Otherwise, this function is called early in the boot, when the
+ * kernel is intialized.  Check out /include/init.h to see how this works.
+ */
+module_init(iic_ite_init);
+
+/* Resolves to module_cleanup when MODULES is defined. */
+module_exit(iic_ite_exit); 
diff -urN linux-2.4.10-pre6/drivers/i2c/i2c-algo-ite.c linux/drivers/i2c/i2c-algo-ite.c
--- linux-2.4.10-pre6/drivers/i2c/i2c-algo-ite.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/i2c/i2c-algo-ite.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,872 @@
+/*
+   -------------------------------------------------------------------------
+   i2c-algo-ite.c i2c driver algorithms for ITE adapters	    
+   
+   Hai-Pao Fan, MontaVista Software, Inc.
+   hpfan@mvista.com or source@mvista.com
+
+   Copyright 2000 MontaVista Software Inc.
+
+   ---------------------------------------------------------------------------
+   This file was highly leveraged from i2c-algo-pcf.c, which was created
+   by Simon G. Vogl and Hans Berglund:
+
+
+     Copyright (C) 1995-1997 Simon G. Vogl
+                   1998-2000 Hans Berglund
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.		     */
+/* ------------------------------------------------------------------------- */
+
+/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and 
+   Frodo Looijaard <frodol@dds.nl> ,and also from Martin Bailey
+   <mbailey@littlefeet-inc.com> */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/malloc.h>
+#include <linux/version.h>
+#include <linux/init.h>
+#include <asm/uaccess.h>
+#include <linux/ioport.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+
+#include <linux/i2c.h>
+#include <linux/i2c-algo-ite.h>
+#include "i2c-ite.h"
+
+#define	PM_DSR		IT8172_PCI_IO_BASE + IT_PM_DSR
+#define	PM_IBSR		IT8172_PCI_IO_BASE + IT_PM_DSR + 0x04 
+#define GPIO_CCR	IT8172_PCI_IO_BASE + IT_GPCCR
+
+/* ----- global defines ----------------------------------------------- */
+#define DEB(x) if (i2c_debug>=1) x
+#define DEB2(x) if (i2c_debug>=2) x
+#define DEB3(x) if (i2c_debug>=3) x /* print several statistical values*/
+#define DEBPROTO(x) if (i2c_debug>=9) x;
+ 	/* debug the protocol by showing transferred bits */
+#define DEF_TIMEOUT 16
+
+/* debugging - slow down transfer to have a look at the data .. 	*/
+/* I use this with two leds&resistors, each one connected to sda,scl 	*/
+/* respectively. This makes sure that the algorithm works. Some chips   */
+/* might not like this, as they have an internal timeout of some mils	*/
+/*
+#define SLO_IO      jif=jiffies;while(jiffies<=jif+i2c_table[minor].veryslow)\
+                        if (need_resched) schedule();
+*/
+
+
+/* ----- global variables ---------------------------------------------	*/
+
+#ifdef SLO_IO
+	int jif;
+#endif
+
+/* module parameters:
+ */
+static int i2c_debug=1;
+static int iic_test=0;	/* see if the line-setting functions work	*/
+static int iic_scan=0;	/* have a look at what's hanging 'round		*/
+
+/* --- setting states on the bus with the right timing: ---------------	*/
+
+#define get_clock(adap) adap->getclock(adap->data)
+#define iic_outw(adap, reg, val) adap->setiic(adap->data, reg, val)
+#define iic_inw(adap, reg) adap->getiic(adap->data, reg)
+
+
+/* --- other auxiliary functions --------------------------------------	*/
+
+static void iic_start(struct i2c_algo_iic_data *adap)
+{
+	iic_outw(adap,ITE_I2CHCR,ITE_CMD);
+}
+
+static void iic_stop(struct i2c_algo_iic_data *adap)
+{
+	iic_outw(adap,ITE_I2CHCR,0);
+	iic_outw(adap,ITE_I2CHSR,ITE_I2CHSR_TDI);
+}
+
+static void iic_reset(struct i2c_algo_iic_data *adap)
+{
+	iic_outw(adap, PM_IBSR, iic_inw(adap, PM_IBSR) | 0x80);
+}
+
+
+static int wait_for_bb(struct i2c_algo_iic_data *adap)
+{
+	int timeout = DEF_TIMEOUT;
+	short status;
+
+	status = iic_inw(adap, ITE_I2CHSR);
+#ifndef STUB_I2C
+	while (timeout-- && (status & ITE_I2CHSR_HB)) {
+		udelay(1000); /* How much is this? */
+		status = iic_inw(adap, ITE_I2CHSR);
+	}
+#endif
+	if (timeout<=0) {
+		printk(KERN_ERR "Timeout, host is busy\n");
+		iic_reset(adap);
+	}
+	return(timeout<=0);
+}
+
+/*
+ * Puts this process to sleep for a period equal to timeout 
+ */
+static inline void iic_sleep(unsigned long timeout)
+{
+	schedule_timeout( timeout * HZ);
+}
+
+/* After we issue a transaction on the IIC bus, this function
+ * is called.  It puts this process to sleep until we get an interrupt from
+ * from the controller telling us that the transaction we requested in complete.
+ */
+static int wait_for_pin(struct i2c_algo_iic_data *adap, short *status) {
+
+	int timeout = DEF_TIMEOUT;
+	
+	timeout = wait_for_bb(adap);
+	if (timeout) {
+  		DEB2(printk("Timeout waiting for host not busy\n");)
+  		return -EIO;
+	}                           
+	timeout = DEF_TIMEOUT;
+
+	*status = iic_inw(adap, ITE_I2CHSR);
+#ifndef STUB_I2C
+	while (timeout-- && !(*status & ITE_I2CHSR_TDI)) {
+	   adap->waitforpin();
+	   *status = iic_inw(adap, ITE_I2CHSR);
+	}
+#endif
+	if (timeout <= 0)
+		return(-1);
+	else
+		return(0);
+}
+
+static int wait_for_fe(struct i2c_algo_iic_data *adap, short *status)
+{
+	int timeout = DEF_TIMEOUT;
+
+	*status = iic_inw(adap, ITE_I2CFSR);
+#ifndef STUB_I2C 
+	while (timeout-- && (*status & ITE_I2CFSR_FE)) {
+		udelay(1000);
+		iic_inw(adap, ITE_I2CFSR);
+	}
+#endif
+	if (timeout <= 0) 
+		return(-1);
+	else
+		return(0);
+}
+
+static int iic_init (struct i2c_algo_iic_data *adap)
+{
+	short i;
+
+	/* Clear bit 7 to set I2C to normal operation mode */
+	i=iic_inw(adap, PM_DSR)& 0xff7f;
+	iic_outw(adap, PM_DSR, i);
+
+	/* set IT_GPCCR port C bit 2&3 as function 2 */
+	i = iic_inw(adap, GPIO_CCR) & 0xfc0f;
+	iic_outw(adap,GPIO_CCR,i);
+
+	/* Clear slave address/sub-address */
+	iic_outw(adap,ITE_I2CSAR, 0);
+	iic_outw(adap,ITE_I2CSSAR, 0);
+
+	/* Set clock counter register */
+	iic_outw(adap,ITE_I2CCKCNT, get_clock(adap));
+
+	/* Set START/reSTART/STOP time registers */
+	iic_outw(adap,ITE_I2CSHDR, 0x0a);
+	iic_outw(adap,ITE_I2CRSUR, 0x0a);
+	iic_outw(adap,ITE_I2CPSUR, 0x0a);
+
+	/* Enable interrupts on completing the current transaction */
+	iic_outw(adap,ITE_I2CHCR, ITE_I2CHCR_IE | ITE_I2CHCR_HCE);
+
+	/* Clear transfer count */
+	iic_outw(adap,ITE_I2CFBCR, 0x0);
+
+	DEB2(printk("iic_init: Initialized IIC on ITE 0x%x\n",
+		iic_inw(adap, ITE_I2CHSR)));
+	return 0;
+}
+
+
+/*
+ * Sanity check for the adapter hardware - check the reaction of
+ * the bus lines only if it seems to be idle.
+ */
+static int test_bus(struct i2c_algo_iic_data *adap, char *name) {
+#if 0
+	int scl,sda;
+	sda=getsda(adap);
+	if (adap->getscl==NULL) {
+		printk("test_bus: Warning: Adapter can't read from clock line - skipping test.\n");
+		return 0;		
+	}
+	scl=getscl(adap);
+	printk("test_bus: Adapter: %s scl: %d  sda: %d -- testing...\n",
+	name,getscl(adap),getsda(adap));
+	if (!scl || !sda ) {
+		printk("test_bus: %s seems to be busy.\n",adap->name);
+		goto bailout;
+	}
+	sdalo(adap);
+	printk("test_bus:1 scl: %d  sda: %d \n",getscl(adap),
+	       getsda(adap));
+	if ( 0 != getsda(adap) ) {
+		printk("test_bus: %s SDA stuck high!\n",name);
+		sdahi(adap);
+		goto bailout;
+	}
+	if ( 0 == getscl(adap) ) {
+		printk("test_bus: %s SCL unexpected low while pulling SDA low!\n",
+			name);
+		goto bailout;
+	}		
+	sdahi(adap);
+	printk("test_bus:2 scl: %d  sda: %d \n",getscl(adap),
+	       getsda(adap));
+	if ( 0 == getsda(adap) ) {
+		printk("test_bus: %s SDA stuck low!\n",name);
+		sdahi(adap);
+		goto bailout;
+	}
+	if ( 0 == getscl(adap) ) {
+		printk("test_bus: %s SCL unexpected low while SDA high!\n",
+		       adap->name);
+	goto bailout;
+	}
+	scllo(adap);
+	printk("test_bus:3 scl: %d  sda: %d \n",getscl(adap),
+	       getsda(adap));
+	if ( 0 != getscl(adap) ) {
+
+		sclhi(adap);
+		goto bailout;
+	}
+	if ( 0 == getsda(adap) ) {
+		printk("test_bus: %s SDA unexpected low while pulling SCL low!\n",
+			name);
+		goto bailout;
+	}
+	sclhi(adap);
+	printk("test_bus:4 scl: %d  sda: %d \n",getscl(adap),
+	       getsda(adap));
+	if ( 0 == getscl(adap) ) {
+		printk("test_bus: %s SCL stuck low!\n",name);
+		sclhi(adap);
+		goto bailout;
+	}
+	if ( 0 == getsda(adap) ) {
+		printk("test_bus: %s SDA unexpected low while SCL high!\n",
+			name);
+		goto bailout;
+	}
+	printk("test_bus: %s passed test.\n",name);
+	return 0;
+bailout:
+	sdahi(adap);
+	sclhi(adap);
+	return -ENODEV;
+#endif
+	return (0);
+}
+
+/* ----- Utility functions
+ */
+
+
+/* Verify the device we want to talk to on the IIC bus really exists. */
+static inline int try_address(struct i2c_algo_iic_data *adap,
+		       unsigned int addr, int retries)
+{
+	int i, ret = -1;
+	short status;
+
+	for (i=0;i<retries;i++) {
+		iic_outw(adap, ITE_I2CSAR, addr);
+		iic_start(adap);
+		if (wait_for_pin(adap, &status) == 0) {
+			if ((status & ITE_I2CHSR_DNE) == 0) { 
+				iic_stop(adap);
+				iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
+				ret=1;
+				break;	/* success! */
+			}
+		}
+		iic_stop(adap);
+		udelay(adap->udelay);
+	}
+	DEB2(if (i) printk("try_address: needed %d retries for 0x%x\n",i,
+	                   addr));
+	return ret;
+}
+
+
+static int iic_sendbytes(struct i2c_adapter *i2c_adap,const char *buf,
+                         int count)
+{
+	struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
+	int wrcount=0, timeout;
+	short status;
+	int loops, remainder, i, j;
+	union {
+		char byte[2];
+		unsigned short word;
+	} tmp;
+   
+	iic_outw(adap, ITE_I2CSSAR, (unsigned short)buf[wrcount++]);
+	count--;
+	if (count == 0)
+		return -EIO;
+
+	loops =  count / 32;		/* 32-byte FIFO */
+	remainder = count % 32;
+
+	if(loops) {
+		for(i=0; i<loops; i++) {
+
+			iic_outw(adap, ITE_I2CFBCR, 32);
+			for(j=0; j<32/2; j++) {
+				tmp.byte[1] = buf[wrcount++];
+				tmp.byte[0] = buf[wrcount++];
+				iic_outw(adap, ITE_I2CFDR, tmp.word); 
+			}
+
+			/* status FIFO overrun */
+			iic_inw(adap, ITE_I2CFSR);
+			iic_inw(adap, ITE_I2CFBCR);
+
+			iic_outw(adap, ITE_I2CHCR, ITE_WRITE);	/* Issue WRITE command */
+
+			/* Wait for transmission to complete */
+			timeout = wait_for_pin(adap, &status);
+			if(timeout) {
+				iic_stop(adap);
+				printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
+				return -EREMOTEIO; /* got a better one ?? */
+     	}
+			if (status & ITE_I2CHSR_DB) {
+				iic_stop(adap);
+				printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
+				return -EREMOTEIO; /* got a better one ?? */
+			}
+		}
+	}
+	if(remainder) {
+		iic_outw(adap, ITE_I2CFBCR, remainder);
+		for(i=0; i<remainder/2; i++) {
+			tmp.byte[1] = buf[wrcount++];
+			tmp.byte[0] = buf[wrcount++];
+			iic_outw(adap, ITE_I2CFDR, tmp.word);
+		}
+
+		/* status FIFO overrun */
+		iic_inw(adap, ITE_I2CFSR);
+		iic_inw(adap, ITE_I2CFBCR);
+
+		iic_outw(adap, ITE_I2CHCR, ITE_WRITE);  /* Issue WRITE command */
+
+		timeout = wait_for_pin(adap, &status);
+		if(timeout) {
+			iic_stop(adap);
+			printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
+			return -EREMOTEIO; /* got a better one ?? */
+		}
+#ifndef STUB_I2C
+		if (status & ITE_I2CHSR_DB) { 
+			iic_stop(adap);
+			printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
+			return -EREMOTEIO; /* got a better one ?? */
+		}
+#endif
+	}
+	iic_stop(adap);
+	return wrcount;
+}
+
+
+static int iic_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count,
+	int sread)
+{
+	int rdcount=0, i, timeout;
+	short status;
+	struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
+	int loops, remainder, j;
+	union {
+		char byte[2];
+		unsigned short word;
+	} tmp;
+		
+	loops = count / 32;				/* 32-byte FIFO */
+	remainder = count % 32;
+
+	if(loops) {
+		for(i=0; i<loops; i++) {
+			iic_outw(adap, ITE_I2CFBCR, 32);
+			if (sread)
+				iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
+			else
+				iic_outw(adap, ITE_I2CHCR, ITE_READ);		/* Issue READ command */
+
+			timeout = wait_for_pin(adap, &status);
+			if(timeout) {
+				iic_stop(adap);
+				printk("iic_readbytes:  %s read timeout.\n", i2c_adap->name);
+				return (-1);
+			}
+#ifndef STUB_I2C
+			if (status & ITE_I2CHSR_DB) {
+				iic_stop(adap);
+				printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
+				return (-1);
+			}
+#endif
+
+			timeout = wait_for_fe(adap, &status);
+			if(timeout) {
+				iic_stop(adap);
+				printk("iic_readbytes:  %s FIFO is empty\n", i2c_adap->name);
+				return (-1); 
+			}
+
+			for(j=0; j<32/2; j++) {
+				tmp.word = iic_inw(adap, ITE_I2CFDR);
+				buf[rdcount++] = tmp.byte[1];
+				buf[rdcount++] = tmp.byte[0];
+			}
+
+			/* status FIFO underrun */
+			iic_inw(adap, ITE_I2CFSR);
+
+		}
+	}
+
+
+	if(remainder) {
+		remainder=(remainder+1)/2 * 2;
+		iic_outw(adap, ITE_I2CFBCR, remainder);
+		if (sread)
+			iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
+		else
+		iic_outw(adap, ITE_I2CHCR, ITE_READ);		/* Issue READ command */
+
+		timeout = wait_for_pin(adap, &status);
+		if(timeout) {
+			iic_stop(adap);
+			printk("iic_readbytes:  %s read timeout.\n", i2c_adap->name);
+			return (-1);
+		}
+#ifndef STUB_I2C
+		if (status & ITE_I2CHSR_DB) {
+			iic_stop(adap);
+			printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
+			return (-1);
+		}
+#endif
+		timeout = wait_for_fe(adap, &status);
+		if(timeout) {
+			iic_stop(adap);
+			printk("iic_readbytes:  %s FIFO is empty\n", i2c_adap->name);
+			return (-1);
+		}         
+
+		for(i=0; i<(remainder+1)/2; i++) {
+			tmp.word = iic_inw(adap, ITE_I2CFDR);
+			buf[rdcount++] = tmp.byte[1];
+			buf[rdcount++] = tmp.byte[0];
+		}
+
+		/* status FIFO underrun */
+		iic_inw(adap, ITE_I2CFSR);
+
+	}
+
+	iic_stop(adap);
+	return rdcount;
+}
+
+
+/* This function implements combined transactions.  Combined
+ * transactions consist of combinations of reading and writing blocks of data.
+ * Each transfer (i.e. a read or a write) is separated by a repeated start
+ * condition.
+ */
+#if 0
+static int iic_combined_transaction(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num) 
+{
+   int i;
+   struct i2c_msg *pmsg;
+   int ret;
+
+   DEB2(printk("Beginning combined transaction\n"));
+
+   for(i=0; i<(num-1); i++) {
+      pmsg = &msgs[i];
+      if(pmsg->flags & I2C_M_RD) {
+         DEB2(printk("  This one is a read\n"));
+         ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
+      }
+      else if(!(pmsg->flags & I2C_M_RD)) {
+         DEB2(printk("This one is a write\n"));
+         ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
+      }
+   }
+   /* Last read or write segment needs to be terminated with a stop */
+   pmsg = &msgs[i];
+
+   if(pmsg->flags & I2C_M_RD) {
+      DEB2(printk("Doing the last read\n"));
+      ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
+   }
+   else if(!(pmsg->flags & I2C_M_RD)) {
+      DEB2(printk("Doing the last write\n"));
+      ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
+   }
+
+   return ret;
+}
+#endif
+
+
+/* Whenever we initiate a transaction, the first byte clocked
+ * onto the bus after the start condition is the address (7 bit) of the
+ * device we want to talk to.  This function manipulates the address specified
+ * so that it makes sense to the hardware when written to the IIC peripheral.
+ *
+ * Note: 10 bit addresses are not supported in this driver, although they are
+ * supported by the hardware.  This functionality needs to be implemented.
+ */
+static inline int iic_doAddress(struct i2c_algo_iic_data *adap,
+                                struct i2c_msg *msg, int retries) 
+{
+	unsigned short flags = msg->flags;
+	unsigned int addr;
+	int ret;
+
+/* Ten bit addresses not supported right now */
+	if ( (flags & I2C_M_TEN)  ) { 
+#if 0
+		addr = 0xf0 | (( msg->addr >> 7) & 0x03);
+		DEB2(printk("addr0: %d\n",addr));
+		ret = try_address(adap, addr, retries);
+		if (ret!=1) {
+			printk("iic_doAddress: died at extended address code.\n");
+			return -EREMOTEIO;
+		}
+		iic_outw(adap,msg->addr & 0x7f);
+		if (ret != 1) {
+			printk("iic_doAddress: died at 2nd address code.\n");
+			return -EREMOTEIO;
+		}
+		if ( flags & I2C_M_RD ) {
+			i2c_repstart(adap);
+			addr |= 0x01;
+			ret = try_address(adap, addr, retries);
+			if (ret!=1) {
+				printk("iic_doAddress: died at extended address code.\n");
+				return -EREMOTEIO;
+			}
+		}
+#endif
+	} else {
+
+		addr = ( msg->addr << 1 );
+
+#if 0
+		if (flags & I2C_M_RD )
+			addr |= 1;
+		if (flags & I2C_M_REV_DIR_ADDR )
+			addr ^= 1;
+#endif
+
+		if (iic_inw(adap, ITE_I2CSAR) != addr) {
+			iic_outw(adap, ITE_I2CSAR, addr);
+			ret = try_address(adap, addr, retries);
+			if (ret!=1) {
+				printk("iic_doAddress: died at address code.\n");
+				return -EREMOTEIO;
+			}
+		}
+
+  }
+
+	return 0;
+}
+
+
+/* Description: Prepares the controller for a transaction (clearing status
+ * registers, data buffers, etc), and then calls either iic_readbytes or
+ * iic_sendbytes to do the actual transaction.
+ *
+ * still to be done: Before we issue a transaction, we should
+ * verify that the bus is not busy or in some unknown state.
+ */
+static int iic_xfer(struct i2c_adapter *i2c_adap,
+		    struct i2c_msg msgs[], 
+		    int num)
+{
+	struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
+	struct i2c_msg *pmsg;
+	int i = 0;
+	int ret, timeout;
+    
+	pmsg = &msgs[i];
+
+	if(!pmsg->len) {
+		DEB2(printk("iic_xfer: read/write length is 0\n");)
+		return -EIO;
+	}
+	if(!(pmsg->flags & I2C_M_RD) && (!(pmsg->len)%2) ) {
+		DEB2(printk("iic_xfer: write buffer length is not odd\n");)
+		return -EIO; 
+	}
+
+	/* Wait for any pending transfers to complete */
+	timeout = wait_for_bb(adap);
+	if (timeout) {
+		DEB2(printk("iic_xfer: Timeout waiting for host not busy\n");)
+		return -EIO;
+	}
+
+	/* Flush FIFO */
+	iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
+
+	/* Load address */
+	ret = iic_doAddress(adap, pmsg, i2c_adap->retries);
+	if (ret)
+		return -EIO;
+
+#if 0
+	/* Combined transaction (read and write) */
+	if(num > 1) {
+           DEB2(printk("iic_xfer: Call combined transaction\n"));
+           ret = iic_combined_transaction(i2c_adap, msgs, num);
+  }
+#endif
+
+	DEB3(printk("iic_xfer: Msg %d, addr=0x%x, flags=0x%x, len=%d\n",
+		i, msgs[i].addr, msgs[i].flags, msgs[i].len);)
+
+	if(pmsg->flags & I2C_M_RD) 		/* Read */
+		ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, 0);
+	else {													/* Write */ 
+		udelay(1000);
+		ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len);
+	}
+
+	if (ret != pmsg->len)
+		DEB3(printk("iic_xfer: error or fail on read/write %d bytes.\n",ret)); 
+	else
+		DEB3(printk("iic_xfer: read/write %d bytes.\n",ret));
+
+	return ret;
+}
+
+
+/* Implements device specific ioctls.  Higher level ioctls can
+ * be found in i2c-core.c and are typical of any i2c controller (specifying
+ * slave address, timeouts, etc).  These ioctls take advantage of any hardware
+ * features built into the controller for which this algorithm-adapter set
+ * was written.  These ioctls allow you to take control of the data and clock
+ * lines and set the either high or low,
+ * similar to a GPIO pin.
+ */
+static int algo_control(struct i2c_adapter *adapter, 
+	unsigned int cmd, unsigned long arg)
+{
+
+  struct i2c_algo_iic_data *adap = adapter->algo_data;
+  struct i2c_iic_msg s_msg;
+  char *buf;
+	int ret;
+
+  if (cmd == I2C_SREAD) {
+		if(copy_from_user(&s_msg, (struct i2c_iic_msg *)arg, 
+				sizeof(struct i2c_iic_msg))) 
+			return -EFAULT;
+		buf = kmalloc(s_msg.len, GFP_KERNEL);
+		if (buf== NULL)
+			return -ENOMEM;
+
+		/* Flush FIFO */
+		iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
+
+		/* Load address */
+		iic_outw(adap, ITE_I2CSAR,s_msg.addr<<1);
+		iic_outw(adap, ITE_I2CSSAR,s_msg.waddr & 0xff);
+
+		ret = iic_readbytes(adapter, buf, s_msg.len, 1);
+		if (ret>=0) {
+			if(copy_to_user( s_msg.buf, buf, s_msg.len) ) 
+				ret = -EFAULT;
+		}
+		kfree(buf);
+	}
+	return 0;
+}
+
+
+static u32 iic_func(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR | 
+	       I2C_FUNC_PROTOCOL_MANGLING; 
+}
+
+/* -----exported algorithm data: -------------------------------------	*/
+
+static struct i2c_algorithm iic_algo = {
+	"ITE IIC algorithm",
+	I2C_ALGO_IIC,
+	iic_xfer,		/* master_xfer	*/
+	NULL,				/* smbus_xfer	*/
+	NULL,				/* slave_xmit		*/
+	NULL,				/* slave_recv		*/
+	algo_control,			/* ioctl		*/
+	iic_func,			/* functionality	*/
+};
+
+
+/* 
+ * registering functions to load algorithms at runtime 
+ */
+int i2c_iic_add_bus(struct i2c_adapter *adap)
+{
+	int i;
+	short status;
+	struct i2c_algo_iic_data *iic_adap = adap->algo_data;
+
+	if (iic_test) {
+		int ret = test_bus(iic_adap, adap->name);
+		if (ret<0)
+			return -ENODEV;
+	}
+
+	DEB2(printk("i2c-algo-ite: hw routines for %s registered.\n",
+	            adap->name));
+
+	/* register new adapter to i2c module... */
+
+	adap->id |= iic_algo.id;
+	adap->algo = &iic_algo;
+
+	adap->timeout = 100;	/* default values, should	*/
+	adap->retries = 3;		/* be replaced by defines	*/
+	adap->flags = 0;
+
+#ifdef MODULE
+	MOD_INC_USE_COUNT;
+#endif
+
+	i2c_add_adapter(adap);
+	iic_init(iic_adap);
+
+	/* scan bus */
+	/* By default scanning the bus is turned off. */
+	if (iic_scan) {
+		printk(KERN_INFO " i2c-algo-ite: scanning bus %s.\n",
+		       adap->name);
+		for (i = 0x00; i < 0xff; i+=2) {
+			iic_outw(iic_adap, ITE_I2CSAR, i);
+			iic_start(iic_adap);
+			if ( (wait_for_pin(iic_adap, &status) == 0) && 
+			    ((status & ITE_I2CHSR_DNE) == 0) ) { 
+				printk(KERN_INFO "\n(%02x)\n",i>>1); 
+			} else {
+				printk(KERN_INFO "."); 
+				iic_reset(iic_adap);
+			}
+			udelay(iic_adap->udelay);
+		}
+	}
+	return 0;
+}
+
+
+int i2c_iic_del_bus(struct i2c_adapter *adap)
+{
+	int res;
+	if ((res = i2c_del_adapter(adap)) < 0)
+		return res;
+	DEB2(printk("i2c-algo-ite: adapter unregistered: %s\n",adap->name));
+
+#ifdef MODULE
+	MOD_DEC_USE_COUNT;
+#endif
+	return 0;
+}
+
+
+int __init i2c_algo_iic_init (void)
+{
+	printk(KERN_INFO "ITE iic (i2c) algorithm module\n");
+	return 0;
+}
+
+
+void i2c_algo_iic_exit(void)
+{
+	return;
+}
+
+
+EXPORT_SYMBOL(i2c_iic_add_bus);
+EXPORT_SYMBOL(i2c_iic_del_bus);
+
+/* The MODULE_* macros resolve to nothing if MODULES is not defined
+ * when this file is compiled.
+ */
+MODULE_AUTHOR("MontaVista Software <www.mvista.com>");
+MODULE_DESCRIPTION("ITE iic algorithm");
+
+MODULE_PARM(iic_test, "i");
+MODULE_PARM(iic_scan, "i");
+MODULE_PARM(i2c_debug,"i");
+
+MODULE_PARM_DESC(iic_test, "Test if the I2C bus is available");
+MODULE_PARM_DESC(iic_scan, "Scan for active chips on the bus");
+MODULE_PARM_DESC(i2c_debug,
+        "debug level - 0 off; 1 normal; 2,3 more verbose; 9 iic-protocol");
+
+
+/* This function resolves to init_module (the function invoked when a module
+ * is loaded via insmod) when this file is compiled with MODULES defined.
+ * Otherwise (i.e. if you want this driver statically linked to the kernel),
+ * a pointer to this function is stored in a table and called
+ * during the intialization of the kernel (in do_basic_setup in /init/main.c) 
+ *
+ * All this functionality is complements of the macros defined in linux/init.h
+ */
+module_init(i2c_algo_iic_init);
+
+
+/* If MODULES is defined when this file is compiled, then this function will
+ * resolved to cleanup_module.
+ */
+module_exit(i2c_algo_iic_exit);
diff -urN linux-2.4.10-pre6/drivers/i2c/i2c-ite.h linux/drivers/i2c/i2c-ite.h
--- linux-2.4.10-pre6/drivers/i2c/i2c-ite.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/i2c/i2c-ite.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,117 @@
+/*
+   --------------------------------------------------------------------
+   i2c-ite.h: Global defines for the I2C controller on board the    
+                 ITE MIPS processor.                                
+   --------------------------------------------------------------------
+   Hai-Pao Fan, MontaVista Software, Inc.
+   hpfan@mvista.com or source@mvista.com
+
+   Copyright 2001 MontaVista Software Inc.
+
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+
+ */
+
+#ifndef I2C_ITE_H
+#define I2C_ITE_H 1
+
+#include <asm/it8172/it8172.h>
+
+/* I2C Registers */
+#define ITE_I2CHCR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x30
+#define ITE_I2CHSR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x34
+#define ITE_I2CSAR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x38
+#define ITE_I2CSSAR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x3c
+#define ITE_I2CCKCNT	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x48
+#define ITE_I2CSHDR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x4c
+#define ITE_I2CRSUR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x50
+#define ITE_I2CPSUR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x54
+
+#define ITE_I2CFDR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x70
+#define ITE_I2CFBCR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x74
+#define ITE_I2CFCR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x78
+#define ITE_I2CFSR	IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x7c
+
+
+/* Host Control Register ITE_I2CHCR */
+#define	ITE_I2CHCR_HCE	0x01	/* Enable I2C Host Controller */
+#define	ITE_I2CHCR_IE	0x02	/* Enable the interrupt after completing
+				   the current transaction */
+#define ITE_I2CHCR_CP_W	0x00	/* bit2-4 000 - Write */
+#define	ITE_I2CHCR_CP_R	0x08	/*	  010 - Current address read */
+#define	ITE_I2CHCR_CP_S	0x10	/*	  100 - Sequential read */
+#define ITE_I2CHCR_ST	0x20	/* Initiates the I2C host controller to execute
+				   the command and send the data programmed in
+				   all required registers to I2C bus */
+#define ITE_CMD		ITE_I2CHCR_HCE | ITE_I2CHCR_IE | ITE_I2CHCR_ST
+#define ITE_WRITE	ITE_CMD | ITE_I2CHCR_CP_W
+#define ITE_READ	ITE_CMD | ITE_I2CHCR_CP_R
+#define ITE_SREAD	ITE_CMD | ITE_I2CHCR_CP_S
+
+/* Host Status Register ITE_I2CHSR */
+#define	ITE_I2CHSR_DB	0x01	/* Device is busy, receives NACK response except
+				   in the first and last bytes */
+#define	ITE_I2CHSR_DNE	0x02	/* Target address on I2C bus does not exist */
+#define	ITE_I2CHSR_TDI	0x04	/* R/W Transaction on I2C bus was completed */
+#define	ITE_I2CHSR_HB	0x08	/* Host controller is processing transactions */
+#define	ITE_I2CHSR_FER	0x10	/* Error occurs in the FIFO */
+
+/* Slave Address Register ITE_I2CSAR */
+#define	ITE_I2CSAR_SA_MASK	0xfe	/* Target I2C device address */
+#define	ITE_I2CSAR_ASO		0x0100	/* Output 1/0 to I2CAS port when the
+					   next slave address is addressed */
+
+/* Slave Sub-address Register ITE_I2CSSAR */
+#define	ITE_I2CSSAR_SUBA_MASK	0xff	/* Target I2C device sub-address */
+
+/* Clock Counter Register ITE_I2CCKCNT */
+#define	ITE_I2CCKCNT_STOP	0x00	/* stop I2C clock */
+#define	ITE_I2CCKCNT_HPCC_MASK	0x7f	/* SCL high period counter */
+#define	ITE_I2CCKCNT_LPCC_MASK	0x7f00	/* SCL low period counter */
+
+/* START Hold Time Register ITE_I2CSHDR */
+/* value is counted based on 16 MHz internal clock */
+#define ITE_I2CSHDR_FM	0x0a	/* START condition at fast mode */
+#define	ITE_I2CSHDR_SM	0x47	/* START contition at standard mode */
+
+/* (Repeated) START Setup Time Register ITE_I2CRSUR */
+/* value is counted based on 16 MHz internal clock */
+#define	ITE_I2CRSUR_FM	0x0a	/* repeated START condition at fast mode */
+#define	ITE_I2CRSUR_SM	0x50	/* repeated START condition at standard mode */
+
+/* STOP setup Time Register ITE_I2CPSUR */
+
+/* FIFO Data Register ITE_I2CFDR */
+#define	ITE_I2CFDR_MASK		0xff
+
+/* FIFO Byte Count Register ITE_I2CFBCR */
+#define ITE_I2CFBCR_MASK	0x3f
+
+/* FIFO Control Register ITE_I2CFCR */
+#define	ITE_I2CFCR_FLUSH	0x01	/* Flush FIFO and reset the FIFO point
+					   and I2CFSR */
+/* FIFO Status Register ITE_I2CFSR */
+#define	ITE_I2CFSR_FO	0x01	/* FIFO is overrun when write */
+#define	ITE_I2CFSR_FU	0x02	/* FIFO is underrun when read */
+#define	ITE_I2CFSR_FF	0x04	/* FIFO is full when write */
+#define	ITE_I2CFSR_FE	0x08	/* FIFO is empty when read */
+
+#endif  /* I2C_ITE_H */
diff -urN linux-2.4.10-pre6/drivers/i2o/i2o_block.c linux/drivers/i2o/i2o_block.c
--- linux-2.4.10-pre6/drivers/i2o/i2o_block.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/i2o/i2o_block.c	Mon Dec  3 23:08:46 2001
@@ -1854,16 +1854,14 @@
 
 static struct gendisk i2ob_gendisk = 
 {
-	MAJOR_NR,
-	"i2o/hd",
-	4,
-	1<<4,
-	i2ob,
-	i2ob_sizes,
-	MAX_I2OB,
-	NULL,
-	NULL,
-	&i2ob_fops,
+	major:		MAJOR_NR,
+	major_name:	"i2o/hd",
+	minor_shift:	4,
+	max_p:		1<<4,
+	part:		i2ob,
+	sizes:		i2ob_sizes,
+	nr_real:	MAX_I2OB,
+	fops:		&i2ob_fops,
 };
 
 
diff -urN linux-2.4.10-pre6/drivers/ide/amd7409.c linux/drivers/ide/amd7409.c
--- linux-2.4.10-pre6/drivers/ide/amd7409.c	Sat May 19 17:43:06 2001
+++ linux/drivers/ide/amd7409.c	Wed Dec 31 16:00:00 1969
@@ -1,471 +0,0 @@
-/*
- * linux/drivers/ide/amd7409.c		Version 0.05	June 9, 2000
- *
- * Copyright (C) 1999-2000		Andre Hedrick <andre@linux-ide.org>
- * May be copied or modified under the terms of the GNU General Public License
- *
- */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/timer.h>
-#include <linux/mm.h>
-#include <linux/ioport.h>
-#include <linux/blkdev.h>
-#include <linux/hdreg.h>
-
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-
-#include "ide_modes.h"
-
-#define DISPLAY_VIPER_TIMINGS
-
-#if defined(DISPLAY_VIPER_TIMINGS) && defined(CONFIG_PROC_FS)
-#include <linux/stat.h>
-#include <linux/proc_fs.h>
-
-static int amd7409_get_info(char *, char **, off_t, int);
-extern int (*amd7409_display_info)(char *, char **, off_t, int); /* ide-proc.c */
-extern char *ide_media_verbose(ide_drive_t *);
-static struct pci_dev *bmide_dev;
-
-static int amd7409_get_info (char *buffer, char **addr, off_t offset, int count)
-{
-	char *p = buffer;
-	u32 bibma = pci_resource_start(bmide_dev, 4);
-	u8 c0 = 0, c1 = 0;
-
-	/*
-	 * at that point bibma+0x2 et bibma+0xa are byte registers
-	 * to investigate:
-	 */
-	c0 = inb_p((unsigned short)bibma + 0x02);
-	c1 = inb_p((unsigned short)bibma + 0x0a);
-
-	p += sprintf(p, "\n                                AMD 7409 VIPER Chipset.\n");
-	p += sprintf(p, "--------------- Primary Channel ---------------- Secondary Channel -------------\n");
-	p += sprintf(p, "                %sabled                         %sabled\n",
-			(c0&0x80) ? "dis" : " en",
-			(c1&0x80) ? "dis" : " en");
-	p += sprintf(p, "--------------- drive0 --------- drive1 -------- drive0 ---------- drive1 ------\n");
-	p += sprintf(p, "DMA enabled:    %s              %s             %s               %s\n",
-			(c0&0x20) ? "yes" : "no ", (c0&0x40) ? "yes" : "no ",
-			(c1&0x20) ? "yes" : "no ", (c1&0x40) ? "yes" : "no " );
-	p += sprintf(p, "UDMA\n");
-	p += sprintf(p, "DMA\n");
-	p += sprintf(p, "PIO\n");
-
-	return p-buffer;	/* => must be less than 4k! */
-}
-#endif  /* defined(DISPLAY_VIPER_TIMINGS) && defined(CONFIG_PROC_FS) */
-
-byte amd7409_proc = 0;
-
-extern char *ide_xfer_verbose (byte xfer_rate);
-
-static unsigned int amd7409_swdma_check (struct pci_dev *dev)
-{
-	unsigned int class_rev;
-	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
-	class_rev &= 0xff;
-	return ((int) (class_rev >= 7) ? 1 : 0);
-}
-
-static int amd7409_swdma_error(ide_drive_t *drive)
-{
-	printk("%s: single-word DMA not support (revision < C4)\n", drive->name);
-	return 0;
-}
-
-/*
- * Here is where all the hard work goes to program the chipset.
- *
- */
-static int amd7409_tune_chipset (ide_drive_t *drive, byte speed)
-{
-	ide_hwif_t *hwif	= HWIF(drive);
-	struct pci_dev *dev	= hwif->pci_dev;
-	int err			= 0;
-	byte unit		= (drive->select.b.unit & 0x01);
-#ifdef CONFIG_BLK_DEV_IDEDMA
-	unsigned long dma_base	= hwif->dma_base;
-#endif /* CONFIG_BLK_DEV_IDEDMA */
-	byte drive_pci		= 0x00;
-	byte drive_pci2		= 0x00;
-	byte ultra_timing	= 0x00;
-	byte dma_pio_timing	= 0x00;
-	byte pio_timing		= 0x00;
-
-        switch (drive->dn) {
-		case 0: drive_pci = 0x53; drive_pci2 = 0x4b; break;
-		case 1: drive_pci = 0x52; drive_pci2 = 0x4a; break;
-		case 2: drive_pci = 0x51; drive_pci2 = 0x49; break;
-		case 3: drive_pci = 0x50; drive_pci2 = 0x48; break;
-		default:
-                        return -1;
-        }
-
-	pci_read_config_byte(dev, drive_pci, &ultra_timing);
-	pci_read_config_byte(dev, drive_pci2, &dma_pio_timing);
-	pci_read_config_byte(dev, 0x4c, &pio_timing);
-
-#ifdef DEBUG
-	printk("%s: UDMA 0x%02x DMAPIO 0x%02x PIO 0x%02x ",
-		drive->name, ultra_timing, dma_pio_timing, pio_timing);
-#endif
-
-	ultra_timing &= ~0xC7;
-	dma_pio_timing &= ~0xFF;
-	pio_timing &= ~(0x03 << drive->dn);
-
-#ifdef DEBUG
-	printk(":: UDMA 0x%02x DMAPIO 0x%02x PIO 0x%02x ",
-		ultra_timing, dma_pio_timing, pio_timing);
-#endif
-
-	switch(speed) {
-#ifdef CONFIG_BLK_DEV_IDEDMA
-		case XFER_UDMA_4:
-			ultra_timing |= 0x45;
-			dma_pio_timing |= 0x20;
-			break;
-		case XFER_UDMA_3:
-			ultra_timing |= 0x44;
-			dma_pio_timing |= 0x20;
-			break;
-		case XFER_UDMA_2:
-			ultra_timing |= 0x40;
-			dma_pio_timing |= 0x20;
-			break;
-		case XFER_UDMA_1:
-			ultra_timing |= 0x41;
-			dma_pio_timing |= 0x20;
-			break;
-		case XFER_UDMA_0:
-			ultra_timing |= 0x42;
-			dma_pio_timing |= 0x20;
-			break;
-		case XFER_MW_DMA_2:
-			dma_pio_timing |= 0x20;
-			break;
-		case XFER_MW_DMA_1:
-			dma_pio_timing |= 0x21;
-			break;
-		case XFER_MW_DMA_0:
-			dma_pio_timing |= 0x77;
-			break;
-		case XFER_SW_DMA_2:
-			if (!amd7409_swdma_check(dev))
-				return amd7409_swdma_error(drive);
-			dma_pio_timing |= 0x42;
-			break;
-		case XFER_SW_DMA_1:
-			if (!amd7409_swdma_check(dev))
-				return amd7409_swdma_error(drive);
-			dma_pio_timing |= 0x65;
-			break;
-		case XFER_SW_DMA_0:
-			if (!amd7409_swdma_check(dev))
-				return amd7409_swdma_error(drive);
-			dma_pio_timing |= 0xA8;
-			break;
-#endif /* CONFIG_BLK_DEV_IDEDMA */
-		case XFER_PIO_4:
-			dma_pio_timing |= 0x20;
-			break;
-		case XFER_PIO_3:
-			dma_pio_timing |= 0x22;
-			break;
-		case XFER_PIO_2:
-			dma_pio_timing |= 0x42;
-			break;
-		case XFER_PIO_1:
-			dma_pio_timing |= 0x65;
-			break;
-		case XFER_PIO_0:
-		default:
-			dma_pio_timing |= 0xA8;
-			break;
-        }
-
-	pio_timing |= (0x03 << drive->dn);
-
-	if (!drive->init_speed)
-		drive->init_speed = speed;
-
-#ifdef CONFIG_BLK_DEV_IDEDMA
-	pci_write_config_byte(dev, drive_pci, ultra_timing);
-#endif /* CONFIG_BLK_DEV_IDEDMA */
-	pci_write_config_byte(dev, drive_pci2, dma_pio_timing);
-	pci_write_config_byte(dev, 0x4c, pio_timing);
-
-#ifdef DEBUG
-	printk(":: UDMA 0x%02x DMAPIO 0x%02x PIO 0x%02x\n",
-		ultra_timing, dma_pio_timing, pio_timing);
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDEDMA
-	if (speed > XFER_PIO_4) {
-		outb(inb(dma_base+2)|(1<<(5+unit)), dma_base+2);
-	} else {
-		outb(inb(dma_base+2) & ~(1<<(5+unit)), dma_base+2);
-	}
-#endif /* CONFIG_BLK_DEV_IDEDMA */
-
-	err = ide_config_drive_speed(drive, speed);
-	drive->current_speed = speed;
-	return (err);
-}
-
-static void config_chipset_for_pio (ide_drive_t *drive)
-{
-	unsigned short eide_pio_timing[6] = {960, 480, 240, 180, 120, 90};
-	unsigned short xfer_pio	= drive->id->eide_pio_modes;
-	byte			timing, speed, pio;
-
-	pio = ide_get_best_pio_mode(drive, 255, 5, NULL);
-
-	if (xfer_pio> 4)
-		xfer_pio = 0;
-
-	if (drive->id->eide_pio_iordy > 0) {
-		for (xfer_pio = 5;
-			xfer_pio>0 &&
-			drive->id->eide_pio_iordy>eide_pio_timing[xfer_pio];
-			xfer_pio--);
-	} else {
-		xfer_pio = (drive->id->eide_pio_modes & 4) ? 0x05 :
-			   (drive->id->eide_pio_modes & 2) ? 0x04 :
-			   (drive->id->eide_pio_modes & 1) ? 0x03 :
-			   (drive->id->tPIO & 2) ? 0x02 :
-			   (drive->id->tPIO & 1) ? 0x01 : xfer_pio;
-	}
-
-	timing = (xfer_pio >= pio) ? xfer_pio : pio;
-
-	switch(timing) {
-		case 4: speed = XFER_PIO_4;break;
-		case 3: speed = XFER_PIO_3;break;
-		case 2: speed = XFER_PIO_2;break;
-		case 1: speed = XFER_PIO_1;break;
-		default:
-			speed = (!drive->id->tPIO) ? XFER_PIO_0 : XFER_PIO_SLOW;
-			break;
-	}
-	(void) amd7409_tune_chipset(drive, speed);
-	drive->current_speed = speed;
-}
-
-static void amd7409_tune_drive (ide_drive_t *drive, byte pio)
-{
-	byte speed;
-	switch(pio) {
-		case 4:		speed = XFER_PIO_4;break;
-		case 3:		speed = XFER_PIO_3;break;
-		case 2:		speed = XFER_PIO_2;break;
-		case 1:		speed = XFER_PIO_1;break;
-		default:	speed = XFER_PIO_0;break;
-	}
-	(void) amd7409_tune_chipset(drive, speed);
-}
-
-#ifdef CONFIG_BLK_DEV_IDEDMA
-/*
- * This allows the configuration of ide_pci chipset registers
- * for cards that learn about the drive's UDMA, DMA, PIO capabilities
- * after the drive is reported by the OS.
- */
-static int config_chipset_for_dma (ide_drive_t *drive)
-{
-	struct hd_driveid *id	= drive->id;
-	byte udma_66		= eighty_ninty_three(drive);
-	byte udma_100		= 0;
-	byte speed		= 0x00;
-	int  rval;
-
-	if ((id->dma_ultra & 0x0020) && (udma_66)&& (udma_100)) {
-		speed = XFER_UDMA_5;
-	} else if ((id->dma_ultra & 0x0010) && (udma_66)) {
-		speed = XFER_UDMA_4;
-	} else if ((id->dma_ultra & 0x0008) && (udma_66)) {
-		speed = XFER_UDMA_3;
-	} else if (id->dma_ultra & 0x0004) {
-		speed = XFER_UDMA_2;
-	} else if (id->dma_ultra & 0x0002) {
-		speed = XFER_UDMA_1;
-	} else if (id->dma_ultra & 0x0001) {
-		speed = XFER_UDMA_0;
-	} else if (id->dma_mword & 0x0004) {
-		speed = XFER_MW_DMA_2;
-	} else if (id->dma_mword & 0x0002) {
-		speed = XFER_MW_DMA_1;
-	} else if (id->dma_mword & 0x0001) {
-		speed = XFER_MW_DMA_0;
-	} else {
-		return ((int) ide_dma_off_quietly);
-	}
-
-	(void) amd7409_tune_chipset(drive, speed);
-
-	rval = (int)(	((id->dma_ultra >> 11) & 3) ? ide_dma_on :
-			((id->dma_ultra >> 8) & 7) ? ide_dma_on :
-			((id->dma_mword >> 8) & 7) ? ide_dma_on :
-						     ide_dma_off_quietly);
-
-	return rval;
-}
-
-
-
-static int config_drive_xfer_rate (ide_drive_t *drive)
-{
-	struct hd_driveid *id = drive->id;
-	ide_dma_action_t dma_func = ide_dma_on;
-
-	if (id && (id->capability & 1) && HWIF(drive)->autodma) {
-		/* Consult the list of known "bad" drives */
-		if (ide_dmaproc(ide_dma_bad_drive, drive)) {
-			dma_func = ide_dma_off;
-			goto fast_ata_pio;
-		}
-		dma_func = ide_dma_off_quietly;
-		if (id->field_valid & 4) {
-			if (id->dma_ultra & 0x002F) {
-				/* Force if Capable UltraDMA */
-				dma_func = config_chipset_for_dma(drive);
-				if ((id->field_valid & 2) &&
-				    (dma_func != ide_dma_on))
-					goto try_dma_modes;
-			}
-		} else if (id->field_valid & 2) {
-try_dma_modes:
-			if ((id->dma_mword & 0x0007) ||
-			    ((id->dma_1word & 0x007) &&
-			     (amd7409_swdma_check(HWIF(drive)->pci_dev)))) {
-				/* Force if Capable regular DMA modes */
-				dma_func = config_chipset_for_dma(drive);
-				if (dma_func != ide_dma_on)
-					goto no_dma_set;
-			}
-			
-		} else if (ide_dmaproc(ide_dma_good_drive, drive)) {
-			if (id->eide_dma_time > 150) {
-				goto no_dma_set;
-			}
-			/* Consult the list of known "good" drives */
-			dma_func = config_chipset_for_dma(drive);
-			if (dma_func != ide_dma_on)
-				goto no_dma_set;
-		} else {
-			goto fast_ata_pio;
-		}
-	} else if ((id->capability & 8) || (id->field_valid & 2)) {
-fast_ata_pio:
-		dma_func = ide_dma_off_quietly;
-no_dma_set:
-
-		config_chipset_for_pio(drive);
-	}
-	return HWIF(drive)->dmaproc(dma_func, drive);
-}
-
-/*
- * amd7409_dmaproc() initiates/aborts (U)DMA read/write operations on a drive.
- */
-
-int amd7409_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
-{
-	switch (func) {
-		case ide_dma_check:
-			return config_drive_xfer_rate(drive);
-		default:
-			break;
-	}
-	return ide_dmaproc(func, drive);	/* use standard DMA stuff */
-}
-#endif /* CONFIG_BLK_DEV_IDEDMA */
-
-unsigned int __init pci_init_amd7409 (struct pci_dev *dev, const char *name)
-{
-	unsigned long fixdma_base = pci_resource_start(dev, 4);
-
-#ifdef CONFIG_BLK_DEV_IDEDMA
-	if (!amd7409_swdma_check(dev))
-		printk("%s: disabling single-word DMA support (revision < C4)\n", name);
-#endif /* CONFIG_BLK_DEV_IDEDMA */
-
-	if (!fixdma_base) {
-		/*
-		 *
-		 */
-	} else {
-		/*
-		 * enable DMA capable bit, and "not" simplex only
-		 */
-		outb(inb(fixdma_base+2) & 0x60, fixdma_base+2);
-
-		if (inb(fixdma_base+2) & 0x80)
-			printk("%s: simplex device: DMA will fail!!\n", name);
-	}
-#if defined(DISPLAY_VIPER_TIMINGS) && defined(CONFIG_PROC_FS)
-	if (!amd7409_proc) {
-		amd7409_proc = 1;
-		bmide_dev = dev;
-		amd7409_display_info = &amd7409_get_info;
-	}
-#endif /* DISPLAY_VIPER_TIMINGS && CONFIG_PROC_FS */
-
-	return 0;
-}
-
-unsigned int __init ata66_amd7409 (ide_hwif_t *hwif)
-{
-#ifdef CONFIG_AMD7409_OVERRIDE
-	byte ata66 = 1;
-#else
-	byte ata66 = 0;
-#endif /* CONFIG_AMD7409_OVERRIDE */
-
-#if 0
-	pci_read_config_byte(hwif->pci_dev, 0x48, &ata66);
-	return ((ata66 & 0x02) ? 0 : 1);
-#endif
-	return ata66;
-}
-
-void __init ide_init_amd7409 (ide_hwif_t *hwif)
-{
-	hwif->tuneproc = &amd7409_tune_drive;
-	hwif->speedproc = &amd7409_tune_chipset;
-
-#ifndef CONFIG_BLK_DEV_IDEDMA
-	hwif->drives[0].autotune = 1;
-	hwif->drives[1].autotune = 1;
-	hwif->autodma = 0;
-	return;
-#else
-
-	if (hwif->dma_base) {
-		hwif->dmaproc = &amd7409_dmaproc;
-		if (!noautodma)
-			hwif->autodma = 1;
-	} else {
-		hwif->autodma = 0;
-		hwif->drives[0].autotune = 1;
-		hwif->drives[1].autotune = 1;
-	}
-#endif /* CONFIG_BLK_DEV_IDEDMA */
-}
-
-void __init ide_dmacapable_amd7409 (ide_hwif_t *hwif, unsigned long dmabase)
-{
-	ide_setup_dma(hwif, dmabase, 8);
-}
diff -urN linux-2.4.10-pre6/drivers/ide/hd.c linux/drivers/ide/hd.c
--- linux-2.4.10-pre6/drivers/ide/hd.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/ide/hd.c	Mon Dec  3 23:08:46 2001
@@ -688,16 +688,13 @@
 extern struct block_device_operations hd_fops;
 
 static struct gendisk hd_gendisk = {
-	MAJOR_NR,	/* Major number */	
-	"hd",		/* Major name */
-	6,		/* Bits to shift to get real from partition */
-	1 << 6,		/* Number of partitions per real */
-	hd,		/* hd struct */
-	hd_sizes,	/* block sizes */
-	0,		/* number */
-	NULL,		/* internal use, not presently used */
-	NULL,		/* next */
-	&hd_fops,       /* file operations */
+	major:		MAJOR_NR,
+	major_name:	"hd",
+	minor_shift:	6,
+	max_p:		1 << 6,
+	part:		hd,
+	sizes:		hd_sizes,
+	fops:		&hd_fops,
 };
 	
 static void hd_interrupt(int irq, void *dev_id, struct pt_regs *regs)
@@ -842,7 +839,7 @@
 	}
 	blk_init_queue(BLK_DEFAULT_QUEUE(MAJOR_NR), DEVICE_REQUEST);
 	read_ahead[MAJOR_NR] = 8;		/* 8 sector (4kB) read-ahead */
-	add_gendisk(&hd_gendisk, MAJOR_NR);
+	add_gendisk(&hd_gendisk);
 	init_timer(&device_timer);
 	device_timer.function = hd_times_out;
 	hd_geninit();
diff -urN linux-2.4.10-pre6/drivers/ide/ide-dma.c linux/drivers/ide/ide-dma.c
--- linux-2.4.10-pre6/drivers/ide/ide-dma.c	Mon Aug 13 14:56:19 2001
+++ linux/drivers/ide/ide-dma.c	Mon Dec  3 23:08:46 2001
@@ -130,10 +130,30 @@
 	{ "WDC AC23200L"	,	"21.10N21"	},
 	{ "Compaq CRD-8241B"	,	"ALL"		},
 	{ "CRD-8400B"		,	"ALL"		},
+	{ "CRD-8480B",			"ALL"		},
+	{ "CRD-8480C",			"ALL"		},
+	{ "CRD-8482B",			"ALL"		},
+ 	{ "CRD-84"		,	"ALL"		},
+	{ "SanDisk SDP3B"	,	"ALL"		},
+	{ "SanDisk SDP3B-64"	,	"ALL"		},
+	{ "SANYO CD-ROM CRD"	,	"ALL"		},
+	{ "HITACHI CDR-8"	,	"ALL"		},
+	{ "HITACHI CDR-8335"	,	"ALL"		},
+	{ "HITACHI CDR-8435"	,	"ALL"		},
+	{ "Toshiba CD-ROM XM-6202B"	,	"ALL"		},
+	{ "CD-532E-A"		,	"ALL"		},
+	{ "E-IDE CD-ROM CR-840",	"ALL"		},
+	{ "CD-ROM Drive/F5A",	"ALL"		},
+	{ "RICOH CD-R/RW MP7083A",	"ALL"		},
+	{ "WPI CDD-820",		"ALL"		},
+	{ "SAMSUNG CD-ROM SC-148C",	"ALL"		},
+	{ "SAMSUNG CD-ROM SC-148F",	"ALL"		},
+	{ "SAMSUNG CD-ROM SC",	"ALL"		},
 	{ "SanDisk SDP3B-64"	,	"ALL"		},
 	{ "SAMSUNG CD-ROM SN-124",	"ALL"		},
 	{ "PLEXTOR CD-R PX-W8432T",	"ALL"		},
 	{ "ATAPI CD-ROM DRIVE 40X MAXIMUM",	"ALL"		},
+	{ "_NEC DV5800A",               "ALL"           },  
 	{ 0			,	0		}
 
 };
diff -urN linux-2.4.10-pre6/drivers/ide/ide-pci.c linux/drivers/ide/ide-pci.c
--- linux-2.4.10-pre6/drivers/ide/ide-pci.c	Mon Aug 13 14:56:19 2001
+++ linux/drivers/ide/ide-pci.c	Mon Dec  3 23:08:46 2001
@@ -38,6 +38,7 @@
 #define DEVID_PIIX4U3	((ide_pci_devid_t){PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_82801BA_9})
 #define DEVID_PIIX4U4	((ide_pci_devid_t){PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_82801BA_8})
 #define DEVID_VIA_IDE	((ide_pci_devid_t){PCI_VENDOR_ID_VIA,     PCI_DEVICE_ID_VIA_82C561})
+#define DEVID_MR_IDE	((ide_pci_devid_t){PCI_VENDOR_ID_VIA,     PCI_DEVICE_ID_VIA_82C576_1})
 #define DEVID_VP_IDE	((ide_pci_devid_t){PCI_VENDOR_ID_VIA,     PCI_DEVICE_ID_VIA_82C586_1})
 #define DEVID_PDC20246	((ide_pci_devid_t){PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20246})
 #define DEVID_PDC20262	((ide_pci_devid_t){PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20262})
@@ -385,6 +386,7 @@
 	{DEVID_PIIX4U3,	"PIIX4",	PCI_PIIX,	ATA66_PIIX,	INIT_PIIX,	NULL,		{{0x41,0x80,0x80}, {0x43,0x80,0x80}},	ON_BOARD,	0 },
 	{DEVID_PIIX4U4, "PIIX4",	PCI_PIIX,	ATA66_PIIX,	INIT_PIIX,	NULL,		{{0x41,0x80,0x80}, {0x43,0x80,0x80}},	ON_BOARD,	0 },
 	{DEVID_VIA_IDE,	"VIA_IDE",	NULL,		NULL,		NULL,		NULL,		{{0x00,0x00,0x00}, {0x00,0x00,0x00}},	ON_BOARD,	0 },
+	{DEVID_MR_IDE,	"VP_IDE",	PCI_VIA82CXXX,	ATA66_VIA82CXXX,INIT_VIA82CXXX,	DMA_VIA82CXXX,	{{0x40,0x02,0x02}, {0x40,0x01,0x01}}, 	ON_BOARD,	0 },
 	{DEVID_VP_IDE,	"VP_IDE",	PCI_VIA82CXXX,	ATA66_VIA82CXXX,INIT_VIA82CXXX,	DMA_VIA82CXXX,	{{0x40,0x02,0x02}, {0x40,0x01,0x01}}, 	ON_BOARD,	0 },
 #ifdef CONFIG_PDC202XX_FORCE
         {DEVID_PDC20246,"PDC20246",	PCI_PDC202XX,	NULL,		INIT_PDC202XX,	NULL,		{{0x00,0x00,0x00}, {0x00,0x00,0x00}},	OFF_BOARD,	16 },
@@ -758,6 +760,7 @@
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_PIIX4NX) ||
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_HPT34X)  ||
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_VIA_IDE) ||
+		    IDE_PCI_DEVID_EQ(d->devid, DEVID_MR_IDE)  ||
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_VP_IDE))
 			autodma = 0;
 		if (autodma)
@@ -767,6 +770,7 @@
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_PDC20265) ||
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_PDC20267) ||
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_PDC20268) ||
+		    IDE_PCI_DEVID_EQ(d->devid, DEVID_PDC20268R) ||
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_AEC6210) ||
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_AEC6260) ||
 		    IDE_PCI_DEVID_EQ(d->devid, DEVID_AEC6260R) ||
diff -urN linux-2.4.10-pre6/drivers/ide/serverworks.c linux/drivers/ide/serverworks.c
--- linux-2.4.10-pre6/drivers/ide/serverworks.c	Mon Aug 13 14:56:19 2001
+++ linux/drivers/ide/serverworks.c	Mon Dec  3 23:08:46 2001
@@ -544,8 +544,33 @@
 	return 0;
 }
 
+/* On Dell PowerEdge servers with a CSB5, the top two bits of the subsystem
+ * device ID indicate presence of an 80-pin cable.
+ * Bit 15 clear = secondary IDE channel does not have 80-pin cable.
+ * Bit 15 set   = secondary IDE channel has 80-pin cable.
+ * Bit 14 clear = primary IDE channel does not have 80-pin cable.
+ * Bit 14 set   = primary IDE channel has 80-pin cable.
+ */
+
+static unsigned int __init ata66_svwks_dell (ide_hwif_t *hwif)
+{
+	struct pci_dev *dev	= hwif->pci_dev;
+	if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL        &&
+	    dev->vendor           == PCI_VENDOR_ID_SERVERWORKS &&
+	    dev->device           == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
+		return ((1 << (hwif->channel + 14)) &
+			dev->subsystem_device) ? 1 : 0;
+
+	return 0;
+
+}
+
 unsigned int __init ata66_svwks (ide_hwif_t *hwif)
 {
+	struct pci_dev *dev	= hwif->pci_dev;
+	if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL)
+		return ata66_svwks_dell (hwif);
+	
 	return 0;
 }
 
diff -urN linux-2.4.10-pre6/drivers/isdn/Config.in linux/drivers/isdn/Config.in
--- linux-2.4.10-pre6/drivers/isdn/Config.in	Mon Aug 13 16:35:28 2001
+++ linux/drivers/isdn/Config.in	Mon Dec  3 23:08:46 2001
@@ -76,8 +76,11 @@
 	 bool '  Am7930' CONFIG_HISAX_AMD7930
       fi
    fi
+   bool '  HiSax debugging' CONFIG_HISAX_DEBUG
+
    dep_tristate 'Sedlbauer PCMCIA cards' CONFIG_HISAX_SEDLBAUER_CS $CONFIG_PCMCIA
    dep_tristate 'ELSA PCMCIA MicroLink cards' CONFIG_HISAX_ELSA_CS $CONFIG_PCMCIA
+   dep_tristate 'ST5481 USB ISDN modem (EXPERIMENTAL)' CONFIG_HISAX_ST5481 $CONFIG_HISAX $CONFIG_USB $CONFIG_EXPERIMENTAL
 fi
 endmenu
 
diff -urN linux-2.4.10-pre6/drivers/isdn/act2000/act2000_isa.c linux/drivers/isdn/act2000/act2000_isa.c
--- linux-2.4.10-pre6/drivers/isdn/act2000/act2000_isa.c	Mon Aug 13 16:35:29 2001
+++ linux/drivers/isdn/act2000/act2000_isa.c	Mon Dec  3 23:08:46 2001
@@ -418,7 +418,7 @@
 int
 act2000_isa_download(act2000_card * card, act2000_ddef * cb)
 {
-        int length;
+        unsigned int length;
         int ret;
         int l;
         int c;
@@ -431,9 +431,8 @@
         if (!act2000_isa_reset(card->port))
                 return -ENXIO;
         act2000_isa_delay(HZ / 2);
-        if ((ret = verify_area(VERIFY_READ, (void *) cb, sizeof(cblock))))
-                return ret;
-        copy_from_user(&cblock, (char *) cb, sizeof(cblock));
+        if(copy_from_user(&cblock, (char *) cb, sizeof(cblock)))
+        	return -EFAULT;
         length = cblock.length;
         p = cblock.buffer;
         if ((ret = verify_area(VERIFY_READ, (void *) p, length)))
diff -urN linux-2.4.10-pre6/drivers/isdn/eicon/idi.c linux/drivers/isdn/eicon/idi.c
--- linux-2.4.10-pre6/drivers/isdn/eicon/idi.c	Fri Mar  2 11:12:08 2001
+++ linux/drivers/isdn/eicon/idi.c	Mon Dec  3 23:08:46 2001
@@ -431,7 +431,9 @@
     i = this->XCurrent;
     X = PTR_X(a,this);
     while(i<this->XNum && length<270) {
-      clength = MIN((word)(270-length),X[i].PLength-this->XOffset);
+      clength = (word)(270-length);
+      if (clength > X[i].PLength-this->XOffset)
+	      clength = X[i].PLength-this->XOffset;
       a->ram_out_buffer(a,
                         &ReqOut->XBuffer.P[length],
                         PTR_P(a,this,&X[i].P[this->XOffset]),
@@ -837,8 +839,9 @@
         this->ROffset = 0;
         this->RCurrent++;
       }
-      clength = MIN(a->ram_inw(a, &RBuffer->length)-offset,
-                    R[this->RCurrent].PLength-this->ROffset);
+      clength = a->ram_inw(a, &RBuffer->length)-offset;
+      if (clength > R[this->RCurrent].PLength-this->ROffset)
+	      clength = R[this->RCurrent].PLength-this->ROffset;
       if(R[this->RCurrent].P) {
         a->ram_in_buffer(a,
                          &RBuffer->P[offset],
diff -urN linux-2.4.10-pre6/drivers/isdn/eicon/kprintf.c linux/drivers/isdn/eicon/kprintf.c
--- linux-2.4.10-pre6/drivers/isdn/eicon/kprintf.c	Sun Aug 12 11:16:18 2001
+++ linux/drivers/isdn/eicon/kprintf.c	Mon Dec  3 23:08:46 2001
@@ -30,8 +30,6 @@
 #include "eicon.h"
 #include "sys.h"
 #include <stdarg.h>
-#undef MAX
-#undef MIN
 
 #include "divas.h"
 #include "divalog.h"
diff -urN linux-2.4.10-pre6/drivers/isdn/eicon/pc.h linux/drivers/isdn/eicon/pc.h
--- linux-2.4.10-pre6/drivers/isdn/eicon/pc.h	Fri Mar  2 11:12:08 2001
+++ linux/drivers/isdn/eicon/pc.h	Mon Dec  3 23:08:46 2001
@@ -29,12 +29,6 @@
 #define byte unsigned char
 #define word unsigned short
 #define dword unsigned long
-#if !defined(MIN)
-#define MIN(a,b) ((a)>(b) ? (b) : (a))
-#endif
-#if !defined(MAX)
-#define MAX(a,b) ((a)>(b) ? (a) : (b))
-#endif
 
 /*------------------------------------------------------------------*/
 /* buffer definition                                                */
diff -urN linux-2.4.10-pre6/drivers/isdn/eicon/sys.h linux/drivers/isdn/eicon/sys.h
--- linux-2.4.10-pre6/drivers/isdn/eicon/sys.h	Fri Mar  2 11:12:08 2001
+++ linux/drivers/isdn/eicon/sys.h	Mon Dec  3 23:08:46 2001
@@ -54,15 +54,6 @@
 #define NULL    ((void *) 0)
 #endif
 
-/* MIN and MAX */
-
-#if !defined(MIN)
-#define MIN(a,b) ((a)>(b) ? (b) : (a))
-#endif
-#if !defined(MAX)
-#define MAX(a,b) ((a)>(b) ? (a) : (b))
-#endif
-
 /* Return the dimension of an array */
 
 #if !defined(DIM)
@@ -85,6 +76,8 @@
 /* void HwAssert(char *file, int line, char *condition); */
 
 #include <linux/kernel.h>
+#include <linux/string.h>
+
 #define _PRINTK printk
 
 #define _PRINTF	DivasPrintf
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/Makefile linux/drivers/isdn/hisax/Makefile
--- linux-2.4.10-pre6/drivers/isdn/hisax/Makefile	Sat Jul 28 12:12:37 2001
+++ linux/drivers/isdn/hisax/Makefile	Mon Dec  3 23:08:46 2001
@@ -2,20 +2,21 @@
 
 # The target object and module list name.
 
-O_TARGET	:= vmlinux-obj.o
+O_TARGET	  := vmlinux-obj.o
 
 # Objects that export symbols.
 
-export-objs	:= config.o
+export-objs	  := config.o fsm.o
 
 # Multipart objects.
 
-list-multi	:= hisax.o
-hisax-objs	:= config.o isdnl1.o tei.o isdnl2.o isdnl3.o \
-		   lmgr.o q931.o callc.o fsm.o cert.o
+list-multi	  := hisax.o hisax_st5481.o
+hisax-objs	  := config.o isdnl1.o tei.o isdnl2.o isdnl3.o \
+		     lmgr.o q931.o callc.o fsm.o cert.o
+hisax_st5481-objs := st5481_init.o st5481_usb.o st5481_d.o st5481_b.o \
+		     st5481_hdlc.o
 
 # Optional parts of multipart objects.
-
 hisax-objs-$(CONFIG_HISAX_EURO) += l3dss1.o
 hisax-objs-$(CONFIG_HISAX_NI1) += l3ni1.o
 hisax-objs-$(CONFIG_HISAX_1TR6) += l3_1tr6.o
@@ -27,7 +28,6 @@
 hisax-objs-$(CONFIG_HISAX_AVM_A1) += avm_a1.o isac.o arcofi.o hscx.o
 hisax-objs-$(CONFIG_HISAX_AVM_A1_PCMCIA) += avm_a1p.o isac.o arcofi.o hscx.o
 hisax-objs-$(CONFIG_HISAX_FRITZPCI) += avm_pci.o isac.o arcofi.o
-hisax-objs-$(CONFIG_HISAX_AVM_A1) += avm_a1.o isac.o arcofi.o hscx.o
 hisax-objs-$(CONFIG_HISAX_ELSA) += elsa.o isac.o arcofi.o hscx.o
 hisax-objs-$(CONFIG_HISAX_IX1MICROR2) += ix1_micro.o isac.o arcofi.o hscx.o
 hisax-objs-$(CONFIG_HISAX_DIEHLDIVA) += diva.o isac.o arcofi.o hscx.o
@@ -54,9 +54,10 @@
 
 # Each configuration option enables a list of files.
 
-obj-$(CONFIG_ISDN_DRV_HISAX)	+= hisax.o
+obj-$(CONFIG_ISDN_DRV_HISAX)		+= hisax.o
 obj-$(CONFIG_HISAX_SEDLBAUER_CS)	+= sedlbauer_cs.o
-obj-$(CONFIG_HISAX_ELSA_CS)	+= elsa_cs.o
+obj-$(CONFIG_HISAX_ELSA_CS)		+= elsa_cs.o
+obj-$(CONFIG_HISAX_ST5481)		+= hisax_st5481.o
 
 CERT := $(shell md5sum -c md5sums.asc >> /dev/null;echo $$?)
 CFLAGS_cert.o := -DCERTIFICATION=$(CERT)
@@ -67,3 +68,6 @@
 
 hisax.o: $(hisax-objs)
 	$(LD) -r -o $@ $(hisax-objs)
+
+hisax_st5481.o: $(hisax_st5481-objs)
+	$(LD) -r -o $@ $(hisax_st5481-objs)
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/callc.c linux/drivers/isdn/hisax/callc.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/callc.c	Mon Jul  2 14:07:55 2001
+++ linux/drivers/isdn/hisax/callc.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: callc.c,v 2.51.6.4 2001/06/09 15:14:17 kai Exp $
+/* $Id: callc.c,v 2.51.6.5 2001/08/23 19:44:23 kai Exp $
  *
  * Author       Karsten Keil (keil@isdn4linux.de)
  *              based on the teles driver from Jan den Ouden
@@ -20,12 +20,12 @@
 #define MOD_USE_COUNT ( GET_USE_COUNT (&__this_module))
 #endif	/* MODULE */
 
-const char *lli_revision = "$Revision: 2.51.6.4 $";
+const char *lli_revision = "$Revision: 2.51.6.5 $";
 
 extern struct IsdnCard cards[];
 extern int nrcards;
-extern void HiSax_mod_dec_use_count(void);
-extern void HiSax_mod_inc_use_count(void);
+extern void HiSax_mod_dec_use_count(struct IsdnCardState *cs);
+extern void HiSax_mod_inc_use_count(struct IsdnCardState *cs);
 
 static int init_b_st(struct Channel *chanp, int incoming);
 static void release_b_st(struct Channel *chanp);
@@ -1584,7 +1584,7 @@
 			}
 			break;
 		case (ISDN_CMD_LOCK):
-			HiSax_mod_inc_use_count();
+			HiSax_mod_inc_use_count(csta);
 #ifdef MODULE
 			if (csta->channel[0].debug & 0x400)
 				HiSax_putstatus(csta, "   LOCK ", "modcnt %lx",
@@ -1592,7 +1592,7 @@
 #endif				/* MODULE */
 			break;
 		case (ISDN_CMD_UNLOCK):
-			HiSax_mod_dec_use_count();
+			HiSax_mod_dec_use_count(csta);
 #ifdef MODULE
 			if (csta->channel[0].debug & 0x400)
 				HiSax_putstatus(csta, " UNLOCK ", "modcnt %lx",
@@ -1624,11 +1624,11 @@
 					break;
 				case (3):
 					for (i = 0; i < *(unsigned int *) ic->parm.num; i++)
-						HiSax_mod_dec_use_count();
+						HiSax_mod_dec_use_count(NULL);
 					break;
 				case (4):
 					for (i = 0; i < *(unsigned int *) ic->parm.num; i++)
-						HiSax_mod_inc_use_count();
+						HiSax_mod_inc_use_count(NULL);
 					break;
 				case (5):	/* set card in leased mode */
 					num = *(unsigned int *) ic->parm.num;
@@ -1698,7 +1698,7 @@
 #ifdef MODULE
 				case (55):
 					MOD_USE_COUNT = 0;
-					HiSax_mod_inc_use_count();
+					HiSax_mod_inc_use_count(NULL);
 					break;
 #endif				/* MODULE */
 				case (11):
@@ -1810,6 +1810,7 @@
 		cli();
 		nskb = skb_clone(skb, GFP_ATOMIC);
 		if (nskb) {
+			nskb->truesize = nskb->len;
 			if (!ack)
 				nskb->pkt_type = PACKET_NOACK;
 			if (chanp->l2_active_protocol == ISDN_PROTO_L2_X75I)
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/config.c linux/drivers/isdn/hisax/config.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/config.c	Thu Jul 19 09:40:25 2001
+++ linux/drivers/isdn/hisax/config.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: config.c,v 2.57.6.16 2001/07/13 09:01:00 kai Exp $
+/* $Id: config.c,v 2.57.6.18 2001/08/27 22:19:05 kai Exp $
  *
  * Author       Karsten Keil (keil@isdn4linux.de)
  *              based on the teles driver from Jan den Ouden
@@ -313,7 +313,8 @@
 #define DEFAULT_PROTO_NAME "UNKNOWN"
 #endif
 #ifndef DEFAULT_CARD
-#error "HiSax: No cards configured"
+#define DEFAULT_CARD 0
+#define DEFAULT_CFG {0,0,0,0}
 #endif
 
 int hisax_init_pcmcia(void *, int *, struct IsdnCard *);
@@ -423,16 +424,6 @@
 	certification_check(1);
 }
 
-void HiSax_mod_dec_use_count(void)
-{
-	MOD_DEC_USE_COUNT;
-}
-
-void HiSax_mod_inc_use_count(void)
-{
-	MOD_INC_USE_COUNT;
-}
-
 #ifndef MODULE
 #define MAX_ARG	(HISAX_MAX_CARDS*5)
 static int __init HiSax_setup(char *line)
@@ -840,8 +831,9 @@
 	if (csta->DC_Close != NULL) {
 		csta->DC_Close(csta);
 	}
-	csta->cardmsg(csta, CARD_RELEASE, NULL);
-	if (csta->dbusytimer.function != NULL)
+	if (csta->cardmsg)
+		csta->cardmsg(csta, CARD_RELEASE, NULL);
+	if (csta->dbusytimer.function != NULL) // FIXME?
 		del_timer(&csta->dbusytimer);
 	ll_unload(csta);
 }
@@ -1137,6 +1129,9 @@
 		ret = setup_netjet_u(card);
 		break;
 #endif
+	case ISDN_CTYPE_DYNAMIC:
+		ret = 2;
+		break;
 	default:
 		printk(KERN_WARNING
 		       "HiSax: Support for %s Card not selected\n",
@@ -1165,7 +1160,17 @@
 
 	init_bcstate(cs, 0);
 	init_bcstate(cs, 1);
-	ret = init_card(cs);
+
+	/* init_card only handles interrupts which are not */
+	/* used here for the loadable driver */
+	switch (card->typ) {
+	case ISDN_CTYPE_DYNAMIC:
+		ret = 0;
+		break;
+	default:
+		ret = init_card(cs);
+		break;
+	}
 	if (ret) {
 		closecard(cardnr);
 		ret = 0;
@@ -1343,6 +1348,8 @@
 #ifdef MODULE
 	if (!type[0]) {
 		/* We 'll register drivers later, but init basic functions */
+		for (i = 0; i < HISAX_MAX_CARDS; i++)
+			cards[i].typ = 0;
 		return 0;
 	}
 #ifdef CONFIG_HISAX_ELSA
@@ -1572,7 +1579,6 @@
 {
 #ifdef MODULE
 	int i;
-	int nzproto = 0;
 
 	nrcards = 0;
 	/* Initialize all structs, even though we only accept
@@ -1584,14 +1590,12 @@
 		cards[i].typ = type[i];
 		if (protocol[i]) {
 			cards[i].protocol = protocol[i];
-			nzproto++;
 		}
 	}
 	cards[0].para[0] = pcm_irq;
 	cards[0].para[1] = (int) pcm_iob;
 	cards[0].protocol = prot;
 	cards[0].typ = ISDN_CTYPE_HFC_SP_PCMCIA;
-	nzproto = 1;
 
 	if (!HiSax_id)
 		HiSax_id = HiSaxID;
@@ -1615,7 +1619,6 @@
 {
 #ifdef MODULE
 	int i;
-	int nzproto = 0;
 
 	nrcards = 0;
 	/* Initialize all structs, even though we only accept
@@ -1627,14 +1630,12 @@
 		cards[i].typ = type[i];
 		if (protocol[i]) {
 			cards[i].protocol = protocol[i];
-			nzproto++;
 		}
 	}
 	cards[0].para[0] = pcm_irq;
 	cards[0].para[1] = (int) pcm_iob;
 	cards[0].protocol = prot;
 	cards[0].typ = ISDN_CTYPE_SEDLBAUER_PCMCIA;
-	nzproto = 1;
 
 	if (!HiSax_id)
 		HiSax_id = HiSaxID;
@@ -1658,7 +1659,6 @@
 {
 #ifdef MODULE
 	int i;
-	int nzproto = 0;
 
 	nrcards = 0;
 	/* Initialize all structs, even though we only accept
@@ -1670,14 +1670,12 @@
 		cards[i].typ = type[i];
 		if (protocol[i]) {
 			cards[i].protocol = protocol[i];
-			nzproto++;
 		}
 	}
 	cards[0].para[0] = pcm_irq;
 	cards[0].para[1] = (int) pcm_iob;
 	cards[0].protocol = prot;
 	cards[0].typ = ISDN_CTYPE_A1_PCMCIA;
-	nzproto = 1;
 
 	if (!HiSax_id)
 		HiSax_id = HiSaxID;
@@ -1715,11 +1713,362 @@
 	return ret;
 }
 
+#include "hisax_if.h"
+
+EXPORT_SYMBOL(hisax_register);
+EXPORT_SYMBOL(hisax_unregister);
+
+static void hisax_d_l1l2(struct hisax_if *ifc, int pr, void *arg);
+static void hisax_b_l1l2(struct hisax_if *ifc, int pr, void *arg);
+static void hisax_d_l2l1(struct PStack *st, int pr, void *arg);
+static void hisax_b_l2l1(struct PStack *st, int pr, void *arg);
+static int hisax_cardmsg(struct IsdnCardState *cs, int mt, void *arg);
+static int hisax_bc_setstack(struct PStack *st, struct BCState *bcs);
+static void hisax_bc_close(struct BCState *bcs);
+static void hisax_bh(struct IsdnCardState *cs);
+static void EChannel_proc_rcv(struct hisax_d_if *d_if);
+
+int hisax_register(struct hisax_d_if *hisax_d_if, struct hisax_b_if *b_if[],
+		   char *name, int protocol)
+{
+	int i, retval;
+	char id[20];
+	struct IsdnCardState *cs;
+
+	for (i = 0; i < HISAX_MAX_CARDS; i++) {
+		if (!cards[i].typ)
+			break;
+	}
+
+	if (i >= HISAX_MAX_CARDS)
+		return -EBUSY;
+
+	cards[i].typ = ISDN_CTYPE_DYNAMIC;
+	cards[i].protocol = protocol;
+	sprintf(id, "%s%d", name, i);
+	nrcards++;
+	retval = checkcard(i, id, 0);
+	if (retval == 0) { // yuck
+		cards[i].typ = 0;
+		nrcards--;
+		return retval;
+	}
+	cs = cards[i].cs;
+	hisax_d_if->cs = cs;
+	cs->hw.hisax_d_if = hisax_d_if;
+	cs->cardmsg = hisax_cardmsg;
+	cs->tqueue.routine = (void *) (void *) hisax_bh;
+	cs->channel[0].d_st->l2.l2l1 = hisax_d_l2l1;
+	for (i = 0; i < 2; i++) {
+		cs->bcs[i].BC_SetStack = hisax_bc_setstack;
+		cs->bcs[i].BC_Close = hisax_bc_close;
+
+		b_if[i]->ifc.l1l2 = hisax_b_l1l2;
+
+		hisax_d_if->b_if[i] = b_if[i];
+	}
+	hisax_d_if->ifc.l1l2 = hisax_d_l1l2;
+	skb_queue_head_init(&hisax_d_if->erq);
+	clear_bit(0, &hisax_d_if->ph_state);
+	
+	return 0;
+}
+
+void hisax_unregister(struct hisax_d_if *hisax_d_if)
+{
+	cards[hisax_d_if->cs->cardnr].typ = 0;
+	HiSax_closecard(hisax_d_if->cs->cardnr);
+	skb_queue_purge(&hisax_d_if->erq);
+}
+
+#include "isdnl1.h"
+
+static void hisax_sched_event(struct IsdnCardState *cs, int event)
+{
+	cs->event |= 1 << event;
+	queue_task(&cs->tqueue, &tq_immediate);
+	mark_bh(IMMEDIATE_BH);
+}
+
+static void hisax_bh(struct IsdnCardState *cs)
+{
+	struct PStack *st;
+	int pr;
+
+	if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
+		DChannel_proc_rcv(cs);
+	if (test_and_clear_bit(E_RCVBUFREADY, &cs->event))
+		EChannel_proc_rcv(cs->hw.hisax_d_if);
+	if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
+		if (test_bit(0, &cs->hw.hisax_d_if->ph_state))
+			pr = PH_ACTIVATE | INDICATION;
+		else
+			pr = PH_DEACTIVATE | INDICATION;
+		for (st = cs->stlist; st; st = st->next)
+			st->l1.l1l2(st, pr, NULL);
+		
+	}
+}
+
+static void hisax_b_sched_event(struct BCState *bcs, int event)
+{
+	bcs->event |= 1 << event;
+	queue_task(&bcs->tqueue, &tq_immediate);
+	mark_bh(IMMEDIATE_BH);
+}
+
+static inline void D_L2L1(struct hisax_d_if *d_if, int pr, void *arg)
+{
+	struct hisax_if *ifc = (struct hisax_if *) d_if;
+	ifc->l2l1(ifc, pr, arg);
+}
+
+static inline void B_L2L1(struct hisax_b_if *b_if, int pr, void *arg)
+{
+	struct hisax_if *ifc = (struct hisax_if *) b_if;
+	ifc->l2l1(ifc, pr, arg);
+}
+
+static void hisax_d_l1l2(struct hisax_if *ifc, int pr, void *arg)
+{
+	struct hisax_d_if *d_if = (struct hisax_d_if *) ifc;
+	struct IsdnCardState *cs = d_if->cs;
+	struct PStack *st;
+	struct sk_buff *skb;
+
+	switch (pr) {
+	case PH_ACTIVATE | INDICATION:
+		set_bit(0, &d_if->ph_state);
+		hisax_sched_event(cs, D_L1STATECHANGE);
+		break;
+	case PH_DEACTIVATE | INDICATION:
+		clear_bit(0, &d_if->ph_state);
+		hisax_sched_event(cs, D_L1STATECHANGE);
+		break;
+	case PH_DATA | INDICATION:
+		skb_queue_tail(&cs->rq, arg);
+		hisax_sched_event(cs, D_RCVBUFREADY);
+		break;
+	case PH_DATA | CONFIRM:
+		skb = skb_dequeue(&cs->sq);
+		if (skb) {
+			D_L2L1(d_if, PH_DATA | REQUEST, skb);
+			break;
+		}
+		clear_bit(FLG_L1_DBUSY, &cs->HW_Flags);
+		for (st = cs->stlist; st; st = st->next) {
+			if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags)) {
+				st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
+				break;
+			}
+		}
+		break;
+	case PH_DATA_E | INDICATION:
+		skb_queue_tail(&d_if->erq, arg);
+		hisax_sched_event(cs, E_RCVBUFREADY);
+		break;
+	default:
+		printk("pr %#x\n", pr);
+		break;
+	}
+}
+
+static void hisax_b_l1l2(struct hisax_if *ifc, int pr, void *arg)
+{
+	struct hisax_b_if *b_if = (struct hisax_b_if *) ifc;
+	struct BCState *bcs = b_if->bcs;
+	struct PStack *st = bcs->st;
+	struct sk_buff *skb;
+
+	// FIXME use isdnl1?
+	switch (pr) {
+	case PH_ACTIVATE | INDICATION:
+		st->l1.l1l2(st, pr, NULL);
+		break;
+	case PH_DEACTIVATE | INDICATION:
+		st->l1.l1l2(st, pr, NULL);
+		bcs->hw.b_if = NULL;
+		break;
+	case PH_DATA | INDICATION:
+		skb_queue_tail(&bcs->rqueue, arg);
+		hisax_b_sched_event(bcs, B_RCVBUFREADY);
+		break;
+	case PH_DATA | CONFIRM:
+		bcs->tx_cnt -= (int) arg;
+		if (bcs->st->lli.l1writewakeup)
+			bcs->st->lli.l1writewakeup(bcs->st, (int) arg);
+		skb = skb_dequeue(&bcs->squeue);
+		if (skb) {
+			B_L2L1(b_if, PH_DATA | REQUEST, skb);
+			break;
+		}
+		clear_bit(BC_FLG_BUSY, &bcs->Flag);
+		if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags)) {
+			st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
+		}
+		break;
+	default:
+		printk("hisax_b_l1l2 pr %#x\n", pr);
+		break;
+	}
+}
+
+static void hisax_d_l2l1(struct PStack *st, int pr, void *arg)
+{
+	struct IsdnCardState *cs = st->l1.hardware;
+	struct hisax_d_if *hisax_d_if = cs->hw.hisax_d_if;
+	struct sk_buff *skb = arg;
+
+	switch (pr) {
+	case PH_DATA | REQUEST:
+	case PH_PULL | INDICATION:
+		if (cs->debug & DEB_DLOG_HEX)
+			LogFrame(cs, skb->data, skb->len);
+		if (cs->debug & DEB_DLOG_VERBOSE)
+			dlogframe(cs, skb, 0);
+		Logl2Frame(cs, skb, "PH_DATA_REQ", 0);
+		// FIXME lock?
+		if (!test_and_set_bit(FLG_L1_DBUSY, &cs->HW_Flags))
+			D_L2L1(hisax_d_if, PH_DATA | REQUEST, skb);
+		else
+			skb_queue_tail(&cs->sq, skb);
+		break;
+	case PH_PULL | REQUEST:
+		if (!test_bit(FLG_L1_DBUSY, &cs->HW_Flags))
+			st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
+		else
+			set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
+		break;
+	default:
+		D_L2L1(hisax_d_if, pr, arg);
+		break;
+	}
+}
+
+static int hisax_cardmsg(struct IsdnCardState *cs, int mt, void *arg)
+{
+	return 0;
+}
+
+static void hisax_b_l2l1(struct PStack *st, int pr, void *arg)
+{
+	struct BCState *bcs = st->l1.bcs;
+	struct hisax_b_if *b_if = bcs->hw.b_if;
+
+	switch (pr) {
+	case PH_ACTIVATE | REQUEST:
+		B_L2L1(b_if, pr, (void *) st->l1.mode);
+		break;
+	case PH_DATA | REQUEST:
+	case PH_PULL | INDICATION:
+		// FIXME lock?
+		if (!test_and_set_bit(BC_FLG_BUSY, &bcs->Flag)) {
+			B_L2L1(b_if, PH_DATA | REQUEST, arg);
+		} else {
+			skb_queue_tail(&bcs->squeue, arg);
+		}
+		break;
+	case PH_PULL | REQUEST:
+		if (!test_bit(BC_FLG_BUSY, &bcs->Flag))
+			st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
+		else
+			set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
+		break;
+	default:
+		B_L2L1(b_if, pr, arg);
+		break;
+	}
+}
+
+static int hisax_bc_setstack(struct PStack *st, struct BCState *bcs)
+{
+	struct IsdnCardState *cs = st->l1.hardware;
+	struct hisax_d_if *hisax_d_if = cs->hw.hisax_d_if;
+
+	bcs->channel = st->l1.bc;
+
+	bcs->hw.b_if = hisax_d_if->b_if[st->l1.bc];
+	hisax_d_if->b_if[st->l1.bc]->bcs = bcs;
+
+	st->l1.bcs = bcs;
+	st->l2.l2l1 = hisax_b_l2l1;
+	setstack_manager(st);
+	bcs->st = st;
+	setstack_l1_B(st);
+	skb_queue_head_init(&bcs->rqueue);
+	skb_queue_head_init(&bcs->squeue);
+	return 0;
+}
+
+static void hisax_bc_close(struct BCState *bcs)
+{
+	struct hisax_b_if *b_if = bcs->hw.b_if;
+
+	if (b_if)
+		B_L2L1(b_if, PH_DEACTIVATE | REQUEST, NULL);
+}
+
+static void EChannel_proc_rcv(struct hisax_d_if *d_if)
+{
+	struct IsdnCardState *cs = d_if->cs;
+	u_char *ptr;
+	struct sk_buff *skb;
+
+	while ((skb = skb_dequeue(&d_if->erq)) != NULL) {
+		if (cs->debug & DEB_DLOG_HEX) {
+			ptr = cs->dlog;
+			if ((skb->len) < MAX_DLOG_SPACE / 3 - 10) {
+				*ptr++ = 'E';
+				*ptr++ = 'C';
+				*ptr++ = 'H';
+				*ptr++ = 'O';
+				*ptr++ = ':';
+				ptr += QuickHex(ptr, skb->data, skb->len);
+				ptr--;
+				*ptr++ = '\n';
+				*ptr = 0;
+				HiSax_putstatus(cs, NULL, cs->dlog);
+			} else
+				HiSax_putstatus(cs, "LogEcho: ",
+						"warning Frame too big (%d)",
+						skb->len);
+		}
+		dev_kfree_skb_any(skb);
+	}
+}
+
+void HiSax_mod_dec_use_count(struct IsdnCardState *cs)
+{
+	struct module *mod;
+
+	if (cs && cs->cardmsg == hisax_cardmsg) {
+		mod = cs->hw.hisax_d_if->owner;
+		if (mod)
+			__MOD_DEC_USE_COUNT(mod);
+	} else {
+		MOD_DEC_USE_COUNT;
+	}
+}
+
+void HiSax_mod_inc_use_count(struct IsdnCardState *cs)
+{
+	struct module *mod;
+
+	if (cs && cs->cardmsg == hisax_cardmsg) {
+		mod = cs->hw.hisax_d_if->owner;
+		if (mod)
+		// hope we do win the race...
+			try_inc_mod_count(mod);
+	} else {
+		MOD_INC_USE_COUNT;
+	}
+}
+
 #include <linux/pci.h>
 
 static struct pci_device_id hisax_pci_tbl[] __initdata = {
 #ifdef CONFIG_HISAX_FRITZPCI
-	{PCI_VENDOR_ID_AVM,      PCI_DEVICE_ID_AVM_A1,          PCI_ANY_ID, PCI_ANY_ID},
+	{PCI_VENDOR_ID_AVM,      PCI_DEVICE_ID_AVM_A1,           PCI_ANY_ID, PCI_ANY_ID},
 #endif
 #ifdef CONFIG_HISAX_DIEHLDIVA
 	{PCI_VENDOR_ID_EICON,    PCI_DEVICE_ID_EICON_DIVA20,     PCI_ANY_ID, PCI_ANY_ID},
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/elsa_ser.c linux/drivers/isdn/hisax/elsa_ser.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/elsa_ser.c	Mon Jul  2 14:07:55 2001
+++ linux/drivers/isdn/hisax/elsa_ser.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: elsa_ser.c,v 2.10.6.2 2001/06/09 15:14:17 kai Exp $
+/* $Id: elsa_ser.c,v 2.10.6.3 2001/08/17 12:34:26 kai Exp $
  *
  * stuff for the serial modem on ELSA cards
  *
@@ -14,10 +14,6 @@
 #define RS_ISR_PASS_LIMIT 256
 #define BASE_BAUD ( 1843200 / 16 )
 
-#ifndef MIN
-#define MIN(a,b)	((a) < (b) ? (a) : (b))
-#endif
-
 //#define SERIAL_DEBUG_OPEN 1
 //#define SERIAL_DEBUG_INTR 1
 //#define SERIAL_DEBUG_FLOW 1
@@ -257,7 +253,7 @@
 write_modem(struct BCState *bcs) {
 	int ret=0;
 	struct IsdnCardState *cs = bcs->cs;
-	int count, len, fp, buflen;
+	int count, len, fp;
 	long flags;
 	
 	if (!bcs->tx_skb)
@@ -266,12 +262,14 @@
 		return 0;
 	save_flags(flags);
 	cli();
-	buflen = MAX_MODEM_BUF - cs->hw.elsa.transcnt;
-	len = MIN(buflen, bcs->tx_skb->len);		
+	len = bcs->tx_skb->len;
+	if (len > MAX_MODEM_BUF - cs->hw.elsa.transcnt)
+		len = MAX_MODEM_BUF - cs->hw.elsa.transcnt;
 	fp = cs->hw.elsa.transcnt + cs->hw.elsa.transp;
 	fp &= (MAX_MODEM_BUF -1);
-	count = MIN(len, MAX_MODEM_BUF - fp);
-	if (count < len) {
+	count = len;
+	if (count > MAX_MODEM_BUF - fp) {
+		count = MAX_MODEM_BUF - fp;
 		memcpy(cs->hw.elsa.transbuf + fp, bcs->tx_skb->data, count);
 		skb_pull(bcs->tx_skb, count);
 		cs->hw.elsa.transcnt += count;
@@ -472,8 +470,9 @@
 	}
 	fp = cs->hw.elsa.transcnt + cs->hw.elsa.transp;
 	fp &= (MAX_MODEM_BUF -1);
-	count = MIN(len, MAX_MODEM_BUF - fp);
-	if (count < len) {
+	count = len;
+	if (count > MAX_MODEM_BUF - fp) {
+		count = MAX_MODEM_BUF - fp;
 		memcpy(cs->hw.elsa.transbuf + fp, msg, count);
 		cs->hw.elsa.transcnt += count;
 		msg += count;
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/fsm.c linux/drivers/isdn/hisax/fsm.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/fsm.c	Tue Jun 12 10:34:48 2001
+++ linux/drivers/isdn/hisax/fsm.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: fsm.c,v 1.14.6.2 2001/05/26 15:19:57 kai Exp $
+/* $Id: fsm.c,v 1.14.6.3 2001/08/23 19:44:23 kai Exp $
  *
  * Author       Karsten Keil (keil@isdn4linux.de)
  *              based on the teles driver from Jan den Ouden
@@ -14,6 +14,14 @@
 #include "hisax.h"
 
 #define FSM_TIMER_DEBUG 0
+
+EXPORT_SYMBOL(FsmNew);
+EXPORT_SYMBOL(FsmFree);
+EXPORT_SYMBOL(FsmEvent);
+EXPORT_SYMBOL(FsmChangeState);
+EXPORT_SYMBOL(FsmInitTimer);
+EXPORT_SYMBOL(FsmDelTimer);
+EXPORT_SYMBOL(FsmRestartTimer);
 
 int __init
 FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount)
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/fsm.h linux/drivers/isdn/hisax/fsm.h
--- linux-2.4.10-pre6/drivers/isdn/hisax/fsm.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/fsm.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,48 @@
+#ifndef __FSM_H__
+#define __FSM_H__
+
+#include <linux/timer.h>
+
+struct FsmInst;
+
+typedef void (* FSMFNPTR)(struct FsmInst *, int, void *);
+
+struct Fsm {
+	FSMFNPTR *jumpmatrix;
+	int state_count, event_count;
+	char **strEvent, **strState;
+};
+
+struct FsmInst {
+	struct Fsm *fsm;
+	int state;
+	int debug;
+	void *userdata;
+	int userint;
+	void (*printdebug) (struct FsmInst *, char *, ...);
+};
+
+struct FsmNode {
+	int state, event;
+	void (*routine) (struct FsmInst *, int, void *);
+};
+
+struct FsmTimer {
+	struct FsmInst *fi;
+	struct timer_list tl;
+	int event;
+	void *arg;
+};
+
+int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount);
+void FsmFree(struct Fsm *fsm);
+int FsmEvent(struct FsmInst *fi, int event, void *arg);
+void FsmChangeState(struct FsmInst *fi, int newstate);
+void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft);
+int FsmAddTimer(struct FsmTimer *ft, int millisec, int event,
+		void *arg, int where);
+void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event,
+		     void *arg, int where);
+void FsmDelTimer(struct FsmTimer *ft, int where);
+
+#endif
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/hisax.h linux/drivers/isdn/hisax/hisax.h
--- linux-2.4.10-pre6/drivers/isdn/hisax/hisax.h	Wed Jul 18 09:45:40 2001
+++ linux/drivers/isdn/hisax/hisax.h	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: hisax.h,v 2.52.6.7 2001/07/18 16:02:15 kai Exp $
+/* $Id: hisax.h,v 2.52.6.8 2001/08/23 19:44:23 kai Exp $
  *
  *   Basic declarations, defines and prototypes
  *
@@ -455,7 +455,6 @@
 	struct tq_struct tq_xmt;
 };
 
-
 #define BC_FLG_INIT	1
 #define BC_FLG_ACTIV	2
 #define BC_FLG_BUSY	3
@@ -512,6 +511,7 @@
 		struct tiger_hw tiger;
 		struct amd7930_hw  amd7930;
 		struct w6692B_hw w6692;
+		struct hisax_b_if *b_if;
 	} hw;
 };
 
@@ -897,6 +897,7 @@
 		struct bkm_hw ax;
 		struct gazel_hw gazel;
 		struct w6692_hw w6692;
+		struct hisax_d_if *hisax_d_if;
 	} hw;
 	int myid;
 	isdn_if iif;
@@ -991,7 +992,8 @@
 #define  ISDN_CTYPE_HFC_SX      37
 #define  ISDN_CTYPE_NETJET_U	38
 #define  ISDN_CTYPE_HFC_SP_PCMCIA      39
-#define  ISDN_CTYPE_COUNT	39
+#define  ISDN_CTYPE_DYNAMIC     40
+#define  ISDN_CTYPE_COUNT	40
 
 
 #ifdef ISDN_CHIP_ISAC
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/hisax_debug.h linux/drivers/isdn/hisax/hisax_debug.h
--- linux-2.4.10-pre6/drivers/isdn/hisax/hisax_debug.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/hisax_debug.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,80 @@
+/*
+ * Common debugging macros for use with the hisax driver
+ *
+ * Author       Frode Isaksen
+ * Copyright    2001 by Frode Isaksen      <fisaksen@bewan.com>
+ * 
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ *
+ */
+
+/* 
+ * How to use:
+ * 
+ * Before including this file, you need to
+ *   #define __debug_variable my_debug
+ * where my_debug is a variable in your code which
+ * determines the debug bitmask.
+ *
+ * If CONFIG_HISAX_DEBUG is not set, all macros evaluate to nothing
+ */
+
+#ifndef __HISAX_DEBUG_H__
+#define __HISAX_DEBUG_H__
+
+#ifdef CONFIG_HISAX_DEBUG
+
+#define DBG(level, format, arg...) do { \
+if (level & __debug_variable) \
+printk(KERN_DEBUG __FUNCTION__ ": " format "\n" , ## arg); \
+} while (0)
+
+#define DBG_PACKET(level,data,count) \
+  if (level & __debug_variable) dump_packet(__FUNCTION__,data,count)
+
+#define DBG_SKB(level,skb) \
+  if ((level & __debug_variable) && skb) dump_packet(__FUNCTION__,skb->data,skb->len)
+
+
+static void __attribute__((unused))
+dump_packet(const char *name,const u_char *data,int pkt_len)
+{
+#define DUMP_HDR_SIZE 20
+#define DUMP_TLR_SIZE 8
+	if (pkt_len) {
+		int i,len1,len2;
+
+		printk(KERN_DEBUG "%s: length=%d,data=",name,pkt_len);
+
+		if (pkt_len >  DUMP_HDR_SIZE+ DUMP_TLR_SIZE) {
+			len1 = DUMP_HDR_SIZE;
+			len2 = DUMP_TLR_SIZE;
+		} else {
+			len1 = pkt_len > DUMP_HDR_SIZE ? DUMP_HDR_SIZE : pkt_len;
+			len2 = 0;			
+		}
+		for (i = 0; i < len1; ++i) {
+		 	printk ("%.2x", data[i]);
+		}
+		if (len2) {
+		 	printk ("..");
+			for (i = pkt_len-DUMP_TLR_SIZE; i < pkt_len; ++i) {
+				printk ("%.2x", data[i]);
+			}
+		}
+		printk ("\n");
+	}
+#undef DUMP_HDR_SIZE
+#undef DUMP_TLR_SIZE
+}
+
+#else
+
+#define DBG(level, format, arg...) do {} while (0)
+#define DBG_PACKET(level,data,count) do {} while (0)
+#define DBG_SKB(level,skb) do {} while (0)
+
+#endif
+
+#endif
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/hisax_if.h linux/drivers/isdn/hisax/hisax_if.h
--- linux-2.4.10-pre6/drivers/isdn/hisax/hisax_if.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/hisax_if.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,54 @@
+#ifndef __HISAX_IF_H__
+#define __HISAX_IF_H__
+
+#include <linux/skbuff.h>
+
+#define REQUEST		0
+#define CONFIRM		1
+#define INDICATION	2
+#define RESPONSE	3
+
+#define PH_ACTIVATE	0x0100
+#define PH_DEACTIVATE	0x0110
+#define PH_DATA		0x0120
+#define PH_PULL		0x0130
+#define PH_DATA_E	0x0140
+
+#define L1_MODE_NULL	0
+#define L1_MODE_TRANS	1
+#define L1_MODE_HDLC	2
+#define L1_MODE_EXTRN	3
+#define L1_MODE_HDLC_56K 4
+#define L1_MODE_MODEM	7
+#define L1_MODE_V32	8
+#define L1_MODE_FAX	9
+
+struct hisax_if {
+	void *priv; // private to driver
+	void (*l1l2)(struct hisax_if *, int pr, void *arg);
+	void (*l2l1)(struct hisax_if *, int pr, void *arg);
+};
+
+struct hisax_b_if {
+	struct hisax_if ifc;
+
+	// private to hisax
+	struct BCState *bcs;
+};
+
+struct hisax_d_if {
+	struct hisax_if ifc;
+
+	// private to hisax
+	struct module *owner;
+	struct IsdnCardState *cs;
+	struct hisax_b_if *b_if[2];
+	struct sk_buff_head erq;
+	long ph_state;
+};
+
+int hisax_register(struct hisax_d_if *hisax_if, struct hisax_b_if *b_if[],
+		   char *name, int protocol);
+void hisax_unregister(struct hisax_d_if *hisax_if);
+
+#endif
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/isdnl1.c linux/drivers/isdn/hisax/isdnl1.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/isdnl1.c	Mon Jul  2 14:07:55 2001
+++ linux/drivers/isdn/hisax/isdnl1.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdnl1.c,v 2.41.6.3 2001/05/26 15:19:57 kai Exp $
+/* $Id: isdnl1.c,v 2.41.6.4 2001/08/23 19:44:23 kai Exp $
  *
  * isdnl1.c     common low level stuff for Siemens Chipsetbased isdn cards
  *              based on the teles driver from Jan den Ouden
@@ -15,7 +15,7 @@
  *
  */
 
-const char *l1_revision = "$Revision: 2.41.6.3 $";
+const char *l1_revision = "$Revision: 2.41.6.4 $";
 
 #define __NO_VERSION__
 #include <linux/init.h>
@@ -895,7 +895,8 @@
 	setstack_manager(st);
 	st->l1.stlistp = &(cs->stlist);
 	st->l2.l2l1  = dch_l2l1;
-	cs->setstack_d(st, cs);
+	if (cs->setstack_d)
+		cs->setstack_d(st, cs);
 }
 
 void
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/isdnl1.h linux/drivers/isdn/hisax/isdnl1.h
--- linux-2.4.10-pre6/drivers/isdn/hisax/isdnl1.h	Fri Mar  2 11:12:09 2001
+++ linux/drivers/isdn/hisax/isdnl1.h	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdnl1.h,v 2.9.6.1 2001/02/16 16:43:27 kai Exp $
+/* $Id: isdnl1.h,v 2.9.6.2 2001/08/23 19:44:23 kai Exp $
  *
  * Layer 1 defines
  *
@@ -14,6 +14,7 @@
 #define D_RX_MON1	5
 #define D_TX_MON0	6
 #define D_TX_MON1	7
+#define E_RCVBUFREADY	8
 
 #define B_RCVBUFREADY 0
 #define B_XMTBUFREADY 1
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/st5481.h linux/drivers/isdn/hisax/st5481.h
--- linux-2.4.10-pre6/drivers/isdn/hisax/st5481.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/st5481.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,533 @@
+/*
+ * Driver for ST5481 USB ISDN modem
+ *
+ * Author       Frode Isaksen
+ * Copyright    2001 by Frode Isaksen      <fisaksen@bewan.com>
+ *              2001 by Kai Germaschewski  <kai.germaschewski@gmx.de>
+ * 
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ *
+ */
+
+#ifndef _ST5481_H_
+#define _ST5481_H_
+
+// USB IDs, the Product Id is in the range 0x4810-0x481F
+
+#define ST_VENDOR_ID 0x0483
+#define ST5481_PRODUCT_ID 0x4810
+#define ST5481_PRODUCT_ID_MASK 0xFFF0
+
+// ST5481 endpoints when using alternative setting 3 (2B+D).
+// To get the endpoint address, OR with 0x80 for IN endpoints.
+
+#define EP_CTRL   0x00U /* Control endpoint */
+#define EP_INT    0x01U /* Interrupt endpoint */
+#define EP_B1_OUT 0x02U /* B1 channel out */
+#define EP_B1_IN  0x03U /* B1 channel in */
+#define EP_B2_OUT 0x04U /* B2 channel out */
+#define EP_B2_IN  0x05U /* B2 channel in */
+#define EP_D_OUT  0x06U /* D channel out */
+#define EP_D_IN   0x07U /* D channel in */
+  
+// Number of isochronous packets. With 20 packets we get
+// 50 interrupts/sec for each endpoint.
+
+#define NUM_ISO_PACKETS_D      20
+#define NUM_ISO_PACKETS_B      20
+
+// Size of each isochronous packet.
+// In outgoing direction we need to match ISDN data rates:
+// D:  2 bytes / msec -> 16 kbit / s
+// B: 16 bytes / msec -> 64 kbit / s
+#define SIZE_ISO_PACKETS_D_IN  16
+#define SIZE_ISO_PACKETS_D_OUT 2
+#define SIZE_ISO_PACKETS_B_IN  32
+#define SIZE_ISO_PACKETS_B_OUT 8
+
+// If we overrun/underrun, we send one packet with +/- 2 bytes
+#define B_FLOW_ADJUST 2
+
+// Registers that are written using vendor specific device request
+// on endpoint 0. 
+
+#define LBA			0x02 /* S loopback */
+#define SET_DEFAULT		0x06 /* Soft reset */
+#define LBB			0x1D /* S maintenance loopback */
+#define STT			0x1e /* S force transmission signals */
+#define SDA_MIN			0x20 /* SDA-sin minimal value */
+#define SDA_MAX			0x21 /* SDA-sin maximal value */
+#define SDELAY_VALUE		0x22 /* Delay between Tx and Rx clock */
+#define IN_D_COUNTER		0x36 /* D receive channel fifo counter */
+#define OUT_D_COUNTER		0x37 /* D transmit channel fifo counter */
+#define IN_B1_COUNTER		0x38 /* B1 receive channel fifo counter */
+#define OUT_B1_COUNTER		0x39 /* B1 transmit channel fifo counter */
+#define IN_B2_COUNTER		0x3a /* B2 receive channel fifo counter */
+#define OUT_B2_COUNTER		0x3b /* B2 transmit channel fifo counter */
+#define FFCTRL_IN_D		0x3C /* D receive channel fifo threshold low */
+#define FFCTRH_IN_D		0x3D /* D receive channel fifo threshold high */
+#define FFCTRL_OUT_D		0x3E /* D transmit channel fifo threshold low */
+#define FFCTRH_OUT_D		0x3F /* D transmit channel fifo threshold high */
+#define FFCTRL_IN_B1		0x40 /* B1 receive channel fifo threshold low */
+#define FFCTRH_IN_B1		0x41 /* B1 receive channel fifo threshold high */
+#define FFCTRL_OUT_B1		0x42 /* B1 transmit channel fifo threshold low */
+#define FFCTRH_OUT_B1		0x43 /* B1 transmit channel fifo threshold high */
+#define FFCTRL_IN_B2		0x44 /* B2 receive channel fifo threshold low */
+#define FFCTRH_IN_B2		0x45 /* B2 receive channel fifo threshold high */
+#define FFCTRL_OUT_B2		0x46 /* B2 transmit channel fifo threshold low */
+#define FFCTRH_OUT_B2		0x47 /* B2 transmit channel fifo threshold high */
+#define MPMSK			0x4A /* Multi purpose interrupt MASK register */
+#define	FFMSK_D			0x4c /* D fifo interrupt MASK register */
+#define	FFMSK_B1		0x4e /* B1 fifo interrupt MASK register */
+#define	FFMSK_B2		0x50 /* B2 fifo interrupt MASK register */
+#define GPIO_DIR		0x52 /* GPIO pins direction registers */
+#define GPIO_OUT		0x53 /* GPIO pins output register */
+#define GPIO_IN			0x54 /* GPIO pins input register */ 
+#define TXCI			0x56 /* CI command to be transmitted */
+
+
+// Format of the interrupt packet received on endpoint 1:
+//
+// +--------+--------+--------+--------+--------+--------+
+// !MPINT   !FFINT_D !FFINT_B1!FFINT_B2!CCIST   !GPIO_INT!
+// +--------+--------+--------+--------+--------+--------+
+
+// Offsets in the interrupt packet
+
+#define MPINT			0
+#define FFINT_D			1
+#define FFINT_B1		2
+#define FFINT_B2		3
+#define CCIST			4
+#define GPIO_INT		5
+#define INT_PKT_SIZE            6
+
+// MPINT
+#define LSD_INT                 0x80 /* S line activity detected */
+#define RXCI_INT		0x40 /* Indicate primitive arrived */
+#define	DEN_INT			0x20 /* Signal enabling data out of D Tx fifo */
+#define DCOLL_INT		0x10 /* D channel collision */
+#define AMIVN_INT		0x04 /* AMI violation number reached 2 */
+#define INFOI_INT		0x04 /* INFOi changed */
+#define DRXON_INT               0x02 /* Reception channel active */
+#define GPCHG_INT               0x01 /* GPIO pin value changed */
+
+// FFINT_x
+#define IN_OVERRUN		0x80 /* In fifo overrun */
+#define OUT_UNDERRUN		0x40 /* Out fifo underrun */
+#define IN_UP			0x20 /* In fifo thresholdh up-crossed */
+#define IN_DOWN			0x10 /* In fifo thresholdl down-crossed */
+#define OUT_UP			0x08 /* Out fifo thresholdh up-crossed */
+#define OUT_DOWN		0x04 /* Out fifo thresholdl down-crossed */
+#define IN_COUNTER_ZEROED	0x02 /* In down-counter reached 0 */
+#define OUT_COUNTER_ZEROED	0x01 /* Out down-counter reached 0 */
+
+#define ANY_REC_INT	(IN_OVERRUN+IN_UP+IN_DOWN+IN_COUNTER_ZEROED)
+#define ANY_XMIT_INT	(OUT_UNDERRUN+OUT_UP+OUT_DOWN+OUT_COUNTER_ZEROED)
+
+
+// Level 1 commands that are sent using the TXCI device request
+#define ST5481_CMD_DR		 0x0 /* Deactivation Request */
+#define ST5481_CMD_RES		 0x1 /* state machine RESet */
+#define ST5481_CMD_TM1		 0x2 /* Test Mode 1 */
+#define ST5481_CMD_TM2		 0x3 /* Test Mode 2 */
+#define ST5481_CMD_PUP		 0x7 /* Power UP */
+#define ST5481_CMD_AR8		 0x8 /* Activation Request class 1 */
+#define ST5481_CMD_AR10		 0x9 /* Activation Request class 2 */
+#define ST5481_CMD_ARL		 0xA /* Activation Request Loopback */
+#define ST5481_CMD_PDN		 0xF /* Power DoWn */
+
+// Turn on/off the LEDs using the GPIO device request.
+// To use the B LEDs, number_of_leds must be set to 4
+#define B1_LED		0x10U
+#define B2_LED		0x20U
+#define GREEN_LED	0x40U
+#define RED_LED	        0x80U
+
+// D channel out states
+enum {
+	ST_DOUT_NONE,
+
+	ST_DOUT_SHORT_INIT,
+	ST_DOUT_SHORT_WAIT_DEN,
+
+	ST_DOUT_LONG_INIT,
+	ST_DOUT_LONG_WAIT_DEN,
+	ST_DOUT_NORMAL,
+
+	ST_DOUT_WAIT_FOR_UNDERRUN,
+        ST_DOUT_WAIT_FOR_NOT_BUSY,
+	ST_DOUT_WAIT_FOR_STOP,
+	ST_DOUT_WAIT_FOR_RESET,
+};
+
+#define DOUT_STATE_COUNT (ST_DOUT_WAIT_FOR_RESET + 1)
+
+// D channel out events
+enum {
+	EV_DOUT_START_XMIT,
+	EV_DOUT_COMPLETE,
+	EV_DOUT_DEN,
+	EV_DOUT_RESETED,
+	EV_DOUT_STOPPED,
+	EV_DOUT_COLL,
+	EV_DOUT_UNDERRUN,
+};
+
+#define DOUT_EVENT_COUNT (EV_DOUT_UNDERRUN + 1)
+
+// ----------------------------------------------------------------------
+
+enum {
+	ST_L1_F3,
+	ST_L1_F4,
+	ST_L1_F6,
+	ST_L1_F7,
+	ST_L1_F8,
+};
+
+#define L1_STATE_COUNT (ST_L1_F8+1)
+
+// The first 16 entries match the Level 1 indications that 
+// are found at offset 4 (CCIST) in the interrupt packet
+
+enum {
+	EV_IND_DP,  // 0000 Deactivation Pending
+	EV_IND_1,   // 0001
+	EV_IND_2,   // 0010
+	EV_IND_3,   // 0011
+	EV_IND_RSY, // 0100 ReSYnchronizing
+	EV_IND_5,   // 0101
+	EV_IND_6,   // 0110
+	EV_IND_7,   // 0111
+	EV_IND_AP,  // 1000 Activation Pending
+	EV_IND_9,   // 1001
+	EV_IND_10,  // 1010
+	EV_IND_11,  // 1011
+	EV_IND_AI8, // 1100 Activation Indication class 8
+	EV_IND_AI10,// 1101 Activation Indication class 10
+	EV_IND_AIL, // 1110 Activation Indication Loopback
+	EV_IND_DI,  // 1111 Deactivation Indication
+	EV_PH_ACTIVATE_REQ,
+	EV_PH_DEACTIVATE_REQ,
+	EV_TIMER3,
+};
+
+#define L1_EVENT_COUNT (EV_TIMER3 + 1)
+
+#define ERR(format, arg...) \
+printk(KERN_ERR __FILE__ ": " __FUNCTION__ ": " format "\n" , ## arg)
+
+#define WARN(format, arg...) \
+printk(KERN_WARNING __FILE__ ": " __FUNCTION__ ": " format "\n" , ## arg)
+
+#define INFO(format, arg...) \
+printk(KERN_INFO __FILE__ ": " __FUNCTION__ ": " format "\n" , ## arg)
+
+#include "st5481_hdlc.h"
+#include "fsm.h"
+#include "hisax_if.h"
+#include <linux/skbuff.h>
+
+/* ======================================================================
+ * FIFO handling
+ */
+
+/* Generic FIFO structure */ 
+struct fifo {
+	u_char r,w,count,size;
+	spinlock_t lock;
+};
+
+/*
+ * Init an FIFO
+ */
+static inline void fifo_init(struct fifo *fifo, int size)
+{
+	fifo->r = fifo->w = fifo->count = 0;
+	fifo->size = size;
+	spin_lock_init(&fifo->lock);
+}
+
+/*
+ * Add an entry to the FIFO
+ */
+static inline int fifo_add(struct fifo *fifo)
+{
+	unsigned long flags;
+	int index;
+
+	if (!fifo) {
+		return -1;
+	}
+
+	spin_lock_irqsave(&fifo->lock, flags);
+	if (fifo->count == fifo->size) {
+		// FIFO full
+		index = -1;
+	} else {
+		// Return index where to get the next data to add to the FIFO
+		index = fifo->w++ & (fifo->size-1); 
+		fifo->count++;
+	}
+	spin_unlock_irqrestore(&fifo->lock, flags);
+	return index;
+}
+
+/*
+ * Remove an entry from the FIFO with the index returned.
+ */
+static inline int fifo_remove(struct fifo *fifo)
+{
+	unsigned long flags;
+	int index;
+
+	if (!fifo) {
+		return -1;
+	}
+
+	spin_lock_irqsave(&fifo->lock, flags);		
+	if (!fifo->count) {
+		// FIFO empty
+		index = -1;
+	} else {
+		// Return index where to get the next data from the FIFO
+		index = fifo->r++ & (fifo->size-1); 
+		fifo->count--;
+	}
+	spin_unlock_irqrestore(&fifo->lock, flags);
+
+	return index;
+}
+
+/* ======================================================================
+ * control pipe
+ */
+typedef void (*ctrl_complete_t)(void *);
+
+typedef struct ctrl_msg {
+	devrequest dr;
+	ctrl_complete_t complete;
+	void *context;
+} ctrl_msg; 
+
+/* FIFO of ctrl messages waiting to be sent */
+#define MAX_EP0_MSG 16
+struct ctrl_msg_fifo {
+	struct fifo f;
+	struct ctrl_msg data[MAX_EP0_MSG];
+};	
+
+#define MAX_DFRAME_LEN_L1	300
+#define HSCX_BUFMAX	4096
+
+struct st5481_ctrl {
+	struct ctrl_msg_fifo msg_fifo;
+	unsigned long busy;
+	struct urb *urb;
+};
+
+struct st5481_intr {
+  //	struct evt_fifo evt_fifo;
+	struct urb *urb;
+};
+
+struct st5481_d_out {
+	struct hdlc_vars hdlc_state;
+	struct urb *urb[2]; /* double buffering */
+	unsigned long busy;
+	struct sk_buff *tx_skb;
+	struct FsmInst fsm;
+};
+
+struct st5481_b_out {
+	struct hdlc_vars hdlc_state;
+	struct urb *urb[2]; /* double buffering */
+	u_char flow_event;
+	u_long busy;
+	struct sk_buff *tx_skb;
+};
+
+struct st5481_in {
+	struct hdlc_vars hdlc_state;
+	struct urb *urb[2]; /* double buffering */
+	int mode;
+	int bufsize;
+	unsigned int num_packets;
+	unsigned int packet_size;
+	unsigned char ep, counter;
+	unsigned char *rcvbuf;
+	struct st5481_adapter *adapter;
+	struct hisax_if *hisax_if;
+};
+
+int st5481_setup_in(struct st5481_in *in);
+void st5481_release_in(struct st5481_in *in);
+void st5481_in_mode(struct st5481_in *in, int mode);
+
+struct st5481_bcs {
+	struct hisax_b_if b_if;
+	struct st5481_adapter *adapter;
+	struct st5481_in b_in;
+	struct st5481_b_out b_out;
+	int channel;
+	int mode;
+};
+
+struct st5481_adapter {
+	struct list_head list;
+	int number_of_leds;
+	struct usb_device *usb_dev;
+	struct hisax_d_if hisax_d_if;
+
+	struct st5481_ctrl ctrl;
+	struct st5481_intr intr;
+	struct st5481_in d_in;
+	struct st5481_d_out d_out;
+
+	unsigned char leds;
+	unsigned int led_counter;
+
+	unsigned long event;
+
+	struct FsmInst l1m;
+	struct FsmTimer timer;
+
+	struct st5481_bcs bcs[2];
+};
+
+#define TIMER3_VALUE 7000
+
+/* ======================================================================
+ *
+ */
+
+/*
+ * Submit an URB with error reporting. This is a macro so
+ * the __FUNCTION__ returns the caller function name.
+ */
+#define SUBMIT_URB(urb) \
+({ \
+	int status; \
+	if ((status = usb_submit_urb(urb)) < 0) { \
+		WARN("usb_submit_urb failed,status=%d", status); \
+	} \
+        status; \
+})
+
+/*
+ * USB double buffering, return the URB index (0 or 1).
+ */
+static inline int get_buf_nr(struct urb *urbs[], struct urb *urb)
+{
+        return (urbs[0]==urb ? 0 : 1); 
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* B Channel */
+
+int  st5481_setup_b(struct st5481_bcs *bcs);
+void st5481_release_b(struct st5481_bcs *bcs);
+void st5481_d_l2l1(struct hisax_if *hisax_d_if, int pr, void *arg);
+
+/* D Channel */
+
+int  st5481_setup_d(struct st5481_adapter *adapter);
+void st5481_release_d(struct st5481_adapter *adapter);
+void st5481_b_l2l1(struct hisax_if *b_if, int pr, void *arg);
+int  st5481_d_init(void);
+void st5481_d_exit(void);
+
+/* USB */
+void st5481_ph_command(struct st5481_adapter *adapter, unsigned int command);
+int st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev, 
+			   unsigned int pipe, int num_packets,
+			   int packet_size, int buf_size,
+			   usb_complete_t complete, void *context);
+void st5481_release_isocpipes(struct urb* urb[2]);
+
+int  st5481_isoc_flatten(struct urb *urb);
+void st5481_usb_pipe_reset(struct st5481_adapter *adapter,
+		    u_char pipe, ctrl_complete_t complete, void *context);
+void st5481_usb_ctrl_msg(struct st5481_adapter *adapter,
+		  u8 request, u8 requesttype, u16 value, u16 index,
+		  ctrl_complete_t complete, void *context);
+void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter,
+			 u8 request, u16 value,
+			 ctrl_complete_t complete, void *context);
+int  st5481_setup_usb(struct st5481_adapter *adapter);
+void st5481_release_usb(struct st5481_adapter *adapter);
+void st5481_start(struct st5481_adapter *adapter);
+void st5481_stop(struct st5481_adapter *adapter);
+
+// ----------------------------------------------------------------------
+// debugging macros
+
+#define __debug_variable st5481_debug
+#include "hisax_debug.h"
+
+#ifdef CONFIG_HISAX_DEBUG
+
+extern int st5481_debug;
+
+#define DBG_ISO_PACKET(level,urb) \
+  if (level & __debug_variable) dump_iso_packet(__FUNCTION__,urb)
+
+static void __attribute__((unused))
+dump_iso_packet(const char *name,urb_t *urb)
+{
+	int i,j;
+	int len,ofs;
+	u_char *data;
+
+	printk(KERN_DEBUG "%s: packets=%d,errors=%d\n",
+	       name,urb->number_of_packets,urb->error_count);
+	for (i = 0; i  < urb->number_of_packets; ++i) {
+		if (urb->pipe & USB_DIR_IN) {
+			len = urb->iso_frame_desc[i].actual_length;
+		} else {
+			len = urb->iso_frame_desc[i].length;
+		}
+		ofs = urb->iso_frame_desc[i].offset;
+		printk(KERN_DEBUG "len=%.2d,ofs=%.3d ",len,ofs);
+		if (len) {
+			data = urb->transfer_buffer+ofs;
+			for (j=0; j < len; j++) {
+				printk ("%.2x", data[j]);
+			}
+		}
+		printk("\n");
+	}
+}
+
+static inline const char *ST5481_CMD_string(int evt)
+{
+	static char s[16];
+
+	switch (evt) {
+	case ST5481_CMD_DR: return "DR";
+	case ST5481_CMD_RES: return "RES";
+	case ST5481_CMD_TM1: return "TM1";
+	case ST5481_CMD_TM2: return "TM2";
+	case ST5481_CMD_PUP: return "PUP";
+	case ST5481_CMD_AR8: return "AR8";
+	case ST5481_CMD_AR10: return "AR10";
+	case ST5481_CMD_ARL: return "ARL";
+	case ST5481_CMD_PDN: return "PDN";
+	};
+	
+	sprintf(s,"0x%x",evt);
+	return s;
+}	
+
+#else
+
+#define DBG_ISO_PACKET(level,urb) do {} while (0)
+
+#endif
+
+
+
+#endif 
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/st5481_b.c linux/drivers/isdn/hisax/st5481_b.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/st5481_b.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/st5481_b.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,367 @@
+/*
+ * Driver for ST5481 USB ISDN modem
+ *
+ * Author       Frode Isaksen
+ * Copyright    2001 by Frode Isaksen      <fisaksen@bewan.com>
+ *              2001 by Kai Germaschewski  <kai.germaschewski@gmx.de>
+ * 
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/usb.h>
+#include <linux/slab.h>
+#include <linux/netdevice.h>
+#include "st5481.h"
+
+static inline void B_L1L2(struct st5481_bcs *bcs, int pr, void *arg)
+{
+	struct hisax_if *ifc = (struct hisax_if *) &bcs->b_if;
+
+	ifc->l1l2(ifc, pr, arg);
+}
+
+/*
+ * Encode and transmit next frame.
+ */
+static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
+{
+	struct st5481_b_out *b_out = &bcs->b_out;
+	struct st5481_adapter *adapter = bcs->adapter;
+	struct urb *urb;
+	unsigned int packet_size,offset;
+	int len,buf_size,bytes_sent;
+	int i;
+	struct sk_buff *skb;
+	
+	if (test_and_set_bit(buf_nr, &b_out->busy)) {
+		DBG(4,"ep %d urb %d busy",(bcs->channel+1)*2,buf_nr);
+		return;
+	}
+	urb = b_out->urb[buf_nr];
+
+	// Adjust isoc buffer size according to flow state
+	if(b_out->flow_event & (OUT_DOWN | OUT_UNDERRUN)) {
+		buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST;
+		packet_size = SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST;
+		DBG(4,"B%d,adjust flow,add %d bytes",bcs->channel+1,B_FLOW_ADJUST);
+	} else if(b_out->flow_event & OUT_UP){
+		buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST;
+		packet_size = SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST;
+		DBG(4,"B%d,adjust flow,remove %d bytes",bcs->channel+1,B_FLOW_ADJUST);
+	} else {
+		buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT;
+		packet_size = 8;
+	}
+	b_out->flow_event = 0;
+
+	len = 0;
+	while (len < buf_size) {
+		if ((skb = b_out->tx_skb)) {
+			DBG_SKB(0x100, skb);
+			DBG(4,"B%d,len=%d",bcs->channel+1,skb->len);
+			
+			if (bcs->mode == L1_MODE_TRANS) {	
+				bytes_sent = buf_size - len;
+				if (skb->len < bytes_sent)
+					bytes_sent = skb->len;
+
+				memcpy(urb->transfer_buffer+len, skb->data, bytes_sent);
+				
+				len += bytes_sent;
+			} else {
+				len += hdlc_encode(&b_out->hdlc_state, 
+						   skb->data, skb->len, &bytes_sent,
+						   urb->transfer_buffer+len, buf_size-len);
+			}
+
+			skb_pull(skb, bytes_sent);
+			
+			if (!skb->len) {
+				// Frame sent
+				b_out->tx_skb = NULL;
+				B_L1L2(bcs, PH_DATA | CONFIRM, (void *) skb->truesize);
+				dev_kfree_skb_any(skb);
+				
+/* 				if (!(bcs->tx_skb = skb_dequeue(&bcs->sq))) { */
+/* 					st5481B_sched_event(bcs, B_XMTBUFREADY); */
+/* 				} */
+			}
+		} else {
+			if (bcs->mode == L1_MODE_TRANS) {
+				memset(urb->transfer_buffer+len, 0xff, buf_size-len);
+				len = buf_size;
+			} else {
+				// Send flags
+				len += hdlc_encode(&b_out->hdlc_state, 
+						   NULL, 0, &bytes_sent,
+						   urb->transfer_buffer+len, buf_size-len);
+			}
+		}	
+	}
+
+	// Prepare the URB
+	for (i = 0, offset = 0; offset < len; i++) {
+		urb->iso_frame_desc[i].offset = offset;
+		urb->iso_frame_desc[i].length = packet_size;
+		offset += packet_size;
+		packet_size = SIZE_ISO_PACKETS_B_OUT;
+	}
+	urb->transfer_buffer_length = len;
+	urb->number_of_packets = i;
+	urb->dev = adapter->usb_dev;
+
+	DBG_ISO_PACKET(0x200,urb);
+
+	SUBMIT_URB(urb);
+}
+
+/*
+ * Start transfering (flags or data) on the B channel, since
+ * FIFO counters has been set to a non-zero value.
+ */
+static void st5481B_start_xfer(void *context)
+{
+	struct st5481_bcs *bcs = context;
+
+	DBG(4,"B%d",bcs->channel+1);
+
+	// Start transmitting (flags or data) on B channel
+
+	usb_b_out(bcs,0);
+	usb_b_out(bcs,1);
+}
+
+/*
+ * If the adapter has only 2 LEDs, the green
+ * LED will blink with a rate depending
+ * on the number of channels opened.
+ */
+static void led_blink(struct st5481_adapter *adapter)
+{
+	u_char leds = adapter->leds;
+
+	// 50 frames/sec for each channel
+	if (++adapter->led_counter % 50) {
+		return;
+	}
+
+	if (adapter->led_counter % 100) {
+		leds |= GREEN_LED;
+	} else {
+		leds &= ~GREEN_LED;
+	}
+	
+	st5481_usb_device_ctrl_msg(adapter, GPIO_OUT, leds, NULL, NULL);
+}
+
+static void usb_b_out_complete(struct urb *urb)
+{
+	struct st5481_bcs *bcs = urb->context;
+	struct st5481_b_out *b_out = &bcs->b_out;
+	struct st5481_adapter *adapter = bcs->adapter;
+	int buf_nr;
+	
+	buf_nr = get_buf_nr(b_out->urb, urb);
+	test_and_clear_bit(buf_nr, &b_out->busy);
+
+	if (urb->status < 0) {
+		if (urb->status != USB_ST_URB_KILLED) {
+			WARN("urb status %d",urb->status);
+			if (b_out->busy == 0) {
+				st5481_usb_pipe_reset(adapter, (bcs->channel+1)*2 | USB_DIR_OUT, NULL, NULL);
+			}
+		} else {
+			DBG(1,"urb killed"); 
+			return; // Give up
+		}
+	}
+
+	usb_b_out(bcs,buf_nr);
+
+	if (adapter->number_of_leds == 2)
+		led_blink(adapter);
+}
+
+/*
+ * Start or stop the transfer on the B channel.
+ */
+static void st5481B_mode(struct st5481_bcs *bcs, int mode)
+{
+	struct st5481_b_out *b_out = &bcs->b_out;
+	struct st5481_adapter *adapter = bcs->adapter;
+
+	DBG(4,"B%d,mode=%d", bcs->channel + 1, mode);
+
+	if (bcs->mode == mode)
+		return;
+
+	bcs->mode = mode;
+
+	// Cancel all USB transfers on this B channel
+	usb_unlink_urb(b_out->urb[0]);
+	usb_unlink_urb(b_out->urb[1]);
+	b_out->busy = 0;
+
+	st5481_in_mode(&bcs->b_in, mode);
+	if (bcs->mode != L1_MODE_NULL) {
+		// Open the B channel
+		if (bcs->mode != L1_MODE_TRANS) {
+			hdlc_out_init(&b_out->hdlc_state, 0, bcs->mode == L1_MODE_HDLC_56K);
+		}
+		st5481_usb_pipe_reset(adapter, (bcs->channel+1)*2, NULL, NULL);
+	
+		// Enable B channel interrupts
+		st5481_usb_device_ctrl_msg(adapter, FFMSK_B1+(bcs->channel*2), 
+				    OUT_UP+OUT_DOWN+OUT_UNDERRUN, NULL, NULL);
+
+		// Enable B channel FIFOs
+		st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel*2), 32, st5481B_start_xfer, bcs);
+		if (adapter->number_of_leds == 4) {
+			if (bcs->channel == 0) {
+				adapter->leds |= B1_LED;
+			} else {
+				adapter->leds |= B2_LED;
+			}
+		}
+	} else {
+		// Disble B channel interrupts
+		st5481_usb_device_ctrl_msg(adapter, FFMSK_B1+(bcs->channel*2), 0, NULL, NULL);
+
+		// Disable B channel FIFOs
+		st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel*2), 0, NULL, NULL);
+
+		if (adapter->number_of_leds == 4) {
+			if (bcs->channel == 0) {
+				adapter->leds &= ~B1_LED;
+			} else {
+				adapter->leds &= ~B2_LED;
+			}
+		} else {
+			st5481_usb_device_ctrl_msg(adapter, GPIO_OUT, adapter->leds, NULL, NULL);
+		}
+		if (b_out->tx_skb) {
+			dev_kfree_skb_any(b_out->tx_skb);
+			b_out->tx_skb = NULL;
+		}
+		
+	}
+}
+
+static int __devinit st5481_setup_b_out(struct st5481_bcs *bcs)
+{
+	struct usb_device *dev = bcs->adapter->usb_dev;
+	struct usb_interface_descriptor *altsetting;
+	struct usb_endpoint_descriptor *endpoint;
+  	struct st5481_b_out *b_out = &bcs->b_out;
+
+	DBG(4,"");
+
+	altsetting = &(dev->config->interface[0].altsetting[3]);
+
+	// Allocate URBs and buffers for the B channel out
+	endpoint = &altsetting->endpoint[EP_B1_OUT - 1 + bcs->channel * 2];
+
+	DBG(4,"endpoint address=%02x,packet size=%d",
+	    endpoint->bEndpointAddress,endpoint->wMaxPacketSize);
+
+	// Allocate memory for 8000bytes/sec + extra bytes if underrun
+	return st5481_setup_isocpipes(b_out->urb, dev, 
+				      usb_sndisocpipe(dev, endpoint->bEndpointAddress),
+				      NUM_ISO_PACKETS_B, SIZE_ISO_PACKETS_B_OUT,
+				      NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST,
+				      usb_b_out_complete, bcs);
+}
+
+static void __devexit st5481_release_b_out(struct st5481_bcs *bcs)
+{
+	struct st5481_b_out *b_out = &bcs->b_out;
+
+	DBG(4,"");
+
+	st5481_release_isocpipes(b_out->urb);
+}
+
+int __devinit st5481_setup_b(struct st5481_bcs *bcs)
+{
+	int retval;
+
+	DBG(4,"");
+
+	retval = st5481_setup_b_out(bcs);
+	if (retval)
+		goto err;
+	bcs->b_in.bufsize = HSCX_BUFMAX;
+	bcs->b_in.num_packets = NUM_ISO_PACKETS_B;
+	bcs->b_in.packet_size = SIZE_ISO_PACKETS_B_IN;
+	bcs->b_in.ep = (bcs->channel ? EP_B2_IN : EP_B1_IN) | USB_DIR_IN;
+	bcs->b_in.counter = bcs->channel ? IN_B2_COUNTER : IN_B1_COUNTER;
+	bcs->b_in.adapter = bcs->adapter;
+	bcs->b_in.hisax_if = &bcs->b_if.ifc;
+	retval = st5481_setup_in(&bcs->b_in);
+	if (retval)
+		goto err_b_out;
+
+
+	return 0;
+
+ err_b_out:
+	st5481_release_b_out(bcs);
+ err:
+	return retval;
+}
+
+/*
+ * Release buffers and URBs for the B channels
+ */
+void __devexit st5481_release_b(struct st5481_bcs *bcs)
+{
+	DBG(4,"");
+
+	st5481_release_in(&bcs->b_in);
+	st5481_release_b_out(bcs);
+}
+
+/*
+ * st5481_b_l2l1 is the entry point for upper layer routines that want to
+ * transmit on the B channel.  PH_DATA | REQUEST is a normal packet that
+ * we either start transmitting (if idle) or queue (if busy).
+ * PH_PULL | REQUEST can be called to request a callback message
+ * (PH_PULL | CONFIRM)
+ * once the link is idle.  After a "pull" callback, the upper layer
+ * routines can use PH_PULL | INDICATION to send data.
+ */
+void st5481_b_l2l1(struct hisax_if *ifc, int pr, void *arg)
+{
+	struct st5481_bcs *bcs = ifc->priv;
+	struct sk_buff *skb = arg;
+	int mode;
+
+	DBG(4, "");
+
+	switch (pr) {
+	case PH_DATA | REQUEST:
+		if (bcs->b_out.tx_skb)
+			BUG();
+		
+		bcs->b_out.tx_skb = skb;
+		break;
+	case PH_ACTIVATE | REQUEST:
+		mode = (int) arg;
+		DBG(4,"B%d,PH_ACTIVATE_REQUEST %d", bcs->channel + 1, mode);
+		st5481B_mode(bcs, mode);
+		B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL);
+		break;
+	case PH_DEACTIVATE | REQUEST:
+		DBG(4,"B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
+		st5481B_mode(bcs, L1_MODE_NULL);
+		B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL);
+		break;
+	default:
+		WARN("pr %#x\n", pr);
+	}
+}
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/st5481_d.c linux/drivers/isdn/hisax/st5481_d.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/st5481_d.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/st5481_d.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,774 @@
+/*
+ * Driver for ST5481 USB ISDN modem
+ *
+ * Author       Frode Isaksen
+ * Copyright    2001 by Frode Isaksen      <fisaksen@bewan.com>
+ *              2001 by Kai Germaschewski  <kai.germaschewski@gmx.de>
+ * 
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/usb.h>
+#include <linux/slab.h>
+#include <linux/netdevice.h>
+#include "st5481.h"
+
+static void ph_connect(struct st5481_adapter *adapter);
+static void ph_disconnect(struct st5481_adapter *adapter);
+
+static struct Fsm l1fsm;
+
+static char *strL1State[] =
+{
+	"ST_L1_F3",
+	"ST_L1_F4",
+	"ST_L1_F6",
+	"ST_L1_F7",
+	"ST_L1_F8",
+};
+
+static char *strL1Event[] =
+{
+	"EV_IND_DP",  
+	"EV_IND_1",   
+	"EV_IND_2",   
+	"EV_IND_3",   
+	"EV_IND_RSY", 
+	"EV_IND_5",   
+	"EV_IND_6",   
+	"EV_IND_7",   
+	"EV_IND_AP",  
+	"EV_IND_9",   
+	"EV_IND_10",  
+	"EV_IND_11",  
+	"EV_IND_AI8",
+	"EV_IND_AI10",
+	"EV_IND_AIL",
+	"EV_IND_DI",  
+	"EV_PH_ACTIVATE_REQ",
+	"EV_PH_DEACTIVATE_REQ",
+	"EV_TIMER3",
+};
+
+static inline void D_L1L2(struct st5481_adapter *adapter, int pr, void *arg)
+{
+	struct hisax_if *ifc = (struct hisax_if *) &adapter->hisax_d_if;
+
+	ifc->l1l2(ifc, pr, arg);
+}
+
+static void
+l1_go_f3(struct FsmInst *fi, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fi->userdata;
+
+	if (fi->state == ST_L1_F7)
+		ph_disconnect(adapter);
+	
+	FsmChangeState(fi, ST_L1_F3);
+	D_L1L2(adapter, PH_DEACTIVATE | INDICATION, NULL);
+}
+
+static void
+l1_go_f6(struct FsmInst *fi, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fi->userdata;
+
+	if (fi->state == ST_L1_F7)
+		ph_disconnect(adapter);
+
+	FsmChangeState(fi, ST_L1_F6);
+}
+
+static void
+l1_go_f7(struct FsmInst *fi, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fi->userdata;
+
+	FsmDelTimer(&adapter->timer, 0);
+	ph_connect(adapter);
+	FsmChangeState(fi, ST_L1_F7);
+	D_L1L2(adapter, PH_ACTIVATE | INDICATION, NULL);
+}
+
+static void
+l1_go_f8(struct FsmInst *fi, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fi->userdata;
+
+	if (fi->state == ST_L1_F7)
+		ph_disconnect(adapter);
+
+	FsmChangeState(fi, ST_L1_F8);
+}
+
+static void
+l1_timer3(struct FsmInst *fi, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fi->userdata;
+
+	st5481_ph_command(adapter, ST5481_CMD_DR);
+	FsmChangeState(fi, ST_L1_F3);
+	D_L1L2(adapter, PH_DEACTIVATE | INDICATION, NULL);
+}
+
+static void
+l1_ignore(struct FsmInst *fi, int event, void *arg)
+{
+}
+
+static void
+l1_activate(struct FsmInst *fi, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fi->userdata;
+
+	st5481_ph_command(adapter, ST5481_CMD_DR);
+	st5481_ph_command(adapter, ST5481_CMD_PUP);
+	FsmRestartTimer(&adapter->timer, TIMER3_VALUE, EV_TIMER3, NULL, 2);
+	st5481_ph_command(adapter, ST5481_CMD_AR8);
+	FsmChangeState(fi, ST_L1_F4);
+}
+
+static struct FsmNode L1FnList[] __initdata =
+{
+	{ST_L1_F3, EV_IND_DP,            l1_ignore},
+	{ST_L1_F3, EV_IND_AP,            l1_go_f6},
+	{ST_L1_F3, EV_IND_AI8,           l1_go_f7},
+	{ST_L1_F3, EV_IND_AI10,          l1_go_f7},
+	{ST_L1_F3, EV_PH_ACTIVATE_REQ,   l1_activate},
+
+	{ST_L1_F4, EV_TIMER3,            l1_timer3},
+	{ST_L1_F4, EV_IND_DP,            l1_go_f3},
+	{ST_L1_F4, EV_IND_AP,            l1_go_f6},
+	{ST_L1_F4, EV_IND_AI8,           l1_go_f7},
+	{ST_L1_F4, EV_IND_AI10,          l1_go_f7},
+
+	{ST_L1_F6, EV_TIMER3,            l1_timer3},
+	{ST_L1_F6, EV_IND_DP,            l1_go_f3},
+	{ST_L1_F6, EV_IND_AP,            l1_ignore},
+	{ST_L1_F6, EV_IND_AI8,           l1_go_f7},
+	{ST_L1_F6, EV_IND_AI10,          l1_go_f7},
+	{ST_L1_F7, EV_IND_RSY,           l1_go_f8},
+
+	{ST_L1_F7, EV_IND_DP,            l1_go_f3},
+	{ST_L1_F7, EV_IND_AP,            l1_go_f6},
+	{ST_L1_F7, EV_IND_AI8,           l1_ignore},
+	{ST_L1_F7, EV_IND_AI10,          l1_ignore},
+	{ST_L1_F7, EV_IND_RSY,           l1_go_f8},
+
+	{ST_L1_F8, EV_TIMER3,            l1_timer3},
+	{ST_L1_F8, EV_IND_DP,            l1_go_f3},
+	{ST_L1_F8, EV_IND_AP,            l1_go_f6},
+	{ST_L1_F8, EV_IND_AI8,           l1_go_f8},
+	{ST_L1_F8, EV_IND_AI10,          l1_go_f8},
+	{ST_L1_F8, EV_IND_RSY,           l1_ignore},
+};
+
+static void l1m_debug(struct FsmInst *fi, char *fmt, ...)
+{
+	va_list args;
+	char buf[256];
+	
+	va_start(args, fmt);
+	vsprintf(buf, fmt, args);
+	printk("buf %s\n", buf);
+	DBG(8, "%s", buf);
+	va_end(args);
+}
+
+/* ======================================================================
+ * D-Channel out
+ */
+
+/*
+  D OUT state machine:
+  ====================
+
+  Transmit short frame (< 16 bytes of encoded data):
+
+  L1 FRAME    D_OUT_STATE           USB                  D CHANNEL
+  --------    -----------           ---                  ---------
+ 
+              FIXME
+
+ -> [xx..xx]  SHORT_INIT            -> [7Exx..xxC1C27EFF]
+              SHORT_WAIT_DEN        <> OUT_D_COUNTER=16 
+                                                 
+              END_OF_SHORT          <- DEN_EVENT         -> 7Exx
+                                                          xxxx 
+                                                          xxxx
+							  xxxx 
+							  xxxx
+							  xxxx
+							  C1C1 
+							  7EFF 
+              WAIT_FOR_RESET_IDLE   <- D_UNDERRUN        <- (8ms)                        
+              IDLE                  <> Reset pipe
+
+              
+
+  Transmit long frame (>= 16 bytes of encoded data):
+
+  L1 FRAME    D_OUT_STATE           USB                  D CHANNEL
+  --------    -----------           ---                  ---------
+
+ -> [xx...xx] IDLE
+              WAIT_FOR_STOP         <> OUT_D_COUNTER=0
+              WAIT_FOR_RESET        <> Reset pipe
+	      STOP
+	      INIT_LONG_FRAME       -> [7Exx..xx]
+              WAIT_DEN              <> OUT_D_COUNTER=16 
+              OUT_NORMAL            <- DEN_EVENT       -> 7Exx
+              END_OF_FRAME_BUSY     -> [xxxx]             xxxx 
+              END_OF_FRAME_NOT_BUSY -> [xxxx]             xxxx
+				    -> [xxxx]		  xxxx 
+				    -> [C1C2]		  xxxx
+				    -> [7EFF]		  xxxx
+							  xxxx 
+							  xxxx 
+                                                          ....
+							  xxxx
+							  C1C2
+							  7EFF
+	                 	    <- D_UNDERRUN      <- (> 8ms)                        
+              WAIT_FOR_STOP         <> OUT_D_COUNTER=0
+              WAIT_FOR_RESET        <> Reset pipe
+	      STOP
+
+*/          
+
+static struct Fsm dout_fsm;
+
+static char *strDoutState[] =
+{
+	"ST_DOUT_NONE",
+
+	"ST_DOUT_SHORT_INIT",
+	"ST_DOUT_SHORT_WAIT_DEN",
+
+	"ST_DOUT_LONG_INIT",
+	"ST_DOUT_LONG_WAIT_DEN",
+	"ST_DOUT_NORMAL",
+
+	"ST_DOUT_WAIT_FOR_UNDERRUN",
+        "ST_DOUT_WAIT_FOR_NOT_BUSY",
+	"ST_DOUT_WAIT_FOR_STOP",
+	"ST_DOUT_WAIT_FOR_RESET",
+};
+
+static char *strDoutEvent[] =
+{
+	"EV_DOUT_START_XMIT",
+	"EV_DOUT_COMPLETE",
+	"EV_DOUT_DEN",
+	"EV_DOUT_RESETED",
+	"EV_DOUT_STOPPED",
+	"EV_DOUT_COLL",
+	"EV_DOUT_UNDERRUN",
+};
+
+static void dout_debug(struct FsmInst *fi, char *fmt, ...)
+{
+	va_list args;
+	char buf[256];
+	
+	va_start(args, fmt);
+	vsprintf(buf, fmt, args);
+	DBG(0x2, "%s", buf);
+	va_end(args);
+}
+
+static void dout_stop_event(void *context)
+{
+	struct st5481_adapter *adapter = context;
+
+	FsmEvent(&adapter->d_out.fsm, EV_DOUT_STOPPED, NULL);
+}
+
+/*
+ * Start the transfer of a D channel frame.
+ */
+static void usb_d_out(struct st5481_adapter *adapter, int buf_nr)
+{
+	struct st5481_d_out *d_out = &adapter->d_out;
+	struct urb *urb;
+	unsigned int num_packets, packet_offset;
+	int len, buf_size, bytes_sent;
+	struct sk_buff *skb;
+	iso_packet_descriptor_t *desc;
+
+	if (d_out->fsm.state != ST_DOUT_NORMAL)
+		return;
+
+	if (test_and_set_bit(buf_nr, &d_out->busy)) {
+		DBG(2, "ep %d urb %d busy %#lx", EP_D_OUT, buf_nr, d_out->busy);
+		return;
+	}
+	urb = d_out->urb[buf_nr];
+
+	skb = d_out->tx_skb;
+
+	buf_size = NUM_ISO_PACKETS_D * SIZE_ISO_PACKETS_D_OUT;
+	
+	if (skb) {
+		len = hdlc_encode(&d_out->hdlc_state, 
+				  skb->data, skb->len, &bytes_sent,
+				  urb->transfer_buffer, buf_size);
+		skb_pull(skb,bytes_sent);
+	} else {
+		// Send flags or idle
+		len = hdlc_encode(&d_out->hdlc_state, 
+				  NULL, 0, &bytes_sent,
+				  urb->transfer_buffer, buf_size);
+	}
+	
+	if (len < buf_size) {
+		FsmChangeState(&d_out->fsm, ST_DOUT_WAIT_FOR_UNDERRUN);
+	}
+	if (skb && !skb->len) {
+		d_out->tx_skb = NULL;
+		D_L1L2(adapter, PH_DATA | CONFIRM, NULL);
+		dev_kfree_skb_any(skb);
+	}
+
+	// Prepare the URB
+	urb->transfer_buffer_length = len;
+	num_packets = 0;
+	packet_offset = 0;
+	while (packet_offset < len) {
+		desc = &urb->iso_frame_desc[num_packets];
+		desc->offset = packet_offset;
+		desc->length = SIZE_ISO_PACKETS_D_OUT;
+		if (len - packet_offset < desc->length)
+			desc->length = len - packet_offset;
+		num_packets++;
+		packet_offset += desc->length;
+	}
+	urb->number_of_packets = num_packets;
+
+	// Prepare the URB
+	urb->dev = adapter->usb_dev;
+	// Need to transmit the next buffer 2ms after the DEN_EVENT
+	urb->transfer_flags = 0;
+	urb->start_frame = usb_get_current_frame_number(adapter->usb_dev)+2;
+
+	DBG_ISO_PACKET(0x20,urb);
+
+	if (usb_submit_urb(urb) < 0) {
+		// There is another URB queued up
+		urb->transfer_flags = USB_ISO_ASAP;
+		SUBMIT_URB(urb);
+	}	
+}
+
+static void fifo_reseted(void *context)
+{
+	struct st5481_adapter *adapter = context;
+
+	FsmEvent(&adapter->d_out.fsm, EV_DOUT_RESETED, NULL);
+}
+
+static void usb_d_out_complete(struct urb *urb)
+{
+	struct st5481_adapter *adapter = urb->context;
+	struct st5481_d_out *d_out = &adapter->d_out;
+	int buf_nr;
+	
+	DBG(2, "");
+
+	buf_nr = get_buf_nr(d_out->urb, urb);
+	test_and_clear_bit(buf_nr, &d_out->busy);
+
+	if (urb->status < 0) {
+		if (urb->status != USB_ST_URB_KILLED) {
+			WARN("urb status %d",urb->status);
+			if (d_out->busy == 0) {
+				st5481_usb_pipe_reset(adapter, EP_D_OUT | USB_DIR_OUT, fifo_reseted, adapter);
+			}
+			return;
+		} else {
+			DBG(1,"urb killed"); 
+			return; // Give up
+		}
+	}
+
+	FsmEvent(&adapter->d_out.fsm, EV_DOUT_COMPLETE, (void *) buf_nr);
+}
+
+/* ====================================================================== */
+
+static void dout_start_xmit(struct FsmInst *fsm, int event, void *arg)
+{
+	// FIXME unify?
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+	struct urb *urb;
+	int len, bytes_sent;
+	struct sk_buff *skb;
+	int buf_nr = 0;
+
+	skb = d_out->tx_skb;
+
+	DBG(2,"len=%d",skb->len);
+
+	hdlc_out_init(&d_out->hdlc_state, 1, 0);
+
+	if (test_and_set_bit(buf_nr, &d_out->busy)) {
+		WARN("ep %d urb %d busy %#lx", EP_D_OUT, buf_nr, d_out->busy);
+		return;
+	}
+	urb = d_out->urb[buf_nr];
+
+	DBG_SKB(0x10, skb);
+	len = hdlc_encode(&d_out->hdlc_state, 
+			  skb->data, skb->len, &bytes_sent,
+			  urb->transfer_buffer, 16);
+	skb_pull(skb, bytes_sent);
+
+	if(len < 16)
+		FsmChangeState(&d_out->fsm, ST_DOUT_SHORT_INIT);
+	else
+		FsmChangeState(&d_out->fsm, ST_DOUT_LONG_INIT);
+
+	if (skb->len == 0) {
+		d_out->tx_skb = NULL;
+		D_L1L2(adapter, PH_DATA | CONFIRM, NULL);
+		dev_kfree_skb_any(skb);
+	}
+
+// Prepare the URB
+	urb->transfer_buffer_length = len;
+
+	urb->iso_frame_desc[0].offset = 0;
+	urb->iso_frame_desc[0].length = len;
+	urb->number_of_packets = 1;
+
+	// Prepare the URB
+	urb->dev = adapter->usb_dev;
+	urb->transfer_flags = USB_ISO_ASAP;
+
+	DBG_ISO_PACKET(0x20,urb);
+	SUBMIT_URB(urb);
+}
+
+static void dout_short_fifo(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	FsmChangeState(&d_out->fsm, ST_DOUT_SHORT_WAIT_DEN);
+	st5481_usb_device_ctrl_msg(adapter, OUT_D_COUNTER, 16, NULL, NULL);
+}
+
+static void dout_end_short_frame(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	FsmChangeState(&d_out->fsm, ST_DOUT_WAIT_FOR_UNDERRUN);
+}
+
+static void dout_long_enable_fifo(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+    
+	st5481_usb_device_ctrl_msg(adapter, OUT_D_COUNTER, 16, NULL, NULL);
+	FsmChangeState(&d_out->fsm, ST_DOUT_LONG_WAIT_DEN);
+}
+
+static void dout_long_den(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	FsmChangeState(&d_out->fsm, ST_DOUT_NORMAL);
+	usb_d_out(adapter, 0);
+	usb_d_out(adapter, 1);
+}
+
+static void dout_reset(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	FsmChangeState(&d_out->fsm, ST_DOUT_WAIT_FOR_RESET);
+	st5481_usb_pipe_reset(adapter, EP_D_OUT | USB_DIR_OUT, fifo_reseted, adapter);
+}
+
+static void dout_stop(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	FsmChangeState(&d_out->fsm, ST_DOUT_WAIT_FOR_STOP);
+	st5481_usb_device_ctrl_msg(adapter, OUT_D_COUNTER, 0, dout_stop_event, adapter);
+}
+
+static void dout_underrun(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	if (test_bit(0, &d_out->busy) || test_bit(1, &d_out->busy)) {
+		FsmChangeState(&d_out->fsm, ST_DOUT_WAIT_FOR_NOT_BUSY);
+	}  else {
+		dout_stop(fsm, event, arg);
+	}
+}
+
+static void dout_check_busy(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	if (!test_bit(0, &d_out->busy) && !test_bit(1, &d_out->busy))
+		dout_stop(fsm, event, arg);
+}
+
+static void dout_reseted(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	FsmChangeState(&d_out->fsm, ST_DOUT_NONE);
+	// FIXME locking
+	if (d_out->tx_skb)
+		FsmEvent(&d_out->fsm, EV_DOUT_START_XMIT, NULL);
+}
+
+static void dout_complete(struct FsmInst *fsm, int event, void *arg)
+{
+	struct st5481_adapter *adapter = fsm->userdata;
+	int buf_nr = (int) arg;
+
+	usb_d_out(adapter, buf_nr);
+}
+
+static void dout_ignore(struct FsmInst *fsm, int event, void *arg)
+{
+}
+
+static struct FsmNode DoutFnList[] __initdata =
+{
+	{ST_DOUT_NONE,                   EV_DOUT_START_XMIT,   dout_start_xmit},
+
+	{ST_DOUT_SHORT_INIT,             EV_DOUT_COMPLETE,     dout_short_fifo},
+
+	{ST_DOUT_SHORT_WAIT_DEN,         EV_DOUT_DEN,          dout_end_short_frame},
+	{ST_DOUT_SHORT_WAIT_DEN,         EV_DOUT_UNDERRUN,     dout_underrun},
+
+	{ST_DOUT_LONG_INIT,              EV_DOUT_COMPLETE,     dout_long_enable_fifo},
+
+	{ST_DOUT_LONG_WAIT_DEN,          EV_DOUT_DEN,          dout_long_den},
+	{ST_DOUT_LONG_WAIT_DEN,          EV_DOUT_UNDERRUN,     dout_underrun},
+
+	{ST_DOUT_NORMAL,                 EV_DOUT_UNDERRUN,     dout_underrun},
+	{ST_DOUT_NORMAL,                 EV_DOUT_COMPLETE,     dout_complete},
+
+	{ST_DOUT_WAIT_FOR_UNDERRUN,      EV_DOUT_UNDERRUN,     dout_underrun},
+	{ST_DOUT_WAIT_FOR_UNDERRUN,      EV_DOUT_COMPLETE,     dout_ignore},
+
+	{ST_DOUT_WAIT_FOR_NOT_BUSY,      EV_DOUT_COMPLETE,     dout_check_busy},
+
+	{ST_DOUT_WAIT_FOR_STOP,          EV_DOUT_STOPPED,      dout_reset},
+
+	{ST_DOUT_WAIT_FOR_RESET,         EV_DOUT_RESETED,      dout_reseted},
+};
+
+void st5481_d_l2l1(struct hisax_if *hisax_d_if, int pr, void *arg)
+{
+	struct st5481_adapter *adapter = hisax_d_if->priv;
+	struct sk_buff *skb = arg;
+
+	switch (pr) {
+	case PH_ACTIVATE | REQUEST:
+		FsmEvent(&adapter->l1m, EV_PH_ACTIVATE_REQ, NULL);
+		break;
+	case PH_DEACTIVATE | REQUEST:
+		FsmEvent(&adapter->l1m, EV_PH_DEACTIVATE_REQ, NULL);
+		break;
+	case PH_DATA | REQUEST:
+		DBG(2, "PH_DATA REQUEST len %d", skb->len);
+		if (adapter->d_out.tx_skb)
+			BUG();
+
+		adapter->d_out.tx_skb = skb;
+		FsmEvent(&adapter->d_out.fsm, EV_DOUT_START_XMIT, NULL);
+		break;
+	default:
+		WARN("pr %#x\n", pr);
+		break;
+	}
+}
+
+/* ======================================================================
+ */
+
+/*
+ * Start receiving on the D channel since entered state F7.
+ */
+static void ph_connect(struct st5481_adapter *adapter)
+{
+	struct st5481_d_out *d_out = &adapter->d_out;
+	struct st5481_in *d_in = &adapter->d_in;
+
+	DBG(8,"");
+		
+	FsmChangeState(&d_out->fsm, ST_DOUT_NONE);
+
+	//	st5481_usb_device_ctrl_msg(adapter, FFMSK_D, OUT_UNDERRUN, NULL, NULL);
+	st5481_usb_device_ctrl_msg(adapter, FFMSK_D, 0xfc, NULL, NULL);
+	st5481_in_mode(d_in, L1_MODE_HDLC);
+
+#if LOOPBACK
+	// Turn loopback on (data sent on B and D looped back)
+	st5481_usb_device_ctrl_msg(cs, LBB, 0x04, NULL, NULL);
+#endif
+
+	st5481_usb_pipe_reset(adapter, EP_D_OUT | USB_DIR_OUT, NULL, NULL);
+
+	// Turn on the green LED to tell that we are in state F7
+	adapter->leds |= GREEN_LED;
+	st5481_usb_device_ctrl_msg(adapter, GPIO_OUT, adapter->leds, NULL, NULL);
+}
+
+/*
+ * Stop receiving on the D channel since not in state F7.
+ */
+static void ph_disconnect(struct st5481_adapter *adapter)
+{
+	DBG(8,"");
+
+	st5481_in_mode(&adapter->d_in, L1_MODE_NULL);
+
+	// Turn off the green LED to tell that we left state F7
+	adapter->leds &= ~GREEN_LED;
+	st5481_usb_device_ctrl_msg(adapter, GPIO_OUT, adapter->leds, NULL, NULL);
+}
+
+static int __devinit st5481_setup_d_out(struct st5481_adapter *adapter)
+{
+	struct usb_device *dev = adapter->usb_dev;
+	struct usb_interface_descriptor *altsetting;
+	struct usb_endpoint_descriptor *endpoint;
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	DBG(2,"");
+
+	altsetting = &(dev->config->interface[0].altsetting[3]);
+
+	// Allocate URBs and buffers for the D channel out
+	endpoint = &altsetting->endpoint[EP_D_OUT-1];
+
+	DBG(2,"endpoint address=%02x,packet size=%d",
+	    endpoint->bEndpointAddress,endpoint->wMaxPacketSize);
+
+	return st5481_setup_isocpipes(d_out->urb, dev, 
+				      usb_sndisocpipe(dev, endpoint->bEndpointAddress),
+				      NUM_ISO_PACKETS_D, SIZE_ISO_PACKETS_D_OUT,
+				      NUM_ISO_PACKETS_D * SIZE_ISO_PACKETS_D_OUT,
+				      usb_d_out_complete, adapter);
+}
+
+static void __devexit st5481_release_d_out(struct st5481_adapter *adapter)
+{
+	struct st5481_d_out *d_out = &adapter->d_out;
+
+	DBG(2,"");
+
+	st5481_release_isocpipes(d_out->urb);
+}
+
+int __devinit st5481_setup_d(struct st5481_adapter *adapter)
+{
+	int retval;
+
+	DBG(2,"");
+
+	retval = st5481_setup_d_out(adapter);
+	if (retval)
+		goto err;
+	adapter->d_in.bufsize = MAX_DFRAME_LEN_L1;
+	adapter->d_in.num_packets = NUM_ISO_PACKETS_D;
+	adapter->d_in.packet_size = SIZE_ISO_PACKETS_D_IN;
+	adapter->d_in.ep = EP_D_IN | USB_DIR_IN;
+	adapter->d_in.counter = IN_D_COUNTER;
+	adapter->d_in.adapter = adapter;
+	adapter->d_in.hisax_if = &adapter->hisax_d_if.ifc;
+	retval = st5481_setup_in(&adapter->d_in);
+	if (retval)
+		goto err_d_out;
+
+	adapter->l1m.fsm = &l1fsm;
+	adapter->l1m.state = ST_L1_F3;
+	adapter->l1m.debug = 1;
+	adapter->l1m.userdata = adapter;
+	adapter->l1m.printdebug = l1m_debug;
+	FsmInitTimer(&adapter->l1m, &adapter->timer);
+
+	adapter->d_out.fsm.fsm = &dout_fsm;
+	adapter->d_out.fsm.state = ST_DOUT_NONE;
+	adapter->d_out.fsm.debug = 1;
+	adapter->d_out.fsm.userdata = adapter;
+	adapter->d_out.fsm.printdebug = dout_debug;
+
+	return 0;
+
+ err_d_out:
+	st5481_release_d_out(adapter);
+ err:
+	return retval;
+}
+
+void __devexit st5481_release_d(struct st5481_adapter *adapter)
+{
+	DBG(2,"");
+
+	st5481_release_in(&adapter->d_in);
+	st5481_release_d_out(adapter);
+}
+
+/* ======================================================================
+ * init / exit
+ */
+
+int __init st5481_d_init(void)
+{
+	int retval;
+
+	l1fsm.state_count = L1_STATE_COUNT;
+	l1fsm.event_count = L1_EVENT_COUNT;
+	l1fsm.strEvent = strL1Event;
+	l1fsm.strState = strL1State;
+	retval = FsmNew(&l1fsm, L1FnList, ARRAY_SIZE(L1FnList));
+	if (retval)
+		goto err;
+
+	dout_fsm.state_count = DOUT_STATE_COUNT;
+	dout_fsm.event_count = DOUT_EVENT_COUNT;
+	dout_fsm.strEvent = strDoutEvent;
+	dout_fsm.strState = strDoutState;
+	retval = FsmNew(&dout_fsm, DoutFnList, ARRAY_SIZE(DoutFnList));
+	if (retval)
+		goto err_l1;
+
+	return 0;
+
+ err_l1:
+	FsmFree(&l1fsm);
+ err:
+	return retval;
+}
+
+// can't be __exit
+void st5481_d_exit(void)
+{
+	FsmFree(&l1fsm);
+	FsmFree(&dout_fsm);
+}
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/st5481_hdlc.c linux/drivers/isdn/hisax/st5481_hdlc.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/st5481_hdlc.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/st5481_hdlc.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,620 @@
+/*
+ * Driver for ST5481 USB ISDN modem
+ *
+ * Author       Frode Isaksen
+ * Copyright    2001 by Frode Isaksen      <fisaksen@bewan.com>
+ *              2001 by Kai Germaschewski  <kai.germaschewski@gmx.de>
+ * 
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ *
+ */
+
+#include "st5481_hdlc.h"
+
+static const unsigned short int crc16_tab[] = {
+	0x0000,0x1189,0x2312,0x329b,0x4624,0x57ad,0x6536,0x74bf,
+	0x8c48,0x9dc1,0xaf5a,0xbed3,0xca6c,0xdbe5,0xe97e,0xf8f7,
+	0x1081,0x0108,0x3393,0x221a,0x56a5,0x472c,0x75b7,0x643e,
+	0x9cc9,0x8d40,0xbfdb,0xae52,0xdaed,0xcb64,0xf9ff,0xe876,
+	0x2102,0x308b,0x0210,0x1399,0x6726,0x76af,0x4434,0x55bd,
+	0xad4a,0xbcc3,0x8e58,0x9fd1,0xeb6e,0xfae7,0xc87c,0xd9f5,
+	0x3183,0x200a,0x1291,0x0318,0x77a7,0x662e,0x54b5,0x453c,
+	0xbdcb,0xac42,0x9ed9,0x8f50,0xfbef,0xea66,0xd8fd,0xc974,
+	0x4204,0x538d,0x6116,0x709f,0x0420,0x15a9,0x2732,0x36bb,
+	0xce4c,0xdfc5,0xed5e,0xfcd7,0x8868,0x99e1,0xab7a,0xbaf3,
+	0x5285,0x430c,0x7197,0x601e,0x14a1,0x0528,0x37b3,0x263a,
+	0xdecd,0xcf44,0xfddf,0xec56,0x98e9,0x8960,0xbbfb,0xaa72,
+	0x6306,0x728f,0x4014,0x519d,0x2522,0x34ab,0x0630,0x17b9,
+	0xef4e,0xfec7,0xcc5c,0xddd5,0xa96a,0xb8e3,0x8a78,0x9bf1,
+	0x7387,0x620e,0x5095,0x411c,0x35a3,0x242a,0x16b1,0x0738,
+	0xffcf,0xee46,0xdcdd,0xcd54,0xb9eb,0xa862,0x9af9,0x8b70,
+	0x8408,0x9581,0xa71a,0xb693,0xc22c,0xd3a5,0xe13e,0xf0b7,
+	0x0840,0x19c9,0x2b52,0x3adb,0x4e64,0x5fed,0x6d76,0x7cff,
+	0x9489,0x8500,0xb79b,0xa612,0xd2ad,0xc324,0xf1bf,0xe036,
+	0x18c1,0x0948,0x3bd3,0x2a5a,0x5ee5,0x4f6c,0x7df7,0x6c7e,
+	0xa50a,0xb483,0x8618,0x9791,0xe32e,0xf2a7,0xc03c,0xd1b5,
+	0x2942,0x38cb,0x0a50,0x1bd9,0x6f66,0x7eef,0x4c74,0x5dfd,
+	0xb58b,0xa402,0x9699,0x8710,0xf3af,0xe226,0xd0bd,0xc134,
+	0x39c3,0x284a,0x1ad1,0x0b58,0x7fe7,0x6e6e,0x5cf5,0x4d7c,
+	0xc60c,0xd785,0xe51e,0xf497,0x8028,0x91a1,0xa33a,0xb2b3,
+	0x4a44,0x5bcd,0x6956,0x78df,0x0c60,0x1de9,0x2f72,0x3efb,
+	0xd68d,0xc704,0xf59f,0xe416,0x90a9,0x8120,0xb3bb,0xa232,
+	0x5ac5,0x4b4c,0x79d7,0x685e,0x1ce1,0x0d68,0x3ff3,0x2e7a,
+	0xe70e,0xf687,0xc41c,0xd595,0xa12a,0xb0a3,0x8238,0x93b1,
+	0x6b46,0x7acf,0x4854,0x59dd,0x2d62,0x3ceb,0x0e70,0x1ff9,
+	0xf78f,0xe606,0xd49d,0xc514,0xb1ab,0xa022,0x92b9,0x8330,
+	0x7bc7,0x6a4e,0x58d5,0x495c,0x3de3,0x2c6a,0x1ef1,0x0f78
+};
+
+
+
+enum {
+	HDLC_FAST_IDLE,HDLC_GET_FLAG_B0,HDLC_GETFLAG_B1A6,HDLC_GETFLAG_B7,
+	HDLC_GET_DATA,HDLC_FAST_FLAG
+};
+
+enum {
+	HDLC_SEND_DATA,HDLC_SEND_CRC1,HDLC_SEND_FAST_FLAG,
+	HDLC_SEND_FIRST_FLAG,HDLC_SEND_CRC2,HDLC_SEND_CLOSING_FLAG,
+	HDLC_SEND_IDLE1,HDLC_SEND_FAST_IDLE,HDLC_SENDFLAG_B0,
+	HDLC_SENDFLAG_B1A6,HDLC_SENDFLAG_B7,STOPPED
+};
+
+void 
+hdlc_rcv_init(struct hdlc_vars *hdlc, int do_adapt56)
+{
+   	hdlc->bit_shift = 0;
+	hdlc->hdlc_bits1 = 0;
+	hdlc->data_bits = 0;
+	hdlc->ffbit_shift = 0;
+	hdlc->data_received = 0;
+	hdlc->state = HDLC_GET_DATA;
+	hdlc->do_adapt56 = do_adapt56;
+	hdlc->dchannel = 0;
+	hdlc->crc = 0;
+	hdlc->cbin = 0;
+	hdlc->shift_reg = 0;
+	hdlc->ffvalue = 0;
+	hdlc->dstpos = 0;
+}
+
+void 
+hdlc_out_init(struct hdlc_vars *hdlc, int is_d_channel, int do_adapt56)
+{
+   	hdlc->bit_shift = 0;
+	hdlc->hdlc_bits1 = 0;
+	hdlc->data_bits = 0;
+	hdlc->ffbit_shift = 0;
+	hdlc->data_received = 0;
+	hdlc->do_closing = 0;
+	hdlc->ffvalue = 0;
+	if (is_d_channel) {
+		hdlc->dchannel = 1;
+		hdlc->state = HDLC_SEND_FIRST_FLAG;
+	} else {
+		hdlc->dchannel = 0;
+		hdlc->state = HDLC_SEND_FAST_FLAG;
+		hdlc->ffvalue = 0x7e;
+	} 
+	hdlc->cbin = 0x7e;
+	hdlc->bit_shift = 0;
+	if(do_adapt56){
+		hdlc->do_adapt56 = 1;		
+		hdlc->data_bits = 0;
+		hdlc->state = HDLC_SENDFLAG_B0;
+	} else {
+		hdlc->do_adapt56 = 0;		
+		hdlc->data_bits = 8;
+	}
+	hdlc->shift_reg = 0;
+}
+
+/*
+  hdlc_decode - decodes HDLC frames from a transparent bit stream.
+
+  The source buffer is scanned for valid HDLC frames looking for
+  flags (01111110) to indicate the start of a frame. If the start of
+  the frame is found, the bit stuffing is removed (0 after 5 1's).
+  When a new flag is found, the complete frame has been received
+  and the CRC is checked.
+  If a valid frame is found, the function returns the frame length 
+  excluding the CRC with the bit HDLC_END_OF_FRAME set.
+  If the beginning of a valid frame is found, the function returns
+  the length. 
+  If a framing error is found (too many 1s and not a flag) the function 
+  returns the length with the bit HDLC_FRAMING_ERROR set.
+  If a CRC error is found the function returns the length with the
+  bit HDLC_CRC_ERROR set.
+  If the frame length exceeds the destination buffer size, the function
+  returns the length with the bit HDLC_LENGTH_ERROR set.
+
+  src - source buffer
+  slen - source buffer length
+  count - number of bytes removed (decoded) from the source buffer
+  dst _ destination buffer
+  dsize - destination buffer size
+  returns - number of decoded bytes in the destination buffer and status
+  flag.
+ */
+int hdlc_decode(struct hdlc_vars *hdlc, const unsigned char *src,
+		int slen, int *count, unsigned char *dst, int dsize)
+{
+	int status=0;
+
+	static const unsigned char fast_flag[]={
+		0x00,0x00,0x00,0x20,0x30,0x38,0x3c,0x3e,0x3f
+	};
+
+	static const unsigned char fast_flag_value[]={
+		0x00,0x7e,0xfc,0xf9,0xf3,0xe7,0xcf,0x9f,0x3f
+	};
+
+	static const unsigned char fast_abort[]={
+		0x00,0x00,0x80,0xc0,0xe0,0xf0,0xf8,0xfc,0xfe,0xff
+	};
+
+	*count = slen;
+
+	while(slen > 0){
+		if(hdlc->bit_shift==0){
+			hdlc->cbin = *src++;
+			slen--;
+			hdlc->bit_shift = 8;
+			if(hdlc->do_adapt56){
+				hdlc->bit_shift --;
+			}
+		}
+
+		switch(hdlc->state){
+		case STOPPED:
+			return 0;
+		case HDLC_FAST_IDLE:
+			if(hdlc->cbin == 0xff){
+				hdlc->bit_shift = 0;
+				break;
+			}
+			hdlc->state = HDLC_GET_FLAG_B0;
+			hdlc->hdlc_bits1 = 0;
+			hdlc->bit_shift = 8;
+			break;
+		case HDLC_GET_FLAG_B0:
+			if(!(hdlc->cbin & 0x80)) {
+				hdlc->state = HDLC_GETFLAG_B1A6;
+				hdlc->hdlc_bits1 = 0;
+			} else {
+				if(!hdlc->do_adapt56){
+					if(++hdlc->hdlc_bits1 >=8 ) if(hdlc->bit_shift==1)
+						hdlc->state = HDLC_FAST_IDLE;
+				}
+			}
+			hdlc->cbin<<=1;
+			hdlc->bit_shift --;
+			break;
+		case HDLC_GETFLAG_B1A6:
+			if(hdlc->cbin & 0x80){
+				hdlc->hdlc_bits1++;
+				if(hdlc->hdlc_bits1==6){
+					hdlc->state = HDLC_GETFLAG_B7;
+				}
+			} else {
+				hdlc->hdlc_bits1 = 0;
+			}
+			hdlc->cbin<<=1;
+			hdlc->bit_shift --;
+			break;
+		case HDLC_GETFLAG_B7:
+			if(hdlc->cbin & 0x80) {
+				hdlc->state = HDLC_GET_FLAG_B0;
+			} else {
+				hdlc->state = HDLC_GET_DATA;
+				hdlc->crc = 0xffff;
+				hdlc->shift_reg = 0;
+				hdlc->hdlc_bits1 = 0;
+				hdlc->data_bits = 0;
+				hdlc->data_received = 0;
+			}
+			hdlc->cbin<<=1;
+			hdlc->bit_shift --;
+			break;
+		case HDLC_GET_DATA:
+			if(hdlc->cbin & 0x80){
+				hdlc->hdlc_bits1++;
+				switch(hdlc->hdlc_bits1){
+				case 6:
+					break;
+				case 7:
+					if(hdlc->data_received) {
+						// bad frame
+						status = -HDLC_FRAMING_ERROR;
+					}
+					if(!hdlc->do_adapt56){
+						if(hdlc->cbin==fast_abort[hdlc->bit_shift+1]){
+							hdlc->state = HDLC_FAST_IDLE;
+							hdlc->bit_shift=1;
+							break;
+						}
+					} else {
+						hdlc->state = HDLC_GET_FLAG_B0;
+					}
+					break;
+				default:
+					hdlc->shift_reg>>=1;
+					hdlc->shift_reg |= 0x80;
+					hdlc->data_bits++;
+					break;
+				}
+			} else {
+				switch(hdlc->hdlc_bits1){
+				case 5:
+					break;
+				case 6:
+					if(hdlc->data_received){
+						if (hdlc->dstpos < 2) {
+							status = -HDLC_FRAMING_ERROR;
+						} else if (hdlc->crc != 0xf0b8){
+							// crc error
+							status = -HDLC_CRC_ERROR;
+						} else {
+							// remove CRC
+							hdlc->dstpos -= 2;
+							// good frame
+							status = hdlc->dstpos;
+						}
+					}
+					hdlc->crc = 0xffff;
+					hdlc->shift_reg = 0;
+					hdlc->data_bits = 0;
+					if(!hdlc->do_adapt56){
+						if(hdlc->cbin==fast_flag[hdlc->bit_shift]){
+							hdlc->ffvalue = fast_flag_value[hdlc->bit_shift];
+							hdlc->state = HDLC_FAST_FLAG;
+							hdlc->ffbit_shift = hdlc->bit_shift;
+							hdlc->bit_shift = 1;
+						} else {
+							hdlc->state = HDLC_GET_DATA;
+							hdlc->data_received = 0;
+						}
+					} else {
+						hdlc->state = HDLC_GET_DATA;
+						hdlc->data_received = 0;
+					}
+					break;
+				default:
+					hdlc->shift_reg>>=1;
+					hdlc->data_bits++;
+					break;
+				}
+				hdlc->hdlc_bits1 = 0;
+			}
+			if (status) {
+				hdlc->dstpos = 0;
+				*count -= slen;
+				hdlc->cbin <<= 1;
+				hdlc->bit_shift--;
+				return status;
+			}
+			if(hdlc->data_bits==8){
+				unsigned cval;
+				
+				hdlc->data_bits = 0;
+				hdlc->data_received = 1;
+				cval = (hdlc->crc^hdlc->shift_reg) & 0xff;
+				hdlc->crc = (hdlc->crc>>8)^crc16_tab[cval];
+				// good byte received
+				if (dsize--) {
+					dst[hdlc->dstpos++] = hdlc->shift_reg;
+				} else {
+					// frame too long
+					status = -HDLC_LENGTH_ERROR;
+					hdlc->dstpos = 0;
+				}
+			}
+			hdlc->cbin <<= 1;
+			hdlc->bit_shift--;
+			break;
+		case HDLC_FAST_FLAG:
+			if(hdlc->cbin==hdlc->ffvalue){
+				hdlc->bit_shift = 0;
+				break;
+			} else {
+				if(hdlc->cbin == 0xff){
+					hdlc->state = HDLC_FAST_IDLE;
+					hdlc->bit_shift=0;
+				} else if(hdlc->ffbit_shift==8){
+					hdlc->state = HDLC_GETFLAG_B7;
+					break;
+				} else {
+					hdlc->shift_reg = fast_abort[hdlc->ffbit_shift-1];
+					hdlc->hdlc_bits1 = hdlc->ffbit_shift-2;
+					if(hdlc->hdlc_bits1<0)hdlc->hdlc_bits1 = 0;
+					hdlc->data_bits = hdlc->ffbit_shift-1;
+					hdlc->state = HDLC_GET_DATA;
+					hdlc->data_received = 0;
+				}
+			}
+			break;
+		default:
+			break;
+		}
+	}
+	*count -= slen;
+	return 0;
+}
+
+/*
+  hdlc_encode - encodes HDLC frames to a transparent bit stream.
+
+  The bit stream starts with a beginning flag (01111110). After
+  that each byte is added to the bit stream with bit stuffing added
+  (0 after 5 1's).
+  When the last byte has been removed from the source buffer, the
+  CRC (2 bytes is added) and the frame terminates with the ending flag.
+  For the dchannel, the idle character (all 1's) is also added at the end.
+  If this function is called with empty source buffer (slen=0), flags or
+  idle character will be generated.
+ 
+  src - source buffer
+  slen - source buffer length
+  count - number of bytes removed (encoded) from source buffer
+  dst _ destination buffer
+  dsize - destination buffer size
+  returns - number of encoded bytes in the destination buffer
+*/
+int hdlc_encode(struct hdlc_vars *hdlc, const unsigned char *src, 
+		unsigned short slen, int *count,
+		unsigned char *dst, int dsize)
+{
+	static const unsigned char xfast_flag_value[] = {
+		0x7e,0x3f,0x9f,0xcf,0xe7,0xf3,0xf9,0xfc,0x7e
+	};
+
+	int len = 0;
+
+	*count = slen;
+
+	while (dsize > 0) {
+		if(hdlc->bit_shift==0){	
+			if(slen && !hdlc->do_closing){
+				hdlc->shift_reg = *src++;
+				slen--;
+				if (slen == 0) 
+					hdlc->do_closing = 1;  /* closing sequence, CRC + flag(s) */
+				hdlc->bit_shift = 8;
+			} else {
+				if(hdlc->state == HDLC_SEND_DATA){
+					if(hdlc->data_received){
+						hdlc->state = HDLC_SEND_CRC1;
+						hdlc->crc ^= 0xffff;
+						hdlc->bit_shift = 8;
+						hdlc->shift_reg = hdlc->crc & 0xff;
+					} else if(!hdlc->do_adapt56){
+						hdlc->state = HDLC_SEND_FAST_FLAG;
+					} else {
+						hdlc->state = HDLC_SENDFLAG_B0;
+					}
+				}
+			  
+			}
+		}
+
+		switch(hdlc->state){
+		case STOPPED:
+			while (dsize--)
+				*dst++ = 0xff;
+		  
+			return dsize;
+		case HDLC_SEND_FAST_FLAG:
+			hdlc->do_closing = 0;
+			if(slen == 0){
+				*dst++ = hdlc->ffvalue;
+				len++;
+				dsize--;
+				break;
+			}
+			if(hdlc->bit_shift==8){
+				hdlc->cbin = hdlc->ffvalue>>(8-hdlc->data_bits);
+				hdlc->state = HDLC_SEND_DATA;
+				hdlc->crc = 0xffff;
+				hdlc->hdlc_bits1 = 0;
+				hdlc->data_received = 1;
+			}
+			break;
+		case HDLC_SENDFLAG_B0:
+			hdlc->do_closing = 0;
+			hdlc->cbin <<= 1;
+			hdlc->data_bits++;
+			hdlc->hdlc_bits1 = 0;
+			hdlc->state = HDLC_SENDFLAG_B1A6;
+			break;
+		case HDLC_SENDFLAG_B1A6:
+			hdlc->cbin <<= 1;
+			hdlc->data_bits++;
+			hdlc->cbin++;
+			if(++hdlc->hdlc_bits1 == 6)
+				hdlc->state = HDLC_SENDFLAG_B7;
+			break;
+		case HDLC_SENDFLAG_B7:
+			hdlc->cbin <<= 1;
+			hdlc->data_bits++;
+			if(slen == 0){
+				hdlc->state = HDLC_SENDFLAG_B0;
+				break;
+			}
+			if(hdlc->bit_shift==8){
+				hdlc->state = HDLC_SEND_DATA;
+				hdlc->crc = 0xffff;
+				hdlc->hdlc_bits1 = 0;
+				hdlc->data_received = 1;
+			}
+			break;
+		case HDLC_SEND_FIRST_FLAG:
+			hdlc->data_received = 1;
+			if(hdlc->data_bits==8){
+				hdlc->state = HDLC_SEND_DATA;
+				hdlc->crc = 0xffff;
+				hdlc->hdlc_bits1 = 0;
+				break;
+			}
+			hdlc->cbin <<= 1;
+			hdlc->data_bits++;
+			if(hdlc->shift_reg & 0x01)
+				hdlc->cbin++;
+			hdlc->shift_reg >>= 1;
+			hdlc->bit_shift--;
+			if(hdlc->bit_shift==0){
+				hdlc->state = HDLC_SEND_DATA;
+				hdlc->crc = 0xffff;
+				hdlc->hdlc_bits1 = 0;
+			}
+			break;
+		case HDLC_SEND_DATA:
+			hdlc->cbin <<= 1;
+			hdlc->data_bits++;
+			if(hdlc->hdlc_bits1 == 5){
+				hdlc->hdlc_bits1 = 0;
+				break;
+			}
+			if(hdlc->bit_shift==8){
+				unsigned cval;
+
+				cval = (hdlc->crc^hdlc->shift_reg) & 0xff;
+				hdlc->crc = (hdlc->crc>>8)^crc16_tab[cval];
+			}
+			if(hdlc->shift_reg & 0x01){
+				hdlc->hdlc_bits1++;
+				hdlc->cbin++;
+				hdlc->shift_reg >>= 1;
+				hdlc->bit_shift--;
+			} else {
+				hdlc->hdlc_bits1 = 0;
+				hdlc->shift_reg >>= 1;
+				hdlc->bit_shift--;
+			}
+			break;
+		case HDLC_SEND_CRC1:
+			hdlc->cbin <<= 1;
+			hdlc->data_bits++;
+			if(hdlc->hdlc_bits1 == 5){
+				hdlc->hdlc_bits1 = 0;
+				break;
+			}
+			if(hdlc->shift_reg & 0x01){
+				hdlc->hdlc_bits1++;
+				hdlc->cbin++;
+				hdlc->shift_reg >>= 1;
+				hdlc->bit_shift--;
+			} else {
+				hdlc->hdlc_bits1 = 0;
+				hdlc->shift_reg >>= 1;
+				hdlc->bit_shift--;
+			}
+			if(hdlc->bit_shift==0){
+				hdlc->shift_reg = (hdlc->crc >> 8);
+				hdlc->state = HDLC_SEND_CRC2;
+				hdlc->bit_shift = 8;
+			}
+			break;
+		case HDLC_SEND_CRC2:
+			hdlc->cbin <<= 1;
+			hdlc->data_bits++;
+			if(hdlc->hdlc_bits1 == 5){
+				hdlc->hdlc_bits1 = 0;
+				break;
+			}
+			if(hdlc->shift_reg & 0x01){
+				hdlc->hdlc_bits1++;
+				hdlc->cbin++;
+				hdlc->shift_reg >>= 1;
+				hdlc->bit_shift--;
+			} else {
+				hdlc->hdlc_bits1 = 0;
+				hdlc->shift_reg >>= 1;
+				hdlc->bit_shift--;
+			}
+			if(hdlc->bit_shift==0){
+				hdlc->shift_reg = 0x7e;
+				hdlc->state = HDLC_SEND_CLOSING_FLAG;
+				hdlc->bit_shift = 8;
+			}
+			break;
+		case HDLC_SEND_CLOSING_FLAG:
+			hdlc->cbin <<= 1;
+			hdlc->data_bits++;
+			if(hdlc->hdlc_bits1 == 5){
+				hdlc->hdlc_bits1 = 0;
+				break;
+			}
+			if(hdlc->shift_reg & 0x01){
+				hdlc->cbin++;
+			}
+			hdlc->shift_reg >>= 1;
+			hdlc->bit_shift--;
+			if(hdlc->bit_shift==0){
+				hdlc->ffvalue = xfast_flag_value[hdlc->data_bits];
+				if(hdlc->dchannel){
+					hdlc->ffvalue = 0x7e;
+					hdlc->state = HDLC_SEND_IDLE1;
+					hdlc->bit_shift = 8-hdlc->data_bits;
+					if(hdlc->bit_shift==0)
+						hdlc->state = HDLC_SEND_FAST_IDLE;
+				} else {
+					if(!hdlc->do_adapt56){
+						hdlc->state = HDLC_SEND_FAST_FLAG;
+						hdlc->data_received = 0;
+					} else {
+						hdlc->state = HDLC_SENDFLAG_B0;
+						hdlc->data_received = 0;
+					}
+					// Finished with this frame, send flags
+					if (dsize > 1) dsize = 1; 
+				}
+			}
+			break;
+		case HDLC_SEND_IDLE1:
+			hdlc->do_closing = 0;
+			hdlc->cbin <<= 1;
+			hdlc->cbin++;
+			hdlc->data_bits++;
+			hdlc->bit_shift--;
+			if(hdlc->bit_shift==0){
+				hdlc->state = HDLC_SEND_FAST_IDLE;
+				hdlc->bit_shift = 0;
+			}
+			break;
+		case HDLC_SEND_FAST_IDLE:
+			hdlc->do_closing = 0;
+			hdlc->cbin = 0xff;
+			hdlc->data_bits = 8;
+			if(hdlc->bit_shift == 8){
+				hdlc->cbin = 0x7e;
+				hdlc->state = HDLC_SEND_FIRST_FLAG;
+			} else {
+				*dst++ = hdlc->cbin;
+				hdlc->bit_shift = hdlc->data_bits = 0;
+				len++;
+				dsize = 0;
+			}
+			break;
+		default:
+			break;
+		}
+		if(hdlc->do_adapt56){
+			if(hdlc->data_bits==7){
+				hdlc->cbin <<= 1;
+				hdlc->cbin++;
+				hdlc->data_bits++;
+			}
+		}
+		if(hdlc->data_bits==8){
+			*dst++ = hdlc->cbin;
+			hdlc->data_bits = 0;
+			len++;
+			dsize--;
+		}
+	}
+	*count -= slen;
+
+	return len;
+}
+
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/st5481_hdlc.h linux/drivers/isdn/hisax/st5481_hdlc.h
--- linux-2.4.10-pre6/drivers/isdn/hisax/st5481_hdlc.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/st5481_hdlc.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,62 @@
+/*
+ * Driver for ST5481 USB ISDN modem
+ *
+ * Author       Frode Isaksen
+ * Copyright    2001 by Frode Isaksen      <fisaksen@bewan.com>
+ *              2001 by Kai Germaschewski  <kai.germaschewski@gmx.de>
+ * 
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ *
+ */
+
+#ifndef __ST5481_HDLC_H__
+#define __ST5481_HDLC_H__
+
+struct hdlc_vars {
+  	int bit_shift; 
+	int hdlc_bits1;
+	int data_bits;
+	int ffbit_shift; // encoding only
+	int state;
+	int dstpos;
+
+	int data_received:1; // set if transferring data
+	int dchannel:1; // set if D channel (send idle instead of flags)
+	int do_adapt56:1; // set if 56K adaptation
+        int do_closing:1; // set if in closing phase (need to send CRC + flag
+
+	unsigned short crc;
+
+	unsigned char cbin; 
+	unsigned char shift_reg;
+	unsigned char ffvalue;
+	
+};
+
+
+/*
+  The return value from hdlc_decode is
+  the frame length, 0 if no complete frame was decoded,
+  or a negative error number
+*/
+
+#define HDLC_FRAMING_ERROR     1
+#define HDLC_CRC_ERROR         2
+#define HDLC_LENGTH_ERROR      3
+
+void 
+hdlc_rcv_init(struct hdlc_vars *hdlc, int do_adapt56);
+
+int
+hdlc_decode(struct hdlc_vars *hdlc, const unsigned char *src, int slen,int *count, 
+	    unsigned char *dst, int dsize);
+
+void 
+hdlc_out_init(struct hdlc_vars *hdlc,int is_d_channel,int do_adapt56);
+
+int 
+hdlc_encode(struct hdlc_vars *hdlc,const unsigned char *src,unsigned short slen,int *count,
+	    unsigned char *dst,int dsize);
+
+#endif
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/st5481_init.c linux/drivers/isdn/hisax/st5481_init.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/st5481_init.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/st5481_init.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,215 @@
+/*
+ * Driver for ST5481 USB ISDN modem
+ *
+ * Author       Frode Isaksen
+ * Copyright    2001 by Frode Isaksen      <fisaksen@bewan.com>
+ *              2001 by Kai Germaschewski  <kai.germaschewski@gmx.de>
+ * 
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ *
+ */
+
+/* 
+ * TODO:
+ *
+ * b layer1 delay?
+ * hdlc as module
+ * hotplug / unregister issues
+ * mod_inc/dec_use_count
+ * unify parts of d/b channel usb handling
+ * file header
+ * avoid copy to isoc buffer?
+ * improve usb delay?
+ * merge l1 state machines?
+ * clean up debug
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/usb.h>
+#include <linux/slab.h>
+#include "st5481.h"
+
+MODULE_AUTHOR("Frode Isaksen <fisaksen@bewan.com>");
+MODULE_DESCRIPTION("ST5481 USB ISDN modem driver");
+
+static int protocol = 2;       /* EURO-ISDN Default */
+MODULE_PARM(protocol, "i");
+
+static int number_of_leds = 2;       /* 2 LEDs on the adpater default */
+MODULE_PARM(number_of_leds, "i");
+
+#ifdef CONFIG_HISAX_DEBUG
+static int debug = 0x1;
+MODULE_PARM(debug, "i");
+int st5481_debug;
+#endif
+
+static LIST_HEAD(adapter_list);
+
+/* ======================================================================
+ * registration/deregistration with the USB layer
+ */
+
+/*
+ * This function will be called when the adapter is plugged
+ * into the USB bus.
+ */
+static void * __devinit probe_st5481(struct usb_device *dev,
+				     unsigned int ifnum,
+				     const struct usb_device_id *id)
+{
+	struct st5481_adapter *adapter;
+	struct hisax_b_if *b_if[2];
+	int retval, i;
+
+	printk(KERN_INFO "st541: found adapter VendorId %04x, ProductId %04x, LEDs %d\n",
+	     dev->descriptor.idVendor, dev->descriptor.idProduct,
+	     number_of_leds);
+
+	adapter = kmalloc(sizeof(struct st5481_adapter), GFP_KERNEL);
+	if (!adapter)
+		return NULL;
+
+	memset(adapter, 0, sizeof(struct st5481_adapter));
+
+	adapter->number_of_leds = number_of_leds;
+	adapter->usb_dev = dev;
+
+	SET_MODULE_OWNER(&adapter->hisax_d_if);
+	adapter->hisax_d_if.ifc.priv = adapter;
+	adapter->hisax_d_if.ifc.l2l1 = st5481_d_l2l1;
+
+	for (i = 0; i < 2; i++) {
+		adapter->bcs[i].adapter = adapter;
+		adapter->bcs[i].channel = i;
+		adapter->bcs[i].b_if.ifc.priv = &adapter->bcs[i];
+		adapter->bcs[i].b_if.ifc.l2l1 = st5481_b_l2l1;
+	}
+	list_add(&adapter->list, &adapter_list);
+
+	retval = st5481_setup_usb(adapter);
+	if (retval < 0)
+		goto err;
+
+	retval = st5481_setup_d(adapter);
+	if (retval < 0)
+		goto err_usb;
+
+	retval = st5481_setup_b(&adapter->bcs[0]);
+	if (retval < 0)
+		goto err_d;
+
+	retval = st5481_setup_b(&adapter->bcs[1]);
+	if (retval < 0)
+		goto err_b;
+
+	for (i = 0; i < 2; i++)
+		b_if[i] = &adapter->bcs[i].b_if;
+
+	hisax_register(&adapter->hisax_d_if, b_if, "st5481_usb", protocol);
+	st5481_start(adapter);
+
+	return adapter;
+
+ err_b:
+	st5481_release_b(&adapter->bcs[0]);
+ err_d:
+	st5481_release_d(adapter);
+ err_usb:
+	st5481_release_usb(adapter);
+ err:
+	return NULL;
+}
+
+/*
+ * This function will be called when the adapter is removed
+ * from the USB bus.
+ */
+static void __devexit disconnect_st5481(struct usb_device *dev, void *arg)
+{
+	struct st5481_adapter *adapter = arg;
+
+	DBG(1,"");
+
+	list_del(&adapter->list);
+
+	st5481_stop(adapter);
+	st5481_release_b(&adapter->bcs[1]);
+	st5481_release_b(&adapter->bcs[0]);
+	st5481_release_d(adapter);
+	// we would actually better wait for completion of outstanding urbs
+	mdelay(2);
+	st5481_release_usb(adapter);
+
+	hisax_unregister(&adapter->hisax_d_if);
+
+	kfree(adapter);
+}
+
+/*
+ * The last 4 bits in the Product Id is set with 4 pins on the chip.
+ */
+static struct usb_device_id st5481_ids[] = {
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x0) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x1) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x2) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x3) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x4) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x5) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x6) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x7) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x8) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x9) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xA) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xB) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xC) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xD) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xE) },
+	{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xF) },
+	{ }
+};
+MODULE_DEVICE_TABLE (usb, st5481_ids);
+
+static struct usb_driver st5481_usb_driver = {
+	name: "st5481_usb",
+	probe: probe_st5481,
+	disconnect: disconnect_st5481,
+	id_table: st5481_ids,
+};
+
+static int __init st5481_usb_init(void)
+{
+	int retval;
+
+#ifdef CONFIG_HISAX_DEBUG
+	st5481_debug = debug;
+#endif
+
+	printk(KERN_INFO "hiax_st5481: ST5481 USB ISDN driver v0.1.0\n");
+
+	retval = st5481_d_init();
+	if (retval < 0)
+		goto out;
+
+	retval = usb_register(&st5481_usb_driver);
+	if (retval < 0)
+		goto out_d_exit;
+
+	return 0;
+
+ out_d_exit:
+	st5481_d_exit();
+ out:
+	return retval;
+}
+
+static void __exit st5481_usb_exit(void)
+{
+	usb_deregister(&st5481_usb_driver);
+}
+
+module_init(st5481_usb_init);
+module_exit(st5481_usb_exit);
diff -urN linux-2.4.10-pre6/drivers/isdn/hisax/st5481_usb.c linux/drivers/isdn/hisax/st5481_usb.c
--- linux-2.4.10-pre6/drivers/isdn/hisax/st5481_usb.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/isdn/hisax/st5481_usb.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,639 @@
+/*
+ * Driver for ST5481 USB ISDN modem
+ *
+ * Author       Frode Isaksen
+ * Copyright    2001 by Frode Isaksen      <fisaksen@bewan.com>
+ *              2001 by Kai Germaschewski  <kai.germaschewski@gmx.de>
+ * 
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/usb.h>
+#include <linux/slab.h>
+#include "st5481.h"
+
+/* ======================================================================
+ * control pipe
+ */
+
+/*
+ * Send the next endpoint 0 request stored in the FIFO.
+ * Called either by the completion or by usb_ctrl_msg.
+ */
+static void usb_next_ctrl_msg(struct urb *urb,
+			      struct st5481_adapter *adapter)
+{
+	struct st5481_ctrl *ctrl = &adapter->ctrl;
+	int r_index;
+
+	if (test_and_set_bit(0, &ctrl->busy)) {
+		return;
+	}
+
+	if ((r_index = fifo_remove(&ctrl->msg_fifo.f)) < 0) {
+		test_and_clear_bit(0,&ctrl->busy);
+		return;
+	} 
+	urb->setup_packet = 
+		(unsigned char *)&ctrl->msg_fifo.data[r_index];
+	
+	DBG(1,"request=0x%02x,value=0x%04x,index=%x",
+	    ((struct ctrl_msg *)urb->setup_packet)->dr.request,
+	    ((struct ctrl_msg *)urb->setup_packet)->dr.value,
+	    ((struct ctrl_msg *)urb->setup_packet)->dr.index);
+
+	// Prepare the URB
+	urb->dev = adapter->usb_dev;
+
+	SUBMIT_URB(urb);
+}
+
+/*
+ * Asynchronous endpoint 0 request (async version of usb_control_msg).
+ * The request will be queued up in a FIFO if the endpoint is busy.
+ */
+void usb_ctrl_msg(struct st5481_adapter *adapter,
+		  u8 request, u8 requesttype, u16 value, u16 index,
+		  ctrl_complete_t complete, void *context)
+{
+	struct st5481_ctrl *ctrl = &adapter->ctrl;
+	int w_index;
+	struct ctrl_msg *ctrl_msg;
+	
+	if ((w_index = fifo_add(&ctrl->msg_fifo.f)) < 0) {
+		WARN("control msg FIFO full");
+		return;
+	}
+	ctrl_msg = &ctrl->msg_fifo.data[w_index]; 
+   
+	ctrl_msg->dr.requesttype = requesttype;
+	ctrl_msg->dr.request = request;
+	ctrl_msg->dr.value = cpu_to_le16p(&value);
+	ctrl_msg->dr.index = cpu_to_le16p(&index);
+	ctrl_msg->dr.length = 0;
+	ctrl_msg->complete = complete;
+	ctrl_msg->context = context;
+
+	usb_next_ctrl_msg(ctrl->urb, adapter);
+}
+
+/*
+ * Asynchronous endpoint 0 device request.
+ */
+void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter,
+			 u8 request, u16 value,
+			 ctrl_complete_t complete, void *context)
+{
+	usb_ctrl_msg(adapter, request, 
+		     USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 
+		     value, 0, complete, context);
+}
+
+/*
+ * Asynchronous pipe reset (async version of usb_clear_halt).
+ */
+void st5481_usb_pipe_reset(struct st5481_adapter *adapter,
+		    u_char pipe,
+		    ctrl_complete_t complete, void *context)
+{
+	DBG(1,"pipe=%02x",pipe);
+
+	usb_ctrl_msg(adapter,
+		     USB_REQ_CLEAR_FEATURE, USB_DIR_OUT | USB_RECIP_ENDPOINT,
+		     0, pipe, complete, context);
+}
+
+
+/*
+  Physical level functions
+*/
+
+void st5481_ph_command(struct st5481_adapter *adapter, unsigned int command)
+{
+	DBG(8,"command=%s", ST5481_CMD_string(command));
+
+	st5481_usb_device_ctrl_msg(adapter, TXCI, command, NULL, NULL);
+}
+
+/*
+ * The request on endpoint 0 has completed.
+ * Call the user provided completion routine and try
+ * to send the next request.
+ */
+static void usb_ctrl_complete(struct urb *urb)
+{
+	struct st5481_adapter *adapter = urb->context;
+	struct st5481_ctrl *ctrl = &adapter->ctrl;
+	struct ctrl_msg *ctrl_msg;
+	
+	if (urb->status < 0) {
+		if (urb->status != USB_ST_URB_KILLED) {
+			WARN("urb status %d",urb->status);
+		} else {
+			DBG(1,"urb killed");
+			return; // Give up
+		}
+	}
+
+	ctrl_msg = (struct ctrl_msg *)urb->setup_packet;
+	
+	if (ctrl_msg->dr.request == USB_REQ_CLEAR_FEATURE) {
+	        /* Special case handling for pipe reset */
+		le16_to_cpus(&ctrl_msg->dr.index);
+		usb_endpoint_running(adapter->usb_dev,
+				     ctrl_msg->dr.index & ~USB_DIR_IN, 
+				     (ctrl_msg->dr.index & USB_DIR_IN) == 0);
+
+		/* toggle is reset on clear */
+		usb_settoggle(adapter->usb_dev, 
+			      ctrl_msg->dr.index & ~USB_DIR_IN, 
+			      (ctrl_msg->dr.index & USB_DIR_IN) == 0,
+			      0);
+
+
+	}
+	
+	if (ctrl_msg->complete)
+		ctrl_msg->complete(ctrl_msg->context);
+
+	clear_bit(0, &ctrl->busy);
+	
+	// Try to send next control message
+	usb_next_ctrl_msg(urb, adapter);
+	return;
+}
+
+/* ======================================================================
+ * interrupt pipe
+ */
+
+/*
+ * The interrupt endpoint will be called when any
+ * of the 6 registers changes state (depending on masks).
+ * Decode the register values and schedule a private event.
+ * Called at interrupt.
+ */
+static void usb_int_complete(struct urb *urb)
+{
+	u_char *data = urb->transfer_buffer;
+	u_char irqbyte;
+	struct st5481_adapter *adapter = urb->context;
+	int j;
+
+	if (urb->status < 0) {
+		if (urb->status != USB_ST_URB_KILLED) {
+			WARN("urb status %d",urb->status);
+			urb->actual_length = 0;
+		} else {
+			DBG(1,"urb killed");
+			return; // Give up
+		}
+	}
+	
+	DBG_PACKET(1, data, INT_PKT_SIZE);
+		
+	if (urb->actual_length == 0) {
+		return;
+	}
+
+	irqbyte = data[MPINT];
+	if (irqbyte & DEN_INT)
+		FsmEvent(&adapter->d_out.fsm, EV_DOUT_DEN, NULL);
+
+	if (irqbyte & DCOLL_INT)
+		FsmEvent(&adapter->d_out.fsm, EV_DOUT_COLL, NULL);
+
+	irqbyte = data[FFINT_D];
+	if (irqbyte & OUT_UNDERRUN)
+		FsmEvent(&adapter->d_out.fsm, EV_DOUT_UNDERRUN, NULL);
+
+	if (irqbyte & OUT_DOWN)
+;//		printk("OUT_DOWN\n");
+
+	irqbyte = data[MPINT];
+	if (irqbyte & RXCI_INT)
+		FsmEvent(&adapter->l1m, data[CCIST] & 0x0f, NULL);
+
+	for (j = 0; j < 2; j++)
+		adapter->bcs[j].b_out.flow_event |= data[FFINT_B1 + j];
+
+	urb->actual_length = 0;
+}
+
+/* ======================================================================
+ * initialization
+ */
+
+int __devinit st5481_setup_usb(struct st5481_adapter *adapter)
+{
+	struct usb_device *dev = adapter->usb_dev;
+	struct st5481_ctrl *ctrl = &adapter->ctrl;
+	struct st5481_intr *intr = &adapter->intr;
+	struct usb_interface_descriptor *altsetting;
+	struct usb_endpoint_descriptor *endpoint;
+	int status;
+	urb_t *urb;
+	u_char *buf;
+	
+	DBG(1,"");
+	
+	if ((status = usb_set_configuration (dev,dev->config[0].bConfigurationValue)) < 0) {
+		WARN("set_configuration failed,status=%d",status);
+		return status;
+	}
+
+	
+	altsetting = &(dev->config->interface[0].altsetting[3]);	
+
+	// Check if the config is sane
+	if ( altsetting->bNumEndpoints != 7 ) {
+		WARN("expecting 7 got %d endpoints!", altsetting->bNumEndpoints);
+		return -EINVAL;
+	}
+
+	// The descriptor is wrong for some early samples of the ST5481 chip
+	altsetting->endpoint[3].wMaxPacketSize = 32;
+	altsetting->endpoint[4].wMaxPacketSize = 32;
+
+	// Use alternative setting 3 on interface 0 to have 2B+D
+	if ((status = usb_set_interface (dev, 0, 3)) < 0) {
+		WARN("usb_set_interface failed,status=%d",status);
+		return status;
+	}
+
+	// Allocate URB for control endpoint
+	urb = usb_alloc_urb(0);
+	if (!urb) {
+		return -ENOMEM;
+	}
+	ctrl->urb = urb;
+	
+	// Fill the control URB
+	FILL_CONTROL_URB (urb, dev, 
+			  usb_sndctrlpipe(dev, 0),
+			  NULL, NULL, 0, usb_ctrl_complete, adapter);
+
+		
+	fifo_init(&ctrl->msg_fifo.f, ARRAY_SIZE(ctrl->msg_fifo.data));
+
+	// Allocate URBs and buffers for interrupt endpoint
+	urb = usb_alloc_urb(0);
+	if (!urb) { 
+		return -ENOMEM;
+	}
+	intr->urb = urb;
+	
+	buf = kmalloc(INT_PKT_SIZE, GFP_KERNEL);
+	if (!buf) {
+		return -ENOMEM;
+	}
+
+	endpoint = &altsetting->endpoint[EP_INT-1];
+				
+	// Fill the interrupt URB
+	FILL_INT_URB(urb, dev,
+		     usb_rcvintpipe(dev, endpoint->bEndpointAddress),
+		     buf, INT_PKT_SIZE,
+		     usb_int_complete, adapter,
+		     endpoint->bInterval);
+		
+	return 0;
+}
+
+/*
+ * Release buffers and URBs for the interrupt and control
+ * endpoint.
+ */
+void __devexit st5481_release_usb(struct st5481_adapter *adapter)
+{
+	struct st5481_intr *intr = &adapter->intr;
+	struct st5481_ctrl *ctrl = &adapter->ctrl;
+
+	DBG(1,"");
+
+	// Stop and free Control and Interrupt URBs
+	usb_unlink_urb(ctrl->urb);
+	if (ctrl->urb->transfer_buffer)
+		kfree(ctrl->urb->transfer_buffer);
+	usb_free_urb(ctrl->urb);
+
+	usb_unlink_urb(intr->urb);
+	if (intr->urb->transfer_buffer)
+		kfree(intr->urb->transfer_buffer);
+	usb_free_urb(intr->urb);
+}
+
+/*
+ *  Initialize the adapter.
+ */
+void __devinit st5481_start(struct st5481_adapter *adapter)
+{
+	static const u8 init_cmd_table[]={
+		SET_DEFAULT,0,
+		STT,0,
+		SDA_MIN,0x0d,
+		SDA_MAX,0x29,
+		SDELAY_VALUE,0x14,
+		GPIO_DIR,0x01,		
+		GPIO_OUT,RED_LED,
+//		FFCTRL_OUT_D,4,
+//		FFCTRH_OUT_D,12,
+		FFCTRL_OUT_B1,6,
+		FFCTRH_OUT_B1,20,
+		FFCTRL_OUT_B2,6,
+		FFCTRH_OUT_B2,20,
+		MPMSK,RXCI_INT+DEN_INT+DCOLL_INT,
+		0
+	};	
+	struct st5481_intr *intr = &adapter->intr;
+	int i = 0;
+	u8 request,value;
+
+	DBG(8,"");
+
+	adapter->leds = RED_LED; 
+
+	// Start receiving on the interrupt endpoint
+	SUBMIT_URB(intr->urb); 
+
+	while ((request = init_cmd_table[i++])) {
+		value = init_cmd_table[i++];
+		st5481_usb_device_ctrl_msg(adapter, request, value, NULL, NULL);
+	}
+	st5481_ph_command(adapter, ST5481_CMD_PUP);
+}
+
+/*
+ * Reset the adapter to default values.
+ */
+void __devexit st5481_stop(struct st5481_adapter *adapter)
+{
+	DBG(8,"");
+
+	st5481_usb_device_ctrl_msg(adapter, SET_DEFAULT, 0, NULL, NULL);
+}
+
+/* ======================================================================
+ * isochronous USB  helpers
+ */
+
+static void __devinit
+fill_isoc_urb(struct urb *urb, struct usb_device *dev,
+	      unsigned int pipe, void *buf, int num_packets, 
+	      int packet_size, usb_complete_t complete,
+	      void *context) 
+{
+	int k;
+
+	spin_lock_init(&urb->lock);
+	urb->dev=dev;
+	urb->pipe=pipe;
+	urb->transfer_buffer=buf;
+	urb->number_of_packets = num_packets;
+	urb->transfer_buffer_length=num_packets*packet_size;
+	urb->actual_length = 0;
+	urb->complete=complete;
+	urb->context=context;
+	urb->transfer_flags=USB_ISO_ASAP;
+	for (k = 0; k < num_packets; k++) {
+		urb->iso_frame_desc[k].offset = packet_size * k;
+		urb->iso_frame_desc[k].length = packet_size;
+		urb->iso_frame_desc[k].actual_length = 0;
+	}
+}
+
+int __devinit
+st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev, 
+			   unsigned int pipe, int num_packets,
+			   int packet_size, int buf_size,
+			   usb_complete_t complete, void *context)
+{
+	int j, retval;
+	unsigned char *buf;
+
+	for (j = 0; j < 2; j++) {
+		retval = -ENOMEM;
+		urb[j] = usb_alloc_urb(num_packets);
+		if (!urb[j])
+			goto err;
+
+		// Allocate memory for 2000bytes/sec (16Kb/s)
+		buf = kmalloc(buf_size, GFP_KERNEL);
+		if (!buf)
+			goto err;
+			
+		// Fill the isochronous URB
+		fill_isoc_urb(urb[j], dev, pipe, buf, 
+				     num_packets, packet_size, complete,
+				     context);
+	}
+	return 0;
+
+ err:
+	for (j = 0; j < 2; j++) {
+		if (urb[j]) {
+			if (urb[j]->transfer_buffer)
+				kfree(urb[j]->transfer_buffer);
+			usb_free_urb(urb[j]);
+		}
+	}
+	return retval;
+}
+
+void __devexit st5481_release_isocpipes(struct urb* urb[2])
+{
+	int j;
+
+	for (j = 0; j < 2; j++) {
+		usb_unlink_urb(urb[j]);
+		if (urb[j]->transfer_buffer)
+			kfree(urb[j]->transfer_buffer);			
+		usb_free_urb(urb[j]);
+	}
+}
+
+/*
+ * Decode frames received on the B/D channel.
+ * Note that this function will be called continously
+ * with 64Kbit/s / 16Kbit/s of data and hence it will be 
+ * called 50 times per second with 20 ISOC descriptors. 
+ * Called at interrupt.
+ */
+static void usb_in_complete(struct urb *urb)
+{
+	struct st5481_in *in = urb->context;
+	unsigned char *ptr;
+	struct sk_buff *skb;
+	int len, count, status;
+
+	if (urb->status < 0) {
+		if (urb->status != USB_ST_URB_KILLED) {
+			WARN("urb status %d",urb->status);
+		} else {
+			DBG(1,"urb killed");
+			return; // Give up
+		}
+	}
+
+	DBG_ISO_PACKET(0x80,urb);
+
+	len = st5481_isoc_flatten(urb);
+	ptr = urb->transfer_buffer;
+	while (len > 0) {
+		if (in->mode == L1_MODE_TRANS) {
+			memcpy(in->rcvbuf, ptr, len);
+			status = len;
+			len = 0;
+		} else {
+			status = hdlc_decode(&in->hdlc_state, ptr, len, &count,
+					     in->rcvbuf, in->bufsize);
+			ptr += count;
+			len -= count;
+		}
+		
+		if (status > 0) {
+			// Good frame received
+			DBG(4,"count=%d",status);
+			DBG_PACKET(0x400, in->rcvbuf, status);
+			if (!(skb = dev_alloc_skb(status))) {
+				WARN("receive out of memory\n");
+				break;
+			}
+			memcpy(skb_put(skb, status), in->rcvbuf, status);
+			in->hisax_if->l1l2(in->hisax_if, PH_DATA | INDICATION, skb);
+		} else if (status == -HDLC_CRC_ERROR) {
+			INFO("CRC error");
+		} else if (status == -HDLC_FRAMING_ERROR) {
+			INFO("framing error");
+		} else if (status == -HDLC_LENGTH_ERROR) {
+			INFO("length error");
+		}
+	}
+
+	// Prepare URB for next transfer
+	urb->dev = in->adapter->usb_dev;
+	urb->actual_length = 0;
+
+	SUBMIT_URB(urb);
+}
+
+int __devinit st5481_setup_in(struct st5481_in *in)
+{
+	struct usb_device *dev = in->adapter->usb_dev;
+	int retval;
+
+	DBG(4,"");
+
+	in->rcvbuf = kmalloc(in->bufsize, GFP_KERNEL);
+	retval = -ENOMEM;
+	if (!in->rcvbuf)
+		goto err;
+
+	retval = st5481_setup_isocpipes(in->urb, dev, 
+					usb_rcvisocpipe(dev, in->ep),
+					in->num_packets,  in->packet_size,
+					in->num_packets * in->packet_size,
+					usb_in_complete, in);
+	if (retval)
+		goto err_free;
+	return 0;
+
+ err_free:
+	kfree(in->rcvbuf);
+ err:
+	return retval;
+}
+
+void __devexit st5481_release_in(struct st5481_in *in)
+{
+	DBG(2,"");
+
+	st5481_release_isocpipes(in->urb);
+}
+
+/*
+ * Make the transfer_buffer contiguous by
+ * copying from the iso descriptors if necessary. 
+ */
+int st5481_isoc_flatten(struct urb *urb)
+{
+	piso_packet_descriptor_t pipd,pend;
+	unsigned char *src,*dst;
+	unsigned int len;
+	
+	if (urb->status < 0) {
+		return urb->status;
+	}
+	for (pipd = &urb->iso_frame_desc[0],
+		     pend = &urb->iso_frame_desc[urb->number_of_packets],
+		     dst = urb->transfer_buffer; 
+	     pipd < pend; 
+	     pipd++) {
+		
+		if (pipd->status < 0) {
+			return (pipd->status);
+		}
+	
+		len = pipd->actual_length;
+		pipd->actual_length = 0;
+		src = urb->transfer_buffer+pipd->offset;
+
+		if (src != dst) {
+			// Need to copy since isoc buffers not full
+			while (len--) {
+				*dst++ = *src++;
+			}			
+		} else {
+			// No need to copy, just update destination buffer
+			dst += len;
+		}
+	}
+	// Return size of flattened buffer
+	return (dst - (unsigned char *)urb->transfer_buffer);
+}
+
+static void st5481_start_rcv(void *context)
+{
+	struct st5481_in *in = context;
+	struct st5481_adapter *adapter = in->adapter;
+
+	DBG(4,"");
+
+	in->urb[0]->dev = adapter->usb_dev;
+	SUBMIT_URB(in->urb[0]);
+
+	in->urb[1]->dev = adapter->usb_dev;
+	SUBMIT_URB(in->urb[1]);
+}
+
+void st5481_in_mode(struct st5481_in *in, int mode)
+{
+	if (in->mode == mode)
+		return;
+
+	in->mode = mode;
+
+	usb_unlink_urb(in->urb[0]);
+	usb_unlink_urb(in->urb[1]);
+
+	if (in->mode != L1_MODE_NULL) {
+		if (in->mode != L1_MODE_TRANS)
+			hdlc_rcv_init(&in->hdlc_state,
+				      in->mode == L1_MODE_HDLC_56K);
+		
+		st5481_usb_pipe_reset(in->adapter, in->ep, NULL, NULL);
+		st5481_usb_device_ctrl_msg(in->adapter, in->counter,
+					   in->packet_size,
+					   NULL, NULL);
+		st5481_start_rcv(in);
+	} else {
+		st5481_usb_device_ctrl_msg(in->adapter, in->counter,
+					   0, NULL, NULL);
+	}
+}
+
diff -urN linux-2.4.10-pre6/drivers/isdn/isdn_common.c linux/drivers/isdn/isdn_common.c
--- linux-2.4.10-pre6/drivers/isdn/isdn_common.c	Mon Aug 13 16:35:28 2001
+++ linux/drivers/isdn/isdn_common.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdn_common.c,v 1.114.6.13 2001/08/13 07:46:15 kai Exp $
+/* $Id: isdn_common.c,v 1.114.6.14 2001/08/17 12:34:25 kai Exp $
 
  * Linux ISDN subsystem, common used functions (linklevel).
  *
@@ -51,7 +51,7 @@
 
 isdn_dev *dev;
 
-static char *isdn_revision = "$Revision: 1.114.6.13 $";
+static char *isdn_revision = "$Revision: 1.114.6.14 $";
 
 extern char *isdn_net_revision;
 extern char *isdn_tty_revision;
@@ -792,7 +792,6 @@
 int
 isdn_readbchan(int di, int channel, u_char * buf, u_char * fp, int len, wait_queue_head_t *sleep)
 {
-	int left;
 	int count;
 	int count_pull;
 	int count_put;
@@ -808,10 +807,11 @@
 		else
 			return 0;
 	}
-	left = MIN(len, dev->drv[di]->rcvcount[channel]);
+	if (len > dev->drv[di]->rcvcount[channel])
+		len = dev->drv[di]->rcvcount[channel];
 	cp = buf;
 	count = 0;
-	while (left) {
+	while (len) {
 		if (!(skb = skb_peek(&dev->drv[di]->rpqueue[channel])))
 			break;
 #ifdef CONFIG_ISDN_AUDIO
@@ -824,8 +824,8 @@
 
 			dflag = 0;
 			count_pull = count_put = 0;
-			while ((count_pull < skb->len) && (left > 0)) {
-				left--;
+			while ((count_pull < skb->len) && (len > 0)) {
+				len--;
 				if (dev->drv[di]->DLEflag & DLEmask) {
 					*cp++ = DLE;
 					dev->drv[di]->DLEflag &= ~DLEmask;
@@ -846,14 +846,14 @@
 #endif
 			/* No DLE's in buff, so simply copy it */
 			dflag = 1;
-			if ((count_pull = skb->len) > left) {
-				count_pull = left;
+			if ((count_pull = skb->len) > len) {
+				count_pull = len;
 				dflag = 0;
 			}
 			count_put = count_pull;
 			memcpy(cp, skb->data, count_put);
 			cp += count_put;
-			left -= count_put;
+			len -= count_put;
 #ifdef CONFIG_ISDN_AUDIO
 		}
 #endif
@@ -1048,12 +1048,15 @@
 			}
 			interruptible_sleep_on(&(dev->drv[drvidx]->st_waitq));
 		}
-		if (dev->drv[drvidx]->interface->readstat)
+		if (dev->drv[drvidx]->interface->readstat) {
+			if (count > dev->drv[drvidx]->stavail)
+				count = dev->drv[drvidx]->stavail;
 			len = dev->drv[drvidx]->interface->
-			    readstat(buf, MIN(count, dev->drv[drvidx]->stavail),
-				     1, drvidx, isdn_minor2chan(minor));
-		else
+				readstat(buf, count, 1, drvidx,
+					 isdn_minor2chan(minor));
+		} else {
 			len = 0;
+		}
 		save_flags(flags);
 		cli();
 		if (len)
diff -urN linux-2.4.10-pre6/drivers/isdn/isdn_net.c linux/drivers/isdn/isdn_net.c
--- linux-2.4.10-pre6/drivers/isdn/isdn_net.c	Sat Jul 28 12:12:37 2001
+++ linux/drivers/isdn/isdn_net.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdn_net.c,v 1.140.6.7 2001/07/27 11:15:53 kai Exp $
+/* $Id: isdn_net.c,v 1.140.6.8 2001/08/14 14:04:21 kai Exp $
 
  * Linux ISDN subsystem, network interfaces and related functions (linklevel).
  *
@@ -190,7 +190,7 @@
 static void isdn_net_ciscohdlck_connected(isdn_net_local *lp);
 static void isdn_net_ciscohdlck_disconnected(isdn_net_local *lp);
 
-char *isdn_net_revision = "$Revision: 1.140.6.7 $";
+char *isdn_net_revision = "$Revision: 1.140.6.8 $";
 
  /*
   * Code for raw-networking over ISDN
@@ -1754,6 +1754,11 @@
 		break;
 	case CISCO_TYPE_SLARP:
 		isdn_net_ciscohdlck_slarp_in(lp, skb);
+		goto out_free;
+	case CISCO_TYPE_CDP:
+		if (lp->cisco_debserint)
+			printk(KERN_DEBUG "%s: Received CDP packet. use "
+				"\"no cdp enable\" on cisco.\n", lp->name);
 		goto out_free;
 	default:
 		printk(KERN_WARNING "%s: Unknown Cisco type 0x%04x\n",
diff -urN linux-2.4.10-pre6/drivers/isdn/isdn_net.h linux/drivers/isdn/isdn_net.h
--- linux-2.4.10-pre6/drivers/isdn/isdn_net.h	Sat May 19 17:54:14 2001
+++ linux/drivers/isdn/isdn_net.h	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdn_net.h,v 1.19.6.1 2001/04/20 02:41:58 keil Exp $
+/* $Id: isdn_net.h,v 1.19.6.2 2001/08/14 14:04:21 kai Exp $
 
  * header for Linux ISDN subsystem, network related functions (linklevel).
  *
@@ -36,6 +36,7 @@
 #define CISCO_ADDR_UNICAST    0x0f
 #define CISCO_ADDR_BROADCAST  0x8f
 #define CISCO_CTRL            0x00
+#define CISCO_TYPE_CDP        0x2000
 #define CISCO_TYPE_INET       0x0800
 #define CISCO_TYPE_SLARP      0x8035
 #define CISCO_SLARP_REPLY     0
diff -urN linux-2.4.10-pre6/drivers/isdn/isdn_tty.c linux/drivers/isdn/isdn_tty.c
--- linux-2.4.10-pre6/drivers/isdn/isdn_tty.c	Sat Jul 28 12:12:37 2001
+++ linux/drivers/isdn/isdn_tty.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdn_tty.c,v 1.94.6.4 2001/07/27 11:15:53 kai Exp $
+/* $Id: isdn_tty.c,v 1.94.6.7 2001/08/27 22:19:04 kai Exp $
 
  * Linux ISDN subsystem, tty functions and AT-command emulator (linklevel).
  *
@@ -66,7 +66,7 @@
 static int si2bit[8] =
 {4, 1, 4, 4, 4, 4, 4, 4};
 
-char *isdn_tty_revision = "$Revision: 1.94.6.4 $";
+char *isdn_tty_revision = "$Revision: 1.94.6.7 $";
 
 
 /* isdn_tty_try_read() is called from within isdn_tty_rcv_skb()
@@ -727,9 +727,19 @@
 isdn_tty_modem_hup(modem_info * info, int local)
 {
 	isdn_ctrl cmd;
+	int di, ch;
 
 	if (!info)
 		return;
+
+	di = info->isdn_driver;
+	ch = info->isdn_channel;
+	if (di < 0 || ch < 0)
+		return;
+
+	info->isdn_driver = -1;
+	info->isdn_channel = -1;
+
 #ifdef ISDN_DEBUG_MODEM_HUP
 	printk(KERN_DEBUG "Mhup ttyI%d\n", info->line);
 #endif
@@ -770,19 +780,18 @@
 		isdn_tty_modem_result(RESULT_RUNG, info);
 	info->msr &= ~(UART_MSR_DCD | UART_MSR_RI);
 	info->lsr |= UART_LSR_TEMT;
-	if (info->isdn_driver >= 0) {
-		if (local) {
-			cmd.driver = info->isdn_driver;
-			cmd.command = ISDN_CMD_HANGUP;
-			cmd.arg = info->isdn_channel;
-			isdn_command(&cmd);
-		}
-		isdn_all_eaz(info->isdn_driver, info->isdn_channel);
-		info->emu.mdmreg[REG_RINGCNT] = 0;
-		isdn_free_channel(info->isdn_driver, info->isdn_channel, 0);
+
+	if (local) {
+		cmd.driver = di;
+		cmd.command = ISDN_CMD_HANGUP;
+		cmd.arg = ch;
+		isdn_command(&cmd);
 	}
-	info->isdn_driver = -1;
-	info->isdn_channel = -1;
+
+	isdn_all_eaz(di, ch);
+	info->emu.mdmreg[REG_RINGCNT] = 0;
+	isdn_free_channel(di, ch, 0);
+
 	if (info->drv_index >= 0) {
 		dev->m_idx[info->drv_index] = -1;
 		info->drv_index = -1;
@@ -1187,9 +1196,11 @@
 	/* See isdn_tty_senddown() */
 	atomic_inc(&info->xmit_lock);
 	while (1) {
-		c = MIN(count, info->xmit_size - info->xmit_count);
-		if (info->isdn_driver >= 0)
-			c = MIN(c, dev->drv[info->isdn_driver]->maxbufsize);
+		c = count;
+		if (c > info->xmit_size - info->xmit_count)
+			c = info->xmit_size - info->xmit_count;
+		if (info->isdn_driver >= 0 && c > dev->drv[info->isdn_driver]->maxbufsize)
+			c = dev->drv[info->isdn_driver]->maxbufsize;
 		if (c <= 0)
 			break;
 		if ((info->online > 1)
@@ -2709,6 +2720,10 @@
 			    if (!(m->mdmreg[REG_CIDONCE] & BIT_CIDONCE)) {
 				    isdn_tty_at_cout("\r\nCALLER NUMBER: ", info);
 				    isdn_tty_at_cout(dev->num[info->drv_index], info);
+				    if (m->mdmreg[REG_CDN] & BIT_CDN) {
+					    isdn_tty_at_cout("\r\nCALLED NUMBER: ", info);
+					    isdn_tty_at_cout(info->emu.cpn, info);
+				    }
 			    }
 			}
 			isdn_tty_at_cout("\r\n", info);
@@ -2734,6 +2749,10 @@
 						isdn_tty_at_cout("\r\n", info);
 						isdn_tty_at_cout("CALLER NUMBER: ", info);
 						isdn_tty_at_cout(dev->num[info->drv_index], info);
+						if (m->mdmreg[REG_CDN] & BIT_CDN) {
+							isdn_tty_at_cout("\r\nCALLED NUMBER: ", info);
+							isdn_tty_at_cout(info->emu.cpn, info);
+						}
 					}
 					break;
 				case RESULT_NO_CARRIER:
diff -urN linux-2.4.10-pre6/drivers/isdn/isdn_tty.h linux/drivers/isdn/isdn_tty.h
--- linux-2.4.10-pre6/drivers/isdn/isdn_tty.h	Mon Dec 11 13:21:44 2000
+++ linux/drivers/isdn/isdn_tty.h	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdn_tty.h,v 1.22 2000/06/21 09:54:29 keil Exp $
+/* $Id: isdn_tty.h,v 1.22.6.1 2001/08/14 14:12:18 kai Exp $
 
  * header for Linux ISDN subsystem, tty related functions (linklevel).
  *
@@ -85,7 +85,10 @@
 
 #define REG_CPN      23
 #define BIT_CPN       1
+#define REG_CPNFCON  23
 #define BIT_CPNFCON   2
+#define REG_CDN      23
+#define BIT_CDN       4
 
 /* defines for result codes */
 #define RESULT_OK		0
diff -urN linux-2.4.10-pre6/drivers/isdn/isdn_ttyfax.c linux/drivers/isdn/isdn_ttyfax.c
--- linux-2.4.10-pre6/drivers/isdn/isdn_ttyfax.c	Sun Aug  6 12:43:42 2000
+++ linux/drivers/isdn/isdn_ttyfax.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdn_ttyfax.c,v 1.7 2000/05/11 22:29:21 kai Exp $
+/* $Id: isdn_ttyfax.c,v 1.7.6.1 2001/08/14 14:12:18 kai Exp $
 
  * Linux ISDN subsystem, tty_fax AT-command emulator (linklevel).
  *
@@ -33,7 +33,7 @@
 #include "isdn_ttyfax.h"
 
 
-static char *isdn_tty_fax_revision = "$Revision: 1.7 $";
+static char *isdn_tty_fax_revision = "$Revision: 1.7.6.1 $";
 
 #define PARSE_ERROR1 { isdn_tty_fax_modem_result(1, info); return 1; }
 
@@ -86,7 +86,7 @@
 			break;
 		case 2:	/* +FCON */
 			/* Append CPN, if enabled */
-			if ((m->mdmreg[REG_CPN] & BIT_CPNFCON) &&
+			if ((m->mdmreg[REG_CPNFCON] & BIT_CPNFCON) &&
 				(!(dev->usage[info->isdn_channel] & ISDN_USAGE_OUTGOING))) {
 				sprintf(rs, "/%s", m->cpn);
 				isdn_tty_at_cout(rs, info);
diff -urN linux-2.4.10-pre6/drivers/isdn/isdnloop/isdnloop.c linux/drivers/isdn/isdnloop/isdnloop.c
--- linux-2.4.10-pre6/drivers/isdn/isdnloop/isdnloop.c	Mon Aug 13 16:35:28 2001
+++ linux/drivers/isdn/isdnloop/isdnloop.c	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdnloop.c,v 1.11.6.4 2001/07/13 09:20:12 kai Exp $
+/* $Id: isdnloop.c,v 1.11.6.5 2001/08/17 12:34:27 kai Exp $
 
  * ISDN low-level module implementing a dummy loop driver.
  *
@@ -26,7 +26,7 @@
 #include "isdnloop.h"
 
 static char
-*revision = "$Revision: 1.11.6.4 $";
+*revision = "$Revision: 1.11.6.5 $";
 
 static int isdnloop_addcard(char *);
 
@@ -985,10 +985,12 @@
 	isdn_ctrl cmd;
 
 	while (len) {
-		int count = MIN(255, len);
+		int count = len;
 		u_char *p;
 		u_char msg[0x100];
 
+		if (count > 255)
+			count = 255;
 		if (user)
 			copy_from_user(msg, buf, count);
 		else
diff -urN linux-2.4.10-pre6/drivers/isdn/isdnloop/isdnloop.h linux/drivers/isdn/isdnloop/isdnloop.h
--- linux-2.4.10-pre6/drivers/isdn/isdnloop/isdnloop.h	Fri Mar  2 11:12:09 2001
+++ linux/drivers/isdn/isdnloop/isdnloop.h	Mon Dec  3 23:08:46 2001
@@ -1,4 +1,4 @@
-/* $Id: isdnloop.h,v 1.5.6.1 2001/02/10 14:41:23 kai Exp $
+/* $Id: isdnloop.h,v 1.5.6.2 2001/08/17 12:34:27 kai Exp $
 
  * Loopback lowlevel module for testing of linklevel.
  *
@@ -128,8 +128,6 @@
 /* Utility-Macros */
 
 #define CID (card->interface.id)
-#define MIN(a,b) ((a<b)?a:b)
-#define MAX(a,b) ((a>b)?a:b)
 
 #endif                          /* defined(__KERNEL__) || defined(__DEBUGVAR__) */
 #endif                          /* isdnloop_h */
diff -urN linux-2.4.10-pre6/drivers/md/lvm.c linux/drivers/md/lvm.c
--- linux-2.4.10-pre6/drivers/md/lvm.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/md/lvm.c	Mon Dec  3 23:08:46 2001
@@ -376,17 +376,13 @@
 {0,};
 static struct gendisk lvm_gendisk =
 {
-	MAJOR_NR,		/* major # */
-	LVM_NAME,		/* name of major */
-	0,			/* number of times minor is shifted
-				   to get real minor */
-	1,			/* maximum partitions per device */
-	lvm_hd_struct,		/* partition table */
-	lvm_size,		/* device size in blocks, copied
-				   to block_size[] */
-	MAX_LV,			/* number or real devices */
-	NULL,			/* internal */
-	NULL,			/* pointer to next gendisk struct (internal) */
+	major:		MAJOR_NR,
+	major_name:	LVM_NAME,
+	minor_shift:	0,
+	max_p:		1,
+	part:		lvm_hd_struct,
+	sizes:		lvm_size,
+	nr_real:	MAX_LV,
 };
 
 /*
diff -urN linux-2.4.10-pre6/drivers/media/video/zr36067.c linux/drivers/media/video/zr36067.c
--- linux-2.4.10-pre6/drivers/media/video/zr36067.c	Wed Jul 25 14:12:02 2001
+++ linux/drivers/media/video/zr36067.c	Mon Dec  3 23:08:46 2001
@@ -3734,7 +3734,6 @@
 			zr->window.chromakey = 0;
 			zr->window.flags = 0;	// RJ: Is this intended for interlace on/off ?
 			zr->window.clips = NULL;
-			zr->window.clipcount = vw.clipcount;
 
 			/*
 			 * If an overlay is running, we have to switch it off
@@ -3775,7 +3774,8 @@
 				write_overlay_mask(zr, vcp, vw.clipcount);
 				vfree(vcp);
 			}
-
+			zr->window.clipcount = vw.clipcount;
+	
 			if (on)
 				zr36057_overlay(zr, 1);
 			zr->window_set = 1;
diff -urN linux-2.4.10-pre6/drivers/media/video/zr36120.c linux/drivers/media/video/zr36120.c
--- linux-2.4.10-pre6/drivers/media/video/zr36120.c	Mon Jul 16 15:13:32 2001
+++ linux/drivers/media/video/zr36120.c	Mon Dec  3 23:08:46 2001
@@ -1056,7 +1056,7 @@
 		DEBUG(printk(CARD_DEBUG "VIDIOCSCHAN(%d,%d)\n",CARD,v.channel,v.norm));
 
 		/* too many inputs? no decoder -> no channels */
-		if (!ztv->have_decoder || v.channel >= ztv->card->video_inputs)
+		if (!ztv->have_decoder || v.channel >= ztv->card->video_inputs || v.channel < 0)
 			return -EINVAL;
 
 		if (v.norm != VIDEO_MODE_PAL &&
diff -urN linux-2.4.10-pre6/drivers/mtd/nftlcore.c linux/drivers/mtd/nftlcore.c
--- linux-2.4.10-pre6/drivers/mtd/nftlcore.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/mtd/nftlcore.c	Mon Dec  3 23:08:46 2001
@@ -1024,11 +1024,6 @@
  *
  ****************************************************************************/
 
-#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
-#define init_nftl init_module
-#define cleanup_nftl cleanup_module
-#endif
-
 static struct mtd_notifier nftl_notifier = {
 	add:	NFTL_notify_add,
 	remove:	NFTL_notify_remove
@@ -1045,14 +1040,12 @@
 #endif
 
 	if (register_blkdev(MAJOR_NR, "nftl", &nftl_fops)){
-		printk("unable to register NFTL block device on major %d\n", MAJOR_NR);
+		printk("unable to register NFTL block device on major %d\n",
+		       MAJOR_NR);
 		return -EBUSY;
 	} else {
-#if LINUX_VERSION_CODE < 0x20320
-		blk_dev[MAJOR_NR].request_fn = nftl_request;
-#else
 		blk_init_queue(BLK_DEFAULT_QUEUE(MAJOR_NR), &nftl_request);
-#endif
+
 		/* set block size to 1kB each */
 		for (i = 0; i < 256; i++) {
 			nftl_blocksizes[i] = 1024;
@@ -1069,20 +1062,12 @@
 
 static void __exit cleanup_nftl(void)
 {
-	struct gendisk *gd, **gdp;
-
   	unregister_mtd_user(&nftl_notifier);
   	unregister_blkdev(MAJOR_NR, "nftl");
   	
-#if LINUX_VERSION_CODE < 0x20320
-  	blk_dev[MAJOR_NR].request_fn = 0;
-#else
   	blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR));
-#endif	
 
-	/* remove ourself from generic harddisk list
-	   FIXME: why can't I found this partition on /proc/partition */
-	del_gendisk(&nftl_gendisk);:
+	del_gendisk(&nftl_gendisk);
 }
 
 module_init(init_nftl);
diff -urN linux-2.4.10-pre6/drivers/net/appletalk/cops.c linux/drivers/net/appletalk/cops.c
--- linux-2.4.10-pre6/drivers/net/appletalk/cops.c	Wed May 16 10:31:27 2001
+++ linux/drivers/net/appletalk/cops.c	Mon Dec  3 23:08:46 2001
@@ -1013,6 +1013,8 @@
 
 #ifdef MODULE
 static struct net_device cops0_dev = { init: cops_probe };
+
+MODULE_LICENSE("GPL");
 MODULE_PARM(io, "i");
 MODULE_PARM(irq, "i");
 MODULE_PARM(board_type, "i");
diff -urN linux-2.4.10-pre6/drivers/net/appletalk/ipddp.c linux/drivers/net/appletalk/ipddp.c
--- linux-2.4.10-pre6/drivers/net/appletalk/ipddp.c	Wed Jun 27 17:10:55 2001
+++ linux/drivers/net/appletalk/ipddp.c	Mon Dec  3 23:08:46 2001
@@ -283,6 +283,7 @@
 
 static struct net_device dev_ipddp;
 
+MODULE_LICENSE("GPL");
 MODULE_PARM(ipddp_mode, "i");
 
 static int __init ipddp_init_module(void)
diff -urN linux-2.4.10-pre6/drivers/net/appletalk/ltpc.c linux/drivers/net/appletalk/ltpc.c
--- linux-2.4.10-pre6/drivers/net/appletalk/ltpc.c	Wed Apr 18 14:40:05 2001
+++ linux/drivers/net/appletalk/ltpc.c	Mon Dec  3 23:08:46 2001
@@ -1255,6 +1255,8 @@
 static struct net_device dev_ltpc;
 
 #ifdef MODULE
+
+MODULE_LICENSE("GPL");
 MODULE_PARM(debug, "i");
 MODULE_PARM(io, "i");
 MODULE_PARM(irq, "i");
diff -urN linux-2.4.10-pre6/drivers/net/au1000_eth.c linux/drivers/net/au1000_eth.c
--- linux-2.4.10-pre6/drivers/net/au1000_eth.c	Wed Jul  4 14:41:33 2001
+++ linux/drivers/net/au1000_eth.c	Mon Dec  3 23:08:46 2001
@@ -39,7 +39,7 @@
 #include <linux/errno.h>
 #include <linux/in.h>
 #include <linux/ioport.h>
-#include <linux/malloc.h>
+#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/pci.h>
 #include <linux/init.h>
diff -urN linux-2.4.10-pre6/drivers/net/cs89x0.c linux/drivers/net/cs89x0.c
--- linux-2.4.10-pre6/drivers/net/cs89x0.c	Wed Jun 20 11:10:53 2001
+++ linux/drivers/net/cs89x0.c	Mon Dec  3 23:08:46 2001
@@ -1111,7 +1111,7 @@
 					(unsigned long)lp->dma_buff,
 					(unsigned long)virt_to_bus(lp->dma_buff));
 			}
-			if ((unsigned long)virt_to_bus(lp->dma_buff) >= MAX_DMA_ADDRESS ||
+			if ((unsigned long) lp->dma_buff >= MAX_DMA_ADDRESS ||
 			    !dma_page_eq(lp->dma_buff, lp->dma_buff+lp->dmasize*1024-1)) {
 				printk(KERN_ERR "%s: not usable as DMA buffer\n", dev->name);
 				goto release_irq;
diff -urN linux-2.4.10-pre6/drivers/net/declance.c linux/drivers/net/declance.c
--- linux-2.4.10-pre6/drivers/net/declance.c	Mon Jul  2 14:03:04 2001
+++ linux/drivers/net/declance.c	Mon Dec  3 23:08:46 2001
@@ -1006,7 +1006,7 @@
 	lance_set_multicast(dev);
 }
 
-static int __init dec_lance_init(const int type)
+static int __init dec_lance_init(struct net_device *dev, const int type)
 {
 	static unsigned version_printed;
 	struct net_device *dev;
@@ -1015,7 +1015,6 @@
 	int i, ret;
 	unsigned long esar_base;
 	unsigned char *esar;
-	struct net_device *dev;
 
 #ifndef CONFIG_TC
 	system_base = KN01_LANCE_BASE;
@@ -1026,12 +1025,12 @@
 	if (dec_lance_debug && version_printed++ == 0)
 		printk(version);
 
-	dev = init_etherdev(NULL, sizeof(struct lance_private));
+	dev = init_etherdev(0, sizeof(struct lance_private));
 	if (!dev)
 		return -ENOMEM;
 
 	/* init_etherdev ensures the data structures used by the LANCE are aligned. */
-	lp = dev->priv;
+	lp = (struct lance_private *) dev->priv;
 	spin_lock_init(&lp->lock);
 
 	switch (type) {
@@ -1217,6 +1216,7 @@
 /* Find all the lance cards on the system and initialize them */
 static int __init dec_lance_probe(void)
 {
+	struct net_device *dev = NULL;
 	static int called;
 
 #ifdef MODULE
@@ -1255,7 +1255,7 @@
 	}
 #endif
 
-	return dec_lance_init(type);
+	return dec_lance_init(dev, type);
 }
 
 static void __exit dec_lance_cleanup(void)
diff -urN linux-2.4.10-pre6/drivers/net/dgrs.c linux/drivers/net/dgrs.c
--- linux-2.4.10-pre6/drivers/net/dgrs.c	Wed Aug 15 01:22:15 2001
+++ linux/drivers/net/dgrs.c	Mon Dec  3 23:08:46 2001
@@ -1292,6 +1292,7 @@
 		if (!devN) 
 			goto fail;
 		memcpy(devN, dev, dev_size);
+		memset(devN->name, 0, sizeof(devN->name));
 		devN->priv = ((void *)devN) + sizeof(struct net_device);
 		privN = (DGRS_PRIV *)devN->priv;
 			/* ... and zero out VM areas */
diff -urN linux-2.4.10-pre6/drivers/net/dmfe.c linux/drivers/net/dmfe.c
--- linux-2.4.10-pre6/drivers/net/dmfe.c	Wed Jul  4 14:41:33 2001
+++ linux/drivers/net/dmfe.c	Mon Dec  3 23:08:46 2001
@@ -61,7 +61,7 @@
 #include <linux/ptrace.h>
 #include <linux/errno.h>
 #include <linux/ioport.h>
-#include <linux/malloc.h>
+#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/pci.h>
 #include <linux/init.h>
diff -urN linux-2.4.10-pre6/drivers/net/gt96100eth.c linux/drivers/net/gt96100eth.c
--- linux-2.4.10-pre6/drivers/net/gt96100eth.c	Fri Apr 13 20:26:07 2001
+++ linux/drivers/net/gt96100eth.c	Mon Dec  3 23:08:46 2001
@@ -1,7 +1,7 @@
 /*
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	stevel@mvista.com or support@mvista.com
+ *         	stevel@mvista.com or source@mvista.com
  *
  * ########################################################################
  *
@@ -29,7 +29,6 @@
 #endif
 
 
-#include <linux/config.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
@@ -38,7 +37,7 @@
 #include <linux/errno.h>
 #include <linux/in.h>
 #include <linux/ioport.h>
-#include <linux/malloc.h>
+#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/pci.h>
 #include <linux/init.h>
diff -urN linux-2.4.10-pre6/drivers/net/gt96100eth.h linux/drivers/net/gt96100eth.h
--- linux-2.4.10-pre6/drivers/net/gt96100eth.h	Fri Apr 13 20:26:07 2001
+++ linux/drivers/net/gt96100eth.h	Mon Dec  3 23:08:46 2001
@@ -1,7 +1,7 @@
 /*
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	stevel@mvista.com or support@mvista.com
+ *         	stevel@mvista.com or source@mvista.com
  *
  * ########################################################################
  *
@@ -27,7 +27,6 @@
 #ifndef _GT96100ETH_H
 #define _GT96100ETH_H
 
-#include <linux/config.h>
 #include <asm/galileo-boards/gt96100.h>
 
 /* Keep the ring sizes a power of two for efficiency. */
diff -urN linux-2.4.10-pre6/drivers/net/irda/irda-usb.c linux/drivers/net/irda/irda-usb.c
--- linux-2.4.10-pre6/drivers/net/irda/irda-usb.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/net/irda/irda-usb.c	Mon Dec  3 23:08:46 2001
@@ -44,7 +44,6 @@
 
 #include <net/irda/irda-usb.h>
 
-static u32 min_turn_times[]  = { 10000, 5000, 1000, 500, 100, 50, 10, 0 }; /* us */
 static int qos_mtt_bits = 0;
 
 static void irda_usb_dump_class_desc(struct irda_class_desc *desc);
diff -urN linux-2.4.10-pre6/drivers/net/irda/toshoboe.c linux/drivers/net/irda/toshoboe.c
--- linux-2.4.10-pre6/drivers/net/irda/toshoboe.c	Wed Jul  4 11:50:38 2001
+++ linux/drivers/net/irda/toshoboe.c	Mon Dec  3 23:08:46 2001
@@ -695,7 +695,6 @@
 {
   struct toshoboe_cb *self;
   struct net_device *dev;
-  struct pm_dev *pmdev;
   int i = 0;
   int ok = 0;
   int err;
@@ -844,11 +843,6 @@
           goto freebufs;
   }
   pci_set_drvdata(pci_dev,self);
-
-/*  pmdev = pm_register (PM_PCI_DEV, PM_PCI_ID(pci_dev), toshoboe_pmproc);
-  if (pmdev)
-	  pmdev->data = self;
-	  */
 
   printk (KERN_WARNING "ToshOboe: Using ");
 #ifdef ONETASK
diff -urN linux-2.4.10-pre6/drivers/net/jazzsonic.c linux/drivers/net/jazzsonic.c
--- linux-2.4.10-pre6/drivers/net/jazzsonic.c	Thu Apr 12 12:15:25 2001
+++ linux/drivers/net/jazzsonic.c	Mon Dec  3 23:08:46 2001
@@ -47,11 +47,12 @@
 /*
  * Macros to access SONIC registers
  */
-#define SONIC_READ(reg) \
-	*((volatile unsigned int *)base_addr+reg)
+#define SONIC_READ(reg) (*((volatile unsigned int *)base_addr+reg))
 
-#define SONIC_WRITE(reg,val) \
-	*((volatile unsigned int *)base_addr+reg) = val
+#define SONIC_WRITE(reg,val)						\
+do {									\
+	*((volatile unsigned int *)base_addr+reg) = val;		\
+}
 
 
 /* use 0 for production, 1 for verification, >2 for debug */
@@ -65,8 +66,8 @@
  * Base address and interrupt of the SONIC controller on JAZZ boards
  */
 static struct {
-    unsigned int port;
-    unsigned int irq;
+	unsigned int port;
+	unsigned int irq;
 } sonic_portlist[] = { {JAZZ_ETHERNET_BASE, JAZZ_ETHERNET_IRQ}, {0, 0}};
 
 /*
@@ -76,14 +77,15 @@
  */
 static unsigned short known_revisions[] =
 {
-  0x04,				/* Mips Magnum 4000 */
-  0xffff			/* end of list */
+	0x04,			/* Mips Magnum 4000 */
+	0xffff			/* end of list */
 };
 
 /* Index to functions, as function prototypes. */
 
 extern int sonic_probe(struct net_device *dev);
-static int sonic_probe1(struct net_device *dev, unsigned int base_addr, unsigned int irq);
+static int sonic_probe1(struct net_device *dev, unsigned int base_addr,
+                        unsigned int irq);
 
 
 /*
@@ -92,164 +94,170 @@
  */
 int __init sonic_probe(struct net_device *dev)
 {
-    unsigned int base_addr = dev ? dev->base_addr : 0;
-    int i;
+	unsigned int base_addr = dev ? dev->base_addr : 0;
+	int i;
 
-    /*
-     * Don't probe if we're not running on a Jazz board.
-     */
-    if (mips_machgroup != MACH_GROUP_JAZZ)
+	/*
+	 * Don't probe if we're not running on a Jazz board.
+	 */
+	if (mips_machgroup != MACH_GROUP_JAZZ)
+		return -ENODEV;
+	if (base_addr >= KSEG0)	/* Check a single specified location. */
+		return sonic_probe1(dev, base_addr, dev->irq);
+	else if (base_addr != 0)	/* Don't probe at all. */
+		return -ENXIO;
+
+	for (i = 0; sonic_portlist[i].port; i++) {
+		int base_addr = sonic_portlist[i].port;
+		if (check_region(base_addr, 0x100))
+			continue;
+		if (sonic_probe1(dev, base_addr, sonic_portlist[i].irq) == 0)
+			return 0;
+	}
 	return -ENODEV;
-    if (base_addr >= KSEG0)	/* Check a single specified location. */
-	return sonic_probe1(dev, base_addr, dev->irq);
-    else if (base_addr != 0)	/* Don't probe at all. */
-	return -ENXIO;
-    
-    for (i = 0; sonic_portlist[i].port; i++) {
-	int base_addr = sonic_portlist[i].port;
-	if (check_region(base_addr, 0x100))
-	    continue;
-	if (sonic_probe1(dev, base_addr, sonic_portlist[i].irq) == 0)
-	    return 0;
-    }
-    return -ENODEV;
 }
 
-static int __init sonic_probe1(struct net_device *dev,
-                               unsigned int base_addr, unsigned int irq)
+static int __init sonic_probe1(struct net_device *dev, unsigned int base_addr,
+                               unsigned int irq)
 {
-    static unsigned version_printed;
-    unsigned int silicon_revision;
-    unsigned int val;
-    struct sonic_local *lp;
-    int i;
-    
-    /*
-     * get the Silicon Revision ID. If this is one of the known
-     * one assume that we found a SONIC ethernet controller at
-     * the expected location.
-     */
-    silicon_revision = SONIC_READ(SONIC_SR);
-    if (sonic_debug > 1)
-      printk("SONIC Silicon Revision = 0x%04x\n",silicon_revision);
-
-    i = 0;
-    while ((known_revisions[i] != 0xffff) &&
-	   (known_revisions[i] != silicon_revision))
-      i++;
-	
-    if (known_revisions[i] == 0xffff) {
-	printk("SONIC ethernet controller not found (0x%4x)\n",
-	       silicon_revision);
-	return -ENODEV;
-    }
-    
-    if (!request_region(base_addr, 0x100, dev->name))
-    	return -EBUSY;
-    
-    if (sonic_debug  &&  version_printed++ == 0)
-      printk(version);
-
-    printk("%s: %s found at 0x%08x, ",
-	   dev->name, "SONIC ethernet", base_addr);
+	static unsigned version_printed;
+	unsigned int silicon_revision;
+	unsigned int val;
+	struct sonic_local *lp;
+	int i;
 
-    /* Fill in the 'dev' fields. */
-    dev->base_addr = base_addr;
-    dev->irq = irq;
-
-    /*
-     * Put the sonic into software reset, then
-     * retrieve and print the ethernet address.
-     */
-    SONIC_WRITE(SONIC_CMD,SONIC_CR_RST);
-    SONIC_WRITE(SONIC_CEP,0);
-    for (i=0; i<3; i++) {
-	val = SONIC_READ(SONIC_CAP0-i);
-	dev->dev_addr[i*2] = val;
-	dev->dev_addr[i*2+1] = val >> 8;
-    }
-
-    printk("HW Address ");
-    for (i = 0; i < 6; i++) {
-	printk("%2.2x", dev->dev_addr[i]);
-	if (i<5)
-	  printk(":");
-    }
-    
-    printk(" IRQ %d\n", irq);
-    
-    /* Initialize the device structure. */
-    if (dev->priv == NULL) {
 	/*
-	 * the memory be located in the same 64kb segment
+	 * get the Silicon Revision ID. If this is one of the known
+	 * one assume that we found a SONIC ethernet controller at
+	 * the expected location.
 	 */
-	lp = NULL;
+	silicon_revision = SONIC_READ(SONIC_SR);
+	if (sonic_debug > 1)
+		printk("SONIC Silicon Revision = 0x%04x\n",silicon_revision);
+
 	i = 0;
-	do {
-	    lp = (struct sonic_local *)kmalloc(sizeof(*lp), GFP_KERNEL);
-	    if ((unsigned long)lp >> 16 != ((unsigned long)lp + sizeof(*lp) ) >> 16) {
-		/* FIXME, free the memory later */
-		kfree (lp);
-		lp = NULL;
-	    }
-	} while (lp == NULL && i++ < 20);
-	
-	if (lp == NULL) {
-	    printk ("%s: couldn't allocate memory for descriptors\n",
-	            dev->name);
-	    return -ENOMEM;
+	while (known_revisions[i] != 0xffff
+	       && known_revisions[i] != silicon_revision)
+		i++;
+
+	if (known_revisions[i] == 0xffff) {
+		printk("SONIC ethernet controller not found (0x%4x)\n",
+		       silicon_revision);
+		return -ENODEV;
 	}
-	
-	memset(lp, 0, sizeof(struct sonic_local));
-	
-	/* get the virtual dma address */
-	lp->cda_laddr = vdma_alloc(PHYSADDR(lp),sizeof(*lp));
-	if (lp->cda_laddr == ~0UL) {
-	    printk ("%s: couldn't get DMA page entry for descriptors\n",
-	            dev->name);
-	    return -ENOMEM;
+    
+	if (!request_region(base_addr, 0x100, dev->name))
+		return -EBUSY;
+
+	if (sonic_debug  &&  version_printed++ == 0)
+		printk(version);
+
+	printk("%s: Sonic ethernet found at 0x%08lx, ", dev->name, base_addr);
+
+	/* Fill in the 'dev' fields. */
+	dev->base_addr = base_addr;
+	dev->irq = irq;
+
+	/*
+	 * Put the sonic into software reset, then
+	 * retrieve and print the ethernet address.
+	 */
+	SONIC_WRITE(SONIC_CMD,SONIC_CR_RST);
+	SONIC_WRITE(SONIC_CEP,0);
+	for (i=0; i<3; i++) {
+		val = SONIC_READ(SONIC_CAP0-i);
+		dev->dev_addr[i*2] = val;
+		dev->dev_addr[i*2+1] = val >> 8;
 	}
 
-	lp->tda_laddr = lp->cda_laddr + sizeof (lp->cda);
-	lp->rra_laddr = lp->tda_laddr + sizeof (lp->tda);
-	lp->rda_laddr = lp->rra_laddr + sizeof (lp->rra);
-	
-	/* allocate receive buffer area */
-	/* FIXME, maybe we should use skbs */
-	if ((lp->rba = (char *)kmalloc(SONIC_NUM_RRS * SONIC_RBSIZE, GFP_KERNEL)) == NULL) {
-	    printk ("%s: couldn't allocate receive buffers\n",dev->name);
-	    return -ENOMEM;
+	printk("HW Address ");
+	for (i = 0; i < 6; i++) {
+		printk("%2.2x", dev->dev_addr[i]);
+		if (i<5)
+			printk(":");
 	}
-	
-	/* get virtual dma address */
-	if ((lp->rba_laddr = vdma_alloc(PHYSADDR(lp->rba),SONIC_NUM_RRS * SONIC_RBSIZE)) == ~0UL) {
-	    printk ("%s: couldn't get DMA page entry for receive buffers\n",dev->name);
-	    return -ENOMEM;
+
+	printk(" IRQ %d\n", irq);
+    
+	/* Initialize the device structure. */
+	if (dev->priv == NULL) {
+		/*
+		 * the memory be located in the same 64kb segment
+		 */
+		lp = NULL;
+		i = 0;
+		do {
+			lp = kmalloc(sizeof(*lp), GFP_KERNEL);
+			if ((unsigned long) lp >> 16
+			    != ((unsigned long)lp + sizeof(*lp) ) >> 16) {
+				/* FIXME, free the memory later */
+				kfree(lp);
+				lp = NULL;
+			}
+		} while (lp == NULL && i++ < 20);
+
+		if (lp == NULL) {
+			printk("%s: couldn't allocate memory for descriptors\n",
+			       dev->name);
+			return -ENOMEM;
+		}
+
+		memset(lp, 0, sizeof(struct sonic_local));
+
+		/* get the virtual dma address */
+		lp->cda_laddr = vdma_alloc(PHYSADDR(lp),sizeof(*lp));
+		if (lp->cda_laddr == ~0UL) {
+			printk("%s: couldn't get DMA page entry for "
+			       "descriptors\n", dev->name);
+			return -ENOMEM;
+		}
+
+		lp->tda_laddr = lp->cda_laddr + sizeof (lp->cda);
+		lp->rra_laddr = lp->tda_laddr + sizeof (lp->tda);
+		lp->rda_laddr = lp->rra_laddr + sizeof (lp->rra);
+	
+		/* allocate receive buffer area */
+		/* FIXME, maybe we should use skbs */
+		lp->rba = kmalloc(SONIC_NUM_RRS * SONIC_RBSIZE, GFP_KERNEL);
+		if (!lp->rba) {
+			printk("%s: couldn't allocate receive buffers\n",
+			       dev->name);
+			return -ENOMEM;
+		}
+
+		/* get virtual dma address */
+		lp->rba_laddr = vdma_alloc(PHYSADDR(lp->rba),
+		                           SONIC_NUM_RRS * SONIC_RBSIZE);
+		if (lp->rba_laddr == ~0UL) {
+			printk("%s: couldn't get DMA page entry for receive "
+			       "buffers\n",dev->name);
+			return -ENOMEM;
+		}
+
+		/* now convert pointer to KSEG1 pointer */
+		lp->rba = (char *)KSEG1ADDR(lp->rba);
+		flush_cache_all();
+		dev->priv = (struct sonic_local *)KSEG1ADDR(lp);
 	}
-	
-	/* now convert pointer to KSEG1 pointer */
-	lp->rba = (char *)KSEG1ADDR(lp->rba);
-	flush_cache_all();
-	dev->priv = (struct sonic_local *)KSEG1ADDR(lp);
-    }
-
-    lp = (struct sonic_local *)dev->priv;
-    dev->open = sonic_open;
-    dev->stop = sonic_close;
-    dev->hard_start_xmit = sonic_send_packet;
-    dev->get_stats	= sonic_get_stats;
-    dev->set_multicast_list = &sonic_multicast_list;
-
-    /*
-     * clear tally counter
-     */
-    SONIC_WRITE(SONIC_CRCT,0xffff);
-    SONIC_WRITE(SONIC_FAET,0xffff);
-    SONIC_WRITE(SONIC_MPT,0xffff);
-
-    /* Fill in the fields of the device structure with ethernet values. */
-    ether_setup(dev);
-    return 0;
+
+	lp = (struct sonic_local *)dev->priv;
+	dev->open = sonic_open;
+	dev->stop = sonic_close;
+	dev->hard_start_xmit = sonic_send_packet;
+	dev->get_stats	= sonic_get_stats;
+	dev->set_multicast_list = &sonic_multicast_list;
+	dev->watchdog_timeo = TX_TIMEOUT;
+
+	/*
+	 * clear tally counter
+	 */
+	SONIC_WRITE(SONIC_CRCT,0xffff);
+	SONIC_WRITE(SONIC_FAET,0xffff);
+	SONIC_WRITE(SONIC_MPT,0xffff);
+
+	/* Fill in the fields of the device structure with ethernet values. */
+	ether_setup(dev);
+	return 0;
 }
 
 /*
diff -urN linux-2.4.10-pre6/drivers/net/lp486e.c linux/drivers/net/lp486e.c
--- linux-2.4.10-pre6/drivers/net/lp486e.c	Tue Jul 17 18:53:55 2001
+++ linux/drivers/net/lp486e.c	Mon Dec  3 23:08:46 2001
@@ -7,7 +7,7 @@
         Written 1993 by Donald Becker.
         Copyright 1993 United States Government as represented by the Director,
         National Security Agency.  This software may only be used and
-	distributed according to the terms of the GNU Public License
+	distributed according to the terms of the GNU General Public License
 	as modified by SRC, incorporated herein by reference.
 
         The author may be reached as becker@scyld.com, or C/O
@@ -67,7 +67,7 @@
 #include <linux/ptrace.h>
 #include <linux/errno.h>
 #include <linux/ioport.h>
-#include <linux/malloc.h>
+#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
diff -urN linux-2.4.10-pre6/drivers/net/ns83820.c linux/drivers/net/ns83820.c
--- linux-2.4.10-pre6/drivers/net/ns83820.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/net/ns83820.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,1429 @@
+#define VERSION "0.11"
+/* ns83820.c by Benjamin LaHaise <bcrl@redhat.com>
+ *
+ * $Revision: 1.34.2.2 $
+ *
+ * Copyright 2001 Benjamin LaHaise.
+ * Copyright 2001 Red Hat.
+ *
+ * Mmmm, chocolate vanilla mocha...
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *
+ * ChangeLog
+ * =========
+ *	20010414	0.1 - created
+ *	20010622	0.2 - basic rx and tx.
+ *	20010711	0.3 - added duplex and link state detection support.
+ *	20010713	0.4 - zero copy, no hangs.
+ *			0.5 - 64 bit dma support (davem will hate me for this)
+ *			    - disable jumbo frames to avoid tx hangs
+ *			    - work around tx deadlocks on my 1.02 card via
+ *			      fiddling with TXCFG
+ *	20010810	0.6 - use pci dma api for ringbuffers, work on ia64
+ *	20010816	0.7 - misc cleanups
+ *	20010826	0.8 - fix critical zero copy bugs
+ *			0.9 - internal experiment
+ *	20010827	0.10 - fix ia64 unaligned access.
+ *	20010906	0.11 - accept all packets with checksum errors as
+ *			       otherwise fragments get lost
+			     - fix >> 32 bugs
+ *
+ * Driver Overview
+ * ===============
+ *
+ * This driver was originally written for the National Semiconductor
+ * 83820 chip, a 10/100/1000 Mbps 64 bit PCI ethernet NIC.  Hopefully
+ * this code will turn out to be a) clean, b) correct, and c) fast.
+ * With that in mind, I'm aiming to split the code up as much as
+ * reasonably possible.  At present there are X major sections that
+ * break down into a) packet receive, b) packet transmit, c) link
+ * management, d) initialization and configuration.  Where possible,
+ * these code paths are designed to run in parallel.
+ *
+ * This driver has been tested and found to work with the following
+ * cards (in no particular order):
+ *
+ *	Cameo		SOHO-GA2000T	SOHO-GA2500T
+ *	D-Link		DGE-500T
+ *	PureData	PDP8023Z-TG
+ *	SMC		SMC9462TX
+ *
+ * Reports of success or failure would be greatly appreciated.
+ */
+//#define dprintk		printk
+#define dprintk(x...)		do { } while (0)
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/delay.h>
+#include <linux/smp_lock.h>
+#include <linux/tqueue.h>
+#include <linux/init.h>
+#include <linux/ip.h>	/* for iph */
+#include <linux/in.h>	/* for IPPROTO_... */
+#include <linux/eeprom.h>
+//#include <linux/skbrefill.h>
+
+/* Dprintk is used for more interesting debug events */
+#undef Dprintk
+#define	Dprintk			dprintk
+
+#if !defined(GCC_VERSION) || (GCC_VERSION < 2096)
+#define __builtin_expect(x,y)	(x)
+#endif
+
+#ifdef CONFIG_HIGHMEM64G
+#define USE_64BIT_ADDR
+#elif defined(__ia64__)
+#define USE_64BIT_ADDR
+#endif
+
+/* Tell davem to fix the pci dma api.  Grrr. */
+/* stolen from acenic.c */
+#ifdef CONFIG_HIGHMEM
+#if defined(CONFIG_X86)
+#define DMAADDR_OFFSET  0
+#if defined(CONFIG_HIGHMEM64G)
+typedef u64 dmaaddr_high_t;
+#else
+typedef u32 dmaaddr_high_t;
+#endif
+#elif defined(CONFIG_PPC)
+#define DMAADDR_OFFSET PCI_DRAM_OFFSET
+typedef unsigned long dmaaddr_high_t;
+#endif
+
+static inline dmaaddr_high_t
+pci_map_single_high(struct pci_dev *hwdev, struct page *page,
+		    int offset, size_t size, int dir)
+{
+	u64 phys;
+	phys = page - mem_map;
+	phys <<= PAGE_SHIFT;
+	phys += offset;
+	phys += DMAADDR_OFFSET;
+	return phys;
+}
+#else
+
+typedef unsigned long dmaaddr_high_t;
+
+static inline dmaaddr_high_t
+pci_map_single_high(struct pci_dev *hwdev, struct page *page,
+		    int offset, size_t size, int dir)
+{
+	return pci_map_single(hwdev, page_address(page) + offset, size, dir);
+}
+#endif
+
+/* tunables */
+#define RX_BUF_SIZE	6144	/* 8192 */
+#define NR_RX_DESC	256
+
+#define NR_TX_DESC	256
+
+/* register defines */
+#define CFGCS		0x04
+
+#define CR_TXE		0x00000001
+#define CR_TXD		0x00000002
+#define CR_RXE		0x00000004
+#define CR_RXD		0x00000008
+#define CR_TXR		0x00000010
+#define CR_RXR		0x00000020
+#define CR_SWI		0x00000080
+#define CR_RST		0x00000100
+
+#define PTSCR_EEBIST_EN	0x00000002
+#define PTSCR_EELOAD_EN	0x00000004
+
+#define ISR_TXDESC3	0x40000000
+#define ISR_TXDESC2	0x20000000
+#define ISR_TXDESC1	0x10000000
+#define ISR_TXDESC0	0x08000000
+#define ISR_RXDESC3	0x04000000
+#define ISR_RXDESC2	0x02000000
+#define ISR_RXDESC1	0x01000000
+#define ISR_RXDESC0	0x00800000
+#define ISR_TXRCMP	0x00400000
+#define ISR_RXRCMP	0x00200000
+#define ISR_DPERR	0x00100000
+#define ISR_SSERR	0x00080000
+#define ISR_RMABT	0x00040000
+#define ISR_RTABT	0x00020000
+#define ISR_RXSOVR	0x00010000
+#define ISR_HIBINT	0x00008000
+#define ISR_PHY		0x00004000
+#define ISR_PME		0x00002000
+#define ISR_SWI		0x00001000
+#define ISR_MIB		0x00000800
+#define ISR_TXURN	0x00000400
+#define ISR_TXIDLE	0x00000200
+#define ISR_TXERR	0x00000100
+#define ISR_TXDESC	0x00000080
+#define ISR_TXOK	0x00000040
+#define ISR_RXORN	0x00000020
+#define ISR_RXIDLE	0x00000010
+#define ISR_RXEARLY	0x00000008
+#define ISR_RXERR	0x00000004
+#define ISR_RXDESC	0x00000002
+#define ISR_RXOK	0x00000001
+
+#define TXCFG_CSI	0x80000000
+#define TXCFG_HBI	0x40000000
+#define TXCFG_MLB	0x20000000
+#define TXCFG_ATP	0x10000000
+#define TXCFG_ECRETRY	0x00800000
+#define TXCFG_BRST_DIS	0x00080000
+#define TXCFG_MXDMA1024	0x00000000
+#define TXCFG_MXDMA512	0x00700000
+#define TXCFG_MXDMA256	0x00600000
+#define TXCFG_MXDMA128	0x00500000
+#define TXCFG_MXDMA64	0x00400000
+#define TXCFG_MXDMA32	0x00300000
+#define TXCFG_MXDMA16	0x00200000
+#define TXCFG_MXDMA8	0x00100000
+
+#define CFG_LNKSTS	0x80000000
+#define CFG_SPDSTS	0x60000000
+#define CFG_SPDSTS1	0x40000000
+#define CFG_SPDSTS0	0x20000000
+#define CFG_DUPSTS	0x10000000
+#define CFG_TBI_EN	0x01000000
+#define CFG_MODE_1000	0x00400000
+#define CFG_PINT_CTL	0x001c0000
+#define CFG_PINT_DUPSTS	0x00100000
+#define CFG_PINT_LNKSTS	0x00080000
+#define CFG_PINT_SPDSTS	0x00040000
+#define CFG_TMRTEST	0x00020000
+#define CFG_MRM_DIS	0x00010000
+#define CFG_MWI_DIS	0x00008000
+#define CFG_T64ADDR	0x00004000
+#define CFG_PCI64_DET	0x00002000
+#define CFG_DATA64_EN	0x00001000
+#define CFG_M64ADDR	0x00000800
+#define CFG_PHY_RST	0x00000400
+#define CFG_PHY_DIS	0x00000200
+#define CFG_EXTSTS_EN	0x00000100
+#define CFG_REQALG	0x00000080
+#define CFG_SB		0x00000040
+#define CFG_POW		0x00000020
+#define CFG_EXD		0x00000010
+#define CFG_PESEL	0x00000008
+#define CFG_BROM_DIS	0x00000004
+#define CFG_EXT_125	0x00000002
+#define CFG_BEM		0x00000001
+
+#define EXTSTS_UDPPKT	0x00200000
+#define EXTSTS_TCPPKT	0x00080000
+#define EXTSTS_IPPKT	0x00020000
+
+#define SPDSTS_POLARITY	(CFG_SPDSTS1 | CFG_SPDSTS0 | CFG_DUPSTS)
+
+#define MIBC_MIBS	0x00000008
+#define MIBC_ACLR	0x00000004
+#define MIBC_FRZ	0x00000002
+#define MIBC_WRN	0x00000001
+
+#define RXCFG_AEP	0x80000000
+#define RXCFG_ARP	0x40000000
+#define RXCFG_STRIPCRC	0x20000000
+#define RXCFG_RX_FD	0x10000000
+#define RXCFG_ALP	0x08000000
+#define RXCFG_AIRL	0x04000000
+#define RXCFG_MXDMA	0x00700000
+#define RXCFG_MXDMA0	0x00100000
+#define RXCFG_MXDMA64	0x00600000
+#define RXCFG_DRTH	0x0000003e
+#define RXCFG_DRTH0	0x00000002
+
+#define RFCR_RFEN	0x80000000
+#define RFCR_AAB	0x40000000
+#define RFCR_AAM	0x20000000
+#define RFCR_AAU	0x10000000
+#define RFCR_APM	0x08000000
+#define RFCR_APAT	0x07800000
+#define RFCR_APAT3	0x04000000
+#define RFCR_APAT2	0x02000000
+#define RFCR_APAT1	0x01000000
+#define RFCR_APAT0	0x00800000
+#define RFCR_AARP	0x00400000
+#define RFCR_MHEN	0x00200000
+#define RFCR_UHEN	0x00100000
+#define RFCR_ULM	0x00080000
+
+#define VRCR_RUDPE	0x00000080
+#define VRCR_RTCPE	0x00000040
+#define VRCR_RIPE	0x00000020
+#define VRCR_IPEN	0x00000010
+#define VRCR_DUTF	0x00000008
+#define VRCR_DVTF	0x00000004
+#define VRCR_VTREN	0x00000002
+#define VRCR_VTDEN	0x00000001
+
+#define VTCR_PPCHK	0x00000008
+#define VTCR_GCHK	0x00000004
+#define VTCR_VPPTI	0x00000002
+#define VTCR_VGTI	0x00000001
+
+#define CR		0x00
+#define CFG		0x04
+#define MEAR		0x08
+#define PTSCR		0x0c
+#define	ISR		0x10
+#define	IMR		0x14
+#define	IER		0x18
+#define	IHR		0x1c
+#define TXDP		0x20
+#define TXDP_HI		0x24
+#define TXCFG		0x28
+#define GPIOR		0x2c
+#define RXDP		0x30
+#define RXDP_HI		0x34
+#define RXCFG		0x38
+#define PQCR		0x3c
+#define WCSR		0x40
+#define PCR		0x44
+#define RFCR		0x48
+#define RFDR		0x4c
+
+#define SRR		0x58
+
+#define VRCR		0xbc
+#define VTCR		0xc0
+#define VDR		0xc4
+#define CCSR		0xcc
+
+#define __kick_rx(dev)	writel(CR_RXE, dev->base + CR)
+
+#define kick_rx(dev) do { \
+	dprintk("kick_rx: maybe kicking\n"); \
+	if (test_and_clear_bit(0, &dev->rx_info.idle)) { \
+		dprintk("actually kicking\n"); \
+		writel(dev->rx_info.phy_descs + (4 * DESC_SIZE * dev->rx_info.next_rx), dev->base + RXDP); \
+		if (dev->rx_info.next_rx == dev->rx_info.next_empty) \
+			printk(KERN_DEBUG "%s: uh-oh: next_rx == next_empty???\n", dev->net_dev.name);\
+		__kick_rx(dev); \
+	} \
+} while(0)
+
+#ifdef USE_64BIT_ADDR
+typedef u64	hw_addr_t;
+#else
+typedef u32	hw_addr_t;
+#endif
+
+#define HW_ADDR_LEN	(sizeof(hw_addr_t))
+
+#define LINK		0
+#define BUFPTR		(LINK + HW_ADDR_LEN/4)
+#define CMDSTS		(BUFPTR + HW_ADDR_LEN/4)
+#define EXTSTS		(CMDSTS + 4/4)
+#define DRV_NEXT	(EXTSTS + 4/4)
+
+#define CMDSTS_OWN	0x80000000
+#define CMDSTS_MORE	0x40000000
+#define CMDSTS_INTR	0x20000000
+#define CMDSTS_ERR	0x10000000
+#define CMDSTS_OK	0x08000000
+
+#define CMDSTS_DEST_MASK	0x01800000
+#define CMDSTS_DEST_SELF	0x00800000
+#define CMDSTS_DEST_MULTI	0x01000000
+
+#define DESC_SIZE	8		/* Should be cache line sized */
+
+struct rx_info {
+	spinlock_t	lock;
+	int		up;
+	long		idle;
+
+	struct sk_buff	*skbs[NR_RX_DESC];
+
+	unsigned	next_rx, next_empty;
+
+	u32		*descs;
+	dma_addr_t	phy_descs;
+};
+
+
+struct ns83820 {
+	struct net_device	net_dev;
+	u8			*base;
+
+	struct pci_dev		*pci_dev;
+	struct ns83820		*next_dev;
+
+	struct rx_info		rx_info;
+
+	unsigned		ihr;
+	struct tq_struct	tq_refill;
+
+	/* protects everything below.  irqsave when using. */
+	spinlock_t		misc_lock;
+
+	u32			CFG_cache;
+
+	u32			MEAR_cache;
+	u32			IMR_cache;
+	struct eeprom		ee;
+
+
+	spinlock_t	tx_lock;
+
+	long		tx_idle;
+	u32		tx_done_idx;
+	u32		tx_idx;
+	volatile u32	tx_free_idx;	/* idx of free desc chain */
+	u32		tx_intr_idx;
+
+	struct sk_buff	*tx_skbs[NR_TX_DESC];
+
+	char		pad[16] __attribute__((aligned(16)));
+	u32		*tx_descs;
+	dma_addr_t	tx_phy_descs;
+};
+
+//free = (tx_done_idx + NR_TX_DESC-2 - free_idx) % NR_TX_DESC
+#define start_tx_okay(dev)	\
+	(((NR_TX_DESC-2 + dev->tx_done_idx - dev->tx_free_idx) % NR_TX_DESC) > NR_TX_DESC/2)
+
+static struct ns83820	*ns83820_chain;
+
+
+/* Packet Receiver
+ *
+ * The hardware supports linked lists of receive descriptors for
+ * which ownership is transfered back and forth by means of an
+ * ownership bit.  While the hardware does support the use of a
+ * ring for receive descriptors, we only make use of a chain in
+ * an attempt to reduce bus traffic under heavy load scenarios.
+ * This will also make bugs a bit more obvious.  The current code
+ * only makes use of a single rx chain; I hope to implement
+ * priority based rx for version 1.0.  Goal: even under overload
+ * conditions, still route realtime traffic with as low jitter as
+ * possible.
+ */
+#ifdef USE_64BIT_ADDR
+static inline void build_rx_desc64(struct ns83820 *dev, u32 *desc, u64 link, u64 buf, u32 cmdsts, u32 extsts)
+{
+	desc[0] = link;
+	desc[1] = link >> 32;
+	desc[2] = buf;
+	desc[3] = buf >> 32;
+	desc[5] = extsts;
+	mb();
+	desc[4] = cmdsts;
+}
+
+#define build_rx_desc	build_rx_desc64
+#else
+
+static inline void build_rx_desc32(struct ns83820 *dev, u32 *desc, u32 link, u32 buf, u32 cmdsts, u32 extsts)
+{
+	desc[0] = link;
+	desc[1] = buf;
+	desc[3] = extsts;
+	mb();
+	desc[2] = cmdsts;
+}
+
+#define build_rx_desc	build_rx_desc32
+#endif
+
+#define nr_rx_empty(dev) ((NR_RX_DESC-2 + dev->rx_info.next_rx - dev->rx_info.next_empty) % NR_RX_DESC)
+static inline int ns83820_add_rx_skb(struct ns83820 *dev, struct sk_buff *skb)
+{
+	unsigned next_empty;
+	u32 cmdsts;
+	u32 *sg;
+	hw_addr_t buf;
+
+	next_empty = dev->rx_info.next_empty;
+
+	/* don't overrun last rx marker */
+	if (nr_rx_empty(dev) <= 2) {
+		kfree_skb(skb);
+		return 1;
+	}
+
+#if 0
+	dprintk("next_empty[%d] nr_used[%d] next_rx[%d]\n",
+		dev->rx_info.next_empty,
+		dev->rx_info.nr_used,
+		dev->rx_info.next_rx
+		);
+#endif
+
+	sg = dev->rx_info.descs + (next_empty * DESC_SIZE);
+	if (dev->rx_info.skbs[next_empty])
+		BUG();
+	dev->rx_info.skbs[next_empty] = skb;
+
+	dev->rx_info.next_empty = (next_empty + 1) % NR_RX_DESC;
+	cmdsts = RX_BUF_SIZE | CMDSTS_INTR;
+	buf = pci_map_single(dev->pci_dev, skb->tail, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
+	build_rx_desc(dev, sg, 0, buf, cmdsts, 0);
+	/* update link of previous rx */
+	if (next_empty != dev->rx_info.next_rx)
+		dev->rx_info.descs[((NR_RX_DESC + next_empty - 1) % NR_RX_DESC) * DESC_SIZE] = dev->rx_info.phy_descs + (next_empty * DESC_SIZE * 4);
+
+	return 0;
+}
+
+static int rx_refill(struct ns83820 *dev, int gfp)
+{
+	unsigned i;
+	long flags = 0;
+
+	dprintk("rx_refill(%p)\n", dev);
+	if (gfp == GFP_ATOMIC)
+		spin_lock_irqsave(&dev->rx_info.lock, flags);
+	for (i=0; i<NR_RX_DESC; i++) {
+		struct sk_buff *skb;
+		long res;
+		skb = __dev_alloc_skb(RX_BUF_SIZE+16, gfp);
+		if (!skb)
+			break;
+
+		res = (long)skb->tail & 0xf;
+		res = 0x10 - res;
+		res &= 0xf;
+		skb_reserve(skb, res);
+
+		skb->dev = &dev->net_dev;
+		if (gfp != GFP_ATOMIC)
+			spin_lock_irqsave(&dev->rx_info.lock, flags);
+		res = ns83820_add_rx_skb(dev, skb);
+		if (gfp != GFP_ATOMIC)
+			spin_unlock_irqrestore(&dev->rx_info.lock, flags);
+		if (res) {
+			i = 1;
+			break;
+		}
+	}
+	if (gfp == GFP_ATOMIC)
+		spin_unlock_irqrestore(&dev->rx_info.lock, flags);
+
+	return i ? 0 : -ENOMEM;
+}
+
+/* REFILL */
+static inline void queue_refill(void *_dev)
+{
+	struct ns83820 *dev = _dev;
+
+	rx_refill(dev, GFP_KERNEL);
+	if (dev->rx_info.up)
+		kick_rx(dev);
+}
+
+static inline void clear_rx_desc(struct ns83820 *dev, unsigned i)
+{
+	build_rx_desc(dev, dev->rx_info.descs + (DESC_SIZE * i), 0, 0, CMDSTS_OWN, 0);
+}
+
+static void phy_intr(struct ns83820 *dev)
+{
+	static char *speeds[] = { "10", "100", "1000", "1000(?)" };
+	u32 cfg, new_cfg;
+
+	new_cfg = dev->CFG_cache & ~(CFG_SB | CFG_MODE_1000 | CFG_SPDSTS);
+	cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY;
+
+	if (cfg & CFG_SPDSTS1)
+		new_cfg |= CFG_MODE_1000 | CFG_SB;
+	else
+		new_cfg &= ~CFG_MODE_1000 | CFG_SB;
+
+	if ((cfg & CFG_LNKSTS) && ((new_cfg ^ dev->CFG_cache) & CFG_MODE_1000)) {
+		writel(new_cfg, dev->base + CFG);
+		dev->CFG_cache = new_cfg;
+	}
+
+	dev->CFG_cache &= ~CFG_SPDSTS;
+	dev->CFG_cache |= cfg & CFG_SPDSTS;
+
+	if (cfg & CFG_LNKSTS) {
+		netif_start_queue(&dev->net_dev);
+		netif_wake_queue(&dev->net_dev);
+	} else {
+		netif_stop_queue(&dev->net_dev);
+	}
+
+	if (cfg & CFG_LNKSTS)
+		printk(KERN_INFO "%s: link now %s mbps, %s duplex and up.\n",
+			dev->net_dev.name,
+			speeds[((cfg / CFG_SPDSTS0) & 3)],
+			(cfg & CFG_DUPSTS) ? "full" : "half");
+	else
+		printk(KERN_INFO "%s: link now down.\n", dev->net_dev.name);
+}
+
+static int ns83820_setup_rx(struct ns83820 *dev)
+{
+	unsigned i;
+	int ret;
+
+	dprintk("ns83820_setup_rx(%p)\n", dev);
+
+	dev->rx_info.idle = 1;
+	dev->rx_info.next_rx = 0;
+	dev->rx_info.next_empty = 0;
+
+	for (i=0; i<NR_RX_DESC; i++)
+		clear_rx_desc(dev, i);
+
+	writel(0, dev->base + RXDP_HI);
+	writel(dev->rx_info.phy_descs, dev->base + RXDP);
+
+	ret = rx_refill(dev, GFP_KERNEL);
+	if (!ret) {
+		dprintk("starting receiver\n");
+		/* prevent the interrupt handler from stomping on us */
+		spin_lock_irq(&dev->rx_info.lock);
+
+		writel(0x0001, dev->base + CCSR);
+		writel(0, dev->base + RFCR);
+		writel(0x7fc00000, dev->base + RFCR);
+		writel(0xffc00000, dev->base + RFCR);
+
+		dev->rx_info.up = 1;
+
+		phy_intr(dev);
+
+		/* Okay, let it rip */
+		spin_lock(&dev->misc_lock);
+		dev->IMR_cache |= ISR_PHY;
+		dev->IMR_cache |= ISR_RXRCMP;
+		//dev->IMR_cache |= ISR_RXERR;
+		//dev->IMR_cache |= ISR_RXOK;
+		dev->IMR_cache |= ISR_RXORN;
+		dev->IMR_cache |= ISR_RXSOVR;
+		dev->IMR_cache |= ISR_RXDESC;
+		dev->IMR_cache |= ISR_RXIDLE;
+		dev->IMR_cache |= ISR_TXDESC;
+		//dev->IMR_cache |= ISR_TXIDLE;
+
+		writel(dev->IMR_cache, dev->base + IMR);
+		writel(1, dev->base + IER);
+		spin_unlock(&dev->misc_lock);
+
+		kick_rx(dev);
+
+		spin_unlock_irq(&dev->rx_info.lock);
+	}
+	return ret;
+}
+
+static void ns83820_cleanup_rx(struct ns83820 *dev)
+{
+	unsigned i;
+	long flags;
+
+	dprintk("ns83820_cleanup_rx(%p)\n", dev);
+
+	/* disable receive interrupts */
+	spin_lock_irqsave(&dev->misc_lock, flags);
+	dev->IMR_cache &= ~(ISR_RXOK | ISR_RXDESC | ISR_RXERR | ISR_RXEARLY | ISR_RXIDLE);
+	writel(dev->IMR_cache, dev->base + IMR);
+	spin_unlock_irqrestore(&dev->misc_lock, flags);
+
+	/* synchronize with the interrupt handler and kill it */
+	dev->rx_info.up = 0;
+	synchronize_irq();
+
+	/* touch the pci bus... */
+	readl(dev->base + IMR);
+
+	/* assumes the transmitter is already disabled and reset */
+	writel(0, dev->base + RXDP_HI);
+	writel(0, dev->base + RXDP);
+
+	for (i=0; i<NR_RX_DESC; i++) {
+		struct sk_buff *skb = dev->rx_info.skbs[i];
+		dev->rx_info.skbs[i] = NULL;
+		clear_rx_desc(dev, i);
+		if (skb)
+			kfree_skb(skb);
+	}
+}
+
+/* rx_irq
+ *	
+ */
+static void FASTCALL(rx_irq(struct ns83820 *dev));
+static void rx_irq(struct ns83820 *dev)
+{
+	struct rx_info *info = &dev->rx_info;
+	unsigned next_rx;
+	u32 cmdsts, *desc;
+	long flags;
+	int nr = 0;
+
+	dprintk("rx_irq(%p)\n", dev);
+	dprintk("rxdp: %08x, descs: %08lx next_rx[%d]: %p next_empty[%d]: %p\n",
+		readl(dev->base + RXDP),
+		(dev->rx_info.phy_descs),
+		dev->rx_info.next_rx,
+		(dev->rx_info.descs + (DESC_SIZE * dev->rx_info.next_rx)),
+		dev->rx_info.next_empty,
+		(dev->rx_info.descs + (DESC_SIZE * dev->rx_info.next_empty))
+		);
+
+	spin_lock_irqsave(&info->lock, flags);
+	if (!info->up)
+		goto out;
+
+	dprintk("walking descs\n");
+	next_rx = info->next_rx;
+	desc = info->descs + (DESC_SIZE * next_rx);
+	while ((CMDSTS_OWN & (cmdsts = desc[CMDSTS])) &&
+	       (cmdsts != CMDSTS_OWN)) {
+		struct sk_buff *skb;
+		u32 extsts = desc[EXTSTS];
+		dmaaddr_high_t bufptr = *(hw_addr_t *)(desc + BUFPTR);
+
+		dprintk("cmdsts: %08x\n", cmdsts);
+		dprintk("link: %08x\n", desc[LINK]);
+		dprintk("extsts: %08x\n", desc[EXTSTS]);
+
+		skb = info->skbs[next_rx];
+		info->skbs[next_rx] = NULL;
+		info->next_rx = (next_rx + 1) % NR_RX_DESC;
+
+		barrier();
+		clear_rx_desc(dev, next_rx);
+
+		pci_unmap_single(dev->pci_dev, bufptr,
+				 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
+		if (CMDSTS_OK & cmdsts) {
+#ifndef __i386__
+			struct sk_buff *tmp;
+#endif
+			int len = cmdsts & 0xffff;
+			if (!skb)
+				BUG();
+			skb_put(skb, len);
+#ifndef __i386__	/* I hate the network stack sometimes */
+			tmp = __dev_alloc_skb(RX_BUF_SIZE+16, GFP_ATOMIC);
+			if (!tmp)
+				goto done;
+			tmp->dev = &dev->net_dev;
+			skb_reserve(tmp, 2);
+			memcpy(skb_put(tmp, len), skb->data, len);
+			kfree_skb(skb);
+			skb = tmp;
+#endif
+			if ((extsts & 0x002a0000) && !(extsts & 0x00540000)) {
+				skb->ip_summed = CHECKSUM_UNNECESSARY;
+			} else {
+				skb->ip_summed = CHECKSUM_NONE;
+			}
+			skb->protocol = eth_type_trans(skb, &dev->net_dev);
+			switch (netif_rx(skb)) {
+			case NET_RX_SUCCESS:
+				dev->ihr = 3;
+				break;
+			case NET_RX_CN_LOW:
+				dev->ihr = 3;
+				break;
+			case NET_RX_CN_MOD:
+				dev->ihr = dev->ihr + 1;
+				break;
+			case NET_RX_CN_HIGH:
+				dev->ihr += dev->ihr/2 + 1;
+				break;
+			case NET_RX_DROP:
+				dev->ihr = 255;
+				break;
+			}
+			if (dev->ihr > 255)
+				dev->ihr = 255;
+#ifndef __i386__
+		done:;
+#endif
+		} else {
+			static int err;
+			if (err++ < 20) {
+				Dprintk("error packet: cmdsts: %08x extsts: %08x\n", cmdsts, extsts);
+			}
+			kfree_skb(skb);
+		}
+
+		nr++;
+		next_rx = info->next_rx;
+		desc = info->descs + (DESC_SIZE * next_rx);
+	}
+	info->next_rx = next_rx;
+
+out:
+	if (0 && !nr) {
+		Dprintk("dazed: cmdsts_f: %08x\n", cmdsts);
+	}
+
+	spin_unlock_irqrestore(&info->lock, flags);
+}
+
+
+/* Packet Transmit code
+ */
+static inline void kick_tx(struct ns83820 *dev)
+{
+	dprintk("kick_tx(%p): tx_idle=%ld, tx_idx=%d free_idx=%d\n",
+		dev, dev->tx_idle, dev->tx_idx, dev->tx_free_idx);
+	writel(CR_TXE, dev->base + CR);
+}
+
+/* no spinlock needed on the transmit irq path as the interrupt handler is serialized */
+static void do_tx_done(struct ns83820 *dev)
+{
+	u32 cmdsts, tx_done_idx, *desc;
+
+	dprintk("do_tx_done(%p)\n", dev);
+	tx_done_idx = dev->tx_done_idx;
+	desc = dev->tx_descs + (tx_done_idx * DESC_SIZE);
+
+	dprintk("tx_done_idx=%d free_idx=%d cmdsts=%08x\n",
+		tx_done_idx, dev->tx_free_idx, desc[CMDSTS]);
+	while ((tx_done_idx != dev->tx_free_idx) &&
+	       !(CMDSTS_OWN & (cmdsts = desc[CMDSTS])) ) {
+		struct sk_buff *skb;
+
+		dprintk("tx_done_idx=%d free_idx=%d cmdsts=%08x\n",
+			tx_done_idx, dev->tx_free_idx, desc[CMDSTS]);
+		skb = dev->tx_skbs[tx_done_idx];
+		dev->tx_skbs[tx_done_idx] = NULL;
+		dprintk("done(%p)\n", skb);
+		if (skb) {
+			pci_unmap_single(dev->pci_dev,
+					*(hw_addr_t *)(desc + BUFPTR),
+					skb->len,
+					PCI_DMA_TODEVICE);
+			dev_kfree_skb_irq(skb);
+		}
+
+		tx_done_idx = (tx_done_idx + 1) % NR_TX_DESC;
+		dev->tx_done_idx = tx_done_idx;
+		desc[CMDSTS] = 0;
+		barrier();
+		desc = dev->tx_descs + (tx_done_idx * DESC_SIZE);
+	}
+
+	/* Allow network stack to resume queueing packets after we've
+	 * finished transmitting at least 1/4 of the packets in the queue.
+	 */
+	if (netif_queue_stopped(&dev->net_dev) && start_tx_okay(dev)) {
+		dprintk("start_queue(%p)\n", dev);
+		netif_start_queue(&dev->net_dev);
+		netif_wake_queue(&dev->net_dev);
+	}
+}
+
+static void ns83820_cleanup_tx(struct ns83820 *dev)
+{
+	unsigned i;
+
+	for (i=0; i<NR_TX_DESC; i++) {
+		struct sk_buff *skb = dev->tx_skbs[i];
+		dev->tx_skbs[i] = NULL;
+		if (skb)
+			dev_kfree_skb(skb);
+	}
+
+	memset(dev->tx_descs, 0, NR_TX_DESC * DESC_SIZE * 4);
+	set_bit(0, &dev->tx_idle);
+}
+
+/* transmit routine.  This code relies on the network layer serializing
+ * its calls in, but will run happily in parallel with the interrupt
+ * handler.  This code currently has provisions for fragmenting tx buffers
+ * while trying to track down a bug in either the zero copy code or
+ * the tx fifo (hence the MAX_FRAG_LEN).
+ */
+#define MAX_FRAG_LEN	8192	/* disabled for now */
+static int ns83820_hard_start_xmit(struct sk_buff *skb, struct net_device *_dev)
+{
+	struct ns83820 *dev = (struct ns83820 *)_dev;
+	u32 free_idx, cmdsts, extsts;
+	int nr_free, nr_frags;
+	unsigned tx_done_idx;
+	dmaaddr_high_t buf;
+	unsigned len;
+	skb_frag_t *frag;
+	int stopped = 0;
+	int do_intr = 0;
+	volatile u32 *first_desc;
+
+	dprintk("ns83820_hard_start_xmit\n");
+
+	nr_frags =  skb_shinfo(skb)->nr_frags;
+again:
+	if (__builtin_expect(dev->CFG_cache & CFG_LNKSTS, 0)) {
+		netif_stop_queue(&dev->net_dev);
+		if (__builtin_expect(dev->CFG_cache & CFG_LNKSTS, 0))
+			return 1;
+		netif_start_queue(&dev->net_dev);
+	}
+
+	free_idx = dev->tx_free_idx;
+	tx_done_idx = dev->tx_done_idx;
+	nr_free = (tx_done_idx + NR_TX_DESC-2 - free_idx) % NR_TX_DESC;
+	nr_free -= 1;
+	if ((nr_free <= nr_frags) || (nr_free <= 8192 / MAX_FRAG_LEN)) {
+		dprintk("stop_queue - not enough(%p)\n", dev);
+		netif_stop_queue(&dev->net_dev);
+
+		/* Check again: we may have raced with a tx done irq */
+		if (dev->tx_done_idx != tx_done_idx) {
+			dprintk("restart queue(%p)\n", dev);
+			netif_start_queue(&dev->net_dev);
+			goto again;
+		}
+		return 1;
+	}
+
+	if (free_idx == dev->tx_intr_idx) {
+		do_intr = 1;
+		dev->tx_intr_idx = (dev->tx_intr_idx + NR_TX_DESC/2) % NR_TX_DESC;
+	}
+
+	nr_free -= nr_frags;
+	if (nr_free < 1) {
+		dprintk("stop_queue - last entry(%p)\n", dev);
+		netif_stop_queue(&dev->net_dev);
+		stopped = 1;
+	}
+
+	frag = skb_shinfo(skb)->frags;
+	if (!nr_frags)
+		frag = 0;
+	extsts = 0;
+	if (skb->ip_summed == CHECKSUM_HW) {
+		extsts |= EXTSTS_IPPKT;
+		if (IPPROTO_TCP == skb->nh.iph->protocol)
+			extsts |= EXTSTS_TCPPKT;
+		else if (IPPROTO_UDP == skb->nh.iph->protocol)
+			extsts |= EXTSTS_UDPPKT;
+	}
+
+	len = skb->len;
+	if (nr_frags)
+		len -= skb->data_len;
+	buf = pci_map_single(dev->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
+
+	first_desc = dev->tx_descs + (free_idx * DESC_SIZE);
+
+	for (;;) {
+		volatile u32 *desc = dev->tx_descs + (free_idx * DESC_SIZE);
+		u32 residue = 0;
+#if 0
+		if (len > MAX_FRAG_LEN) {
+			residue = len;
+			/* align the start address of the next fragment */
+			len = MAX_FRAG_LEN;
+			residue -= len;
+		}
+#endif
+
+		dprintk("frag[%3u]: %4u @ 0x%x%08Lx\n", free_idx, len,
+			(unsigned long long)buf);
+		free_idx = (free_idx + 1) % NR_TX_DESC;
+		desc[LINK] = dev->tx_phy_descs + (free_idx * DESC_SIZE * 4);
+		*(hw_addr_t *)(desc + BUFPTR) = buf;
+		desc[EXTSTS] = extsts;
+
+		cmdsts = ((nr_frags|residue) ? CMDSTS_MORE : do_intr ? CMDSTS_INTR : 0);
+		cmdsts |= (desc == first_desc) ? 0 : CMDSTS_OWN;
+		cmdsts |= len;
+		desc[CMDSTS] = cmdsts;
+
+		if (residue) {
+			buf += len;
+			len = residue;
+			continue;
+		}
+
+		if (!nr_frags)
+			break;
+
+		buf = pci_map_single_high(dev->pci_dev, frag->page, 0,
+					  frag->size, PCI_DMA_TODEVICE);
+		dprintk("frag: buf=%08Lx  page=%08lx\n",
+			(long long)buf, (long)(frag->page - mem_map));
+		len = frag->size;
+		frag++;
+		nr_frags--;
+	}
+	dprintk("done pkt\n");
+	dev->tx_skbs[free_idx] = skb;
+	first_desc[CMDSTS] |= CMDSTS_OWN;
+	dev->tx_free_idx = free_idx;
+	kick_tx(dev);
+
+	/* Check again: we may have raced with a tx done irq */
+	if (stopped && (dev->tx_done_idx != tx_done_idx) && start_tx_okay(dev))
+		netif_start_queue(&dev->net_dev);
+
+	return 0;
+}
+
+static void ns83820_irq(int foo, void *data, struct pt_regs *regs)
+{
+	struct ns83820 *dev = data;
+	int count = 0;
+	u32 isr;
+	dprintk("ns83820_irq(%p)\n", dev);
+
+	dev->ihr = 0;
+
+	while (count++ < 32 && (isr = readl(dev->base + ISR))) {
+		dprintk("irq: %08x\n", isr);
+
+		if (isr & ~(ISR_PHY | ISR_RXDESC | ISR_RXEARLY | ISR_RXOK | ISR_RXERR | ISR_TXIDLE | ISR_TXOK | ISR_TXDESC))
+			Dprintk("odd isr? 0x%08x\n", isr);
+
+	if ((ISR_RXEARLY | ISR_RXIDLE | ISR_RXORN | ISR_RXDESC | ISR_RXOK | ISR_RXERR) & isr) {
+ 		if (ISR_RXIDLE & isr) {
+			dev->rx_info.idle = 1;
+			Dprintk("oh dear, we are idle\n");
+		}
+
+		if ((ISR_RXDESC) & isr) {
+			rx_irq(dev);
+			writel(4, dev->base + IHR);
+		}
+
+		if (nr_rx_empty(dev) >= NR_RX_DESC/4) {
+			if (dev->rx_info.up) {
+				rx_refill(dev, GFP_ATOMIC);
+				kick_rx(dev);
+			}
+		}
+
+		if (dev->rx_info.up && nr_rx_empty(dev) > NR_RX_DESC*3/4)
+			schedule_task(&dev->tq_refill);
+		else
+			kick_rx(dev);
+		if (dev->rx_info.idle)
+			Dprintk("BAD\n");
+	}
+
+	if (ISR_RXSOVR & isr)
+		Dprintk("overrun\n");
+	if (ISR_RXORN & isr)
+		Dprintk("overrun\n");
+
+	if ((ISR_RXRCMP & isr) && dev->rx_info.up)
+		writel(CR_RXE, dev->base + CR);
+
+	if (ISR_TXIDLE & isr) {
+		u32 txdp;
+		txdp = readl(dev->base + TXDP);
+		dprintk("txdp: %08x\n", txdp);
+		txdp -= dev->tx_phy_descs;
+		dev->tx_idx = txdp / (DESC_SIZE * 4);
+		if (dev->tx_idx >= NR_TX_DESC) {
+			printk(KERN_ALERT "%s: BUG -- txdp out of range\n", dev->net_dev.name);
+			dev->tx_idx = 0;
+		}
+		if (dev->tx_idx != dev->tx_free_idx)
+			writel(CR_TXE, dev->base + CR);
+			//kick_tx(dev);
+		else
+			dev->tx_idle = 1;
+		mb();
+		if (dev->tx_idx != dev->tx_free_idx)
+			kick_tx(dev);
+	}
+
+	/* Defer tx ring processing until more than a minimum amount of
+	 * work has accumulated
+	 */
+	if ((ISR_TXDESC | ISR_TXIDLE) & isr)
+		do_tx_done(dev);
+
+	if (ISR_PHY & isr)
+		phy_intr(dev);
+	}
+
+#if 0	/* Still working on the interrupt mitigation strategy */
+	if (dev->ihr)
+		writel(dev->ihr, dev->base + IHR);
+#endif
+}
+
+static void ns83820_do_reset(struct ns83820 *dev, u32 which)
+{
+	Dprintk("resetting chip...\n");
+	writel(which, dev->base + CR);
+	do {
+		schedule();
+	} while (readl(dev->base + CR) & which);
+	Dprintk("okay!\n");
+}
+
+static int ns83820_stop(struct net_device *_dev)
+{
+	struct ns83820 *dev = (struct ns83820 *)_dev;
+
+	/* FIXME: protect against interrupt handler? */
+
+	/* disable interrupts */
+	writel(0, dev->base + IMR);
+	writel(0, dev->base + IER);
+	readl(dev->base + IER);
+
+	dev->rx_info.up = 0;
+	synchronize_irq();
+
+	ns83820_do_reset(dev, CR_RST);
+
+	synchronize_irq();
+
+	dev->IMR_cache &= ~(ISR_TXURN | ISR_TXIDLE | ISR_TXERR | ISR_TXDESC | ISR_TXOK);
+	ns83820_cleanup_rx(dev);
+	ns83820_cleanup_tx(dev);
+
+	return 0;
+}
+
+static int ns83820_open(struct net_device *_dev)
+{
+	struct ns83820 *dev = (struct ns83820 *)_dev;
+	unsigned i;
+	u32 desc;
+	int ret;
+
+	dprintk("ns83820_open\n");
+
+	writel(0, dev->base + PQCR);
+
+	ret = ns83820_setup_rx(dev);
+	if (ret)
+		goto failed;
+
+	memset(dev->tx_descs, 0, 4 * NR_TX_DESC * DESC_SIZE);
+	for (i=0; i<NR_TX_DESC; i++) {
+		*(hw_addr_t *)(dev->tx_descs + (i * DESC_SIZE) + LINK)
+				= dev->tx_phy_descs
+				  + ((i+1) % NR_TX_DESC) * DESC_SIZE * 4;
+	}
+
+	dev->tx_idx = 0;
+	dev->tx_done_idx = 0;
+	desc = dev->tx_phy_descs;
+	writel(0, dev->base + TXDP_HI);
+	writel(desc, dev->base + TXDP);
+
+//printk("IMR: %08x / %08x\n", readl(dev->base + IMR), dev->IMR_cache);
+
+	set_bit(0, &dev->tx_idle);
+	netif_start_queue(&dev->net_dev);	/* FIXME: wait for phy to come up */
+
+	return 0;
+
+failed:
+	ns83820_stop(_dev);
+	return ret;
+}
+
+#if 0	/* FIXME: implement this! */
+static void ns83820_tx_timeout(struct net_device *_dev)
+{
+	struct ns83820 *dev = (struct ns83820 *)_dev;
+
+	printk("ns83820_tx_timeout\n");
+}
+#endif
+
+static void ns83820_getmac(struct ns83820 *dev, u8 *mac)
+{
+	unsigned i;
+	for (i=0; i<3; i++) {
+		u32 data;
+#if 0	/* I've left this in as an example of how to use eeprom.h */
+		data = eeprom_readw(&dev->ee, 0xa + 2 - i);
+#else
+		writel(i*2, dev->base + RFCR);
+		data = readl(dev->base + RFDR);
+#endif
+		*mac++ = data;
+		*mac++ = data >> 8;
+	}
+}
+
+static int ns83820_change_mtu(struct net_device *_dev, int new_mtu)
+{
+	if (new_mtu > RX_BUF_SIZE)
+		return -EINVAL;
+	_dev->mtu = new_mtu;
+	return 0;
+}
+
+static int ns83820_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
+{
+	struct ns83820 *dev;
+	long addr;
+	int err;
+
+	dev = (struct ns83820 *)alloc_etherdev((sizeof *dev) - (sizeof dev->net_dev));
+	err = -ENOMEM;
+	if (!dev)
+		goto out;
+
+	spin_lock_init(&dev->rx_info.lock);
+	spin_lock_init(&dev->tx_lock);
+	spin_lock_init(&dev->misc_lock);
+	dev->pci_dev = pci_dev;
+
+	dev->ee.cache = &dev->MEAR_cache;
+	dev->ee.lock = &dev->misc_lock;
+	dev->net_dev.owner = THIS_MODULE;
+
+	PREPARE_TQUEUE(&dev->tq_refill, queue_refill, dev);
+
+	err = pci_enable_device(pci_dev);
+	if (err) {
+		printk(KERN_INFO "ns83820: pci_enable_dev: %d\n", err);
+		goto out_free;
+	}
+
+	pci_set_master(pci_dev);
+	addr = pci_resource_start(pci_dev, 1);
+	dev->base = ioremap_nocache(addr, PAGE_SIZE);
+	dev->tx_descs = pci_alloc_consistent(pci_dev,
+			4 * DESC_SIZE * NR_TX_DESC, &dev->tx_phy_descs);
+	dev->rx_info.descs = pci_alloc_consistent(pci_dev,
+			4 * DESC_SIZE * NR_RX_DESC, &dev->rx_info.phy_descs);
+	err = -ENOMEM;
+	if (!dev->base || !dev->tx_descs || !dev->rx_info.descs)
+		goto out_disable;
+
+	dprintk("%p: %08lx  %p: %08lx\n", dev->tx_descs, dev->tx_phy_descs,
+		dev->rx_info.descs, dev->rx_info.phy_descs);
+	/* disable interrupts */
+	writel(0, dev->base + IMR);
+	writel(0, dev->base + IER);
+	readl(dev->base + IER);
+
+	dev->IMR_cache = 0;
+
+	setup_ee_mem_bitbanger(&dev->ee, (long)dev->base + MEAR, 3, 2, 1, 0,
+		0);
+
+	err = request_irq(pci_dev->irq, ns83820_irq, SA_SHIRQ,
+			  dev->net_dev.name, dev);
+	if (err) {
+		printk(KERN_INFO "ns83820: unable to register irq %d\n",
+			pci_dev->irq);
+		goto out_unmap;
+	}
+
+	dev->net_dev.open = ns83820_open;
+	dev->net_dev.stop = ns83820_stop;
+	dev->net_dev.hard_start_xmit = ns83820_hard_start_xmit;
+	dev->net_dev.change_mtu = ns83820_change_mtu;
+	//FIXME: dev->net_dev.tx_timeout = ns83820_tx_timeout;
+
+	lock_kernel();
+	dev->next_dev = ns83820_chain;
+	ns83820_chain = dev;
+	unlock_kernel();
+
+	ns83820_do_reset(dev, CR_RST);
+
+	dprintk("start bist\n");
+	writel(PTSCR_EEBIST_EN, dev->base + PTSCR);
+	do {
+		schedule();
+	} while (readl(dev->base + PTSCR) & PTSCR_EEBIST_EN);
+	dprintk("done bist\n");
+
+	dprintk("start eeload\n");
+	writel(PTSCR_EELOAD_EN, dev->base + PTSCR);
+	do {
+		schedule();
+	} while (readl(dev->base + PTSCR) & PTSCR_EELOAD_EN);
+	dprintk("done eeload\n");
+
+	/* I love config registers */
+	dev->CFG_cache = readl(dev->base + CFG);
+
+	if ((dev->CFG_cache & CFG_PCI64_DET)) {
+		printk("%s: enabling 64 bit PCI.\n", dev->net_dev.name);
+		dev->CFG_cache |= CFG_T64ADDR | CFG_DATA64_EN;
+	} else {
+		printk("%s: disabling 64 bit PCI.\n", dev->net_dev.name);
+		dev->CFG_cache &= ~(CFG_T64ADDR | CFG_DATA64_EN);
+	}
+	dev->CFG_cache &= (CFG_TBI_EN  | CFG_MRM_DIS   | CFG_MWI_DIS |
+			   CFG_T64ADDR | CFG_DATA64_EN | CFG_EXT_125 |
+			   CFG_M64ADDR);
+	dev->CFG_cache |= CFG_PINT_DUPSTS | CFG_PINT_LNKSTS | CFG_PINT_SPDSTS |
+			  CFG_EXTSTS_EN   | CFG_EXD         | CFG_PESEL;
+	dev->CFG_cache |= CFG_REQALG;
+	dev->CFG_cache |= CFG_POW;
+#ifdef USE_64BIT_ADDR
+	dev->CFG_cache |= CFG_M64ADDR;
+	printk("using 64 bit addressing\n");
+#endif
+#ifdef __LITTLE_ENDIAN
+	dev->CFG_cache &= ~CFG_BEM;
+#elif defined(__BIG_ENDIAN)
+	dev->CFG_cache |= CFG_BEM;
+#else
+#error This driver only works for big or little endian!!!
+#endif
+
+	writel(dev->CFG_cache, dev->base + CFG);
+	dprintk("CFG: %08x\n", dev->CFG_cache);
+
+	if (readl(dev->base + SRR))
+		writel(readl(dev->base+0x20c) | 0xfe00, dev->base + 0x20c);
+
+	/* Note!  The DMA burst size interacts with packet
+	 * transmission, such that the largest packet that
+	 * can be transmitted is 8192 - FLTH - burst size.
+	 * If only the transmit fifo was larger...
+	 */
+	writel(TXCFG_CSI | TXCFG_HBI | TXCFG_ATP | TXCFG_MXDMA1024
+		| ((1600 / 32) * 0x100),
+		dev->base + TXCFG);
+
+	/* Flush the interrupt holdoff timer */
+	writel(0x000, dev->base + IHR);
+	writel(0x100, dev->base + IHR);
+
+	/* Set Rx to full duplex, don't accept runt, errored, long or length
+	 * range errored packets.  Set MXDMA to 7 => 512 word burst
+	 */
+	writel(RXCFG_AEP | RXCFG_ARP | RXCFG_AIRL | RXCFG_RX_FD
+		| RXCFG_ALP
+		| RXCFG_MXDMA | 0, dev->base + RXCFG);
+
+	/* Disable priority queueing */
+	writel(0, dev->base + PQCR);
+
+	/* Enable IP checksum validation and detetion of VLAN headers.
+	 * Note: do not set the reject options as at least the 0x102
+	 * revision of the chip does not properly accept IP fragments
+	 * at least for UDP.
+	 */
+	writel(VRCR_IPEN | VRCR_VTDEN, dev->base + VRCR);
+
+	/* Enable per-packet TCP/UDP/IP checksumming */
+	writel(VTCR_PPCHK, dev->base + VTCR);
+
+	/* Disable Pause frames */
+	writel(0, dev->base + PCR);
+
+	/* Disable Wake On Lan */
+	writel(0, dev->base + WCSR);
+
+	ns83820_getmac(dev, dev->net_dev.dev_addr);
+
+	/* Yes, we support dumb IP checksum on transmit */
+	dev->net_dev.features |= NETIF_F_SG;
+	dev->net_dev.features |= NETIF_F_IP_CSUM;
+#if defined(USE_64BIT_ADDR) || defined(CONFIG_HIGHMEM4G)
+	dev->net_dev.features |= NETIF_F_HIGHDMA;
+#endif
+
+	register_netdev(&dev->net_dev);
+
+	printk(KERN_INFO "%s: ns83820.c v" VERSION ": DP83820 %02x:%02x:%02x:%02x:%02x:%02x pciaddr=0x%08lx irq=%d rev 0x%x\n",
+		dev->net_dev.name,
+		dev->net_dev.dev_addr[0], dev->net_dev.dev_addr[1],
+		dev->net_dev.dev_addr[2], dev->net_dev.dev_addr[3],
+		dev->net_dev.dev_addr[4], dev->net_dev.dev_addr[5],
+		addr, pci_dev->irq,
+		(unsigned)readl(dev->base + SRR)
+		);
+
+	return 0;
+
+out_unmap:
+	iounmap(dev->base);
+out_disable:
+	pci_free_consistent(pci_dev, 4 * DESC_SIZE * NR_TX_DESC, dev->tx_descs, dev->tx_phy_descs);
+	pci_free_consistent(pci_dev, 4 * DESC_SIZE * NR_RX_DESC, dev->rx_info.descs, dev->rx_info.phy_descs);
+	pci_disable_device(pci_dev);
+out_free:
+	kfree(dev);
+out:
+	return err;
+}
+
+static struct pci_device_id pci_device_id[] __devinitdata = {
+	{ 0x100b, 0x0022, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ 0, },
+};
+
+static struct pci_driver driver = {
+	name:		"ns83820",
+	id_table:	pci_device_id,
+	probe:		ns83820_probe,
+#if 0	/* FIXME: implement */
+	remove:		,
+	suspend:	,
+	resume:		,
+#endif
+};
+
+
+static int __init ns83820_init(void)
+{
+	printk(KERN_INFO "ns83820.c: National Semiconductor DP83820 10/100/100 driver.\n");
+	return pci_module_init(&driver);
+}
+
+static void ns83820_exit(void)
+{
+	struct ns83820	*dev;
+
+	for (dev = ns83820_chain; dev; ) {
+		struct ns83820 *next = dev->next_dev;
+
+		writel(0, dev->base + IMR);	/* paranoia */
+		writel(0, dev->base + IER);
+		readl(dev->base + IER);
+
+		unregister_netdev(&dev->net_dev);
+		free_irq(dev->pci_dev->irq, dev);
+		iounmap(dev->base);
+		pci_free_consistent(dev->pci_dev, 4 * DESC_SIZE * NR_TX_DESC,
+				dev->tx_descs, dev->tx_phy_descs);
+		pci_free_consistent(dev->pci_dev, 4 * DESC_SIZE * NR_RX_DESC,
+				dev->rx_info.descs, dev->rx_info.phy_descs);
+		pci_disable_device(dev->pci_dev);
+		kfree(dev);
+		dev = next;
+	}
+	pci_unregister_driver(&driver);
+	ns83820_chain = NULL;
+}
+
+MODULE_AUTHOR("Benjamin LaHaise <bcrl@redhat.com>");
+MODULE_DESCRIPTION("National Semiconductor DP83820 10/100/1000 driver");
+MODULE_DEVICE_TABLE(pci, pci_device_id);
+module_init(ns83820_init);
+module_exit(ns83820_exit);
diff -urN linux-2.4.10-pre6/drivers/net/pcnet32.c linux/drivers/net/pcnet32.c
--- linux-2.4.10-pre6/drivers/net/pcnet32.c	Mon Jul  2 14:03:04 2001
+++ linux/drivers/net/pcnet32.c	Mon Dec  3 23:08:46 2001
@@ -179,6 +179,7 @@
  * v1.25kf Added No Interrupt on successful Tx for some Tx's <kaf@fc.hp.com>
  * v1.26   Converted to pci_alloc_consistent, Jamey Hicks / George France
  *                                           <jamey@crl.dec.com>
+ * v1.26p Fix oops on rmmod+insmod; plug i/o resource leak - Paul Gortmaker
  */
 
 
@@ -471,7 +472,7 @@
 
 
 
-static int __init
+static int __devinit
 pcnet32_probe_pci(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
     static int card_idx;
@@ -506,10 +507,11 @@
  *  Called from both pcnet32_probe_vlbus and pcnet_probe_pci.  
  *  pdev will be NULL when called from pcnet32_probe_vlbus.
  */
-static int __init
+static int __devinit
 pcnet32_probe1(unsigned long ioaddr, unsigned char irq_line, int shared, int card_idx, struct pci_dev *pdev)
 {
     struct pcnet32_private *lp;
+    struct resource *res;
     dma_addr_t lp_dma_addr;
     int i,media,fdx = 0, mii = 0, fset = 0;
 #ifdef DO_DXSUFLO
@@ -643,7 +645,7 @@
 	}
 	if( memcmp( promaddr, dev->dev_addr, 6) )
 	{
-	    printk(" warning PROM address does not match CSR address");
+	    printk(" warning PROM address does not match CSR address\n");
 #if defined(__i386__)
 	    printk(KERN_WARNING "%s: Probably a Compaq, using the PROM address of", dev->name);
 	    memcpy(dev->dev_addr, promaddr, 6);
@@ -682,11 +684,15 @@
     }
 
     dev->base_addr = ioaddr;
-    request_region(ioaddr, PCNET32_TOTAL_SIZE, chipname);
+    res = request_region(ioaddr, PCNET32_TOTAL_SIZE, chipname);
+    if (res == NULL)
+	return -EBUSY;
     
     /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
-    if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL)
+    if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {
+	release_resource(res);
 	return -ENOMEM;
+    }
 
     memset(lp, 0, sizeof(*lp));
     lp->dma_addr = lp_dma_addr;
@@ -715,6 +721,7 @@
     if (a == NULL) {
       printk(KERN_ERR "pcnet32: No access methods\n");
       pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
+      release_resource(res);
       return -ENODEV;
     }
     lp->a = *a;
@@ -762,6 +769,7 @@
 	else {
 	    printk(", failed to detect IRQ line.\n");
 	    pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
+	    release_resource(res);
 	    return -ENODEV;
 	}
     }
@@ -1579,6 +1587,8 @@
 	next_dev = lp->next;
 	unregister_netdev(pcnet32_dev);
 	release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE);
+	if (lp->pci_dev != NULL)
+	    pci_unregister_driver(&pcnet32_driver);
         pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
 	kfree(pcnet32_dev);
 	pcnet32_dev = next_dev;
diff -urN linux-2.4.10-pre6/drivers/net/ppp_generic.c linux/drivers/net/ppp_generic.c
--- linux-2.4.10-pre6/drivers/net/ppp_generic.c	Wed Jul  4 11:50:39 2001
+++ linux/drivers/net/ppp_generic.c	Mon Dec  3 23:08:46 2001
@@ -636,7 +636,7 @@
 
 		if (copy_from_user(&uprog, (void *) arg, sizeof(uprog)))
 			break;
-		if (uprog.len > 0) {
+		if (uprog.len > 0 && uprog.len < 65536) {
 			err = -ENOMEM;
 			len = uprog.len * sizeof(struct sock_filter);
 			code = kmalloc(len, GFP_KERNEL);
diff -urN linux-2.4.10-pre6/drivers/net/sis900.c linux/drivers/net/sis900.c
--- linux-2.4.10-pre6/drivers/net/sis900.c	Tue Jul 17 18:53:55 2001
+++ linux/drivers/net/sis900.c	Mon Dec  3 23:08:46 2001
@@ -600,7 +600,7 @@
 /**
  * 	sis900_set_capability: - set the media capability of network adapter.
  *	@net_dev : the net device to probe for
- *	@mii_phy : default PHY
+ *	@phy : default PHY
  *
  *	Set the media capability of network adapter according to
  *	mii status register. It's necessary before auto-negotiate.
@@ -1190,6 +1190,7 @@
 
 /**
  *	sis900_set_mode: - Set the media mode of mac register.
+ *	@ioaddr: the address of the device
  *	@speed : the transmit speed to be determined
  *	@duplex: the duplex mode to be determined
  *
diff -urN linux-2.4.10-pre6/drivers/net/sk98lin/h/skdrv1st.h linux/drivers/net/sk98lin/h/skdrv1st.h
--- linux-2.4.10-pre6/drivers/net/sk98lin/h/skdrv1st.h	Wed Jul  4 11:50:39 2001
+++ linux/drivers/net/sk98lin/h/skdrv1st.h	Mon Dec  3 23:08:46 2001
@@ -113,7 +113,7 @@
 #include <linux/string.h>
 #include <linux/errno.h>
 #include <linux/ioport.h>
-#include <linux/malloc.h>
+#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/pci.h>
 #include <asm/byteorder.h>
diff -urN linux-2.4.10-pre6/drivers/net/tulip/tulip_core.c linux/drivers/net/tulip/tulip_core.c
--- linux-2.4.10-pre6/drivers/net/tulip/tulip_core.c	Tue Aug  7 08:30:50 2001
+++ linux/drivers/net/tulip/tulip_core.c	Mon Dec  3 23:08:46 2001
@@ -1503,6 +1503,10 @@
 #ifdef CONFIG_TULIP_MWI
 	if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
 		tulip_mwi_config (pdev, dev);
+#else
+	/* MWI is broken for DC21143 rev 65... */
+	if (chip_idx == DC21143 && chip_rev == 65)
+		tp->csr0 &= ~MWI;
 #endif
 
 	/* Stop the chip's Tx and Rx processes. */
diff -urN linux-2.4.10-pre6/drivers/net/wan/farsync.c linux/drivers/net/wan/farsync.c
--- linux-2.4.10-pre6/drivers/net/wan/farsync.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/net/wan/farsync.c	Mon Dec  3 23:08:46 2001
@@ -1830,3 +1830,4 @@
 module_init ( fst_init );
 module_exit ( fst_cleanup_module );
 
+MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/net/wan/hostess_sv11.c linux/drivers/net/wan/hostess_sv11.c
--- linux-2.4.10-pre6/drivers/net/wan/hostess_sv11.c	Wed Apr 18 14:40:07 2001
+++ linux/drivers/net/wan/hostess_sv11.c	Mon Dec  3 23:08:46 2001
@@ -400,7 +400,6 @@
 static int io=0x200;
 static int irq=9;
 
-#ifdef LINUX_21
 MODULE_PARM(io,"i");
 MODULE_PARM_DESC(io, "The I/O base of the Comtrol Hostess SV11 card");
 MODULE_PARM(dma,"i");
@@ -408,9 +407,9 @@
 MODULE_PARM(irq,"i");
 MODULE_PARM_DESC(irq, "The interrupt line setting for the Comtrol Hostess SV11 card");
 
-MODULE_AUTHOR("Bulding Number Three Ltd");
+MODULE_AUTHOR("Alan Cox");
+MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Modular driver for the Comtrol Hostess SV11");
-#endif
 
 static struct sv11_device *sv11_unit;
 
diff -urN linux-2.4.10-pre6/drivers/net/wan/sbni.c linux/drivers/net/wan/sbni.c
--- linux-2.4.10-pre6/drivers/net/wan/sbni.c	Wed Aug 15 01:22:15 2001
+++ linux/drivers/net/wan/sbni.c	Mon Dec  3 23:08:46 2001
@@ -11,7 +11,7 @@
  *	at http://www.granch.com (English) or http://www.granch.ru (Russian)
  *
  *	This software may be used and distributed according to the terms
- *	of the GNU Public License.
+ *	of the GNU General Public License.
  *
  *
  *  5.0.1	Jun 22 2001
@@ -1473,6 +1473,8 @@
 MODULE_PARM(	mac,	"1-" __MODULE_STRING( SBNI_MAX_NUM_CARDS ) "i" );
 
 MODULE_PARM(	skip_pci_probe,	"i" );
+
+MODULE_LICENSE("GPL");
 
 
 int
diff -urN linux-2.4.10-pre6/drivers/net/wan/sealevel.c linux/drivers/net/wan/sealevel.c
--- linux-2.4.10-pre6/drivers/net/wan/sealevel.c	Wed Apr 18 14:40:07 2001
+++ linux/drivers/net/wan/sealevel.c	Mon Dec  3 23:08:46 2001
@@ -9,6 +9,7 @@
  *	2 of the License, or (at your option) any later version.
  *
  *	(c) Copyright 1999 Building Number Three Ltd
+ *	(c) Copyright 2001 Alan Cox.
  *
  */
 
@@ -455,7 +456,8 @@
 MODULE_PARM(slow,"i");
 MODULE_PARM_DESC(slow, "Set this for an older Sealevel card such as the 4012");
 
-MODULE_AUTHOR("Bulding Number Three Ltd");
+MODULE_AUTHOR("Alan Cox");
+MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Modular driver for the SeaLevel 4021");
 #endif
 
diff -urN linux-2.4.10-pre6/drivers/net/wan/z85230.c linux/drivers/net/wan/z85230.c
--- linux-2.4.10-pre6/drivers/net/wan/z85230.c	Tue Mar  6 19:44:37 2001
+++ linux/drivers/net/wan/z85230.c	Mon Dec  3 23:08:46 2001
@@ -1739,7 +1739,7 @@
 /*
  *	Module support
  */
-static const char banner[] __initdata = KERN_INFO "Generic Z85C30/Z85230 interface driver v0.02\n";
+static char banner[] __initdata = KERN_INFO "Generic Z85C30/Z85230 interface driver v0.02\n";
 
 static int __init z85230_init_driver(void)
 {
@@ -1752,3 +1752,7 @@
 {
 }
 module_exit(z85230_cleanup_driver);
+
+MODULE_AUTHOR("Red Hat Inc.");
+MODULE_DESCRIPTION("Z85x30 synchronous driver core");
+MODULE_LICENSE("GPL");
diff -urN linux-2.4.10-pre6/drivers/pci/Makefile linux/drivers/pci/Makefile
--- linux-2.4.10-pre6/drivers/pci/Makefile	Tue Jun 12 11:08:46 2001
+++ linux/drivers/pci/Makefile	Mon Dec  3 23:08:46 2001
@@ -25,8 +25,11 @@
 #
 obj-$(CONFIG_ALPHA) += setup-bus.o setup-irq.o
 obj-$(CONFIG_ARM) += setup-bus.o setup-irq.o
+obj-$(CONFIG_PARISC) += setup-bus.o
 obj-$(CONFIG_SUPERH) += setup-bus.o setup-irq.o
 obj-$(CONFIG_ALL_PPC) += setup-bus.o
+obj-$(CONFIG_DDB5476) += setup-bus.o
+obj-$(CONFIG_SGI_IP27) += setup-irq.o
 
 ifndef CONFIG_X86
 obj-y += syscall.o
diff -urN linux-2.4.10-pre6/drivers/scsi/53c700-mem.c linux/drivers/scsi/53c700-mem.c
--- linux-2.4.10-pre6/drivers/scsi/53c700-mem.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/53c700-mem.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,1842 @@
+/* WARNING: GENERATED FILE (from 53c700.c), DO NOT MODIFY */
+#define MEM_MAPPED
+/* -*- mode: c; c-basic-offset: 8 -*- */
+
+/* NCR (or Symbios) 53c700 and 53c700-66 Driver
+ *
+ * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
+**-----------------------------------------------------------------------------
+**  
+**  This program is free software; you can redistribute it and/or modify
+**  it under the terms of the GNU General Public License as published by
+**  the Free Software Foundation; either version 2 of the License, or
+**  (at your option) any later version.
+**
+**  This program is distributed in the hope that it will be useful,
+**  but WITHOUT ANY WARRANTY; without even the implied warranty of
+**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+**  GNU General Public License for more details.
+**
+**  You should have received a copy of the GNU General Public License
+**  along with this program; if not, write to the Free Software
+**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+**
+**-----------------------------------------------------------------------------
+ */
+
+/* Notes:
+ *
+ * This driver is designed exclusively for these chips (virtually the
+ * earliest of the scripts engine chips).  They need their own drivers
+ * because they are missing so many of the scripts and snazzy register
+ * features of their elder brothers (the 710, 720 and 770).
+ *
+ * The 700 is the lowliest of the line, it can only do async SCSI.
+ * The 700-66 can at least do synchronous SCSI up to 10MHz.
+ * 
+ * The 700 chip has no host bus interface logic of its own.  However,
+ * it is usually mapped to a location with well defined register
+ * offsets.  Therefore, if you can determine the base address and the
+ * irq your board incorporating this chip uses, you can probably use
+ * this driver to run it (although you'll probably have to write a
+ * minimal wrapper for the purpose---see the NCR_D700 driver for
+ * details about how to do this).
+ *
+ *
+ * TODO List:
+ *
+ * 1. Better statistics in the proc fs
+ *
+ * 2. Implement message queue (queues SCSI messages like commands) and make
+ *    the abort and device reset functions use them.
+ * */
+
+/* CHANGELOG
+ *
+ * Version 2.3
+ *
+ * More endianness/cache coherency changes.
+ *
+ * Better bad device handling (handles devices lying about tag
+ * queueing support and devices which fail to provide sense data on
+ * contingent allegiance conditions)
+ *
+ * Many thanks to Richard Hirst <rhirst@linuxcare.com> for patiently
+ * debugging this driver on the parisc architecture and suggesting
+ * many improvements and bug fixes.
+ *
+ * Thanks also go to Linuxcare Inc. for providing several PARISC
+ * machines for me to debug the driver on.
+ *
+ * Version 2.2
+ *
+ * Made the driver mem or io mapped; added endian invariance; added
+ * dma cache flushing operations for architectures which need it;
+ * added support for more varied clocking speeds.
+ *
+ * Version 2.1
+ *
+ * Initial modularisation from the D700.  See NCR_D700.c for the rest of
+ * the changelog.
+ * */
+#define NCR_700_VERSION "2.3"
+
+#include <linux/config.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/sched.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/mca.h>
+#include <asm/dma.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/byteorder.h>
+#include <linux/blk.h>
+#include <linux/module.h>
+
+#include "scsi.h"
+#include "hosts.h"
+#include "constants.h"
+
+#include "53c700.h"
+
+#ifdef NCR_700_DEBUG
+#define STATIC
+#else
+#define STATIC static
+#endif
+
+MODULE_AUTHOR("James Bottomley");
+MODULE_DESCRIPTION("53c700 and 53c700-66 Driver");
+MODULE_LICENSE("GPL");
+
+/* This is the script */
+#include "53c700_d.h"
+
+
+STATIC int NCR_700_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
+STATIC int NCR_700_abort(Scsi_Cmnd * SCpnt);
+STATIC int NCR_700_bus_reset(Scsi_Cmnd * SCpnt);
+STATIC int NCR_700_dev_reset(Scsi_Cmnd * SCpnt);
+STATIC int NCR_700_host_reset(Scsi_Cmnd * SCpnt);
+STATIC int NCR_700_proc_directory_info(char *, char **, off_t, int, int, int);
+STATIC void NCR_700_chip_setup(struct Scsi_Host *host);
+STATIC void NCR_700_chip_reset(struct Scsi_Host *host);
+
+static char *NCR_700_phase[] = {
+	"",
+	"after selection",
+	"before command phase",
+	"after command phase",
+	"after status phase",
+	"after data in phase",
+	"after data out phase",
+	"during data phase",
+};
+
+static char *NCR_700_condition[] = {
+	"",
+	"NOT MSG_OUT",
+	"UNEXPECTED PHASE",
+	"NOT MSG_IN",
+	"UNEXPECTED MSG",
+	"MSG_IN",
+	"SDTR_MSG RECEIVED",
+	"REJECT_MSG RECEIVED",
+	"DISCONNECT_MSG RECEIVED",
+	"MSG_OUT",
+	"DATA_IN",
+	
+};
+
+static char *NCR_700_fatal_messages[] = {
+	"unexpected message after reselection",
+	"still MSG_OUT after message injection",
+	"not MSG_IN after selection",
+	"Illegal message length received",
+};
+
+static char *NCR_700_SBCL_bits[] = {
+	"IO ",
+	"CD ",
+	"MSG ",
+	"ATN ",
+	"SEL ",
+	"BSY ",
+	"ACK ",
+	"REQ ",
+};
+
+static char *NCR_700_SBCL_to_phase[] = {
+	"DATA_OUT",
+	"DATA_IN",
+	"CMD_OUT",
+	"STATE",
+	"ILLEGAL PHASE",
+	"ILLEGAL PHASE",
+	"MSG OUT",
+	"MSG IN",
+};
+
+static __u8 NCR_700_SDTR_msg[] = {
+	0x01,			/* Extended message */
+	0x03,			/* Extended message Length */
+	0x01,			/* SDTR Extended message */
+	NCR_700_MIN_PERIOD,
+	NCR_700_MAX_OFFSET
+};
+
+struct Scsi_Host * __init
+NCR_700_detect(Scsi_Host_Template *tpnt,
+	       struct NCR_700_Host_Parameters *hostdata)
+{
+	__u32 *script = kmalloc(sizeof(SCRIPT), GFP_KERNEL);
+	__u32 pScript;
+	struct Scsi_Host *host;
+	static int banner = 0;
+	int j;
+
+	/* Fill in the missing routines from the host template */
+	tpnt->queuecommand = NCR_700_queuecommand;
+	tpnt->eh_abort_handler = NCR_700_abort;
+	tpnt->eh_device_reset_handler = NCR_700_dev_reset;
+	tpnt->eh_bus_reset_handler = NCR_700_bus_reset;
+	tpnt->eh_host_reset_handler = NCR_700_host_reset;
+	tpnt->can_queue = NCR_700_COMMAND_SLOTS_PER_HOST;
+	tpnt->sg_tablesize = NCR_700_SG_SEGMENTS;
+	tpnt->cmd_per_lun = NCR_700_MAX_TAGS;
+	tpnt->use_clustering = DISABLE_CLUSTERING;
+	tpnt->use_new_eh_code = 1;
+	tpnt->proc_info = NCR_700_proc_directory_info;
+	
+	if(tpnt->name == NULL)
+		tpnt->name = "53c700";
+	if(tpnt->proc_name == NULL)
+		tpnt->proc_name = "53c700";
+	
+
+	if((host = scsi_register(tpnt, 4)) == NULL)
+		return NULL;
+	if(script == NULL) {
+		printk(KERN_ERR "53c700: Failed to allocate script, detatching\n");
+		scsi_unregister(host);
+		return NULL;
+	}
+
+	hostdata->slots = kmalloc(sizeof(struct NCR_700_command_slot) * NCR_700_COMMAND_SLOTS_PER_HOST, GFP_KERNEL);
+	if(hostdata->slots == NULL) {
+		printk(KERN_ERR "53c700: Failed to allocate command slots, detatching\n");
+		scsi_unregister(host);
+		return NULL;
+	}
+	memset(hostdata->slots, 0, sizeof(struct NCR_700_command_slot) * NCR_700_COMMAND_SLOTS_PER_HOST);
+	for(j = 0; j < NCR_700_COMMAND_SLOTS_PER_HOST; j++) {
+		if(j == 0)
+			hostdata->free_list = &hostdata->slots[j];
+		else
+			hostdata->slots[j-1].ITL_forw = &hostdata->slots[j];
+		hostdata->slots[j].state = NCR_700_SLOT_FREE;
+	}
+	host->hostdata[0] = (__u32)hostdata;
+	for(j = 0; j < sizeof(SCRIPT)/sizeof(SCRIPT[0]); j++) {
+		script[j] = bS_to_host(SCRIPT[j]);
+	}
+	/* bus physical address of script */
+	pScript = virt_to_bus(script);
+	/* adjust all labels to be bus physical */
+	for(j = 0; j < PATCHES; j++) {
+		script[LABELPATCHES[j]] = bS_to_host(pScript + SCRIPT[LABELPATCHES[j]]);
+	}
+	/* now patch up fixed addresses */
+	script_patch_32(script, MessageLocation,
+			virt_to_bus(&hostdata->msgout[0]));
+	script_patch_32(script, StatusAddress,
+			virt_to_bus(&hostdata->status));
+	script_patch_32(script, ReceiveMsgAddress,
+			virt_to_bus(&hostdata->msgin[0]));
+
+	hostdata->script = script;
+	hostdata->pScript = pScript;
+	hostdata->state = NCR_700_HOST_FREE;
+	spin_lock_init(&hostdata->lock);
+	hostdata->cmd = NULL;
+	host->max_id = 7;
+	host->max_lun = NCR_700_MAX_LUNS;
+	host->unique_id = hostdata->base;
+	host->base = hostdata->base;
+	host->hostdata[0] = (unsigned long)hostdata;
+	/* kick the chip */
+	NCR_700_writeb(0xff, host, CTEST9_REG);
+	hostdata->rev = (NCR_700_readb(host, CTEST7_REG)<<4) & 0x0f;
+	hostdata->fast = (NCR_700_readb(host, CTEST9_REG) == 0);
+	if(banner == 0) {
+		printk(KERN_NOTICE "53c700: Version " NCR_700_VERSION " By James.Bottomley@HansenPartnership.com\n");
+		banner = 1;
+	}
+	printk(KERN_NOTICE "scsi%d: %s rev %d %s\n", host->host_no,
+	       hostdata->fast ? "53c700-66" : "53c700",
+	       hostdata->rev, hostdata->differential ?
+	       "(Differential)" : "");
+	/* reset the chip */
+	NCR_700_chip_reset(host);
+	NCR_700_writeb(ASYNC_OPERATION , host, SXFER_REG);
+
+	return host;
+}
+
+int
+NCR_700_release(struct Scsi_Host *host)
+{
+	struct NCR_700_Host_Parameters *hostdata = 
+		(struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+	kfree(hostdata->script);
+	return 1;
+}
+
+static inline __u8
+NCR_700_identify(int can_disconnect, __u8 lun)
+{
+	return IDENTIFY_BASE |
+		((can_disconnect) ? 0x40 : 0) |
+		(lun & NCR_700_LUN_MASK);
+}
+
+/*
+ * Function : static int datapath_residual (Scsi_Host *host)
+ *
+ * Purpose : return residual data count of what's in the chip.  If you
+ * really want to know what this function is doing, it's almost a
+ * direct transcription of the algorithm described in the 53c710
+ * guide, except that the DBC and DFIFO registers are only 6 bits
+ * wide.
+ *
+ * Inputs : host - SCSI host */
+static inline int
+NCR_700_data_residual (struct Scsi_Host *host) {
+	int count, synchronous;
+	unsigned int ddir;
+
+	count = ((NCR_700_readb(host, DFIFO_REG) & 0x3f) -
+		 (NCR_700_readl(host, DBC_REG) & 0x3f)) & 0x3f;
+	
+	synchronous = NCR_700_readb(host, SXFER_REG) & 0x0f;
+	
+	/* get the data direction */
+	ddir = NCR_700_readb(host, CTEST0_REG) & 0x01;
+
+	if (ddir) {
+		/* Receive */
+		if (synchronous) 
+			count += (NCR_700_readb(host, SSTAT2_REG) & 0xf0) >> 4;
+		else
+			if (NCR_700_readb(host, SSTAT1_REG) & SIDL_REG_FULL)
+				++count;
+	} else {
+		/* Send */
+		__u8 sstat = NCR_700_readb(host, SSTAT1_REG);
+		if (sstat & SODL_REG_FULL)
+			++count;
+		if (synchronous && (sstat & SODR_REG_FULL))
+			++count;
+	}
+	return count;
+}
+
+/* print out the SCSI wires and corresponding phase from the SBCL register
+ * in the chip */
+static inline char *
+sbcl_to_string(__u8 sbcl)
+{
+	int i;
+	static char ret[256];
+
+	ret[0]='\0';
+	for(i=0; i<8; i++) {
+		if((1<<i) & sbcl) 
+			strcat(ret, NCR_700_SBCL_bits[i]);
+	}
+	strcat(ret, NCR_700_SBCL_to_phase[sbcl & 0x07]);
+	return ret;
+}
+
+static inline __u8
+bitmap_to_number(__u8 bitmap)
+{
+	__u8 i;
+
+	for(i=0; i<8 && !(bitmap &(1<<i)); i++)
+		;
+	return i;
+}
+
+/* Pull a slot off the free list */
+STATIC struct NCR_700_command_slot *
+find_empty_slot(struct NCR_700_Host_Parameters *hostdata)
+{
+	struct NCR_700_command_slot *slot = hostdata->free_list;
+
+	if(slot == NULL) {
+		/* sanity check */
+		if(hostdata->command_slot_count != NCR_700_COMMAND_SLOTS_PER_HOST)
+			printk(KERN_ERR "SLOTS FULL, but count is %d, should be %d\n", hostdata->command_slot_count, NCR_700_COMMAND_SLOTS_PER_HOST);
+		return NULL;
+	}
+
+	if(slot->state != NCR_700_SLOT_FREE)
+		/* should panic! */
+		printk(KERN_ERR "BUSY SLOT ON FREE LIST!!!\n");
+		
+
+	hostdata->free_list = slot->ITL_forw;
+	slot->ITL_forw = NULL;
+
+
+	/* NOTE: set the state to busy here, not queued, since this
+	 * indicates the slot is in use and cannot be run by the IRQ
+	 * finish routine.  If we cannot queue the command when it
+	 * is properly build, we then change to NCR_700_SLOT_QUEUED */
+	slot->state = NCR_700_SLOT_BUSY;
+	hostdata->command_slot_count++;
+	
+	return slot;
+}
+
+STATIC void 
+free_slot(struct NCR_700_command_slot *slot,
+	  struct NCR_700_Host_Parameters *hostdata)
+{
+	int hash;
+	struct NCR_700_command_slot **forw, **back;
+
+
+	if((slot->state & NCR_700_SLOT_MASK) != NCR_700_SLOT_MAGIC) {
+		printk(KERN_ERR "53c700: SLOT %p is not MAGIC!!!\n", slot);
+	}
+	if(slot->state == NCR_700_SLOT_FREE) {
+		printk(KERN_ERR "53c700: SLOT %p is FREE!!!\n", slot);
+	}
+	/* remove from queues */
+	if(slot->tag != NCR_700_NO_TAG) {
+		hash = hash_ITLQ(slot->cmnd->target, slot->cmnd->lun,
+				 slot->tag);
+		if(slot->ITLQ_forw == NULL)
+			back = &hostdata->ITLQ_Hash_back[hash];
+		else
+			back = &slot->ITLQ_forw->ITLQ_back;
+
+		if(slot->ITLQ_back == NULL)
+			forw = &hostdata->ITLQ_Hash_forw[hash];
+		else
+			forw = &slot->ITLQ_back->ITLQ_forw;
+
+		*forw = slot->ITLQ_forw;
+		*back = slot->ITLQ_back;
+	}
+	hash = hash_ITL(slot->cmnd->target, slot->cmnd->lun);
+	if(slot->ITL_forw == NULL)
+		back = &hostdata->ITL_Hash_back[hash];
+	else
+		back = &slot->ITL_forw->ITL_back;
+	
+	if(slot->ITL_back == NULL)
+		forw = &hostdata->ITL_Hash_forw[hash];
+	else
+		forw = &slot->ITL_back->ITL_forw;
+	
+	*forw = slot->ITL_forw;
+	*back = slot->ITL_back;
+	
+	slot->resume_offset = 0;
+	slot->cmnd = NULL;
+	slot->state = NCR_700_SLOT_FREE;
+	slot->ITL_forw = hostdata->free_list;
+	hostdata->free_list = slot;
+	hostdata->command_slot_count--;
+}
+
+
+/* This routine really does very little.  The command is indexed on
+   the ITL and (if tagged) the ITLQ lists in _queuecommand */
+STATIC void
+save_for_reselection(struct NCR_700_Host_Parameters *hostdata,
+		     Scsi_Cmnd *SCp, __u32 dsp)
+{
+	/* Its just possible that this gets executed twice */
+	if(SCp != NULL) {
+		struct NCR_700_command_slot *slot =
+			(struct NCR_700_command_slot *)SCp->host_scribble;
+
+		slot->resume_offset = dsp;
+	}
+	hostdata->state = NCR_700_HOST_FREE;
+	hostdata->cmd = NULL;
+}
+
+/* Most likely nexus is the oldest in each case */
+STATIC inline struct NCR_700_command_slot *
+find_ITL_Nexus(struct NCR_700_Host_Parameters *hostdata, __u8 pun, __u8 lun)
+{
+	int hash = hash_ITL(pun, lun);
+	struct NCR_700_command_slot *slot = hostdata->ITL_Hash_back[hash];
+	while(slot != NULL && !(slot->cmnd->target == pun &&
+				slot->cmnd->lun == lun))
+		slot = slot->ITL_back;
+	return slot;
+}
+
+STATIC inline struct NCR_700_command_slot *
+find_ITLQ_Nexus(struct NCR_700_Host_Parameters *hostdata, __u8 pun,
+		__u8 lun, __u8 tag)
+{
+	int hash = hash_ITLQ(pun, lun, tag);
+	struct NCR_700_command_slot *slot = hostdata->ITLQ_Hash_back[hash];
+
+	while(slot != NULL && !(slot->cmnd->target == pun 
+	      && slot->cmnd->lun == lun && slot->tag == tag))
+		slot = slot->ITLQ_back;
+
+#ifdef NCR_700_TAG_DEBUG
+	if(slot != NULL) {
+		struct NCR_700_command_slot *n = slot->ITLQ_back;
+		while(n != NULL && n->cmnd->target != pun
+		      && n->cmnd->lun != lun && n->tag != tag)
+			n = n->ITLQ_back;
+
+		if(n != NULL && n->cmnd->target == pun && n->cmnd->lun == lun
+		   && n->tag == tag) {
+			printk(KERN_WARNING "53c700: WARNING: DUPLICATE tag %d\n",
+			       tag);
+		}
+	}
+#endif
+	return slot;
+}
+
+
+
+/* This translates the SDTR message offset and period to a value
+ * which can be loaded into the SXFER_REG.
+ *
+ * NOTE: According to SCSI-2, the true transfer period (in ns) is
+ *       actually four times this period value */
+STATIC inline __u8
+NCR_700_offset_period_to_sxfer(struct NCR_700_Host_Parameters *hostdata,
+			       __u8 offset, __u8 period)
+{
+	int XFERP;
+
+	if(period*4 < NCR_700_MIN_PERIOD) {
+		printk(KERN_WARNING "53c700: Period %dns is less than SCSI-2 minimum, setting to %d\n", period*4, NCR_700_MIN_PERIOD);
+		period = NCR_700_MIN_PERIOD/4;
+	}
+	XFERP = (period*4 * hostdata->sync_clock)/1000 - 4;
+	if(offset > NCR_700_MAX_OFFSET) {
+		printk(KERN_WARNING "53c700: Offset %d exceeds maximum, setting to %d\n",
+		       offset, NCR_700_MAX_OFFSET);
+		offset = NCR_700_MAX_OFFSET;
+	}
+	if(XFERP < NCR_700_MIN_XFERP) {
+		printk(KERN_WARNING "53c700: XFERP %d is less than minium, setting to %d\n",
+		       XFERP,  NCR_700_MIN_XFERP);
+		XFERP =  NCR_700_MIN_XFERP;
+	}
+	return (offset & 0x0f) | (XFERP & 0x07)<<4;
+}
+	
+
+STATIC inline void
+NCR_700_scsi_done(struct NCR_700_Host_Parameters *hostdata,
+	       Scsi_Cmnd *SCp, int result)
+{
+	hostdata->state = NCR_700_HOST_FREE;
+	hostdata->cmd = NULL;
+
+	if(SCp != NULL) {
+		struct NCR_700_command_slot *slot = 
+			(struct NCR_700_command_slot *)SCp->host_scribble;
+
+		if(SCp->cmnd[0] == REQUEST_SENSE && SCp->cmnd[6] == NCR_700_INTERNAL_SENSE_MAGIC) {
+#ifdef NCR_700_DEBUG
+			printk(" ORIGINAL CMD %p RETURNED %d, new return is %d sense is",
+			       SCp, SCp->cmnd[7], result);
+			print_sense("53c700", SCp);
+#endif
+			if(result == 0)
+				result = SCp->cmnd[7];
+		}
+			
+		free_slot(slot, hostdata);
+
+		SCp->host_scribble = NULL;
+		SCp->result = result;
+		SCp->scsi_done(SCp);
+		if(NCR_700_get_depth(SCp->device) == 0 ||
+		   NCR_700_get_depth(SCp->device) > NCR_700_MAX_TAGS)
+			printk(KERN_ERR "Invalid depth in NCR_700_scsi_done(): %d\n",
+			       NCR_700_get_depth(SCp->device));
+		NCR_700_set_depth(SCp->device, NCR_700_get_depth(SCp->device) - 1);
+	} else {
+		printk(KERN_ERR "53c700: SCSI DONE HAS NULL SCp\n");
+	}
+}
+
+
+STATIC void
+NCR_700_internal_bus_reset(struct Scsi_Host *host)
+{
+	/* Bus reset */
+	NCR_700_writeb(ASSERT_RST, host, SCNTL1_REG);
+	udelay(50);
+	NCR_700_writeb(0, host, SCNTL1_REG);
+
+}
+
+STATIC void
+NCR_700_chip_setup(struct Scsi_Host *host)
+{
+	struct NCR_700_Host_Parameters *hostdata = 
+		(struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+	NCR_700_writeb(1 << host->this_id, host, SCID_REG);
+	NCR_700_writeb(0, host, SBCL_REG);
+	NCR_700_writeb(0, host, SXFER_REG);
+
+	NCR_700_writeb(PHASE_MM_INT | SEL_TIMEOUT_INT | GROSS_ERR_INT | UX_DISC_INT
+	     | RST_INT | PAR_ERR_INT | SELECT_INT, host, SIEN_REG);
+
+	NCR_700_writeb(ABORT_INT | INT_INST_INT | ILGL_INST_INT, host, DIEN_REG);
+	NCR_700_writeb(BURST_LENGTH_8, host, DMODE_REG);
+	NCR_700_writeb(FULL_ARBITRATION | PARITY | AUTO_ATN, host, SCNTL0_REG);
+	NCR_700_writeb(LAST_DIS_ENBL | ENABLE_ACTIVE_NEGATION|GENERATE_RECEIVE_PARITY,
+	     host, CTEST8_REG);
+	NCR_700_writeb(ENABLE_SELECT, host, SCNTL1_REG);
+	if(hostdata->clock > 75) {
+		printk(KERN_ERR "53c700: Clock speed %dMHz is too high: 75Mhz is the maximum this chip can be driven at\n", hostdata->clock);
+		/* do the best we can, but the async clock will be out
+		 * of spec: sync divider 2, async divider 3 */
+		DEBUG(("53c700: sync 2 async 3\n"));
+		NCR_700_writeb(SYNC_DIV_2_0, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_3_0, host, DCNTL_REG);
+		hostdata->sync_clock = hostdata->clock/2;
+	} else	if(hostdata->clock > 50  && hostdata->clock <= 75) {
+		/* sync divider 1.5, async divider 3 */
+		DEBUG(("53c700: sync 1.5 async 3\n"));
+		NCR_700_writeb(SYNC_DIV_1_5, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_3_0, host, DCNTL_REG);
+		hostdata->sync_clock = hostdata->clock*2;
+		hostdata->sync_clock /= 3;
+		
+	} else if(hostdata->clock > 37 && hostdata->clock <= 50) {
+		/* sync divider 1, async divider 2 */
+		DEBUG(("53c700: sync 1 async 2\n"));
+		NCR_700_writeb(SYNC_DIV_1_0, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_2_0, host, DCNTL_REG);
+		hostdata->sync_clock = hostdata->clock;
+	} else if(hostdata->clock > 25 && hostdata->clock <=37) {
+		/* sync divider 1, async divider 1.5 */
+		DEBUG(("53c700: sync 1 async 1.5\n"));
+		NCR_700_writeb(SYNC_DIV_1_0, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_1_5, host, DCNTL_REG);
+		hostdata->sync_clock = hostdata->clock;
+	} else {
+		DEBUG(("53c700: sync 1 async 1\n"));
+		NCR_700_writeb(SYNC_DIV_1_0, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_1_0, host, DCNTL_REG);
+		/* sync divider 1, async divider 1 */
+	}
+}
+
+STATIC void
+NCR_700_chip_reset(struct Scsi_Host *host)
+{
+	/* Chip reset */
+	NCR_700_writeb(SOFTWARE_RESET, host, DCNTL_REG);
+	udelay(100);
+
+	NCR_700_writeb(0, host, DCNTL_REG);
+
+	mdelay(1000);
+
+	NCR_700_chip_setup(host);
+}
+
+/* The heart of the message processing engine is that the instruction
+ * immediately after the INT is the normal case (and so must be CLEAR
+ * ACK).  If we want to do something else, we call that routine in
+ * scripts and set temp to be the normal case + 8 (skipping the CLEAR
+ * ACK) so that the routine returns correctly to resume its activity
+ * */
+STATIC __u32
+process_extended_message(struct Scsi_Host *host, 
+			 struct NCR_700_Host_Parameters *hostdata,
+			 Scsi_Cmnd *SCp, __u32 dsp, __u32 dsps)
+{
+	__u32 resume_offset = dsp, temp = dsp + 8;
+	__u8 pun = 0xff, lun = 0xff;
+
+	if(SCp != NULL) {
+		pun = SCp->target;
+		lun = SCp->lun;
+	}
+
+	switch(hostdata->msgin[2]) {
+	case A_SDTR_MSG:
+		if(SCp != NULL && NCR_700_is_flag_set(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION)) {
+			__u8 period = hostdata->msgin[3];
+			__u8 offset = hostdata->msgin[4];
+			__u8 sxfer;
+
+			if(offset != 0 && period != 0)
+				sxfer = NCR_700_offset_period_to_sxfer(hostdata, offset, period);
+			else 
+				sxfer = 0;
+			
+			if(sxfer != NCR_700_get_SXFER(SCp->device)) {
+				printk(KERN_INFO "scsi%d: (%d:%d) Synchronous at offset %d, period %dns\n",
+				       host->host_no, pun, lun,
+				       offset, period*4);
+				
+				NCR_700_set_SXFER(SCp->device, sxfer);
+			}
+			
+
+			NCR_700_set_flag(SCp->device, NCR_700_DEV_NEGOTIATED_SYNC);
+			NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION);
+			
+			NCR_700_writeb(NCR_700_get_SXFER(SCp->device),
+				       host, SXFER_REG);
+
+		} else {
+			/* SDTR message out of the blue, reject it */
+			printk(KERN_WARNING "scsi%d Unexpected SDTR msg\n",
+			       host->host_no);
+			hostdata->msgout[0] = A_REJECT_MSG;
+			dma_cache_wback((unsigned long)hostdata->msgout, sizeof(hostdata->msgout));
+			script_patch_16(hostdata->script, MessageCount, 1);
+			/* SendMsgOut returns, so set up the return
+			 * address */
+			resume_offset = hostdata->pScript + Ent_SendMessageWithATN;
+		}
+		break;
+	
+	case A_WDTR_MSG:
+		printk(KERN_INFO "scsi%d: (%d:%d), Unsolicited WDTR after CMD, Rejecting\n",
+		       host->host_no, pun, lun);
+		hostdata->msgout[0] = A_REJECT_MSG;
+		dma_cache_wback((unsigned long)hostdata->msgout, sizeof(hostdata->msgout));
+		script_patch_16(hostdata->script, MessageCount, 1);
+		resume_offset = hostdata->pScript + Ent_SendMessageWithATN;
+
+		break;
+
+	default:
+		printk(KERN_INFO "scsi%d (%d:%d): Unexpected message %s: ",
+		       host->host_no, pun, lun,
+		       NCR_700_phase[(dsps & 0xf00) >> 8]);
+		print_msg(hostdata->msgin);
+		printk("\n");
+		/* just reject it */
+		hostdata->msgout[0] = A_REJECT_MSG;
+		dma_cache_wback((unsigned long)hostdata->msgout, sizeof(hostdata->msgout));
+		script_patch_16(hostdata->script, MessageCount, 1);
+		/* SendMsgOut returns, so set up the return
+		 * address */
+		resume_offset = hostdata->pScript + Ent_SendMessageWithATN;
+	}
+	NCR_700_writel(temp, host, TEMP_REG);
+	return resume_offset;
+}
+
+STATIC __u32
+process_message(struct Scsi_Host *host,	struct NCR_700_Host_Parameters *hostdata,
+		Scsi_Cmnd *SCp, __u32 dsp, __u32 dsps)
+{
+	/* work out where to return to */
+	__u32 temp = dsp + 8, resume_offset = dsp;
+	__u8 pun = 0xff, lun = 0xff;
+
+	dma_cache_inv((unsigned long)hostdata->msgin, sizeof(hostdata->msgin));
+
+	if(SCp != NULL) {
+		pun = SCp->target;
+		lun = SCp->lun;
+	}
+
+#ifdef NCR_700_DEBUG
+	printk("scsi%d (%d:%d): message %s: ", host->host_no, pun, lun,
+	       NCR_700_phase[(dsps & 0xf00) >> 8]);
+	print_msg(hostdata->msgin);
+	printk("\n");
+#endif
+
+	switch(hostdata->msgin[0]) {
+
+	case A_EXTENDED_MSG:
+		return process_extended_message(host, hostdata, SCp,
+						dsp, dsps);
+
+	case A_REJECT_MSG:
+		if(SCp != NULL && NCR_700_is_flag_set(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION)) {
+			/* Rejected our sync negotiation attempt */
+			NCR_700_set_SXFER(SCp->device, 0);
+			NCR_700_set_flag(SCp->device, NCR_700_DEV_NEGOTIATED_SYNC);
+			NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION);
+		} else if(SCp != NULL && NCR_700_is_flag_set(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING)) {
+			/* rejected our first simple tag message */
+			printk(KERN_WARNING "scsi%d (%d:%d) Rejected first tag queue attempt, turning off tag queueing\n", host->host_no, pun, lun);
+			NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING);
+			hostdata->tag_negotiated &= ~(1<<SCp->target);
+		} else {
+			printk(KERN_WARNING "scsi%d (%d:%d) Unexpected REJECT Message %s\n",
+			       host->host_no, pun, lun,
+			       NCR_700_phase[(dsps & 0xf00) >> 8]);
+			/* however, just ignore it */
+		}
+		break;
+
+	case A_PARITY_ERROR_MSG:
+		printk(KERN_ERR "scsi%d (%d:%d) Parity Error!\n", host->host_no,
+		       pun, lun);
+		NCR_700_internal_bus_reset(host);
+		break;
+	case A_SIMPLE_TAG_MSG:
+		printk(KERN_INFO "scsi%d (%d:%d) SIMPLE TAG %d %s\n", host->host_no,
+		       pun, lun, hostdata->msgin[1],
+		       NCR_700_phase[(dsps & 0xf00) >> 8]);
+		/* just ignore it */
+		break;
+	default:
+		printk(KERN_INFO "scsi%d (%d:%d): Unexpected message %s: ",
+		       host->host_no, pun, lun,
+		       NCR_700_phase[(dsps & 0xf00) >> 8]);
+
+		print_msg(hostdata->msgin);
+		printk("\n");
+		/* just reject it */
+		hostdata->msgout[0] = A_REJECT_MSG;
+		dma_cache_wback((unsigned long)hostdata->msgout, sizeof(hostdata->msgout));
+		script_patch_16(hostdata->script, MessageCount, 1);
+		/* SendMsgOut returns, so set up the return
+		 * address */
+		resume_offset = hostdata->pScript + Ent_SendMessageWithATN;
+
+		break;
+	}
+	NCR_700_writel(temp, host, TEMP_REG);
+	return resume_offset;
+}
+
+STATIC __u32
+process_script_interrupt(__u32 dsps, __u32 dsp, Scsi_Cmnd *SCp,
+			 struct Scsi_Host *host,
+			 struct NCR_700_Host_Parameters *hostdata)
+{
+	__u32 resume_offset = 0;
+	__u8 pun = 0xff, lun=0xff;
+
+	if(SCp != NULL) {
+		pun = SCp->target;
+		lun = SCp->lun;
+	}
+
+	if(dsps == A_GOOD_STATUS_AFTER_STATUS) {
+		dma_cache_inv((unsigned long)hostdata->status, sizeof(hostdata->status));
+		DEBUG(("  COMMAND COMPLETE, status=%02x\n",
+		       hostdata->status));
+		/* OK, if TCQ still on, we know it works */
+		NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING);
+		/* check for contingent allegiance contitions */
+		if(status_byte(hostdata->status) == CHECK_CONDITION ||
+		   status_byte(hostdata->status) == COMMAND_TERMINATED) {
+			struct NCR_700_command_slot *slot =
+				(struct NCR_700_command_slot *)SCp->host_scribble;
+			if(SCp->cmnd[0] == REQUEST_SENSE) {
+				/* OOPS: bad device, returning another
+				 * contingent allegiance condition */
+				printk(KERN_ERR "scsi%d (%d:%d) broken device is looping in contingent allegiance: ignoring\n", host->host_no, pun, lun);
+				NCR_700_scsi_done(hostdata, SCp, hostdata->status);
+			} else {
+
+				DEBUG(("  cmd %p has status %d, requesting sense\n",
+				       SCp, hostdata->status));
+				/* we can destroy the command here because the
+				 * contingent allegiance condition will cause a 
+				 * retry which will re-copy the command from the
+				 * saved data_cmnd */
+				SCp->cmnd[0] = REQUEST_SENSE;
+				SCp->cmnd[1] = (SCp->lun & 0x7) << 5;
+				SCp->cmnd[2] = 0;
+				SCp->cmnd[3] = 0;
+				SCp->cmnd[4] = sizeof(SCp->sense_buffer);
+				SCp->cmnd[5] = 0;
+				SCp->cmd_len = 6;
+				/* Here's a quiet hack: the REQUEST_SENSE command is
+				 * six bytes, so store a flag indicating that this
+				 * was an internal sense request and the original
+				 * status at the end of the command */
+				SCp->cmnd[6] = NCR_700_INTERNAL_SENSE_MAGIC;
+				SCp->cmnd[7] = hostdata->status;
+				slot->SG[0].ins = bS_to_host(SCRIPT_MOVE_DATA_IN | sizeof(SCp->sense_buffer));
+				slot->SG[0].pAddr = bS_to_host(virt_to_bus(SCp->sense_buffer));
+				slot->SG[1].ins = bS_to_host(SCRIPT_RETURN);
+				slot->SG[1].pAddr = 0;
+				slot->resume_offset = hostdata->pScript;
+				dma_cache_wback((unsigned long)slot->SG, sizeof(slot->SG[0])*2);
+				dma_cache_inv((unsigned long)SCp->sense_buffer, sizeof(SCp->sense_buffer));
+				
+				/* queue the command for reissue */
+				slot->state = NCR_700_SLOT_QUEUED;
+				hostdata->state = NCR_700_HOST_FREE;
+				hostdata->cmd = NULL;
+			}
+		} else {
+			if(status_byte(hostdata->status) == GOOD &&
+			   SCp->cmnd[0] == INQUIRY && SCp->use_sg == 0) {
+				/* Piggy back the tag queueing support
+				 * on this command */
+				if(((char *)SCp->request_buffer)[7] & 0x02) {
+					printk(KERN_INFO "scsi%d: (%d:%d) Enabling Tag Command Queuing\n", host->host_no, pun, lun);
+					hostdata->tag_negotiated |= (1<<SCp->target);
+					NCR_700_set_flag(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING);
+				} else {
+					NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING);
+					hostdata->tag_negotiated &= ~(1<<SCp->target);
+				}
+			}
+			NCR_700_scsi_done(hostdata, SCp, hostdata->status);
+		}
+	} else if((dsps & 0xfffff0f0) == A_UNEXPECTED_PHASE) {
+		__u8 i = (dsps & 0xf00) >> 8;
+
+		printk(KERN_ERR "scsi%d: (%d:%d), UNEXPECTED PHASE %s (%s)\n",
+		       host->host_no, pun, lun,
+		       NCR_700_phase[i],
+		       sbcl_to_string(NCR_700_readb(host, SBCL_REG)));
+		printk(KERN_ERR "         len = %d, cmd =", SCp->cmd_len);
+		print_command(SCp->cmnd);
+
+		NCR_700_internal_bus_reset(host);
+	} else if((dsps & 0xfffff000) == A_FATAL) {
+		int i = (dsps & 0xfff);
+
+		printk(KERN_ERR "scsi%d: (%d:%d) FATAL ERROR: %s\n",
+		       host->host_no, pun, lun, NCR_700_fatal_messages[i]);
+		if(dsps == A_FATAL_ILLEGAL_MSG_LENGTH) {
+			printk(KERN_ERR "     msg begins %02x %02x\n",
+			       hostdata->msgin[0], hostdata->msgin[1]);
+		}
+		NCR_700_internal_bus_reset(host);
+	} else if((dsps & 0xfffff0f0) == A_DISCONNECT) {
+#ifdef NCR_700_DEBUG
+		__u8 i = (dsps & 0xf00) >> 8;
+
+		printk("scsi%d: (%d:%d), DISCONNECTED (%d) %s\n",
+		       host->host_no, pun, lun,
+		       i, NCR_700_phase[i]);
+#endif
+		save_for_reselection(hostdata, SCp, dsp);
+
+	} else if(dsps == A_RESELECTION_IDENTIFIED) {
+		__u8 lun;
+		struct NCR_700_command_slot *slot;
+		__u8 reselection_id = hostdata->reselection_id;
+
+		dma_cache_inv((unsigned long)hostdata->msgin, sizeof(hostdata->msgin));
+
+		lun = hostdata->msgin[0] & 0x1f;
+
+		hostdata->reselection_id = 0xff;
+		DEBUG(("scsi%d: (%d:%d) RESELECTED!\n",
+		       host->host_no, reselection_id, lun));
+		/* clear the reselection indicator */
+		if(hostdata->msgin[1] == A_SIMPLE_TAG_MSG) {
+			slot = find_ITLQ_Nexus(hostdata, reselection_id,
+					       lun, hostdata->msgin[2]);
+		} else {
+			slot = find_ITL_Nexus(hostdata, reselection_id, lun);
+		}
+	retry:
+		if(slot == NULL) {
+			struct NCR_700_command_slot *s = find_ITL_Nexus(hostdata, reselection_id, lun);
+			printk(KERN_ERR "scsi%d: (%d:%d) RESELECTED but no saved command (MSG = %02x %02x %02x)!!\n",
+			       host->host_no, reselection_id, lun,
+			       hostdata->msgin[0], hostdata->msgin[1],
+			       hostdata->msgin[2]);
+			printk(KERN_ERR " OUTSTANDING TAGS:");
+			while(s != NULL) {
+				if(s->cmnd->target == reselection_id &&
+				   s->cmnd->lun == lun) {
+					printk("%d ", s->tag);
+					if(s->tag == hostdata->msgin[2]) {
+						printk(" ***FOUND*** \n");
+						slot = s;
+						goto retry;
+					}
+						
+				}
+				s = s->ITL_back;
+			}
+			printk("\n");
+		} else {
+			if(hostdata->state != NCR_700_HOST_BUSY)
+				printk(KERN_ERR "scsi%d: FATAL, host not busy during valid reselection!\n",
+				       host->host_no);
+			resume_offset = slot->resume_offset;
+			hostdata->cmd = slot->cmnd;
+
+			/* re-patch for this command */
+			script_patch_32_abs(hostdata->script, CommandAddress, 
+					    virt_to_bus(slot->cmnd->cmnd));
+			script_patch_16(hostdata->script,
+					CommandCount, slot->cmnd->cmd_len);
+			script_patch_32_abs(hostdata->script, SGScriptStartAddress,
+					    virt_to_bus(&slot->SG[0].ins));
+
+			/* Note: setting SXFER only works if we're
+			 * still in the MESSAGE phase, so it is vital
+			 * that ACK is still asserted when we process
+			 * the reselection message.  The resume offset
+			 * should therefore always clear ACK */
+			NCR_700_writeb(NCR_700_get_SXFER(hostdata->cmd->device),
+				       host, SXFER_REG);
+			
+		}
+	} else if(dsps == A_RESELECTED_DURING_SELECTION) {
+
+		/* This section is full of debugging code because I've
+		 * never managed to reach it.  I think what happens is
+		 * that, because the 700 runs with selection
+		 * interrupts enabled the whole time that we take a
+		 * selection interrupt before we manage to get to the
+		 * reselected script interrupt */
+
+		__u8 reselection_id = NCR_700_readb(host, SFBR_REG);
+		struct NCR_700_command_slot *slot;
+		
+		/* Take out our own ID */
+		reselection_id &= ~(1<<host->this_id);
+		
+		printk(KERN_INFO "scsi%d: (%d:%d) RESELECTION DURING SELECTION, dsp=%p[%04x] state=%d, count=%d\n",
+		       host->host_no, reselection_id, lun, (void *)dsp, dsp - hostdata->pScript, hostdata->state, hostdata->command_slot_count);
+
+		{
+			/* FIXME: DEBUGGING CODE */
+			__u32 SG = (__u32)bus_to_virt(hostdata->script[A_SGScriptStartAddress_used[0]]);
+			int i;
+
+			for(i=0; i< NCR_700_COMMAND_SLOTS_PER_HOST; i++) {
+				if(SG >= (__u32)(&hostdata->slots[i].SG[0])
+				   && SG <= (__u32)(&hostdata->slots[i].SG[NCR_700_SG_SEGMENTS]))
+					break;
+			}
+			printk(KERN_INFO "IDENTIFIED SG segment as being %p in slot %p, cmd %p, slot->resume_offset=%p\n", (void *)SG, &hostdata->slots[i], hostdata->slots[i].cmnd, (void *)hostdata->slots[i].resume_offset);
+			SCp =  hostdata->slots[i].cmnd;
+		}
+
+		if(SCp != NULL) {
+			slot = (struct NCR_700_command_slot *)SCp->host_scribble;
+			/* change slot from busy to queued to redo command */
+			slot->state = NCR_700_SLOT_QUEUED;
+		}
+		hostdata->cmd = NULL;
+		
+		if(reselection_id == 0) {
+			if(hostdata->reselection_id == 0xff) {
+				printk(KERN_ERR "scsi%d: Invalid reselection during selection!!\n", host->host_no);
+				return 0;
+			} else {
+				printk(KERN_ERR "scsi%d: script reselected and we took a selection interrupt\n",
+				       host->host_no);
+				reselection_id = hostdata->reselection_id;
+			}
+		} else {
+			
+			/* convert to real ID */
+			reselection_id = bitmap_to_number(reselection_id);
+		}
+		hostdata->reselection_id = reselection_id;
+		hostdata->msgin[1] = 0;
+		dma_cache_wback((unsigned long)hostdata->msgin, sizeof(hostdata->msgin));
+		if(hostdata->tag_negotiated & (1<<reselection_id)) {
+			resume_offset = hostdata->pScript + Ent_GetReselectionWithTag;
+		} else {
+			resume_offset = hostdata->pScript + Ent_GetReselectionData;
+		}
+	} else if(dsps == A_COMPLETED_SELECTION_AS_TARGET) {
+		/* we've just disconnected from the bus, do nothing since
+		 * a return here will re-run the queued command slot
+		 * that may have been interrupted by the initial selection */
+		DEBUG((" SELECTION COMPLETED\n"));
+	} else if((dsps & 0xfffff0f0) == A_MSG_IN) { 
+		resume_offset = process_message(host, hostdata, SCp,
+						dsp, dsps);
+	} else if((dsps &  0xfffff000) == 0) {
+		__u8 i = (dsps & 0xf0) >> 4, j = (dsps & 0xf00) >> 8;
+		printk(KERN_ERR "scsi%d: (%d:%d), unhandled script condition %s %s at %04x\n",
+		       host->host_no, pun, lun, NCR_700_condition[i],
+		       NCR_700_phase[j], dsp - hostdata->pScript);
+		if(SCp != NULL) {
+			print_command(SCp->cmnd);
+
+			if(SCp->use_sg) {
+				for(i = 0; i < SCp->use_sg + 1; i++) {
+					printk(KERN_INFO " SG[%d].length = %d, move_insn=%08x, addr %08x\n", i, ((struct scatterlist *)SCp->buffer)[i].length, ((struct NCR_700_command_slot *)SCp->host_scribble)->SG[i].ins, ((struct NCR_700_command_slot *)SCp->host_scribble)->SG[i].pAddr);
+				}
+			}
+		}	       
+		NCR_700_internal_bus_reset(host);
+	} else if((dsps & 0xfffff000) == A_DEBUG_INTERRUPT) {
+		printk(KERN_NOTICE "scsi%d (%d:%d) DEBUG INTERRUPT %d AT %p[%04x], continuing\n",
+		       host->host_no, pun, lun, dsps & 0xfff, (void *)dsp, dsp - hostdata->pScript);
+		resume_offset = dsp;
+	} else {
+		printk(KERN_ERR "scsi%d: (%d:%d), unidentified script interrupt 0x%x at %04x\n",
+		       host->host_no, pun, lun, dsps, dsp - hostdata->pScript);
+		NCR_700_internal_bus_reset(host);
+	}
+	return resume_offset;
+}
+
+/* We run the 53c700 with selection interrupts always enabled.  This
+ * means that the chip may be selected as soon as the bus frees.  On a
+ * busy bus, this can be before the scripts engine finishes its
+ * processing.  Therefore, part of the selection processing has to be
+ * to find out what the scripts engine is doing and complete the
+ * function if necessary (i.e. process the pending disconnect or save
+ * the interrupted initial selection */
+STATIC inline __u32
+process_selection(struct Scsi_Host *host, __u32 dsp)
+{
+	__u8 id = 0;	/* Squash compiler warning */
+	int count = 0;
+	__u32 resume_offset = 0;
+	struct NCR_700_Host_Parameters *hostdata =
+		(struct NCR_700_Host_Parameters *)host->hostdata[0];
+	Scsi_Cmnd *SCp = hostdata->cmd;
+	__u8 sbcl;
+
+	for(count = 0; count < 5; count++) {
+		id = NCR_700_readb(host, SFBR_REG);
+
+		/* Take out our own ID */
+		id &= ~(1<<host->this_id);
+		if(id != 0) 
+			break;
+		udelay(5);
+	}
+	sbcl = NCR_700_readb(host, SBCL_REG);
+	if((sbcl & SBCL_IO) == 0) {
+		/* mark as having been selected rather than reselected */
+		id = 0xff;
+	} else {
+		/* convert to real ID */
+		hostdata->reselection_id = id = bitmap_to_number(id);
+		DEBUG(("scsi%d:  Reselected by %d\n",
+		       host->host_no, id));
+	}
+	if(hostdata->state == NCR_700_HOST_BUSY && SCp != NULL) {
+		struct NCR_700_command_slot *slot =
+			(struct NCR_700_command_slot *)SCp->host_scribble;
+		DEBUG(("  ID %d WARNING: RESELECTION OF BUSY HOST, saving cmd %p, slot %p, addr %x [%04x], resume %x!\n", id, hostdata->cmd, slot, dsp, dsp - hostdata->pScript, resume_offset));
+		
+		switch(dsp - hostdata->pScript) {
+		case Ent_Disconnect1:
+		case Ent_Disconnect2:
+			save_for_reselection(hostdata, SCp, Ent_Disconnect2 + hostdata->pScript);
+			break;
+		case Ent_Disconnect3:
+		case Ent_Disconnect4:
+			save_for_reselection(hostdata, SCp, Ent_Disconnect4 + hostdata->pScript);
+			break;
+		case Ent_Disconnect5:
+		case Ent_Disconnect6:
+			save_for_reselection(hostdata, SCp, Ent_Disconnect6 + hostdata->pScript);
+			break;
+		case Ent_Disconnect7:
+		case Ent_Disconnect8:
+			save_for_reselection(hostdata, SCp, Ent_Disconnect8 + hostdata->pScript);
+			break;
+		case Ent_Finish1:
+		case Ent_Finish2:
+			process_script_interrupt(A_GOOD_STATUS_AFTER_STATUS, dsp, SCp, host, hostdata);
+			break;
+			
+		default:
+			slot->state = NCR_700_SLOT_QUEUED;
+			break;
+			}
+	}
+	hostdata->state = NCR_700_HOST_BUSY;
+	hostdata->cmd = NULL;
+	hostdata->msgin[1] = 0;
+	dma_cache_wback((unsigned long)hostdata->msgin, sizeof(hostdata->msgin));
+
+	if(id == 0xff) {
+		/* Selected as target, Ignore */
+		resume_offset = hostdata->pScript + Ent_SelectedAsTarget;
+	} else if(hostdata->tag_negotiated & (1<<id)) {
+		resume_offset = hostdata->pScript + Ent_GetReselectionWithTag;
+	} else {
+		resume_offset = hostdata->pScript + Ent_GetReselectionData;
+	}
+	return resume_offset;
+}
+
+
+STATIC int
+NCR_700_start_command(Scsi_Cmnd *SCp)
+{
+	struct NCR_700_command_slot *slot =
+		(struct NCR_700_command_slot *)SCp->host_scribble;
+	struct NCR_700_Host_Parameters *hostdata =
+		(struct NCR_700_Host_Parameters *)SCp->host->hostdata[0];
+	unsigned long flags;
+	__u16 count = 1;	/* for IDENTIFY message */
+	
+	save_flags(flags);
+	cli();
+	if(hostdata->state != NCR_700_HOST_FREE) {
+		/* keep this inside the lock to close the race window where
+		 * the running command finishes on another CPU while we don't
+		 * change the state to queued on this one */
+		slot->state = NCR_700_SLOT_QUEUED;
+		restore_flags(flags);
+
+		DEBUG(("scsi%d: host busy, queueing command %p, slot %p\n",
+		       SCp->host->host_no, slot->cmnd, slot));
+		return 0;
+	}
+	hostdata->state = NCR_700_HOST_BUSY;
+	hostdata->cmd = SCp;
+	slot->state = NCR_700_SLOT_BUSY;
+	/* keep interrupts disabled until we have the command correctly
+	 * set up so we cannot take a selection interrupt */
+
+	hostdata->msgout[0] = NCR_700_identify(SCp->cmnd[0] != REQUEST_SENSE,
+					    SCp->lun);
+	/* for INQUIRY or REQUEST_SENSE commands, we cannot be sure
+	 * if the negotiated transfer parameters still hold, so
+	 * always renegotiate them */
+	if(SCp->cmnd[0] == INQUIRY || SCp->cmnd[0] == REQUEST_SENSE) {
+		NCR_700_clear_flag(SCp->device, NCR_700_DEV_NEGOTIATED_SYNC);
+	}
+
+	/* REQUEST_SENSE is asking for contingent I_T_L status.  If a
+	 * contingent allegiance condition exists, the device will
+	 * refuse all tags, so send the request sense as untagged */
+	if((hostdata->tag_negotiated & (1<<SCp->target))
+	   && (slot->tag != NCR_700_NO_TAG && SCp->cmnd[0] != REQUEST_SENSE)) {
+		hostdata->msgout[count++] = A_SIMPLE_TAG_MSG;
+		hostdata->msgout[count++] = slot->tag;
+	}
+
+	if(hostdata->fast &&
+	   NCR_700_is_flag_clear(SCp->device, NCR_700_DEV_NEGOTIATED_SYNC)) {
+		memcpy(&hostdata->msgout[count], NCR_700_SDTR_msg,
+		       sizeof(NCR_700_SDTR_msg));
+		count += sizeof(NCR_700_SDTR_msg);
+		NCR_700_set_flag(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION);
+	}
+
+	dma_cache_wback((unsigned long)hostdata->msgout, count);
+
+	script_patch_16(hostdata->script, MessageCount, count);
+
+
+	script_patch_ID(hostdata->script,
+			Device_ID, 1<<SCp->target);
+
+	script_patch_32_abs(hostdata->script, CommandAddress, 
+			virt_to_bus(SCp->cmnd));
+	script_patch_16(hostdata->script, CommandCount, SCp->cmd_len);
+	/* finally plumb the beginning of the SG list into the script
+	 * */
+	script_patch_32_abs(hostdata->script, SGScriptStartAddress,
+			    virt_to_bus(&slot->SG[0].ins));
+	NCR_700_writeb(CLR_FIFO, SCp->host, DFIFO_REG);
+
+	/* set the synchronous period/offset */
+	if(slot->resume_offset == 0)
+		slot->resume_offset = hostdata->pScript;
+	NCR_700_writeb(NCR_700_get_SXFER(SCp->device),
+	     SCp->host, SXFER_REG);
+	/* allow interrupts here so that if we're selected we can take
+	 * a selection interrupt.  The script start may not be
+	 * effective in this case, but the selection interrupt will
+	 * save our command in that case */
+	NCR_700_writel(slot->temp, SCp->host, TEMP_REG);
+	NCR_700_writel(slot->resume_offset, SCp->host, DSP_REG);
+	restore_flags(flags);
+
+	return 1;
+}
+
+void
+NCR_700_intr(int irq, void *dev_id, struct pt_regs *regs)
+{
+	struct Scsi_Host *host = (struct Scsi_Host *)dev_id;
+	struct NCR_700_Host_Parameters *hostdata =
+		(struct NCR_700_Host_Parameters *)host->hostdata[0];
+	__u8 istat;
+	__u32 resume_offset = 0;
+	__u8 pun = 0xff, lun = 0xff;
+	unsigned long flags;
+
+	/* Unfortunately, we have to take the io_request_lock here
+	 * rather than the host lock hostdata->lock because we're
+	 * looking to exclude queuecommand from messing with the
+	 * registers while we're processing the interrupt.  Since
+	 * queuecommand is called holding io_request_lock, and we have
+	 * to take io_request_lock before we call the command
+	 * scsi_done, we would get a deadlock if we took
+	 * hostdata->lock here and in queuecommand (because the order
+	 * of locking in queuecommand: 1) io_request_lock then 2)
+	 * hostdata->lock would be the reverse of taking it in this
+	 * routine */
+	spin_lock_irqsave(&io_request_lock, flags);
+	if((istat = NCR_700_readb(host, ISTAT_REG))
+	      & (SCSI_INT_PENDING | DMA_INT_PENDING)) {
+		__u32 dsps;
+		__u8 sstat0 = 0, dstat = 0;
+		__u32 dsp;
+		Scsi_Cmnd *SCp = hostdata->cmd;
+		enum NCR_700_Host_State state;
+
+		state = hostdata->state;
+		SCp = hostdata->cmd;
+
+		if(istat & SCSI_INT_PENDING) {
+			udelay(10);
+
+			sstat0 = NCR_700_readb(host, SSTAT0_REG);
+		}
+
+		if(istat & DMA_INT_PENDING) {
+			udelay(10);
+
+			dstat = NCR_700_readb(host, DSTAT_REG);
+		}
+
+		dsps = NCR_700_readl(host, DSPS_REG);
+		dsp = NCR_700_readl(host, DSP_REG);
+
+		DEBUG(("scsi%d: istat %02x sstat0 %02x dstat %02x dsp %04x[%08x] dsps 0x%x\n",
+		       host->host_no, istat, sstat0, dstat,
+		       (dsp - (__u32)virt_to_bus(hostdata->script))/4,
+		       dsp, dsps));
+
+		if(SCp != NULL) {
+			pun = SCp->target;
+			lun = SCp->lun;
+		}
+
+		if(sstat0 & SCSI_RESET_DETECTED) {
+			Scsi_Device *SDp;
+			int i;
+
+			hostdata->state = NCR_700_HOST_BUSY;
+
+			printk(KERN_ERR "scsi%d: Bus Reset detected, executing command %p, slot %p, dsp %p[%04x]\n",
+			       host->host_no, SCp, SCp == NULL ? NULL : SCp->host_scribble, (void *)dsp, dsp - hostdata->pScript);
+
+			/* clear all the negotiated parameters */
+			for(SDp = host->host_queue; SDp != NULL; SDp = SDp->next)
+				SDp->hostdata = 0;
+			
+			/* clear all the slots and their pending commands */
+			for(i = 0; i < NCR_700_COMMAND_SLOTS_PER_HOST; i++) {
+				Scsi_Cmnd *SCp;
+				struct NCR_700_command_slot *slot =
+					&hostdata->slots[i];
+
+				if(slot->state == NCR_700_SLOT_FREE)
+					continue;
+				
+				SCp = slot->cmnd;
+				printk(KERN_ERR " failing command because of reset, slot %p, cmnd %p\n",
+				       slot, SCp);
+				free_slot(slot, hostdata);
+				SCp->host_scribble = NULL;
+				NCR_700_set_depth(SCp->device, 0);
+				/* NOTE: deadlock potential here: we
+				 * rely on mid-layer guarantees that
+				 * scsi_done won't try to issue the
+				 * command again otherwise we'll
+				 * deadlock on the
+				 * hostdata->state_lock */
+				SCp->result = DID_RESET << 16;
+				SCp->scsi_done(SCp);
+			}
+			mdelay(25);
+			NCR_700_chip_setup(host);
+
+			hostdata->state = NCR_700_HOST_FREE;
+			hostdata->cmd = NULL;
+			goto out_unlock;
+		} else if(sstat0 & SELECTION_TIMEOUT) {
+			DEBUG(("scsi%d: (%d:%d) selection timeout\n",
+			       host->host_no, pun, lun));
+			NCR_700_scsi_done(hostdata, SCp, DID_NO_CONNECT<<16);
+		} else if(sstat0 & PHASE_MISMATCH) {
+			struct NCR_700_command_slot *slot = (SCp == NULL) ? NULL :
+				(struct NCR_700_command_slot *)SCp->host_scribble;
+
+			if(dsp == Ent_SendMessage + 8 + hostdata->pScript) {
+				/* It wants to reply to some part of
+				 * our message */
+#ifdef NCR_700_DEBUG
+				__u32 temp = NCR_700_readl(host, TEMP_REG);
+				int count = (hostdata->script[Ent_SendMessage/4] & 0xffffff) - ((NCR_700_readl(host, DBC_REG) & 0xffffff) + NCR_700_data_residual(host));
+				printk("scsi%d (%d:%d) PHASE MISMATCH IN SEND MESSAGE %d remain, return %p[%04x], phase %s\n", host->host_no, pun, lun, count, (void *)temp, temp - hostdata->pScript, sbcl_to_string(NCR_700_readb(host, SBCL_REG)));
+#endif
+				resume_offset = hostdata->pScript + Ent_SendMessagePhaseMismatch;
+			} else if(dsp >= virt_to_bus(&slot->SG[0].ins) &&
+				  dsp <= virt_to_bus(&slot->SG[NCR_700_SG_SEGMENTS].ins)) {
+				int data_transfer = NCR_700_readl(host, DBC_REG) & 0xffffff;
+				int SGcount = (dsp - virt_to_bus(&slot->SG[0].ins))/sizeof(struct NCR_700_SG_List);
+				int residual = NCR_700_data_residual(host);
+				int i;
+#ifdef NCR_700_DEBUG
+				printk("scsi%d: (%d:%d) Expected phase mismatch in slot->SG[%d], transferred 0x%x\n",
+				       host->host_no, pun, lun,
+				       SGcount, data_transfer);
+				print_command(SCp->cmnd);
+				if(residual) {
+					printk("scsi%d: (%d:%d) Expected phase mismatch in slot->SG[%d], transferred 0x%x, residual %d\n",
+				       host->host_no, pun, lun,
+				       SGcount, data_transfer, residual);
+				}
+#endif
+				data_transfer += residual;
+
+				if(data_transfer != 0) {
+					int count; 
+					__u32 pAddr;
+
+					SGcount--;
+
+					count = (bS_to_cpu(slot->SG[SGcount].ins) & 0x00ffffff);
+					DEBUG(("DATA TRANSFER MISMATCH, count = %d, transferred %d\n", count, count-data_transfer));
+					slot->SG[SGcount].ins &= bS_to_host(0xff000000);
+					slot->SG[SGcount].ins |= bS_to_host(data_transfer);
+					pAddr = bS_to_cpu(slot->SG[SGcount].pAddr);
+					pAddr += (count - data_transfer);
+					slot->SG[SGcount].pAddr = bS_to_host(pAddr);
+				}
+				/* set the executed moves to nops */
+				for(i=0; i<SGcount; i++) {
+					slot->SG[i].ins = bS_to_host(SCRIPT_NOP);
+					slot->SG[i].pAddr = 0;
+				}
+				dma_cache_wback((unsigned long)slot->SG, sizeof(slot->SG));
+				/* and pretend we disconnected after
+				 * the command phase */
+				resume_offset = hostdata->pScript + Ent_MsgInDuringData;
+			} else {
+				__u8 sbcl = NCR_700_readb(host, SBCL_REG);
+				printk(KERN_ERR "scsi%d: (%d:%d) phase mismatch at %04x, phase %s\n",
+				       host->host_no, pun, lun, dsp - hostdata->pScript, sbcl_to_string(sbcl));
+				NCR_700_internal_bus_reset(host);
+			}
+
+		} else if(sstat0 & SCSI_GROSS_ERROR) {
+			printk(KERN_ERR "scsi%d: (%d:%d) GROSS ERROR\n",
+			       host->host_no, pun, lun);
+			NCR_700_scsi_done(hostdata, SCp, DID_ERROR<<16);
+		} else if(dstat & SCRIPT_INT_RECEIVED) {
+			DEBUG(("scsi%d: (%d:%d) ====>SCRIPT INTERRUPT<====\n",
+			       host->host_no, pun, lun));
+			resume_offset = process_script_interrupt(dsps, dsp, SCp, host, hostdata);
+		} else if(dstat & (ILGL_INST_DETECTED)) {
+			printk(KERN_ERR "scsi%d: (%d:%d) Illegal Instruction detected at 0x%p[0x%x]!!!\n"
+			       "         Please email James.Bottomley@HansenPartnership.com with the details\n",
+			       host->host_no, pun, lun,
+			       (void *)dsp, dsp - hostdata->pScript);
+			NCR_700_scsi_done(hostdata, SCp, DID_ERROR<<16);
+		} else if(dstat & (WATCH_DOG_INTERRUPT|ABORTED)) {
+			printk(KERN_ERR "scsi%d: (%d:%d) serious DMA problem, dstat=%02x\n",
+			       host->host_no, pun, lun, dstat);
+			NCR_700_scsi_done(hostdata, SCp, DID_ERROR<<16);
+		}
+
+		
+		/* NOTE: selection interrupt processing MUST occur
+		 * after script interrupt processing to correctly cope
+		 * with the case where we process a disconnect and
+		 * then get reselected before we process the
+		 * disconnection */
+		if(sstat0 & SELECTED) {
+			/* FIXME: It currently takes at least FOUR
+			 * interrupts to complete a command that
+			 * disconnects: one for the disconnect, one
+			 * for the reselection, one to get the
+			 * reselection data and one to complete the
+			 * command.  If we guess the reselected
+			 * command here and prepare it, we only need
+			 * to get a reselection data interrupt if we
+			 * guessed wrongly.  Since the interrupt
+			 * overhead is much greater than the command
+			 * setup, this would be an efficient
+			 * optimisation particularly as we probably
+			 * only have one outstanding command on a
+			 * target most of the time */
+
+			resume_offset = process_selection(host, dsp);
+
+		}
+
+	}
+
+	if(resume_offset) {
+		if(hostdata->state != NCR_700_HOST_BUSY) {
+			printk(KERN_ERR "scsi%d: Driver error: resume at %p [%04x] with non busy host!\n",
+			       host->host_no, (void *)resume_offset, resume_offset - hostdata->pScript);
+			hostdata->state = NCR_700_HOST_BUSY;
+		}
+
+		DEBUG(("Attempting to resume at %x\n", resume_offset));
+		NCR_700_writeb(CLR_FIFO, host, DFIFO_REG);
+		NCR_700_writel(resume_offset, host, DSP_REG);
+	} 
+	/* There is probably a technical no-no about this: If we're a
+	 * shared interrupt and we got this interrupt because the
+	 * other device needs servicing not us, we're still going to
+	 * check our queued commands here---of course, there shouldn't
+	 * be any outstanding.... */
+	if(hostdata->state == NCR_700_HOST_FREE) {
+		int i;
+
+		for(i = 0; i < NCR_700_COMMAND_SLOTS_PER_HOST; i++) {
+			/* fairness: always run the queue from the last
+			 * position we left off */
+			int j = (i + hostdata->saved_slot_position)
+				% NCR_700_COMMAND_SLOTS_PER_HOST;
+			
+			if(hostdata->slots[j].state != NCR_700_SLOT_QUEUED)
+				continue;
+			if(NCR_700_start_command(hostdata->slots[j].cmnd)) {
+				DEBUG(("scsi%d: Issuing saved command slot %p, cmd %p\t\n",
+				       host->host_no, &hostdata->slots[j],
+				       hostdata->slots[j].cmnd));
+				hostdata->saved_slot_position = j + 1;
+			}
+
+			break;
+		}
+	}
+ out_unlock:
+	spin_unlock_irqrestore(&io_request_lock, flags);
+}
+
+/* FIXME: Need to put some proc information in and plumb it
+ * into the scsi proc system */
+STATIC int
+NCR_700_proc_directory_info(char *proc_buf, char **startp,
+			 off_t offset, int bytes_available,
+			 int host_no, int write)
+{
+	static char buf[4096];	/* 1 page should be sufficient */
+	int len = 0;
+	struct Scsi_Host *host = scsi_hostlist;
+	struct NCR_700_Host_Parameters *hostdata;
+	Scsi_Device *SDp;
+
+	while(host != NULL && host->host_no != host_no)
+		host = host->next;
+
+	if(host == NULL)
+		return 0;
+
+	if(write) {
+		/* FIXME: Clear internal statistics here */
+		return 0;
+	}
+	hostdata = (struct NCR_700_Host_Parameters *)host->hostdata[0];
+	len += sprintf(&buf[len], "Total commands outstanding: %d\n", hostdata->command_slot_count);
+	len += sprintf(&buf[len],"\
+Target	Depth  Active  Next Tag\n\
+======	=====  ======  ========\n");
+	for(SDp = host->host_queue; SDp != NULL; SDp = SDp->next) {
+		len += sprintf(&buf[len]," %2d:%2d   %4d    %4d      %4d\n", SDp->id, SDp->lun, SDp->queue_depth, NCR_700_get_depth(SDp), SDp->current_tag);
+	}
+	if((len -= offset) <= 0)
+		return 0;
+	if(len > bytes_available)
+		len = bytes_available;
+	memcpy(proc_buf, buf + offset, len);
+	return len;
+}
+
+STATIC int
+NCR_700_queuecommand(Scsi_Cmnd *SCp, void (*done)(Scsi_Cmnd *))
+{
+	struct NCR_700_Host_Parameters *hostdata = 
+		(struct NCR_700_Host_Parameters *)SCp->host->hostdata[0];
+	__u32 move_ins;
+	struct NCR_700_command_slot *slot;
+	int hash;
+
+	if(hostdata->command_slot_count >= NCR_700_COMMAND_SLOTS_PER_HOST) {
+		/* We're over our allocation, this should never happen
+		 * since we report the max allocation to the mid layer */
+		printk(KERN_WARNING "scsi%d: Command depth has gone over queue depth\n", SCp->host->host_no);
+		return 1;
+	}
+	if(NCR_700_get_depth(SCp->device) != 0 && !(hostdata->tag_negotiated & (1<<SCp->target))) {
+		DEBUG((KERN_ERR "scsi%d (%d:%d) has non zero depth %d\n",
+		       SCp->host->host_no, SCp->target, SCp->lun,
+		       NCR_700_get_depth(SCp->device)));
+		return 1;
+	}
+	if(NCR_700_get_depth(SCp->device) >= NCR_700_MAX_TAGS) {
+		DEBUG((KERN_ERR "scsi%d (%d:%d) has max tag depth %d\n",
+		       SCp->host->host_no, SCp->target, SCp->lun,
+		       NCR_700_get_depth(SCp->device)));
+		return 1;
+	}
+	NCR_700_set_depth(SCp->device, NCR_700_get_depth(SCp->device) + 1);
+
+	/* begin the command here */
+	/* no need to check for NULL, test for command_slot_cound above
+	 * ensures a slot is free */
+	slot = find_empty_slot(hostdata);
+
+	slot->cmnd = SCp;
+
+	SCp->scsi_done = done;
+	SCp->host_scribble = (unsigned char *)slot;
+	SCp->SCp.ptr = NULL;
+	SCp->SCp.buffer = NULL;
+
+#ifdef NCR_700_DEBUG
+	printk("53c700: scsi%d, command ", SCp->host->host_no);
+	print_command(SCp->cmnd);
+#endif
+
+	if(hostdata->tag_negotiated &(1<<SCp->target)) {
+
+		struct NCR_700_command_slot *old =
+			find_ITL_Nexus(hostdata, SCp->target, SCp->lun);
+#ifdef NCR_700_TAG_DEBUG
+		struct NCR_700_command_slot *found;
+#endif
+		
+		if(old != NULL && old->tag == SCp->device->current_tag) {
+			printk(KERN_WARNING "scsi%d (%d:%d) Tag clock back to current, queueing\n", SCp->host->host_no, SCp->target, SCp->lun);
+			return 1;
+		}
+		slot->tag = SCp->device->current_tag++;
+#ifdef NCR_700_TAG_DEBUG
+		while((found = find_ITLQ_Nexus(hostdata, SCp->target, SCp->lun, slot->tag)) != NULL) {
+			printk("\n\n**ERROR** already using tag %d, but oldest is %d\n", slot->tag, (old == NULL) ? -1 : old->tag);
+			printk("  FOUND = %p, tag = %d, pun = %d, lun = %d\n",
+			       found, found->tag, found->cmnd->target, found->cmnd->lun);
+			slot->tag = SCp->device->current_tag++;
+			printk("   Tag list is: ");
+			while(old != NULL) {
+				if(old->cmnd->target == SCp->target &&
+				   old->cmnd->lun == SCp->lun)
+					printk("%d ", old->tag);
+				old = old->ITL_back;
+			}
+			printk("\n\n");
+		}
+#endif
+		hash = hash_ITLQ(SCp->target, SCp->lun, slot->tag);
+		/* link into the ITLQ hash queues */
+		slot->ITLQ_forw = hostdata->ITLQ_Hash_forw[hash];
+		hostdata->ITLQ_Hash_forw[hash] = slot;
+#ifdef NCR_700_TAG_DEBUG
+		if(slot->ITLQ_forw != NULL && slot->ITLQ_forw->ITLQ_back != NULL) {
+			printk(KERN_ERR "scsi%d (%d:%d) ITLQ_back is not NULL!!!!\n", SCp->host->host_no, SCp->target, SCp->lun);
+		}
+#endif
+		if(slot->ITLQ_forw != NULL)
+			slot->ITLQ_forw->ITLQ_back = slot;
+		else
+			hostdata->ITLQ_Hash_back[hash] = slot;
+		slot->ITLQ_back = NULL;
+	} else {
+		slot->tag = NCR_700_NO_TAG;
+	}
+	/* link into the ITL hash queues */
+	hash = hash_ITL(SCp->target, SCp->lun);
+	slot->ITL_forw = hostdata->ITL_Hash_forw[hash];
+	hostdata->ITL_Hash_forw[hash] = slot;
+#ifdef NCR_700_TAG_DEBUG
+	if(slot->ITL_forw != NULL && slot->ITL_forw->ITL_back != NULL) {
+		printk(KERN_ERR "scsi%d (%d:%d) ITL_back is not NULL!!!!\n",
+		       SCp->host->host_no, SCp->target, SCp->lun);
+	}
+#endif
+	if(slot->ITL_forw != NULL)
+		slot->ITL_forw->ITL_back = slot;
+	else
+		hostdata->ITL_Hash_back[hash] = slot;
+	slot->ITL_back = NULL;
+
+		
+	/* This is f****g ridiculous; every low level HBA driver has
+	 * to determine the direction of the commands, why isn't this
+	 * done inside the scsi_lib !!??? */
+	switch (SCp->cmnd[0]) {
+	case REQUEST_SENSE:
+		/* clear the internal sense magic */
+		SCp->cmnd[6] = 0;
+		/* fall through */
+	case INQUIRY:
+	case MODE_SENSE:
+	case READ_6:
+	case READ_10:
+	case READ_12:
+	case READ_CAPACITY:
+	case READ_BLOCK_LIMITS:
+	case READ_TOC:
+		move_ins = SCRIPT_MOVE_DATA_IN;
+		break;
+	case MODE_SELECT:
+	case WRITE_6:
+	case WRITE_10:
+	case WRITE_12:
+		move_ins = SCRIPT_MOVE_DATA_OUT;
+		break;
+	case TEST_UNIT_READY:
+	case ALLOW_MEDIUM_REMOVAL:
+	case START_STOP:
+		move_ins = 0;
+		break;
+	default:
+		/* OK, get it from the command */
+		switch(SCp->sc_data_direction) {
+		case SCSI_DATA_UNKNOWN:
+		default:
+			printk(KERN_ERR "53c700: Unknown command for data direction ");
+			print_command(SCp->cmnd);
+			
+			move_ins = 0;
+			break;
+		case SCSI_DATA_NONE:
+			move_ins = 0;
+			break;
+		case SCSI_DATA_READ:
+			move_ins = SCRIPT_MOVE_DATA_IN;
+			break;
+		case SCSI_DATA_WRITE:
+			move_ins = SCRIPT_MOVE_DATA_OUT;
+			break;
+		}
+	}
+
+	/* now build the scatter gather list */
+	if(move_ins != 0) {
+		int i;
+
+		for(i = 0; i < (SCp->use_sg ? SCp->use_sg : 1); i++) {
+			void *vPtr;
+			__u32 count;
+
+			if(SCp->use_sg) {
+				vPtr = (((struct scatterlist *)SCp->buffer)[i].address);
+				count = ((struct scatterlist *)SCp->buffer)[i].length;
+			} else {
+				vPtr = SCp->request_buffer;
+				count = SCp->request_bufflen;
+			}
+			slot->SG[i].ins = bS_to_host(move_ins | count);
+			DEBUG((" scatter block %d: move %d[%08x] from 0x%lx\n",
+			       i, count, slot->SG[i].ins, 
+			       virt_to_bus(vPtr)));
+			dma_cache_wback_inv((unsigned long)vPtr, count);
+			slot->SG[i].pAddr = bS_to_host(virt_to_bus(vPtr));
+		}
+		slot->SG[i].ins = bS_to_host(SCRIPT_RETURN);
+		slot->SG[i].pAddr = 0;
+		dma_cache_wback((unsigned long)slot->SG, sizeof(slot->SG));
+		DEBUG((" SETTING %08lx to %x\n",
+		       virt_to_bus(&slot->SG[i].ins), 
+		       slot->SG[i].ins));
+	}
+	slot->resume_offset = 0;
+	NCR_700_start_command(SCp);
+	return 0;
+}
+
+STATIC int
+NCR_700_abort(Scsi_Cmnd * SCp)
+{
+	struct NCR_700_command_slot *slot;
+	struct NCR_700_Host_Parameters *hostdata = 
+		(struct NCR_700_Host_Parameters *)SCp->host->hostdata[0];
+
+	printk(KERN_INFO "scsi%d (%d:%d) New error handler wants to abort command\n\t",
+	       SCp->host->host_no, SCp->target, SCp->lun);
+	print_command(SCp->cmnd);
+
+	slot = find_ITL_Nexus(hostdata, SCp->target, SCp->lun);
+	while(slot != NULL && slot->cmnd != SCp)
+		slot = slot->ITL_back;
+
+	if(slot == NULL)
+		/* no outstanding command to abort */
+		return SUCCESS;
+	if(SCp->cmnd[0] == TEST_UNIT_READY) {
+		/* FIXME: This is because of a problem in the new
+		 * error handler.  When it is in error recovery, it
+		 * will send a TUR to a device it thinks may still be
+		 * showing a problem.  If the TUR isn't responded to,
+		 * it will abort it and mark the device off line.
+		 * Unfortunately, it does no other error recovery, so
+		 * this would leave us with an outstanding command
+		 * occupying a slot.  Rather than allow this to
+		 * happen, we issue a bus reset to force all
+		 * outstanding commands to terminate here. */
+		NCR_700_internal_bus_reset(SCp->host);
+		/* still drop through and return failed */
+	}
+	return FAILED;
+
+}
+
+STATIC int
+NCR_700_bus_reset(Scsi_Cmnd * SCp)
+{
+	printk(KERN_INFO "scsi%d (%d:%d) New error handler wants BUS reset, cmd %p\n\t",
+	       SCp->host->host_no, SCp->target, SCp->lun, SCp);
+	print_command(SCp->cmnd);
+	NCR_700_internal_bus_reset(SCp->host);
+	return SUCCESS;
+}
+
+STATIC int
+NCR_700_dev_reset(Scsi_Cmnd * SCp)
+{
+	printk(KERN_INFO "scsi%d (%d:%d) New error handler wants device reset\n\t",
+	       SCp->host->host_no, SCp->target, SCp->lun);
+	print_command(SCp->cmnd);
+	
+	return FAILED;
+}
+
+STATIC int
+NCR_700_host_reset(Scsi_Cmnd * SCp)
+{
+	printk(KERN_INFO "scsi%d (%d:%d) New error handler wants HOST reset\n\t",
+	       SCp->host->host_no, SCp->target, SCp->lun);
+	print_command(SCp->cmnd);
+
+	NCR_700_internal_bus_reset(SCp->host);
+	NCR_700_chip_reset(SCp->host);
+	return SUCCESS;
+}
+
+EXPORT_SYMBOL(NCR_700_detect);
+EXPORT_SYMBOL(NCR_700_release);
+EXPORT_SYMBOL(NCR_700_intr);
diff -urN linux-2.4.10-pre6/drivers/scsi/53c700.c linux/drivers/scsi/53c700.c
--- linux-2.4.10-pre6/drivers/scsi/53c700.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/53c700.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,1840 @@
+/* -*- mode: c; c-basic-offset: 8 -*- */
+
+/* NCR (or Symbios) 53c700 and 53c700-66 Driver
+ *
+ * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
+**-----------------------------------------------------------------------------
+**  
+**  This program is free software; you can redistribute it and/or modify
+**  it under the terms of the GNU General Public License as published by
+**  the Free Software Foundation; either version 2 of the License, or
+**  (at your option) any later version.
+**
+**  This program is distributed in the hope that it will be useful,
+**  but WITHOUT ANY WARRANTY; without even the implied warranty of
+**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+**  GNU General Public License for more details.
+**
+**  You should have received a copy of the GNU General Public License
+**  along with this program; if not, write to the Free Software
+**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+**
+**-----------------------------------------------------------------------------
+ */
+
+/* Notes:
+ *
+ * This driver is designed exclusively for these chips (virtually the
+ * earliest of the scripts engine chips).  They need their own drivers
+ * because they are missing so many of the scripts and snazzy register
+ * features of their elder brothers (the 710, 720 and 770).
+ *
+ * The 700 is the lowliest of the line, it can only do async SCSI.
+ * The 700-66 can at least do synchronous SCSI up to 10MHz.
+ * 
+ * The 700 chip has no host bus interface logic of its own.  However,
+ * it is usually mapped to a location with well defined register
+ * offsets.  Therefore, if you can determine the base address and the
+ * irq your board incorporating this chip uses, you can probably use
+ * this driver to run it (although you'll probably have to write a
+ * minimal wrapper for the purpose---see the NCR_D700 driver for
+ * details about how to do this).
+ *
+ *
+ * TODO List:
+ *
+ * 1. Better statistics in the proc fs
+ *
+ * 2. Implement message queue (queues SCSI messages like commands) and make
+ *    the abort and device reset functions use them.
+ * */
+
+/* CHANGELOG
+ *
+ * Version 2.3
+ *
+ * More endianness/cache coherency changes.
+ *
+ * Better bad device handling (handles devices lying about tag
+ * queueing support and devices which fail to provide sense data on
+ * contingent allegiance conditions)
+ *
+ * Many thanks to Richard Hirst <rhirst@linuxcare.com> for patiently
+ * debugging this driver on the parisc architecture and suggesting
+ * many improvements and bug fixes.
+ *
+ * Thanks also go to Linuxcare Inc. for providing several PARISC
+ * machines for me to debug the driver on.
+ *
+ * Version 2.2
+ *
+ * Made the driver mem or io mapped; added endian invariance; added
+ * dma cache flushing operations for architectures which need it;
+ * added support for more varied clocking speeds.
+ *
+ * Version 2.1
+ *
+ * Initial modularisation from the D700.  See NCR_D700.c for the rest of
+ * the changelog.
+ * */
+#define NCR_700_VERSION "2.3"
+
+#include <linux/config.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/sched.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/mca.h>
+#include <asm/dma.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/byteorder.h>
+#include <linux/blk.h>
+#include <linux/module.h>
+
+#include "scsi.h"
+#include "hosts.h"
+#include "constants.h"
+
+#include "53c700.h"
+
+#ifdef NCR_700_DEBUG
+#define STATIC
+#else
+#define STATIC static
+#endif
+
+MODULE_AUTHOR("James Bottomley");
+MODULE_DESCRIPTION("53c700 and 53c700-66 Driver");
+MODULE_LICENSE("GPL");
+
+/* This is the script */
+#include "53c700_d.h"
+
+
+STATIC int NCR_700_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
+STATIC int NCR_700_abort(Scsi_Cmnd * SCpnt);
+STATIC int NCR_700_bus_reset(Scsi_Cmnd * SCpnt);
+STATIC int NCR_700_dev_reset(Scsi_Cmnd * SCpnt);
+STATIC int NCR_700_host_reset(Scsi_Cmnd * SCpnt);
+STATIC int NCR_700_proc_directory_info(char *, char **, off_t, int, int, int);
+STATIC void NCR_700_chip_setup(struct Scsi_Host *host);
+STATIC void NCR_700_chip_reset(struct Scsi_Host *host);
+
+static char *NCR_700_phase[] = {
+	"",
+	"after selection",
+	"before command phase",
+	"after command phase",
+	"after status phase",
+	"after data in phase",
+	"after data out phase",
+	"during data phase",
+};
+
+static char *NCR_700_condition[] = {
+	"",
+	"NOT MSG_OUT",
+	"UNEXPECTED PHASE",
+	"NOT MSG_IN",
+	"UNEXPECTED MSG",
+	"MSG_IN",
+	"SDTR_MSG RECEIVED",
+	"REJECT_MSG RECEIVED",
+	"DISCONNECT_MSG RECEIVED",
+	"MSG_OUT",
+	"DATA_IN",
+	
+};
+
+static char *NCR_700_fatal_messages[] = {
+	"unexpected message after reselection",
+	"still MSG_OUT after message injection",
+	"not MSG_IN after selection",
+	"Illegal message length received",
+};
+
+static char *NCR_700_SBCL_bits[] = {
+	"IO ",
+	"CD ",
+	"MSG ",
+	"ATN ",
+	"SEL ",
+	"BSY ",
+	"ACK ",
+	"REQ ",
+};
+
+static char *NCR_700_SBCL_to_phase[] = {
+	"DATA_OUT",
+	"DATA_IN",
+	"CMD_OUT",
+	"STATE",
+	"ILLEGAL PHASE",
+	"ILLEGAL PHASE",
+	"MSG OUT",
+	"MSG IN",
+};
+
+static __u8 NCR_700_SDTR_msg[] = {
+	0x01,			/* Extended message */
+	0x03,			/* Extended message Length */
+	0x01,			/* SDTR Extended message */
+	NCR_700_MIN_PERIOD,
+	NCR_700_MAX_OFFSET
+};
+
+struct Scsi_Host * __init
+NCR_700_detect(Scsi_Host_Template *tpnt,
+	       struct NCR_700_Host_Parameters *hostdata)
+{
+	__u32 *script = kmalloc(sizeof(SCRIPT), GFP_KERNEL);
+	__u32 pScript;
+	struct Scsi_Host *host;
+	static int banner = 0;
+	int j;
+
+	/* Fill in the missing routines from the host template */
+	tpnt->queuecommand = NCR_700_queuecommand;
+	tpnt->eh_abort_handler = NCR_700_abort;
+	tpnt->eh_device_reset_handler = NCR_700_dev_reset;
+	tpnt->eh_bus_reset_handler = NCR_700_bus_reset;
+	tpnt->eh_host_reset_handler = NCR_700_host_reset;
+	tpnt->can_queue = NCR_700_COMMAND_SLOTS_PER_HOST;
+	tpnt->sg_tablesize = NCR_700_SG_SEGMENTS;
+	tpnt->cmd_per_lun = NCR_700_MAX_TAGS;
+	tpnt->use_clustering = DISABLE_CLUSTERING;
+	tpnt->use_new_eh_code = 1;
+	tpnt->proc_info = NCR_700_proc_directory_info;
+	
+	if(tpnt->name == NULL)
+		tpnt->name = "53c700";
+	if(tpnt->proc_name == NULL)
+		tpnt->proc_name = "53c700";
+	
+
+	if((host = scsi_register(tpnt, 4)) == NULL)
+		return NULL;
+	if(script == NULL) {
+		printk(KERN_ERR "53c700: Failed to allocate script, detatching\n");
+		scsi_unregister(host);
+		return NULL;
+	}
+
+	hostdata->slots = kmalloc(sizeof(struct NCR_700_command_slot) * NCR_700_COMMAND_SLOTS_PER_HOST, GFP_KERNEL);
+	if(hostdata->slots == NULL) {
+		printk(KERN_ERR "53c700: Failed to allocate command slots, detatching\n");
+		scsi_unregister(host);
+		return NULL;
+	}
+	memset(hostdata->slots, 0, sizeof(struct NCR_700_command_slot) * NCR_700_COMMAND_SLOTS_PER_HOST);
+	for(j = 0; j < NCR_700_COMMAND_SLOTS_PER_HOST; j++) {
+		if(j == 0)
+			hostdata->free_list = &hostdata->slots[j];
+		else
+			hostdata->slots[j-1].ITL_forw = &hostdata->slots[j];
+		hostdata->slots[j].state = NCR_700_SLOT_FREE;
+	}
+	host->hostdata[0] = (__u32)hostdata;
+	for(j = 0; j < sizeof(SCRIPT)/sizeof(SCRIPT[0]); j++) {
+		script[j] = bS_to_host(SCRIPT[j]);
+	}
+	/* bus physical address of script */
+	pScript = virt_to_bus(script);
+	/* adjust all labels to be bus physical */
+	for(j = 0; j < PATCHES; j++) {
+		script[LABELPATCHES[j]] = bS_to_host(pScript + SCRIPT[LABELPATCHES[j]]);
+	}
+	/* now patch up fixed addresses */
+	script_patch_32(script, MessageLocation,
+			virt_to_bus(&hostdata->msgout[0]));
+	script_patch_32(script, StatusAddress,
+			virt_to_bus(&hostdata->status));
+	script_patch_32(script, ReceiveMsgAddress,
+			virt_to_bus(&hostdata->msgin[0]));
+
+	hostdata->script = script;
+	hostdata->pScript = pScript;
+	hostdata->state = NCR_700_HOST_FREE;
+	spin_lock_init(&hostdata->lock);
+	hostdata->cmd = NULL;
+	host->max_id = 7;
+	host->max_lun = NCR_700_MAX_LUNS;
+	host->unique_id = hostdata->base;
+	host->base = hostdata->base;
+	host->hostdata[0] = (unsigned long)hostdata;
+	/* kick the chip */
+	NCR_700_writeb(0xff, host, CTEST9_REG);
+	hostdata->rev = (NCR_700_readb(host, CTEST7_REG)<<4) & 0x0f;
+	hostdata->fast = (NCR_700_readb(host, CTEST9_REG) == 0);
+	if(banner == 0) {
+		printk(KERN_NOTICE "53c700: Version " NCR_700_VERSION " By James.Bottomley@HansenPartnership.com\n");
+		banner = 1;
+	}
+	printk(KERN_NOTICE "scsi%d: %s rev %d %s\n", host->host_no,
+	       hostdata->fast ? "53c700-66" : "53c700",
+	       hostdata->rev, hostdata->differential ?
+	       "(Differential)" : "");
+	/* reset the chip */
+	NCR_700_chip_reset(host);
+	NCR_700_writeb(ASYNC_OPERATION , host, SXFER_REG);
+
+	return host;
+}
+
+int
+NCR_700_release(struct Scsi_Host *host)
+{
+	struct NCR_700_Host_Parameters *hostdata = 
+		(struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+	kfree(hostdata->script);
+	return 1;
+}
+
+static inline __u8
+NCR_700_identify(int can_disconnect, __u8 lun)
+{
+	return IDENTIFY_BASE |
+		((can_disconnect) ? 0x40 : 0) |
+		(lun & NCR_700_LUN_MASK);
+}
+
+/*
+ * Function : static int datapath_residual (Scsi_Host *host)
+ *
+ * Purpose : return residual data count of what's in the chip.  If you
+ * really want to know what this function is doing, it's almost a
+ * direct transcription of the algorithm described in the 53c710
+ * guide, except that the DBC and DFIFO registers are only 6 bits
+ * wide.
+ *
+ * Inputs : host - SCSI host */
+static inline int
+NCR_700_data_residual (struct Scsi_Host *host) {
+	int count, synchronous;
+	unsigned int ddir;
+
+	count = ((NCR_700_readb(host, DFIFO_REG) & 0x3f) -
+		 (NCR_700_readl(host, DBC_REG) & 0x3f)) & 0x3f;
+	
+	synchronous = NCR_700_readb(host, SXFER_REG) & 0x0f;
+	
+	/* get the data direction */
+	ddir = NCR_700_readb(host, CTEST0_REG) & 0x01;
+
+	if (ddir) {
+		/* Receive */
+		if (synchronous) 
+			count += (NCR_700_readb(host, SSTAT2_REG) & 0xf0) >> 4;
+		else
+			if (NCR_700_readb(host, SSTAT1_REG) & SIDL_REG_FULL)
+				++count;
+	} else {
+		/* Send */
+		__u8 sstat = NCR_700_readb(host, SSTAT1_REG);
+		if (sstat & SODL_REG_FULL)
+			++count;
+		if (synchronous && (sstat & SODR_REG_FULL))
+			++count;
+	}
+	return count;
+}
+
+/* print out the SCSI wires and corresponding phase from the SBCL register
+ * in the chip */
+static inline char *
+sbcl_to_string(__u8 sbcl)
+{
+	int i;
+	static char ret[256];
+
+	ret[0]='\0';
+	for(i=0; i<8; i++) {
+		if((1<<i) & sbcl) 
+			strcat(ret, NCR_700_SBCL_bits[i]);
+	}
+	strcat(ret, NCR_700_SBCL_to_phase[sbcl & 0x07]);
+	return ret;
+}
+
+static inline __u8
+bitmap_to_number(__u8 bitmap)
+{
+	__u8 i;
+
+	for(i=0; i<8 && !(bitmap &(1<<i)); i++)
+		;
+	return i;
+}
+
+/* Pull a slot off the free list */
+STATIC struct NCR_700_command_slot *
+find_empty_slot(struct NCR_700_Host_Parameters *hostdata)
+{
+	struct NCR_700_command_slot *slot = hostdata->free_list;
+
+	if(slot == NULL) {
+		/* sanity check */
+		if(hostdata->command_slot_count != NCR_700_COMMAND_SLOTS_PER_HOST)
+			printk(KERN_ERR "SLOTS FULL, but count is %d, should be %d\n", hostdata->command_slot_count, NCR_700_COMMAND_SLOTS_PER_HOST);
+		return NULL;
+	}
+
+	if(slot->state != NCR_700_SLOT_FREE)
+		/* should panic! */
+		printk(KERN_ERR "BUSY SLOT ON FREE LIST!!!\n");
+		
+
+	hostdata->free_list = slot->ITL_forw;
+	slot->ITL_forw = NULL;
+
+
+	/* NOTE: set the state to busy here, not queued, since this
+	 * indicates the slot is in use and cannot be run by the IRQ
+	 * finish routine.  If we cannot queue the command when it
+	 * is properly build, we then change to NCR_700_SLOT_QUEUED */
+	slot->state = NCR_700_SLOT_BUSY;
+	hostdata->command_slot_count++;
+	
+	return slot;
+}
+
+STATIC void 
+free_slot(struct NCR_700_command_slot *slot,
+	  struct NCR_700_Host_Parameters *hostdata)
+{
+	int hash;
+	struct NCR_700_command_slot **forw, **back;
+
+
+	if((slot->state & NCR_700_SLOT_MASK) != NCR_700_SLOT_MAGIC) {
+		printk(KERN_ERR "53c700: SLOT %p is not MAGIC!!!\n", slot);
+	}
+	if(slot->state == NCR_700_SLOT_FREE) {
+		printk(KERN_ERR "53c700: SLOT %p is FREE!!!\n", slot);
+	}
+	/* remove from queues */
+	if(slot->tag != NCR_700_NO_TAG) {
+		hash = hash_ITLQ(slot->cmnd->target, slot->cmnd->lun,
+				 slot->tag);
+		if(slot->ITLQ_forw == NULL)
+			back = &hostdata->ITLQ_Hash_back[hash];
+		else
+			back = &slot->ITLQ_forw->ITLQ_back;
+
+		if(slot->ITLQ_back == NULL)
+			forw = &hostdata->ITLQ_Hash_forw[hash];
+		else
+			forw = &slot->ITLQ_back->ITLQ_forw;
+
+		*forw = slot->ITLQ_forw;
+		*back = slot->ITLQ_back;
+	}
+	hash = hash_ITL(slot->cmnd->target, slot->cmnd->lun);
+	if(slot->ITL_forw == NULL)
+		back = &hostdata->ITL_Hash_back[hash];
+	else
+		back = &slot->ITL_forw->ITL_back;
+	
+	if(slot->ITL_back == NULL)
+		forw = &hostdata->ITL_Hash_forw[hash];
+	else
+		forw = &slot->ITL_back->ITL_forw;
+	
+	*forw = slot->ITL_forw;
+	*back = slot->ITL_back;
+	
+	slot->resume_offset = 0;
+	slot->cmnd = NULL;
+	slot->state = NCR_700_SLOT_FREE;
+	slot->ITL_forw = hostdata->free_list;
+	hostdata->free_list = slot;
+	hostdata->command_slot_count--;
+}
+
+
+/* This routine really does very little.  The command is indexed on
+   the ITL and (if tagged) the ITLQ lists in _queuecommand */
+STATIC void
+save_for_reselection(struct NCR_700_Host_Parameters *hostdata,
+		     Scsi_Cmnd *SCp, __u32 dsp)
+{
+	/* Its just possible that this gets executed twice */
+	if(SCp != NULL) {
+		struct NCR_700_command_slot *slot =
+			(struct NCR_700_command_slot *)SCp->host_scribble;
+
+		slot->resume_offset = dsp;
+	}
+	hostdata->state = NCR_700_HOST_FREE;
+	hostdata->cmd = NULL;
+}
+
+/* Most likely nexus is the oldest in each case */
+STATIC inline struct NCR_700_command_slot *
+find_ITL_Nexus(struct NCR_700_Host_Parameters *hostdata, __u8 pun, __u8 lun)
+{
+	int hash = hash_ITL(pun, lun);
+	struct NCR_700_command_slot *slot = hostdata->ITL_Hash_back[hash];
+	while(slot != NULL && !(slot->cmnd->target == pun &&
+				slot->cmnd->lun == lun))
+		slot = slot->ITL_back;
+	return slot;
+}
+
+STATIC inline struct NCR_700_command_slot *
+find_ITLQ_Nexus(struct NCR_700_Host_Parameters *hostdata, __u8 pun,
+		__u8 lun, __u8 tag)
+{
+	int hash = hash_ITLQ(pun, lun, tag);
+	struct NCR_700_command_slot *slot = hostdata->ITLQ_Hash_back[hash];
+
+	while(slot != NULL && !(slot->cmnd->target == pun 
+	      && slot->cmnd->lun == lun && slot->tag == tag))
+		slot = slot->ITLQ_back;
+
+#ifdef NCR_700_TAG_DEBUG
+	if(slot != NULL) {
+		struct NCR_700_command_slot *n = slot->ITLQ_back;
+		while(n != NULL && n->cmnd->target != pun
+		      && n->cmnd->lun != lun && n->tag != tag)
+			n = n->ITLQ_back;
+
+		if(n != NULL && n->cmnd->target == pun && n->cmnd->lun == lun
+		   && n->tag == tag) {
+			printk(KERN_WARNING "53c700: WARNING: DUPLICATE tag %d\n",
+			       tag);
+		}
+	}
+#endif
+	return slot;
+}
+
+
+
+/* This translates the SDTR message offset and period to a value
+ * which can be loaded into the SXFER_REG.
+ *
+ * NOTE: According to SCSI-2, the true transfer period (in ns) is
+ *       actually four times this period value */
+STATIC inline __u8
+NCR_700_offset_period_to_sxfer(struct NCR_700_Host_Parameters *hostdata,
+			       __u8 offset, __u8 period)
+{
+	int XFERP;
+
+	if(period*4 < NCR_700_MIN_PERIOD) {
+		printk(KERN_WARNING "53c700: Period %dns is less than SCSI-2 minimum, setting to %d\n", period*4, NCR_700_MIN_PERIOD);
+		period = NCR_700_MIN_PERIOD/4;
+	}
+	XFERP = (period*4 * hostdata->sync_clock)/1000 - 4;
+	if(offset > NCR_700_MAX_OFFSET) {
+		printk(KERN_WARNING "53c700: Offset %d exceeds maximum, setting to %d\n",
+		       offset, NCR_700_MAX_OFFSET);
+		offset = NCR_700_MAX_OFFSET;
+	}
+	if(XFERP < NCR_700_MIN_XFERP) {
+		printk(KERN_WARNING "53c700: XFERP %d is less than minium, setting to %d\n",
+		       XFERP,  NCR_700_MIN_XFERP);
+		XFERP =  NCR_700_MIN_XFERP;
+	}
+	return (offset & 0x0f) | (XFERP & 0x07)<<4;
+}
+	
+
+STATIC inline void
+NCR_700_scsi_done(struct NCR_700_Host_Parameters *hostdata,
+	       Scsi_Cmnd *SCp, int result)
+{
+	hostdata->state = NCR_700_HOST_FREE;
+	hostdata->cmd = NULL;
+
+	if(SCp != NULL) {
+		struct NCR_700_command_slot *slot = 
+			(struct NCR_700_command_slot *)SCp->host_scribble;
+
+		if(SCp->cmnd[0] == REQUEST_SENSE && SCp->cmnd[6] == NCR_700_INTERNAL_SENSE_MAGIC) {
+#ifdef NCR_700_DEBUG
+			printk(" ORIGINAL CMD %p RETURNED %d, new return is %d sense is",
+			       SCp, SCp->cmnd[7], result);
+			print_sense("53c700", SCp);
+#endif
+			if(result == 0)
+				result = SCp->cmnd[7];
+		}
+			
+		free_slot(slot, hostdata);
+
+		SCp->host_scribble = NULL;
+		SCp->result = result;
+		SCp->scsi_done(SCp);
+		if(NCR_700_get_depth(SCp->device) == 0 ||
+		   NCR_700_get_depth(SCp->device) > NCR_700_MAX_TAGS)
+			printk(KERN_ERR "Invalid depth in NCR_700_scsi_done(): %d\n",
+			       NCR_700_get_depth(SCp->device));
+		NCR_700_set_depth(SCp->device, NCR_700_get_depth(SCp->device) - 1);
+	} else {
+		printk(KERN_ERR "53c700: SCSI DONE HAS NULL SCp\n");
+	}
+}
+
+
+STATIC void
+NCR_700_internal_bus_reset(struct Scsi_Host *host)
+{
+	/* Bus reset */
+	NCR_700_writeb(ASSERT_RST, host, SCNTL1_REG);
+	udelay(50);
+	NCR_700_writeb(0, host, SCNTL1_REG);
+
+}
+
+STATIC void
+NCR_700_chip_setup(struct Scsi_Host *host)
+{
+	struct NCR_700_Host_Parameters *hostdata = 
+		(struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+	NCR_700_writeb(1 << host->this_id, host, SCID_REG);
+	NCR_700_writeb(0, host, SBCL_REG);
+	NCR_700_writeb(0, host, SXFER_REG);
+
+	NCR_700_writeb(PHASE_MM_INT | SEL_TIMEOUT_INT | GROSS_ERR_INT | UX_DISC_INT
+	     | RST_INT | PAR_ERR_INT | SELECT_INT, host, SIEN_REG);
+
+	NCR_700_writeb(ABORT_INT | INT_INST_INT | ILGL_INST_INT, host, DIEN_REG);
+	NCR_700_writeb(BURST_LENGTH_8, host, DMODE_REG);
+	NCR_700_writeb(FULL_ARBITRATION | PARITY | AUTO_ATN, host, SCNTL0_REG);
+	NCR_700_writeb(LAST_DIS_ENBL | ENABLE_ACTIVE_NEGATION|GENERATE_RECEIVE_PARITY,
+	     host, CTEST8_REG);
+	NCR_700_writeb(ENABLE_SELECT, host, SCNTL1_REG);
+	if(hostdata->clock > 75) {
+		printk(KERN_ERR "53c700: Clock speed %dMHz is too high: 75Mhz is the maximum this chip can be driven at\n", hostdata->clock);
+		/* do the best we can, but the async clock will be out
+		 * of spec: sync divider 2, async divider 3 */
+		DEBUG(("53c700: sync 2 async 3\n"));
+		NCR_700_writeb(SYNC_DIV_2_0, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_3_0, host, DCNTL_REG);
+		hostdata->sync_clock = hostdata->clock/2;
+	} else	if(hostdata->clock > 50  && hostdata->clock <= 75) {
+		/* sync divider 1.5, async divider 3 */
+		DEBUG(("53c700: sync 1.5 async 3\n"));
+		NCR_700_writeb(SYNC_DIV_1_5, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_3_0, host, DCNTL_REG);
+		hostdata->sync_clock = hostdata->clock*2;
+		hostdata->sync_clock /= 3;
+		
+	} else if(hostdata->clock > 37 && hostdata->clock <= 50) {
+		/* sync divider 1, async divider 2 */
+		DEBUG(("53c700: sync 1 async 2\n"));
+		NCR_700_writeb(SYNC_DIV_1_0, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_2_0, host, DCNTL_REG);
+		hostdata->sync_clock = hostdata->clock;
+	} else if(hostdata->clock > 25 && hostdata->clock <=37) {
+		/* sync divider 1, async divider 1.5 */
+		DEBUG(("53c700: sync 1 async 1.5\n"));
+		NCR_700_writeb(SYNC_DIV_1_0, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_1_5, host, DCNTL_REG);
+		hostdata->sync_clock = hostdata->clock;
+	} else {
+		DEBUG(("53c700: sync 1 async 1\n"));
+		NCR_700_writeb(SYNC_DIV_1_0, host, SBCL_REG);
+		NCR_700_writeb(ASYNC_DIV_1_0, host, DCNTL_REG);
+		/* sync divider 1, async divider 1 */
+	}
+}
+
+STATIC void
+NCR_700_chip_reset(struct Scsi_Host *host)
+{
+	/* Chip reset */
+	NCR_700_writeb(SOFTWARE_RESET, host, DCNTL_REG);
+	udelay(100);
+
+	NCR_700_writeb(0, host, DCNTL_REG);
+
+	mdelay(1000);
+
+	NCR_700_chip_setup(host);
+}
+
+/* The heart of the message processing engine is that the instruction
+ * immediately after the INT is the normal case (and so must be CLEAR
+ * ACK).  If we want to do something else, we call that routine in
+ * scripts and set temp to be the normal case + 8 (skipping the CLEAR
+ * ACK) so that the routine returns correctly to resume its activity
+ * */
+STATIC __u32
+process_extended_message(struct Scsi_Host *host, 
+			 struct NCR_700_Host_Parameters *hostdata,
+			 Scsi_Cmnd *SCp, __u32 dsp, __u32 dsps)
+{
+	__u32 resume_offset = dsp, temp = dsp + 8;
+	__u8 pun = 0xff, lun = 0xff;
+
+	if(SCp != NULL) {
+		pun = SCp->target;
+		lun = SCp->lun;
+	}
+
+	switch(hostdata->msgin[2]) {
+	case A_SDTR_MSG:
+		if(SCp != NULL && NCR_700_is_flag_set(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION)) {
+			__u8 period = hostdata->msgin[3];
+			__u8 offset = hostdata->msgin[4];
+			__u8 sxfer;
+
+			if(offset != 0 && period != 0)
+				sxfer = NCR_700_offset_period_to_sxfer(hostdata, offset, period);
+			else 
+				sxfer = 0;
+			
+			if(sxfer != NCR_700_get_SXFER(SCp->device)) {
+				printk(KERN_INFO "scsi%d: (%d:%d) Synchronous at offset %d, period %dns\n",
+				       host->host_no, pun, lun,
+				       offset, period*4);
+				
+				NCR_700_set_SXFER(SCp->device, sxfer);
+			}
+			
+
+			NCR_700_set_flag(SCp->device, NCR_700_DEV_NEGOTIATED_SYNC);
+			NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION);
+			
+			NCR_700_writeb(NCR_700_get_SXFER(SCp->device),
+				       host, SXFER_REG);
+
+		} else {
+			/* SDTR message out of the blue, reject it */
+			printk(KERN_WARNING "scsi%d Unexpected SDTR msg\n",
+			       host->host_no);
+			hostdata->msgout[0] = A_REJECT_MSG;
+			dma_cache_wback((unsigned long)hostdata->msgout, sizeof(hostdata->msgout));
+			script_patch_16(hostdata->script, MessageCount, 1);
+			/* SendMsgOut returns, so set up the return
+			 * address */
+			resume_offset = hostdata->pScript + Ent_SendMessageWithATN;
+		}
+		break;
+	
+	case A_WDTR_MSG:
+		printk(KERN_INFO "scsi%d: (%d:%d), Unsolicited WDTR after CMD, Rejecting\n",
+		       host->host_no, pun, lun);
+		hostdata->msgout[0] = A_REJECT_MSG;
+		dma_cache_wback((unsigned long)hostdata->msgout, sizeof(hostdata->msgout));
+		script_patch_16(hostdata->script, MessageCount, 1);
+		resume_offset = hostdata->pScript + Ent_SendMessageWithATN;
+
+		break;
+
+	default:
+		printk(KERN_INFO "scsi%d (%d:%d): Unexpected message %s: ",
+		       host->host_no, pun, lun,
+		       NCR_700_phase[(dsps & 0xf00) >> 8]);
+		print_msg(hostdata->msgin);
+		printk("\n");
+		/* just reject it */
+		hostdata->msgout[0] = A_REJECT_MSG;
+		dma_cache_wback((unsigned long)hostdata->msgout, sizeof(hostdata->msgout));
+		script_patch_16(hostdata->script, MessageCount, 1);
+		/* SendMsgOut returns, so set up the return
+		 * address */
+		resume_offset = hostdata->pScript + Ent_SendMessageWithATN;
+	}
+	NCR_700_writel(temp, host, TEMP_REG);
+	return resume_offset;
+}
+
+STATIC __u32
+process_message(struct Scsi_Host *host,	struct NCR_700_Host_Parameters *hostdata,
+		Scsi_Cmnd *SCp, __u32 dsp, __u32 dsps)
+{
+	/* work out where to return to */
+	__u32 temp = dsp + 8, resume_offset = dsp;
+	__u8 pun = 0xff, lun = 0xff;
+
+	dma_cache_inv((unsigned long)hostdata->msgin, sizeof(hostdata->msgin));
+
+	if(SCp != NULL) {
+		pun = SCp->target;
+		lun = SCp->lun;
+	}
+
+#ifdef NCR_700_DEBUG
+	printk("scsi%d (%d:%d): message %s: ", host->host_no, pun, lun,
+	       NCR_700_phase[(dsps & 0xf00) >> 8]);
+	print_msg(hostdata->msgin);
+	printk("\n");
+#endif
+
+	switch(hostdata->msgin[0]) {
+
+	case A_EXTENDED_MSG:
+		return process_extended_message(host, hostdata, SCp,
+						dsp, dsps);
+
+	case A_REJECT_MSG:
+		if(SCp != NULL && NCR_700_is_flag_set(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION)) {
+			/* Rejected our sync negotiation attempt */
+			NCR_700_set_SXFER(SCp->device, 0);
+			NCR_700_set_flag(SCp->device, NCR_700_DEV_NEGOTIATED_SYNC);
+			NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION);
+		} else if(SCp != NULL && NCR_700_is_flag_set(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING)) {
+			/* rejected our first simple tag message */
+			printk(KERN_WARNING "scsi%d (%d:%d) Rejected first tag queue attempt, turning off tag queueing\n", host->host_no, pun, lun);
+			NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING);
+			hostdata->tag_negotiated &= ~(1<<SCp->target);
+		} else {
+			printk(KERN_WARNING "scsi%d (%d:%d) Unexpected REJECT Message %s\n",
+			       host->host_no, pun, lun,
+			       NCR_700_phase[(dsps & 0xf00) >> 8]);
+			/* however, just ignore it */
+		}
+		break;
+
+	case A_PARITY_ERROR_MSG:
+		printk(KERN_ERR "scsi%d (%d:%d) Parity Error!\n", host->host_no,
+		       pun, lun);
+		NCR_700_internal_bus_reset(host);
+		break;
+	case A_SIMPLE_TAG_MSG:
+		printk(KERN_INFO "scsi%d (%d:%d) SIMPLE TAG %d %s\n", host->host_no,
+		       pun, lun, hostdata->msgin[1],
+		       NCR_700_phase[(dsps & 0xf00) >> 8]);
+		/* just ignore it */
+		break;
+	default:
+		printk(KERN_INFO "scsi%d (%d:%d): Unexpected message %s: ",
+		       host->host_no, pun, lun,
+		       NCR_700_phase[(dsps & 0xf00) >> 8]);
+
+		print_msg(hostdata->msgin);
+		printk("\n");
+		/* just reject it */
+		hostdata->msgout[0] = A_REJECT_MSG;
+		dma_cache_wback((unsigned long)hostdata->msgout, sizeof(hostdata->msgout));
+		script_patch_16(hostdata->script, MessageCount, 1);
+		/* SendMsgOut returns, so set up the return
+		 * address */
+		resume_offset = hostdata->pScript + Ent_SendMessageWithATN;
+
+		break;
+	}
+	NCR_700_writel(temp, host, TEMP_REG);
+	return resume_offset;
+}
+
+STATIC __u32
+process_script_interrupt(__u32 dsps, __u32 dsp, Scsi_Cmnd *SCp,
+			 struct Scsi_Host *host,
+			 struct NCR_700_Host_Parameters *hostdata)
+{
+	__u32 resume_offset = 0;
+	__u8 pun = 0xff, lun=0xff;
+
+	if(SCp != NULL) {
+		pun = SCp->target;
+		lun = SCp->lun;
+	}
+
+	if(dsps == A_GOOD_STATUS_AFTER_STATUS) {
+		dma_cache_inv((unsigned long)hostdata->status, sizeof(hostdata->status));
+		DEBUG(("  COMMAND COMPLETE, status=%02x\n",
+		       hostdata->status));
+		/* OK, if TCQ still on, we know it works */
+		NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING);
+		/* check for contingent allegiance contitions */
+		if(status_byte(hostdata->status) == CHECK_CONDITION ||
+		   status_byte(hostdata->status) == COMMAND_TERMINATED) {
+			struct NCR_700_command_slot *slot =
+				(struct NCR_700_command_slot *)SCp->host_scribble;
+			if(SCp->cmnd[0] == REQUEST_SENSE) {
+				/* OOPS: bad device, returning another
+				 * contingent allegiance condition */
+				printk(KERN_ERR "scsi%d (%d:%d) broken device is looping in contingent allegiance: ignoring\n", host->host_no, pun, lun);
+				NCR_700_scsi_done(hostdata, SCp, hostdata->status);
+			} else {
+
+				DEBUG(("  cmd %p has status %d, requesting sense\n",
+				       SCp, hostdata->status));
+				/* we can destroy the command here because the
+				 * contingent allegiance condition will cause a 
+				 * retry which will re-copy the command from the
+				 * saved data_cmnd */
+				SCp->cmnd[0] = REQUEST_SENSE;
+				SCp->cmnd[1] = (SCp->lun & 0x7) << 5;
+				SCp->cmnd[2] = 0;
+				SCp->cmnd[3] = 0;
+				SCp->cmnd[4] = sizeof(SCp->sense_buffer);
+				SCp->cmnd[5] = 0;
+				SCp->cmd_len = 6;
+				/* Here's a quiet hack: the REQUEST_SENSE command is
+				 * six bytes, so store a flag indicating that this
+				 * was an internal sense request and the original
+				 * status at the end of the command */
+				SCp->cmnd[6] = NCR_700_INTERNAL_SENSE_MAGIC;
+				SCp->cmnd[7] = hostdata->status;
+				slot->SG[0].ins = bS_to_host(SCRIPT_MOVE_DATA_IN | sizeof(SCp->sense_buffer));
+				slot->SG[0].pAddr = bS_to_host(virt_to_bus(SCp->sense_buffer));
+				slot->SG[1].ins = bS_to_host(SCRIPT_RETURN);
+				slot->SG[1].pAddr = 0;
+				slot->resume_offset = hostdata->pScript;
+				dma_cache_wback((unsigned long)slot->SG, sizeof(slot->SG[0])*2);
+				dma_cache_inv((unsigned long)SCp->sense_buffer, sizeof(SCp->sense_buffer));
+				
+				/* queue the command for reissue */
+				slot->state = NCR_700_SLOT_QUEUED;
+				hostdata->state = NCR_700_HOST_FREE;
+				hostdata->cmd = NULL;
+			}
+		} else {
+			if(status_byte(hostdata->status) == GOOD &&
+			   SCp->cmnd[0] == INQUIRY && SCp->use_sg == 0) {
+				/* Piggy back the tag queueing support
+				 * on this command */
+				if(((char *)SCp->request_buffer)[7] & 0x02) {
+					printk(KERN_INFO "scsi%d: (%d:%d) Enabling Tag Command Queuing\n", host->host_no, pun, lun);
+					hostdata->tag_negotiated |= (1<<SCp->target);
+					NCR_700_set_flag(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING);
+				} else {
+					NCR_700_clear_flag(SCp->device, NCR_700_DEV_BEGIN_TAG_QUEUEING);
+					hostdata->tag_negotiated &= ~(1<<SCp->target);
+				}
+			}
+			NCR_700_scsi_done(hostdata, SCp, hostdata->status);
+		}
+	} else if((dsps & 0xfffff0f0) == A_UNEXPECTED_PHASE) {
+		__u8 i = (dsps & 0xf00) >> 8;
+
+		printk(KERN_ERR "scsi%d: (%d:%d), UNEXPECTED PHASE %s (%s)\n",
+		       host->host_no, pun, lun,
+		       NCR_700_phase[i],
+		       sbcl_to_string(NCR_700_readb(host, SBCL_REG)));
+		printk(KERN_ERR "         len = %d, cmd =", SCp->cmd_len);
+		print_command(SCp->cmnd);
+
+		NCR_700_internal_bus_reset(host);
+	} else if((dsps & 0xfffff000) == A_FATAL) {
+		int i = (dsps & 0xfff);
+
+		printk(KERN_ERR "scsi%d: (%d:%d) FATAL ERROR: %s\n",
+		       host->host_no, pun, lun, NCR_700_fatal_messages[i]);
+		if(dsps == A_FATAL_ILLEGAL_MSG_LENGTH) {
+			printk(KERN_ERR "     msg begins %02x %02x\n",
+			       hostdata->msgin[0], hostdata->msgin[1]);
+		}
+		NCR_700_internal_bus_reset(host);
+	} else if((dsps & 0xfffff0f0) == A_DISCONNECT) {
+#ifdef NCR_700_DEBUG
+		__u8 i = (dsps & 0xf00) >> 8;
+
+		printk("scsi%d: (%d:%d), DISCONNECTED (%d) %s\n",
+		       host->host_no, pun, lun,
+		       i, NCR_700_phase[i]);
+#endif
+		save_for_reselection(hostdata, SCp, dsp);
+
+	} else if(dsps == A_RESELECTION_IDENTIFIED) {
+		__u8 lun;
+		struct NCR_700_command_slot *slot;
+		__u8 reselection_id = hostdata->reselection_id;
+
+		dma_cache_inv((unsigned long)hostdata->msgin, sizeof(hostdata->msgin));
+
+		lun = hostdata->msgin[0] & 0x1f;
+
+		hostdata->reselection_id = 0xff;
+		DEBUG(("scsi%d: (%d:%d) RESELECTED!\n",
+		       host->host_no, reselection_id, lun));
+		/* clear the reselection indicator */
+		if(hostdata->msgin[1] == A_SIMPLE_TAG_MSG) {
+			slot = find_ITLQ_Nexus(hostdata, reselection_id,
+					       lun, hostdata->msgin[2]);
+		} else {
+			slot = find_ITL_Nexus(hostdata, reselection_id, lun);
+		}
+	retry:
+		if(slot == NULL) {
+			struct NCR_700_command_slot *s = find_ITL_Nexus(hostdata, reselection_id, lun);
+			printk(KERN_ERR "scsi%d: (%d:%d) RESELECTED but no saved command (MSG = %02x %02x %02x)!!\n",
+			       host->host_no, reselection_id, lun,
+			       hostdata->msgin[0], hostdata->msgin[1],
+			       hostdata->msgin[2]);
+			printk(KERN_ERR " OUTSTANDING TAGS:");
+			while(s != NULL) {
+				if(s->cmnd->target == reselection_id &&
+				   s->cmnd->lun == lun) {
+					printk("%d ", s->tag);
+					if(s->tag == hostdata->msgin[2]) {
+						printk(" ***FOUND*** \n");
+						slot = s;
+						goto retry;
+					}
+						
+				}
+				s = s->ITL_back;
+			}
+			printk("\n");
+		} else {
+			if(hostdata->state != NCR_700_HOST_BUSY)
+				printk(KERN_ERR "scsi%d: FATAL, host not busy during valid reselection!\n",
+				       host->host_no);
+			resume_offset = slot->resume_offset;
+			hostdata->cmd = slot->cmnd;
+
+			/* re-patch for this command */
+			script_patch_32_abs(hostdata->script, CommandAddress, 
+					    virt_to_bus(slot->cmnd->cmnd));
+			script_patch_16(hostdata->script,
+					CommandCount, slot->cmnd->cmd_len);
+			script_patch_32_abs(hostdata->script, SGScriptStartAddress,
+					    virt_to_bus(&slot->SG[0].ins));
+
+			/* Note: setting SXFER only works if we're
+			 * still in the MESSAGE phase, so it is vital
+			 * that ACK is still asserted when we process
+			 * the reselection message.  The resume offset
+			 * should therefore always clear ACK */
+			NCR_700_writeb(NCR_700_get_SXFER(hostdata->cmd->device),
+				       host, SXFER_REG);
+			
+		}
+	} else if(dsps == A_RESELECTED_DURING_SELECTION) {
+
+		/* This section is full of debugging code because I've
+		 * never managed to reach it.  I think what happens is
+		 * that, because the 700 runs with selection
+		 * interrupts enabled the whole time that we take a
+		 * selection interrupt before we manage to get to the
+		 * reselected script interrupt */
+
+		__u8 reselection_id = NCR_700_readb(host, SFBR_REG);
+		struct NCR_700_command_slot *slot;
+		
+		/* Take out our own ID */
+		reselection_id &= ~(1<<host->this_id);
+		
+		printk(KERN_INFO "scsi%d: (%d:%d) RESELECTION DURING SELECTION, dsp=%p[%04x] state=%d, count=%d\n",
+		       host->host_no, reselection_id, lun, (void *)dsp, dsp - hostdata->pScript, hostdata->state, hostdata->command_slot_count);
+
+		{
+			/* FIXME: DEBUGGING CODE */
+			__u32 SG = (__u32)bus_to_virt(hostdata->script[A_SGScriptStartAddress_used[0]]);
+			int i;
+
+			for(i=0; i< NCR_700_COMMAND_SLOTS_PER_HOST; i++) {
+				if(SG >= (__u32)(&hostdata->slots[i].SG[0])
+				   && SG <= (__u32)(&hostdata->slots[i].SG[NCR_700_SG_SEGMENTS]))
+					break;
+			}
+			printk(KERN_INFO "IDENTIFIED SG segment as being %p in slot %p, cmd %p, slot->resume_offset=%p\n", (void *)SG, &hostdata->slots[i], hostdata->slots[i].cmnd, (void *)hostdata->slots[i].resume_offset);
+			SCp =  hostdata->slots[i].cmnd;
+		}
+
+		if(SCp != NULL) {
+			slot = (struct NCR_700_command_slot *)SCp->host_scribble;
+			/* change slot from busy to queued to redo command */
+			slot->state = NCR_700_SLOT_QUEUED;
+		}
+		hostdata->cmd = NULL;
+		
+		if(reselection_id == 0) {
+			if(hostdata->reselection_id == 0xff) {
+				printk(KERN_ERR "scsi%d: Invalid reselection during selection!!\n", host->host_no);
+				return 0;
+			} else {
+				printk(KERN_ERR "scsi%d: script reselected and we took a selection interrupt\n",
+				       host->host_no);
+				reselection_id = hostdata->reselection_id;
+			}
+		} else {
+			
+			/* convert to real ID */
+			reselection_id = bitmap_to_number(reselection_id);
+		}
+		hostdata->reselection_id = reselection_id;
+		hostdata->msgin[1] = 0;
+		dma_cache_wback((unsigned long)hostdata->msgin, sizeof(hostdata->msgin));
+		if(hostdata->tag_negotiated & (1<<reselection_id)) {
+			resume_offset = hostdata->pScript + Ent_GetReselectionWithTag;
+		} else {
+			resume_offset = hostdata->pScript + Ent_GetReselectionData;
+		}
+	} else if(dsps == A_COMPLETED_SELECTION_AS_TARGET) {
+		/* we've just disconnected from the bus, do nothing since
+		 * a return here will re-run the queued command slot
+		 * that may have been interrupted by the initial selection */
+		DEBUG((" SELECTION COMPLETED\n"));
+	} else if((dsps & 0xfffff0f0) == A_MSG_IN) { 
+		resume_offset = process_message(host, hostdata, SCp,
+						dsp, dsps);
+	} else if((dsps &  0xfffff000) == 0) {
+		__u8 i = (dsps & 0xf0) >> 4, j = (dsps & 0xf00) >> 8;
+		printk(KERN_ERR "scsi%d: (%d:%d), unhandled script condition %s %s at %04x\n",
+		       host->host_no, pun, lun, NCR_700_condition[i],
+		       NCR_700_phase[j], dsp - hostdata->pScript);
+		if(SCp != NULL) {
+			print_command(SCp->cmnd);
+
+			if(SCp->use_sg) {
+				for(i = 0; i < SCp->use_sg + 1; i++) {
+					printk(KERN_INFO " SG[%d].length = %d, move_insn=%08x, addr %08x\n", i, ((struct scatterlist *)SCp->buffer)[i].length, ((struct NCR_700_command_slot *)SCp->host_scribble)->SG[i].ins, ((struct NCR_700_command_slot *)SCp->host_scribble)->SG[i].pAddr);
+				}
+			}
+		}	       
+		NCR_700_internal_bus_reset(host);
+	} else if((dsps & 0xfffff000) == A_DEBUG_INTERRUPT) {
+		printk(KERN_NOTICE "scsi%d (%d:%d) DEBUG INTERRUPT %d AT %p[%04x], continuing\n",
+		       host->host_no, pun, lun, dsps & 0xfff, (void *)dsp, dsp - hostdata->pScript);
+		resume_offset = dsp;
+	} else {
+		printk(KERN_ERR "scsi%d: (%d:%d), unidentified script interrupt 0x%x at %04x\n",
+		       host->host_no, pun, lun, dsps, dsp - hostdata->pScript);
+		NCR_700_internal_bus_reset(host);
+	}
+	return resume_offset;
+}
+
+/* We run the 53c700 with selection interrupts always enabled.  This
+ * means that the chip may be selected as soon as the bus frees.  On a
+ * busy bus, this can be before the scripts engine finishes its
+ * processing.  Therefore, part of the selection processing has to be
+ * to find out what the scripts engine is doing and complete the
+ * function if necessary (i.e. process the pending disconnect or save
+ * the interrupted initial selection */
+STATIC inline __u32
+process_selection(struct Scsi_Host *host, __u32 dsp)
+{
+	__u8 id = 0;	/* Squash compiler warning */
+	int count = 0;
+	__u32 resume_offset = 0;
+	struct NCR_700_Host_Parameters *hostdata =
+		(struct NCR_700_Host_Parameters *)host->hostdata[0];
+	Scsi_Cmnd *SCp = hostdata->cmd;
+	__u8 sbcl;
+
+	for(count = 0; count < 5; count++) {
+		id = NCR_700_readb(host, SFBR_REG);
+
+		/* Take out our own ID */
+		id &= ~(1<<host->this_id);
+		if(id != 0) 
+			break;
+		udelay(5);
+	}
+	sbcl = NCR_700_readb(host, SBCL_REG);
+	if((sbcl & SBCL_IO) == 0) {
+		/* mark as having been selected rather than reselected */
+		id = 0xff;
+	} else {
+		/* convert to real ID */
+		hostdata->reselection_id = id = bitmap_to_number(id);
+		DEBUG(("scsi%d:  Reselected by %d\n",
+		       host->host_no, id));
+	}
+	if(hostdata->state == NCR_700_HOST_BUSY && SCp != NULL) {
+		struct NCR_700_command_slot *slot =
+			(struct NCR_700_command_slot *)SCp->host_scribble;
+		DEBUG(("  ID %d WARNING: RESELECTION OF BUSY HOST, saving cmd %p, slot %p, addr %x [%04x], resume %x!\n", id, hostdata->cmd, slot, dsp, dsp - hostdata->pScript, resume_offset));
+		
+		switch(dsp - hostdata->pScript) {
+		case Ent_Disconnect1:
+		case Ent_Disconnect2:
+			save_for_reselection(hostdata, SCp, Ent_Disconnect2 + hostdata->pScript);
+			break;
+		case Ent_Disconnect3:
+		case Ent_Disconnect4:
+			save_for_reselection(hostdata, SCp, Ent_Disconnect4 + hostdata->pScript);
+			break;
+		case Ent_Disconnect5:
+		case Ent_Disconnect6:
+			save_for_reselection(hostdata, SCp, Ent_Disconnect6 + hostdata->pScript);
+			break;
+		case Ent_Disconnect7:
+		case Ent_Disconnect8:
+			save_for_reselection(hostdata, SCp, Ent_Disconnect8 + hostdata->pScript);
+			break;
+		case Ent_Finish1:
+		case Ent_Finish2:
+			process_script_interrupt(A_GOOD_STATUS_AFTER_STATUS, dsp, SCp, host, hostdata);
+			break;
+			
+		default:
+			slot->state = NCR_700_SLOT_QUEUED;
+			break;
+			}
+	}
+	hostdata->state = NCR_700_HOST_BUSY;
+	hostdata->cmd = NULL;
+	hostdata->msgin[1] = 0;
+	dma_cache_wback((unsigned long)hostdata->msgin, sizeof(hostdata->msgin));
+
+	if(id == 0xff) {
+		/* Selected as target, Ignore */
+		resume_offset = hostdata->pScript + Ent_SelectedAsTarget;
+	} else if(hostdata->tag_negotiated & (1<<id)) {
+		resume_offset = hostdata->pScript + Ent_GetReselectionWithTag;
+	} else {
+		resume_offset = hostdata->pScript + Ent_GetReselectionData;
+	}
+	return resume_offset;
+}
+
+
+STATIC int
+NCR_700_start_command(Scsi_Cmnd *SCp)
+{
+	struct NCR_700_command_slot *slot =
+		(struct NCR_700_command_slot *)SCp->host_scribble;
+	struct NCR_700_Host_Parameters *hostdata =
+		(struct NCR_700_Host_Parameters *)SCp->host->hostdata[0];
+	unsigned long flags;
+	__u16 count = 1;	/* for IDENTIFY message */
+	
+	save_flags(flags);
+	cli();
+	if(hostdata->state != NCR_700_HOST_FREE) {
+		/* keep this inside the lock to close the race window where
+		 * the running command finishes on another CPU while we don't
+		 * change the state to queued on this one */
+		slot->state = NCR_700_SLOT_QUEUED;
+		restore_flags(flags);
+
+		DEBUG(("scsi%d: host busy, queueing command %p, slot %p\n",
+		       SCp->host->host_no, slot->cmnd, slot));
+		return 0;
+	}
+	hostdata->state = NCR_700_HOST_BUSY;
+	hostdata->cmd = SCp;
+	slot->state = NCR_700_SLOT_BUSY;
+	/* keep interrupts disabled until we have the command correctly
+	 * set up so we cannot take a selection interrupt */
+
+	hostdata->msgout[0] = NCR_700_identify(SCp->cmnd[0] != REQUEST_SENSE,
+					    SCp->lun);
+	/* for INQUIRY or REQUEST_SENSE commands, we cannot be sure
+	 * if the negotiated transfer parameters still hold, so
+	 * always renegotiate them */
+	if(SCp->cmnd[0] == INQUIRY || SCp->cmnd[0] == REQUEST_SENSE) {
+		NCR_700_clear_flag(SCp->device, NCR_700_DEV_NEGOTIATED_SYNC);
+	}
+
+	/* REQUEST_SENSE is asking for contingent I_T_L status.  If a
+	 * contingent allegiance condition exists, the device will
+	 * refuse all tags, so send the request sense as untagged */
+	if((hostdata->tag_negotiated & (1<<SCp->target))
+	   && (slot->tag != NCR_700_NO_TAG && SCp->cmnd[0] != REQUEST_SENSE)) {
+		hostdata->msgout[count++] = A_SIMPLE_TAG_MSG;
+		hostdata->msgout[count++] = slot->tag;
+	}
+
+	if(hostdata->fast &&
+	   NCR_700_is_flag_clear(SCp->device, NCR_700_DEV_NEGOTIATED_SYNC)) {
+		memcpy(&hostdata->msgout[count], NCR_700_SDTR_msg,
+		       sizeof(NCR_700_SDTR_msg));
+		count += sizeof(NCR_700_SDTR_msg);
+		NCR_700_set_flag(SCp->device, NCR_700_DEV_BEGIN_SYNC_NEGOTIATION);
+	}
+
+	dma_cache_wback((unsigned long)hostdata->msgout, count);
+
+	script_patch_16(hostdata->script, MessageCount, count);
+
+
+	script_patch_ID(hostdata->script,
+			Device_ID, 1<<SCp->target);
+
+	script_patch_32_abs(hostdata->script, CommandAddress, 
+			virt_to_bus(SCp->cmnd));
+	script_patch_16(hostdata->script, CommandCount, SCp->cmd_len);
+	/* finally plumb the beginning of the SG list into the script
+	 * */
+	script_patch_32_abs(hostdata->script, SGScriptStartAddress,
+			    virt_to_bus(&slot->SG[0].ins));
+	NCR_700_writeb(CLR_FIFO, SCp->host, DFIFO_REG);
+
+	/* set the synchronous period/offset */
+	if(slot->resume_offset == 0)
+		slot->resume_offset = hostdata->pScript;
+	NCR_700_writeb(NCR_700_get_SXFER(SCp->device),
+	     SCp->host, SXFER_REG);
+	/* allow interrupts here so that if we're selected we can take
+	 * a selection interrupt.  The script start may not be
+	 * effective in this case, but the selection interrupt will
+	 * save our command in that case */
+	NCR_700_writel(slot->temp, SCp->host, TEMP_REG);
+	NCR_700_writel(slot->resume_offset, SCp->host, DSP_REG);
+	restore_flags(flags);
+
+	return 1;
+}
+
+void
+NCR_700_intr(int irq, void *dev_id, struct pt_regs *regs)
+{
+	struct Scsi_Host *host = (struct Scsi_Host *)dev_id;
+	struct NCR_700_Host_Parameters *hostdata =
+		(struct NCR_700_Host_Parameters *)host->hostdata[0];
+	__u8 istat;
+	__u32 resume_offset = 0;
+	__u8 pun = 0xff, lun = 0xff;
+	unsigned long flags;
+
+	/* Unfortunately, we have to take the io_request_lock here
+	 * rather than the host lock hostdata->lock because we're
+	 * looking to exclude queuecommand from messing with the
+	 * registers while we're processing the interrupt.  Since
+	 * queuecommand is called holding io_request_lock, and we have
+	 * to take io_request_lock before we call the command
+	 * scsi_done, we would get a deadlock if we took
+	 * hostdata->lock here and in queuecommand (because the order
+	 * of locking in queuecommand: 1) io_request_lock then 2)
+	 * hostdata->lock would be the reverse of taking it in this
+	 * routine */
+	spin_lock_irqsave(&io_request_lock, flags);
+	if((istat = NCR_700_readb(host, ISTAT_REG))
+	      & (SCSI_INT_PENDING | DMA_INT_PENDING)) {
+		__u32 dsps;
+		__u8 sstat0 = 0, dstat = 0;
+		__u32 dsp;
+		Scsi_Cmnd *SCp = hostdata->cmd;
+		enum NCR_700_Host_State state;
+
+		state = hostdata->state;
+		SCp = hostdata->cmd;
+
+		if(istat & SCSI_INT_PENDING) {
+			udelay(10);
+
+			sstat0 = NCR_700_readb(host, SSTAT0_REG);
+		}
+
+		if(istat & DMA_INT_PENDING) {
+			udelay(10);
+
+			dstat = NCR_700_readb(host, DSTAT_REG);
+		}
+
+		dsps = NCR_700_readl(host, DSPS_REG);
+		dsp = NCR_700_readl(host, DSP_REG);
+
+		DEBUG(("scsi%d: istat %02x sstat0 %02x dstat %02x dsp %04x[%08x] dsps 0x%x\n",
+		       host->host_no, istat, sstat0, dstat,
+		       (dsp - (__u32)virt_to_bus(hostdata->script))/4,
+		       dsp, dsps));
+
+		if(SCp != NULL) {
+			pun = SCp->target;
+			lun = SCp->lun;
+		}
+
+		if(sstat0 & SCSI_RESET_DETECTED) {
+			Scsi_Device *SDp;
+			int i;
+
+			hostdata->state = NCR_700_HOST_BUSY;
+
+			printk(KERN_ERR "scsi%d: Bus Reset detected, executing command %p, slot %p, dsp %p[%04x]\n",
+			       host->host_no, SCp, SCp == NULL ? NULL : SCp->host_scribble, (void *)dsp, dsp - hostdata->pScript);
+
+			/* clear all the negotiated parameters */
+			for(SDp = host->host_queue; SDp != NULL; SDp = SDp->next)
+				SDp->hostdata = 0;
+			
+			/* clear all the slots and their pending commands */
+			for(i = 0; i < NCR_700_COMMAND_SLOTS_PER_HOST; i++) {
+				Scsi_Cmnd *SCp;
+				struct NCR_700_command_slot *slot =
+					&hostdata->slots[i];
+
+				if(slot->state == NCR_700_SLOT_FREE)
+					continue;
+				
+				SCp = slot->cmnd;
+				printk(KERN_ERR " failing command because of reset, slot %p, cmnd %p\n",
+				       slot, SCp);
+				free_slot(slot, hostdata);
+				SCp->host_scribble = NULL;
+				NCR_700_set_depth(SCp->device, 0);
+				/* NOTE: deadlock potential here: we
+				 * rely on mid-layer guarantees that
+				 * scsi_done won't try to issue the
+				 * command again otherwise we'll
+				 * deadlock on the
+				 * hostdata->state_lock */
+				SCp->result = DID_RESET << 16;
+				SCp->scsi_done(SCp);
+			}
+			mdelay(25);
+			NCR_700_chip_setup(host);
+
+			hostdata->state = NCR_700_HOST_FREE;
+			hostdata->cmd = NULL;
+			goto out_unlock;
+		} else if(sstat0 & SELECTION_TIMEOUT) {
+			DEBUG(("scsi%d: (%d:%d) selection timeout\n",
+			       host->host_no, pun, lun));
+			NCR_700_scsi_done(hostdata, SCp, DID_NO_CONNECT<<16);
+		} else if(sstat0 & PHASE_MISMATCH) {
+			struct NCR_700_command_slot *slot = (SCp == NULL) ? NULL :
+				(struct NCR_700_command_slot *)SCp->host_scribble;
+
+			if(dsp == Ent_SendMessage + 8 + hostdata->pScript) {
+				/* It wants to reply to some part of
+				 * our message */
+#ifdef NCR_700_DEBUG
+				__u32 temp = NCR_700_readl(host, TEMP_REG);
+				int count = (hostdata->script[Ent_SendMessage/4] & 0xffffff) - ((NCR_700_readl(host, DBC_REG) & 0xffffff) + NCR_700_data_residual(host));
+				printk("scsi%d (%d:%d) PHASE MISMATCH IN SEND MESSAGE %d remain, return %p[%04x], phase %s\n", host->host_no, pun, lun, count, (void *)temp, temp - hostdata->pScript, sbcl_to_string(NCR_700_readb(host, SBCL_REG)));
+#endif
+				resume_offset = hostdata->pScript + Ent_SendMessagePhaseMismatch;
+			} else if(dsp >= virt_to_bus(&slot->SG[0].ins) &&
+				  dsp <= virt_to_bus(&slot->SG[NCR_700_SG_SEGMENTS].ins)) {
+				int data_transfer = NCR_700_readl(host, DBC_REG) & 0xffffff;
+				int SGcount = (dsp - virt_to_bus(&slot->SG[0].ins))/sizeof(struct NCR_700_SG_List);
+				int residual = NCR_700_data_residual(host);
+				int i;
+#ifdef NCR_700_DEBUG
+				printk("scsi%d: (%d:%d) Expected phase mismatch in slot->SG[%d], transferred 0x%x\n",
+				       host->host_no, pun, lun,
+				       SGcount, data_transfer);
+				print_command(SCp->cmnd);
+				if(residual) {
+					printk("scsi%d: (%d:%d) Expected phase mismatch in slot->SG[%d], transferred 0x%x, residual %d\n",
+				       host->host_no, pun, lun,
+				       SGcount, data_transfer, residual);
+				}
+#endif
+				data_transfer += residual;
+
+				if(data_transfer != 0) {
+					int count; 
+					__u32 pAddr;
+
+					SGcount--;
+
+					count = (bS_to_cpu(slot->SG[SGcount].ins) & 0x00ffffff);
+					DEBUG(("DATA TRANSFER MISMATCH, count = %d, transferred %d\n", count, count-data_transfer));
+					slot->SG[SGcount].ins &= bS_to_host(0xff000000);
+					slot->SG[SGcount].ins |= bS_to_host(data_transfer);
+					pAddr = bS_to_cpu(slot->SG[SGcount].pAddr);
+					pAddr += (count - data_transfer);
+					slot->SG[SGcount].pAddr = bS_to_host(pAddr);
+				}
+				/* set the executed moves to nops */
+				for(i=0; i<SGcount; i++) {
+					slot->SG[i].ins = bS_to_host(SCRIPT_NOP);
+					slot->SG[i].pAddr = 0;
+				}
+				dma_cache_wback((unsigned long)slot->SG, sizeof(slot->SG));
+				/* and pretend we disconnected after
+				 * the command phase */
+				resume_offset = hostdata->pScript + Ent_MsgInDuringData;
+			} else {
+				__u8 sbcl = NCR_700_readb(host, SBCL_REG);
+				printk(KERN_ERR "scsi%d: (%d:%d) phase mismatch at %04x, phase %s\n",
+				       host->host_no, pun, lun, dsp - hostdata->pScript, sbcl_to_string(sbcl));
+				NCR_700_internal_bus_reset(host);
+			}
+
+		} else if(sstat0 & SCSI_GROSS_ERROR) {
+			printk(KERN_ERR "scsi%d: (%d:%d) GROSS ERROR\n",
+			       host->host_no, pun, lun);
+			NCR_700_scsi_done(hostdata, SCp, DID_ERROR<<16);
+		} else if(dstat & SCRIPT_INT_RECEIVED) {
+			DEBUG(("scsi%d: (%d:%d) ====>SCRIPT INTERRUPT<====\n",
+			       host->host_no, pun, lun));
+			resume_offset = process_script_interrupt(dsps, dsp, SCp, host, hostdata);
+		} else if(dstat & (ILGL_INST_DETECTED)) {
+			printk(KERN_ERR "scsi%d: (%d:%d) Illegal Instruction detected at 0x%p[0x%x]!!!\n"
+			       "         Please email James.Bottomley@HansenPartnership.com with the details\n",
+			       host->host_no, pun, lun,
+			       (void *)dsp, dsp - hostdata->pScript);
+			NCR_700_scsi_done(hostdata, SCp, DID_ERROR<<16);
+		} else if(dstat & (WATCH_DOG_INTERRUPT|ABORTED)) {
+			printk(KERN_ERR "scsi%d: (%d:%d) serious DMA problem, dstat=%02x\n",
+			       host->host_no, pun, lun, dstat);
+			NCR_700_scsi_done(hostdata, SCp, DID_ERROR<<16);
+		}
+
+		
+		/* NOTE: selection interrupt processing MUST occur
+		 * after script interrupt processing to correctly cope
+		 * with the case where we process a disconnect and
+		 * then get reselected before we process the
+		 * disconnection */
+		if(sstat0 & SELECTED) {
+			/* FIXME: It currently takes at least FOUR
+			 * interrupts to complete a command that
+			 * disconnects: one for the disconnect, one
+			 * for the reselection, one to get the
+			 * reselection data and one to complete the
+			 * command.  If we guess the reselected
+			 * command here and prepare it, we only need
+			 * to get a reselection data interrupt if we
+			 * guessed wrongly.  Since the interrupt
+			 * overhead is much greater than the command
+			 * setup, this would be an efficient
+			 * optimisation particularly as we probably
+			 * only have one outstanding command on a
+			 * target most of the time */
+
+			resume_offset = process_selection(host, dsp);
+
+		}
+
+	}
+
+	if(resume_offset) {
+		if(hostdata->state != NCR_700_HOST_BUSY) {
+			printk(KERN_ERR "scsi%d: Driver error: resume at %p [%04x] with non busy host!\n",
+			       host->host_no, (void *)resume_offset, resume_offset - hostdata->pScript);
+			hostdata->state = NCR_700_HOST_BUSY;
+		}
+
+		DEBUG(("Attempting to resume at %x\n", resume_offset));
+		NCR_700_writeb(CLR_FIFO, host, DFIFO_REG);
+		NCR_700_writel(resume_offset, host, DSP_REG);
+	} 
+	/* There is probably a technical no-no about this: If we're a
+	 * shared interrupt and we got this interrupt because the
+	 * other device needs servicing not us, we're still going to
+	 * check our queued commands here---of course, there shouldn't
+	 * be any outstanding.... */
+	if(hostdata->state == NCR_700_HOST_FREE) {
+		int i;
+
+		for(i = 0; i < NCR_700_COMMAND_SLOTS_PER_HOST; i++) {
+			/* fairness: always run the queue from the last
+			 * position we left off */
+			int j = (i + hostdata->saved_slot_position)
+				% NCR_700_COMMAND_SLOTS_PER_HOST;
+			
+			if(hostdata->slots[j].state != NCR_700_SLOT_QUEUED)
+				continue;
+			if(NCR_700_start_command(hostdata->slots[j].cmnd)) {
+				DEBUG(("scsi%d: Issuing saved command slot %p, cmd %p\t\n",
+				       host->host_no, &hostdata->slots[j],
+				       hostdata->slots[j].cmnd));
+				hostdata->saved_slot_position = j + 1;
+			}
+
+			break;
+		}
+	}
+ out_unlock:
+	spin_unlock_irqrestore(&io_request_lock, flags);
+}
+
+/* FIXME: Need to put some proc information in and plumb it
+ * into the scsi proc system */
+STATIC int
+NCR_700_proc_directory_info(char *proc_buf, char **startp,
+			 off_t offset, int bytes_available,
+			 int host_no, int write)
+{
+	static char buf[4096];	/* 1 page should be sufficient */
+	int len = 0;
+	struct Scsi_Host *host = scsi_hostlist;
+	struct NCR_700_Host_Parameters *hostdata;
+	Scsi_Device *SDp;
+
+	while(host != NULL && host->host_no != host_no)
+		host = host->next;
+
+	if(host == NULL)
+		return 0;
+
+	if(write) {
+		/* FIXME: Clear internal statistics here */
+		return 0;
+	}
+	hostdata = (struct NCR_700_Host_Parameters *)host->hostdata[0];
+	len += sprintf(&buf[len], "Total commands outstanding: %d\n", hostdata->command_slot_count);
+	len += sprintf(&buf[len],"\
+Target	Depth  Active  Next Tag\n\
+======	=====  ======  ========\n");
+	for(SDp = host->host_queue; SDp != NULL; SDp = SDp->next) {
+		len += sprintf(&buf[len]," %2d:%2d   %4d    %4d      %4d\n", SDp->id, SDp->lun, SDp->queue_depth, NCR_700_get_depth(SDp), SDp->current_tag);
+	}
+	if((len -= offset) <= 0)
+		return 0;
+	if(len > bytes_available)
+		len = bytes_available;
+	memcpy(proc_buf, buf + offset, len);
+	return len;
+}
+
+STATIC int
+NCR_700_queuecommand(Scsi_Cmnd *SCp, void (*done)(Scsi_Cmnd *))
+{
+	struct NCR_700_Host_Parameters *hostdata = 
+		(struct NCR_700_Host_Parameters *)SCp->host->hostdata[0];
+	__u32 move_ins;
+	struct NCR_700_command_slot *slot;
+	int hash;
+
+	if(hostdata->command_slot_count >= NCR_700_COMMAND_SLOTS_PER_HOST) {
+		/* We're over our allocation, this should never happen
+		 * since we report the max allocation to the mid layer */
+		printk(KERN_WARNING "scsi%d: Command depth has gone over queue depth\n", SCp->host->host_no);
+		return 1;
+	}
+	if(NCR_700_get_depth(SCp->device) != 0 && !(hostdata->tag_negotiated & (1<<SCp->target))) {
+		DEBUG((KERN_ERR "scsi%d (%d:%d) has non zero depth %d\n",
+		       SCp->host->host_no, SCp->target, SCp->lun,
+		       NCR_700_get_depth(SCp->device)));
+		return 1;
+	}
+	if(NCR_700_get_depth(SCp->device) >= NCR_700_MAX_TAGS) {
+		DEBUG((KERN_ERR "scsi%d (%d:%d) has max tag depth %d\n",
+		       SCp->host->host_no, SCp->target, SCp->lun,
+		       NCR_700_get_depth(SCp->device)));
+		return 1;
+	}
+	NCR_700_set_depth(SCp->device, NCR_700_get_depth(SCp->device) + 1);
+
+	/* begin the command here */
+	/* no need to check for NULL, test for command_slot_cound above
+	 * ensures a slot is free */
+	slot = find_empty_slot(hostdata);
+
+	slot->cmnd = SCp;
+
+	SCp->scsi_done = done;
+	SCp->host_scribble = (unsigned char *)slot;
+	SCp->SCp.ptr = NULL;
+	SCp->SCp.buffer = NULL;
+
+#ifdef NCR_700_DEBUG
+	printk("53c700: scsi%d, command ", SCp->host->host_no);
+	print_command(SCp->cmnd);
+#endif
+
+	if(hostdata->tag_negotiated &(1<<SCp->target)) {
+
+		struct NCR_700_command_slot *old =
+			find_ITL_Nexus(hostdata, SCp->target, SCp->lun);
+#ifdef NCR_700_TAG_DEBUG
+		struct NCR_700_command_slot *found;
+#endif
+		
+		if(old != NULL && old->tag == SCp->device->current_tag) {
+			printk(KERN_WARNING "scsi%d (%d:%d) Tag clock back to current, queueing\n", SCp->host->host_no, SCp->target, SCp->lun);
+			return 1;
+		}
+		slot->tag = SCp->device->current_tag++;
+#ifdef NCR_700_TAG_DEBUG
+		while((found = find_ITLQ_Nexus(hostdata, SCp->target, SCp->lun, slot->tag)) != NULL) {
+			printk("\n\n**ERROR** already using tag %d, but oldest is %d\n", slot->tag, (old == NULL) ? -1 : old->tag);
+			printk("  FOUND = %p, tag = %d, pun = %d, lun = %d\n",
+			       found, found->tag, found->cmnd->target, found->cmnd->lun);
+			slot->tag = SCp->device->current_tag++;
+			printk("   Tag list is: ");
+			while(old != NULL) {
+				if(old->cmnd->target == SCp->target &&
+				   old->cmnd->lun == SCp->lun)
+					printk("%d ", old->tag);
+				old = old->ITL_back;
+			}
+			printk("\n\n");
+		}
+#endif
+		hash = hash_ITLQ(SCp->target, SCp->lun, slot->tag);
+		/* link into the ITLQ hash queues */
+		slot->ITLQ_forw = hostdata->ITLQ_Hash_forw[hash];
+		hostdata->ITLQ_Hash_forw[hash] = slot;
+#ifdef NCR_700_TAG_DEBUG
+		if(slot->ITLQ_forw != NULL && slot->ITLQ_forw->ITLQ_back != NULL) {
+			printk(KERN_ERR "scsi%d (%d:%d) ITLQ_back is not NULL!!!!\n", SCp->host->host_no, SCp->target, SCp->lun);
+		}
+#endif
+		if(slot->ITLQ_forw != NULL)
+			slot->ITLQ_forw->ITLQ_back = slot;
+		else
+			hostdata->ITLQ_Hash_back[hash] = slot;
+		slot->ITLQ_back = NULL;
+	} else {
+		slot->tag = NCR_700_NO_TAG;
+	}
+	/* link into the ITL hash queues */
+	hash = hash_ITL(SCp->target, SCp->lun);
+	slot->ITL_forw = hostdata->ITL_Hash_forw[hash];
+	hostdata->ITL_Hash_forw[hash] = slot;
+#ifdef NCR_700_TAG_DEBUG
+	if(slot->ITL_forw != NULL && slot->ITL_forw->ITL_back != NULL) {
+		printk(KERN_ERR "scsi%d (%d:%d) ITL_back is not NULL!!!!\n",
+		       SCp->host->host_no, SCp->target, SCp->lun);
+	}
+#endif
+	if(slot->ITL_forw != NULL)
+		slot->ITL_forw->ITL_back = slot;
+	else
+		hostdata->ITL_Hash_back[hash] = slot;
+	slot->ITL_back = NULL;
+
+		
+	/* This is f****g ridiculous; every low level HBA driver has
+	 * to determine the direction of the commands, why isn't this
+	 * done inside the scsi_lib !!??? */
+	switch (SCp->cmnd[0]) {
+	case REQUEST_SENSE:
+		/* clear the internal sense magic */
+		SCp->cmnd[6] = 0;
+		/* fall through */
+	case INQUIRY:
+	case MODE_SENSE:
+	case READ_6:
+	case READ_10:
+	case READ_12:
+	case READ_CAPACITY:
+	case READ_BLOCK_LIMITS:
+	case READ_TOC:
+		move_ins = SCRIPT_MOVE_DATA_IN;
+		break;
+	case MODE_SELECT:
+	case WRITE_6:
+	case WRITE_10:
+	case WRITE_12:
+		move_ins = SCRIPT_MOVE_DATA_OUT;
+		break;
+	case TEST_UNIT_READY:
+	case ALLOW_MEDIUM_REMOVAL:
+	case START_STOP:
+		move_ins = 0;
+		break;
+	default:
+		/* OK, get it from the command */
+		switch(SCp->sc_data_direction) {
+		case SCSI_DATA_UNKNOWN:
+		default:
+			printk(KERN_ERR "53c700: Unknown command for data direction ");
+			print_command(SCp->cmnd);
+			
+			move_ins = 0;
+			break;
+		case SCSI_DATA_NONE:
+			move_ins = 0;
+			break;
+		case SCSI_DATA_READ:
+			move_ins = SCRIPT_MOVE_DATA_IN;
+			break;
+		case SCSI_DATA_WRITE:
+			move_ins = SCRIPT_MOVE_DATA_OUT;
+			break;
+		}
+	}
+
+	/* now build the scatter gather list */
+	if(move_ins != 0) {
+		int i;
+
+		for(i = 0; i < (SCp->use_sg ? SCp->use_sg : 1); i++) {
+			void *vPtr;
+			__u32 count;
+
+			if(SCp->use_sg) {
+				vPtr = (((struct scatterlist *)SCp->buffer)[i].address);
+				count = ((struct scatterlist *)SCp->buffer)[i].length;
+			} else {
+				vPtr = SCp->request_buffer;
+				count = SCp->request_bufflen;
+			}
+			slot->SG[i].ins = bS_to_host(move_ins | count);
+			DEBUG((" scatter block %d: move %d[%08x] from 0x%lx\n",
+			       i, count, slot->SG[i].ins, 
+			       virt_to_bus(vPtr)));
+			dma_cache_wback_inv((unsigned long)vPtr, count);
+			slot->SG[i].pAddr = bS_to_host(virt_to_bus(vPtr));
+		}
+		slot->SG[i].ins = bS_to_host(SCRIPT_RETURN);
+		slot->SG[i].pAddr = 0;
+		dma_cache_wback((unsigned long)slot->SG, sizeof(slot->SG));
+		DEBUG((" SETTING %08lx to %x\n",
+		       virt_to_bus(&slot->SG[i].ins), 
+		       slot->SG[i].ins));
+	}
+	slot->resume_offset = 0;
+	NCR_700_start_command(SCp);
+	return 0;
+}
+
+STATIC int
+NCR_700_abort(Scsi_Cmnd * SCp)
+{
+	struct NCR_700_command_slot *slot;
+	struct NCR_700_Host_Parameters *hostdata = 
+		(struct NCR_700_Host_Parameters *)SCp->host->hostdata[0];
+
+	printk(KERN_INFO "scsi%d (%d:%d) New error handler wants to abort command\n\t",
+	       SCp->host->host_no, SCp->target, SCp->lun);
+	print_command(SCp->cmnd);
+
+	slot = find_ITL_Nexus(hostdata, SCp->target, SCp->lun);
+	while(slot != NULL && slot->cmnd != SCp)
+		slot = slot->ITL_back;
+
+	if(slot == NULL)
+		/* no outstanding command to abort */
+		return SUCCESS;
+	if(SCp->cmnd[0] == TEST_UNIT_READY) {
+		/* FIXME: This is because of a problem in the new
+		 * error handler.  When it is in error recovery, it
+		 * will send a TUR to a device it thinks may still be
+		 * showing a problem.  If the TUR isn't responded to,
+		 * it will abort it and mark the device off line.
+		 * Unfortunately, it does no other error recovery, so
+		 * this would leave us with an outstanding command
+		 * occupying a slot.  Rather than allow this to
+		 * happen, we issue a bus reset to force all
+		 * outstanding commands to terminate here. */
+		NCR_700_internal_bus_reset(SCp->host);
+		/* still drop through and return failed */
+	}
+	return FAILED;
+
+}
+
+STATIC int
+NCR_700_bus_reset(Scsi_Cmnd * SCp)
+{
+	printk(KERN_INFO "scsi%d (%d:%d) New error handler wants BUS reset, cmd %p\n\t",
+	       SCp->host->host_no, SCp->target, SCp->lun, SCp);
+	print_command(SCp->cmnd);
+	NCR_700_internal_bus_reset(SCp->host);
+	return SUCCESS;
+}
+
+STATIC int
+NCR_700_dev_reset(Scsi_Cmnd * SCp)
+{
+	printk(KERN_INFO "scsi%d (%d:%d) New error handler wants device reset\n\t",
+	       SCp->host->host_no, SCp->target, SCp->lun);
+	print_command(SCp->cmnd);
+	
+	return FAILED;
+}
+
+STATIC int
+NCR_700_host_reset(Scsi_Cmnd * SCp)
+{
+	printk(KERN_INFO "scsi%d (%d:%d) New error handler wants HOST reset\n\t",
+	       SCp->host->host_no, SCp->target, SCp->lun);
+	print_command(SCp->cmnd);
+
+	NCR_700_internal_bus_reset(SCp->host);
+	NCR_700_chip_reset(SCp->host);
+	return SUCCESS;
+}
+
+EXPORT_SYMBOL(NCR_700_detect);
+EXPORT_SYMBOL(NCR_700_release);
+EXPORT_SYMBOL(NCR_700_intr);
diff -urN linux-2.4.10-pre6/drivers/scsi/53c700.h linux/drivers/scsi/53c700.h
--- linux-2.4.10-pre6/drivers/scsi/53c700.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/53c700.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,534 @@
+/* -*- mode: c; c-basic-offset: 8 -*- */
+
+/* Driver for 53c700 and 53c700-66 chips from NCR and Symbios
+ *
+ * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
+ */
+
+#ifndef _53C700_H
+#define _53C700_H
+
+/* Turn on for general debugging---too verbose for normal use */
+#undef NCR_700_DEBUG
+/* Debug the tag queues, checking hash queue allocation and deallocation
+ * and search for duplicate tags */
+#undef NCR_700_TAG_DEBUG
+
+#ifdef NCR_700_DEBUG
+#define DEBUG(x)	printk x
+#else
+#define DEBUG(x)
+#endif
+
+/* The number of available command slots */
+#define NCR_700_COMMAND_SLOTS_PER_HOST	64
+/* The maximum number of Scatter Gathers we allow */
+#define NCR_700_SG_SEGMENTS		32
+/* The maximum number of luns (make this of the form 2^n) */
+#define NCR_700_MAX_LUNS		32
+#define NCR_700_LUN_MASK		(NCR_700_MAX_LUNS - 1)
+/* Alter this with care: too many tags won't give the elevator a chance to
+ * work; too few will cause the device to operate less efficiently */
+#define NCR_700_MAX_TAGS		16
+/* magic byte identifying an internally generated REQUEST_SENSE command */
+#define NCR_700_INTERNAL_SENSE_MAGIC	0x42
+
+/* WARNING: Leave this in for now: the dependency preprocessor doesn't
+ * pick up file specific flags, so must define here if they are not
+ * set */
+#if !defined(IO_MAPPED) && !defined(MEM_MAPPED)
+#define IO_MAPPED
+#endif
+
+
+struct NCR_700_Host_Parameters;
+
+/* These are the externally used routines */
+struct Scsi_Host *NCR_700_detect(Scsi_Host_Template *, struct NCR_700_Host_Parameters *);
+int NCR_700_release(struct Scsi_Host *host);
+void NCR_700_intr(int, void *, struct pt_regs *);
+
+
+enum NCR_700_Host_State {
+	NCR_700_HOST_BUSY,
+	NCR_700_HOST_FREE,
+};
+
+struct NCR_700_SG_List {
+	/* The following is a script fragment to move the buffer onto the
+	 * bus and then link the next fragment or return */
+	#define	SCRIPT_MOVE_DATA_IN		0x09000000
+	#define	SCRIPT_MOVE_DATA_OUT		0x08000000
+	__u32	ins;
+	__u32	pAddr;
+	#define	SCRIPT_NOP			0x80000000
+	#define	SCRIPT_RETURN			0x90080000
+};
+
+/* We use device->hostdata to store negotiated parameters.  This is
+ * supposed to be a pointer to a device private area, but we cannot
+ * really use it as such since it will never be freed, so just use the
+ * 32 bits to cram the information.  The SYNC negotiation sequence looks
+ * like:
+ * 
+ * If DEV_NEGOTIATED_SYNC not set, tack and SDTR message on to the
+ * initial identify for the device and set DEV_BEGIN_SYNC_NEGOTATION
+ * If we get an SDTR reply, work out the SXFER parameters, squirrel
+ * them away here, clear DEV_BEGIN_SYNC_NEGOTIATION and set
+ * DEV_NEGOTIATED_SYNC.  If we get a REJECT msg, squirrel
+ *
+ *
+ * 0:7	SXFER_REG negotiated value for this device
+ * 8:15 Current queue depth
+ * 16	negotiated SYNC flag
+ * 17 begin SYNC negotiation flag 
+ * 18 device supports tag queueing */
+#define NCR_700_DEV_NEGOTIATED_SYNC	(1<<16)
+#define NCR_700_DEV_BEGIN_SYNC_NEGOTIATION	(1<<17)
+#define NCR_700_DEV_BEGIN_TAG_QUEUEING	(1<<18)
+
+static inline void
+NCR_700_set_SXFER(Scsi_Device *SDp, __u8 sxfer)
+{
+	((__u32)SDp->hostdata) &= 0xffffff00;
+	((__u32)SDp->hostdata) |= sxfer & 0xff;
+}
+static inline __u8 NCR_700_get_SXFER(Scsi_Device *SDp)
+{
+	return (((__u32)SDp->hostdata) & 0xff);
+}
+static inline void
+NCR_700_set_depth(Scsi_Device *SDp, __u8 depth)
+{
+	((__u32)SDp->hostdata) &= 0xffff00ff;
+	((__u32)SDp->hostdata) |= (0xff00 & (depth << 8));
+}
+static inline __u8
+NCR_700_get_depth(Scsi_Device *SDp)
+{
+	return ((((__u32)SDp->hostdata) & 0xff00)>>8);
+}
+static inline int
+NCR_700_is_flag_set(Scsi_Device *SDp, __u32 flag)
+{
+	return (((__u32)SDp->hostdata) & flag) == flag;
+}
+static inline int
+NCR_700_is_flag_clear(Scsi_Device *SDp, __u32 flag)
+{
+	return (((__u32)SDp->hostdata) & flag) == 0;
+}
+static inline void
+NCR_700_set_flag(Scsi_Device *SDp, __u32 flag)
+{
+	((__u32)SDp->hostdata) |= (flag & 0xffff0000);
+}
+static inline void
+NCR_700_clear_flag(Scsi_Device *SDp, __u32 flag)
+{
+	((__u32)SDp->hostdata) &= ~(flag & 0xffff0000);
+}
+
+/* These represent the Nexus hashing functions.  A Nexus in SCSI terms
+ * just means the identification of an outstanding command, by ITL
+ * (Initiator Target Lun) or ITLQ (Initiator Target Lun Tag).  I'm not
+ * very keen on XOR based hashes, so these are based on number theory
+ * instead.  All you need to do is to fix your hash bucket size and
+ * then choose reasonable strides which are coprime with the chosen
+ * bucket size
+ *
+ * Note: this mathematical hash can be made very efficient, if the
+ * compiler is good at optimising: Choose the number of buckets to be
+ * 2^n and the modulo becomes a logical and with (2^n-1).
+ * Additionally, if you chose the coprimes of the form 2^n-2^n the
+ * multiplication can be done by a shift and an addition. */
+#define MAX_ITL_HASH_BUCKETS	16
+#define ITL_HASH_PRIME		7
+
+#define MAX_ITLQ_HASH_BUCKETS	64
+#define ITLQ_PUN_PRIME		7
+#define ITLQ_LUN_PRIME		3
+
+static inline int
+hash_ITL(__u8 pun, __u8 lun)
+{
+	return (pun*ITL_HASH_PRIME + lun) % MAX_ITL_HASH_BUCKETS;
+}
+
+static inline int
+hash_ITLQ(__u8 pun, __u8 lun, __u8 tag)
+{
+	return (pun*ITLQ_PUN_PRIME + lun*ITLQ_LUN_PRIME + tag) % MAX_ITLQ_HASH_BUCKETS;
+}
+
+struct NCR_700_command_slot {
+	#define NCR_700_SLOT_MASK 0xFC
+	#define NCR_700_SLOT_MAGIC 0xb8
+	#define	NCR_700_SLOT_FREE (0|NCR_700_SLOT_MAGIC) /* slot may be used */
+	#define NCR_700_SLOT_BUSY (1|NCR_700_SLOT_MAGIC) /* slot has command active on HA */
+	#define NCR_700_SLOT_QUEUED (2|NCR_700_SLOT_MAGIC) /* slot has command to be made active on HA */
+	__u8	state;
+	#define NCR_700_NO_TAG	0xdead
+	__u16	tag;
+	struct NCR_700_SG_List	SG[NCR_700_SG_SEGMENTS+1];
+	__u32	resume_offset;
+	Scsi_Cmnd	*cmnd;
+	__u32		temp;
+	/* Doubly linked ITL/ITLQ list kept in strict time order
+	 * (latest at the back) */
+	struct NCR_700_command_slot *ITL_forw;
+	struct NCR_700_command_slot *ITL_back;
+	struct NCR_700_command_slot *ITLQ_forw;
+	struct NCR_700_command_slot *ITLQ_back;
+};
+
+struct NCR_700_Host_Parameters {
+	/* These must be filled in by the calling driver */
+	int	clock;			/* board clock speed in MHz */
+	__u32	base;			/* the base for the port (copied to host) */
+	__u8	differential:1;	/* if we are differential */
+#ifdef __hppa__
+	/* This option is for HP only.  Set it if your chip is wired for
+	 * little endian on this platform (which is big endian) */
+	__u8	force_le_on_be:1;
+#endif
+
+	/* NOTHING BELOW HERE NEEDS ALTERING */
+	__u8	fast:1;		/* if we can alter the SCSI bus clock
+                                   speed (so can negiotiate sync) */
+
+	int	sync_clock;	/* The speed of the SYNC core */
+
+	__u32	*script;		/* pointer to script location */
+	__u32	pScript;		/* physical mem addr of script */
+
+	/* This will be the host lock.  Unfortunately, we can't use it
+	 * at the moment because of the necessity of holding the
+	 * io_request_lock */
+	spinlock_t lock;
+	enum NCR_700_Host_State state; /* protected by state lock */
+	Scsi_Cmnd *cmd;
+
+	__u8	msgout[8];
+	__u8	tag_negotiated;
+	__u8	status;
+	__u8	msgin[8];
+	struct NCR_700_command_slot	*slots;
+	int	saved_slot_position;
+	int	command_slot_count; /* protected by state lock */
+	__u8	rev;
+	__u8	reselection_id;
+	/* flags for the host */
+
+	/* ITL list.  ALL outstanding commands are hashed here in strict
+	 * order, latest at the back */
+	struct NCR_700_command_slot *ITL_Hash_forw[MAX_ITL_HASH_BUCKETS];
+	struct NCR_700_command_slot *ITL_Hash_back[MAX_ITL_HASH_BUCKETS];
+
+	/* Only tagged outstanding commands are hashed here (also latest
+	 * at the back) */
+	struct NCR_700_command_slot *ITLQ_Hash_forw[MAX_ITLQ_HASH_BUCKETS];
+	struct NCR_700_command_slot *ITLQ_Hash_back[MAX_ITLQ_HASH_BUCKETS];
+
+	/* Free list, singly linked by ITL_forw elements */
+	struct NCR_700_command_slot *free_list;
+};
+
+/*
+ *	53C700 Register Interface - the offset from the Selected base
+ *	I/O address */
+#ifdef __hppa__
+#define bE	(hostdata->force_le_on_be ? 0 : 3)
+#define	bSWAP	(hostdata->force_le_on_be)
+#elif defined(__BIG_ENDIAN)
+#define bE	3
+#define bSWAP	0
+#elif defined(__LITTLE_ENDIAN)
+#define bE	0
+#define bSWAP	0
+#else
+#error "__BIG_ENDIAN or __LITTLE_ENDIAN must be defined, did you include byteorder.h?"
+#endif
+#define bS_to_cpu(x)	(bSWAP ? le32_to_cpu(x) : (x))
+#define bS_to_host(x)	(bSWAP ? cpu_to_le32(x) : (x))
+
+/* NOTE: These registers are in the LE register space only, the required byte
+ * swapping is done by the NCR_700_{read|write}[b] functions */
+#define	SCNTL0_REG			0x00
+#define		FULL_ARBITRATION	0xc0
+#define 	PARITY			0x08
+#define		ENABLE_PARITY		0x04
+#define 	AUTO_ATN		0x02
+#define	SCNTL1_REG			0x01
+#define 	SLOW_BUS		0x80
+#define		ENABLE_SELECT		0x20
+#define		ASSERT_RST		0x08
+#define		ASSERT_EVEN_PARITY	0x04
+#define	SDID_REG			0x02
+#define	SIEN_REG			0x03
+#define 	PHASE_MM_INT		0x80
+#define 	FUNC_COMP_INT		0x40
+#define 	SEL_TIMEOUT_INT		0x20
+#define 	SELECT_INT		0x10
+#define 	GROSS_ERR_INT		0x08
+#define 	UX_DISC_INT		0x04
+#define 	RST_INT			0x02
+#define 	PAR_ERR_INT		0x01
+#define	SCID_REG			0x04
+#define SXFER_REG			0x05
+#define		ASYNC_OPERATION		0x00
+#define SODL_REG                        0x06
+#define	SOCL_REG			0x07
+#define	SFBR_REG			0x08
+#define	SIDL_REG			0x09
+#define	SBDL_REG			0x0A
+#define	SBCL_REG			0x0B
+/* read bits */
+#define		SBCL_IO			0x01
+/*write bits */
+#define		SYNC_DIV_AS_ASYNC	0x00
+#define		SYNC_DIV_1_0		0x01
+#define		SYNC_DIV_1_5		0x02
+#define		SYNC_DIV_2_0		0x03
+#define	DSTAT_REG			0x0C
+#define		ILGL_INST_DETECTED	0x01
+#define		WATCH_DOG_INTERRUPT	0x02
+#define		SCRIPT_INT_RECEIVED	0x04
+#define		ABORTED			0x10
+#define	SSTAT0_REG			0x0D
+#define		PARITY_ERROR		0x01
+#define		SCSI_RESET_DETECTED	0x02
+#define		UNEXPECTED_DISCONNECT	0x04
+#define		SCSI_GROSS_ERROR	0x08
+#define		SELECTED		0x10
+#define		SELECTION_TIMEOUT	0x20
+#define		FUNCTION_COMPLETE	0x40
+#define		PHASE_MISMATCH 		0x80
+#define	SSTAT1_REG			0x0E
+#define		SIDL_REG_FULL		0x80
+#define		SODR_REG_FULL		0x40
+#define		SODL_REG_FULL		0x20
+#define SSTAT2_REG                      0x0F
+#define CTEST0_REG                      0x14
+#define CTEST1_REG                      0x15
+#define CTEST2_REG                      0x16
+#define CTEST3_REG                      0x17
+#define CTEST4_REG                      0x18
+#define         DISABLE_FIFO            0x00
+#define         SLBE                    0x10
+#define         SFWR                    0x08
+#define         BYTE_LANE0              0x04
+#define         BYTE_LANE1              0x05
+#define         BYTE_LANE2              0x06
+#define         BYTE_LANE3              0x07
+#define         SCSI_ZMODE              0x20
+#define         ZMODE                   0x40
+#define CTEST5_REG                      0x19
+#define         MASTER_CONTROL          0x10
+#define         DMA_DIRECTION           0x08
+#define CTEST7_REG                      0x1B
+#define         DFP                     0x08
+#define         EVP                     0x04
+#define		DIFF			0x01
+#define CTEST6_REG                      0x1A
+#define	TEMP_REG			0x1C
+#define	DFIFO_REG			0x20
+#define		FLUSH_DMA_FIFO		0x80
+#define		CLR_FIFO		0x40
+#define	ISTAT_REG			0x21
+#define		ABORT_OPERATION		0x80
+#define		DMA_INT_PENDING		0x01
+#define		SCSI_INT_PENDING	0x02
+#define		CONNECTED		0x08
+#define CTEST8_REG                      0x22
+#define         LAST_DIS_ENBL           0x01
+#define		SHORTEN_FILTERING	0x04
+#define		ENABLE_ACTIVE_NEGATION	0x10
+#define		GENERATE_RECEIVE_PARITY	0x20
+#define CTEST9_REG                      0x23
+#define	DBC_REG				0x24
+#define	DCMD_REG			0x27
+#define	DNAD_REG			0x28
+#define	DIEN_REG			0x39
+#define 	ABORT_INT		0x10
+#define 	INT_INST_INT		0x04
+#define 	WD_INT			0x02
+#define 	ILGL_INST_INT		0x01
+#define	DCNTL_REG			0x3B
+#define		SOFTWARE_RESET		0x01
+#define 	SCRPTS_16BITS		0x20
+#define		ASYNC_DIV_2_0		0x00
+#define		ASYNC_DIV_1_5		0x01
+#define		ASYNC_DIV_1_0		0x02
+#define		ASYNC_DIV_3_0		0x03
+#define	DMODE_REG			0x34
+#define		BURST_LENGTH_1		0x00
+#define		BURST_LENGTH_2		0x40
+#define		BURST_LENGTH_4		0x80
+#define		BURST_LENGTH_8		0xC0
+#define 	BW16			32 
+#define 	MODE_286		16
+#define 	IO_XFER			8
+#define 	FIXED_ADDR		4
+
+#define DSP_REG                         0x2C
+#define DSPS_REG                        0x30
+
+/* Parameters to begin SDTR negotiations.  Empirically, I find that
+ * the 53c700-66 cannot handle an offset >8, so don't change this  */
+#define NCR_700_MAX_OFFSET	8
+#define NCR_700_MIN_XFERP	1
+#define NCR_700_MIN_PERIOD	25 /* for SDTR message, 100ns */
+
+#define script_patch_32(script, symbol, value) \
+{ \
+	int i; \
+	for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
+		__u32 val = bS_to_cpu((script)[A_##symbol##_used[i]]) + value; \
+		(script)[A_##symbol##_used[i]] = bS_to_host(val); \
+		dma_cache_wback((unsigned long)&(script)[A_##symbol##_used[i]], 4); \
+		DEBUG((" script, patching %s at %d to 0x%lx\n", \
+		       #symbol, A_##symbol##_used[i], (value))); \
+	} \
+}
+
+#define script_patch_32_abs(script, symbol, value) \
+{ \
+	int i; \
+	for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
+		(script)[A_##symbol##_used[i]] = bS_to_host(value); \
+		dma_cache_wback((unsigned long)&(script)[A_##symbol##_used[i]], 4); \
+		DEBUG((" script, patching %s at %d to 0x%lx\n", \
+		       #symbol, A_##symbol##_used[i], (value))); \
+	} \
+}
+
+/* Used for patching the SCSI ID in the SELECT instruction */
+#define script_patch_ID(script, symbol, value) \
+{ \
+	int i; \
+	for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
+		__u32 val = bS_to_cpu((script)[A_##symbol##_used[i]]); \
+		val &= 0xff00ffff; \
+		val |= ((value) & 0xff) << 16; \
+		(script)[A_##symbol##_used[i]] = bS_to_host(val); \
+		dma_cache_wback((unsigned long)&(script)[A_##symbol##_used[i]], 4); \
+		DEBUG((" script, patching ID field %s at %d to 0x%x\n", \
+		       #symbol, A_##symbol##_used[i], val)); \
+	} \
+}
+
+#define script_patch_16(script, symbol, value) \
+{ \
+	int i; \
+	for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
+		__u32 val = bS_to_cpu((script)[A_##symbol##_used[i]]); \
+		val &= 0xffff0000; \
+		val |= ((value) & 0xffff); \
+		(script)[A_##symbol##_used[i]] = bS_to_host(val); \
+		dma_cache_wback((unsigned long)&(script)[A_##symbol##_used[i]], 4); \
+		DEBUG((" script, patching ID field %s at %d to 0x%x\n", \
+		       #symbol, A_##symbol##_used[i], val)); \
+	} \
+}
+
+#endif
+
+#ifdef MEM_MAPPED
+static inline __u8
+NCR_700_readb(struct Scsi_Host *host, __u32 reg)
+{
+	const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
+		= (struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+	return readb(host->base + (reg^bE));
+}
+
+static inline __u32
+NCR_700_readl(struct Scsi_Host *host, __u32 reg)
+{
+	__u32 value = readl(host->base + reg);
+	const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
+		= (struct NCR_700_Host_Parameters *)host->hostdata[0];
+#if 1
+	/* sanity check the register */
+	if((reg & 0x3) != 0)
+		BUG();
+#endif
+
+	return bS_to_cpu(value);
+}
+
+static inline void
+NCR_700_writeb(__u8 value, struct Scsi_Host *host, __u32 reg)
+{
+	const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
+		= (struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+	writeb(value, host->base + (reg^bE));
+}
+
+static inline void
+NCR_700_writel(__u32 value, struct Scsi_Host *host, __u32 reg)
+{
+	const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
+		= (struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+#if 1
+	/* sanity check the register */
+	if((reg & 0x3) != 0)
+		BUG();
+#endif
+
+	writel(bS_to_host(value), host->base + reg);
+}
+#elif defined(IO_MAPPED)
+static inline __u8
+NCR_700_readb(struct Scsi_Host *host, __u32 reg)
+{
+	const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
+		= (struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+	return inb(host->base + (reg^bE));
+}
+
+static inline __u32
+NCR_700_readl(struct Scsi_Host *host, __u32 reg)
+{
+	__u32 value = inl(host->base + reg);
+	const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
+		= (struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+#if 1
+	/* sanity check the register */
+	if((reg & 0x3) != 0)
+		BUG();
+#endif
+
+	return bS_to_cpu(value);
+}
+
+static inline void
+NCR_700_writeb(__u8 value, struct Scsi_Host *host, __u32 reg)
+{
+	const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
+		= (struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+	outb(value, host->base + (reg^bE));
+}
+
+static inline void
+NCR_700_writel(__u32 value, struct Scsi_Host *host, __u32 reg)
+{
+	const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
+		= (struct NCR_700_Host_Parameters *)host->hostdata[0];
+
+#if 1
+	/* sanity check the register */
+	if((reg & 0x3) != 0)
+		BUG();
+#endif
+
+	outl(bS_to_host(value), host->base + reg);
+}
+#endif
diff -urN linux-2.4.10-pre6/drivers/scsi/53c700.scr linux/drivers/scsi/53c700.scr
--- linux-2.4.10-pre6/drivers/scsi/53c700.scr	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/53c700.scr	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,404 @@
+; Script for the NCR (or symbios) 53c700 and 53c700-66 chip
+;
+; Copyright (C) 2001 James.Bottomley@HansenPartnership.com
+;;-----------------------------------------------------------------------------
+;;  
+;;  This program is free software; you can redistribute it and/or modify
+;;  it under the terms of the GNU General Public License as published by
+;;  the Free Software Foundation; either version 2 of the License, or
+;;  (at your option) any later version.
+;;
+;;  This program is distributed in the hope that it will be useful,
+;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
+;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;;  GNU General Public License for more details.
+;;
+;;  You should have received a copy of the GNU General Public License
+;;  along with this program; if not, write to the Free Software
+;;  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+;;
+;;-----------------------------------------------------------------------------
+;
+; This script is designed to be modified for the particular command in
+; operation.  The particular variables pertaining to the commands are:
+;
+ABSOLUTE	Device_ID = 0		; ID of target for command
+ABSOLUTE	MessageCount = 0	; Number of bytes in message
+ABSOLUTE	MessageLocation = 0	; Addr of message
+ABSOLUTE	CommandCount = 0	; Number of bytes in command
+ABSOLUTE	CommandAddress = 0	; Addr of Command
+ABSOLUTE	StatusAddress = 0	; Addr to receive status return
+ABSOLUTE	ReceiveMsgAddress = 0	; Addr to receive msg
+;
+; This is the magic component for handling scatter-gather.  Each of the
+; SG components is preceeded by a script fragment which moves the
+; necessary amount of data and jumps to the next SG segment.  The final
+; SG segment jumps back to .  However, this address is the first SG script
+; segment.
+;
+ABSOLUTE	SGScriptStartAddress = 0
+
+; The following represent status interrupts we use 3 hex digits for
+; this: 0xPRS where 
+
+; P:
+ABSOLUTE	AFTER_SELECTION 	= 0x100
+ABSOLUTE	BEFORE_CMD 		= 0x200
+ABSOLUTE	AFTER_CMD 		= 0x300
+ABSOLUTE	AFTER_STATUS 		= 0x400
+ABSOLUTE	AFTER_DATA_IN		= 0x500
+ABSOLUTE	AFTER_DATA_OUT		= 0x600
+ABSOLUTE	DURING_DATA_IN		= 0x700
+
+; R:
+ABSOLUTE	NOT_MSG_OUT 		= 0x10
+ABSOLUTE	UNEXPECTED_PHASE 	= 0x20
+ABSOLUTE	NOT_MSG_IN 		= 0x30
+ABSOLUTE	UNEXPECTED_MSG		= 0x40
+ABSOLUTE	MSG_IN			= 0x50
+ABSOLUTE	SDTR_MSG_R		= 0x60
+ABSOLUTE	REJECT_MSG_R		= 0x70
+ABSOLUTE	DISCONNECT		= 0x80
+ABSOLUTE	MSG_OUT			= 0x90
+ABSOLUTE	WDTR_MSG_R		= 0xA0
+
+; S:
+ABSOLUTE	GOOD_STATUS 		= 0x1
+
+; Combinations, since the script assembler can't process |
+ABSOLUTE	NOT_MSG_OUT_AFTER_SELECTION = 0x110
+ABSOLUTE	UNEXPECTED_PHASE_BEFORE_CMD = 0x220
+ABSOLUTE	UNEXPECTED_PHASE_AFTER_CMD = 0x320
+ABSOLUTE	NOT_MSG_IN_AFTER_STATUS = 0x430
+ABSOLUTE	GOOD_STATUS_AFTER_STATUS = 0x401
+ABSOLUTE	UNEXPECTED_PHASE_AFTER_DATA_IN = 0x520
+ABSOLUTE	UNEXPECTED_PHASE_AFTER_DATA_OUT = 0x620
+ABSOLUTE	UNEXPECTED_MSG_BEFORE_CMD = 0x240
+ABSOLUTE	MSG_IN_BEFORE_CMD = 0x250
+ABSOLUTE	MSG_IN_AFTER_CMD = 0x350
+ABSOLUTE	SDTR_MSG_BEFORE_CMD = 0x260
+ABSOLUTE	REJECT_MSG_BEFORE_CMD = 0x270
+ABSOLUTE	DISCONNECT_AFTER_CMD = 0x380
+ABSOLUTE	SDTR_MSG_AFTER_CMD = 0x360
+ABSOLUTE	WDTR_MSG_AFTER_CMD = 0x3A0
+ABSOLUTE	DISCONNECT_AFTER_DATA = 0x580
+ABSOLUTE	MSG_IN_AFTER_DATA_IN = 0x550
+ABSOLUTE	MSG_IN_AFTER_DATA_OUT = 0x650
+ABSOLUTE	MSG_OUT_AFTER_DATA_IN = 0x590
+ABSOLUTE	DATA_IN_AFTER_DATA_IN = 0x5a0
+ABSOLUTE	MSG_IN_DURING_DATA_IN = 0x750
+ABSOLUTE	DISCONNECT_DURING_DATA = 0x780
+
+;
+; Other interrupt conditions
+; 
+ABSOLUTE	RESELECTED_DURING_SELECTION = 0x1000
+ABSOLUTE	COMPLETED_SELECTION_AS_TARGET = 0x1001
+ABSOLUTE	RESELECTION_IDENTIFIED = 0x1003
+;
+; Fatal interrupt conditions.  If you add to this, also add to the
+; array of corresponding messages
+;
+ABSOLUTE	FATAL = 0x2000
+ABSOLUTE	FATAL_UNEXPECTED_RESELECTION_MSG = 0x2000
+ABSOLUTE	FATAL_SEND_MSG = 0x2001
+ABSOLUTE	FATAL_NOT_MSG_IN_AFTER_SELECTION = 0x2002
+ABSOLUTE	FATAL_ILLEGAL_MSG_LENGTH = 0x2003
+
+ABSOLUTE	DEBUG_INTERRUPT	= 0x3000
+ABSOLUTE	DEBUG_INTERRUPT1 = 0x3001
+ABSOLUTE	DEBUG_INTERRUPT2 = 0x3002
+ABSOLUTE	DEBUG_INTERRUPT3 = 0x3003
+ABSOLUTE	DEBUG_INTERRUPT4 = 0x3004
+ABSOLUTE	DEBUG_INTERRUPT5 = 0x3005
+ABSOLUTE	DEBUG_INTERRUPT6 = 0x3006
+
+
+;
+; SCSI Messages we interpret in the script
+; 
+ABSOLUTE	EXTENDED_MSG		= 0x01
+ABSOLUTE	SDTR_MSG		= 0x01
+ABSOLUTE	SAVE_DATA_PTRS_MSG	= 0x02
+ABSOLUTE	RESTORE_DATA_PTRS_MSG	= 0x03
+ABSOLUTE	WDTR_MSG		= 0x03
+ABSOLUTE	DISCONNECT_MSG		= 0x04
+ABSOLUTE	REJECT_MSG		= 0x07
+ABSOLUTE	PARITY_ERROR_MSG	= 0x09
+ABSOLUTE	SIMPLE_TAG_MSG		= 0x20
+ABSOLUTE	IDENTIFY_MSG		= 0x80
+ABSOLUTE	IDENTIFY_MSG_MASK	= 0x7F
+ABSOLUTE	TWO_BYTE_MSG		= 0x20
+ABSOLUTE	TWO_BYTE_MSG_MASK	= 0x0F
+
+; This is where the script begins
+
+ENTRY	StartUp
+
+StartUp:
+	SELECT	ATN Device_ID, Reselect
+	JUMP	Finish, WHEN STATUS
+	JUMP	SendIdentifyMsg, IF MSG_OUT
+	INT	NOT_MSG_OUT_AFTER_SELECTION
+
+Reselect:
+	WAIT	RESELECT SelectedAsTarget
+	INT	RESELECTED_DURING_SELECTION, WHEN MSG_IN
+	INT	FATAL_NOT_MSG_IN_AFTER_SELECTION
+
+	ENTRY	GetReselectionData
+GetReselectionData:
+	MOVE	1, ReceiveMsgAddress, WHEN MSG_IN
+	INT	RESELECTION_IDENTIFIED
+
+	ENTRY	GetReselectionWithTag
+GetReselectionWithTag:
+	MOVE	3, ReceiveMsgAddress, WHEN MSG_IN
+	INT	RESELECTION_IDENTIFIED
+	
+	ENTRY	SelectedAsTarget
+SelectedAsTarget:
+; Basically tell the selecting device that there's nothing here
+	SET	TARGET
+	DISCONNECT
+	CLEAR	TARGET
+	INT	COMPLETED_SELECTION_AS_TARGET
+;
+; These are the messaging entries
+;
+; Send a message.  Message count should be correctly patched
+	ENTRY	SendMessage
+SendMessage:
+	MOVE	MessageCount, MessageLocation, WHEN MSG_OUT
+ResumeSendMessage:
+	RETURN,	WHEN NOT MSG_OUT
+	INT	FATAL_SEND_MSG
+
+	ENTRY	SendMessagePhaseMismatch
+SendMessagePhaseMismatch:
+	CLEAR	ACK
+	JUMP	ResumeSendMessage
+;
+; Receive a message.  Need to identify the message to
+; receive it correctly
+	ENTRY	ReceiveMessage
+ReceiveMessage:
+	MOVE	1, ReceiveMsgAddress, WHEN MSG_IN
+;
+; Use this entry if we've just tried to look at the first byte
+; of the message and want to process it further
+ProcessReceiveMessage:
+	JUMP	ReceiveExtendedMessage, IF EXTENDED_MSG
+	RETURN,	IF NOT TWO_BYTE_MSG, AND MASK TWO_BYTE_MSG_MASK
+	CLEAR	ACK
+	MOVE	1, ReceiveMsgAddress + 1, WHEN MSG_IN
+	RETURN
+ReceiveExtendedMessage:
+	CLEAR	ACK
+	MOVE	1, ReceiveMsgAddress + 1, WHEN MSG_IN
+	JUMP	Receive1Byte, IF 0x01
+	JUMP	Receive2Byte, IF 0x02
+	JUMP	Receive3Byte, IF 0x03
+	JUMP	Receive4Byte, IF 0x04
+	JUMP	Receive5Byte, IF 0x05
+	INT	FATAL_ILLEGAL_MSG_LENGTH
+Receive1Byte:
+	CLEAR	ACK
+	MOVE	1, ReceiveMsgAddress + 2, WHEN MSG_IN
+	RETURN
+Receive2Byte:
+	CLEAR	ACK
+	MOVE	2, ReceiveMsgAddress + 2, WHEN MSG_IN
+	RETURN
+Receive3Byte:
+	CLEAR	ACK
+	MOVE	3, ReceiveMsgAddress + 2, WHEN MSG_IN
+	RETURN
+Receive4Byte:
+	CLEAR	ACK
+	MOVE	4, ReceiveMsgAddress + 2, WHEN MSG_IN
+	RETURN
+Receive5Byte:
+	CLEAR	ACK
+	MOVE	5, ReceiveMsgAddress + 2, WHEN MSG_IN
+	RETURN
+;
+; Come here from the message processor to ignore the message
+;
+	ENTRY	IgnoreMessage
+IgnoreMessage:
+	CLEAR	ACK
+	RETURN
+;
+; Come here to send a reply to a message
+;
+	ENTRY	SendMessageWithATN
+SendMessageWithATN:
+	SET	ATN
+	CLEAR	ACK
+	JUMP	SendMessage
+
+SendIdentifyMsg:
+	CALL	SendMessage
+	JUMP	SendCommand
+
+IgnoreMsgBeforeCommand:
+	CLEAR	ACK
+	ENTRY	SendCommand
+SendCommand:
+	JUMP	Finish, WHEN STATUS
+	JUMP	MsgInBeforeCommand, IF MSG_IN
+	INT	UNEXPECTED_PHASE_BEFORE_CMD, IF NOT CMD
+	MOVE	CommandCount, CommandAddress, WHEN CMD
+ResumeSendCommand:
+	JUMP	Finish, WHEN STATUS
+	JUMP	MsgInAfterCmd, IF MSG_IN
+	JUMP	DataIn, IF DATA_IN
+	JUMP	DataOut, IF DATA_OUT
+	INT	UNEXPECTED_PHASE_AFTER_CMD
+
+IgnoreMsgDuringData:
+	CLEAR	ACK
+	; fall through to MsgInDuringData
+
+Entry MsgInDuringData
+MsgInDuringData:
+;
+; Could be we have nothing more to transfer
+;
+	JUMP	Finish, WHEN STATUS
+	MOVE	1, ReceiveMsgAddress, WHEN MSG_IN
+	JUMP	DisconnectDuringDataIn, IF DISCONNECT_MSG
+	JUMP	IgnoreMsgDuringData, IF SAVE_DATA_PTRS_MSG
+	JUMP	IgnoreMsgDuringData, IF RESTORE_DATA_PTRS_MSG
+	INT	MSG_IN_DURING_DATA_IN
+
+MsgInAfterCmd:
+	MOVE	1, ReceiveMsgAddress, WHEN MSG_IN
+	JUMP	DisconnectAfterCmd, IF DISCONNECT_MSG
+	JUMP	IgnoreMsgInAfterCmd, IF SAVE_DATA_PTRS_MSG
+	JUMP	IgnoreMsgInAfterCmd, IF RESTORE_DATA_PTRS_MSG
+	CALL	ProcessReceiveMessage
+	INT	MSG_IN_AFTER_CMD
+	CLEAR	ACK
+	JUMP	ResumeSendCommand
+
+IgnoreMsgInAfterCmd:
+	CLEAR	ACK
+	JUMP	ResumeSendCommand
+
+DisconnectAfterCmd:
+	CLEAR	ACK
+	WAIT	DISCONNECT
+	ENTRY	Disconnect1
+Disconnect1:
+	INT	DISCONNECT_AFTER_CMD
+	ENTRY	Disconnect2
+Disconnect2:
+; We return here after a reselection
+	CLEAR	ACK
+	JUMP	ResumeSendCommand
+
+MsgInBeforeCommand:
+	MOVE	1, ReceiveMsgAddress, WHEN MSG_IN
+	JUMP	IgnoreMsgBeforeCommand, IF SAVE_DATA_PTRS_MSG
+	JUMP	IgnoreMsgBeforeCommand, IF RESTORE_DATA_PTRS_MSG
+	CALL	ProcessReceiveMessage
+	INT	MSG_IN_BEFORE_CMD
+	CLEAR	ACK
+	JUMP	SendCommand
+
+DataIn:
+	CALL	SGScriptStartAddress
+ResumeDataIn:
+	JUMP	Finish, WHEN STATUS
+	JUMP	MsgInAfterDataIn, IF MSG_IN
+	JUMP	DataInAfterDataIn, if DATA_IN
+	INT	MSG_OUT_AFTER_DATA_IN, if MSG_OUT
+	INT	UNEXPECTED_PHASE_AFTER_DATA_IN
+
+DataInAfterDataIn:
+	INT	DATA_IN_AFTER_DATA_IN
+	JUMP	ResumeDataIn
+
+DataOut:
+	CALL	SGScriptStartAddress
+ResumeDataOut:
+	JUMP	Finish, WHEN STATUS
+	JUMP	MsgInAfterDataOut, IF MSG_IN
+	INT	UNEXPECTED_PHASE_AFTER_DATA_OUT
+
+MsgInAfterDataIn:
+	MOVE	1, ReceiveMsgAddress, WHEN MSG_IN
+	JUMP	DisconnectAfterDataIn, IF DISCONNECT_MSG
+	JUMP	IgnoreMsgAfterData, IF SAVE_DATA_PTRS_MSG
+	JUMP	IgnoreMsgAfterData, IF RESTORE_DATA_PTRS_MSG
+	CALL	ProcessReceiveMessage
+	INT	MSG_IN_AFTER_DATA_IN
+	CLEAR	ACK
+	JUMP	ResumeDataIn
+
+DisconnectDuringDataIn:
+	CLEAR	ACK
+	WAIT	DISCONNECT
+	ENTRY	Disconnect3
+Disconnect3:
+	INT	DISCONNECT_DURING_DATA
+	ENTRY	Disconnect4
+Disconnect4:
+; we return here after a reselection
+	CLEAR	ACK
+	JUMP	ResumeSendCommand
+
+
+DisconnectAfterDataIn:
+	CLEAR	ACK
+	WAIT	DISCONNECT
+	ENTRY	Disconnect5
+Disconnect5:
+	INT	DISCONNECT_AFTER_DATA
+	ENTRY	Disconnect6
+Disconnect6:
+; we return here after a reselection
+	CLEAR	ACK
+	JUMP	ResumeDataIn
+
+MsgInAfterDataOut:
+	MOVE	1, ReceiveMsgAddress, WHEN MSG_IN
+	JUMP	DisconnectAfterDataOut, if DISCONNECT_MSG
+	JUMP	IgnoreMsgAfterData, IF SAVE_DATA_PTRS_MSG
+	JUMP	IgnoreMsgAfterData, IF RESTORE_DATA_PTRS_MSG
+	CALL	ProcessReceiveMessage
+	INT	MSG_IN_AFTER_DATA_OUT
+	CLEAR	ACK
+	JUMP	ResumeDataOut
+
+IgnoreMsgAfterData:
+	CLEAR	ACK
+; Data in and out do the same thing on resume, so pick one
+	JUMP	ResumeDataIn
+
+DisconnectAfterDataOut:
+	CLEAR	ACK
+	WAIT	DISCONNECT
+	ENTRY	Disconnect7
+Disconnect7:
+	INT	DISCONNECT_AFTER_DATA
+	ENTRY	Disconnect8
+Disconnect8:
+; we return here after a reselection
+	CLEAR	ACK
+	JUMP	ResumeDataOut
+
+Finish:
+	MOVE	1, StatusAddress, WHEN STATUS
+	INT	NOT_MSG_IN_AFTER_STATUS, WHEN NOT MSG_IN
+	CALL	ReceiveMessage
+	CLEAR	ACK
+	WAIT	DISCONNECT
+	ENTRY	Finish1
+Finish1:
+	INT	GOOD_STATUS_AFTER_STATUS
+	ENTRY	Finish2
+Finish2:
+
diff -urN linux-2.4.10-pre6/drivers/scsi/Config.in linux/drivers/scsi/Config.in
--- linux-2.4.10-pre6/drivers/scsi/Config.in	Thu Jul  5 11:28:16 2001
+++ linux/drivers/scsi/Config.in	Mon Dec  3 23:08:46 2001
@@ -33,7 +33,7 @@
 comment 'SCSI low-level drivers'
 
 if [ "$CONFIG_SGI_IP22" = "y" ]; then
-   dep_tristate 'SGI WD93C93 SCSI Driver' CONFIG_SCSI_SGIWD93 $CONFIG_SCSI
+   dep_tristate 'SGI WD93C93 SCSI Driver' CONFIG_SGIWD93_SCSI $CONFIG_SCSI
 fi
 if [ "$CONFIG_DECSTATION" = "y" ]; then
    if [ "$CONFIG_TC" = "y" ]; then
@@ -59,6 +59,7 @@
       bool '  Collect statistics to report in /proc' CONFIG_AIC7XXX_OLD_PROC_STATS
    fi
 fi
+dep_tristate 'Adaptec I2O RAID support ' CONFIG_SCSI_DPT_I2O $CONFIG_SCSI
 dep_tristate 'AdvanSys SCSI support' CONFIG_SCSI_ADVANSYS $CONFIG_SCSI
 dep_tristate 'Always IN2000 SCSI support' CONFIG_SCSI_IN2000 $CONFIG_SCSI
 dep_tristate 'AM53/79C974 PCI SCSI support' CONFIG_SCSI_AM53C974 $CONFIG_SCSI $CONFIG_PCI
@@ -85,7 +86,7 @@
 if [ "$CONFIG_MCA" = "y" ]; then
    dep_tristate 'Future Domain MCS-600/700 SCSI support' CONFIG_SCSI_FD_MCS $CONFIG_SCSI
 fi
-dep_tristate 'GDT SCSI Disk Array Controller support' CONFIG_SCSI_GDTH $CONFIG_SCSI
+dep_tristate 'Intel/ICP (former GDT SCSI Disk Array) RAID Controller support' CONFIG_SCSI_GDTH $CONFIG_SCSI
 dep_tristate 'Generic NCR5380/53c400 SCSI support' CONFIG_SCSI_GENERIC_NCR5380 $CONFIG_SCSI
 if [ "$CONFIG_SCSI_GENERIC_NCR5380" != "n" ]; then
    bool '  Enable NCR53c400 extensions' CONFIG_SCSI_GENERIC_NCR53C400
@@ -114,6 +115,10 @@
    fi
 fi
 dep_tristate 'NCR53c406a SCSI support' CONFIG_SCSI_NCR53C406A $CONFIG_SCSI
+dep_tristate 'NCR Dual 700 MCA SCSI support' CONFIG_SCSI_NCR_D700 $CONFIG_SCSI $CONFIG_MCA
+if [ "$CONFIG_PARISC" = "y" ]; then
+   dep_tristate 'HP LASI SCSI support for 53c700' CONFIG_SCSI_LASI70 $CONFIG_SCSI
+fi
 dep_tristate 'NCR53c7,8xx SCSI support'  CONFIG_SCSI_NCR53C7xx $CONFIG_SCSI $CONFIG_PCI
 if [ "$CONFIG_SCSI_NCR53C7xx" != "n" ]; then
    bool '  always negotiate synchronous transfers' CONFIG_SCSI_NCR53C7xx_sync
@@ -151,6 +156,9 @@
 if [ "$CONFIG_PCI" = "y" ]; then
    dep_tristate 'Qlogic ISP SCSI support' CONFIG_SCSI_QLOGIC_ISP $CONFIG_SCSI
    dep_tristate 'Qlogic ISP FC SCSI support' CONFIG_SCSI_QLOGIC_FC $CONFIG_SCSI
+   if [ "$CONFIG_SCSI_QLOGIC_FC" != "n" ]; then
+      bool '   Include loadable firmware in driver' CONFIG_SCSI_QLOGIC_FC_FIRMWARE
+   fi
    dep_tristate 'Qlogic QLA 1280 SCSI support' CONFIG_SCSI_QLOGIC_1280 $CONFIG_SCSI
 fi
 if [ "$CONFIG_X86" = "y" ]; then
diff -urN linux-2.4.10-pre6/drivers/scsi/Makefile linux/drivers/scsi/Makefile
--- linux-2.4.10-pre6/drivers/scsi/Makefile	Fri May  4 15:16:28 2001
+++ linux/drivers/scsi/Makefile	Mon Dec  3 23:08:46 2001
@@ -31,7 +31,7 @@
   endif
 endif
 
-export-objs	:= scsi_syms.o
+export-objs	:= scsi_syms.o 53c700.o 53c700-mem.o
 
 CFLAGS_aha152x.o =   -DAHA152X_STAT -DAUTOCONF
 CFLAGS_gdth.o    = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ -DGDTH_STATISTICS
@@ -47,6 +47,7 @@
 obj-$(CONFIG_A2091_SCSI)	+= a2091.o	wd33c93.o
 obj-$(CONFIG_GVP11_SCSI)	+= gvp11.o	wd33c93.o
 obj-$(CONFIG_MVME147_SCSI)	+= mvme147.o	wd33c93.o
+obj-$(CONFIG_SGIWD93_SCSI)	+= sgiwd93.o	wd33c93.o
 obj-$(CONFIG_CYBERSTORM_SCSI)	+= NCR53C9x.o	cyberstorm.o
 obj-$(CONFIG_CYBERSTORMII_SCSI)	+= NCR53C9x.o	cyberstormII.o
 obj-$(CONFIG_BLZ2060_SCSI)	+= NCR53C9x.o	blz2060.o
@@ -65,6 +66,7 @@
 obj-$(CONFIG_SCSI_PCI2220I)	+= pci2220i.o
 obj-$(CONFIG_SCSI_PSI240I)	+= psi240i.o
 obj-$(CONFIG_SCSI_BUSLOGIC)	+= BusLogic.o
+obj-$(CONFIG_SCSI_DPT_I2O)	+= dpt_i2o.o
 obj-$(CONFIG_SCSI_U14_34F)	+= u14-34f.o
 obj-$(CONFIG_SCSI_ULTRASTOR)	+= ultrastor.o
 obj-$(CONFIG_SCSI_AHA152X)	+= aha152x.o
@@ -80,6 +82,7 @@
 obj-$(CONFIG_SCSI_IN2000)	+= in2000.o
 obj-$(CONFIG_SCSI_GENERIC_NCR5380) += g_NCR5380.o
 obj-$(CONFIG_SCSI_NCR53C406A)	+= NCR53c406a.o
+obj-$(CONFIG_SCSI_NCR_D700)	+= NCR_D700.o 53c700.o
 obj-$(CONFIG_SCSI_SYM53C416)	+= sym53c416.o
 obj-$(CONFIG_SCSI_QLOGIC_FAS)	+= qlogicfas.o
 obj-$(CONFIG_SCSI_QLOGIC_ISP)	+= qlogicisp.o 
@@ -121,6 +124,8 @@
 obj-$(CONFIG_SUN3X_ESP)		+= NCR53C9x.o	sun3x_esp.o
 obj-$(CONFIG_SCSI_DEBUG)	+= scsi_debug.o
 obj-$(CONFIG_SCSI_FCAL)		+= fcal.o
+obj-$(CONFIG_SCSI_CPQFCTS)	+= cpqfc.o
+obj-$(CONFIG_SCSI_LASI700)	+= lasi700.o 53c700-mem.o
 
 ifeq ($(CONFIG_ARCH_ACORN),y)
 mod-subdirs	+= ../acorn/scsi
@@ -193,3 +198,22 @@
 sim710_u.h: sim710_d.h
 
 sim710.o : sim710_d.h
+
+53c700_d.h: 53c700.scr script_asm.pl
+	$(PERL) -s script_asm.pl -ncr7x0_family < 53c700.scr
+	rm -f scriptu.h
+	mv script.h 53c700_d.h
+
+53c700.o: 53c700_d.h
+
+53c700-mem.o: 53c700_d.h
+
+53c700-mem.c: 53c700.c
+	echo "/* WARNING: GENERATED FILE (from $<), DO NOT MODIFY */" > $@
+	echo "#define MEM_MAPPED" >> $@
+	cat $< >> $@
+
+cpqfc.o: cpqfcTSinit.o cpqfcTScontrol.o cpqfcTSi2c.o cpqfcTSworker.o \
+	cpqfcTStrigger.o
+	$(LD) -r -o cpqfc.o cpqfcTSinit.o cpqfcTScontrol.o \
+	cpqfcTSi2c.o cpqfcTSworker.o cpqfcTStrigger.o
diff -urN linux-2.4.10-pre6/drivers/scsi/NCR_D700.c linux/drivers/scsi/NCR_D700.c
--- linux-2.4.10-pre6/drivers/scsi/NCR_D700.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/NCR_D700.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,326 @@
+/* -*- mode: c; c-basic-offset: 8 -*- */
+
+/* NCR Dual 700 MCA SCSI Driver
+ *
+ * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
+**-----------------------------------------------------------------------------
+**  
+**  This program is free software; you can redistribute it and/or modify
+**  it under the terms of the GNU General Public License as published by
+**  the Free Software Foundation; either version 2 of the License, or
+**  (at your option) any later version.
+**
+**  This program is distributed in the hope that it will be useful,
+**  but WITHOUT ANY WARRANTY; without even the implied warranty of
+**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+**  GNU General Public License for more details.
+**
+**  You should have received a copy of the GNU General Public License
+**  along with this program; if not, write to the Free Software
+**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+**
+**-----------------------------------------------------------------------------
+ */
+
+/* Notes:
+ *
+ * Most of the work is done in the chip specific module, 53c700.o
+ *
+ * TODO List:
+ *
+ * 1. Extract the SCSI ID from the voyager CMOS table (necessary to
+ *    support multi-host environments.
+ *
+ * */
+
+
+/* CHANGELOG 
+ *
+ * Version 2.1
+ *
+ * Modularise the driver into a Board piece (this file) and a chip
+ * piece 53c700.[ch] and 53c700.scr, added module options.  You can
+ * now specify the scsi id by the parameters
+ *
+ * NCR_D700=slot:<n> [siop:<n>] id:<n> ....
+ *
+ * They need to be comma separated if compiled into the kernel
+ *
+ * Version 2.0
+ *
+ * Initial implementation of TCQ (Tag Command Queueing).  TCQ is full
+ * featured and uses the clock algorithm to keep track of outstanding
+ * tags and guard against individual tag starvation.  Also fixed a bug
+ * in all of the 1.x versions where the D700_data_residue() function
+ * was returning results off by 32 bytes (and thus causing the same 32
+ * bytes to be written twice corrupting the data block).  It turns out
+ * the 53c700 only has a 6 bit DBC and DFIFO registers not 7 bit ones
+ * like the 53c710 (The 710 is the only data manual still available,
+ * which I'd been using to program the 700).
+ *
+ * Version 1.2
+ *
+ * Much improved message handling engine
+ *
+ * Version 1.1
+ *
+ * Add code to handle selection reasonably correctly.  By the time we
+ * get the selection interrupt, we've already responded, but drop off the
+ * bus and hope the selector will go away.
+ *
+ * Version 1.0:
+ *
+ *   Initial release.  Fully functional except for procfs and tag
+ * command queueing.  Has only been tested on cards with 53c700-66
+ * chips and only single ended. Features are
+ *
+ * 1. Synchronous data transfers to offset 8 (limit of 700-66) and
+ *    100ns (10MHz) limit of SCSI-2
+ *
+ * 2. Disconnection and reselection
+ *
+ * Testing:
+ * 
+ *  I've only really tested this with the 700-66 chip, but have done
+ * soak tests in multi-device environments to verify that
+ * disconnections and reselections are being processed correctly.
+ * */
+
+#define NCR_D700_VERSION "2.1"
+
+#include <linux/config.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/spinlock.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/mca.h>
+#include <asm/dma.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/byteorder.h>
+#include <linux/blk.h>
+#include <linux/module.h>
+
+
+#include "scsi.h"
+#include "hosts.h"
+#include "constants.h"
+
+#include "53c700.h"
+#include "NCR_D700.h"
+
+#ifndef CONFIG_MCA
+#error "NCR_D700 driver only compiles for MCA"
+#endif
+
+#ifdef NCR_D700_DEBUG
+#define STATIC
+#else
+#define STATIC static
+#endif
+
+char *NCR_D700;			/* command line from insmod */
+
+MODULE_AUTHOR("James Bottomley");
+MODULE_DESCRIPTION("NCR Dual700 SCSI Driver");
+MODULE_LICENSE("GPL");
+MODULE_PARM(NCR_D700, "s");
+
+static __u8 __initdata id_array[2*(MCA_MAX_SLOT_NR + 1)] =
+	{ [0 ... 2*(MCA_MAX_SLOT_NR + 1)-1] = 7 };
+
+#ifdef MODULE
+#define ARG_SEP ' '
+#else
+#define ARG_SEP ','
+#endif
+
+static int __init
+param_setup(char *string)
+{
+	char *pos = string, *next;
+	int slot = -1, siop = -1;
+
+	while(pos != NULL && (next = strchr(pos, ':')) != NULL) {
+		int val = (int)simple_strtoul(++next, NULL, 0);
+
+		if(!strncmp(pos, "slot:", 5))
+			slot = val;
+		else if(!strncmp(pos, "siop:", 5))
+			siop = val;
+		else if(!strncmp(pos, "id:", 3)) {
+			if(slot == -1) {
+				printk(KERN_WARNING "NCR D700: Must specify slot for id parameter\n");
+			} else if(slot > MCA_MAX_SLOT_NR) {
+				printk(KERN_WARNING "NCR D700: Illegal slot %d for id %d\n", slot, val);
+			} else {
+				if(siop != 0 && siop != 1) {
+					id_array[slot*2] = val;
+					id_array[slot*2 + 1] =val;
+				} else {
+					id_array[slot*2 + siop] = val;
+				}
+			}
+		}
+		if((pos = strchr(pos, ARG_SEP)) != NULL)
+			pos++;
+	}
+	return 1;
+}
+
+#ifndef MODULE
+__setup("NCR_D700=", param_setup);
+#endif
+
+/* Detect a D700 card.  Note, because of the set up---the chips are
+ * essentially connectecd to the MCA bus independently, it is easier
+ * to set them up as two separate host adapters, rather than one
+ * adapter with two channels */
+STATIC int __init
+D700_detect(Scsi_Host_Template *tpnt)
+{
+	int slot = 0;
+	int found = 0;
+	int differential;
+	int banner = 1;
+
+	if(!MCA_bus)
+		return 0;
+
+#ifdef MODULE
+	if(NCR_D700)
+		param_setup(NCR_D700);
+#endif
+
+	for(slot = 0; (slot = mca_find_adapter(NCR_D700_MCA_ID, slot)) != MCA_NOTFOUND; slot++) {
+		int irq, i;
+		int pos3j, pos3k, pos3a, pos3b, pos4;
+		__u32 base_addr, offset_addr;
+		struct Scsi_Host *host = NULL;
+
+		/* enable board interrupt */
+		pos4 = mca_read_pos(slot, 4);
+		pos4 |= 0x4;
+		mca_write_pos(slot, 4, pos4);
+
+		mca_write_pos(slot, 6, 9);
+		pos3j = mca_read_pos(slot, 3);
+		mca_write_pos(slot, 6, 10);
+		pos3k = mca_read_pos(slot, 3);
+		mca_write_pos(slot, 6, 0);
+		pos3a = mca_read_pos(slot, 3);
+		mca_write_pos(slot, 6, 1);
+		pos3b = mca_read_pos(slot, 3);
+
+		base_addr = ((pos3j << 8) | pos3k) & 0xfffffff0;
+		offset_addr = ((pos3a << 8) | pos3b) & 0xffffff70;
+
+		irq = (pos4 & 0x3) + 11;
+		if(irq >= 13)
+			irq++;
+		if(banner) {
+			printk(KERN_NOTICE "NCR D700: Driver Version " NCR_D700_VERSION "\n"
+			       "NCR D700:  Copyright (c) 2001 by James.Bottomley@HansenPartnership.com\n"
+			       "NCR D700:\n");
+			banner = 0;
+		}
+		printk(KERN_NOTICE "NCR D700: found in slot %d  irq = %d  I/O base = 0x%x\n", slot, irq, offset_addr);
+
+		tpnt->proc_name = "NCR_D700";
+
+		/*outb(BOARD_RESET, base_addr);*/
+
+		/* clear any pending interrupts */
+		(void)inb(base_addr + 0x08);
+		/* get modctl, used later for setting diff bits */
+		switch(differential = (inb(base_addr + 0x08) >> 6)) {
+		case 0x00:
+			/* only SIOP1 differential */
+			differential = 0x02;
+			break;
+		case 0x01:
+			/* Both SIOPs differential */
+			differential = 0x03;
+			break;
+		case 0x03:
+			/* No SIOPs differential */
+			differential = 0x00;
+			break;
+		default:
+			printk(KERN_ERR "D700: UNEXPECTED DIFFERENTIAL RESULT 0x%02x\n",
+			       differential);
+			differential = 0x00;
+			break;
+		}
+
+		/* plumb in both 700 chips */
+		for(i=0; i<2; i++) {
+			__u32 region = offset_addr | (0x80 * i);
+			struct NCR_700_Host_Parameters *hostdata =
+				kmalloc(sizeof(struct NCR_700_Host_Parameters),
+					GFP_KERNEL);
+			if(hostdata == NULL) {
+				printk(KERN_ERR "NCR D700: Failed to allocate host data for channel %d, detatching\n", i);
+				continue;
+			}
+			memset(hostdata, 0, sizeof(struct NCR_700_Host_Parameters));
+			if(request_region(region, 64, "NCR_D700") == NULL) {
+				printk(KERN_ERR "NCR D700: Failed to reserve IO region 0x%x\n", region);
+				kfree(hostdata);
+				continue;
+			}
+
+			/* Fill in the three required pieces of hostdata */
+			hostdata->base = region;
+			hostdata->differential = (((1<<i) & differential) != 0);
+			hostdata->clock = NCR_D700_CLOCK_MHZ;
+			/* and register the chip */
+			if((host = NCR_700_detect(tpnt, hostdata)) == NULL) {
+				kfree(hostdata);
+				release_region(host->base, 64);
+				continue;
+			}
+			host->irq = irq;
+			/* FIXME: Read this from SUS */
+			host->this_id = id_array[slot * 2 + i];
+			printk(KERN_NOTICE "NCR D700: SIOP%d, SCSI id is %d\n",
+			       i, host->this_id);
+			if(request_irq(irq, NCR_700_intr, SA_SHIRQ, "NCR_D700", host)) {
+				printk(KERN_ERR "NCR D700, channel %d: irq problem, detatching\n", i);
+				scsi_unregister(host);
+				NCR_700_release(host);
+				continue;
+			}
+			found++;
+		}
+	}
+
+	return found;
+}
+
+
+STATIC int
+D700_release(struct Scsi_Host *host)
+{
+	struct D700_Host_Parameters *hostdata = 
+		(struct D700_Host_Parameters *)host->hostdata[0];
+
+	NCR_700_release(host);
+	kfree(hostdata);
+	free_irq(host->irq, host);
+	release_region(host->base, 64);
+	return 1;
+}
+
+
+static Scsi_Host_Template driver_template = NCR_D700_SCSI;
+
+#include "scsi_module.c"
+
diff -urN linux-2.4.10-pre6/drivers/scsi/NCR_D700.h linux/drivers/scsi/NCR_D700.h
--- linux-2.4.10-pre6/drivers/scsi/NCR_D700.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/NCR_D700.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,45 @@
+/* -*- mode: c; c-basic-offset: 8 -*- */
+
+/* NCR Dual 700 MCA SCSI Driver
+ *
+ * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
+ */
+
+#ifndef _NCR_D700_H
+#define _NCR_D700_H
+
+/* Don't turn on debugging messages */
+#undef NCR_D700_DEBUG
+
+/* The MCA identifier */
+#define NCR_D700_MCA_ID		0x0092
+
+static int D700_detect(Scsi_Host_Template *);
+static int D700_release(struct Scsi_Host *host);
+
+
+/* Host template.  Note the name and proc_name are optional, all the
+ * remaining parameters shown below must be filled in.  The 53c700
+ * routine NCR_700_detect will fill in all of the missing routines */
+#define NCR_D700_SCSI {						\
+	name:				"NCR Dual 700 MCA",	\
+	proc_name:			"NCR_D700",		\
+	detect: 			D700_detect,		\
+	release:			D700_release,		\
+	this_id:			7,			\
+}
+
+
+/* Defines for the Board registers */
+#define	BOARD_RESET		0x80	/* board level reset */
+#define ADD_PARENB		0x04	/* Address Parity Enabled */
+#define DAT_PARENB		0x01	/* Data Parity Enabled */
+#define SFBK_ENB		0x10	/* SFDBK Interrupt Enabled */
+#define LED0GREEN		0x20	/* Led 0 (red 0; green 1) */
+#define LED1GREEN		0x40	/* Led 1 (red 0; green 1) */
+#define LED0RED			0xDF	/* Led 0 (red 0; green 1) */
+#define LED1RED			0xBF	/* Led 1 (red 0; green 1) */
+
+#define NCR_D700_CLOCK_MHZ	50
+
+#endif
diff -urN linux-2.4.10-pre6/drivers/scsi/README.53c700 linux/drivers/scsi/README.53c700
--- linux-2.4.10-pre6/drivers/scsi/README.53c700	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/README.53c700	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,17 @@
+This driver supports the 53c700 and 53c700-66 chips only.  It is full
+featured and does sync (-66 only), disconnects and tag command
+queueing.
+
+Since the 53c700 must be interfaced to a bus, you need to wrapper the
+card detector around this driver.  For an example, see the
+NCR_D700.[ch] files.
+
+The comments in the 53c700.[ch] files tell you which parts you need to
+fill in to get the driver working.
+
+The driver is currently I/O mapped only, but it should be easy enough
+to memory map (just make the port reads #defines with MEM_MAPPED for
+memory mapping or nothing for I/O mapping, specify an extra rule for
+53c700-mem.o with the -DMEM_MAPPED flag and make your driver use it,
+that way the make rules will generate the correct version).
+
diff -urN linux-2.4.10-pre6/drivers/scsi/README.dpti linux/drivers/scsi/README.dpti
--- linux-2.4.10-pre6/drivers/scsi/README.dpti	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/README.dpti	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,83 @@
+ /* TERMS AND CONDITIONS OF USE
+ * 
+ * Redistribution and use in source form, with or without modification, are
+ * permitted provided that redistributions of source code must retain the
+ * above copyright notice, this list of conditions and the following disclaimer.
+ * 
+ * This software is provided `as is' by Adaptec and
+ * any express or implied warranties, including, but not limited to, the
+ * implied warranties of merchantability and fitness for a particular purpose,
+ * are disclaimed. In no event shall Adaptec be
+ * liable for any direct, indirect, incidental, special, exemplary or
+ * consequential damages (including, but not limited to, procurement of
+ * substitute goods or services; loss of use, data, or profits; or business
+ * interruptions) however caused and on any theory of liability, whether in
+ * contract, strict liability, or tort (including negligence or otherwise)
+ * arising in any way out of the use of this driver software, even if advised
+ * of the possibility of such damage.
+ * 
+ ****************************************************************
+ * This driver supports the Adaptec I2O RAID and DPT SmartRAID V I2O boards.
+ *
+ * CREDITS:
+ * The original linux driver was ported to Linux by Karen White while at 
+ * Dell Computer.  It was ported from Bob Pasteur's (of DPT) original 
+ * non-Linux driver.  Mark Salyzyn and Bob Pasteur consulted on the original
+ * driver. 
+ * 
+ * 2.0 version of the driver by Deanna Bonds and Mark Salyzyn.
+ *
+ * HISTORY:
+ * The driver was originally ported to linux version 2.0.34 
+ *
+ * V2.0 Rewrite of driver.  Re-architectured based on i2o subsystem.
+ *   This was the first full GPL version since the last version used
+ *   i2osig headers which were not GPL.  Developer Testing version.
+ * V2.1 Internal testing
+ * V2.2 First released version
+ *
+ * V2.3 
+ *   Changes:
+ *      Added Raptor Support
+ *      Fixed bug causing system to hang under extreme load with 
+ *         management utilities running (removed GFP_DMA from kmalloc flags)
+ *
+ *
+ * V2.4 First version ready to be submitted to be embedded in the kernel
+ *   Changes: 
+ *      Implemented suggestions from Alan Cox
+ *      Added calculation of resid for sg layer
+ *      Better error handling
+ *         Added checking underflow condtions 
+ *         Added DATAPROTECT checking
+ *         Changed error return codes
+ *         Fixed pointer bug in bus reset routine
+ *      Enabled hba reset from ioctls (allows a FW flash to reboot and use the new
+ *         FW without having to reboot)
+ *      Changed proc output
+ *
+ * TODO:
+ *      Add 64 bit Scatter Gather when compiled on 64 bit architectures
+ *      Add sparse lun scanning 
+ *      Add code that checks if a device that had been taken offline is
+ *         now online (at the FW level) when test unit ready or inquiry 
+ *         command from scsi-core
+ *      Add proc read interface
+ *         busrescan command
+ *         rescan command
+ *      Add code to rescan routine that notifies scsi-core about new devices
+ *      Add support for C-PCI (hotplug stuff)
+ *      Add ioctl passthru error recovery
+ *
+ * NOTES:
+ * The DPT card optimizes the order of processing commands.  Consequently,
+ * a command may take up to 6 minutes to complete after it has been sent
+ * to the board.  
+ *
+ * The files dpti_ioctl.h dptsig.h osd_defs.h osd_util.h sys_info.h are part of the
+ * interface files for Adaptecs managment routines.  These define the structures used
+ * in the ioctls.  They are written to be portable.  They are hard to read, but I need
+ * to use them 'as is' or I can miss changes in the interface.
+ *
+ */
+
diff -urN linux-2.4.10-pre6/drivers/scsi/dec_esp.c linux/drivers/scsi/dec_esp.c
--- linux-2.4.10-pre6/drivers/scsi/dec_esp.c	Thu Jul  5 11:28:16 2001
+++ linux/drivers/scsi/dec_esp.c	Mon Dec  3 23:08:46 2001
@@ -9,6 +9,14 @@
  * Copyright (C) 1997 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
  *
  * jazz_esp is based on David S. Miller's ESP driver and cyber_esp
+ *
+ * 20000819 - Small PMAZ-AA fixes by Florian Lohoff <flo@rfc822.org>
+ *            Be warned the PMAZ-AA works currently as a single card.
+ *            Dont try to put multiple cards in one machine - They are
+ *            both detected but it may crash under high load garbling your
+ *            data.
+ * 20001005	- Initialization fixes for 2.4.0-test9
+ * 			  Florian Lohoff <flo@rfc822.org>
  */
 
 #include <linux/kernel.h>
@@ -45,8 +53,6 @@
  * starting point. #define this an be prepared for tons
  * of warnings and errors :)
  */
-#undef PMAZ_A
-
 static int  dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
 static void dma_drain(struct NCR_ESP *esp);
 static int  dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd * sp);
@@ -62,7 +68,6 @@
 static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd * sp);
 static void dma_advance_sg(Scsi_Cmnd * sp);
 
-#ifdef PMAZ_A
 static void pmaz_dma_drain(struct NCR_ESP *esp);
 static void pmaz_dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
 static void pmaz_dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
@@ -70,10 +75,6 @@
 static void pmaz_dma_ints_on(struct NCR_ESP *esp);
 static void pmaz_dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp);
-static void pmaz_dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd * sp);
-
-volatile int *scsi_pmaz_dma_ptr_tc;
-#endif
 
 #define TC_ESP_RAM_SIZE 0x20000
 #define ESP_TGT_DMA_SIZE ((TC_ESP_RAM_SIZE/7) & ~(sizeof(int)-1))
@@ -83,9 +84,6 @@
 #define TC_ESP_DMAR_WRITE 0x80000000
 #define TC_ESP_DMA_ADDR(x) ((unsigned)(x) & TC_ESP_DMAR_MASK)
 
-volatile unsigned char *scsi_pmaz_dma_ptrs_tc[ESP_NCMD];
-unsigned char scsi_pmaz_dma_buff_used[ESP_NCMD];
-unsigned char scsi_cur_buff = 1;	/* Leave space for command buffer */
 __u32 esp_virt_buffer;
 int scsi_current_length;
 
@@ -105,20 +103,21 @@
 
 static void scsi_dma_int(int, void *, struct pt_regs *);
 
+static Scsi_Host_Template driver_template = SCSI_DEC_ESP;
+
+#include "scsi_module.c"
+
 /***************************************************************** Detection */
 int dec_esp_detect(Scsi_Host_Template * tpnt)
 {
 	struct NCR_ESP *esp;
 	struct ConfigDev *esp_dev;
-#ifdef PMAZ_A
-	int slot, i;
+	int slot;
 	unsigned long mem_start;
-	volatile unsigned char *buffer;
-#endif
 
 	if (IOASIC) {
-	esp_dev = 0;
-	esp = esp_allocate(tpnt, (void *) esp_dev);
+		esp_dev = 0;
+		esp = esp_allocate(tpnt, (void *) esp_dev);
 	
 		scsi_dma_ptr = (unsigned long *) (system_base + IOCTL + SCSI_DMA_P);
 		scsi_next_ptr = (unsigned long *) (system_base + IOCTL + SCSI_DMA_BP);
@@ -127,86 +126,89 @@
 		scsi_sdr0 = (unsigned long *) (system_base + IOCTL + SCSI_SDR0);
 		scsi_sdr1 = (unsigned long *) (system_base + IOCTL + SCSI_SDR1);
 
-	/* Do command transfer with programmed I/O */
-	esp->do_pio_cmds = 1;
+		/* Do command transfer with programmed I/O */
+		esp->do_pio_cmds = 1;
 	
-	/* Required functions */
-	esp->dma_bytes_sent = &dma_bytes_sent;
-	esp->dma_can_transfer = &dma_can_transfer;
-	esp->dma_dump_state = &dma_dump_state;
-	esp->dma_init_read = &dma_init_read;
-	esp->dma_init_write = &dma_init_write;
-	esp->dma_ints_off = &dma_ints_off;
-	esp->dma_ints_on = &dma_ints_on;
-	esp->dma_irq_p = &dma_irq_p;
-	esp->dma_ports_p = &dma_ports_p;
-	esp->dma_setup = &dma_setup;
+		/* Required functions */
+		esp->dma_bytes_sent = &dma_bytes_sent;
+		esp->dma_can_transfer = &dma_can_transfer;
+		esp->dma_dump_state = &dma_dump_state;
+		esp->dma_init_read = &dma_init_read;
+		esp->dma_init_write = &dma_init_write;
+		esp->dma_ints_off = &dma_ints_off;
+		esp->dma_ints_on = &dma_ints_on;
+		esp->dma_irq_p = &dma_irq_p;
+		esp->dma_ports_p = &dma_ports_p;
+		esp->dma_setup = &dma_setup;
 
-	/* Optional functions */
-	esp->dma_barrier = 0;
+		/* Optional functions */
+		esp->dma_barrier = 0;
 		esp->dma_drain = &dma_drain;
-	esp->dma_invalidate = 0;
-	esp->dma_irq_entry = 0;
-	esp->dma_irq_exit = 0;
-	esp->dma_poll = 0;
-	esp->dma_reset = 0;
-	esp->dma_led_off = 0;
-	esp->dma_led_on = 0;
-	
-	/* virtual DMA functions */
-	esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
-	esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
+		esp->dma_invalidate = 0;
+		esp->dma_irq_entry = 0;
+		esp->dma_irq_exit = 0;
+		esp->dma_poll = 0;
+		esp->dma_reset = 0;
+		esp->dma_led_off = 0;
+		esp->dma_led_on = 0;
+		
+		/* virtual DMA functions */
+		esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
+		esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
 		esp->dma_mmu_release_scsi_one = 0;
 		esp->dma_mmu_release_scsi_sgl = 0;
-	esp->dma_advance_sg = &dma_advance_sg;
+		esp->dma_advance_sg = &dma_advance_sg;
 
 
-	/* SCSI chip speed */
+		/* SCSI chip speed */
 		esp->cfreq = 25000000;
 
-	/*
-	 * we don't give the address of DMA channel, but the number
-	 * of DMA channel, so we can use the jazz DMA functions
-	 *
-	 */
-	esp->dregs = JAZZ_SCSI_DMA;
+		/*
+		 * we don't give the address of DMA channel, but the number
+		 * of DMA channel, so we can use the jazz DMA functions
+		 *
+		 */
+		esp->dregs = JAZZ_SCSI_DMA;
 	
-	/* ESP register base */
+		/* ESP register base */
 		esp->eregs = (struct ESP_regs *) (system_base + SCSI);
 	
-	/* Set the command buffer */
+		/* Set the command buffer */
 		esp->esp_command = (volatile unsigned char *) cmd_buffer;
 	
-	/* get virtual dma address for command buffer */
+		/* get virtual dma address for command buffer */
 		esp->esp_command_dvma = (__u32) KSEG1ADDR((volatile unsigned char *) cmd_buffer);
 	
 		esp->irq = SCSI_INT;
+
+		esp->scsi_id = 7;
+		
+		/* Check for differential SCSI-bus */
+		esp->diff = 0;
+
+		esp_initialize(esp);
+
 		if (request_irq(esp->irq, esp_intr, SA_INTERRUPT, 
 				"NCR 53C94 SCSI", NULL))
 			goto err_dealloc;
 		if (request_irq(SCSI_DMA_INT, scsi_dma_int, SA_INTERRUPT, 
 				"JUNKIO SCSI DMA", NULL))
 			goto err_free_irq;
-			
-
-	esp->scsi_id = 7;
-		
-	/* Check for differential SCSI-bus */
-	esp->diff = 0;
-
-	esp_initialize(esp);
-	
+ 			
 	}
 
-#ifdef PMAZ_A	
 	if (TURBOCHANNEL) {
-		while ((slot = search_tc_card("PMAZ_AA")) >= 0) {
+		while ((slot = search_tc_card("PMAZ-AA")) >= 0) {
 			claim_tc_card(slot);
-			mem_start = get_tc_base_addr(slot);
 
 			esp_dev = 0;
 			esp = esp_allocate(tpnt, (void *) esp_dev);
 
+			mem_start = get_tc_base_addr(slot);
+
+			/* Store base addr into esp struct */
+			esp->slot = mem_start;
+
 			esp->dregs = 0;
 			esp->eregs = (struct ESP_regs *) (mem_start + DEC_SCSI_SREG);
 			esp->do_pio_cmds = 1;
@@ -217,16 +219,6 @@
 			/* get virtual dma address for command buffer */
 			esp->esp_command_dvma = (__u32) KSEG0ADDR((volatile unsigned char *) pmaz_cmd_buffer);
 
-			buffer = (volatile unsigned char *) (mem_start + DEC_SCSI_SRAM);
-
-			scsi_pmaz_dma_ptr_tc = (volatile int *) (mem_start + DEC_SCSI_DMAREG);
-
-			for (i = 0; i < ESP_NCMD; i++) {
-				scsi_pmaz_dma_ptrs_tc[i] = (volatile unsigned char *) (buffer + ESP_TGT_DMA_SIZE * i);
-			}
-
-			scsi_pmaz_dma_buff_used[0] = 1;
-
 			esp->cfreq = get_tc_speed();
 
 			esp->irq = get_tc_irq_nr(slot);
@@ -260,18 +252,17 @@
 			esp->dma_mmu_release_scsi_sgl = 0;
 			esp->dma_advance_sg = 0;
 
-			if (request_irq(esp->irq, esp_intr, SA_INTERRUPT, 
-					 "PMAZ_AA", NULL)) {
-				esp_deallocate(esp);
-				release_tc_card(slot);
-				continue;
-			}
+ 			if (request_irq(esp->irq, esp_intr, SA_INTERRUPT, 
+ 					 "PMAZ_AA", NULL)) {
+ 				esp_deallocate(esp);
+ 				release_tc_card(slot);
+ 				continue;
+ 			}
 			esp->scsi_id = 7;
 			esp->diff = 0;
 			esp_initialize(esp);
 		}
 	}
-#endif
 
 	if(nesps) {
 		printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
@@ -476,30 +467,35 @@
 	sp->SCp.ptr = (char *) ((unsigned long) sp->SCp.buffer->dvma_address);
 }
 
-#ifdef PMAZ_A
-
 static void pmaz_dma_drain(struct NCR_ESP *esp)
 {
 	memcpy((void *) (KSEG0ADDR(esp_virt_buffer)),
-		(void *) scsi_pmaz_dma_ptrs_tc[scsi_cur_buff], scsi_current_length);
+		(void *) ( esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
+		scsi_current_length);
 }
 
 static void pmaz_dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
 {
+	volatile int *dmareg = (volatile int *) (esp->slot + DEC_SCSI_DMAREG);
 
 	if (length > ESP_TGT_DMA_SIZE)
 		length = ESP_TGT_DMA_SIZE;
 
-	*scsi_pmaz_dma_ptr_tc = TC_ESP_DMA_ADDR(scsi_pmaz_dma_ptrs_tc[scsi_cur_buff]);
+	*dmareg = TC_ESP_DMA_ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE);
+
 	esp_virt_buffer = vaddress;
 	scsi_current_length = length;
 }
 
 static void pmaz_dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
 {
-	memcpy((void *)scsi_pmaz_dma_ptrs_tc[scsi_cur_buff], KSEG0ADDR((void *) vaddress), length);
+	volatile int *dmareg = (volatile int *) ( esp->slot + DEC_SCSI_DMAREG );
+
+	memcpy((void *) (esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
+			KSEG0ADDR((void *) vaddress), length);
 
-	*scsi_pmaz_dma_ptr_tc = TC_ESP_DMAR_WRITE | TC_ESP_DMA_ADDR(scsi_pmaz_dma_ptrs_tc[scsi_cur_buff]);
+	*dmareg = TC_ESP_DMAR_WRITE | 
+		TC_ESP_DMA_ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE);
 
 }
 
@@ -524,18 +520,9 @@
 	}
 }
 
-static void pmaz_dma_mmu_release_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp)
-{
-	int x;
-	for (x = 1; x < 6; x++)
-		if (sp->SCp.have_data_in == PHYSADDR(scsi_pmaz_dma_ptrs_tc[x]))
-			scsi_pmaz_dma_buff_used[x] = 0;
-}
-
 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp)
 {
 	sp->SCp.have_data_in = (int) sp->SCp.ptr =
 	    (char *) KSEG0ADDR((sp->request_buffer));
 }
 
-#endif
diff -urN linux-2.4.10-pre6/drivers/scsi/dpt_i2o.c linux/drivers/scsi/dpt_i2o.c
--- linux-2.4.10-pre6/drivers/scsi/dpt_i2o.c	Mon Dec  3 23:08:36 2001
+++ linux/drivers/scsi/dpt_i2o.c	Mon Dec  3 23:08:46 2001
@@ -1081,6 +1081,9 @@
 {
 	struct adpt_device* d;
 
+	if(chan < 0 || chan >= MAX_CHANNEL)
+		return NULL;
+	
 	if( pHba->channel[chan].device == NULL){
 		printk(KERN_DEBUG"Adaptec I2O RAID: Trying to find device before they are allocated\n");
 		return NULL;
diff -urN linux-2.4.10-pre6/drivers/scsi/lasi700.c linux/drivers/scsi/lasi700.c
--- linux-2.4.10-pre6/drivers/scsi/lasi700.c	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/lasi700.c	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,188 @@
+/* -*- mode: c; c-basic-offset: 8 -*- */
+
+/* PARISC LASI driver for the 53c700 chip
+ *
+ * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
+**-----------------------------------------------------------------------------
+**  
+**  This program is free software; you can redistribute it and/or modify
+**  it under the terms of the GNU General Public License as published by
+**  the Free Software Foundation; either version 2 of the License, or
+**  (at your option) any later version.
+**
+**  This program is distributed in the hope that it will be useful,
+**  but WITHOUT ANY WARRANTY; without even the implied warranty of
+**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+**  GNU General Public License for more details.
+**
+**  You should have received a copy of the GNU General Public License
+**  along with this program; if not, write to the Free Software
+**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+**
+**-----------------------------------------------------------------------------
+ */
+
+/*
+ * Many thanks to Richard Hirst <rhirst@linuxcare.com> for patiently
+ * debugging this driver on the parisc architecture and suggesting
+ * many improvements and bug fixes.
+ *
+ * Thanks also go to Linuxcare Inc. for providing several PARISC
+ * machines for me to debug the driver on.
+ */
+
+#ifndef __hppa__
+#error "lasi700 only compiles on hppa architecture"
+#endif
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/stat.h>
+#include <linux/mm.h>
+#include <linux/blk.h>
+#include <linux/sched.h>
+#include <linux/version.h>
+#include <linux/config.h>
+#include <linux/ioport.h>
+
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/delay.h>
+#include <asm/gsc.h>
+
+#include <linux/module.h>
+
+#include "scsi.h"
+#include "hosts.h"
+#include "constants.h"
+
+#include "lasi700.h"
+#include "53c700.h"
+
+#ifdef MODULE
+
+char *lasi700;			/* command line from insmod */
+
+MODULE_AUTHOR("James Bottomley");
+MODULE_DESCRIPTION("lasi700 SCSI Driver");
+MODULE_LICENSE("GPL");
+MODULE_PARM(lasi700, "s");
+
+#endif
+
+#ifdef MODULE
+#define ARG_SEP ' '
+#else
+#define ARG_SEP ','
+#endif
+
+static unsigned long __initdata opt_base;
+static int __initdata opt_irq;
+
+static int __init
+param_setup(char *string)
+{
+	char *pos = string, *next;
+
+	while(pos != NULL && (next = strchr(pos, ':')) != NULL) {
+		int val = (int)simple_strtoul(++next, NULL, 0);
+		
+		if(!strncmp(pos, "addr:", 5))
+			opt_base = val;
+		else if(!strncmp(pos, "irq:", 4))
+			opt_irq = val;
+
+		if((pos = strchr(pos, ARG_SEP)) != NULL)
+			pos++;
+	}
+	return 1;
+}
+
+#ifndef MODULE
+__setup("lasi700=", param_setup);
+#endif
+
+static Scsi_Host_Template __initdata *host_tpnt = NULL;
+static int __initdata host_count = 0;
+static struct parisc_device_id lasi700_scsi_tbl[] = {
+	LASI700_ID_TABLE,
+	{ 0 }
+};
+
+MODULE_DEVICE_TABLE(parisc, lasi700_scsi_tbl);
+
+static struct parisc_driver lasi700_driver = LASI700_DRIVER;
+
+static int __init
+lasi700_detect(Scsi_Host_Template *tpnt)
+{
+	host_tpnt = tpnt;
+
+#ifdef MODULE
+	if(lasi700)
+		param_setup(lasi700);
+#endif
+
+	register_parisc_driver(&lasi700_driver);
+
+	return (host_count != 0);
+}
+
+static int __init
+lasi700_driver_callback(struct parisc_device *dev)
+{
+	unsigned long base = dev->hpa + LASI_SCSI_CORE_OFFSET;
+	int irq = busdevice_alloc_irq(dev);
+	struct Scsi_Host *host;
+	struct NCR_700_Host_Parameters *hostdata =
+		kmalloc(sizeof(struct NCR_700_Host_Parameters),
+			GFP_KERNEL);
+	if(hostdata == NULL) {
+		printk(KERN_ERR "lasi700: Failed to allocate host data\n");
+		return 1;
+	}
+	memset(hostdata, 0, sizeof(struct NCR_700_Host_Parameters));
+	if(request_mem_region(base, 64, "lasi700") == NULL) {
+		printk(KERN_ERR "lasi700: Failed to claim memory region\n");
+		kfree(hostdata);
+		return 1;
+	}
+	hostdata->base = base;
+	hostdata->differential = 0;
+	hostdata->clock = LASI700_CLOCK;
+	hostdata->force_le_on_be = 1;
+	if((host = NCR_700_detect(host_tpnt, hostdata)) == NULL) {
+		kfree(hostdata);
+		release_mem_region(host->base, 64);
+		return 1;
+	}
+	host->irq = irq;
+	if(request_irq(irq, NCR_700_intr, SA_SHIRQ, "lasi700", host)) {
+		printk(KERN_ERR "lasi700: irq problem, detatching\n");
+		scsi_unregister(host);
+		NCR_700_release(host);
+		return 1;
+	}
+	host_count++;
+	return 0;
+}
+
+static int
+lasi700_release(struct Scsi_Host *host)
+{
+	struct D700_Host_Parameters *hostdata = 
+		(struct D700_Host_Parameters *)host->hostdata[0];
+
+	NCR_700_release(host);
+	kfree(hostdata);
+	free_irq(host->irq, host);
+	release_mem_region(host->base, 64);
+	return 1;
+}
+
+static Scsi_Host_Template driver_template = LASI700_SCSI;
+
+#include "scsi_module.c"
diff -urN linux-2.4.10-pre6/drivers/scsi/lasi700.h linux/drivers/scsi/lasi700.h
--- linux-2.4.10-pre6/drivers/scsi/lasi700.h	Wed Dec 31 16:00:00 1969
+++ linux/drivers/scsi/lasi700.h	Mon Dec  3 23:08:46 2001
@@ -0,0 +1,57 @@
+/* -*- mode: c; c-basic-offset: 8 -*- */
+
+/* PARISC LASI driver for the 53c700 chip
+ *
+ * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
+**-----------------------------------------------------------------------------
+**  
+**  This program is free software; you can redistribute it and/or modify
+**  it under the terms of the GNU General Public License as published by
+**  the Free Software Foundation; either version 2 of the License, or
+**  (at your option) any later version.
+**
+**  This program is distributed in the hope that it will be useful,
+**  but WITHOUT ANY WARRANTY; without even the implied warranty of
+**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+**  GNU General Public License for more details.
+**
+**  You should have received a copy of the GNU General Public License
+**  along with this program; if not, write to the Free Software
+**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+**
+**-----------------------------------------------------------------------------
+ */
+
+#ifndef _LASI700_H
+#define _LASI700_H
+
+static int lasi700_detect(Scsi_Host_Template *);
+static int lasi700_driver_callback(struct parisc_device *dev);
+static int lasi700_release(struct Scsi_Host *host);
+
+
+#define LASI700_SCSI {				\
+	name:		"LASI SCSI 53c700",	\
+	proc_name:	"lasi700",		\
+	detect:		lasi700_detect,		\
+	release:	lasi700_release,	\
+	this_id:	7,			\
+}
+
+#define LASI700_ID_TABLE {			\
+	hw_type:	HPHW_FIO,		\
+	sversion:	0x071,			\
+	hversion:	HVERSION_ANY_ID,	\
+	hversion_rev:	HVERSION_REV_ANY_ID,	\
+}
+
+#define LASI700_DRIVER {			\
+	name:		"Lasi SCSI",		\
+	id_table:	lasi700_scsi_tbl,	\
+	probe:		lasi700_driver_callback,\
+}
+
+#define LASI700_CLOCK	25
+#define LASI_SCSI_CORE_OFFSET 0x100
+
+#endif
diff -urN linux-2.4.10-pre6/drivers/scsi/megaraid.c linux/drivers/scsi/megaraid.c
--- linux-2.4.10-pre6/drivers/scsi/megaraid.c	Sun Aug 12 10:51:41 2001
+++ linux/drivers/scsi/megaraid.c	Mon Dec  3 23:08:46 2001
@@ -3138,16 +3138,18 @@
 	 * First argument (major) to register_chrdev implies a dynamic major
 	 * number allocation.
 	 */
-	major = register_chrdev (0, "megadev", &megadev_fops);
+	if (count) {
+		major = register_chrdev (0, "megadev", &megadev_fops);
 
-	/*
-	 * Register the Shutdown Notification hook in kernel
-	 */
-	if (register_reboot_notifier (&mega_notifier)) {
-		printk ("MegaRAID Shutdown routine not registered!!\n");
-	}
+		/*
+		 * Register the Shutdown Notification hook in kernel
+		 */
+		if (register_reboot_notifier (&mega_notifier)) {
+			printk ("MegaRAID Shutdown routine not registered!!\n");
+		}
 
-	init_MUTEX (&mimd_entry_mtx);
+		init_MUTEX (&mimd_entry_mtx);
+	}
 
 	return count;
 }
diff -urN linux-2.4.10-pre6/drivers/scsi/scsi_error.c linux/drivers/scsi/scsi_error.c
--- linux-2.4.10-pre6/drivers/scsi/scsi_error.c	Thu Jul  5 11:28:17 2001
+++ linux/drivers/scsi/scsi_error.c	Mon Dec  3 23:08:47 2001
@@ -421,6 +421,7 @@
 	static unsigned char generic_sense[6] =
 	{REQUEST_SENSE, 0, 0, 0, 255, 0};
 	unsigned char scsi_result0[256], *scsi_result = NULL;
+	int saved_result;
 
 	ASSERT_LOCK(&io_request_lock, 0);
 
@@ -446,6 +447,7 @@
 	memset((void *) SCpnt->sense_buffer, 0, sizeof(SCpnt->sense_buffer));
 	memset((void *) scsi_result, 0, 256);
 
+	saved_result = SCpnt->result;
 	SCpnt->request_buffer = scsi_result;
 	SCpnt->request_bufflen = 256;
 	SCpnt->use_sg = 0;
@@ -470,6 +472,7 @@
 	 */
 	memcpy((void *) SCpnt->cmnd, (void *) SCpnt->data_cmnd,
 	       sizeof(SCpnt->data_cmnd));
+	SCpnt->result = saved_result;
 	SCpnt->request_buffer = SCpnt->buffer;
 	SCpnt->request_bufflen = SCpnt->bufflen;
 	SCpnt->use_sg = SCpnt->old_use_sg;
diff -urN linux-2.4.10-pre6/drivers/scsi/sd.c linux/drivers/scsi/sd.c
--- linux-2.4.10-pre6/drivers/scsi/sd.c	Mon Dec  3 23:08:37 2001
+++ linux/drivers/scsi/sd.c	Mon Dec  3 23:08:47 2001
@@ -563,16 +563,11 @@
 
 static struct gendisk sd_gendisk =
 {
-	SCSI_DISK0_MAJOR,	/* Major number */
-	"sd",			/* Major name */
-	4,			/* Bits to shift to get real from partition */
-	1 << 4,			/* Number of partitions per real */
-	NULL,			/* hd struct */
-	NULL,			/* block sizes */
-	0,			/* number */
-	NULL,			/* internal */
-	NULL,			/* next */
-        &sd_fops,		/* file operations */
+	major:		SCSI_DISK0_MAJOR,
+	major_name:	"sd",
+	minor_shift:	4,
+	max_p:		1 << 4,
+	fops:		&sd_fops,
 };
 
 static struct gendisk *sd_gendisks = &sd_gendisk;
@@ -1021,7 +1016,7 @@
 		cmd[1] = (rscsi_disks[i].device->scsi_level <= SCSI_2) ?
 			 ((rscsi_disks[i].device->lun << 5) & 0xe0) : 0;
 		cmd[2] = 0x3f;	/* Get all pages */
-		cmd[4] = 255;     /* But we only want the 8 byte header */
+		cmd[4] = 255;   /* Ask for 255 bytes, even tho we want just the first 8 */
 		SRpnt->sr_cmd_len = 0;
 		SRpnt->sr_sense_buffer[0] = 0;
 		SRpnt->sr_sense_buffer[2] = 0;
diff -urN linux-2.4.10-pre6/drivers/scsi/sgiwd93.c linux/drivers/scsi/sgiwd93.c
--- linux-2.4.10-pre6/drivers/scsi/sgiwd93.c	Sat Nov 11 19:01:11 2000
+++ linux/drivers/scsi/sgiwd93.c	Mon Dec  3 23:08:47 2001
@@ -281,18 +281,30 @@
 	sgiwd93_host->irq = SGI_WD93_0_IRQ;
 
 	buf = (uchar *) get_free_page(GFP_KERNEL);
+	if (!buf) {
+		printk(KERN_WARNING "sgiwd93: Could not allocate memory for host0 buffer.\n");
+		scsi_unregister(sgiwd93_host);
+		return 0;
+	}
 	init_hpc_chain(buf);
 	dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 	/* HPC_SCSI_REG0 | 0x03 | KSEG1 */
-	wd33c93_init(sgiwd93_host, (wd33c93_regs *) 0xbfbc0003,
+	wd33c93_init(sgiwd93_host, (wd33c93_regs *) KSEG1ADDR (0x1fbc0003),
 		     dma_setup, dma_stop, WD33C93_FS_16_20);
 
 	hdata = (struct WD33C93_hostdata *)sgiwd93_host->hostdata;
 	hdata->no_sync = 0;
 	hdata->dma_bounce_buffer = (uchar *) (KSEG1ADDR(buf));
-	dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 
-	request_irq(SGI_WD93_0_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host);
+	if (request_irq(SGI_WD93_0_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host)) {
+		printk(KERN_WARNING "sgiwd93: Could not register IRQ %d (for host 0).\n", SGI_WD93_0_IRQ);
+#ifdef MODULE
+		wd33c93_release();
+#endif
+		free_page((unsigned long)buf);
+		scsi_unregister(sgiwd93_host);
+		return 0;
+	}
         /* set up second controller on the Indigo2 */
 	if(!sgi_guiness) {
 		sgiwd93_host1 = scsi_register(SGIblows, sizeof(struct WD33C93_hostdata));
@@ -302,10 +314,16 @@
 			sgiwd93_host1->irq = SGI_WD93_1_IRQ;
 	
 			buf = (uchar *) get_free_page(GFP_KERNEL);
+			if (!buf) {
+				printk(KERN_WARNING "sgiwd93: Could not allocate memory for host1 buffer.\n");
+				scsi_unregister(sgiwd93_host1);
+				called = 1;
+				return 1; /* We registered host0 so return success*/
+			}
 			init_hpc_chain(buf);
 			dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 			/* HPC_SCSI_REG1 | 0x03 | KSEG1 */
-			wd33c93_init(sgiwd93_host1, (wd33c93_regs *) 0xbfbc8003,
+			wd33c93_init(sgiwd93_host1, (wd33c93_regs *) KSEG1ADDR (0x1fbc8003),
 				     dma_setup, dma_stop, WD33C93_FS_16_20);
 	
 			hdata1 = (struct WD33C93_hostdata *)sgiwd93_host1->hostdata;
@@ -313,7 +331,15 @@
 			hdata1->dma_bounce_buffer = (uchar *) (KSEG1ADDR(buf));
 			dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 	
-			request_irq(SGI_WD93_1_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host1);
+			if (request_irq(SGI_WD93_1_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host1)) {
+				printk(KERN_WARNING "sgiwd93: Could not allocate irq %d (for host1).\n", SGI_WD93_1_IRQ);
+#ifdef MODULE
+				wd33c93_release();
+#endif
+				free_page((unsigned long)buf);
+				scsi_unregister(sgiwd93_host1);
+				/* Fall through since host0 registered OK */
+			}
 		}
 	}
 	
diff -urN linux-2.4.10-pre6/drivers/sound/i810_audio.c linux/drivers/sound/i810_audio.c
--- linux-2.4.10-pre6/drivers/sound/i810_audio.c	Mon Dec  3 23:08:37 2001
+++ linux/drivers/sound/i810_audio.c	Mon Dec  3 23:08:47 2001
@@ -106,6 +106,7 @@
 static int ftsodell=0;
 static int strict_clocking=0;
 static unsigned int clocking=48000;
+static int spdif_locked=0;
 
 //#define DEBUG
 //#define DEBUG2
@@ -118,6 +119,11 @@
 #define I810_FMT_STEREO	2
 #define I810_FMT_MASK	3
 
+#define SPDIF_ON	0x0004
+#define SURR_ON		0x0010
+#define CENTER_LFE_ON	0x0020
+#define VOL_MUTED	0x8000
+
 /* the 810's array of pointers to data buffers */
 
 struct sg_item {
@@ -325,6 +331,8 @@
 	struct i810_state *states[NR_HW_CH];
 
 	u16 ac97_features;
+	u16 ac97_status;
+	u16 channels;
 	
 	/* hardware resources */
 	unsigned long iobase;
@@ -401,11 +409,164 @@
 	card->channel[channel].used=0;
 }
 
+static int i810_valid_spdif_rate ( struct ac97_codec *codec, int rate )
+{
+	unsigned long id = 0L;
+
+	id = (i810_ac97_get(codec, AC97_VENDOR_ID1) << 16);
+	id |= i810_ac97_get(codec, AC97_VENDOR_ID2) & 0xffff;
+#ifdef DEBUG
+	printk ( "i810_audio: codec = %s, codec_id = 0x%08lx\n", codec->name, id);
+#endif
+	switch ( id ) {
+		case 0x41445361: /* AD1886 */
+			if (rate == 48000) {
+				return 1;
+			}
+			break;
+		default: /* all other codecs, until we know otherwiae */
+			if (rate == 48000 || rate == 44100 || rate == 32000) {
+				return 1;
+			}
+			break;
+	}
+	return (0);
+}
+
+/* i810_set_spdif_output
+ * 
+ *  Configure the S/PDIF output transmitter. When we turn on
+ *  S/PDIF, we turn off the analog output. This may not be
+ *  the right thing to do.
+ *
+ *  Assumptions:
+ *     The DSP sample rate must already be set to a supported
+ *     S/PDIF rate (32kHz, 44.1kHz, or 48kHz) or we abort.
+ */
+static void i810_set_spdif_output(struct i810_state *state, int slots, int rate)
+{
+	int	vol;
+	int	aud_reg;
+	struct ac97_codec *codec = state->card->ac97_codec[0];
+
+	if(!(state->card->ac97_features & 4)) {
+#ifdef DEBUG
+		printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
+#endif
+		state->card->ac97_status &= ~SPDIF_ON;
+	} else {
+		if ( slots == -1 ) { /* Turn off S/PDIF */
+			aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
+			i810_ac97_set(codec, AC97_EXTENDED_STATUS, (aud_reg & ~AC97_EA_SPDIF));
+
+			/* If the volume wasn't muted before we turned on S/PDIF, unmute it */
+			if ( !(state->card->ac97_status & VOL_MUTED) ) {
+				aud_reg = i810_ac97_get(codec, AC97_MASTER_VOL_STEREO);
+				i810_ac97_set(codec, AC97_MASTER_VOL_STEREO, (aud_reg & ~VOL_MUTED));
+			}
+			state->card->ac97_status &= ~(VOL_MUTED | SPDIF_ON);
+			return;
+		}
+
+		vol = i810_ac97_get(codec, AC97_MASTER_VOL_STEREO);
+		state->card->ac97_status = vol & VOL_MUTED;
+
+		/* Set S/PDIF transmitter sample rate */
+		aud_reg = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
+		switch ( rate ) {
+			case 32000:
+				aud_reg = (aud_reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_32K; 
+				break;
+			 case 44100:
+			 	aud_reg = (aud_reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_44K; 
+				break;
+			case 48000:
+			 	aud_reg = (aud_reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_48K; 
+				break;
+			default:
+#ifdef DEBUG
+				printk(KERN_WARNING "i810_audio: %d sample rate not supported by S/PDIF.\n", rate);
+#endif
+				/* turn off S/PDIF */
+				aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
+				i810_ac97_set(codec, AC97_EXTENDED_STATUS, (aud_reg & ~AC97_EA_SPDIF));
+				state->card->ac97_status &= ~SPDIF_ON;
+				return;
+		}
+
+		i810_ac97_set(codec, AC97_SPDIF_CONTROL, aud_reg);
+		
+		aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
+		aud_reg = (aud_reg & AC97_EA_SLOT_MASK) | slots | AC97_EA_VRA | AC97_EA_SPDIF;
+		i810_ac97_set(codec, AC97_EXTENDED_STATUS, aud_reg);
+		state->card->ac97_status |= SPDIF_ON;
+
+		/* Check to make sure the configuration is valid */
+		aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
+		if ( ! (aud_reg & 0x0400) ) {
+#ifdef DEBUG
+			printk(KERN_WARNING "i810_audio: S/PDIF transmitter configuration not valid (0x%04x).\n", aud_reg);
+#endif
+
+			/* turn off S/PDIF */
+			i810_ac97_set(codec, AC97_EXTENDED_STATUS, (aud_reg & ~AC97_EA_SPDIF));
+			state->card->ac97_status &= ~SPDIF_ON;
+			return;
+		}
+		/* Mute the analog output */
+		/* Should this only mute the PCM volume??? */
+		i810_ac97_set(codec, AC97_MASTER_VOL_STEREO, (vol | VOL_MUTED));
+	}
+}
+
+/* i810_set_dac_channels
+ *
+ *  Configure the codec's multi-channel DACs
+ *
+ *  The logic is backwards. Setting the bit to 1 turns off the DAC. 
+ *
+ *  What about the ICH? We currently configure it using the
+ *  SNDCTL_DSP_CHANNELS ioctl.  If we're turnning on the DAC, 
+ *  does that imply that we want the ICH set to support
+ *  these channels?
+ *  
+ *  TODO:
+ *    vailidate that the codec really supports these DACs
+ *    before turning them on. 
+ */
+static void i810_set_dac_channels(struct i810_state *state, int channel)
+{
+	int	aud_reg;
+	struct ac97_codec *codec = state->card->ac97_codec[0];
+
+	aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
+	aud_reg |= AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK;
+	state->card->ac97_status &= ~(SURR_ON | CENTER_LFE_ON);
+
+	switch ( channel ) {
+		case 2: /* always enabled */
+			break;
+		case 4:
+			aud_reg &= ~AC97_EA_PRJ;
+			state->card->ac97_status |= SURR_ON;
+			break;
+		case 6:
+			aud_reg &= ~(AC97_EA_PRJ | AC97_EA_PRI | AC97_EA_PRK);
+			state->card->ac97_status |= SURR_ON | CENTER_LFE_ON;
+			break;
+		default:
+			break;
+	}
+	i810_ac97_set(codec, AC97_EXTENDED_STATUS, aud_reg);
+
+}
+
+
 /* set playback sample rate */
 static unsigned int i810_set_dac_rate(struct i810_state * state, unsigned int rate)
 {	
 	struct dmabuf *dmabuf = &state->dmabuf;
-	u32 dacp, new_rate;
+	u32 new_rate;
 	struct ac97_codec *codec=state->card->ac97_codec[0];
 	
 	if(!(state->card->ac97_features&0x0001))
@@ -445,7 +606,7 @@
 static unsigned int i810_set_adc_rate(struct i810_state * state, unsigned int rate)
 {
 	struct dmabuf *dmabuf = &state->dmabuf;
-	u32 dacp, new_rate;
+	u32 new_rate;
 	struct ac97_codec *codec=state->card->ac97_codec[0];
 	
 	if(!(state->card->ac97_features&0x0001))
@@ -1359,7 +1520,9 @@
 	unsigned long flags;
 	audio_buf_info abinfo;
 	count_info cinfo;
-	int val, mapped, ret;
+	unsigned int i_glob_cnt;
+	int val = 0, mapped, ret;
+	struct ac97_codec *codec = state->card->ac97_codec[0];
 
 	mapped = ((file->f_mode & FMODE_WRITE) && dmabuf->mapped) ||
 		((file->f_mode & FMODE_READ) && dmabuf->mapped);
@@ -1412,11 +1575,31 @@
 			return -EFAULT;
 		if (val >= 0) {
 			if (file->f_mode & FMODE_WRITE) {
-				stop_dac(state);
-				dmabuf->ready = 0;
-				spin_lock_irqsave(&state->card->lock, flags);
-				i810_set_dac_rate(state, val);
-				spin_unlock_irqrestore(&state->card->lock, flags);
+				if ( (state->card->ac97_status & SPDIF_ON) ) {  /* S/PDIF Enabled */
+					/* AD1886 only supports 48000, need to check that */
+					if ( i810_valid_spdif_rate ( codec, val ) ) {
+						/* Set DAC rate */
+                                        	i810_set_spdif_output ( state, -1, 0 );
+						stop_dac(state);
+						dmabuf->ready = 0;
+						spin_lock_irqsave(&state->card->lock, flags);
+						i810_set_dac_rate(state, val);
+						spin_unlock_irqrestore(&state->card->lock, flags);
+						/* Set S/PDIF transmitter rate. */
+						i810_set_spdif_output ( state, AC97_EA_SPSA_3_4, val );
+	                                        if ( ! (state->card->ac97_status & SPDIF_ON) ) {
+							val = dmabuf->rate;
+						}
+					} else { /* Not a valid rate for S/PDIF, ignore it */
+						val = dmabuf->rate;
+					}
+				} else {
+					stop_dac(state);
+					dmabuf->ready = 0;
+					spin_lock_irqsave(&state->card->lock, flags);
+					i810_set_dac_rate(state, val);
+					spin_unlock_irqrestore(&state->card->lock, flags);
+				}
 			}
 			if (file->f_mode & FMODE_READ) {
 				stop_adc(state);
@@ -1467,7 +1650,18 @@
 #ifdef DEBUG
 		printk("SNDCTL_DSP_SETFMT\n");
 #endif
-		return put_user(AFMT_S16_LE, (int *)arg);
+		if (get_user(val, (int *)arg))
+			return -EFAULT;
+
+		switch ( val ) {
+			case AFMT_S16_LE:
+				break;
+			case AFMT_QUERY:
+			default:
+				val = AFMT_S16_LE;
+				break;
+		}
+		return put_user(val, (int *)arg);
 
 	case SNDCTL_DSP_CHANNELS:
 #ifdef DEBUG
@@ -1477,14 +1671,61 @@
 			return -EFAULT;
 
 		if (val > 0) {
-	    		if (dmabuf->enable & DAC_RUNNING) {
+			if (dmabuf->enable & DAC_RUNNING) {
 				stop_dac(state);
 			}
 			if (dmabuf->enable & ADC_RUNNING) {
 				stop_adc(state);
 			}
+		} else {
+			return put_user(state->card->channels, (int *)arg);
 		}
-		return put_user(2, (int *)arg);
+
+		/* ICH and ICH0 only support 2 channels */
+		if ( state->card->pci_id == 0x2415 || state->card->pci_id == 0x2425 ) 
+			return put_user(2, (int *)arg);
+	
+		/* Multi-channel support was added with ICH2. Bits in */
+		/* Global Status and Global Control register are now  */
+		/* used to indicate this.                             */
+
+                i_glob_cnt = inl(state->card->iobase + GLOB_CNT);
+
+		/* Current # of channels enabled */
+		if ( i_glob_cnt & 0x0100000 )
+			ret = 4;
+		else if ( i_glob_cnt & 0x0200000 )
+			ret = 6;
+		else
+			ret = 2;
+
+		switch ( val ) {
+			case 2: /* 2 channels is always supported */
+				outl(state->card->iobase + GLOB_CNT, (i_glob_cnt & 0xcfffff));
+				/* Do we need to change mixer settings????  */
+				break;
+			case 4: /* Supported on some chipsets, better check first */
+				if ( state->card->channels >= 4 ) {
+					outl(state->card->iobase + GLOB_CNT, ((i_glob_cnt & 0xcfffff) | 0x0100000));
+					/* Do we need to change mixer settings??? */
+				} else {
+					val = ret;
+				}
+				break;
+			case 6: /* Supported on some chipsets, better check first */
+				if ( state->card->channels >= 6 ) {
+					outl(state->card->iobase + GLOB_CNT, ((i_glob_cnt & 0xcfffff) | 0x0200000));
+					/* Do we need to change mixer settings??? */
+				} else {
+					val = ret;
+				}
+				break;
+			default: /* nothing else is ever supported by the chipset */
+				val = ret;
+				break;
+		}
+
+		return put_user(val, (int *)arg);
 
 	case SNDCTL_DSP_POST: /* the user has sent all data and is notifying us */
 		/* we update the swptr to the end of the last sg segment then return */
@@ -1731,6 +1972,148 @@
 #endif
 		return put_user(AFMT_S16_LE, (int *)arg);
 
+	case SNDCTL_DSP_SETSPDIF: /* Set S/PDIF Control register */
+#ifdef DEBUG
+		printk("SNDCTL_DSP_SETSPDIF\n");
+#endif
+		if (get_user(val, (int *)arg))
+			return -EFAULT;
+
+		/* Check to make sure the codec supports S/PDIF transmitter */
+
+		if((state->card->ac97_features & 4)) {
+			/* mask out the transmitter speed bits so the user can't set them */
+			val &= ~0x3000;
+
+			/* Add the current transmitter speed bits to the passed value */
+			ret = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
+			val |= (ret & 0x3000);
+
+			i810_ac97_set(codec, AC97_SPDIF_CONTROL, val);
+			if(i810_ac97_get(codec, AC97_SPDIF_CONTROL) != val ) {
+				printk(KERN_ERR "i810_audio: Unable to set S/PDIF configuration to 0x%04x.\n", val);
+				return -EFAULT;
+			}
+		}
+#ifdef DEBUG
+		else 
+			printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
+#endif
+		return put_user(val, (int *)arg);
+
+	case SNDCTL_DSP_GETSPDIF: /* Get S/PDIF Control register */
+#ifdef DEBUG
+		printk("SNDCTL_DSP_GETSPDIF\n");
+#endif
+		if (get_user(val, (int *)arg))
+			return -EFAULT;
+
+		/* Check to make sure the codec supports S/PDIF transmitter */
+
+		if(!(state->card->ac97_features & 4)) {
+#ifdef DEBUG
+			printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
+#endif
+			val = 0;
+		} else {
+			val = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
+		}
+		//return put_user((val & 0xcfff), (int *)arg);
+		return put_user(val, (int *)arg);
+   			
+	case SNDCTL_DSP_GETCHANNELMASK:
+#ifdef DEBUG
+		printk("SNDCTL_DSP_GETCHANNELMASK\n");
+#endif
+		if (get_user(val, (int *)arg))
+			return -EFAULT;
+		
+		/* Based on AC'97 DAC support, not ICH hardware */
+		val = DSP_BIND_FRONT;
+		if ( state->card->ac97_features & 0x0004 )
+			val |= DSP_BIND_SPDIF;
+
+		if ( state->card->ac97_features & 0x0080 )
+			val |= DSP_BIND_SURR;
+		if ( state->card->ac97_features & 0x0140 )
+			val |= DSP_BIND_CENTER_LFE;
+
+		return put_user(val, (int *)arg);
+
+	case SNDCTL_DSP_BIND_CHANNEL:
+#ifdef DEBUG
+		printk("SNDCTL_DSP_BIND_CHANNEL\n");
+#endif
+		if (get_user(val, (int *)arg))
+			return -EFAULT;
+		if ( val == DSP_BIND_QUERY ) {
+			val = DSP_BIND_FRONT; /* Always report this as being enabled */
+			if ( state->card->ac97_status & SPDIF_ON ) 
+				val |= DSP_BIND_SPDIF;
+			else {
+				if ( state->card->ac97_status & SURR_ON )
+					val |= DSP_BIND_SURR;
+				if ( state->card->ac97_status & CENTER_LFE_ON )
+					val |= DSP_BIND_CENTER_LFE;
+			}
+		} else {  /* Not a query, set it */
+			if (!(file->f_mode & FMODE_WRITE))
+				return -EINVAL;
+			if ( dmabuf->enable == DAC_RUNNING ) {
+				stop_dac(state);
+			}
+			if ( val & DSP_BIND_SPDIF ) {  /* Turn on SPDIF */
+				/*  Ok, this should probably define what slots
+				 *  to use. For now, we'll only set it to the
+				 *  defaults:
+				 * 
+				 *   non multichannel codec maps to slots 3&4
+				 *   2 channel codec maps to slots 7&8
+				 *   4 channel codec maps to slots 6&9
+				 *   6 channel codec maps to slots 10&11
+				 *
+				 *  there should be some way for the app to
+				 *  select the slot assignment.
+				 */
+	
+				i810_set_spdif_output ( state, AC97_EA_SPSA_3_4, dmabuf->rate );
+				if ( !(state->card->ac97_status & SPDIF_ON) )
+					val &= ~DSP_BIND_SPDIF;
+			} else {
+				int mask;
+				int channels;
+
+				/* Turn off S/PDIF if it was on */
+				if ( state->card->ac97_status & SPDIF_ON ) 
+					i810_set_spdif_output ( state, -1, 0 );
+				
+				mask = val & (DSP_BIND_FRONT | DSP_BIND_SURR | DSP_BIND_CENTER_LFE);
+				switch (mask) {
+					case DSP_BIND_FRONT:
+						channels = 2;
+						break;
+					case DSP_BIND_FRONT|DSP_BIND_SURR:
+						channels = 4;
+						break;
+					case DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE:
+						channels = 6;
+						break;
+					default:
+						val = DSP_BIND_FRONT;
+						channels = 2;
+						break;
+				}
+				i810_set_dac_channels ( state, channels );
+
+				/* check that they really got turned on */
+				if ( !state->card->ac97_status & SURR_ON )
+					val &= ~DSP_BIND_SURR;
+				if ( !state->card->ac97_status & CENTER_LFE_ON )
+					val &= ~DSP_BIND_CENTER_LFE;
+			}
+		}
+		return put_user(val, (int *)arg);
+		
 	case SNDCTL_DSP_MAPINBUF:
 	case SNDCTL_DSP_MAPOUTBUF:
 	case SNDCTL_DSP_SETSYNCRO:
@@ -1796,7 +2179,15 @@
 			card->states[i] = NULL;;
 			return -EBUSY;
 		}
-		i810_set_dac_rate(state, 8000);
+		/* Initialize to 8kHz?  What if we don't support 8kHz? */
+		/*  Let's change this to check for S/PDIF stuff */
+	
+		if ( spdif_locked ) {
+			i810_set_dac_rate(state, spdif_locked);
+			i810_set_spdif_output(state, AC97_EA_SPSA_3_4, spdif_locked);
+		} else {
+			i810_set_dac_rate(state, 8000);
+		}
 		dmabuf->trigger |= PCM_ENABLE_OUTPUT;
 	}
 		
@@ -1866,20 +2257,23 @@
 {
 	struct i810_card *card = dev->private_data;
 	int count = 100;
+	u8 reg_set = ((dev->id)?((reg&0x7f)|0x80):(reg&0x7f));
 
 	while(count-- && (inb(card->iobase + CAS) & 1)) 
 		udelay(1);
-	return inw(card->ac97base + (reg&0x7f));
+	
+	return inw(card->ac97base + reg_set);
 }
 
 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data)
 {
 	struct i810_card *card = dev->private_data;
 	int count = 100;
+	u8 reg_set = ((dev->id)?((reg&0x7f)|0x80):(reg&0x7f));
 
 	while(count-- && (inb(card->iobase + CAS) & 1)) 
 		udelay(1);
-	outw(data, card->ac97base + (reg&0x7f));
+	outw(data, card->ac97base + reg_set);
 }
 
 
@@ -1920,7 +2314,7 @@
 static int __init i810_ac97_init(struct i810_card *card)
 {
 	int num_ac97 = 0;
-	int ready_2nd = 0;
+	int total_channels = 0;
 	struct ac97_codec *codec;
 	u16 eid;
 	int i=0;
@@ -1952,10 +2346,38 @@
 
 	current->state = TASK_UNINTERRUPTIBLE;
 	schedule_timeout(HZ/5);
+
+	/* Number of channels supported */
+	/* What about the codec?  Just because the ICH supports */
+	/* multiple channels doesn't mean the codec does.       */
+	/* we'll have to modify this in the codec section below */
+	/* to reflect what the codec has.                       */
+	/* ICH and ICH0 only support 2 channels so don't bother */
+	/* to check....                                         */
+
+	card->channels = 2;
+	reg = inl(card->iobase + GLOB_STA);
+	if ( reg & 0x0200000 )
+		card->channels = 6;
+	else if ( reg & 0x0100000 )
+		card->channels = 4;
+	printk("i810_audio: Audio Controller supports %d channels.\n", card->channels);
 		
 	inw(card->ac97base);
 
 	for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
+
+		/* The ICH programmer's reference says you should   */
+		/* check the ready status before probing. So we chk */
+		/*   What do we do if it's not ready?  Wait and try */
+		/*   again, or abort?                               */
+		reg = inl(card->iobase + GLOB_STA);
+		if (!(reg & (0x100 << num_ac97))) {
+			if(num_ac97 == 0)
+				printk(KERN_ERR "i810_audio: Primary codec not ready.\n");
+			break; /* I think this works, if not ready stop */
+		}
+
 		if ((codec = kmalloc(sizeof(struct ac97_codec), GFP_KERNEL)) == NULL)
 			return -ENOMEM;
 		memset(codec, 0, sizeof(struct ac97_codec));
@@ -1983,6 +2405,9 @@
 			schedule_timeout(HZ/20);
 		}
 
+		/* Store state information about S/PDIF transmitter */
+		card->ac97_status = 0;
+
 		/* Don't attempt to get eid until powerup is complete */
 		eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
 		
@@ -2014,6 +2439,63 @@
 			}
 		}
    		
+		/* Determine how many channels the codec(s) support   */
+		/*   - The primary codec always supports 2            */
+		/*   - If the codec supports AMAP, surround DACs will */
+		/*     automaticlly get assigned to slots.            */
+		/*     * Check for surround DACs and increment if     */
+		/*       found.                                       */
+		/*   - Else check if the codec is revision 2.2        */
+		/*     * If surround DACs exist, assign them to slots */
+		/*       and increment channel count.                 */
+
+		/* All of this only applies to ICH2 and above. ICH    */
+		/* and ICH0 only support 2 channels.  ICH2 will only  */
+		/* support multiple codecs in a "split audio" config. */
+		/* as described above.                                */
+
+		/* TODO: Remove all the debugging messages!           */
+
+		if((eid & 0xc000) == 0) /* primary codec */
+			total_channels += 2; 
+
+		if(eid & 0x200) { /* GOOD, AMAP support */
+			if (eid & 0x0080) /* L/R Surround channels */
+				total_channels += 2;
+			if (eid & 0x0140) /* LFE and Center channels */
+				total_channels += 2;
+			printk("i810_audio: AC'97 codec %d supports AMAP, total channels = %d\n", num_ac97, total_channels);
+		} else if (eid & 0x0400) {  /* this only works on 2.2 compliant codecs */
+			eid &= 0xffcf;
+			if((eid & 0xc000) != 0)	{
+				switch ( total_channels ) {
+					case 2:
+						/* Set dsa1, dsa0 to 01 */
+						eid |= 0x0010;
+						break;
+					case 4:
+						/* Set dsa1, dsa0 to 10 */
+						eid |= 0x0020;
+						break;
+					case 6:
+						/* Set dsa1, dsa0 to 11 */
+						eid |= 0x0030;
+						break;
+				}
+				total_channels += 2;
+			}
+			i810_ac97_set(codec, AC97_EXTENDED_ID, eid);
+			eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
+			printk("i810_audio: AC'97 codec %d, new EID value = 0x%04x\n", num_ac97, eid);
+			if (eid & 0x0080) /* L/R Surround channels */
+				total_channels += 2;
+			if (eid & 0x0140) /* LFE and Center channels */
+				total_channels += 2;
+			printk("i810_audio: AC'97 codec %d, DAC map configured, total channels = %d\n", num_ac97, total_channels);
+		} else {
+			printk("i810_audio: AC'97 codec %d Unable to map surround DAC's (or DAC's not present), total channels = %d\n", num_ac97, total_channels);
+		}
+
 		if ((codec->dev_mixer = register_sound_mixer(&i810_mixer_fops, -1)) < 0) {
 			printk(KERN_ERR "i810_audio: couldn't register mixer!\n");
 			kfree(codec);
@@ -2021,11 +2503,11 @@
 		}
 
 		card->ac97_codec[num_ac97] = codec;
-
-		/* if there is no secondary codec at all, don't probe any more */
-		if (!ready_2nd)
-			return num_ac97+1;
 	}
+
+	/* pick the minimum of channels supported by ICHx or codec(s) */
+	card->channels = (card->channels > total_channels)?total_channels:card->channels;
+
 	return num_ac97;
 }
 
@@ -2221,6 +2703,7 @@
 MODULE_PARM(ftsodell, "i");
 MODULE_PARM(clocking, "i");
 MODULE_PARM(strict_clocking, "i");
+MODULE_PARM(spdif_locked, "i");
 
 #define I810_MODULE_NAME "intel810_audio"
 
@@ -2250,6 +2733,15 @@
 	if(clocking == 48000) {
 		i810_configure_clocking();
 	}
+	if(spdif_locked > 0 ) {
+		if(spdif_locked == 32000 || spdif_locked == 44100 || spdif_locked == 48000) {
+			printk("i810_audio: Enabling S/PDIF at sample rate %dHz.\n", spdif_locked);
+		} else {
+			printk("i810_audio: S/PDIF can only be locked to 32000, 441000, or 48000Hz.\n");
+			spdif_locked = 0;
+		}
+	}
+	
 	return 0;
 }
 
diff -urN linux-2.4.10-pre6/drivers/sound/opl3sa2.c linux/drivers/sound/opl3sa2.c
--- linux-2.4.10-pre6/drivers/sound/opl3sa2.c	Fri Mar  2 18:38:39 2001
+++ linux/drivers/sound/opl3sa2.c	Mon Dec  3 23:08:47 2001
@@ -810,7 +810,7 @@
 struct isapnp_device_id isapnp_opl3sa2_list[] __initdata = {
 	{	ISAPNP_ANY_ID, ISAPNP_ANY_ID,
 		ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021),
-		NULL },
+		0 },
 	{0}
 };
 
diff -urN linux-2.4.10-pre6/drivers/sound/sound_core.c linux/drivers/sound/sound_core.c
--- linux-2.4.10-pre6/drivers/sound/sound_core.c	Fri Apr  6 10:51:19 2001
+++ linux/drivers/sound/sound_core.c	Mon Dec  3 23:08:47 2001
@@ -145,7 +145,7 @@
  *	This lock guards the sound loader list.
  */
 
-spinlock_t sound_loader_lock = SPIN_LOCK_UNLOCKED;
+static spinlock_t sound_loader_lock = SPIN_LOCK_UNLOCKED;
 
 /*
  *	Allocate the controlling structure and add it to the sound driver
diff -urN linux-2.4.10-pre6/drivers/sound/via82cxxx_audio.c linux/drivers/sound/via82cxxx_audio.c
--- linux-2.4.10-pre6/drivers/sound/via82cxxx_audio.c	Mon Dec  3 23:08:37 2001
+++ linux/drivers/sound/via82cxxx_audio.c	Mon Dec  3 23:08:47 2001
@@ -858,6 +858,7 @@
 
 /**
  *	via_chan_clear - Stop DMA channel operation, and reset pointers
+ *	@card: the chip to accessed
  *	@chan: Channel to be cleared
  *
  *	Call via_chan_stop to halt DMA operations, and then resets
diff -urN linux-2.4.10-pre6/drivers/telephony/ixj.c linux/drivers/telephony/ixj.c
--- linux-2.4.10-pre6/drivers/telephony/ixj.c	Mon Dec  3 23:08:37 2001
+++ linux/drivers/telephony/ixj.c	Mon Dec  3 23:08:47 2001
@@ -6693,7 +6693,10 @@
 		retval = ixj_init_filter_raw(j, &jfr);
 		break;
 	case IXJCTL_GET_FILTER_HIST:
-		retval = j->filter_hist[arg];
+		if(arg<0||arg>3)
+			retval = -EINVAL;
+		else
+			retval = j->filter_hist[arg];
 		break;
 	case IXJCTL_INIT_TONE:
 		copy_from_user(&ti, (char *) arg, sizeof(ti));
diff -urN linux-2.4.10-pre6/drivers/video/radeon.h linux/drivers/video/radeon.h
--- linux-2.4.10-pre6/drivers/video/radeon.h	Mon Dec  3 23:08:37 2001
+++ linux/drivers/video/radeon.h	Mon Dec  3 23:08:47 2001
@@ -7,6 +7,7 @@
 #define PCI_DEVICE_ID_RADEON_QE		0x5145
 #define PCI_DEVICE_ID_RADEON_QF		0x5146
 #define PCI_DEVICE_ID_RADEON_QG		0x5147
+#define PCI_DEVICE_ID_RADEON_VE		0x5159
 
 #define RADEON_REGSIZE			0x4000
 
diff -urN linux-2.4.10-pre6/drivers/video/radeonfb.c linux/drivers/video/radeonfb.c
--- linux-2.4.10-pre6/drivers/video/radeonfb.c	Mon Dec  3 23:08:37 2001
+++ linux/drivers/video/radeonfb.c	Mon Dec  3 23:08:47 2001
@@ -12,13 +12,14 @@
  *	2001-07-05	fixed scrolling issues, engine initialization,
  *			and minor mode tweaking, 0.0.9
  *
+ *	2001-09-07	Radeon VE support
  *
  *	Special thanks to ATI DevRel team for their hardware donations.
  *
  */
 
 
-#define RADEON_VERSION	"0.0.9"
+#define RADEON_VERSION	"0.0.10"
 
 
 #include <linux/config.h>
@@ -62,7 +63,8 @@
 	RADEON_QD,
 	RADEON_QE,
 	RADEON_QF,
-	RADEON_QG
+	RADEON_QG,
+	RADEON_VE
 };
 
 
@@ -71,6 +73,7 @@
 	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_RADEON_QE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QE},
 	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_RADEON_QF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QF},
 	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_RADEON_QG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QG},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_RADEON_VE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_VE},
 	{ 0, }
 };
 MODULE_DEVICE_TABLE(pci, radeonfb_pci_table);
@@ -639,6 +642,9 @@
 		case PCI_DEVICE_ID_RADEON_QG:
 			strcpy(rinfo->name, "Radeon QG ");
 			break;
+		case PCI_DEVICE_ID_RADEON_VE:
+			strcpy(rinfo->name, "Radeon VE ");
+			break;
 		default:
 			return -ENODEV;
 	}
@@ -754,7 +760,7 @@
 		radeon_engine_init (rinfo);
 	}
 
-	printk ("radeonfb: ATI Radeon %s %d MB\n", rinfo->ram_type,
+	printk ("radeonfb: ATI %s %d MB\n",rinfo->name,
 		(rinfo->video_ram/(1024*1024)));
 
 	return 0;
diff -urN linux-2.4.10-pre6/fs/dquot.c linux/fs/dquot.c
--- linux-2.4.10-pre6/fs/dquot.c	Mon Dec  3 23:08:37 2001
+++ linux/fs/dquot.c	Mon Dec  3 23:08:47 2001
@@ -670,8 +670,8 @@
 		struct file *filp = list_entry(p, struct file, f_list);
 		struct inode *inode = filp->f_dentry->d_inode;
 		if (filp->f_mode & FMODE_WRITE && dqinit_needed(inode, type)) {
-			struct vfsmount *mnt = mntget(file->f_vfsmnt);
-			struct dentry *dentry = dget(file->f_dentry);
+			struct vfsmount *mnt = mntget(filp->f_vfsmnt);
+			struct dentry *dentry = dget(filp->f_dentry);
 			file_list_unlock();
 			sb->dq_op->initialize(inode, type);
 			inode->i_flags |= S_QUOTA;
diff -urN linux-2.4.10-pre6/fs/minix/file.c linux/fs/minix/file.c
--- linux-2.4.10-pre6/fs/minix/file.c	Mon Dec  3 23:08:37 2001
+++ linux/fs/minix/file.c	Mon Dec  3 23:08:47 2001
@@ -16,6 +16,7 @@
 int minix_sync_file(struct file *, struct dentry *, int);
 
 struct file_operations minix_file_operations = {
+	llseek:		generic_file_llseek,
 	read:		generic_file_read,
 	write:		generic_file_write,
 	mmap:		generic_file_mmap,
diff -urN linux-2.4.10-pre6/fs/ntfs/support.h linux/fs/ntfs/support.h
--- linux-2.4.10-pre6/fs/ntfs/support.h	Mon Dec  3 23:08:37 2001
+++ linux/fs/ntfs/support.h	Mon Dec  3 23:08:47 2001
@@ -22,7 +22,7 @@
 #ifdef DEBUG
 void ntfs_debug(int mask, const char *fmt, ...);
 #else
-#define ntfs_debug(mask, fmt, ...)	do {} while (0)
+#define ntfs_debug(mask, fmt...)	do {} while (0)
 #endif
 
 #include <linux/slab.h>
diff -urN linux-2.4.10-pre6/fs/super.c linux/fs/super.c
--- linux-2.4.10-pre6/fs/super.c	Mon Dec  3 23:08:37 2001
+++ linux/fs/super.c	Mon Dec  3 23:08:47 2001
@@ -289,8 +289,8 @@
 {
 	unsigned long tmp = ((unsigned long) mnt / L1_CACHE_BYTES);
 	tmp += ((unsigned long) dentry / L1_CACHE_BYTES);
-	tmp = tmp + (tmp >> hash_mask);
-	return tmp & hash_bits;
+	tmp = tmp + (tmp >> hash_bits);
+	return tmp & hash_mask;
 }
 
 struct vfsmount *alloc_vfsmnt(void)
@@ -2000,27 +2000,36 @@
 		;
 
 	do {
-		unsigned long tmp;
-
-		nr_hash = (1UL << order) * PAGE_SIZE /
-			sizeof(struct list_head);
-		hash_mask = (nr_hash - 1);
-
-		tmp = nr_hash;
-		hash_bits = 0;
-		while ((tmp >>= 1UL) != 0UL)
-			hash_bits++;
-
 		mount_hashtable = (struct list_head *)
 			__get_free_pages(GFP_ATOMIC, order);
 	} while (mount_hashtable == NULL && --order >= 0);
 
-	printk("Mount-cache hash table entries: %d (order: %ld, %ld bytes)\n",
-			nr_hash, order, (PAGE_SIZE << order));
-
 	if (!mount_hashtable)
 		panic("Failed to allocate mount hash table\n");
 
+	/*
+	 * Find the power-of-two list-heads that can fit into the allocation..
+	 * We don't guarantee that "sizeof(struct list_head)" is necessarily
+	 * a power-of-two.
+	 */
+	nr_hash = (1UL << order) * PAGE_SIZE / sizeof(struct list_head);
+	hash_bits = 0;
+	do {
+		hash_bits++;
+	} while ((nr_hash >> hash_bits) != 0);
+	hash_bits--;
+
+	/*
+	 * Re-calculate the actual number of entries and the mask
+	 * from the number of bits we can fit.
+	 */
+	nr_hash = 1UL << hash_bits;
+	hash_mask = nr_hash-1;
+
+	printk("Mount-cache hash table entries: %d (order: %ld, %ld bytes)\n",
+			nr_hash, order, (PAGE_SIZE << order));
+
+	/* And initialize the newly allocated array */
 	d = mount_hashtable;
 	i = nr_hash;
 	do {
diff -urN linux-2.4.10-pre6/include/asm-mips/asm.h linux/include/asm-mips/asm.h
--- linux-2.4.10-pre6/include/asm-mips/asm.h	Thu Feb 24 22:52:30 2000
+++ linux/include/asm-mips/asm.h	Mon Dec  3 23:08:47 2001
@@ -84,11 +84,19 @@
 /*
  * EXPORT - export definition of symbol
  */
-#define	EXPORT(symbol)                                  \
+#define EXPORT(symbol)					\
 		.globl	symbol;                         \
 symbol:
 
 /*
+ * FEXPORT - export definition of a function symbol
+ */
+#define FEXPORT(symbol)					\
+		.globl	symbol;				\
+		.type	symbol,@function;		\
+symbol:
+
+/*
  * ABS - export absolute symbol
  */
 #define	ABS(symbol,value)                               \
@@ -105,7 +113,7 @@
 		TEXT(msg)
 
 /*
- * Print formated string
+ * Print formatted string
  */
 #define PRINT(string)                                   \
 		.set	push;				\
@@ -138,7 +146,8 @@
  * MIPS IV implementations are free to treat this as a nop.  The R5000
  * is one of them.  So we should have an option not to use this instruction.
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define PREF(hint,addr)                                 \
 		pref	hint,addr
 #define PREFX(hint,addr)                                \
@@ -183,22 +192,24 @@
 		.set	pop;				\
 9:
 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define MOVN(rd,rs,rt)                                  \
 		movn	rd,rs,rt
 #define MOVZ(rd,rs,rt)                                  \
 		movz	rd,rs,rt
-#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) */
+#endif /* MIPS IV, MIPS V or MIPS64 */
 
 /*
  * Stack alignment
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32)
 #define ALSZ	7
 #define ALMASK	~7
 #endif
 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS5)
+    (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define ALSZ	15
 #define ALMASK	~15
 #endif
@@ -216,14 +227,15 @@
  * Use the following macros in assemblercode to load/store registers,
  * pointers etc.
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32)
 #define REG_S sw
 #define REG_L lw
 #define PTR_SUBU subu
 #define PTR_ADDU addu
 #endif
 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS5)
+    (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define REG_S sd
 #define REG_L ld
 /* We still live in a 32 bit address space ...  */
@@ -361,12 +373,13 @@
 /*
  * Some cp0 registers were extended to 64bit for MIPS III.
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32)
 #define MFC0	mfc0
 #define MTC0	mtc0
 #endif
 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS5)
+    (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define MFC0	dmfc0
 #define MTC0	dmtc0
 #endif
diff -urN linux-2.4.10-pre6/include/asm-mips/atomic.h linux/include/asm-mips/atomic.h
--- linux-2.4.10-pre6/include/asm-mips/atomic.h	Mon Jul  9 21:30:19 2001
+++ linux/include/asm-mips/atomic.h	Mon Dec  3 23:08:47 2001
@@ -40,7 +40,7 @@
  */
 #define atomic_set(v,i)	((v)->counter = (i))
 
-#if !defined(CONFIG_CPU_HAS_LLSC)
+#ifndef CONFIG_CPU_HAS_LLSC
 
 #include <asm/system.h>
 
diff -urN linux-2.4.10-pre6/include/asm-mips/au1000.h linux/include/asm-mips/au1000.h
--- linux-2.4.10-pre6/include/asm-mips/au1000.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/au1000.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,635 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Include file for Alchemy Semiconductor's Au1000 CPU.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _AU1000_H_
+#define _AU1000_H_
+
+/* SDRAM Controller */
+#define CS_MODE_0                0x14000000
+#define CS_MODE_1                0x14000004
+#define CS_MODE_2                0x14000008
+
+#define CS_CONFIG_0              0x1400000C
+#define CS_CONFIG_1              0x14000010
+#define CS_CONFIG_2              0x14000014
+
+#define REFRESH_CONFIG           0x14000018
+#define PRECHARGE_CMD            0x1400001C
+#define AUTO_REFRESH_CMD         0x14000020
+
+#define WRITE_EXTERN_0           0x14000024
+#define WRITE_EXTERN_1           0x14000028
+#define WRITE_EXTERN_2           0x1400002C
+
+#define SDRAM_SLEEP              0x14000030
+#define TOGGLE_CKE               0x14000034
+
+/* Static Bus Controller */
+#define STATIC_CONFIG_0          0x14001000
+#define STATIC_TIMING_0          0x14001004
+#define STATIC_ADDRESS_0         0x14001008
+
+#define STATIC_CONFIG_1          0x14001010
+#define STATIC_TIMING_1          0x14001014
+#define STATIC_ADDRESS_1         0x14001018
+
+#define STATIC_CONFIG_2          0x14001020
+#define STATIC_TIMING_2          0x14001024
+#define STATIC_ADDRESS_2         0x14001028
+
+#define STATIC_CONFIG_3          0x14001030
+#define STATIC_TIMING_3          0x14001034
+#define STATIC_ADDRESS_3         0x14001038
+
+/* DMA Controller 0 */
+#define DMA0_MODE_SET            0x14002000
+#define DMA0_MODE_CLEAR          0x14002004
+#define DMA0_PERIPHERAL_ADDR     0x14002008
+#define DMA0_BUFFER0_START       0x1400200C
+#define DMA0_BUFFER0_COUNT       0x14002010
+#define DMA0_BUFFER1_START       0x14002014
+#define DMA0_BUFFER1_COUNT       0x14002018
+
+/* DMA Controller 1 */
+#define DMA1_MODE_SET            0x14002100
+#define DMA1_MODE_CLEAR          0x14002104
+#define DMA1_PERIPHERAL_ADDR     0x14002108
+#define DMA1_BUFFER0_START       0x1400210C
+#define DMA1_BUFFER0_COUNT       0x14002110
+#define DMA1_BUFFER1_START       0x14002114
+#define DMA1_BUFFER1_COUNT       0x14002118
+
+/* DMA Controller 2 */
+#define DMA2_MODE_SET            0x14002200
+#define DMA2_MODE_CLEAR          0x14002204
+#define DMA2_PERIPHERAL_ADDR     0x14002208
+#define DMA2_BUFFER0_START       0x1400220C
+#define DMA2_BUFFER0_COUNT       0x14002210
+#define DMA2_BUFFER1_START       0x14002214
+#define DMA2_BUFFER1_COUNT       0x14002218
+
+/* DMA Controller 3 */
+#define DMA3_MODE_SET            0x14002300
+#define DMA3_MODE_CLEAR          0x14002304
+#define DMA3_PERIPHERAL_ADDR     0x14002308
+#define DMA3_BUFFER0_START       0x1400230C
+#define DMA3_BUFFER0_COUNT       0x14002310
+#define DMA3_BUFFER1_START       0x14002314
+#define DMA3_BUFFER1_COUNT       0x14002318
+
+/* DMA Controller 4 */
+#define DMA4_MODE_SET            0x14002400
+#define DMA4_MODE_CLEAR          0x14002404
+#define DMA4_PERIPHERAL_ADDR     0x14002408
+#define DMA4_BUFFER0_START       0x1400240C
+#define DMA4_BUFFER0_COUNT       0x14002410
+#define DMA4_BUFFER1_START       0x14002414
+#define DMA4_BUFFER1_COUNT       0x14002418
+
+/* DMA Controller 5 */
+#define DMA5_MODE_SET            0x14002500
+#define DMA5_MODE_CLEAR          0x14002504
+#define DMA5_PERIPHERAL_ADDR     0x14002508
+#define DMA5_BUFFER0_START       0x1400250C
+#define DMA5_BUFFER0_COUNT       0x14002510
+#define DMA5_BUFFER1_START       0x14002514
+#define DMA5_BUFFER1_COUNT       0x14002518
+
+/* DMA Controller 6 */
+#define DMA6_MODE_SET            0x14002600
+#define DMA6_MODE_CLEAR          0x14002604
+#define DMA6_PERIPHERAL_ADDR     0x14002608
+#define DMA6_BUFFER0_START       0x1400260C
+#define DMA6_BUFFER0_COUNT       0x14002610
+#define DMA6_BUFFER1_START       0x14002614
+#define DMA6_BUFFER1_COUNT       0x14002618
+
+/* DMA Controller 7 */
+#define DMA7_MODE_SET            0x14002700
+#define DMA7_MODE_CLEAR          0x14002704
+#define DMA7_PERIPHERAL_ADDR     0x14002708
+#define DMA7_BUFFER0_START       0x1400270C
+#define DMA7_BUFFER0_COUNT       0x14002710
+#define DMA7_BUFFER1_START       0x14002714
+#define DMA7_BUFFER1_COUNT       0x14002718
+
+/* Interrupt Controller 0 */
+#define INTC0_CONFIG0_READ        0x10400040
+#define INTC0_CONFIG0_SET         0x10400040
+#define INTC0_CONFIG0_CLEAR       0x10400044
+
+#define INTC0_CONFIG1_READ        0x10400048
+#define INTC0_CONFIG1_SET         0x10400048
+#define INTC0_CONFIG1_CLEAR       0x1040004C
+
+#define INTC0_CONFIG2_READ        0x10400050
+#define INTC0_CONFIG2_SET         0x10400050
+#define INTC0_CONFIG2_CLEAR       0x10400054
+
+#define INTC0_REQ0_INT            0x10400054
+#define INTC0_SOURCE_READ         0x10400058
+#define INTC0_SOURCE_SET          0x10400058
+#define INTC0_SOURCE_CLEAR        0x1040005C
+#define INTC0_REQ1_INT            0x1040005C
+
+#define INTC0_ASSIGN_REQ_READ     0x10400060
+#define INTC0_ASSIGN_REQ_SET      0x10400060
+#define INTC0_ASSIGN_REQ_CLEAR    0x10400064
+
+#define INTC0_WAKEUP_READ         0x10400068
+#define INTC0_WAKEUP_SET          0x10400068
+#define INTC0_WAKEUP_CLEAR        0x1040006C
+
+#define INTC0_MASK_READ           0x10400070
+#define INTC0_MASK_SET            0x10400070
+#define INTC0_MASK_CLEAR          0x10400074
+
+#define INTC0_R_EDGE_DETECT       0x10400078
+#define INTC0_R_EDGE_DETECT_CLEAR 0x10400078
+#define INTC0_F_EDGE_DETECT_CLEAR 0x1040007C
+
+#define INTC0_TEST_BIT            0x10400080
+
+/* Interrupt Controller 1 */
+#define INTC1_CONFIG0_READ        0x11800040
+#define INTC1_CONFIG0_SET         0x11800040
+#define INTC1_CONFIG0_CLEAR       0x11800044
+
+#define INTC1_CONFIG1_READ        0x11800048
+#define INTC1_CONFIG1_SET         0x11800048
+#define INTC1_CONFIG1_CLEAR       0x1180004C
+
+#define INTC1_CONFIG2_READ        0x11800050
+#define INTC1_CONFIG2_SET         0x11800050
+#define INTC1_CONFIG2_CLEAR       0x11800054
+
+#define INTC1_REQ0_INT            0x11800054
+#define INTC1_SOURCE_READ         0x11800058
+#define INTC1_SOURCE_SET          0x11800058
+#define INTC1_SOURCE_CLEAR        0x1180005C
+#define INTC1_REQ1_INT            0x1180005C
+
+#define INTC1_ASSIGN_REQ_READ     0x11800060
+#define INTC1_ASSIGN_REQ_SET      0x11800060
+#define INTC1_ASSIGN_REQ_CLEAR    0x11800064
+
+#define INTC1_WAKEUP_READ         0x11800068
+#define INTC1_WAKEUP_SET          0x11800068
+#define INTC1_WAKEUP_CLEAR        0x1180006C
+
+#define INTC1_MASK_READ           0x11800070
+#define INTC1_MASK_SET            0x11800070
+#define INTC1_MASK_CLEAR          0x11800074
+
+#define INTC1_R_EDGE_DETECT       0x11800078
+#define INTC1_R_EDGE_DETECT_CLEAR 0x11800078
+#define INTC1_F_EDGE_DETECT_CLEAR 0x1180007C
+
+#define INTC1_TEST_BIT            0x11800080
+
+/* Interrupt Configuration Modes */
+#define INTC_INT_DISABLED                0
+#define INTC_INT_RISE_EDGE             0x1
+#define INTC_INT_FALL_EDGE             0x2
+#define INTC_INT_RISE_AND_FALL_EDGE    0x3
+#define INTC_INT_HIGH_LEVEL            0x5
+#define INTC_INT_LOW_LEVEL             0x6
+#define INTC_INT_HIGH_AND_LOW_LEVEL    0x7
+
+/* Interrupt Numbers */
+#define AU1000_UART0_INT          0
+#define AU1000_UART1_INT          1
+#define AU1000_UART2_INT          2
+#define AU1000_UART3_INT          3
+#define AU1000_SSI0_INT           4
+#define AU1000_SSI1_INT           5
+#define AU1000_DMA0_INT           6
+#define AU1000_DMA1_INT           7
+#define AU1000_DMA2_INT           8
+#define AU1000_DMA3_INT           9
+#define AU1000_DMA4_INT           10
+#define AU1000_DMA5_INT           11
+#define AU1000_DMA6_INT           12
+#define AU1000_DMA7_INT           13
+#define AU1000_PC0_INT            14
+#define AU1000_PC0_MATCH0_INT     15
+#define AU1000_PC0_MATCH1_INT     16
+#define AU1000_PC0_MATCH2_INT     17
+#define AU1000_PC1_INT            18
+#define AU1000_PC1_MATCH0_INT     19
+#define AU1000_PC1_MATCH1_INT     20
+#define AU1000_PC1_MATCH2_INT     21
+#define AU1000_IRDA_TX_INT        22
+#define AU1000_IRDA_RX_INT        23
+#define AU1000_USB_DEV_REQ_INT    24
+#define AU1000_USB_DEV_SUS_INT    25
+#define AU1000_USB_HOST_INT       26
+#define AU1000_ACSYNC_INT         27
+#define AU1000_MAC0_DMA_INT       28
+#define AU1000_MAC1_DMA_INT       29
+#define AU1000_ETH0_IRQ           AU1000_MAC0_DMA_INT
+#define AU1000_ETH1_IRQ           AU1000_MAC1_DMA_INT
+#define AU1000_I2S_UO_INT         30
+#define AU1000_AC97_INT           31
+#define AU1000_LAST_INTC0_INT     AU1000_AC97_INT
+#define AU1000_GPIO_0             32
+#define AU1000_GPIO_1             33
+#define AU1000_GPIO_2             34
+#define AU1000_GPIO_3             35
+#define AU1000_GPIO_4             36
+#define AU1000_GPIO_5             37
+#define AU1000_GPIO_6             38
+#define AU1000_GPIO_7             39
+#define AU1000_GPIO_8             40
+#define AU1000_GPIO_9             41
+#define AU1000_GPIO_10            42
+#define AU1000_GPIO_11            43
+#define AU1000_GPIO_12            44
+#define AU1000_GPIO_13            45
+#define AU1000_GPIO_14            46
+#define AU1000_GPIO_15            47
+#define AU1000_GPIO_16            48
+#define AU1000_GPIO_17            49
+#define AU1000_GPIO_18            50
+#define AU1000_GPIO_19            51
+#define AU1000_GPIO_20            52
+#define AU1000_GPIO_21            53
+#define AU1000_GPIO_22            54
+#define AU1000_GPIO_23            55
+#define AU1000_GPIO_24            56
+#define AU1000_GPIO_25            57
+#define AU1000_GPIO_26            58
+#define AU1000_GPIO_27            59
+#define AU1000_GPIO_28            60
+#define AU1000_GPIO_29            61
+#define AU1000_GPIO_30            62
+#define AU1000_GPIO_31            63
+
+/* Programmable Counters 0 and 1 */
+#define PC_BASE                   0x11900000
+#define PC_COUNTER_CNTRL          (PC_BASE + 0x14)
+  #define PC_CNTRL_E1S            (1<<23)
+  #define PC_CNTRL_T1S            (1<<20)
+  #define PC_CNTRL_M21            (1<<19)
+  #define PC_CNTRL_M11            (1<<18)
+  #define PC_CNTRL_M01            (1<<17)
+  #define PC_CNTRL_C1S            (1<<16)
+  #define PC_CNTRL_BP             (1<<14)
+  #define PC_CNTRL_EN1            (1<<13)
+  #define PC_CNTRL_BT1            (1<<12)
+  #define PC_CNTRL_EN0            (1<<11)
+  #define PC_CNTRL_BT0            (1<<10)
+  #define PC_CNTRL_E0             (1<<8)
+  #define PC_CNTRL_E0S            (1<<7)
+  #define PC_CNTRL_32S            (1<<5)
+  #define PC_CNTRL_T0S            (1<<4)
+  #define PC_CNTRL_M20            (1<<3)
+  #define PC_CNTRL_M10            (1<<2)
+  #define PC_CNTRL_M00            (1<<1)
+  #define PC_CNTRL_C0S            (1<<0)
+
+/* Programmable Counter 0 Registers */
+#define PC0_TRIM                  (PC_BASE + 0)
+#define PC0_COUNTER_WRITE         (PC_BASE + 4)
+#define PC0_MATCH0                (PC_BASE + 8)
+#define PC0_MATCH1                (PC_BASE + 0xC)
+#define PC0_MATCH2                (PC_BASE + 0x10)
+#define PC0_COUNTER_READ          (PC_BASE + 0x40)
+
+/* Programmable Counter 1 Registers */
+#define PC1_TRIM                  (PC_BASE + 0x44)
+#define PC1_COUNTER_WRITE         (PC_BASE + 0x48)
+#define PC1_MATCH0                (PC_BASE + 0x4C)
+#define PC1_MATCH1                (PC_BASE + 0x50)
+#define PC1_MATCH2                (PC_BASE + 0x54)
+#define PC1_COUNTER_READ          (PC_BASE + 0x58)
+
+
+/* I2S Controller */
+#define I2S_DATA                  0x11000000
+#define I2S_CONFIG_STATUS         0x11000001
+#define I2S_CONTROL               0x11000002
+
+/* Ethernet Controllers  */
+#define AU1000_ETH0_BASE          0x10500000
+#define AU1000_ETH1_BASE          0x10510000
+
+/* 4 byte offsets from AU1000_ETH_BASE */
+#define MAC_CONTROL                     0x0
+  #define MAC_RX_ENABLE               (1<<2) 
+  #define MAC_TX_ENABLE               (1<<3)
+  #define MAC_DEF_CHECK               (1<<5) 
+  #define MAC_SET_BL(X)       (((X)&0x3)<<6)
+  #define MAC_AUTO_PAD                (1<<8)
+  #define MAC_DISABLE_RETRY          (1<<10)
+  #define MAC_DISABLE_BCAST          (1<<11)
+  #define MAC_LATE_COL               (1<<12)
+  #define MAC_HASH_MODE              (1<<13)
+  #define MAC_HASH_ONLY              (1<<15)
+  #define MAC_PASS_ALL               (1<<16)
+  #define MAC_INVERSE_FILTER         (1<<17)
+  #define MAC_PROMISCUOUS            (1<<18)
+  #define MAC_PASS_ALL_MULTI         (1<<19)
+  #define MAC_FULL_DUPLEX            (1<<20)
+  #define MAC_NORMAL_MODE                 0
+  #define MAC_INT_LOOPBACK           (1<<21)
+  #define MAC_EXT_LOOPBACK           (1<<22)
+  #define MAC_DISABLE_RX_OWN         (1<<23)
+  #define MAC_BIG_ENDIAN             (1<<30)
+  #define MAC_RX_ALL                 (1<<31)
+#define MAC_ADDRESS_HIGH                0x4
+#define MAC_ADDRESS_LOW                 0x8
+#define MAC_MCAST_HIGH                  0xC
+#define MAC_MCAST_LOW                  0x10
+#define MAC_MII_CNTRL                  0x14
+  #define MAC_MII_BUSY                (1<<0)
+  #define MAC_MII_READ                     0 
+  #define MAC_MII_WRITE               (1<<1)
+  #define MAC_SET_MII_SELECT_REG(X)   (((X)&0x1f)<<6)
+  #define MAC_SET_MII_SELECT_PHY(X)   (((X)&0x1f)<<11)
+#define MAC_MII_DATA                   0x18
+#define MAC_FLOW_CNTRL                 0x1C
+  #define MAC_FLOW_CNTRL_BUSY         (1<<0)
+  #define MAC_FLOW_CNTRL_ENABLE       (1<<1)
+  #define MAC_PASS_CONTROL            (1<<2)
+  #define MAC_SET_PAUSE(X)        (((X)&0xffff)<<16)
+#define MAC_VLAN1_TAG                  0x20
+#define MAC_VLAN2_TAG                  0x24
+
+/* Ethernet Controller Enable */
+#define MAC0_ENABLE               0x10520000
+#define MAC1_ENABLE               0x10520004
+  #define MAC_EN_CLOCK_ENABLE         (1<<0)
+  #define MAC_EN_RESET0               (1<<1)
+  #define MAC_EN_TOSS                 (1<<2)
+  #define MAC_EN_CACHEABLE            (1<<3)
+  #define MAC_EN_RESET1               (1<<4)
+  #define MAC_EN_RESET2               (1<<5)
+  #define MAC_DMA_RESET               (1<<6)
+
+/* Ethernet Controller DMA Channels */
+
+#define MAC0_TX_DMA_ADDR         0x14004000
+#define MAC1_TX_DMA_ADDR         0x14004200
+/* offsets from MAC_TX_RING_ADDR address */
+#define MAC_TX_BUFF0_STATUS             0x0
+  #define TX_FRAME_ABORTED            (1<<0)
+  #define TX_JAB_TIMEOUT              (1<<1)
+  #define TX_NO_CARRIER               (1<<2)
+  #define TX_LOSS_CARRIER             (1<<3)
+  #define TX_EXC_DEF                  (1<<4)
+  #define TX_LATE_COLL_ABORT          (1<<5)
+  #define TX_EXC_COLL                 (1<<6)
+  #define TX_UNDERRUN                 (1<<7)
+  #define TX_DEFERRED                 (1<<8)
+  #define TX_LATE_COLL                (1<<9)
+  #define TX_COLL_CNT_MASK         (0xF<<10)
+  #define TX_PKT_RETRY               (1<<31)
+#define MAC_TX_BUFF0_ADDR                0x4
+  #define TX_DMA_ENABLE               (1<<0)
+  #define TX_T_DONE                   (1<<1)
+  #define TX_GET_DMA_BUFFER(X)    (((X)>>2)&0x3)
+#define MAC_TX_BUFF0_LEN                 0x8
+#define MAC_TX_BUFF1_STATUS             0x10
+#define MAC_TX_BUFF1_ADDR               0x14
+#define MAC_TX_BUFF1_LEN                0x18
+#define MAC_TX_BUFF2_STATUS             0x20
+#define MAC_TX_BUFF2_ADDR               0x24
+#define MAC_TX_BUFF2_LEN                0x28
+#define MAC_TX_BUFF3_STATUS             0x30
+#define MAC_TX_BUFF3_ADDR               0x34
+#define MAC_TX_BUFF3_LEN                0x38
+
+#define MAC0_RX_DMA_ADDR         0x14004100
+#define MAC1_RX_DMA_ADDR         0x14004300
+/* offsets from MAC_RX_RING_ADDR */
+#define MAC_RX_BUFF0_STATUS              0x0
+  #define RX_FRAME_LEN_MASK           0x3fff
+  #define RX_WDOG_TIMER              (1<<14)
+  #define RX_RUNT                    (1<<15)
+  #define RX_OVERLEN                 (1<<16)
+  #define RX_COLL                    (1<<17)
+  #define RX_ETHER                   (1<<18)
+  #define RX_MII_ERROR               (1<<19)
+  #define RX_DRIBBLING               (1<<20)
+  #define RX_CRC_ERROR               (1<<21)
+  #define RX_VLAN1                   (1<<22)
+  #define RX_VLAN2                   (1<<23)
+  #define RX_LEN_ERROR               (1<<24)
+  #define RX_CNTRL_FRAME             (1<<25)
+  #define RX_U_CNTRL_FRAME           (1<<26)
+  #define RX_MCAST_FRAME             (1<<27)
+  #define RX_BCAST_FRAME             (1<<28)
+  #define RX_FILTER_FAIL             (1<<29)
+  #define RX_PACKET_FILTER           (1<<30)
+  #define RX_MISSED_FRAME            (1<<31)
+  
+  #define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN |  \
+                    RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \
+                    RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME)
+#define MAC_RX_BUFF0_ADDR                0x4
+  #define RX_DMA_ENABLE               (1<<0)
+  #define RX_T_DONE                   (1<<1)
+  #define RX_GET_DMA_BUFFER(X)    (((X)>>2)&0x3)
+  #define RX_SET_BUFF_ADDR(X)     ((X)&0xffffffc0)
+#define MAC_RX_BUFF1_STATUS              0x10
+#define MAC_RX_BUFF1_ADDR                0x14
+#define MAC_RX_BUFF2_STATUS              0x20
+#define MAC_RX_BUFF2_ADDR                0x24
+#define MAC_RX_BUFF3_STATUS              0x30
+#define MAC_RX_BUFF3_ADDR                0x34
+
+
+/* UARTS 0-3 */
+#define UART0_ADDR                0x11100000
+#define UART1_ADDR                0x11200000
+#define UART2_ADDR                0x11300000
+#define UART3_ADDR                0x11400000
+
+#define UART_RX		0	/* Receive buffer */
+#define UART_TX		4	/* Transmit buffer */
+#define UART_IER	8	/* Interrupt Enable Register */
+#define UART_IIR	0xC	/* Interrupt ID Register */
+#define UART_FCR	0x10	/* FIFO Control Register */
+#define UART_LCR	0x14	/* Line Control Register */
+#define UART_MCR	0x18	/* Modem Control Register */
+#define UART_LSR	0x1C	/* Line Status Register */
+#define UART_MSR	0x20	/* Modem Status Register */
+#define UART_CLK	0x28	/* Baud Rat4e Clock Divider */
+#define UART_MOD_CNTRL	0x100	/* Module Control */
+
+#define UART_FCR_ENABLE_FIFO	0x01 /* Enable the FIFO */
+#define UART_FCR_CLEAR_RCVR	0x02 /* Clear the RCVR FIFO */
+#define UART_FCR_CLEAR_XMIT	0x04 /* Clear the XMIT FIFO */
+#define UART_FCR_DMA_SELECT	0x08 /* For DMA applications */
+#define UART_FCR_TRIGGER_MASK	0xF0 /* Mask for the FIFO trigger range */
+#define UART_FCR_R_TRIGGER_1	0x00 /* Mask for receive trigger set at 1 */
+#define UART_FCR_R_TRIGGER_4	0x40 /* Mask for receive trigger set at 4 */
+#define UART_FCR_R_TRIGGER_8	0x80 /* Mask for receive trigger set at 8 */
+#define UART_FCR_R_TRIGGER_14   0xA0 /* Mask for receive trigger set at 14 */
+#define UART_FCR_T_TRIGGER_0	0x00 /* Mask for transmit trigger set at 0 */
+#define UART_FCR_T_TRIGGER_4	0x10 /* Mask for transmit trigger set at 4 */
+#define UART_FCR_T_TRIGGER_8    0x20 /* Mask for transmit trigger set at 8 */
+#define UART_FCR_T_TRIGGER_12	0x30 /* Mask for transmit trigger set at 12 */
+
+/*
+ * These are the definitions for the Line Control Register
+ */
+#define UART_LCR_SBC	0x40	/* Set break control */
+#define UART_LCR_SPAR	0x20	/* Stick parity (?) */
+#define UART_LCR_EPAR	0x10	/* Even parity select */
+#define UART_LCR_PARITY	0x08	/* Parity Enable */
+#define UART_LCR_STOP	0x04	/* Stop bits: 0=1 stop bit, 1= 2 stop bits */
+#define UART_LCR_WLEN5  0x00	/* Wordlength: 5 bits */
+#define UART_LCR_WLEN6  0x01	/* Wordlength: 6 bits */
+#define UART_LCR_WLEN7  0x02	/* Wordlength: 7 bits */
+#define UART_LCR_WLEN8  0x03	/* Wordlength: 8 bits */
+
+/*
+ * These are the definitions for the Line Status Register
+ */
+#define UART_LSR_TEMT	0x40	/* Transmitter empty */
+#define UART_LSR_THRE	0x20	/* Transmit-hold-register empty */
+#define UART_LSR_BI	0x10	/* Break interrupt indicator */
+#define UART_LSR_FE	0x08	/* Frame error indicator */
+#define UART_LSR_PE	0x04	/* Parity error indicator */
+#define UART_LSR_OE	0x02	/* Overrun error indicator */
+#define UART_LSR_DR	0x01	/* Receiver data ready */
+
+/*
+ * These are the definitions for the Interrupt Identification Register
+ */
+#define UART_IIR_NO_INT	0x01	/* No interrupts pending */
+#define UART_IIR_ID	0x06	/* Mask for the interrupt ID */
+#define UART_IIR_MSI	0x00	/* Modem status interrupt */
+#define UART_IIR_THRI	0x02	/* Transmitter holding register empty */
+#define UART_IIR_RDI	0x04	/* Receiver data interrupt */
+#define UART_IIR_RLSI	0x06	/* Receiver line status interrupt */
+
+/*
+ * These are the definitions for the Interrupt Enable Register
+ */
+#define UART_IER_MSI	0x08	/* Enable Modem status interrupt */
+#define UART_IER_RLSI	0x04	/* Enable receiver line status interrupt */
+#define UART_IER_THRI	0x02	/* Enable Transmitter holding register int. */
+#define UART_IER_RDI	0x01	/* Enable receiver data interrupt */
+
+/*
+ * These are the definitions for the Modem Control Register
+ */
+#define UART_MCR_LOOP	0x10	/* Enable loopback test mode */
+#define UART_MCR_OUT2	0x08	/* Out2 complement */
+#define UART_MCR_OUT1	0x04	/* Out1 complement */
+#define UART_MCR_RTS	0x02	/* RTS complement */
+#define UART_MCR_DTR	0x01	/* DTR complement */
+
+/*
+ * These are the definitions for the Modem Status Register
+ */
+#define UART_MSR_DCD	0x80	/* Data Carrier Detect */
+#define UART_MSR_RI	0x40	/* Ring Indicator */
+#define UART_MSR_DSR	0x20	/* Data Set Ready */
+#define UART_MSR_CTS	0x10	/* Clear to Send */
+#define UART_MSR_DDCD	0x08	/* Delta DCD */
+#define UART_MSR_TERI	0x04	/* Trailing edge ring indicator */
+#define UART_MSR_DDSR	0x02	/* Delta DSR */
+#define UART_MSR_DCTS	0x01	/* Delta CTS */
+#define UART_MSR_ANY_DELTA 0x0F	/* Any of the delta bits! */
+
+
+
+/* SSIO */
+#define SSI0_STATUS                0x11600000
+#define SSI0_INT                   0x11600004
+#define SSI0_INT_ENABLE            0x11600008
+#define SSI0_CONFIG                0x11600020
+#define SSI0_ADATA                 0x11600024
+#define SSI0_CLKDIV                0x11600028
+#define SSI0_CONTROL               0x11600100
+
+/* SSI1 */
+#define SSI1_STATUS                0x11680000
+#define SSI1_INT                   0x11680004
+#define SSI1_INT_ENABLE            0x11680008
+#define SSI1_CONFIG                0x11680020
+#define SSI1_ADATA                 0x11680024
+#define SSI1_CLKDIV                0x11680028
+#define SSI1_CONTROL               0x11680100
+
+/* IrDA Controller */
+#define IR_RING_PTR_STATUS        0x11500000
+#define IR_RING_BASE_ADDR_H       0x11500004
+#define IR_RING_BASE_ADDR_L       0x11500008
+#define IR_RING_SIZE              0x1150000C
+#define IR_RING_PROMPT            0x11500010
+#define IR_RING_ADDR_CMPR         0x11500014
+#define IR_CONFIG_1               0x11500020
+#define IR_SIR_FLAGS              0x11500024
+#define IR_ENABLE                 0x11500028
+#define IR_READ_PHY_CONFIG        0x1150002C
+#define IR_WRITE_PHY_CONFIG       0x11500030
+#define IR_MAX_PKT_LEN            0x11500034
+#define IR_RX_BYTE_CNT            0x11500038
+#define IR_CONFIG_2               0x1150003C
+#define IR_INTERFACE_CONFIG       0x11500040
+
+/* GPIO */
+#define TSTATE_STATE_READ         0x11900100
+#define TSTATE_STATE_SET          0x11900100
+#define OUTPUT_STATE_READ         0x11900108
+#define OUTPUT_STATE_SET          0x11900108
+#define OUTPUT_STATE_CLEAR        0x1190010C
+#define PIN_STATE                 0x11900110
+
+/* Power Management */
+#define PM_SCRATCH_0                 0x11900018
+#define PM_SCRATCH_1                 0x1190001C
+#define PM_WAKEUP_SOURCE_MASK        0x11900034
+#define PM_ENDIANESS                 0x11900038
+#define PM_POWERUP_CONTROL           0x1190003C
+#define PM_WAKEUP_CAUSE              0x1190005C
+#define PM_SLEEP_POWER               0x11900078
+#define PM_SLEEP                     0x1190007C
+
+/* Clock Controller */
+#define FQ_CNTRL_1                0x11900020
+#define FQ_CNTRL_2                0x11900024
+#define CLOCK_SOURCE_CNTRL        0x11900028
+#define CPU_PLL_CNTRL             0x11900060
+#define AUX_PLL_CNTRL             0x11900064
+
+/* AC97 Controller */
+#define AC97_CONFIG               0x10000000
+#define AC97_STATUS               0x10000004
+#define AC97_DATA                 0x10000008
+#define AC97_CMD                  0x1000000C
+#define AC97_CNTRL                0x10000010
+
+#endif
diff -urN linux-2.4.10-pre6/include/asm-mips/bitops.h linux/include/asm-mips/bitops.h
--- linux-2.4.10-pre6/include/asm-mips/bitops.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/bitops.h	Mon Dec  3 23:08:47 2001
@@ -41,7 +41,7 @@
 #define __bi_restore_flags(x)
 #endif /* __KERNEL__ */
 
-#if defined(CONFIG_CPU_HAS_LLSC)
+#ifdef CONFIG_CPU_HAS_LLSC
 
 #include <asm/mipsregs.h>
 
@@ -596,8 +596,9 @@
 		"blez\t$1,2f\n\t"
 		"lw\t$1,(%5)\n\t"
 		"addiu\t%5,4\n\t"
-#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS2 ) || (_MIPS_ISA == _MIPS_ISA_MIPS3 ) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5 ) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 		"beql\t%1,$1,1b\n\t"
 		"addiu\t%0,32\n\t"
 #else
@@ -795,11 +796,12 @@
 /* Now for the ext2 filesystem bit operations and helper routines. */
 
 #ifdef __MIPSEB__
-extern __inline__ int ext2_set_bit(int nr,void * addr)
+extern __inline__ int ext2_set_bit(int nr, void * addr)
 {
 	int		mask, retval, flags;
 	unsigned char	*ADDR = (unsigned char *) addr;
 
+	ADDR += nr >> 3;
 	mask = 1 << (nr & 0x07);
 	save_and_cli(flags);
 	retval = (mask & *ADDR) != 0;
diff -urN linux-2.4.10-pre6/include/asm-mips/bootinfo.h linux/include/asm-mips/bootinfo.h
--- linux-2.4.10-pre6/include/asm-mips/bootinfo.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/bootinfo.h	Mon Dec  3 23:08:47 2001
@@ -235,9 +235,11 @@
 #define CPU_TX3922		35
 #define CPU_TX3927		36
 #define CPU_AU1000		37
-#define CPU_4KEC		37
-#define CPU_4KSC		38
-#define CPU_LAST		39
+#define CPU_4KEC		38
+#define CPU_4KSC		39
+#define CPU_VR41XX		40
+#define CPU_LAST		40
+
 
 #define CPU_NAMES { "unknown", "R2000", "R3000", "R3000A", "R3041", "R3051", \
         "R3052", "R3081", "R3081E", "R4000PC", "R4000SC", "R4000MC",         \
@@ -245,7 +247,7 @@
         "R6000A", "R8000", "R10000", "R4300", "R4650", "R4700", "R5000",     \
         "R5000A", "R4640", "Nevada", "RM7000", "R5432", "MIPS 4Kc",          \
         "MIPS 5Kc", "R4310", "SiByte SB1", "TX3912", "TX3922", "TX3927",     \
-	"Au1000", "MIPS 4KEc", "MIPS 4KSc" }
+	"Au1000", "MIPS 4KEc", "MIPS 4KSc", "NEC Vr41xx" }
 
 #define COMMAND_LINE_SIZE	256
 
diff -urN linux-2.4.10-pre6/include/asm-mips/cachectl.h linux/include/asm-mips/cachectl.h
--- linux-2.4.10-pre6/include/asm-mips/cachectl.h	Thu Jun 26 12:33:39 1997
+++ linux/include/asm-mips/cachectl.h	Mon Dec  3 23:08:47 2001
@@ -16,7 +16,7 @@
 /*
  * Caching modes for the cachectl(2) call
  *
- * cachctl(2) is currently not supported and returns ENOSYS.
+ * cachectl(2) is currently not supported and returns ENOSYS.
  */
 #define CACHEABLE	0	/* make pages cacheable */
 #define UNCACHEABLE	1	/* make pages uncacheable */
diff -urN linux-2.4.10-pre6/include/asm-mips/cpu.h linux/include/asm-mips/cpu.h
--- linux-2.4.10-pre6/include/asm-mips/cpu.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/cpu.h	Mon Dec  3 23:08:47 2001
@@ -8,6 +8,7 @@
 #define _ASM_CPU_H
 
 #include <asm/cache.h>
+
 /* Assigned Company values for bits 23:16 of the PRId Register  
    (CP0 register 15, select 0).  As of the MIPS32 and MIPS64 specs from 
    MTI, the PRId register is defined in this (backwards compatible)
@@ -44,6 +45,7 @@
 #define PRID_IMP_R6000A		0x0600
 #define PRID_IMP_R10000		0x0900
 #define PRID_IMP_R4300		0x0b00
+#define PRID_IMP_VR41XX		0x0c00
 #define PRID_IMP_R12000		0x0e00
 #define PRID_IMP_R8000		0x1000
 #define PRID_IMP_R4600		0x2000
@@ -52,11 +54,11 @@
 #define PRID_IMP_R4640		0x2200
 #define PRID_IMP_R4650		0x2200		/* Same as R4640 */
 #define PRID_IMP_R5000		0x2300
-#define PRID_IMP_R5432		0x5400
 #define PRID_IMP_SONIC		0x2400
 #define PRID_IMP_MAGIC		0x2500
 #define PRID_IMP_RM7000		0x2700
 #define PRID_IMP_NEVADA		0x2800		/* RM5260 ??? */
+#define PRID_IMP_R5432		0x5400
 #define PRID_IMP_4KC		0x8000
 #define PRID_IMP_5KC		0x8100
 #define PRID_IMP_4KEC		0x8400
@@ -122,7 +124,7 @@
 #define MIPS_CPU_4KTLB		0x00000008  /* "R4K" TLB handler */
 #define MIPS_CPU_FPU		0x00000010  /* CPU has FPU */
 #define MIPS_CPU_32FPR		0x00000020  /* 32 dbl. prec. FP registers */
-#define MIPS_CPU_COUNTER	0x00000040 /* Cycle count/compare */
+#define MIPS_CPU_COUNTER	0x00000040  /* Cycle count/compare */
 #define MIPS_CPU_WATCH		0x00000080  /* watchpoint registers */
 #define MIPS_CPU_MIPS16		0x00000100  /* code compression */
 #define MIPS_CPU_DIVEC		0x00000200  /* dedicated interrupt vector */
diff -urN linux-2.4.10-pre6/include/asm-mips/ddb5xxx/ddb5477.h linux/include/asm-mips/ddb5xxx/ddb5477.h
--- linux-2.4.10-pre6/include/asm-mips/ddb5xxx/ddb5477.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/ddb5xxx/ddb5477.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,238 @@
+/***********************************************************************
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * include/asm-mips/ddb5xxx/ddb5477.h
+ *     DDB 5477 specific definitions and macros.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ ***********************************************************************
+ */
+
+#ifndef __ASM_DDB5XXX_DDB5477_H
+#define __ASM_DDB5XXX_DDB5477_H
+
+#include <linux/config.h>
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+/*
+ * This contains macros that are specific to DDB5477 or renamed from
+ * DDB5476.
+ */
+
+/*
+ * renamed PADRs
+ */
+#define	DDB_LCS0	DDB_LDCS0
+#define	DDB_LCS1	DDB_LDCS1
+#define	DDB_LCS2	DDB_LDCS2
+#define	DDB_VRC5477	DDB_INTCS
+
+/*
+ * New CPU interface registers
+ */
+#define	DDB_INTCTRL0	0x0400	/* Interrupt Control 0 */
+#define	DDB_INTCTRL1	0x0404	/* Interrupt Control 1 */
+#define	DDB_INTCTRL2	0x0408	/* Interrupt Control 2 */
+#define	DDB_INTCTRL3	0x040c	/* Interrupt Control 3 */
+
+#define	DDB_INT0STAT	0x0420 	/* INT0 Status [R] */
+#define	DDB_INT1STAT	0x0428 	/* INT1 Status [R] */
+#define	DDB_INT2STAT	0x0430 	/* INT2 Status [R] */
+#define	DDB_INT3STAT	0x0438 	/* INT3 Status [R] */
+#define	DDB_INT4STAT	0x0440 	/* INT4 Status [R] */
+#define	DDB_NMISTAT	0x0450	/* NMI Status [R] */
+
+#define	DDB_INTCLR32	0x0468	/* Interrupt Clear */
+
+#define	DDB_INTPPES0	0x0470	/* PCI0 Interrupt Control */
+#define	DDB_INTPPES1	0x0478	/* PCI1 Interrupt Control */
+
+#undef  DDB_CPUSTAT		/* duplicate in Vrc-5477 */
+#define	DDB_CPUSTAT	0x0480	/* CPU Status [R] */
+#define	DDB_BUSCTRL	0x0488	/* Internal Bus Control */
+
+
+/*
+ * Timer registers
+ */
+#define	DDB_REFCTRL_L	DDB_T0CTRL
+#define	DDB_REFCTRL_H	(DDB_T0CTRL+4)
+#define	DDB_REFCNTR	DDB_T0CNTR
+#define	DDB_SPT0CTRL_L	DDB_T1CTRL
+#define	DDB_SPT0CTRL_H	(DDB_T1CTRL+4)
+#define	DDB_SPT1CTRL_L	DDB_T2CTRL
+#define	DDB_SPT1CTRL_H	(DDB_T2CTRL+4)
+#define DDB_SPT1CNTR	DDB_T1CTRL
+#define	DDB_WDTCTRL_L	DDB_T3CTRL
+#define	DDB_WDTCTRL_H	(DDB_T3CTRL+4)
+#define	DDB_WDTCNTR	DDB_T3CNTR
+
+/*
+ * DMA registers are moved.  We don't care about it for now. TODO.
+ */
+
+/*
+ * BARs for ext PCI (PCI0)
+ */
+#undef	DDB_BARC
+#undef	DDB_BARB
+
+#define DDB_BARC0	0x0210	/* PCI0 Control */
+#define DDB_BARM010	0x0218	/* PCI0 SDRAM bank01 */
+#define	DDB_BARM230	0x0220	/* PCI0 SDRAM bank23 */
+#define	DDB_BAR00	0x0240	/* PCI0 LDCS0 */
+#define	DDB_BAR10	0x0248	/* PCI0 LDCS1 */
+#define	DDB_BAR20	0x0250	/* PCI0 LDCS2 */
+#define	DDB_BAR30	0x0258	/* PCI0 LDCS3 */
+#define	DDB_BAR40	0x0260	/* PCI0 LDCS4 */
+#define	DDB_BAR50	0x0268	/* PCI0 LDCS5 */
+#define	DDB_BARB0	0x0280	/* PCI0 BOOT */
+#define	DDB_BARP00	0x0290	/* PCI0 for IOPCI Window0 */
+#define	DDB_BARP10	0x0298	/* PCI0 for IOPCI Window1 */
+
+/*
+ * BARs for IOPIC (PCI1)
+ */
+#define DDB_BARC1	0x0610	/* PCI1 Control */
+#define DDB_BARM011	0x0618	/* PCI1 SDRAM bank01 */
+#define	DDB_BARM231	0x0620	/* PCI1 SDRAM bank23 */
+#define	DDB_BAR01	0x0640	/* PCI1 LDCS0 */
+#define	DDB_BAR11	0x0648	/* PCI1 LDCS1 */
+#define	DDB_BAR21	0x0650	/* PCI1 LDCS2 */
+#define	DDB_BAR31	0x0658	/* PCI1 LDCS3 */
+#define	DDB_BAR41	0x0660	/* PCI1 LDCS4 */
+#define	DDB_BAR51	0x0668	/* PCI1 LDCS5 */
+#define	DDB_BARB1	0x0680	/* PCI1 BOOT */
+#define	DDB_BARP01	0x0690	/* PCI1 for ext PCI Window0 */
+#define	DDB_BARP11	0x0698	/* PCI1 for ext PCI Window1 */
+
+/*
+ * Other registers for ext PCI (PCI0)
+ */
+#define	DDB_PCIINIT00	0x02f0	/* PCI0 Initiator 0 */
+#define	DDB_PCIINIT10	0x02f8	/* PCI0 Initiator 1 */
+
+#define	DDB_PCISWP0	0x02b0	/* PCI0 Swap */
+#define	DDB_PCIERR0	0x02b8	/* PCI0 Error */
+
+#define	DDB_PCICTL0_L	0x02e0	/* PCI0 Control-L */
+#define	DDB_PCICTL0_H	0x02e4	/* PCI0 Control-H */
+#define	DDB_PCIARB0_L	0x02e8	/* PCI0 Arbitration-L */
+#define	DDB_PCIARB0_H	0x02ec	/* PCI0 Arbitration-H */
+
+/*
+ * Other registers for IOPCI (PCI1)
+ */
+#define DDB_IOPCIW0	0x00d0	/* PCI Address Window 0 [R/W] */
+#define DDB_IOPCIW1	0x00d8	/* PCI Address Window 1 [R/W] */
+
+#define	DDB_PCIINIT01	0x06f0	/* PCI1 Initiator 0 */
+#define	DDB_PCIINIT11	0x06f8	/* PCI1 Initiator 1 */
+
+#define	DDB_PCISWP1	0x06b0	/* PCI1 Swap */
+#define	DDB_PCIERR1	0x06b8	/* PCI1 Error */
+
+#define	DDB_PCICTL1_L	0x06e0	/* PCI1 Control-L */
+#define	DDB_PCICTL1_H	0x06e4	/* PCI1 Control-H */
+#define	DDB_PCIARB1_L	0x06e8	/* PCI1 Arbitration-L */
+#define	DDB_PCIARB1_H	0x06ec	/* PCI1 Arbitration-H */
+
+/*
+ * Local Bus
+ */
+#define DDB_LCST0	0x0110  /* LB Chip Select Timing 0 */
+#define DDB_LCST1	0x0118  /* LB Chip Select Timing 1 */
+#undef DDB_LCST2
+#define DDB_LCST2	0x0120  /* LB Chip Select Timing 2 */
+#undef DDB_LCST3
+#undef DDB_LCST4
+#undef DDB_LCST5
+#undef DDB_LCST6
+#undef DDB_LCST7
+#undef DDB_LCST8
+#define DDB_ERRADR	0x0150  /* Error Address Register */
+#define DDB_ERRCS       0x0160
+#define DDB_BTM		0x0170  /* Boot Time Mode value */
+
+/*
+ * MISC registers
+ */
+#define DDB_GIUFUNSEL	0x4040  /* select dual-func pins */
+#define DDB_PIBMISC	0x0750	/* USB buffer enable / power saving */
+
+/*
+ *  Memory map (physical address)
+ *
+ *  Note most of the following address must be properly aligned by the
+ *  corresponding size.  For example, if PCI_IO_SIZE is 16MB, then
+ *  PCI_IO_BASE must be aligned along 16MB boundary.
+ */
+#define	DDB_SDRAM_BASE		0x00000000
+#define	DDB_SDRAM_SIZE		0x08000000	/* 128MB, for sure? */
+
+#define	DDB_PCI0_MEM_BASE	0x08000000
+#define	DDB_PCI0_MEM_SIZE	0x08000000	/* 128 MB */
+
+#define	DDB_PCI1_MEM_BASE	0x10000000
+#define	DDB_PCI1_MEM_SIZE	0x08000000	/* 128 MB */
+
+#define	DDB_PCI0_CONFIG_BASE	0x18000000
+#define	DDB_PCI0_CONFIG_SIZE	0x01000000	/* 16 MB */
+
+#define	DDB_PCI1_CONFIG_BASE	0x19000000
+#define	DDB_PCI1_CONFIG_SIZE	0x01000000	/* 16 MB */
+
+#define	DDB_PCI_IO_BASE		0x1a000000	/* we concatenate two IOs */
+#define	DDB_PCI0_IO_BASE	0x1a000000
+#define	DDB_PCI0_IO_SIZE	0x01000000	/* 16 MB */
+#define	DDB_PCI1_IO_BASE	0x1b000000
+#define	DDB_PCI1_IO_SIZE	0x01000000	/* 16 MB */
+
+#define	DDB_LCS0_BASE		0x1c000000	/* flash memory */
+#define	DDB_LCS0_SIZE		0x01000000	/* 16 MB */
+
+#define	DDB_LCS1_BASE		0x1d000000	/* misc */
+#define	DDB_LCS1_SIZE		0x01000000	/* 16 MB */
+
+#define	DDB_LCS2_BASE		0x1e000000	/* Mezzanine */
+#define	DDB_LCS2_SIZE		0x01000000	/* 16 MB */
+
+#define	DDB_VRC5477_BASE	0x1fa00000	/* VRC5477 control regs */
+#define	DDB_VRC5477_SIZE	0x00200000	/* 2MB */
+
+#define	DDB_BOOTCS_BASE		0x1fc00000	/* Boot ROM / EPROM /Flash */
+#define	DDB_BOOTCS_SIZE		0x00200000	/* 2 MB - doc says 4MB */
+
+#define	DDB_LED			DDB_LCS1_BASE + 0x10000
+
+
+/*
+ * DDB5477 specific functions
+ */
+extern void ddb5477_irq_setup(void);
+
+/* route irq to cpu int pin */
+extern void ll_vrc5477_irq_route(int vrc5477_irq, int ip);
+
+/* low-level routine for enabling vrc5477 irq, bypassing high-level */
+extern void ll_vrc5477_irq_enable(int vrc5477_irq);
+extern void ll_vrc5477_irq_disable(int vrc5477_irq);
+
+/* 
+ * debug routines
+ */
+#if defined(CONFIG_LL_DEBUG)
+extern void vrc5477_show_pdar_regs(void);
+extern void vrc5477_show_pci_regs(void);
+extern void vrc5477_show_bar_regs(void);
+extern void vrc5477_show_int_regs(void);
+extern void vrc5477_show_all_regs(void);
+#endif
+
+#endif /* __ASM_DDB5XXX_DDB5477_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/ddb5xxx/ddb5xxx.h linux/include/asm-mips/ddb5xxx/ddb5xxx.h
--- linux-2.4.10-pre6/include/asm-mips/ddb5xxx/ddb5xxx.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/ddb5xxx/ddb5xxx.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,271 @@
+/***********************************************************************
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
+ *                    Sony Software Development Center Europe (SDCE), Brussels
+ *
+ * include/asm-mips/ddb5xxx/ddb5xxx.h
+ *     Common header for all NEC DDB 5xxx boards, including 5074, 5476, 5477.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ ***********************************************************************
+ */
+
+#ifndef __ASM_DDB5XXX_DDB5XXX_H
+#define __ASM_DDB5XXX_DDB5XXX_H
+
+#include <linux/config.h>
+#include <linux/types.h>
+
+#include <asm/ddb5xxx/debug.h>
+
+/*
+ *  This file is based on the following documentation:
+ *
+ *	NEC Vrc 5074 System Controller Data Sheet, June 1998
+ *
+ * [jsun] It is modified so that this file only contains the macros
+ * that are true for all DDB 5xxx boards.  The modification is based on
+ *
+ *	uPD31577(VRC5477) VR5432-SDRAM/PCI Bridge (Luke)
+ *	Preliminary Specification Decoment, Rev 1.1, 27 Dec, 2000
+ *  
+ */
+
+
+#define DDB_BASE		0xbfa00000
+#define DDB_SIZE		0x00200000		/* 2 MB */
+
+
+/*
+ *  Physical Device Address Registers (PDARs)
+ */
+
+#define DDB_SDRAM0	0x0000	/* SDRAM Bank 0 [R/W] */
+#define DDB_SDRAM1	0x0008	/* SDRAM Bank 1 [R/W] */
+#define DDB_LDCS0	0x0010	/* Device Chip-Select 0 [R/W] */
+#define DDB_LDCS1	0x0018	/* Device Chip-Select 1 [R/W] */
+#define DDB_LDCS2	0x0020	/* Device Chip-Select 2 [R/W] */
+#define DDB_LDCS3	0x0028	/* Device Chip-Select 3 [R/W] */
+#define DDB_LDCS4	0x0030	/* Device Chip-Select 4 [R/W] */
+#define DDB_LDCS5	0x0038	/* Device Chip-Select 5 [R/W] */
+#define DDB_PCIW0	0x0060	/* PCI Address Window 0 [R/W] */
+#define DDB_PCIW1	0x0068	/* PCI Address Window 1 [R/W] */
+#define DDB_INTCS	0x0070	/* Controller Internal Registers and Devices */
+				/* [R/W] */
+#define DDB_BOOTCS	0x0078	/* Boot ROM Chip-Select [R/W] */
+/* Vrc5477 has two more, IOPCIW0, IOPCIW1 */
+
+/*
+ *  CPU Interface Registers
+ */
+#define DDB_CPUSTAT	0x0080	/* CPU Status [R/W] */
+#define DDB_INTCTRL	0x0088	/* Interrupt Control [R/W] */
+#define DDB_INTSTAT0	0x0090	/* Interrupt Status 0 [R] */
+#define DDB_INTSTAT1	0x0098	/* Interrupt Status 1 and CPU Interrupt */
+				/* Enable [R/W] */
+#define DDB_INTCLR	0x00A0	/* Interrupt Clear [R/W] */
+#define DDB_INTPPES	0x00A8	/* PCI Interrupt Control [R/W] */
+
+
+/*
+ *  Memory-Interface Registers
+ */
+#define DDB_MEMCTRL	0x00C0	/* Memory Control */
+#define DDB_ACSTIME	0x00C8	/* Memory Access Timing [R/W] */
+#define DDB_CHKERR	0x00D0	/* Memory Check Error Status [R] */
+
+
+/*
+ *  PCI-Bus Registers
+ */
+#define DDB_PCICTRL	0x00E0	/* PCI Control [R/W] */
+#define DDB_PCIARB	0x00E8	/* PCI Arbiter [R/W] */
+#define DDB_PCIINIT0	0x00F0	/* PCI Master (Initiator) 0 [R/W] */
+#define DDB_PCIINIT1	0x00F8	/* PCI Master (Initiator) 1 [R/W] */
+#define DDB_PCIERR	0x00B8	/* PCI Error [R/W] */
+
+
+/*
+ *  Local-Bus Registers
+ */
+#define DDB_LCNFG	0x0100	/* Local Bus Configuration [R/W] */
+#define DDB_LCST2	0x0110	/* Local Bus Chip-Select Timing 2 [R/W] */
+#define DDB_LCST3	0x0118	/* Local Bus Chip-Select Timing 3 [R/W] */
+#define DDB_LCST4	0x0120	/* Local Bus Chip-Select Timing 4 [R/W] */
+#define DDB_LCST5	0x0128	/* Local Bus Chip-Select Timing 5 [R/W] */
+#define DDB_LCST6	0x0130	/* Local Bus Chip-Select Timing 6 [R/W] */
+#define DDB_LCST7	0x0138	/* Local Bus Chip-Select Timing 7 [R/W] */
+#define DDB_LCST8	0x0140	/* Local Bus Chip-Select Timing 8 [R/W] */
+#define DDB_DCSFN	0x0150	/* Device Chip-Select Muxing and Output */
+				/* Enables [R/W] */
+#define DDB_DCSIO	0x0158	/* Device Chip-Selects As I/O Bits [R/W] */
+#define DDB_BCST	0x0178	/* Local Boot Chip-Select Timing [R/W] */
+
+
+/*
+ *  DMA Registers
+ */
+#define DDB_DMACTRL0	0x0180	/* DMA Control 0 [R/W] */
+#define DDB_DMASRCA0	0x0188	/* DMA Source Address 0 [R/W] */
+#define DDB_DMADESA0	0x0190	/* DMA Destination Address 0 [R/W] */
+#define DDB_DMACTRL1	0x0198	/* DMA Control 1 [R/W] */
+#define DDB_DMASRCA1	0x01A0	/* DMA Source Address 1 [R/W] */
+#define DDB_DMADESA1	0x01A8	/* DMA Destination Address 1 [R/W] */
+
+
+/*
+ *  Timer Registers
+ */
+#define DDB_T0CTRL	0x01C0	/* SDRAM Refresh Control [R/W] */
+#define DDB_T0CNTR	0x01C8	/* SDRAM Refresh Counter [R/W] */
+#define DDB_T1CTRL	0x01D0	/* CPU-Bus Read Time-Out Control [R/W] */
+#define DDB_T1CNTR	0x01D8	/* CPU-Bus Read Time-Out Counter [R/W] */
+#define DDB_T2CTRL	0x01E0	/* General-Purpose Timer Control [R/W] */
+#define DDB_T2CNTR	0x01E8	/* General-Purpose Timer Counter [R/W] */
+#define DDB_T3CTRL	0x01F0	/* Watchdog Timer Control [R/W] */
+#define DDB_T3CNTR	0x01F8	/* Watchdog Timer Counter [R/W] */
+
+
+/*
+ *  PCI Configuration Space Registers
+ */
+#define DDB_PCI_BASE	0x0200
+
+#define DDB_VID		0x0200	/* PCI Vendor ID [R] */
+#define DDB_DID		0x0202	/* PCI Device ID [R] */
+#define DDB_PCICMD	0x0204	/* PCI Command [R/W] */
+#define DDB_PCISTS	0x0206	/* PCI Status [R/W] */
+#define DDB_REVID	0x0208	/* PCI Revision ID [R] */
+#define DDB_CLASS	0x0209	/* PCI Class Code [R] */
+#define DDB_CLSIZ	0x020C	/* PCI Cache Line Size [R/W] */
+#define DDB_MLTIM	0x020D	/* PCI Latency Timer [R/W] */
+#define DDB_HTYPE	0x020E	/* PCI Header Type [R] */
+#define DDB_BIST	0x020F	/* BIST [R] (unimplemented) */
+#define DDB_BARC	0x0210	/* PCI Base Address Register Control [R/W] */
+#define DDB_BAR0	0x0218	/* PCI Base Address Register 0 [R/W] */
+#define DDB_BAR1	0x0220	/* PCI Base Address Register 1 [R/W] */
+#define DDB_CIS		0x0228	/* PCI Cardbus CIS Pointer [R] */
+				/* (unimplemented) */
+#define DDB_SSVID	0x022C	/* PCI Sub-System Vendor ID [R/W] */
+#define DDB_SSID	0x022E	/* PCI Sub-System ID [R/W] */
+#define DDB_ROM		0x0230	/* Expansion ROM Base Address [R] */
+				/* (unimplemented) */
+#define DDB_INTLIN	0x023C	/* PCI Interrupt Line [R/W] */
+#define DDB_INTPIN	0x023D	/* PCI Interrupt Pin [R] */
+#define DDB_MINGNT	0x023E	/* PCI Min_Gnt [R] (unimplemented) */
+#define DDB_MAXLAT	0x023F	/* PCI Max_Lat [R] (unimplemented) */
+#define DDB_BAR2	0x0240	/* PCI Base Address Register 2 [R/W] */
+#define DDB_BAR3	0x0248	/* PCI Base Address Register 3 [R/W] */
+#define DDB_BAR4	0x0250	/* PCI Base Address Register 4 [R/W] */
+#define DDB_BAR5	0x0258	/* PCI Base Address Register 5 [R/W] */
+#define DDB_BAR6	0x0260	/* PCI Base Address Register 6 [R/W] */
+#define DDB_BAR7	0x0268	/* PCI Base Address Register 7 [R/W] */
+#define DDB_BAR8	0x0270	/* PCI Base Address Register 8 [R/W] */
+#define DDB_BARB	0x0278	/* PCI Base Address Register BOOT [R/W] */
+
+
+/*
+ *  Nile 4 Register Access
+ */
+
+static inline void ddb_sync(void)
+{
+    volatile u32 *p = (volatile u32 *)0xbfc00000;
+    (void)(*p);
+}
+
+static inline void ddb_out32(u32 offset, u32 val)
+{
+    *(volatile u32 *)(DDB_BASE+offset) = val;
+    ddb_sync();
+}
+
+static inline u32 ddb_in32(u32 offset)
+{
+    u32 val = *(volatile u32 *)(DDB_BASE+offset);
+    ddb_sync();
+    return val;
+}
+
+static inline void ddb_out16(u32 offset, u16 val)
+{
+    *(volatile u16 *)(DDB_BASE+offset) = val;
+    ddb_sync();
+}
+
+static inline u16 ddb_in16(u32 offset)
+{
+    u16 val = *(volatile u16 *)(DDB_BASE+offset);
+    ddb_sync();
+    return val;
+}
+
+static inline void ddb_out8(u32 offset, u8 val)
+{
+    *(volatile u8 *)(DDB_BASE+offset) = val;
+    ddb_sync();
+}
+
+static inline u8 ddb_in8(u32 offset)
+{
+    u8 val = *(volatile u8 *)(DDB_BASE+offset);
+    ddb_sync();
+    return val;
+}
+
+
+/*
+ *  Physical Device Address Registers
+ */
+
+extern u32 
+ddb_calc_pdar(u32 phys, u32 size, int width, int on_memory_bus, int pci_visible);
+extern void 
+ddb_set_pdar(u32 pdar, u32 phys, u32 size, int width,
+	     int on_memory_bus, int pci_visible);
+
+/*
+ *  PCI Master Registers
+ */
+
+#define DDB_PCICMD_IACK		0	/* PCI Interrupt Acknowledge */
+#define DDB_PCICMD_IO		1	/* PCI I/O Space */
+#define DDB_PCICMD_MEM		3	/* PCI Memory Space */
+#define DDB_PCICMD_CFG		5	/* PCI Configuration Space */
+
+/*
+ * additional options for pci init reg (no shifting needed)
+ */
+#define DDB_PCI_CFGTYPE1     0x200   /* for pci init0/1 regs */
+#define DDB_PCI_ACCESS_32    0x10    /* for pci init0/1 regs */
+
+
+extern void ddb_set_pmr(u32 pmr, u32 type, u32 addr, u32 options);
+
+/*
+ * we need to reset pci bus when we start up and shutdown
+ */
+extern void ddb_pci_reset_bus(void);
+
+
+/*
+ * include the board dependent part
+ */
+#if defined(CONFIG_DDB5074)
+#include <asm/ddb5xxx/ddb5074.h>
+#elif defined(CONFIG_DDB5476)
+#include <asm/ddb5xxx/ddb5476.h>
+#elif defined(CONFIG_DDB5477)
+#include <asm/ddb5xxx/ddb5477.h>
+#else
+#error "Unknown DDB board!"
+#endif
+
+#endif /* __ASM_DDB5XXX_DDB5XXX_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/ddb5xxx/debug.h linux/include/asm-mips/ddb5xxx/debug.h
--- linux-2.4.10-pre6/include/asm-mips/ddb5xxx/debug.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/ddb5xxx/debug.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,42 @@
+/***********************************************************************
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * include/asm-mips/ddb5xxx/debug.h
+ *     Some debug macros used by ddb code.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ ***********************************************************************
+ */
+
+#ifndef __ASM_DDB5XXX_DEBUG_H
+#define __ASM_DDB5XXX_DEBUG_H
+
+#include <linux/config.h>
+
+/*
+ * macro for catching spurious errors.  Eable to LL_DEBUG in kernel hacking
+ * config menu.
+ */
+#ifdef CONFIG_LL_DEBUG
+
+#include <linux/kernel.h>
+
+#define MIPS_ASSERT(x)  if (!(x)) { panic("MIPS_ASSERT failed at %s:%d\n", __FILE__, __LINE__); }
+#define MIPS_VERIFY(x, y) MIPS_ASSERT(x y)
+#define MIPS_DEBUG(x)  do { x; } while (0)
+
+#else
+
+#define MIPS_ASSERT(x)
+#define MIPS_VERIFY(x, y) x
+#define MIPS_DEBUG(x)
+
+#endif
+
+#endif /* __ASM_DDB5XXX_DEBUG_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/ddb5xxx/pci.h linux/include/asm-mips/ddb5xxx/pci.h
--- linux-2.4.10-pre6/include/asm-mips/ddb5xxx/pci.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/ddb5xxx/pci.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,34 @@
+#ifndef __ASM_DDB5XXXX_PCI_H
+#define __ASM_DDB5XXXX_PCI_H
+
+/*
+ * This file essentially defines the interface between board
+ * specific PCI code and MIPS common PCI code.  Should potentially put
+ * into include/asm/pci.h file.
+ */
+
+#include <linux/ioport.h>
+#include <linux/pci.h>
+
+/*
+ * Each pci channel is a top-level PCI bus seem by CPU.  A machine  with
+ * multiple PCI channels may have multiple PCI host controllers or a
+ * single controller supporting multiple channels.
+ */
+struct pci_channel {
+	struct pci_ops *pci_ops;
+	struct resource *io_resource;
+	struct resource *mem_resource;
+};
+
+/* 
+ * each board defines an array of pci_channels, that ends with all NULL entry
+ */
+extern struct pci_channel mips_pci_channels[];
+
+/*
+ * board supplied pci irq fixup routine
+ */
+extern void pcibios_fixup_irqs(void);
+
+#endif  /* __ASM_DDB5XXXX_PCI_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/dec/interrupts.h linux/include/asm-mips/dec/interrupts.h
--- linux-2.4.10-pre6/include/asm-mips/dec/interrupts.h	Fri Jun 25 17:37:53 1999
+++ linux/include/asm-mips/dec/interrupts.h	Mon Dec  3 23:08:47 2001
@@ -36,7 +36,7 @@
 
 #define NR_INTS	11
 
-#ifndef _LANGUAGE_ASSEMBLY
+#ifndef __ASSEMBLY__
 /*
  * Data structure to hide the differences between the DECstation Interrupts
  *
@@ -50,6 +50,12 @@
 	unsigned int	iemask;		/* enabling interrupts in IRQ Controller	*/
 } decint_t;
 
+extern volatile unsigned int *isr;
+				/* address of the interrupt status register  */
+extern volatile unsigned int *imr;
+				/* address of the interrupt mask register    */
+extern decint_t dec_interrupt[NR_INTS];
+
 /*
  * Interrupt table structure to hide differences between different
  * systems such.
@@ -68,10 +74,8 @@
 extern void	dec_intr_rtc(void);
 
 extern void	kn02_io_int(void);
-extern void	kn02ba_io_int(void);
+extern void	kn02xa_io_int(void);
 extern void	kn03_io_int(void);
-
-extern void	intr_halt(void);
 
 extern void	asic_intr_unimplemented(void);
 
diff -urN linux-2.4.10-pre6/include/asm-mips/dec/ioasic.h linux/include/asm-mips/dec/ioasic.h
--- linux-2.4.10-pre6/include/asm-mips/dec/ioasic.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/dec/ioasic.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,24 @@
+/*
+ *  linux/asm-mips/dec/ioasic.h
+ *
+ *  Copyright (C) 2000  Maciej W. Rozycki
+ *
+ *  DEC I/O ASIC access operations.
+ */
+
+#ifndef __ASM_DEC_IOASIC_H
+#define __ASM_DEC_IOASIC_H
+
+extern volatile unsigned int *ioasic_base;
+
+extern inline void ioasic_write(unsigned int reg, unsigned int v)
+{
+	ioasic_base[reg / 4] = v;
+}
+
+extern inline unsigned int ioasic_read(unsigned int reg)
+{
+	return ioasic_base[reg / 4];
+}
+
+#endif /* __ASM_DEC_IOASIC_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/dec/ioasic_addrs.h linux/include/asm-mips/dec/ioasic_addrs.h
--- linux-2.4.10-pre6/include/asm-mips/dec/ioasic_addrs.h	Fri Jun 25 17:37:53 1999
+++ linux/include/asm-mips/dec/ioasic_addrs.h	Mon Dec  3 23:08:47 2001
@@ -17,25 +17,25 @@
 
 #define CHUNK_SIZE 0x00040000
 
-#define SYSTEM_ROM 	00*CHUNK_SIZE 		/* ??? */
-#define IOCTL 		01*CHUNK_SIZE 
-#define ESAR 		02*CHUNK_SIZE 
-#define LANCE 		03*CHUNK_SIZE 
-#define SCC0 		04*CHUNK_SIZE 
-#define VDAC_HI		05*CHUNK_SIZE		/* maxine only */
-#define SCC1 		06*CHUNK_SIZE 
-#define VDAC_LO		07*CHUNK_SIZE		/* maxine only */
-#define TOY 		08*CHUNK_SIZE 
-#define ISDN 		09*CHUNK_SIZE		/* maxine only */
-#define ERRADDR		09*CHUNK_SIZE 		/* 3maxplus only */
-#define CHKSYN 		10*CHUNK_SIZE 		/* 3maxplus only */
-#define ACCESS_BUS	10*CHUNK_SIZE 		/* maxine only */
-#define MCR 		11*CHUNK_SIZE 		/* 3maxplus only */
-#define FLOPPY 		11*CHUNK_SIZE 		/* maxine only */
-#define SCSI 		12*CHUNK_SIZE
-#define FLOPPY_DMA 	13*CHUNK_SIZE 		/* maxine only */
-#define SCSI_DMA 	14*CHUNK_SIZE 
-#define RESERVED_4 	15*CHUNK_SIZE 
+#define SYSTEM_ROM 	(0*CHUNK_SIZE)		/* ??? */
+#define IOCTL 		(1*CHUNK_SIZE)
+#define ESAR 		(2*CHUNK_SIZE)
+#define LANCE 		(3*CHUNK_SIZE)
+#define SCC0 		(4*CHUNK_SIZE)
+#define VDAC_HI		(5*CHUNK_SIZE)		/* maxine only */
+#define SCC1 		(6*CHUNK_SIZE)
+#define VDAC_LO		(7*CHUNK_SIZE)		/* maxine only */
+#define TOY 		(8*CHUNK_SIZE)
+#define ISDN 		(9*CHUNK_SIZE)		/* maxine only */
+#define ERRADDR		(9*CHUNK_SIZE)		/* 3maxplus only */
+#define CHKSYN 		(10*CHUNK_SIZE)		/* 3maxplus only */
+#define ACCESS_BUS	(10*CHUNK_SIZE)		/* maxine only */
+#define MCR 		(11*CHUNK_SIZE)		/* 3maxplus only */
+#define FLOPPY 		(11*CHUNK_SIZE)		/* maxine only */
+#define SCSI 		(12*CHUNK_SIZE)
+#define FLOPPY_DMA 	(13*CHUNK_SIZE)		/* maxine only */
+#define SCSI_DMA 	(14*CHUNK_SIZE)
+#define RESERVED_4 	(15*CHUNK_SIZE)
 
 /*
  * Offsets for IOCTL registers (relative to (system_base + IOCTL))
@@ -56,6 +56,7 @@
 #define SSR		0x100			/* System Support Register */
 #define SIR		0x110			/* System Interrupt Register */
 #define SIMR		0x120			/* System Interrupt Mask Register */
+#define FCTR		0x1e0			/* Free-Running Counter */
 
 /*
  * Handle partial word SCSI DMA transfers
diff -urN linux-2.4.10-pre6/include/asm-mips/dec/kn02.h linux/include/asm-mips/dec/kn02.h
--- linux-2.4.10-pre6/include/asm-mips/dec/kn02.h	Fri Jun 25 17:37:53 1999
+++ linux/include/asm-mips/dec/kn02.h	Mon Dec  3 23:08:47 2001
@@ -28,6 +28,8 @@
 #define KN02_RTC_BASE	KSEG1ADDR(0x1fe80000)
 #define KN02_DZ11_BASE	KSEG1ADDR(0x1fe00000)
 
+#define KN02_CSR_BNK32M	(1<<10)			/* 32M stride */
+
 /*
  * Interrupt enable Bits
  */
diff -urN linux-2.4.10-pre6/include/asm-mips/dec/kn02xa.h linux/include/asm-mips/dec/kn02xa.h
--- linux-2.4.10-pre6/include/asm-mips/dec/kn02xa.h	Fri Jun 25 17:37:53 1999
+++ linux/include/asm-mips/dec/kn02xa.h	Mon Dec  3 23:08:47 2001
@@ -9,6 +9,7 @@
  *
  * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
  * are by curteousy of Chris Fraser.
+ * Copyright (C) 2000  Maciej W. Rozycki
  *
  * These are addresses which have to be known early in the boot process.
  * For other addresses refer to tc.h ioasic_addrs.h and friends.
@@ -19,16 +20,12 @@
 #include <asm/addrspace.h>
 
 /*
- * Motherboard regs (kseg1 addresses)
- */
-#define KN02XA_SSR_ADDR		KSEG1ADDR(0x1c040100)	/* system control & status reg */
-#define KN02XA_SIR_ADDR		KSEG1ADDR(0x1c040110)	/* system interrupt reg */
-#define KN02XA_SIRM_ADDR	KSEG1ADDR(0x1c040120)	/* system interrupt mask reg */
-
-/*
  * Some port addresses...
  * FIXME: these addresses are incomplete and need tidying up!
  */
-#define KN02XA_RTC_BASE	(KSEG1ADDR(0x1c000000 + 0x200000)) /* ASIC + SL8 */
+#define KN02XA_IOASIC_BASE	KSEG1ADDR(0x1c040000)	/* I/O ASIC */
+#define KN02XA_RTC_BASE		KSEG1ADDR(0x1c200000)	/* RTC */
+
+#define KN02XA_IOASIC_REG(r)	(KN02XA_IOASIC_BASE+(r))
 
 #endif /* __ASM_MIPS_DEC_KN02XA_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/dec/kn03.h linux/include/asm-mips/dec/kn03.h
--- linux-2.4.10-pre6/include/asm-mips/dec/kn03.h	Fri Jun 25 17:37:53 1999
+++ linux/include/asm-mips/dec/kn03.h	Mon Dec  3 23:08:47 2001
@@ -8,6 +8,7 @@
  *
  * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
  * are by curteousy of Chris Fraser.
+ * Copyright (C) 2000  Maciej W. Rozycki
  *
  * These are addresses which have to be known early in the boot process.
  * For other addresses refer to tc.h ioasic_addrs.h and friends.
@@ -18,16 +19,16 @@
 #include <asm/addrspace.h>
 
 /*
- * Motherboard regs (kseg1 addresses)
- */
-#define KN03_SSR_ADDR	KSEG1ADDR(0x1f840100)	/* system control & status reg */
-#define KN03_SIR_ADDR	KSEG1ADDR(0x1f840110)	/* system interrupt reg */
-#define KN03_SIRM_ADDR	KSEG1ADDR(0x1f840120)	/* system interrupt mask reg */
-
-/*
  * Some port addresses...
  * FIXME: these addresses are incomplete and need tidying up!
  */
-#define KN03_RTC_BASE	(KSEG1ADDR(0x1f800000 + 0x200000)) /* ASIC + SL8 */
+#define KN03_IOASIC_BASE	KSEG1ADDR(0x1f840000)	/* I/O ASIC */
+#define KN03_RTC_BASE		KSEG1ADDR(0x1fa00000)	/* RTC */
+#define KN03_MCR_BASE		KSEG1ADDR(0x1fac0000)	/* MCR */
+
+#define KN03_MCR_BNK32M		(1<<10)			/* 32M stride */
+#define KN03_MCR_ECCEN		(1<<13)			/* ECC enabled */
+
+#define KN03_IOASIC_REG(r)	(KN03_IOASIC_BASE+(r))
 
 #endif /* __ASM_MIPS_DEC_KN03_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/dec/tcmodule.h linux/include/asm-mips/dec/tcmodule.h
--- linux-2.4.10-pre6/include/asm-mips/dec/tcmodule.h	Fri Jun 25 17:37:53 1999
+++ linux/include/asm-mips/dec/tcmodule.h	Mon Dec  3 23:08:47 2001
@@ -15,21 +15,24 @@
  *
  * Jan.1998 Harald Koerfgen
  */
+#ifndef __ASM_DEC_TCMOULE_H
+#define __ASM_DEC_TCMOULE_H
  
 #define OLDCARD 0x3c0000
 
-#define ROM_WIDTH 0x3e0
-#define ROM_STRIDE 0x3e4
-#define ROM_SIZE 0x3e8
-#define SLOT_SIZE 0x3ec
-#define PATTERN0 0x3f0
-#define PATTERN1 0x3f4
-#define PATTERN2 0x3f8
-#define PATTERN3 0x3fc
-#define FIRM_VER 0x400
-#define VENDOR 0x420
-#define MODULE 0x440
-#define FIRM_TYPE 0x460
-#define FLAGS 0x470
+#define TC_ROM_WIDTH	0x3e0
+#define TC_ROM_STRIDE	0x3e4
+#define TC_ROM_SIZE	0x3e8
+#define TC_SLOT_SIZE	0x3ec
+#define TC_PATTERN0	0x3f0
+#define TC_PATTERN1	0x3f4
+#define TC_PATTERN2	0x3f8
+#define TC_PATTERN3	0x3fc
+#define TC_FIRM_VER	0x400
+#define TC_VENDOR	0x420
+#define TC_MODULE	0x440
+#define TC_FIRM_TYPE	0x460
+#define TC_FLAGS	0x470
+#define TC_ROM_OBJECTS	0x480
 
-#define ROM_OBJECTS 0x480
+#endif /* __ASM_DEC_TCMOULE_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/div64.h linux/include/asm-mips/div64.h
--- linux-2.4.10-pre6/include/asm-mips/div64.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/div64.h	Mon Dec  3 23:08:47 2001
@@ -16,7 +16,8 @@
  * No traps on overflows for any of these...
  */
 
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1 ) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32)
 
 #define do_div64_32(res, high, low, base) ({ \
 	unsigned long __quot, __mod; \
diff -urN linux-2.4.10-pre6/include/asm-mips/elf.h linux/include/asm-mips/elf.h
--- linux-2.4.10-pre6/include/asm-mips/elf.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/elf.h	Mon Dec  3 23:08:47 2001
@@ -89,7 +89,7 @@
    the loader.  We need to make sure that it is out of the way of the program
    that it will "exec", and that there is sufficient room for the brk.  */
 
-#define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)
+#define ELF_ET_DYN_BASE         (TASK_SIZE / 3 * 2)
 
 #ifdef __KERNEL__
 #define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
diff -urN linux-2.4.10-pre6/include/asm-mips/gcc/sgidefs.h linux/include/asm-mips/gcc/sgidefs.h
--- linux-2.4.10-pre6/include/asm-mips/gcc/sgidefs.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/gcc/sgidefs.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,17 @@
+/*
+ * include/sgidefs.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996 by Ralf Baechle
+ *
+ * This file is here to satisfy GCC's expectations.
+ */
+#ifndef __SGIDEFS_H
+#define __SGIDEFS_H
+
+#include <asm/sgidefs.h>
+
+#endif /* __SGIDEFS_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/gt64120/gt64120.h linux/include/asm-mips/gt64120/gt64120.h
--- linux-2.4.10-pre6/include/asm-mips/gt64120/gt64120.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/gt64120/gt64120.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,443 @@
+/*
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ * Carsten Langgaard, carstenl@mips.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ */
+#ifndef _ASM_GT64120_GT64120_H
+#define _ASM_GT64120_GT64120_H
+
+#define MSK(n)                    ((1 << (n)) - 1)
+
+/*
+ *  Register offset addresses
+ */
+#define GT_CPU_OFS		0x000
+
+/*
+ * Interrupt Registers
+ */
+#define GT_SCS10LD_OFS		0x008
+#define GT_SCS10HD_OFS		0x010
+#define GT_SCS32LD_OFS		0x018
+#define GT_SCS32HD_OFS		0x020
+#define GT_CS20LD_OFS		0x028
+#define GT_CS20HD_OFS		0x030
+#define GT_CS3BOOTLD_OFS	0x038
+#define GT_CS3BOOTHD_OFS	0x040
+#define GT_PCI0IOLD_OFS		0x048
+#define GT_PCI0IOHD_OFS		0x050
+#define GT_PCI0M0LD_OFS		0x058
+#define GT_PCI0M0HD_OFS		0x060
+#define GT_ISD_OFS		0x068
+#define GT_PCI0M1LD_OFS		0x080
+#define GT_PCI0M1HD_OFS		0x088
+#define GT_PCI1IOLD_OFS		0x090
+#define GT_PCI1IOHD_OFS		0x098
+#define GT_PCI1M0LD_OFS		0x0a0
+#define GT_PCI1M0HD_OFS		0x0a8
+#define GT_PCI1M1LD_OFS		0x0b0
+#define GT_PCI1M1HD_OFS		0x0b8
+
+/*
+ * GT64120A only
+ */
+#define GT_PCI0IOREMAP_OFS	0x0f0
+#define GT_PCI0M0REMAP_OFS	0x0f8
+#define GT_PCI0M1REMAP_OFS	0x100
+#define GT_PCI1IOREMAP_OFS	0x108
+#define GT_PCI1M0REMAP_OFS	0x110
+#define GT_PCI1M1REMAP_OFS	0x118
+
+#define GT_SCS0LD_OFS		0x400	
+#define GT_SCS0HD_OFS		0x404
+#define GT_SCS1LD_OFS		0x408
+#define GT_SCS1HD_OFS		0x40c
+#define GT_SCS2LD_OFS		0x410
+#define GT_SCS2HD_OFS		0x414
+#define GT_SCS3LD_OFS		0x418
+#define GT_SCS3HD_OFS		0x41c
+#define GT_CS0LD_OFS		0x420
+#define GT_CS0HD_OFS		0x424
+#define GT_CS1LD_OFS		0x428
+#define GT_CS1HD_OFS		0x42c
+#define GT_CS2LD_OFS		0x430
+#define GT_CS2HD_OFS		0x434
+#define GT_CS3LD_OFS		0x438
+#define GT_CS3HD_OFS		0x43c
+#define GT_BOOTLD_OFS		0x440
+#define GT_BOOTHD_OFS		0x444
+
+#define GT_SDRAM_B0_OFS	    	0x44c
+#define GT_SDRAM_CFG_OFS	0x448
+#define GT_SDRAM_B2_OFS		0x454
+#define GT_SDRAM_OPMODE_OFS	0x474
+#define GT_SDRAM_BM_OFS		0x478
+#define GT_SDRAM_ADDRDECODE_OFS	0x47c
+
+#define GT_PCI0_CMD_OFS		0xc00	/* GT64120A only */
+#define GT_PCI0_TOR_OFS		0xc04
+#define GT_PCI0_BS_SCS10_OFS    0xc08
+#define GT_PCI0_BS_SCS32_OFS    0xc0c
+#define GT_INTRCAUSE_OFS	0xc18
+#define GT_INTRMASK_OFS		0xc1c	/* GT64120A only */
+#define GT_PCI0_IACK_OFS	0xc34
+#define GT_PCI0_BARE_OFS	0xc3c
+#define GT_HINTRCAUSE_OFS	0xc98	/* GT64120A only */
+#define GT_HINTRMASK_OFS	0xc9c	/* GT64120A only */
+#define GT_PCI1_CFGADDR_OFS	0xcf0	/* GT64120A only */
+#define GT_PCI1_CFGDATA_OFS	0xcf4	/* GT64120A only */
+#define GT_PCI0_CFGADDR_OFS	0xcf8
+#define GT_PCI0_CFGDATA_OFS	0xcfc
+
+
+/*
+ * Timer/Counter.  GT64120A only.
+ */
+#define GT_TC0_OFS		0x850
+#define GT_TC1_OFS		0x854
+#define GT_TC2_OFS		0x858
+#define GT_TC3_OFS		0x85C
+#define GT_TC_CONTROL_OFS	0x864
+
+/*
+ * I2O Support Registers
+ */
+#define INBOUND_MESSAGE_REGISTER0_PCI_SIDE		0x010
+#define INBOUND_MESSAGE_REGISTER1_PCI_SIDE		0x014
+#define OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE		0x018
+#define OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE		0x01c
+#define INBOUND_DOORBELL_REGISTER_PCI_SIDE		0x020
+#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE	0x024
+#define INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE	0x028
+#define OUTBOUND_DOORBELL_REGISTER_PCI_SIDE		0x02c
+#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE	0x030
+#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE	0x034
+#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE	0x040
+#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE	0x044
+#define QUEUE_CONTROL_REGISTER_PCI_SIDE			0x050
+#define QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE		0x054
+#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE	0x060
+#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE	0x064
+#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE	0x068
+#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE	0x06c
+#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE	0x070
+#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE	0x074
+#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE	0x078
+#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE	0x07c
+
+#define INBOUND_MESSAGE_REGISTER0_CPU_SIDE		0x1c10
+#define INBOUND_MESSAGE_REGISTER1_CPU_SIDE		0x1c14
+#define OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE		0x1c18
+#define OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE		0x1c1c
+#define INBOUND_DOORBELL_REGISTER_CPU_SIDE		0x1c20
+#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE	0x1c24
+#define INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE	0x1c28
+#define OUTBOUND_DOORBELL_REGISTER_CPU_SIDE		0x1c2c
+#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE	0x1c30
+#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE	0x1c34
+#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE	0x1c40
+#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE	0x1c44
+#define QUEUE_CONTROL_REGISTER_CPU_SIDE			0x1c50
+#define QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE		0x1c54
+#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE	0x1c60
+#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE	0x1c64
+#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE	0x1c68
+#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE	0x1c6c
+#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE	0x1c70
+#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE	0x1c74
+#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE	0x1c78
+#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE	0x1c7c
+
+/*
+ *  Register encodings
+ */
+#define GT_CPU_ENDIAN_SHF       12
+#define GT_CPU_ENDIAN_MSK       (MSK(1) << GT_CPU_ENDIAN_SHF)
+#define GT_CPU_ENDIAN_BIT       GT_CPU_ENDIAN_MSK
+#define GT_CPU_WR_SHF		16
+#define GT_CPU_WR_MSK		(MSK(1) << GT_CPU_WR_SHF)
+#define GT_CPU_WR_BIT		GT_CPU_WR_MSK
+#define GT_CPU_WR_DXDXDXDX	0
+#define GT_CPU_WR_DDDD		1
+
+
+#define GT_CFGADDR_CFGEN_SHF	31
+#define GT_CFGADDR_CFGEN_MSK	(MSK(1) << GT_CFGADDR_CFGEN_SHF)
+#define GT_CFGADDR_CFGEN_BIT	GT_CFGADDR_CFGEN_MSK
+
+#define GT_CFGADDR_BUSNUM_SHF	16
+#define GT_CFGADDR_BUSNUM_MSK	(MSK(8) << GT_CFGADDR_BUSNUM_SHF)
+
+#define GT_CFGADDR_DEVNUM_SHF	11
+#define GT_CFGADDR_DEVNUM_MSK	(MSK(5) << GT_CFGADDR_DEVNUM_SHF)
+
+#define GT_CFGADDR_FUNCNUM_SHF	8
+#define GT_CFGADDR_FUNCNUM_MSK	(MSK(3) << GT_CFGADDR_FUNCNUM_SHF)
+
+#define GT_CFGADDR_REGNUM_SHF	2
+#define GT_CFGADDR_REGNUM_MSK	(MSK(6) << GT_CFGADDR_REGNUM_SHF)
+
+
+#define GT_SDRAM_BM_ORDER_SHF	2
+#define GT_SDRAM_BM_ORDER_MSK	(MSK(1) << GT_SDRAM_BM_ORDER_SHF)
+#define GT_SDRAM_BM_ORDER_BIT	GT_SDRAM_BM_ORDER_MSK
+#define GT_SDRAM_BM_ORDER_SUB	1
+#define GT_SDRAM_BM_ORDER_LIN	0
+
+#define GT_SDRAM_BM_RSVD_ALL1	0xffb
+
+
+#define GT_SDRAM_ADDRDECODE_ADDR_SHF	0
+#define GT_SDRAM_ADDRDECODE_ADDR_MSK	(MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF)
+#define GT_SDRAM_ADDRDECODE_ADDR_0	0
+#define GT_SDRAM_ADDRDECODE_ADDR_1	1
+#define GT_SDRAM_ADDRDECODE_ADDR_2	2
+#define GT_SDRAM_ADDRDECODE_ADDR_3	3
+#define GT_SDRAM_ADDRDECODE_ADDR_4	4
+#define GT_SDRAM_ADDRDECODE_ADDR_5	5
+#define GT_SDRAM_ADDRDECODE_ADDR_6	6
+#define GT_SDRAM_ADDRDECODE_ADDR_7	7
+
+
+#define GT_SDRAM_B0_CASLAT_SHF		0
+#define GT_SDRAM_B0_CASLAT_MSK		(MSK(2) << GT_SDRAM_B0__SHF)
+#define GT_SDRAM_B0_CASLAT_2		1
+#define GT_SDRAM_B0_CASLAT_3		2
+
+#define GT_SDRAM_B0_FTDIS_SHF		2
+#define GT_SDRAM_B0_FTDIS_MSK		(MSK(1) << GT_SDRAM_B0_FTDIS_SHF)
+#define GT_SDRAM_B0_FTDIS_BIT		GT_SDRAM_B0_FTDIS_MSK
+
+#define GT_SDRAM_B0_SRASPRCHG_SHF	3
+#define GT_SDRAM_B0_SRASPRCHG_MSK	(MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF)
+#define GT_SDRAM_B0_SRASPRCHG_BIT	GT_SDRAM_B0_SRASPRCHG_MSK
+#define GT_SDRAM_B0_SRASPRCHG_2		0
+#define GT_SDRAM_B0_SRASPRCHG_3		1
+
+#define GT_SDRAM_B0_B0COMPAB_SHF	4
+#define GT_SDRAM_B0_B0COMPAB_MSK	(MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF)
+#define GT_SDRAM_B0_B0COMPAB_BIT	GT_SDRAM_B0_B0COMPAB_MSK
+
+#define GT_SDRAM_B0_64BITINT_SHF	5
+#define GT_SDRAM_B0_64BITINT_MSK	(MSK(1) << GT_SDRAM_B0_64BITINT_SHF)
+#define GT_SDRAM_B0_64BITINT_BIT	GT_SDRAM_B0_64BITINT_MSK
+#define GT_SDRAM_B0_64BITINT_2		0
+#define GT_SDRAM_B0_64BITINT_4		1
+
+#define GT_SDRAM_B0_BW_SHF		6
+#define GT_SDRAM_B0_BW_MSK		(MSK(1) << GT_SDRAM_B0_BW_SHF)
+#define GT_SDRAM_B0_BW_BIT		GT_SDRAM_B0_BW_MSK
+#define GT_SDRAM_B0_BW_32		0
+#define GT_SDRAM_B0_BW_64		1
+
+#define GT_SDRAM_B0_BLODD_SHF		7
+#define GT_SDRAM_B0_BLODD_MSK		(MSK(1) << GT_SDRAM_B0_BLODD_SHF)
+#define GT_SDRAM_B0_BLODD_BIT		GT_SDRAM_B0_BLODD_MSK
+
+#define GT_SDRAM_B0_PAR_SHF		8
+#define GT_SDRAM_B0_PAR_MSK		(MSK(1) << GT_SDRAM_B0_PAR_SHF)
+#define GT_SDRAM_B0_PAR_BIT		GT_SDRAM_B0_PAR_MSK
+
+#define GT_SDRAM_B0_BYPASS_SHF		9
+#define GT_SDRAM_B0_BYPASS_MSK		(MSK(1) << GT_SDRAM_B0_BYPASS_SHF)
+#define GT_SDRAM_B0_BYPASS_BIT		GT_SDRAM_B0_BYPASS_MSK
+
+#define GT_SDRAM_B0_SRAS2SCAS_SHF	10
+#define GT_SDRAM_B0_SRAS2SCAS_MSK	(MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF)
+#define GT_SDRAM_B0_SRAS2SCAS_BIT	GT_SDRAM_B0_SRAS2SCAS_MSK
+#define GT_SDRAM_B0_SRAS2SCAS_2		0
+#define GT_SDRAM_B0_SRAS2SCAS_3		1
+
+#define GT_SDRAM_B0_SIZE_SHF		11
+#define GT_SDRAM_B0_SIZE_MSK		(MSK(1) << GT_SDRAM_B0_SIZE_SHF)
+#define GT_SDRAM_B0_SIZE_BIT		GT_SDRAM_B0_SIZE_MSK
+#define GT_SDRAM_B0_SIZE_16M		0
+#define GT_SDRAM_B0_SIZE_64M		1
+
+#define GT_SDRAM_B0_EXTPAR_SHF		12
+#define GT_SDRAM_B0_EXTPAR_MSK		(MSK(1) << GT_SDRAM_B0_EXTPAR_SHF)
+#define GT_SDRAM_B0_EXTPAR_BIT		GT_SDRAM_B0_EXTPAR_MSK
+
+#define GT_SDRAM_B0_BLEN_SHF		13
+#define GT_SDRAM_B0_BLEN_MSK		(MSK(1) << GT_SDRAM_B0_BLEN_SHF)
+#define GT_SDRAM_B0_BLEN_BIT		GT_SDRAM_B0_BLEN_MSK
+#define GT_SDRAM_B0_BLEN_8		0
+#define GT_SDRAM_B0_BLEN_4		1
+
+
+#define GT_SDRAM_CFG_REFINT_SHF		0
+#define GT_SDRAM_CFG_REFINT_MSK		(MSK(14) << GT_SDRAM_CFG_REFINT_SHF)
+
+#define GT_SDRAM_CFG_NINTERLEAVE_SHF	14
+#define GT_SDRAM_CFG_NINTERLEAVE_MSK    (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF)
+#define GT_SDRAM_CFG_NINTERLEAVE_BIT	GT_SDRAM_CFG_NINTERLEAVE_MSK
+
+#define GT_SDRAM_CFG_RMW_SHF		15
+#define GT_SDRAM_CFG_RMW_MSK		(MSK(1) << GT_SDRAM_CFG_RMW_SHF)
+#define GT_SDRAM_CFG_RMW_BIT		GT_SDRAM_CFG_RMW_MSK
+
+#define GT_SDRAM_CFG_NONSTAGREF_SHF	16
+#define GT_SDRAM_CFG_NONSTAGREF_MSK	(MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF)
+#define GT_SDRAM_CFG_NONSTAGREF_BIT	GT_SDRAM_CFG_NONSTAGREF_MSK
+
+#define GT_SDRAM_CFG_DUPCNTL_SHF	19
+#define GT_SDRAM_CFG_DUPCNTL_MSK	(MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF)
+#define GT_SDRAM_CFG_DUPCNTL_BIT	GT_SDRAM_CFG_DUPCNTL_MSK
+
+#define GT_SDRAM_CFG_DUPBA_SHF		20
+#define GT_SDRAM_CFG_DUPBA_MSK		(MSK(1) << GT_SDRAM_CFG_DUPBA_SHF)
+#define GT_SDRAM_CFG_DUPBA_BIT		GT_SDRAM_CFG_DUPBA_MSK
+
+#define GT_SDRAM_CFG_DUPEOT0_SHF	21
+#define GT_SDRAM_CFG_DUPEOT0_MSK	(MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF)
+#define GT_SDRAM_CFG_DUPEOT0_BIT	GT_SDRAM_CFG_DUPEOT0_MSK
+
+#define GT_SDRAM_CFG_DUPEOT1_SHF	22
+#define GT_SDRAM_CFG_DUPEOT1_MSK	(MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF)
+#define GT_SDRAM_CFG_DUPEOT1_BIT	GT_SDRAM_CFG_DUPEOT1_MSK
+
+#define GT_SDRAM_OPMODE_OP_SHF		0
+#define GT_SDRAM_OPMODE_OP_MSK		(MSK(3) << GT_SDRAM_OPMODE_OP_SHF)
+#define GT_SDRAM_OPMODE_OP_NORMAL	0
+#define GT_SDRAM_OPMODE_OP_NOP		1
+#define GT_SDRAM_OPMODE_OP_PRCHG	2
+#define GT_SDRAM_OPMODE_OP_MODE		3
+#define GT_SDRAM_OPMODE_OP_CBR		4
+
+
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF	0
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT	GT_PCI0_BARE_SWSCS3BOOTDIS_MSK
+
+#define GT_PCI0_BARE_SWSCS32DIS_SHF	1
+#define GT_PCI0_BARE_SWSCS32DIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF)
+#define GT_PCI0_BARE_SWSCS32DIS_BIT	GT_PCI0_BARE_SWSCS32DIS_MSK
+	
+#define GT_PCI0_BARE_SWSCS10DIS_SHF	2
+#define GT_PCI0_BARE_SWSCS10DIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF)
+#define GT_PCI0_BARE_SWSCS10DIS_BIT	GT_PCI0_BARE_SWSCS10DIS_MSK
+
+#define GT_PCI0_BARE_INTIODIS_SHF	3
+#define GT_PCI0_BARE_INTIODIS_MSK	(MSK(1) << GT_PCI0_BARE_INTIODIS_SHF)
+#define GT_PCI0_BARE_INTIODIS_BIT	GT_PCI0_BARE_INTIODIS_MSK
+
+#define GT_PCI0_BARE_INTMEMDIS_SHF	4
+#define GT_PCI0_BARE_INTMEMDIS_MSK	(MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF)
+#define GT_PCI0_BARE_INTMEMDIS_BIT	GT_PCI0_BARE_INTMEMDIS_MSK
+
+#define GT_PCI0_BARE_CS3BOOTDIS_SHF	5
+#define GT_PCI0_BARE_CS3BOOTDIS_MSK	(MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF)
+#define GT_PCI0_BARE_CS3BOOTDIS_BIT	GT_PCI0_BARE_CS3BOOTDIS_MSK
+
+#define GT_PCI0_BARE_CS20DIS_SHF	6
+#define GT_PCI0_BARE_CS20DIS_MSK	(MSK(1) << GT_PCI0_BARE_CS20DIS_SHF)
+#define GT_PCI0_BARE_CS20DIS_BIT	GT_PCI0_BARE_CS20DIS_MSK
+
+#define GT_PCI0_BARE_SCS32DIS_SHF	7
+#define GT_PCI0_BARE_SCS32DIS_MSK	(MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF)
+#define GT_PCI0_BARE_SCS32DIS_BIT	GT_PCI0_BARE_SCS32DIS_MSK
+
+#define GT_PCI0_BARE_SCS10DIS_SHF	8
+#define GT_PCI0_BARE_SCS10DIS_MSK	(MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF)
+#define GT_PCI0_BARE_SCS10DIS_BIT	GT_PCI0_BARE_SCS10DIS_MSK
+
+
+#define GT_INTRCAUSE_MASABORT0_SHF	18
+#define GT_INTRCAUSE_MASABORT0_MSK	(MSK(1) << GT_INTRCAUSE_MASABORT0_SHF)
+#define GT_INTRCAUSE_MASABORT0_BIT	GT_INTRCAUSE_MASABORT0_MSK
+
+#define GT_INTRCAUSE_TARABORT0_SHF	19
+#define GT_INTRCAUSE_TARABORT0_MSK	(MSK(1) << GT_INTRCAUSE_TARABORT0_SHF)
+#define GT_INTRCAUSE_TARABORT0_BIT	GT_INTRCAUSE_TARABORT0_MSK
+
+
+#define GT_PCI0_CFGADDR_REGNUM_SHF	2
+#define GT_PCI0_CFGADDR_REGNUM_MSK	(MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
+#define GT_PCI0_CFGADDR_FUNCTNUM_SHF	8
+#define GT_PCI0_CFGADDR_FUNCTNUM_MSK    (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
+#define GT_PCI0_CFGADDR_DEVNUM_SHF	11
+#define GT_PCI0_CFGADDR_DEVNUM_MSK	(MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
+#define GT_PCI0_CFGADDR_BUSNUM_SHF	16
+#define GT_PCI0_CFGADDR_BUSNUM_MSK	(MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
+#define GT_PCI0_CFGADDR_CONFIGEN_SHF	31
+#define GT_PCI0_CFGADDR_CONFIGEN_MSK	(MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
+#define GT_PCI0_CFGADDR_CONFIGEN_BIT	GT_PCI0_CFGADDR_CONFIGEN_MSK
+
+#define GT_PCI0_CMD_MBYTESWAP_SHF       0
+#define GT_PCI0_CMD_MBYTESWAP_MSK       (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
+#define GT_PCI0_CMD_MBYTESWAP_BIT       GT_PCI0_CMD_MBYTESWAP_MSK
+#define GT_PCI0_CMD_MWORDSWAP_SHF       10
+#define GT_PCI0_CMD_MWORDSWAP_MSK       (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF)
+#define GT_PCI0_CMD_MWORDSWAP_BIT       GT_PCI0_CMD_MWORDSWAP_MSK
+#define GT_PCI0_CMD_SBYTESWAP_SHF       16
+#define GT_PCI0_CMD_SBYTESWAP_MSK       (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF)
+#define GT_PCI0_CMD_SBYTESWAP_BIT       GT_PCI0_CMD_SBYTESWAP_MSK
+#define GT_PCI0_CMD_SWORDSWAP_SHF       11
+#define GT_PCI0_CMD_SWORDSWAP_MSK       (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF)
+#define GT_PCI0_CMD_SWORDSWAP_BIT       GT_PCI0_CMD_SWORDSWAP_MSK
+
+/*
+ *  Misc
+ */
+#define GT_DEF_BASE		0x14000000
+
+#define GT_DEF_PCI0_IO_BASE	0x10000000
+#define GT_DEF_PCI0_IO_SIZE	0x02000000
+#define GT_DEF_PCI0_MEM0_BASE	0x12000000
+#define GT_DEF_PCI0_MEM0_SIZE	0x02000000
+
+#define GT_MAX_BANKSIZE		(256 * 1024 * 1024)   /* Max 256MB bank */
+#define GT_LATTIM_MIN    	6		      /* Minimum lat	*/
+
+
+/***********************************************************************
+ *              BOARD-DEPENDENT SECTIONS                               *
+ ***********************************************************************
+ */
+
+/* 
+ * include asm/gt64120/<board>/gt64120_dep.h file
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+
+#if defined(CONFIG_MOMENCO_OCELOT)
+#include <asm/gt64120/momenco_ocelot/gt64120_dep.h>
+#endif
+
+/*
+ * The gt64120_dep.h file must define the following macros
+ *
+ *   GT_READ(ofs, data_pointer)
+ *   GT_WRITE(ofs, data)           - read/write GT64120 registers in 32bit
+ *
+ *   TIMER 	- gt64120 timer irq, temporary solution until
+ *		  full gt64120 cascade interrupt support is in place
+ */
+
+/*
+ * Board-dependent functions, which must be defined in 
+ * arch/mips/gt64120/<board>/pci.c file.
+ *
+ * This function is called by pcibios_fixup_bus(bus), which in turn is
+ * invoked a bus is scanned.  You typically fixes IRQ numbers in this routine.
+ */
+extern void __init gt64120_board_pcibios_fixup_bus(struct pci_bus *bus);
+
+#endif /* _ASM_GT64120_GT64120_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h linux/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h
--- linux-2.4.10-pre6/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,49 @@
+/***********************************************************************
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * include/asm-mips/gt64120/momenco-ocelot/gt64120-dep.h
+ *     Board-dependent definitions for GT-64120 chip.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ ***********************************************************************
+ */
+
+#ifndef _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
+#define _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
+
+#include <asm/addrspace.h>		/* for KSEG1ADDR() */
+#include <asm/byteorder.h>		/* for cpu_to_le32() */
+
+/*
+ * PCI address allocation 
+ */
+#define GT_PCI_MEM_BASE    (0x22000000)
+#define GT_PCI_MEM_SIZE    GT_DEF_PCI0_MEM0_SIZE
+#define GT_PCI_IO_BASE     (0x20000000)
+#define GT_PCI_IO_SIZE     GT_DEF_PCI0_IO_SIZE
+
+extern unsigned long gt64120_base;
+
+#define GT64120_BASE       (gt64120_base)
+
+/*
+ * Because of an error/peculiarity in the Galileo chip, we need to swap the
+ * bytes when running bigendian.
+ */
+
+#define GT_WRITE(ofs, data)  \
+        *(volatile u32 *)(GT64120_BASE+ofs) = cpu_to_le32(data)
+#define GT_READ(ofs, data)   \
+        *data = le32_to_cpu(*(volatile u32 *)(GT64120_BASE+ofs))
+
+
+/*
+ * gt timer irq
+ */
+#define	TIMER		6
+
+#endif  /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/gt64120.h linux/include/asm-mips/gt64120.h
--- linux-2.4.10-pre6/include/asm-mips/gt64120.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/gt64120.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,399 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ */
+#ifndef _ASM_GT64120_H
+#define _ASM_GT64120_H
+
+#define MSK(n)                    ((1 << (n)) - 1)
+
+/*
+ *  Register offset addresses
+ */
+#define GT_CPU_OFS		0x000
+
+/*
+ * Interrupt Registers
+ */
+#define GT_SCS10LD_OFS		0x008
+#define GT_SCS10HD_OFS		0x010
+#define GT_SCS32LD_OFS		0x018
+#define GT_SCS32HD_OFS		0x020
+#define GT_CS20LD_OFS		0x028
+#define GT_CS20HD_OFS		0x030
+#define GT_CS3BOOTLD_OFS	0x038
+#define GT_CS3BOOTHD_OFS	0x040
+#define GT_PCI0IOLD_OFS		0x048
+#define GT_PCI0IOHD_OFS		0x050
+#define GT_PCI0M0LD_OFS		0x058
+#define GT_PCI0M0HD_OFS		0x060
+#define GT_ISD_OFS		0x068
+#define GT_PCI0M1LD_OFS		0x080
+#define GT_PCI0M1HD_OFS		0x088
+#define GT_PCI1IOLD_OFS		0x090
+#define GT_PCI1IOHD_OFS		0x098
+#define GT_PCI1M0LD_OFS		0x0a0
+#define GT_PCI1M0HD_OFS		0x0a8
+#define GT_PCI1M1LD_OFS		0x0b0
+#define GT_PCI1M1HD_OFS		0x0b8
+
+/*
+ * GT64120A only
+ */
+#define GT_PCI0IOREMAP_OFS	0x0f0
+#define GT_PCI0M0REMAP_OFS	0x0f8
+#define GT_PCI0M1REMAP_OFS	0x100
+#define GT_PCI1IOREMAP_OFS	0x108
+#define GT_PCI1M0REMAP_OFS	0x110
+#define GT_PCI1M1REMAP_OFS	0x118
+
+#define GT_SCS0LD_OFS		0x400	
+#define GT_SCS0HD_OFS		0x404
+#define GT_SCS1LD_OFS		0x408
+#define GT_SCS1HD_OFS		0x40c
+#define GT_SCS2LD_OFS		0x410
+#define GT_SCS2HD_OFS		0x414
+#define GT_SCS3LD_OFS		0x418
+#define GT_SCS3HD_OFS		0x41c
+#define GT_CS0LD_OFS		0x420
+#define GT_CS0HD_OFS		0x424
+#define GT_CS1LD_OFS		0x428
+#define GT_CS1HD_OFS		0x42c
+#define GT_CS2LD_OFS		0x430
+#define GT_CS2HD_OFS		0x434
+#define GT_CS3LD_OFS		0x438
+#define GT_CS3HD_OFS		0x43c
+#define GT_BOOTLD_OFS		0x440
+#define GT_BOOTHD_OFS		0x444
+
+#define GT_SDRAM_B0_OFS	    	0x44c
+#define GT_SDRAM_CFG_OFS	0x448
+#define GT_SDRAM_B2_OFS		0x454
+#define GT_SDRAM_OPMODE_OFS	0x474
+#define GT_SDRAM_BM_OFS		0x478
+#define GT_SDRAM_ADDRDECODE_OFS	0x47c
+
+#define GT_PCI0_CMD_OFS		0xc00	/* GT64120A only */
+#define GT_PCI0_TOR_OFS		0xc04
+#define GT_PCI0_BS_SCS10_OFS    0xc08
+#define GT_PCI0_BS_SCS32_OFS    0xc0c
+#define GT_INTRCAUSE_OFS	0xc18
+#define GT_INTRMASK_OFS		0xc1c	/* GT64120A only */
+#define GT_PCI0_IACK_OFS	0xc34
+#define GT_PCI0_BARE_OFS	0xc3c
+#define GT_HINTRCAUSE_OFS	0xc98	/* GT64120A only */
+#define GT_HINTRMASK_OFS	0xc9c	/* GT64120A only */
+#define GT_PCI1_CFGADDR_OFS	0xcf0	/* GT64120A only */
+#define GT_PCI1_CFGDATA_OFS	0xcf4	/* GT64120A only */
+#define GT_PCI0_CFGADDR_OFS	0xcf8
+#define GT_PCI0_CFGDATA_OFS	0xcfc
+
+
+/*
+ * Timer/Counter.  GT64120A only.
+ */
+#define GT_TC0_OFS		0x850
+#define GT_TC1_OFS		0x854
+#define GT_TC2_OFS		0x858
+#define GT_TC3_OFS		0x85C
+#define GT_TC_CONTROL_OFS	0x864
+
+/*
+ * I2O Support Registers
+ */
+#define INBOUND_MESSAGE_REGISTER0_PCI_SIDE		0x010
+#define INBOUND_MESSAGE_REGISTER1_PCI_SIDE		0x014
+#define OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE		0x018
+#define OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE		0x01c
+#define INBOUND_DOORBELL_REGISTER_PCI_SIDE		0x020
+#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE	0x024
+#define INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE	0x028
+#define OUTBOUND_DOORBELL_REGISTER_PCI_SIDE		0x02c
+#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE	0x030
+#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE	0x034
+#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE	0x040
+#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE	0x044
+#define QUEUE_CONTROL_REGISTER_PCI_SIDE			0x050
+#define QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE		0x054
+#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE	0x060
+#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE	0x064
+#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE	0x068
+#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE	0x06c
+#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE	0x070
+#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE	0x074
+#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE	0x078
+#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE	0x07c
+
+#define INBOUND_MESSAGE_REGISTER0_CPU_SIDE		0x1c10
+#define INBOUND_MESSAGE_REGISTER1_CPU_SIDE		0x1c14
+#define OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE		0x1c18
+#define OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE		0x1c1c
+#define INBOUND_DOORBELL_REGISTER_CPU_SIDE		0x1c20
+#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE	0x1c24
+#define INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE	0x1c28
+#define OUTBOUND_DOORBELL_REGISTER_CPU_SIDE		0x1c2c
+#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE	0x1c30
+#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE	0x1c34
+#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE	0x1c40
+#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE	0x1c44
+#define QUEUE_CONTROL_REGISTER_CPU_SIDE			0x1c50
+#define QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE		0x1c54
+#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE	0x1c60
+#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE	0x1c64
+#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE	0x1c68
+#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE	0x1c6c
+#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE	0x1c70
+#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE	0x1c74
+#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE	0x1c78
+#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE	0x1c7c
+
+/*
+ *  Register encodings
+ */
+#define GT_CPU_ENDIAN_SHF       12
+#define GT_CPU_ENDIAN_MSK       (MSK(1) << GT_CPU_ENDIAN_SHF)
+#define GT_CPU_ENDIAN_BIT       GT_CPU_ENDIAN_MSK
+#define GT_CPU_WR_SHF		16
+#define GT_CPU_WR_MSK		(MSK(1) << GT_CPU_WR_SHF)
+#define GT_CPU_WR_BIT		GT_CPU_WR_MSK
+#define GT_CPU_WR_DXDXDXDX	0
+#define GT_CPU_WR_DDDD		1
+
+
+#define GT_CFGADDR_CFGEN_SHF	31
+#define GT_CFGADDR_CFGEN_MSK	(MSK(1) << GT_CFGADDR_CFGEN_SHF)
+#define GT_CFGADDR_CFGEN_BIT	GT_CFGADDR_CFGEN_MSK
+
+#define GT_CFGADDR_BUSNUM_SHF	16
+#define GT_CFGADDR_BUSNUM_MSK	(MSK(8) << GT_CFGADDR_BUSNUM_SHF)
+
+#define GT_CFGADDR_DEVNUM_SHF	11
+#define GT_CFGADDR_DEVNUM_MSK	(MSK(5) << GT_CFGADDR_DEVNUM_SHF)
+
+#define GT_CFGADDR_FUNCNUM_SHF	8
+#define GT_CFGADDR_FUNCNUM_MSK	(MSK(3) << GT_CFGADDR_FUNCNUM_SHF)
+
+#define GT_CFGADDR_REGNUM_SHF	2
+#define GT_CFGADDR_REGNUM_MSK	(MSK(6) << GT_CFGADDR_REGNUM_SHF)
+
+
+#define GT_SDRAM_BM_ORDER_SHF	2
+#define GT_SDRAM_BM_ORDER_MSK	(MSK(1) << GT_SDRAM_BM_ORDER_SHF)
+#define GT_SDRAM_BM_ORDER_BIT	GT_SDRAM_BM_ORDER_MSK
+#define GT_SDRAM_BM_ORDER_SUB	1
+#define GT_SDRAM_BM_ORDER_LIN	0
+
+#define GT_SDRAM_BM_RSVD_ALL1	0xffb
+
+
+#define GT_SDRAM_ADDRDECODE_ADDR_SHF	0
+#define GT_SDRAM_ADDRDECODE_ADDR_MSK	(MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF)
+#define GT_SDRAM_ADDRDECODE_ADDR_0	0
+#define GT_SDRAM_ADDRDECODE_ADDR_1	1
+#define GT_SDRAM_ADDRDECODE_ADDR_2	2
+#define GT_SDRAM_ADDRDECODE_ADDR_3	3
+#define GT_SDRAM_ADDRDECODE_ADDR_4	4
+#define GT_SDRAM_ADDRDECODE_ADDR_5	5
+#define GT_SDRAM_ADDRDECODE_ADDR_6	6
+#define GT_SDRAM_ADDRDECODE_ADDR_7	7
+
+
+#define GT_SDRAM_B0_CASLAT_SHF		0
+#define GT_SDRAM_B0_CASLAT_MSK		(MSK(2) << GT_SDRAM_B0__SHF)
+#define GT_SDRAM_B0_CASLAT_2		1
+#define GT_SDRAM_B0_CASLAT_3		2
+
+#define GT_SDRAM_B0_FTDIS_SHF		2
+#define GT_SDRAM_B0_FTDIS_MSK		(MSK(1) << GT_SDRAM_B0_FTDIS_SHF)
+#define GT_SDRAM_B0_FTDIS_BIT		GT_SDRAM_B0_FTDIS_MSK
+
+#define GT_SDRAM_B0_SRASPRCHG_SHF	3
+#define GT_SDRAM_B0_SRASPRCHG_MSK	(MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF)
+#define GT_SDRAM_B0_SRASPRCHG_BIT	GT_SDRAM_B0_SRASPRCHG_MSK
+#define GT_SDRAM_B0_SRASPRCHG_2		0
+#define GT_SDRAM_B0_SRASPRCHG_3		1
+
+#define GT_SDRAM_B0_B0COMPAB_SHF	4
+#define GT_SDRAM_B0_B0COMPAB_MSK	(MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF)
+#define GT_SDRAM_B0_B0COMPAB_BIT	GT_SDRAM_B0_B0COMPAB_MSK
+
+#define GT_SDRAM_B0_64BITINT_SHF	5
+#define GT_SDRAM_B0_64BITINT_MSK	(MSK(1) << GT_SDRAM_B0_64BITINT_SHF)
+#define GT_SDRAM_B0_64BITINT_BIT	GT_SDRAM_B0_64BITINT_MSK
+#define GT_SDRAM_B0_64BITINT_2		0
+#define GT_SDRAM_B0_64BITINT_4		1
+
+#define GT_SDRAM_B0_BW_SHF		6
+#define GT_SDRAM_B0_BW_MSK		(MSK(1) << GT_SDRAM_B0_BW_SHF)
+#define GT_SDRAM_B0_BW_BIT		GT_SDRAM_B0_BW_MSK
+#define GT_SDRAM_B0_BW_32		0
+#define GT_SDRAM_B0_BW_64		1
+
+#define GT_SDRAM_B0_BLODD_SHF		7
+#define GT_SDRAM_B0_BLODD_MSK		(MSK(1) << GT_SDRAM_B0_BLODD_SHF)
+#define GT_SDRAM_B0_BLODD_BIT		GT_SDRAM_B0_BLODD_MSK
+
+#define GT_SDRAM_B0_PAR_SHF		8
+#define GT_SDRAM_B0_PAR_MSK		(MSK(1) << GT_SDRAM_B0_PAR_SHF)
+#define GT_SDRAM_B0_PAR_BIT		GT_SDRAM_B0_PAR_MSK
+
+#define GT_SDRAM_B0_BYPASS_SHF		9
+#define GT_SDRAM_B0_BYPASS_MSK		(MSK(1) << GT_SDRAM_B0_BYPASS_SHF)
+#define GT_SDRAM_B0_BYPASS_BIT		GT_SDRAM_B0_BYPASS_MSK
+
+#define GT_SDRAM_B0_SRAS2SCAS_SHF	10
+#define GT_SDRAM_B0_SRAS2SCAS_MSK	(MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF)
+#define GT_SDRAM_B0_SRAS2SCAS_BIT	GT_SDRAM_B0_SRAS2SCAS_MSK
+#define GT_SDRAM_B0_SRAS2SCAS_2		0
+#define GT_SDRAM_B0_SRAS2SCAS_3		1
+
+#define GT_SDRAM_B0_SIZE_SHF		11
+#define GT_SDRAM_B0_SIZE_MSK		(MSK(1) << GT_SDRAM_B0_SIZE_SHF)
+#define GT_SDRAM_B0_SIZE_BIT		GT_SDRAM_B0_SIZE_MSK
+#define GT_SDRAM_B0_SIZE_16M		0
+#define GT_SDRAM_B0_SIZE_64M		1
+
+#define GT_SDRAM_B0_EXTPAR_SHF		12
+#define GT_SDRAM_B0_EXTPAR_MSK		(MSK(1) << GT_SDRAM_B0_EXTPAR_SHF)
+#define GT_SDRAM_B0_EXTPAR_BIT		GT_SDRAM_B0_EXTPAR_MSK
+
+#define GT_SDRAM_B0_BLEN_SHF		13
+#define GT_SDRAM_B0_BLEN_MSK		(MSK(1) << GT_SDRAM_B0_BLEN_SHF)
+#define GT_SDRAM_B0_BLEN_BIT		GT_SDRAM_B0_BLEN_MSK
+#define GT_SDRAM_B0_BLEN_8		0
+#define GT_SDRAM_B0_BLEN_4		1
+
+
+#define GT_SDRAM_CFG_REFINT_SHF		0
+#define GT_SDRAM_CFG_REFINT_MSK		(MSK(14) << GT_SDRAM_CFG_REFINT_SHF)
+
+#define GT_SDRAM_CFG_NINTERLEAVE_SHF	14
+#define GT_SDRAM_CFG_NINTERLEAVE_MSK    (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF)
+#define GT_SDRAM_CFG_NINTERLEAVE_BIT	GT_SDRAM_CFG_NINTERLEAVE_MSK
+
+#define GT_SDRAM_CFG_RMW_SHF		15
+#define GT_SDRAM_CFG_RMW_MSK		(MSK(1) << GT_SDRAM_CFG_RMW_SHF)
+#define GT_SDRAM_CFG_RMW_BIT		GT_SDRAM_CFG_RMW_MSK
+
+#define GT_SDRAM_CFG_NONSTAGREF_SHF	16
+#define GT_SDRAM_CFG_NONSTAGREF_MSK	(MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF)
+#define GT_SDRAM_CFG_NONSTAGREF_BIT	GT_SDRAM_CFG_NONSTAGREF_MSK
+
+#define GT_SDRAM_CFG_DUPCNTL_SHF	19
+#define GT_SDRAM_CFG_DUPCNTL_MSK	(MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF)
+#define GT_SDRAM_CFG_DUPCNTL_BIT	GT_SDRAM_CFG_DUPCNTL_MSK
+
+#define GT_SDRAM_CFG_DUPBA_SHF		20
+#define GT_SDRAM_CFG_DUPBA_MSK		(MSK(1) << GT_SDRAM_CFG_DUPBA_SHF)
+#define GT_SDRAM_CFG_DUPBA_BIT		GT_SDRAM_CFG_DUPBA_MSK
+
+#define GT_SDRAM_CFG_DUPEOT0_SHF	21
+#define GT_SDRAM_CFG_DUPEOT0_MSK	(MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF)
+#define GT_SDRAM_CFG_DUPEOT0_BIT	GT_SDRAM_CFG_DUPEOT0_MSK
+
+#define GT_SDRAM_CFG_DUPEOT1_SHF	22
+#define GT_SDRAM_CFG_DUPEOT1_MSK	(MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF)
+#define GT_SDRAM_CFG_DUPEOT1_BIT	GT_SDRAM_CFG_DUPEOT1_MSK
+
+#define GT_SDRAM_OPMODE_OP_SHF		0
+#define GT_SDRAM_OPMODE_OP_MSK		(MSK(3) << GT_SDRAM_OPMODE_OP_SHF)
+#define GT_SDRAM_OPMODE_OP_NORMAL	0
+#define GT_SDRAM_OPMODE_OP_NOP		1
+#define GT_SDRAM_OPMODE_OP_PRCHG	2
+#define GT_SDRAM_OPMODE_OP_MODE		3
+#define GT_SDRAM_OPMODE_OP_CBR		4
+
+
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF	0
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT	GT_PCI0_BARE_SWSCS3BOOTDIS_MSK
+
+#define GT_PCI0_BARE_SWSCS32DIS_SHF	1
+#define GT_PCI0_BARE_SWSCS32DIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF)
+#define GT_PCI0_BARE_SWSCS32DIS_BIT	GT_PCI0_BARE_SWSCS32DIS_MSK
+	
+#define GT_PCI0_BARE_SWSCS10DIS_SHF	2
+#define GT_PCI0_BARE_SWSCS10DIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF)
+#define GT_PCI0_BARE_SWSCS10DIS_BIT	GT_PCI0_BARE_SWSCS10DIS_MSK
+
+#define GT_PCI0_BARE_INTIODIS_SHF	3
+#define GT_PCI0_BARE_INTIODIS_MSK	(MSK(1) << GT_PCI0_BARE_INTIODIS_SHF)
+#define GT_PCI0_BARE_INTIODIS_BIT	GT_PCI0_BARE_INTIODIS_MSK
+
+#define GT_PCI0_BARE_INTMEMDIS_SHF	4
+#define GT_PCI0_BARE_INTMEMDIS_MSK	(MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF)
+#define GT_PCI0_BARE_INTMEMDIS_BIT	GT_PCI0_BARE_INTMEMDIS_MSK
+
+#define GT_PCI0_BARE_CS3BOOTDIS_SHF	5
+#define GT_PCI0_BARE_CS3BOOTDIS_MSK	(MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF)
+#define GT_PCI0_BARE_CS3BOOTDIS_BIT	GT_PCI0_BARE_CS3BOOTDIS_MSK
+
+#define GT_PCI0_BARE_CS20DIS_SHF	6
+#define GT_PCI0_BARE_CS20DIS_MSK	(MSK(1) << GT_PCI0_BARE_CS20DIS_SHF)
+#define GT_PCI0_BARE_CS20DIS_BIT	GT_PCI0_BARE_CS20DIS_MSK
+
+#define GT_PCI0_BARE_SCS32DIS_SHF	7
+#define GT_PCI0_BARE_SCS32DIS_MSK	(MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF)
+#define GT_PCI0_BARE_SCS32DIS_BIT	GT_PCI0_BARE_SCS32DIS_MSK
+
+#define GT_PCI0_BARE_SCS10DIS_SHF	8
+#define GT_PCI0_BARE_SCS10DIS_MSK	(MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF)
+#define GT_PCI0_BARE_SCS10DIS_BIT	GT_PCI0_BARE_SCS10DIS_MSK
+
+
+#define GT_INTRCAUSE_MASABORT0_SHF	18
+#define GT_INTRCAUSE_MASABORT0_MSK	(MSK(1) << GT_INTRCAUSE_MASABORT0_SHF)
+#define GT_INTRCAUSE_MASABORT0_BIT	GT_INTRCAUSE_MASABORT0_MSK
+
+#define GT_INTRCAUSE_TARABORT0_SHF	19
+#define GT_INTRCAUSE_TARABORT0_MSK	(MSK(1) << GT_INTRCAUSE_TARABORT0_SHF)
+#define GT_INTRCAUSE_TARABORT0_BIT	GT_INTRCAUSE_TARABORT0_MSK
+
+
+#define GT_PCI0_CFGADDR_REGNUM_SHF	2
+#define GT_PCI0_CFGADDR_REGNUM_MSK	(MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
+#define GT_PCI0_CFGADDR_FUNCTNUM_SHF	8
+#define GT_PCI0_CFGADDR_FUNCTNUM_MSK    (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
+#define GT_PCI0_CFGADDR_DEVNUM_SHF	11
+#define GT_PCI0_CFGADDR_DEVNUM_MSK	(MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
+#define GT_PCI0_CFGADDR_BUSNUM_SHF	16
+#define GT_PCI0_CFGADDR_BUSNUM_MSK	(MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
+#define GT_PCI0_CFGADDR_CONFIGEN_SHF	31
+#define GT_PCI0_CFGADDR_CONFIGEN_MSK	(MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
+#define GT_PCI0_CFGADDR_CONFIGEN_BIT	GT_PCI0_CFGADDR_CONFIGEN_MSK
+
+#define GT_PCI0_CMD_MBYTESWAP_SHF       0
+#define GT_PCI0_CMD_MBYTESWAP_MSK       (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
+#define GT_PCI0_CMD_MBYTESWAP_BIT       GT_PCI0_CMD_MBYTESWAP_MSK
+#define GT_PCI0_CMD_MWORDSWAP_SHF       10
+#define GT_PCI0_CMD_MWORDSWAP_MSK       (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF)
+#define GT_PCI0_CMD_MWORDSWAP_BIT       GT_PCI0_CMD_MWORDSWAP_MSK
+#define GT_PCI0_CMD_SBYTESWAP_SHF       16
+#define GT_PCI0_CMD_SBYTESWAP_MSK       (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF)
+#define GT_PCI0_CMD_SBYTESWAP_BIT       GT_PCI0_CMD_SBYTESWAP_MSK
+#define GT_PCI0_CMD_SWORDSWAP_SHF       11
+#define GT_PCI0_CMD_SWORDSWAP_MSK       (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF)
+#define GT_PCI0_CMD_SWORDSWAP_BIT       GT_PCI0_CMD_SWORDSWAP_MSK
+
+/*
+ *  Misc
+ */
+#define GT_DEF_BASE		0x14000000
+#define GT_DEF_PCI0_MEM0_BASE	0x12000000
+#define GT_MAX_BANKSIZE		(256 * 1024 * 1024)   /* Max 256MB bank */
+#define GT_LATTIM_MIN    	6		      /* Minimum lat	*/
+
+#endif /* _ASM_GT64120_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/hardirq.h linux/include/asm-mips/hardirq.h
--- linux-2.4.10-pre6/include/asm-mips/hardirq.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/hardirq.h	Mon Dec  3 23:08:47 2001
@@ -3,8 +3,9 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1997, 1998, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001 by Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #ifndef _ASM_HARDIRQ_H
 #define _ASM_HARDIRQ_H
@@ -14,13 +15,12 @@
 #include <linux/irq.h>
 #include <linux/spinlock.h>
 
-/* entry.S is sensitive to the offsets of these fields */
 typedef struct {
-	unsigned int __softirq_active;
-	unsigned int __softirq_mask;
+	unsigned int __softirq_pending;
 	unsigned int __local_irq_count;
 	unsigned int __local_bh_count;
 	unsigned int __syscall_count;
+	struct task_struct * __ksoftirqd_task;	/* waitqueue is too large */
 } ____cacheline_aligned irq_cpustat_t;
 
 #include <linux/irq_cpustat.h>	/* Standard mappings for irq_cpustat_t above */
diff -urN linux-2.4.10-pre6/include/asm-mips/ide.h linux/include/asm-mips/ide.h
--- linux-2.4.10-pre6/include/asm-mips/ide.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/ide.h	Mon Dec  3 23:08:47 2001
@@ -56,21 +56,7 @@
 static inline void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
                                        ide_ioreg_t ctrl_port, int *irq)
 {
-	ide_ioreg_t reg = data_port;
-	int i;
-
-	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
-		hw->io_ports[i] = reg;
-		reg += 1;
-	}
-	if (ctrl_port) {
-		hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
-	} else {
-		hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
-	}
-	if (irq != NULL)
-		*irq = 0;
-	hw->io_ports[IDE_IRQ_OFFSET] = 0;
+	ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, irq);
 }
 
 static __inline__ void ide_init_default_hwifs(void)
diff -urN linux-2.4.10-pre6/include/asm-mips/io.h linux/include/asm-mips/io.h
--- linux-2.4.10-pre6/include/asm-mips/io.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/io.h	Mon Dec  3 23:08:47 2001
@@ -126,7 +126,7 @@
 }
 
 /*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is is mapped
+ * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
  * for the processor.
  */
 extern unsigned long isa_slot_offset;
diff -urN linux-2.4.10-pre6/include/asm-mips/ioctls.h linux/include/asm-mips/ioctls.h
--- linux-2.4.10-pre6/include/asm-mips/ioctls.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/ioctls.h	Mon Dec  3 23:08:47 2001
@@ -1,20 +1,16 @@
-/* $Id: ioctls.h,v 1.5 1998/08/19 21:58:11 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995, 1996 by Ralf Baechle
+ * Copyright (C) 1995, 1996, 2001 Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
-#ifndef __ASM_MIPS_IOCTLS_H
-#define __ASM_MIPS_IOCTLS_H
+#ifndef __ASM_IOCTLS_H
+#define __ASM_IOCTLS_H
 
 #include <asm/ioctl.h>
 
-#if defined(__USE_MISC) || defined (__KERNEL__)
-#define tIOC		('t' << 8)
-#endif
-
 #define TCGETA		0x5401
 #define TCSETA		0x5402
 #define TCSETAW		0x5403
@@ -38,21 +34,19 @@
 #define TIOCMBIC	0x741c		/* bic modem bits */
 #define TIOCMSET	0x741a		/* set all modem bits */
 #define TIOCPKT		0x5470		/* pty: set/clear packet mode */
-#define		TIOCPKT_DATA		0x00	/* data packet */
-#define		TIOCPKT_FLUSHREAD	0x01	/* flush packet */
-#define		TIOCPKT_FLUSHWRITE	0x02	/* flush packet */
-#define		TIOCPKT_STOP		0x04	/* stop output */
-#define		TIOCPKT_START		0x08	/* start output */
-#define		TIOCPKT_NOSTOP		0x10	/* no more ^S, ^Q */
-#define		TIOCPKT_DOSTOP		0x20	/* now do ^S ^Q */
-#if 0
-#define		TIOCPKT_IOCTL		0x40	/* state change of pty driver */
-#endif
+#define	 TIOCPKT_DATA		0x00	/* data packet */
+#define	 TIOCPKT_FLUSHREAD	0x01	/* flush packet */
+#define	 TIOCPKT_FLUSHWRITE	0x02	/* flush packet */
+#define	 TIOCPKT_STOP		0x04	/* stop output */
+#define	 TIOCPKT_START		0x08	/* start output */
+#define	 TIOCPKT_NOSTOP		0x10	/* no more ^S, ^Q */
+#define	 TIOCPKT_DOSTOP		0x20	/* now do ^S ^Q */
+/* #define  TIOCPKT_IOCTL		0x40	state change of pty driver */
 #define TIOCSWINSZ	_IOW('t', 103, struct winsize)	/* set window size */
 #define TIOCGWINSZ	_IOR('t', 104, struct winsize)	/* get window size */
 #define TIOCNOTTY	0x5471		/* void tty association */
-#define TIOCSETD	(tIOC | 1)
-#define TIOCGETD	(tIOC | 0)
+#define TIOCSETD	0x7401
+#define TIOCGETD	0x7400
 
 #define FIOCLEX		0x6601
 #define FIONCLEX	0x6602		/* these numbers need to be adjusted. */
@@ -60,10 +54,8 @@
 #define FIONBIO		0x667e
 #define FIOQSIZE	0x667f
 
-#if defined(__USE_MISC) || defined (__KERNEL__)
-#define TIOCGLTC	(tIOC | 116)		/* get special local chars */
-#define TIOCSLTC	(tIOC | 117)		/* set special local chars */
-#endif
+#define TIOCGLTC	0x7474			/* get special local chars */
+#define TIOCSLTC	0x7475			/* set special local chars */
 #define TIOCSPGRP	_IOW('t', 118, int)	/* set pgrp of tty */
 #define TIOCGPGRP	_IOR('t', 119, int)	/* get pgrp of tty */
 #define TIOCCONS	_IOW('t', 120, int)	/* become virtual console */
@@ -71,20 +63,16 @@
 #define FIONREAD	0x467f
 #define TIOCINQ		FIONREAD
 
-#if defined(__USE_MISC) || defined (__KERNEL__)
-#define TIOCGETP        (tIOC | 8)
-#define TIOCSETP        (tIOC | 9)
-#define TIOCSETN        (tIOC | 10)		/* TIOCSETP wo flush */
-#endif
+#define TIOCGETP        0x7408
+#define TIOCSETP        0x7409
+#define TIOCSETN        0x740a			/* TIOCSETP wo flush */
  
-#if 0
-#define	TIOCSETA	_IOW('t', 20, struct termios) /* set termios struct */
-#define	TIOCSETAW	_IOW('t', 21, struct termios) /* drain output, set */
-#define	TIOCSETAF	_IOW('t', 22, struct termios) /* drn out, fls in, set */
-#define	TIOCGETD	_IOR('t', 26, int)	/* get line discipline */
-#define	TIOCSETD	_IOW('t', 27, int)	/* set line discipline */
+/* #define TIOCSETA	_IOW('t', 20, struct termios) set termios struct */
+/* #define TIOCSETAW	_IOW('t', 21, struct termios) drain output, set */
+/* #define TIOCSETAF	_IOW('t', 22, struct termios) drn out, fls in, set */
+/* #define TIOCGETD	_IOR('t', 26, int)	get line discipline */
+/* #define TIOCSETD	_IOW('t', 27, int)	set line discipline */
 						/* 127-124 compat */
-#endif
 
 /* I hope the range from 0x5480 on is free ... */
 #define TIOCSCTTY	0x5480		/* become controlling tty */
@@ -116,4 +104,4 @@
 #define TIOCGHAYESESP	0x5493 /* Get Hayes ESP configuration */
 #define TIOCSHAYESESP	0x5494 /* Set Hayes ESP configuration */
 
-#endif /* __ASM_MIPS_IOCTLS_H */
+#endif /* __ASM_IOCTLS_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/irq.h linux/include/asm-mips/irq.h
--- linux-2.4.10-pre6/include/asm-mips/irq.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/irq.h	Mon Dec  3 23:08:47 2001
@@ -28,7 +28,7 @@
 extern int i8259_setup_irq(int irq, struct irqaction * new);
 extern void disable_irq(unsigned int);
 
-#ifdef CONFIG_ROTTEN_IRQ
+#ifndef CONFIG_NEW_IRQ
 #define disable_irq_nosync	disable_irq
 #else
 extern void disable_irq_nosync(unsigned int);
diff -urN linux-2.4.10-pre6/include/asm-mips/isadep.h linux/include/asm-mips/isadep.h
--- linux-2.4.10-pre6/include/asm-mips/isadep.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips/isadep.h	Mon Dec  3 23:08:47 2001
@@ -4,13 +4,11 @@
  * of Coprocessor 0 registers.
  *
  * Copyright (c) 1998 Harald Koerfgen
- *
- * $Id: isadep.h,v 1.1 1999/07/26 19:46:00 harald Exp $
  */
 #include <linux/config.h>
 
-#ifndef __ASM_MIPS_ISADEP_H
-#define __ASM_MIPS_ISADEP_H
+#ifndef __ASM_ISADEP_H
+#define __ASM_ISADEP_H
 
 #if defined(CONFIG_CPU_R3000)
 /*
@@ -34,4 +32,4 @@
 
 #endif
 
-#endif /* __ASM_MIPS_ISADEP_H */
+#endif /* __ASM_ISADEP_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/it8172/it8172.h linux/include/asm-mips/it8172/it8172.h
--- linux-2.4.10-pre6/include/asm-mips/it8172/it8172.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips/it8172/it8172.h	Mon Dec  3 23:08:47 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -321,66 +321,6 @@
 #define IT_AC_OPL3DW				0x6B
 #define IT_AC_BPDC				0x70
 
-// Audio : IT_AC_PCC bit definition & mask
-#define	PCC_SM					0x8000
-#define	PCC_SM_BIT				15
-#define	PCC_SM_STEREO				1
-#define PCC_SM_MONO				0
-
-#define	PCC_DF					0x4000
-#define PCC_DF_BIT				14
-#define	PCC_DF_8				0
-#define PCC_DF_16				1
-
-#define	PCC_CF					0x3000
-#define PCC_CF_BIT				12
-#define	PCC_CF_2				0
-#define PCC_CF_4				1
-#define PCC_CF_6				2
-
-#define PCC_SR					0x0F00
-#define PCC_SR_BIT				8
-#define	PCC_SR_5500				0
-#define	PCC_SR_8000				1
-#define	PCC_SR_9600				2
-#define	PCC_SR_11025				3
-#define	PCC_SR_16000				4
-#define	PCC_SR_19200				5
-#define	PCC_SR_22050				6
-#define	PCC_SR_32000				7
-#define	PCC_SR_38400				8
-#define	PCC_SR_44100				9
-#define	PCC_SR_48000				10
-
-#define PCC_CSP					0x0080
-#define PCC_CSP_BIT				7
-#define PCC_CSP_STOP				0
-#define PCC_CSP_STOP_NOW			1
-
-#define PCC_CP					0x0040
-#define	PCC_CP_BIT				6
-#define PCC_CP_NORMAL				0
-#define PCC_CP_PAUSE				1
-
-#define PCC_CA					0x0020
-#define PCC_CA_BIT				5
-#define PCC_CA_NO_START				0
-#define PCC_CA_START				1
-
-#define PCC_CB2L				0x0004
-#define PCC_CB2L_BIT				2
-#define PCC_CB2L_NO				0
-#define PCC_CB2L_YES				1
-
-#define PCC_CB1L				0x0002
-#define PCC_CB1L_BIT				1
-#define PCC_CB1L_NO				0
-#define PCC_CB1L_YES				1
-
-#define PCC_DE					0x0001
-#define PCC_DE_BIT				0
-#define PCC_DE_NOT_EMPTY			0
-#define PCC_DE_EMPTY				1
 
 // IT8172 Timer
 #define IT_TIMER_BASE				0x10800
diff -urN linux-2.4.10-pre6/include/asm-mips/it8172/it8172_cir.h linux/include/asm-mips/it8172/it8172_cir.h
--- linux-2.4.10-pre6/include/asm-mips/it8172/it8172_cir.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips/it8172/it8172_cir.h	Mon Dec  3 23:08:47 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2001 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
diff -urN linux-2.4.10-pre6/include/asm-mips/it8172/it8172_dbg.h linux/include/asm-mips/it8172/it8172_dbg.h
--- linux-2.4.10-pre6/include/asm-mips/it8172/it8172_dbg.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips/it8172/it8172_dbg.h	Mon Dec  3 23:08:47 2001
@@ -6,7 +6,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
diff -urN linux-2.4.10-pre6/include/asm-mips/it8172/it8172_int.h linux/include/asm-mips/it8172/it8172_int.h
--- linux-2.4.10-pre6/include/asm-mips/it8172/it8172_int.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips/it8172/it8172_int.h	Mon Dec  3 23:08:47 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
diff -urN linux-2.4.10-pre6/include/asm-mips/it8172/it8172_lpc.h linux/include/asm-mips/it8172/it8172_lpc.h
--- linux-2.4.10-pre6/include/asm-mips/it8172/it8172_lpc.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips/it8172/it8172_lpc.h	Mon Dec  3 23:08:47 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
diff -urN linux-2.4.10-pre6/include/asm-mips/it8172/it8172_pci.h linux/include/asm-mips/it8172/it8172_pci.h
--- linux-2.4.10-pre6/include/asm-mips/it8172/it8172_pci.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips/it8172/it8172_pci.h	Mon Dec  3 23:08:47 2001
@@ -5,7 +5,7 @@
  *
  * Copyright 2000 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
- *         	ppopov@mvista.com or support@mvista.com
+ *         	ppopov@mvista.com or source@mvista.com
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
diff -urN linux-2.4.10-pre6/include/asm-mips/keyboard.h linux/include/asm-mips/keyboard.h
--- linux-2.4.10-pre6/include/asm-mips/keyboard.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/keyboard.h	Mon Dec  3 23:08:47 2001
@@ -1,19 +1,20 @@
-/* $Id: keyboard.h,v 1.14 1999/08/19 22:56:33 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1994 - 1999 Ralf Baechle
+ * Copyright (C) 1994 - 1999, 2001 Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #ifndef _ASM_KEYBOARD_H
 #define _ASM_KEYBOARD_H
 
 #ifdef __KERNEL__
 
+#include <linux/config.h>
 #include <linux/delay.h>
 #include <linux/ioport.h>
-#include <linux/config.h>
+#include <linux/kd.h>
 #include <asm/bootinfo.h>
 
 #define DISABLE_KBD_DURING_INTERRUPTS 0
@@ -26,6 +27,7 @@
 			   char raw_mode);
 extern char pckbd_unexpected_up(unsigned char keycode);
 extern void pckbd_leds(unsigned char leds);
+extern int pckbd_rate(struct kbd_repeat *rep);
 extern void pckbd_init_hw(void);
 extern unsigned char pckbd_sysrq_xlate[128];
 extern void kbd_forward_char (int ch);
@@ -35,6 +37,7 @@
 #define kbd_translate		pckbd_translate
 #define kbd_unexpected_up	pckbd_unexpected_up
 #define kbd_leds		pckbd_leds
+#define kbd_rate		pckbd_rate
 #define kbd_init_hw		pckbd_init_hw
 #define kbd_sysrq_xlate         pckbd_sysrq_xlate
 
diff -urN linux-2.4.10-pre6/include/asm-mips/linux_logo.h linux/include/asm-mips/linux_logo.h
--- linux-2.4.10-pre6/include/asm-mips/linux_logo.h	Mon Jun 11 19:15:27 2001
+++ linux/include/asm-mips/linux_logo.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: linux_logo.h,v 1.3 1998/09/19 19:19:38 ralf Exp $
- *
+/*
  * include/asm-mips/linux_logo.h: This is a linux logo
  *                                to be displayed on boot.
  *
@@ -21,900 +20,24 @@
  
 #include <linux/init.h>
 #include <linux/version.h>
+#include <linux/config.h>
 
-#define linux_logo_banner "Linux/MIPS version " UTS_RELEASE
-
-#define __HAVE_ARCH_LINUX_LOGO
-
-#define LINUX_LOGO_COLORS	187
-
-#ifdef INCLUDE_LINUX_LOGO_DATA
-
-unsigned char linux_logo_red[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x65, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x76, 0x79,
-    0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
-    0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
-    0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
-    0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
-    0xf6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8, 0x9c,
-    0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66, 0x5e,
-    0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae, 0x9c,
-    0xc5, 0xbe, 0xbe, 0xca, 0x90, 0xb2, 0x9a, 0xa8,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x8d,
-    0x12, 0x4a, 0x8e, 0xf2, 0xf6, 0xee, 0xb5, 0xe4,
-    0xf1, 0x26, 0x9a, 0xea, 0xf6, 0xe0, 0xd2, 0x16,
-    0x9a, 0x2e, 0x70, 0xd6, 0x46, 0x7c, 0xb4, 0x62,
-    0xd6, 0xa3, 0x74, 0xa7, 0xa2, 0xca, 0xe0, 0xae,
-    0xbe, 0xce, 0xa3, 0x8e, 0x6d, 0x8e, 0x32, 0xaf,
-    0x50, 0x9e, 0x5b, 0x8a, 0x98, 0x82, 0x7a, 0x82,
-    0x56, 0x7c, 0x8a, 0x56, 0x5e, 0x86, 0x6a, 0x52,
-    0x59, 0x64, 0x5e,
-};
-
-unsigned char linux_logo_green[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x62, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x62, 0x5c,
-    0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
-    0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
-    0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
-    0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
-    0xda, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90, 0x76,
-    0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e, 0x46,
-    0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a, 0x6b,
-    0x8a, 0x8e, 0xb2, 0xca, 0x90, 0xa6, 0x79, 0x7c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x8d,
-    0x0e, 0x36, 0x86, 0xba, 0xbe, 0xcc, 0x8e, 0xb8,
-    0xc4, 0x1e, 0x8e, 0xae, 0xba, 0xb2, 0xa6, 0x12,
-    0x7a, 0x20, 0x64, 0xaa, 0x2f, 0x70, 0x85, 0x46,
-    0xa6, 0x6e, 0x51, 0x72, 0x92, 0xa2, 0xa6, 0x87,
-    0x96, 0xa2, 0x85, 0x7a, 0x6a, 0x6e, 0x22, 0x76,
-    0x36, 0x76, 0x3c, 0x6e, 0x63, 0x53, 0x66, 0x62,
-    0x42, 0x50, 0x56, 0x42, 0x56, 0x56, 0x56, 0x3e,
-    0x51, 0x52, 0x56,
-};
-
-unsigned char linux_logo_blue[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x59, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x2e, 0x08,
-    0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
-    0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
-    0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
-    0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
-    0x4a, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b, 0x0a,
-    0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a, 0x1e,
-    0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72, 0x0b,
-    0x0b, 0x22, 0x90, 0xca, 0x90, 0x92, 0x3c, 0x2c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x8d,
-    0x06, 0x0e, 0x6a, 0x0e, 0x0e, 0x5b, 0x2c, 0x3e,
-    0x0e, 0x0a, 0x5a, 0x0d, 0x0e, 0x3e, 0x0a, 0x06,
-    0x2e, 0x06, 0x4e, 0x36, 0x06, 0x58, 0x24, 0x06,
-    0x3a, 0x08, 0x08, 0x07, 0x5e, 0x45, 0x0a, 0x32,
-    0x2e, 0x2a, 0x43, 0x48, 0x5f, 0x2e, 0x06, 0x06,
-    0x07, 0x24, 0x06, 0x32, 0x06, 0x06, 0x46, 0x2e,
-    0x22, 0x06, 0x06, 0x1e, 0x4c, 0x06, 0x3a, 0x22,
-    0x42, 0x34, 0x42,
-};
-
-unsigned char linux_logo[] __initdata = {
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22, 0x22,
-    0x22, 0x21, 0x21, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-    0x26, 0x26, 0x25, 0x28, 0x23, 0x22, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x25, 0x2a, 0x2b, 0x2c, 0x2d, 0x2d,
-    0x2d, 0x2e, 0x2c, 0x2b, 0x2a, 0x25, 0x28, 0x22,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x24, 0x2a, 0x2c, 0x2f, 0x2c, 0x30, 0x30, 0x24,
-    0x25, 0x27, 0x2b, 0x2c, 0x2f, 0x31, 0x32, 0x25,
-    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x25,
-    0x33, 0x34, 0x35, 0x21, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x21, 0x2b, 0x2f, 0x2c,
-    0x30, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24, 0x33,
-    0x2d, 0x27, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x31,
-    0x2d, 0x32, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x28, 0x2a, 0x34,
-    0x25, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x23, 0x32, 0x27, 0x21, 0x36,
-    0x2a, 0x2d, 0x2a, 0x28, 0x21, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x22, 0x26, 0x2c, 0x35,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2f, 0x37, 0x32, 0x22,
-    0x36, 0x35, 0x31, 0x27, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x23, 0x2a, 0x2f, 0x22,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x26, 0x38, 0x38, 0x35, 0x25,
-    0x36, 0x21, 0x2d, 0x2b, 0x24, 0x21, 0x20, 0x20,
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-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2b, 0x30, 0x28, 0x22,
-    0x36, 0x36, 0x27, 0x34, 0x30, 0x23, 0x20, 0x20,
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-    0x23, 0x2f, 0x3b, 0x3c, 0x3d, 0x30, 0x25, 0x21,
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-    0x41, 0x42, 0x43, 0x44, 0x45, 0x3e, 0x23, 0x21,
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-    0x9d, 0x3e, 0x9e, 0x4b, 0x55, 0x2e, 0x42, 0x9f,
-    0x93, 0x4f, 0x3f, 0xb3, 0x7b, 0x7b, 0x85, 0x80,
-    0xa0, 0x36, 0x36, 0x36, 0x21, 0xb4, 0x7e, 0x7b,
-    0x64, 0x64, 0xb5, 0x35, 0x24, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x26, 0x31, 0xb6, 0x5b, 0x64, 0xa3, 0xa3, 0xac,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0x66, 0xb7, 0x36, 0x36, 0x36, 0x2c, 0x54,
-    0x31, 0x23, 0x26, 0x2c, 0x3a, 0x3b, 0x55, 0x47,
-    0x37, 0x3b, 0x3b, 0x38, 0x4a, 0x98, 0x55, 0x98,
-    0x47, 0x9a, 0x3f, 0xb8, 0x76, 0x76, 0x7a, 0x63,
-    0xb9, 0xba, 0x86, 0xba, 0xbb, 0x90, 0x5b, 0x64,
-    0xa3, 0xa3, 0xbc, 0x2d, 0x27, 0x23, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x26, 0x2d, 0x91, 0x5b, 0x64, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa8, 0x83, 0xaf, 0x36, 0x36, 0x36, 0x30,
-    0x98, 0x37, 0x30, 0x26, 0x9d, 0x3e, 0x9f, 0x9b,
-    0x37, 0x3b, 0x3b, 0x53, 0x53, 0x3d, 0x4b, 0x48,
-    0x9b, 0x9a, 0x3f, 0xbd, 0x5b, 0x7b, 0xbe, 0x85,
-    0x7e, 0x90, 0x63, 0x90, 0x85, 0x5b, 0xa3, 0xa4,
-    0xa4, 0xac, 0x5d, 0xb5, 0x39, 0x26, 0x23, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x26, 0x2d, 0xbf, 0xbe, 0x64, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa8, 0x88, 0x36, 0x36, 0x36, 0x36,
-    0x2d, 0x3f, 0x3b, 0x31, 0x4d, 0x3e, 0x9f, 0x47,
-    0x38, 0x3b, 0x3e, 0x3e, 0x98, 0x52, 0x48, 0x48,
-    0x9b, 0x45, 0x3f, 0xc0, 0x6d, 0x7b, 0xab, 0xbe,
-    0x7a, 0x8b, 0x8b, 0x7a, 0x5b, 0x64, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa3, 0xc1, 0x37, 0x35, 0x26, 0x23,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x26, 0x2e, 0xbf, 0x7a, 0x7b, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa8, 0x72, 0x73, 0x36, 0x36, 0x36,
-    0x24, 0x52, 0x47, 0x49, 0x3a, 0x55, 0x98, 0x47,
-    0x9d, 0x3e, 0x54, 0x45, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x46, 0x42, 0xb6, 0x7a, 0x7b, 0x64, 0x7b,
-    0x76, 0x5b, 0x5b, 0x76, 0x7b, 0xa3, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xac, 0x64, 0xc1, 0x4d, 0x2c, 0x27,
-    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x25, 0x31, 0xc2, 0x8b, 0x7b, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa8, 0x89, 0xa0, 0x36, 0x36,
-    0x32, 0x47, 0x48, 0x9b, 0x9a, 0x3f, 0x47, 0x48,
-    0x4b, 0x40, 0x4f, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x4b, 0x2f, 0x8f, 0x7a, 0x7b, 0xa3, 0xac,
-    0xa3, 0x64, 0x64, 0xa3, 0xa3, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x5d, 0xc3, 0x2c,
-    0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x25, 0x31, 0xc2, 0x85, 0x7b, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0x66, 0x57, 0x27, 0x4d,
-    0x4b, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x99, 0x34, 0xa0, 0xb9, 0x7a, 0x7b, 0xa3, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0xc2,
-    0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x26, 0x2d, 0xc2, 0x85, 0x7b, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa8, 0x5f, 0x92, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x44,
-    0x35, 0x36, 0xaf, 0xbb, 0x7a, 0x7b, 0xac, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xac, 0xa3, 0xc0,
-    0x2b, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
-    0x30, 0x2f, 0xb6, 0x8b, 0x7b, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0x66, 0x89, 0x45,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x9b, 0x4e, 0x25,
-    0x36, 0x36, 0x61, 0xb9, 0x6d, 0x64, 0xac, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xac, 0x7b, 0xbe, 0xc3,
-    0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
-    0x33, 0xc4, 0x63, 0xbe, 0xa3, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x72, 0x81, 0xc5,
-    0x46, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x3f, 0x2c, 0x36, 0x36,
-    0x36, 0x36, 0xc6, 0x8f, 0x6d, 0x64, 0xac, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa3, 0xab, 0x8b, 0xb0, 0x2c,
-    0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
-    0x35, 0x96, 0x75, 0xab, 0xa3, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xac, 0x7b, 0x81, 0xb9,
-    0x73, 0x3b, 0x44, 0x9b, 0x48, 0x48, 0x48, 0x9b,
-    0x99, 0x43, 0x94, 0x2c, 0x21, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x73, 0xb9, 0x7a, 0x7b, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0x64, 0x76, 0x7a, 0x91, 0xb5, 0x31, 0x30,
-    0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
-    0x39, 0x97, 0x75, 0xbe, 0x7b, 0x64, 0xa3, 0xa3,
-    0xac, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0x7b, 0x7a, 0xc7,
-    0xc8, 0x36, 0x21, 0x26, 0x2b, 0x39, 0x33, 0x30,
-    0x23, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc8, 0xbb, 0x8b, 0x7b, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x64, 0x64,
-    0x76, 0x85, 0xbf, 0xb5, 0x34, 0x2b, 0x27, 0x28,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
-    0x33, 0xc9, 0x63, 0x7e, 0x7a, 0x6d, 0xbe, 0x5b,
-    0x76, 0x7b, 0x64, 0x64, 0xa3, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xac, 0x76, 0x85, 0xb9,
-    0x79, 0x22, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xca, 0xbb, 0x75, 0x76, 0xa3, 0xa4,
-    0xa4, 0xa4, 0xac, 0xa3, 0x64, 0x76, 0xbe, 0x8b,
-    0xb6, 0xb5, 0x2f, 0x35, 0x30, 0x24, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
-    0x27, 0x31, 0xcb, 0xc9, 0xbb, 0x74, 0x63, 0x90,
-    0x7e, 0x75, 0x8b, 0x6d, 0xbe, 0x76, 0x64, 0xa3,
-    0xac, 0xac, 0xac, 0xac, 0x64, 0x7a, 0x84, 0xcc,
-    0x79, 0xa0, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc8, 0xcc, 0x63, 0x6d, 0x7b, 0x64,
-    0xac, 0xa3, 0x64, 0x7b, 0xbe, 0x75, 0x63, 0x96,
-    0x38, 0x39, 0x2a, 0x24, 0x23, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x28, 0x27, 0x35, 0x2d, 0x41, 0xb5, 0xc5, 0x8f,
-    0xb9, 0xbb, 0xc7, 0x74, 0x84, 0x90, 0x85, 0x6d,
-    0x5b, 0x7b, 0x7b, 0xab, 0x6d, 0x90, 0xb9, 0xcd,
-    0xca, 0x22, 0x36, 0x36, 0x28, 0x30, 0x30, 0x30,
-    0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x25, 0x36,
-    0x36, 0x21, 0xb4, 0x80, 0xc7, 0x7e, 0x6d, 0x76,
-    0xab, 0x76, 0x6d, 0x85, 0x63, 0xb9, 0xb5, 0x34,
-    0x33, 0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x24, 0x27, 0x2a, 0x35, 0x2e, 0x2f,
-    0x41, 0xce, 0xcf, 0x6c, 0x80, 0xcc, 0xb9, 0x74,
-    0x84, 0x90, 0x75, 0x7e, 0x74, 0x8f, 0xcd, 0x79,
-    0xc6, 0x2b, 0x9d, 0x41, 0x2f, 0x34, 0x2d, 0x2d,
-    0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x34, 0x2f, 0x38,
-    0x4d, 0x37, 0xd0, 0xd1, 0x8f, 0x74, 0x63, 0x7e,
-    0x75, 0x7e, 0x63, 0xc7, 0x88, 0xc4, 0x31, 0x2a,
-    0x24, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x21, 0x22, 0x23, 0x24, 0x26, 0x30,
-    0x33, 0x39, 0x2e, 0x51, 0x41, 0xb2, 0x6c, 0xd1,
-    0x80, 0xcc, 0xcc, 0xcc, 0xd2, 0xd1, 0xb7, 0xd3,
-    0x41, 0x34, 0x35, 0x32, 0x30, 0x27, 0x27, 0x27,
-    0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x30, 0x2a,
-    0x2b, 0x34, 0xd4, 0xca, 0xd5, 0x8f, 0xbb, 0xc7,
-    0xc7, 0xbb, 0xcc, 0x6c, 0x41, 0x39, 0x27, 0x28,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
-    0x28, 0x24, 0x26, 0x2a, 0x33, 0x2c, 0x2f, 0x41,
-    0xd6, 0xb7, 0x79, 0x79, 0x79, 0xca, 0xd7, 0x51,
-    0x39, 0x30, 0x24, 0x23, 0x22, 0x22, 0x22, 0x22,
-    0x22, 0x22, 0x21, 0x22, 0x22, 0x22, 0x22, 0x23,
-    0x24, 0x2a, 0x31, 0xd8, 0xc8, 0x79, 0xd1, 0x80,
-    0xd5, 0xba, 0xd9, 0x2f, 0x35, 0x26, 0x23, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x28, 0x25, 0x30, 0x2b,
-    0x31, 0x2f, 0xd4, 0xd8, 0xd8, 0x2f, 0x2e, 0x33,
-    0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x28, 0x27, 0x35, 0x34, 0xd8, 0xd8, 0xd8,
-    0xda, 0xd4, 0x2e, 0x33, 0x25, 0x23, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x23, 0x28,
-    0x26, 0x30, 0x32, 0x2b, 0x33, 0x2a, 0x26, 0x28,
-    0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x23, 0x25, 0x30, 0x33, 0x35, 0x35,
-    0x2b, 0x2a, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x21, 0x22, 0x23, 0x28, 0x28, 0x23, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x23, 0x28, 0x24, 0x24,
-    0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-};
-
-#endif /* INCLUDE_LINUX_LOGO_DATA */
-
-#include <linux/linux_logo.h>
+#ifndef CONFIG_DECSTATION
+#	include <asm/linux_logo_sgi.h>
+#else
+#	include <asm/linux_logo_dec.h>
+#endif
+
+#ifndef INCLUDE_LINUX_LOGO_DATA
+/* prototypes only */
+extern unsigned char linux_logo_red[];
+extern unsigned char linux_logo_green[];
+extern unsigned char linux_logo_blue[];
+extern unsigned char linux_logo[];
+extern unsigned char linux_logo_bw[];
+extern unsigned char linux_logo16_red[];
+extern unsigned char linux_logo16_green[];
+extern unsigned char linux_logo16_blue[];
+extern unsigned char linux_logo16[];
 
+#endif
diff -urN linux-2.4.10-pre6/include/asm-mips/linux_logo_dec.h linux/include/asm-mips/linux_logo_dec.h
--- linux-2.4.10-pre6/include/asm-mips/linux_logo_dec.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/linux_logo_dec.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,907 @@
+/*
+ * include/asm-mips/linux_logo_dec.h: This is a linux logo
+ *                                for eg. DECstations
+ *                                to be displayed on boot.
+ *
+ * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
+ * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ * Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+ *
+ */
+ 
+#include <linux/init.h>
+#include <linux/version.h>
+#include <linux/config.h>
+
+#define linux_logo_banner "Linux/MIPSel version " UTS_RELEASE
+#define LINUX_LOGO_COLORS 183
+
+#define __HAVE_ARCH_LINUX_LOGO
+
+#ifdef INCLUDE_LINUX_LOGO_DATA
+unsigned char linux_logo_red[] __initdata = {
+    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
+    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
+    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
+    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
+    0xc3, 0x65, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
+    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
+    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x76, 0x79,
+    0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
+    0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
+    0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
+    0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
+    0xf6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8, 0x9c,
+    0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66, 0x5e,
+    0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae, 0x9c,
+    0xc5, 0xbe, 0xbe, 0xca, 0x90, 0xb2, 0x9a, 0xa8,
+    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xaf,
+    0x12, 0x4a, 0x8e, 0xf2, 0xf6, 0xb5, 0x26, 0x9a,
+    0xea, 0xf6, 0xd2, 0x16, 0x9a, 0x2e, 0x70, 0xf1,
+    0xd6, 0x46, 0x7c, 0xb4, 0x62, 0xd6, 0xa3, 0x74,
+    0xa7, 0xa2, 0xca, 0xe0, 0xae, 0xbe, 0xce, 0xa3,
+    0x8e, 0x6d, 0x8e, 0x32, 0x50, 0x9e, 0x5b, 0x8a,
+    0x98, 0x82, 0x7a, 0x82, 0x56, 0x7c, 0x8a, 0x56,
+    0x5e, 0x86, 0x6a, 0x52, 0x59, 0x64, 0x5e,
+};
+
+unsigned char linux_logo_green[] __initdata = {
+    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
+    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
+    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
+    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
+    0xc3, 0x62, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
+    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
+    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x62, 0x5c,
+    0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
+    0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
+    0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
+    0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
+    0xda, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90, 0x76,
+    0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e, 0x46,
+    0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a, 0x6b,
+    0x8a, 0x8e, 0xb2, 0xca, 0x90, 0xa6, 0x79, 0x7c,
+    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x76,
+    0x0e, 0x36, 0x86, 0xba, 0xbe, 0x8e, 0x1e, 0x8e,
+    0xae, 0xba, 0xa6, 0x12, 0x7a, 0x20, 0x64, 0xc4,
+    0xaa, 0x2f, 0x70, 0x85, 0x46, 0xa6, 0x6e, 0x51,
+    0x72, 0x92, 0xa2, 0xa6, 0x87, 0x96, 0xa2, 0x85,
+    0x7a, 0x6a, 0x6e, 0x22, 0x36, 0x76, 0x3c, 0x6e,
+    0x63, 0x53, 0x66, 0x62, 0x42, 0x50, 0x56, 0x42,
+    0x56, 0x56, 0x56, 0x3e, 0x51, 0x52, 0x56,
+};
+
+unsigned char linux_logo_blue[] __initdata = {
+    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
+    0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
+    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0x65,
+    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
+    0xc3, 0x59, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
+    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
+    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x2e, 0x08,
+    0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
+    0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
+    0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
+    0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
+    0x4a, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b, 0x0a,
+    0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a, 0x1e,
+    0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72, 0x0b,
+    0x0b, 0x22, 0x90, 0xca, 0x90, 0x92, 0x3c, 0x2c,
+    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x06,
+    0x06, 0x0e, 0x6a, 0x0e, 0x0e, 0x2c, 0x0a, 0x5a,
+    0x0d, 0x0e, 0x0a, 0x06, 0x2e, 0x06, 0x4e, 0x0e,
+    0x36, 0x06, 0x58, 0x24, 0x06, 0x3a, 0x08, 0x08,
+    0x07, 0x5e, 0x45, 0x0a, 0x32, 0x2e, 0x2a, 0x43,
+    0x48, 0x5f, 0x2e, 0x06, 0x07, 0x24, 0x06, 0x32,
+    0x06, 0x06, 0x46, 0x2e, 0x22, 0x06, 0x06, 0x1e,
+    0x4c, 0x06, 0x3a, 0x22, 0x42, 0x34, 0x42,
+};
+
+unsigned char linux_logo[] __initdata = {
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22, 0x22,
+    0x22, 0x21, 0x21, 0x21, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+    0x26, 0x26, 0x25, 0x28, 0x23, 0x22, 0x21, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x21, 0x23, 0x25, 0x2a, 0x2b, 0x2c, 0x2d, 0x2d,
+    0x2d, 0x2e, 0x2c, 0x2b, 0x2a, 0x25, 0x28, 0x22,
+    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
+    0x24, 0x2a, 0x2c, 0x2f, 0x2c, 0x30, 0x30, 0x24,
+    0x25, 0x27, 0x2b, 0x2c, 0x2f, 0x31, 0x32, 0x25,
+    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x25,
+    0x33, 0x34, 0x35, 0x21, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x21, 0x2b, 0x2f, 0x2c,
+    0x30, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24, 0x33,
+    0x2d, 0x27, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x31,
+    0x2d, 0x32, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x21, 0x28, 0x2a, 0x34,
+    0x25, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x23, 0x32, 0x27, 0x21, 0x36,
+    0x2a, 0x2d, 0x2a, 0x28, 0x21, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x29, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x22, 0x26, 0x2c, 0x35,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x25, 0x2f, 0x37, 0x32, 0x22,
+    0x36, 0x35, 0x31, 0x27, 0x22, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x23, 0x2a, 0x2f, 0x22,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x26, 0x38, 0x38, 0x35, 0x25,
+    0x36, 0x21, 0x2d, 0x2b, 0x24, 0x21, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x21, 0x24, 0x39, 0x39, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x25, 0x2b, 0x30, 0x28, 0x22,
+    0x36, 0x36, 0x27, 0x34, 0x30, 0x23, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x21, 0x26, 0x2d, 0x26, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x22, 0x22, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x2d, 0x33, 0x28, 0x21, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x22, 0x30, 0x2f, 0x23, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x2b, 0x2c, 0x25, 0x21, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x23, 0x2a, 0x34, 0x36, 0x36,
+    0x36, 0x21, 0x22, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x21, 0x23, 0x22, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x28, 0x34, 0x27, 0x22, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x23, 0x32, 0x2f, 0x36, 0x36,
+    0x21, 0x21, 0x24, 0x27, 0x21, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x28, 0x27, 0x22, 0x33, 0x24, 0x36,
+    0x36, 0x36, 0x36, 0x22, 0x2f, 0x2a, 0x23, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x23, 0x32, 0x2f, 0x36, 0x36,
+    0x30, 0x3a, 0x38, 0x24, 0x24, 0x36, 0x36, 0x36,
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+    0x9f, 0x9f, 0x9f, 0x48, 0x9f, 0x9f, 0x9f, 0x9f,
+    0x9f, 0x9f, 0x9f, 0x48, 0x9f, 0x9f, 0x9f, 0x9f,
+    0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x48, 0x8b, 0xad,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x73, 0x5d,
+    0x82, 0x5c, 0xae, 0x2a, 0x23, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
+    0x24, 0x2b, 0xac, 0x8b, 0x5b, 0x76, 0x5b, 0x5b,
+    0x7b, 0xa3, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xaf, 0x5e, 0x22, 0x36, 0x21, 0x3a, 0x99, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x4f, 0x3f, 0xb0, 0x7b, 0x7b, 0x85, 0x80,
+    0xa0, 0x36, 0x36, 0x36, 0x21, 0xb1, 0x7e, 0x7b,
+    0x64, 0x64, 0xb2, 0x35, 0x24, 0x21, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
+    0x26, 0x31, 0xb3, 0x5b, 0x64, 0xa3, 0xa3, 0xa9,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0x66, 0xb4, 0x36, 0x36, 0x36, 0x2c, 0x4b,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x9a, 0x3f, 0xb5, 0x76, 0x76, 0x7a, 0x63,
+    0xb6, 0xb7, 0x86, 0xb7, 0xb8, 0x90, 0x5b, 0x64,
+    0xa3, 0xa3, 0xb9, 0x2d, 0x27, 0x23, 0x21, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
+    0x26, 0x2d, 0x91, 0x5b, 0x64, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xaf, 0x83, 0xab, 0x36, 0x36, 0x36, 0x30,
+    0x44, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x9b, 0x9a, 0x3f, 0xba, 0x5b, 0x7b, 0xbb, 0x85,
+    0x7e, 0x90, 0x63, 0x90, 0x85, 0x5b, 0xa3, 0xa4,
+    0xa4, 0xa9, 0x5d, 0xb2, 0x39, 0x26, 0x23, 0x21,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
+    0x26, 0x2d, 0xbc, 0xbb, 0x64, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xaf, 0x88, 0x36, 0x36, 0x36, 0x36,
+    0x2d, 0x9b, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x9b, 0x45, 0x3f, 0xbd, 0x6d, 0x7b, 0xa8, 0xbb,
+    0x7a, 0x8b, 0x8b, 0x7a, 0x5b, 0x64, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa3, 0xbe, 0x37, 0x35, 0x26, 0x23,
+    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
+    0x26, 0x2e, 0xbc, 0x7a, 0x7b, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xaf, 0x72, 0x73, 0x36, 0x36, 0x36,
+    0x24, 0x52, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x46, 0x42, 0xb3, 0x7a, 0x7b, 0x64, 0x7b,
+    0x76, 0x5b, 0x5b, 0x76, 0x7b, 0xa3, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa9, 0x64, 0xbe, 0x4d, 0x2c, 0x27,
+    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
+    0x25, 0x31, 0xbf, 0x8b, 0x7b, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xaf, 0x89, 0xa0, 0x36, 0x36,
+    0x32, 0x47, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x4b, 0x2f, 0x8f, 0x7a, 0x7b, 0xa3, 0xa9,
+    0xa3, 0x64, 0x64, 0xa3, 0xa3, 0xa9, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x5d, 0xc0, 0x2c,
+    0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
+    0x25, 0x31, 0xbf, 0x85, 0x7b, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0x66, 0x57, 0x27, 0x4d,
+    0x4b, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x99, 0x34, 0xa0, 0xb6, 0x7a, 0x7b, 0xa3, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0xbf,
+    0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
+    0x26, 0x2d, 0xbf, 0x85, 0x7b, 0xa9, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xaf, 0x5f, 0x92, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x44,
+    0x35, 0x36, 0xab, 0xb8, 0x7a, 0x7b, 0xa9, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa9, 0xa3, 0xbd,
+    0x2b, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
+    0x30, 0x2f, 0xb3, 0x8b, 0x7b, 0xa9, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0x66, 0x89, 0x45,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x48, 0x9b, 0x4e, 0x25,
+    0x36, 0x36, 0x61, 0xb6, 0x6d, 0x64, 0xa9, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa9, 0x7b, 0xbb, 0xc0,
+    0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
+    0x33, 0xc1, 0x63, 0xbb, 0xa3, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x72, 0x81, 0xc2,
+    0x46, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
+    0x48, 0x48, 0x48, 0x48, 0x3f, 0x2c, 0x36, 0x36,
+    0x36, 0x36, 0xc3, 0x8f, 0x6d, 0x64, 0xa9, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa3, 0xa8, 0x8b, 0xac, 0x2c,
+    0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
+    0x35, 0x96, 0x75, 0xa8, 0xa3, 0xa9, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa9, 0x7b, 0x81, 0xb6,
+    0x73, 0x3b, 0x44, 0x9b, 0x48, 0x48, 0x48, 0x9b,
+    0x99, 0x43, 0x94, 0x2c, 0x21, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x73, 0xb6, 0x7a, 0x7b, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0x64, 0x76, 0x7a, 0x91, 0xb2, 0x31, 0x30,
+    0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
+    0x39, 0x97, 0x75, 0xbb, 0x7b, 0x64, 0xa3, 0xa3,
+    0xa9, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0x7b, 0x7a, 0x9f,
+    0xc4, 0x36, 0x21, 0x26, 0x2b, 0x39, 0x33, 0x30,
+    0x23, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x21, 0xc4, 0xb8, 0x8b, 0x7b, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x64, 0x64,
+    0x76, 0x85, 0xbc, 0xb2, 0x34, 0x2b, 0x27, 0x28,
+    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
+    0x33, 0xc5, 0x63, 0x7e, 0x7a, 0x6d, 0xbb, 0x5b,
+    0x76, 0x7b, 0x64, 0x64, 0xa3, 0xa9, 0xa4, 0xa4,
+    0xa4, 0xa4, 0xa4, 0xa4, 0xa9, 0x76, 0x85, 0xb6,
+    0x79, 0x22, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x21, 0xc6, 0xb8, 0x75, 0x76, 0xa3, 0xa4,
+    0xa4, 0xa4, 0xa9, 0xa3, 0x64, 0x76, 0xbb, 0x8b,
+    0xb3, 0xb2, 0x2f, 0x35, 0x30, 0x24, 0x22, 0x21,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
+    0x27, 0x31, 0xc7, 0xc5, 0xb8, 0x74, 0x63, 0x90,
+    0x7e, 0x75, 0x8b, 0x6d, 0xbb, 0x76, 0x64, 0xa3,
+    0xa9, 0xa9, 0xa9, 0xa9, 0x64, 0x7a, 0x84, 0xc8,
+    0x79, 0xa0, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x21, 0xc4, 0xc8, 0x63, 0x6d, 0x7b, 0x64,
+    0xa9, 0xa3, 0x64, 0x7b, 0xbb, 0x75, 0x63, 0x96,
+    0x38, 0x39, 0x2a, 0x24, 0x23, 0x21, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
+    0x28, 0x27, 0x35, 0x2d, 0x41, 0xb2, 0xc2, 0x8f,
+    0xb6, 0xb8, 0x9f, 0x74, 0x84, 0x90, 0x85, 0x6d,
+    0x5b, 0x7b, 0x7b, 0xa8, 0x6d, 0x90, 0xb6, 0xc9,
+    0xc6, 0x22, 0x36, 0x36, 0x28, 0x30, 0x30, 0x30,
+    0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x25, 0x36,
+    0x36, 0x21, 0xb1, 0x80, 0x9f, 0x7e, 0x6d, 0x76,
+    0xa8, 0x76, 0x6d, 0x85, 0x63, 0xb6, 0xb2, 0x34,
+    0x33, 0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x21, 0x23, 0x24, 0x27, 0x2a, 0x35, 0x2e, 0x2f,
+    0x41, 0xca, 0xcb, 0x6c, 0x80, 0xc8, 0xb6, 0x74,
+    0x84, 0x90, 0x75, 0x7e, 0x74, 0x8f, 0xc9, 0x79,
+    0xc3, 0x2b, 0x9d, 0x41, 0x2f, 0x34, 0x2d, 0x2d,
+    0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x34, 0x2f, 0x38,
+    0x4d, 0x37, 0xcc, 0xcd, 0x8f, 0x74, 0x63, 0x7e,
+    0x75, 0x7e, 0x63, 0x9f, 0x88, 0xc1, 0x31, 0x2a,
+    0x24, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x21, 0x22, 0x23, 0x24, 0x26, 0x30,
+    0x33, 0x39, 0x2e, 0x51, 0x41, 0xae, 0x6c, 0xcd,
+    0x80, 0xc8, 0xc8, 0xc8, 0xce, 0xcd, 0xb4, 0xcf,
+    0x41, 0x34, 0x35, 0x32, 0x30, 0x27, 0x27, 0x27,
+    0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x30, 0x2a,
+    0x2b, 0x34, 0xd0, 0xc6, 0xd1, 0x8f, 0xb8, 0x9f,
+    0x9f, 0xb8, 0xc8, 0x6c, 0x41, 0x39, 0x27, 0x28,
+    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
+    0x28, 0x24, 0x26, 0x2a, 0x33, 0x2c, 0x2f, 0x41,
+    0xd2, 0xb4, 0x79, 0x79, 0x79, 0xc6, 0xd3, 0x51,
+    0x39, 0x30, 0x24, 0x23, 0x22, 0x22, 0x22, 0x22,
+    0x22, 0x22, 0x21, 0x22, 0x22, 0x22, 0x22, 0x23,
+    0x24, 0x2a, 0x31, 0xd4, 0xc4, 0x79, 0xcd, 0x80,
+    0xd1, 0xb7, 0xd5, 0x2f, 0x35, 0x26, 0x23, 0x21,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x21, 0x22, 0x23, 0x28, 0x25, 0x30, 0x2b,
+    0x31, 0x2f, 0xd0, 0xd4, 0xd4, 0x2f, 0x2e, 0x33,
+    0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x21, 0x28, 0x27, 0x35, 0x34, 0xd4, 0xd4, 0xd4,
+    0xd6, 0xd0, 0x2e, 0x33, 0x25, 0x23, 0x21, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x23, 0x28,
+    0x26, 0x30, 0x32, 0x2b, 0x33, 0x2a, 0x26, 0x28,
+    0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x21, 0x23, 0x25, 0x30, 0x33, 0x35, 0x35,
+    0x2b, 0x2a, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
+    0x21, 0x22, 0x23, 0x28, 0x28, 0x23, 0x22, 0x21,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x21, 0x23, 0x28, 0x24, 0x24,
+    0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+};
+
+#define INCLUDE_LINUX_LOGOBW
+#define INCLUDE_LINUX_LOGO16
+#include <linux/linux_logo.h>
+
+#endif
diff -urN linux-2.4.10-pre6/include/asm-mips/linux_logo_sgi.h linux/include/asm-mips/linux_logo_sgi.h
--- linux-2.4.10-pre6/include/asm-mips/linux_logo_sgi.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/linux_logo_sgi.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,919 @@
+/*
+ * include/asm-mips/linux_logo_sgi.h: This is a linux logo
+ *                                for SGI based machines
+ *                                to be displayed on boot.
+ *
+ * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
+ * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ * Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+ *
+ */
+ 
+#include <linux/init.h>
+#include <linux/version.h>
+#include <linux/config.h>
+
+#define linux_logo_banner "Linux/MIPS version " UTS_RELEASE
+#define LINUX_LOGO_COLORS 212
+
+#define __HAVE_ARCH_LINUX_LOGO
+
+#ifdef INCLUDE_LINUX_LOGO_DATA
+unsigned char linux_logo_red[] __initdata = {
+  0x03, 0x82, 0xE9, 0xBF, 0x42, 0xC9, 0x7E, 0xC0,
+  0xE9, 0xE3, 0xC2, 0x24, 0xA4, 0x65, 0xEC, 0xC4,
+  0x82, 0x9F, 0xF3, 0x12, 0x5F, 0xA0, 0xC2, 0xED,
+  0x3E, 0xD5, 0xDB, 0xA0, 0x1C, 0xF4, 0xEB, 0xA4,
+  0xCD, 0x0A, 0x9A, 0x51, 0xCC, 0xBE, 0xC0, 0xBA,
+  0x74, 0xDC, 0xAA, 0xF6, 0xD3, 0xC5, 0xE6, 0x26,
+  0xC2, 0x83, 0x38, 0xEA, 0x49, 0xB0, 0xED, 0xE5,
+  0xF4, 0x96, 0x96, 0x1B, 0xFA, 0xCC, 0xF2, 0x0F,
+  0xCD, 0xE5, 0xF4, 0xD3, 0x50, 0x7A, 0xB5, 0xDE,
+  0xD5, 0xB6, 0x60, 0x0A, 0x6A, 0xEA, 0xD4, 0xEB,
+  0xC1, 0xCA, 0xEA, 0xEC, 0x2A, 0x96, 0x95, 0xDC,
+  0xE4, 0xCE, 0xEC, 0x1E, 0xDC, 0x8A, 0xD1, 0xF6,
+  0x3C, 0x5E, 0xC6, 0xB4, 0xB2, 0xAC, 0xBA, 0x9E,
+  0x0F, 0x59, 0xBA, 0xFA, 0xCC, 0xBF, 0x82, 0xCE,
+  0xE6, 0x4F, 0xAA, 0x4C, 0xCA, 0x8E, 0x8E, 0xDF,
+  0x2C, 0xB6, 0x3B, 0xDE, 0xCE, 0xEE, 0x46, 0x4A,
+  0x6F, 0x7A, 0x82, 0xE4, 0xAA, 0x88, 0xE2, 0xCE,
+  0xAE, 0xB6, 0x70, 0xC2, 0x9A, 0xDA, 0x35, 0x9E,
+  0x95, 0xC0, 0x7E, 0x8C, 0xC2, 0xB6, 0xCE, 0xB9,
+  0xD5, 0xAA, 0xC1, 0xF4, 0xC7, 0xB6, 0xB6, 0xA3,
+  0xF2, 0x68, 0xDB, 0x76, 0xDC, 0x57, 0xD3, 0xA8,
+  0xC0, 0xEF, 0x46, 0xF4, 0x2F, 0xD7, 0x53, 0x36,
+  0xE6, 0xA7, 0xCA, 0xCB, 0x7E, 0xE4, 0x86, 0x9A,
+  0xCE, 0x94, 0xB4, 0x1D, 0xDA, 0xCE, 0x6C, 0xE6,
+  0x9E, 0xC6, 0xDA, 0x16, 0xFA, 0xAA, 0x56, 0xB6,
+  0xFE, 0x6E, 0xEA, 0xCE, 0xE5, 0xCC, 0xDB, 0xD3,
+  0xED, 0xDC, 0xF4, 0x72
+};
+
+unsigned char linux_logo_green[] __initdata = {
+  0x03, 0x82, 0xC4, 0x83, 0x42, 0xA2, 0x4A, 0xA4,
+  0xE5, 0xA6, 0xC2, 0x24, 0xA4, 0x65, 0xB4, 0x94,
+  0x66, 0x87, 0xB6, 0x12, 0x44, 0x6C, 0x96, 0xD4,
+  0x36, 0x95, 0xB2, 0x92, 0x0E, 0xF4, 0xBC, 0x77,
+  0xA5, 0x0A, 0x92, 0x52, 0xB4, 0x9A, 0x8C, 0xB2,
+  0x74, 0xC2, 0x8E, 0xBD, 0xA2, 0xCA, 0xD2, 0x12,
+  0xB6, 0x61, 0x24, 0xDA, 0x33, 0x79, 0xCB, 0xAC,
+  0xDA, 0x84, 0x7A, 0x1B, 0xFA, 0x8D, 0xBE, 0x06,
+  0x93, 0xBB, 0xBC, 0xAB, 0x44, 0x62, 0x83, 0xDA,
+  0x9B, 0xA2, 0x4C, 0x04, 0x6A, 0xB6, 0xC8, 0xBD,
+  0x8D, 0xB6, 0xAD, 0xEC, 0x2A, 0x68, 0x62, 0x9D,
+  0xC4, 0xC4, 0xB4, 0x13, 0xA3, 0x8A, 0xD2, 0xD6,
+  0x3C, 0x5D, 0x8C, 0x7E, 0x82, 0xAC, 0x96, 0x7E,
+  0x0D, 0x5A, 0xBA, 0xBB, 0xCC, 0xBE, 0x76, 0xB6,
+  0xDE, 0x4E, 0x9A, 0x3C, 0xBE, 0x8E, 0x6E, 0xCB,
+  0x1C, 0xAA, 0x2E, 0xBE, 0xAA, 0xDE, 0x3E, 0x4B,
+  0x4D, 0x7A, 0x54, 0xE4, 0x8E, 0x6E, 0xCA, 0x9B,
+  0x70, 0x9E, 0x5A, 0xAA, 0x9A, 0xBE, 0x34, 0x9E,
+  0x71, 0x9E, 0x7E, 0x5F, 0xAA, 0x8A, 0xBE, 0x91,
+  0xCE, 0x88, 0x92, 0xDB, 0xC6, 0xAB, 0x8A, 0x72,
+  0xE2, 0x44, 0xC3, 0x54, 0xAA, 0x45, 0xBB, 0x92,
+  0xBA, 0xC4, 0x46, 0xCA, 0x2D, 0xD6, 0x3B, 0x1A,
+  0xC2, 0x7E, 0xA6, 0xCB, 0x7A, 0xDC, 0x86, 0x72,
+  0xB6, 0x94, 0xB4, 0x1C, 0xBC, 0xAE, 0x4C, 0xD6,
+  0x62, 0x86, 0xD3, 0x16, 0xF6, 0x7A, 0x55, 0x79,
+  0xFE, 0x6E, 0xC6, 0xC6, 0xAA, 0x93, 0xDC, 0x9D,
+  0xAE, 0xA4, 0xD4, 0x56
+};
+
+unsigned char linux_logo_blue[] __initdata = {
+  0x04, 0x84, 0x10, 0x0C, 0x41, 0x14, 0x04, 0x78,
+  0xC7, 0x0E, 0xC4, 0x24, 0xA4, 0x64, 0x0C, 0x0D,
+  0x17, 0x24, 0x0D, 0x13, 0x11, 0x07, 0x40, 0x22,
+  0x0C, 0x0C, 0x11, 0x78, 0x06, 0xF4, 0x0B, 0x0A,
+  0x47, 0x0B, 0x7C, 0x54, 0x6C, 0x0C, 0x0D, 0x9C,
+  0x73, 0x54, 0x14, 0x0C, 0x0F, 0xC7, 0x94, 0x04,
+  0x94, 0x17, 0x0A, 0x6C, 0x08, 0x0F, 0x14, 0x0B,
+  0x12, 0x68, 0x28, 0x11, 0xFA, 0x0A, 0x34, 0x09,
+  0x0A, 0x2F, 0x15, 0x19, 0x14, 0x3C, 0x06, 0xC4,
+  0x0B, 0x84, 0x24, 0x08, 0x69, 0x38, 0xBC, 0x15,
+  0x1F, 0xA0, 0x0A, 0xEC, 0x2A, 0x0C, 0x0C, 0x0C,
+  0x2C, 0xA0, 0x15, 0x07, 0x0B, 0x8C, 0xD3, 0x10,
+  0x3B, 0x5C, 0x0C, 0x04, 0x3C, 0xAC, 0x54, 0x1C,
+  0x0B, 0x5B, 0xBB, 0x0A, 0xC1, 0xBB, 0x5C, 0x3C,
+  0xBC, 0x4D, 0x74, 0x10, 0x8C, 0x8C, 0x14, 0x91,
+  0x0C, 0x74, 0x17, 0x0C, 0x48, 0x9C, 0x3C, 0x4C,
+  0x09, 0x7C, 0x05, 0xE4, 0x34, 0x38, 0x6C, 0x11,
+  0x08, 0x7C, 0x18, 0x2C, 0x9C, 0x4C, 0x34, 0x9C,
+  0x29, 0x54, 0x7C, 0x0C, 0x78, 0x18, 0x9C, 0x14,
+  0xBA, 0x30, 0x27, 0x31, 0xC2, 0x97, 0x24, 0x09,
+  0xB4, 0x04, 0x87, 0x0C, 0x14, 0x1F, 0x7C, 0x64,
+  0xB0, 0x0F, 0x45, 0x10, 0x2C, 0xD4, 0x0A, 0x04,
+  0x44, 0x1F, 0x2C, 0xCC, 0x7C, 0xD8, 0x84, 0x0C,
+  0x8C, 0x94, 0xB4, 0x1D, 0x20, 0x5C, 0x18, 0xB4,
+  0x04, 0x09, 0xBC, 0x14, 0xF4, 0x08, 0x54, 0x07,
+  0xFC, 0x6C, 0x24, 0xB4, 0x15, 0x18, 0xDB, 0x17,
+  0x17, 0x18, 0x21, 0x24
+};
+
+unsigned char linux_logo[] __initdata = {
+  0xBC, 0xAC, 0x7D, 0x95, 0xAF, 0x85, 0x2C, 0x2C,
+  0xAC, 0xD9, 0x95, 0x7D, 0x95, 0xAC, 0x2C, 0xAF,
+  0x7D, 0x48, 0xB2, 0xAC, 0x85, 0xDA, 0xDA, 0x2C,
+  0x7D, 0x48, 0x21, 0x2C, 0x8D, 0x2A, 0x8A, 0xDA,
+  0x85, 0x2C, 0xD9, 0xAC, 0x2C, 0x2C, 0xD9, 0xD9,
+  0xAF, 0x85, 0x85, 0x85, 0x8D, 0xBC, 0x2A, 0x2A,
+  0xBC, 0x8C, 0xBC, 0xAC, 0x7D, 0x95, 0xAF, 0x85,
+  0x2C, 0x2C, 0xAC, 0xD9, 0x95, 0x7D, 0x95, 0xAC,
+  0x2C, 0xAF, 0x7D, 0x48, 0xB2, 0xAC, 0x85, 0xDA,
+  0xDA, 0x2C, 0x7D, 0x48, 0x21, 0x2C, 0x8D, 0x2A,
+  0xAF, 0xA1, 0x48, 0x7D, 0xAF, 0x2C, 0x2C, 0xAC,
+  0xD9, 0xD9, 0x95, 0x7D, 0x95, 0xAC, 0xD9, 0x7D,
+  0x48, 0xE9, 0x21, 0xAF, 0xDA, 0xDA, 0x85, 0x2C,
+  0xD9, 0xD9, 0xAC, 0xDA, 0x8A, 0xDA, 0x85, 0x2C,
+  0x2C, 0xAC, 0xD9, 0xAC, 0xAF, 0xAF, 0x2C, 0x2C,
+  0x2C, 0x85, 0x2C, 0x2C, 0x85, 0xDA, 0xDA, 0xDA,
+  0xDA, 0xDA, 0xAF, 0xA1, 0x48, 0x7D, 0xAF, 0x2C,
+  0x2C, 0xAC, 0xD9, 0xD9, 0x95, 0x7D, 0x95, 0xAC,
+  0xD9, 0x7D, 0x48, 0xE9, 0x21, 0xAF, 0xDA, 0xDA,
+  0x85, 0x2C, 0xD9, 0xD9, 0xAC, 0xDA, 0x8A, 0xDA,
+  0x7D, 0x48, 0x48, 0x7D, 0x2C, 0x85, 0x2C, 0xAF,
+  0xD9, 0xD9, 0x7D, 0x95, 0xD9, 0xD9, 0xD9, 0x7D,
+  0xB2, 0x21, 0xD9, 0x85, 0xDA, 0xDA, 0x85, 0x2C,
+  0xAF, 0x2C, 0x2C, 0xDA, 0x85, 0x85, 0x2C, 0x2C,
+  0xAC, 0xD9, 0xD9, 0xAF, 0xDA, 0x85, 0x2C, 0x2C,
+  0x85, 0xDA, 0xDA, 0x85, 0x85, 0xDA, 0x85, 0x85,
+  0x85, 0xAF, 0x7D, 0x48, 0x48, 0x7D, 0x2C, 0x85,
+  0x2C, 0xAF, 0xD9, 0xD9, 0x7D, 0x95, 0xD9, 0xD9,
+  0xD9, 0x7D, 0xB2, 0x21, 0xD9, 0x85, 0xDA, 0xDA,
+  0x85, 0x2C, 0xAF, 0x2C, 0x2C, 0xDA, 0xDA, 0x85,
+  0xA1, 0xE9, 0x48, 0x95, 0x85, 0xDA, 0x85, 0xAF,
+  0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xD9, 0x95, 0x95,
+  0xD9, 0xAC, 0x85, 0x85, 0xDA, 0xDA, 0x85, 0x2C,
+  0xAC, 0xAC, 0x2C, 0x2C, 0x85, 0x2C, 0x2C, 0xAC,
+  0xD9, 0xD9, 0x2C, 0x91, 0x41, 0x20, 0x6B, 0x20,
+  0x6B, 0x20, 0x6B, 0xAE, 0x2C, 0x85, 0x2C, 0x2C,
+  0xAC, 0xD9, 0xA1, 0xE9, 0x48, 0x95, 0x85, 0xDA,
+  0x85, 0xAF, 0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xD9,
+  0x95, 0x95, 0xD9, 0xAC, 0x85, 0x85, 0xDA, 0xDA,
+  0x85, 0x2C, 0xAC, 0xAC, 0x2C, 0x2C, 0x2C, 0x2C,
+  0xA1, 0xA1, 0xD6, 0xAF, 0xDA, 0xDA, 0x85, 0x2C,
+  0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xD9, 0xD9, 0xD9,
+  0x2C, 0x2C, 0xDA, 0xDA, 0xDA, 0x85, 0x2C, 0xD9,
+  0xD9, 0xD9, 0xD9, 0xAC, 0xAC, 0xAC, 0xAF, 0xAC,
+  0x2C, 0xB2, 0x88, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0x20, 0x6B, 0x80, 0x85, 0x2C,
+  0xD9, 0xD6, 0xA1, 0xA1, 0xD6, 0xAF, 0xDA, 0xDA,
+  0x85, 0x2C, 0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xD9,
+  0xD9, 0xD9, 0x2C, 0x2C, 0xDA, 0xDA, 0xDA, 0x85,
+  0x2C, 0xD9, 0xD9, 0xD9, 0xD9, 0xAF, 0xAF, 0xAF,
+  0xD6, 0xD6, 0xD9, 0x2C, 0xDA, 0xDA, 0x2C, 0xAC,
+  0xD9, 0x7D, 0x95, 0xD9, 0xD9, 0xD9, 0xAF, 0x2C,
+  0x85, 0x85, 0x85, 0x85, 0x2C, 0x2C, 0xAC, 0xD9,
+  0xD9, 0xD9, 0xAF, 0xAF, 0x2C, 0x2C, 0xAF, 0xDA,
+  0xAE, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0x41, 0xE3, 0x20, 0x6B, 0x48,
+  0xAC, 0x95, 0xD6, 0xD6, 0xD9, 0x2C, 0xDA, 0xDA,
+  0x2C, 0xAC, 0xD9, 0x7D, 0x95, 0xD9, 0xD9, 0xD9,
+  0xAF, 0x2C, 0x85, 0x85, 0x85, 0x85, 0x2C, 0x2C,
+  0xAC, 0xD9, 0xD9, 0xD9, 0xAF, 0xAF, 0xAF, 0xAF,
+  0xD9, 0xD9, 0xD9, 0x2C, 0x85, 0x85, 0x2C, 0xD9,
+  0x7D, 0x21, 0xD6, 0xD9, 0xAF, 0x2C, 0x85, 0x85,
+  0x85, 0x85, 0x85, 0x85, 0x2C, 0xAF, 0xAF, 0xAC,
+  0xAF, 0x2C, 0x2C, 0x2C, 0x2C, 0x2C, 0x2C, 0x89,
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0x74, 0x43, 0x80, 0x41, 0x20,
+  0x9F, 0x2C, 0xD9, 0xD9, 0xD9, 0x2C, 0x85, 0x85,
+  0x2C, 0xD9, 0x7D, 0x21, 0xD6, 0xD9, 0xAF, 0x2C,
+  0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x2C, 0xAF,
+  0xAF, 0xAC, 0xAF, 0x2C, 0x2C, 0x2C, 0x2C, 0x2C,
+  0xD9, 0x7D, 0xD9, 0xAF, 0x85, 0x85, 0x2C, 0xD9,
+  0xB2, 0x21, 0x7D, 0xD9, 0xAF, 0x2C, 0x85, 0x85,
+  0x85, 0x2C, 0x2C, 0x2C, 0x2C, 0xAF, 0xAF, 0xAC,
+  0xAF, 0xAC, 0xAF, 0xAF, 0xAC, 0xAC, 0x85, 0x41,
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0xAE, 0x48, 0x89, 0x74, 0x41,
+  0x6B, 0xD6, 0xD9, 0x7D, 0xD9, 0xAF, 0x85, 0x85,
+  0x2C, 0xD9, 0xB2, 0x21, 0x7D, 0xD9, 0xAF, 0x2C,
+  0x85, 0x85, 0x85, 0x2C, 0x2C, 0x2C, 0x2C, 0xAF,
+  0xAF, 0xAC, 0xAF, 0xAC, 0xAC, 0x2C, 0xAF, 0xAC,
+  0x2C, 0x7D, 0xD9, 0x2C, 0xDA, 0x85, 0x2C, 0x7D,
+  0xB2, 0xD6, 0xD9, 0xAF, 0x85, 0x85, 0x85, 0x85,
+  0xAF, 0xAC, 0xAC, 0xAF, 0xAF, 0xAC, 0xAC, 0xD9,
+  0x95, 0x7D, 0x95, 0x95, 0xD9, 0xD9, 0x48, 0x20,
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x6B, 0xAE, 0xE6, 0x80, 0x2B, 0x88,
+  0x20, 0x33, 0xDA, 0x95, 0xD9, 0x2C, 0xDA, 0x85,
+  0x2C, 0x7D, 0xB2, 0xD6, 0xD9, 0xAF, 0x85, 0x85,
+  0x85, 0x85, 0xAF, 0xAC, 0xAC, 0xAF, 0xAF, 0xAC,
+  0xAC, 0xD9, 0x95, 0x95, 0x7D, 0x95, 0x95, 0xD9,
+  0x85, 0xD9, 0x2C, 0x85, 0xDA, 0xDA, 0xD9, 0x21,
+  0xA1, 0xD9, 0xAF, 0x2C, 0x85, 0xDA, 0x85, 0xAF,
+  0xD9, 0xD9, 0xAC, 0xAC, 0xAC, 0xD9, 0x7D, 0xD6,
+  0xD6, 0x7D, 0x95, 0xD9, 0xD9, 0x85, 0xDB, 0x20,
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0xDB, 0xE3, 0x6B, 0x20, 0x20,
+  0x20, 0x20, 0xE9, 0xD9, 0x2C, 0x85, 0xDA, 0xDA,
+  0xD9, 0x21, 0xA1, 0xD9, 0xAF, 0x2C, 0x85, 0xDA,
+  0x85, 0xAF, 0xD9, 0xD9, 0xAC, 0xAC, 0xAC, 0xD9,
+  0x7D, 0xD6, 0xD6, 0x7D, 0x95, 0xD9, 0xD9, 0xD9,
+  0xDA, 0x2C, 0x85, 0xDA, 0xDA, 0x85, 0x95, 0x21,
+  0x21, 0xD9, 0x85, 0x85, 0x85, 0x2C, 0x2C, 0xD9,
+  0x95, 0x95, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9,
+  0xAC, 0xAC, 0x2C, 0xAF, 0x2C, 0x85, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x88, 0xDA, 0x85, 0xDA, 0xDA, 0x85,
+  0x95, 0x21, 0x21, 0xD9, 0x85, 0x85, 0x85, 0x2C,
+  0x2C, 0xD9, 0x95, 0x95, 0xD9, 0xD9, 0xD9, 0xD9,
+  0xD9, 0xD9, 0xD9, 0xAF, 0x2C, 0x2C, 0x2C, 0x2C,
+  0xDA, 0x2C, 0x85, 0x85, 0x2C, 0xD9, 0xD6, 0xB2,
+  0x95, 0x2C, 0x85, 0x85, 0xAF, 0xAC, 0x95, 0x95,
+  0x7D, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9, 0x2C, 0x85,
+  0x85, 0x85, 0x85, 0x85, 0x85, 0xAC, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+  0x20, 0x20, 0x20, 0xAC, 0x85, 0x85, 0x2C, 0xD9,
+  0xD6, 0xB2, 0x95, 0x2C, 0x85, 0x85, 0xAF, 0xAC,
+  0x95, 0x95, 0x7D, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9,
+  0x2C, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85,
+  0x85, 0x2C, 0x2C, 0x2C, 0xAC, 0x95, 0xD6, 0x7D,
+  0xD9, 0x2C, 0x2C, 0xAF, 0x95, 0x7D, 0x7D, 0x95,
+  0x95, 0xD9, 0xD9, 0x95, 0xD9, 0xD9, 0x2C, 0x85,
+  0xDA, 0xDA, 0xDA, 0x85, 0x85, 0x21, 0x20, 0x20,
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+  0x6B, 0x95, 0xB2, 0xD6, 0xD9, 0x85, 0xDA, 0xDA,
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+  0x48, 0xA1, 0xD6, 0xAF, 0xDA, 0x8A, 0x2C, 0xD9,
+  0xB2, 0x2D, 0x48, 0xD9, 0xAF, 0x2C, 0x2C, 0x85,
+  0xAF, 0xAC, 0x2C, 0x85, 0x85, 0x85, 0xAF, 0xAC,
+  0xAC, 0x2C, 0xD9, 0xD6, 0xD6, 0x21, 0xB2, 0x2C,
+  0xC8, 0x3B, 0x65, 0xC5, 0xCE, 0x8E, 0xC8, 0x2C,
+  0xD9, 0x95, 0xAC, 0x2C, 0x2C, 0x2C, 0xAF, 0xAC,
+  0xAC, 0xAF, 0x2C, 0x85, 0x2C, 0x2C, 0x2C, 0x85,
+  0xDA, 0x2C, 0xD6, 0xAF, 0x59, 0x65, 0xDE, 0xF3,
+  0xF3, 0x59, 0xBC, 0xAC, 0xAF, 0x85, 0x85, 0x85,
+  0xAF, 0xD9, 0xAF, 0x2C, 0xD9, 0xD6, 0xD6, 0xD6,
+  0x21, 0xD6, 0xD9, 0xDA, 0x8D, 0x8A, 0x2C, 0xD9,
+  0xB2, 0xA1, 0xD6, 0xAC, 0x2C, 0x2C, 0x2C, 0x85,
+  0x2C, 0xAC, 0x2C, 0xDA, 0xDA, 0x85, 0xAF, 0xD9,
+  0xD9, 0xAC, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9, 0xAC,
+  0x85, 0x2A, 0x4D, 0xBC, 0x85, 0xAC, 0xAF, 0xAF,
+  0xAC, 0xD9, 0xAF, 0x2C, 0xAF, 0xD9, 0xD9, 0xAC,
+  0xAC, 0xAF, 0x85, 0x2C, 0x85, 0x2C, 0x2C, 0x2C,
+  0x2C, 0xD9, 0xB2, 0xD4, 0xD6, 0x2C, 0x8A, 0xDA,
+  0xC8, 0x85, 0x2C, 0xAC, 0x2C, 0xDA, 0xDA, 0x85,
+  0xAF, 0xAC, 0xD9, 0xAC, 0xD9, 0xD9, 0xD9, 0xD9,
+  0xD9, 0xAC, 0xDA, 0x8D, 0xBC, 0xDA, 0xD9, 0x95,
+  0x95, 0xD9, 0xD9, 0xAF, 0x2C, 0x2C, 0x2C, 0x85,
+  0x2C, 0xAF, 0xAF, 0x85, 0x85, 0x85, 0x2C, 0xAC,
+  0xD9, 0xAF, 0xAF, 0xAF, 0x2C, 0x2C, 0x2C, 0x85,
+  0x8A, 0x2A, 0x8D, 0x2C, 0xD9, 0x95, 0xAC, 0xAC,
+  0xD9, 0xD9, 0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xAF,
+  0xAF, 0x2C, 0x85, 0x85, 0x85, 0x85, 0x85, 0x2C,
+  0x85, 0x2C, 0xD9, 0xD9, 0xD9, 0x2C, 0x2C, 0x2C,
+  0x2C, 0x85, 0x85, 0xAF, 0xAF, 0x85, 0x85, 0x85,
+  0xAF, 0xD9, 0xD9, 0xAC, 0xAF, 0x2C, 0x2C, 0x2C,
+  0x2C, 0x85, 0x8A, 0x2A, 0x8D, 0x2C, 0xD9, 0xD9,
+  0x2C, 0xAC, 0xAF, 0x2C, 0x2C, 0x2C, 0x2C, 0x2C,
+  0x85, 0xAF, 0xAC, 0x2C, 0x2C, 0x2C, 0x2C, 0xAC,
+  0xD9, 0xD9, 0xAF, 0x85, 0x85, 0x85, 0xDA, 0xDA,
+  0x8A, 0x8A, 0x85, 0xAC, 0xD9, 0xD9, 0xAC, 0xD9,
+  0xD6, 0xD6, 0x7D, 0x95, 0x7D, 0xD9, 0xAF, 0xAF,
+  0xAF, 0x2C, 0x85, 0x85, 0xDA, 0x85, 0x2C, 0x85,
+  0x85, 0x2C, 0xAF, 0xAC, 0xAF, 0xAF, 0x2C, 0x2C,
+  0x2C, 0x2C, 0x2C, 0xAF, 0xAC, 0x2C, 0x2C, 0x2C,
+  0x2C, 0xAF, 0xD9, 0xAC, 0xAF, 0x2C, 0x85, 0x85,
+  0x85, 0xDA, 0x8D, 0x8A, 0x85, 0xAC, 0x95, 0xD9
+};
+
+#define INCLUDE_LINUX_LOGOBW
+#define INCLUDE_LINUX_LOGO16
+#include <linux/linux_logo.h>
+
+#endif /* INCLUDE_LINUX_LOGO_DATA */
diff -urN linux-2.4.10-pre6/include/asm-mips/mips-boards/atlas.h linux/include/asm-mips/mips-boards/atlas.h
--- linux-2.4.10-pre6/include/asm-mips/mips-boards/atlas.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/mips-boards/atlas.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,62 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines of the Atlas board specific address-MAP, registers, etc.
+ *
+ */
+#ifndef _MIPS_ATLAS_H
+#define _MIPS_ATLAS_H
+
+#include <asm/addrspace.h>
+
+/* 
+ * Atlas RTC-device indirect register access.
+ */
+#define ATLAS_RTC_ADR_REG       (KSEG1ADDR(0x1f000800))
+#define ATLAS_RTC_DAT_REG       (KSEG1ADDR(0x1f000808))
+
+
+/*
+ * Atlas interrupt controller register base.
+ */
+#define ATLAS_ICTRL_REGS_BASE   (KSEG1ADDR(0x1f000000))
+
+/*
+ * Atlas UART register base.
+ */
+#define ATLAS_UART_REGS_BASE    (0x1f000900)
+#define ATLAS_BASE_BAUD ( 3686400 / 16 ) 
+
+/*
+ * Atlas PSU standby register.
+ */
+#define ATLAS_PSUSTBY_REG       (KSEG1ADDR(0x1f000600))
+#define ATLAS_GOSTBY            0x4d
+
+/*
+ * We make a universal assumption about the way the bootloader (YAMON)
+ * have located the Philips SAA9730 chip.
+ * This is not ideal, but is needed for setting up remote debugging as 
+ * soon as possible.
+ */
+#define ATLAS_SAA9730_REG  (KSEG1ADDR(0x08800000))
+
+#endif /* !(_MIPS_ATLAS_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips/mips-boards/atlasint.h linux/include/asm-mips/mips-boards/atlasint.h
--- linux-2.4.10-pre6/include/asm-mips/mips-boards/atlasint.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/mips-boards/atlasint.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,51 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines for the Atlas interrupt controller.
+ *
+ */
+#ifndef _MIPS_ATLASINT_H
+#define _MIPS_ATLASINT_H
+
+/* Number of IRQ supported on hw interrupt 0. */
+#define ATLASINT_UART      0
+#define ATLASINT_END      32
+
+/* 
+ * Atlas registers are memory mapped on 64-bit aligned boundaries and 
+ * only word access are allowed.
+ */
+struct atlas_ictrl_regs {
+        volatile unsigned long intraw;
+        long dummy1;
+        volatile unsigned long intseten;
+        long dummy2;
+        volatile unsigned long intrsten;
+        long dummy3;
+        volatile unsigned long intenable;
+        long dummy4;
+        volatile unsigned long intstatus;
+        long dummy5;
+};
+
+extern void atlasint_init(void);
+
+#endif /* !(_MIPS_ATLASINT_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips/mips-boards/generic.h linux/include/asm-mips/mips-boards/generic.h
--- linux-2.4.10-pre6/include/asm-mips/mips-boards/generic.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/mips-boards/generic.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,70 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines of the MIPS boards specific address-MAP, registers, etc.
+ *
+ */
+#ifndef _MIPS_GENERIC_H
+#define _MIPS_GENERIC_H
+
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+
+/*
+ * Display register base.
+ */
+#define ASCII_DISPLAY_WORD_BASE    (KSEG1ADDR(0x1f000410))
+#define ASCII_DISPLAY_POS_BASE     (KSEG1ADDR(0x1f000418))
+
+
+/*
+ * Yamon Prom print address.
+ */
+#define YAMON_PROM_PRINT_ADDR      (KSEG1ADDR(0x1fc00504))
+
+
+/*
+ * Reset register.
+ */
+#define SOFTRES_REG       (KSEG1ADDR(0x1f000500))
+#define GORESET           0x42
+
+
+/*
+ * Galileo GT64120 system controller register base.
+ */
+#define MIPS_GT_BASE    (KSEG1ADDR(0x1be00000))
+
+/*
+ * Because of the way the internal register works on the Galileo chip,
+ * we need to swap the bytes when running bigendian.
+ */
+#define GT_WRITE(ofs, data)  \
+             *(volatile u32 *)(MIPS_GT_BASE+ofs) = cpu_to_le32(data)
+#define GT_READ(ofs, data)   \
+             data = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+ofs))
+
+#define GT_PCI_WRITE(ofs, data)  \
+	*(volatile u32 *)(MIPS_GT_BASE+ofs) = data
+#define GT_PCI_READ(ofs, data)   \
+	data = *(volatile u32 *)(MIPS_GT_BASE+ofs)
+
+#endif  /* !(_MIPS_GENERIC_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips/mips-boards/malta.h linux/include/asm-mips/mips-boards/malta.h
--- linux-2.4.10-pre6/include/asm-mips/mips-boards/malta.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/mips-boards/malta.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,59 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines of the Malta board specific address-MAP, registers, etc.
+ *
+ */
+#ifndef _MIPS_MALTA_H
+#define _MIPS_MALTA_H
+
+#include <asm/addrspace.h>
+#include <asm/io.h>
+
+/* 
+ * Malta I/O ports base address. 
+*/
+#define MALTA_PORT_BASE      (KSEG1ADDR(0x18000000))
+
+/* 
+ * Malta RTC-device indirect register access.
+ */
+#define MALTA_RTC_ADR_REG       0x70
+#define MALTA_RTC_DAT_REG       0x71
+
+/*
+ * Malta SMSC FDC37M817 Super I/O Controller register.
+ */
+#define SMSC_CONFIG_REG		0x3f0
+#define SMSC_DATA_REG		0x3f1
+
+#define SMSC_CONFIG_DEVNUM	0x7
+#define SMSC_CONFIG_ACTIVATE	0x30
+#define SMSC_CONFIG_ENTER	0x55
+#define SMSC_CONFIG_EXIT	0xaa
+
+#define SMSC_CONFIG_DEVNUM_FLOPPY     0
+
+#define SMSC_CONFIG_ACTIVATE_ENABLE   1
+
+#define SMSC_WRITE(x,a)     outb(x,a)
+
+#endif /* !(_MIPS_MALTA_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips/mips-boards/maltaint.h linux/include/asm-mips/mips-boards/maltaint.h
--- linux-2.4.10-pre6/include/asm-mips/mips-boards/maltaint.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/mips-boards/maltaint.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,33 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines for the Malta interrupt controller.
+ *
+ */
+#ifndef _MIPS_MALTAINT_H
+#define _MIPS_MALTAINT_H
+
+/* Number of IRQ supported on hw interrupt 0. */
+#define MALTAINT_END      16
+
+extern void maltaint_init(void);
+
+#endif /* !(_MIPS_MALTAINT_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips/mips-boards/piix4.h linux/include/asm-mips/mips-boards/piix4.h
--- linux-2.4.10-pre6/include/asm-mips/mips-boards/piix4.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/mips-boards/piix4.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,86 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Register definitions for Intel PIIX4 South Bridge Device.
+ *
+ */
+
+#ifndef PIIX4_H
+#define PIIX4_H
+
+/************************************************************************
+ *  IO register offsets
+ ************************************************************************/
+#define PIIX4_ICTLR1_ICW1	0x20
+#define PIIX4_ICTLR1_ICW2	0x21
+#define PIIX4_ICTLR1_ICW3	0x21
+#define PIIX4_ICTLR1_ICW4	0x21
+#define PIIX4_ICTLR2_ICW1	0xa0
+#define PIIX4_ICTLR2_ICW2	0xa1
+#define PIIX4_ICTLR2_ICW3	0xa1
+#define PIIX4_ICTLR2_ICW4	0xa1
+#define PIIX4_ICTLR1_OCW1	0x21
+#define PIIX4_ICTLR1_OCW2	0x20
+#define PIIX4_ICTLR1_OCW3	0x20
+#define PIIX4_ICTLR1_OCW4	0x20
+#define PIIX4_ICTLR2_OCW1	0xa1
+#define PIIX4_ICTLR2_OCW2	0xa0
+#define PIIX4_ICTLR2_OCW3	0xa0
+#define PIIX4_ICTLR2_OCW4	0xa0
+
+
+/************************************************************************
+ *  Register encodings.
+ ************************************************************************/
+#define PIIX4_OCW2_NSEOI	(0x1 << 5)
+#define PIIX4_OCW2_SEOI		(0x3 << 5)
+#define PIIX4_OCW2_RNSEOI	(0x5 << 5)
+#define PIIX4_OCW2_RAEOIS	(0x4 << 5)
+#define PIIX4_OCW2_RAEOIC	(0x0 << 5)
+#define PIIX4_OCW2_RSEOI	(0x7 << 5)
+#define PIIX4_OCW2_SP		(0x6 << 5)
+#define PIIX4_OCW2_NOP		(0x2 << 5)
+
+#define PIIX4_OCW2_SEL          (0x0 << 3)
+
+#define PIIX4_OCW2_ILS_0	0
+#define PIIX4_OCW2_ILS_1	1
+#define PIIX4_OCW2_ILS_2	2
+#define PIIX4_OCW2_ILS_3	3
+#define PIIX4_OCW2_ILS_4	4
+#define PIIX4_OCW2_ILS_5	5
+#define PIIX4_OCW2_ILS_6	6
+#define PIIX4_OCW2_ILS_7	7
+#define PIIX4_OCW2_ILS_8	0
+#define PIIX4_OCW2_ILS_9	1
+#define PIIX4_OCW2_ILS_10	2
+#define PIIX4_OCW2_ILS_11	3
+#define PIIX4_OCW2_ILS_12	4
+#define PIIX4_OCW2_ILS_13	5
+#define PIIX4_OCW2_ILS_14	6
+#define PIIX4_OCW2_ILS_15	7
+
+#define PIIX4_OCW3_SEL          (0x1 << 3)
+
+#define PIIX4_OCW3_IRR          0x2
+#define PIIX4_OCW3_ISR          0x3
+
+#endif /* !(PIIX4_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips/mips-boards/prom.h linux/include/asm-mips/mips-boards/prom.h
--- linux-2.4.10-pre6/include/asm-mips/mips-boards/prom.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/mips-boards/prom.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,49 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * MIPS boards bootprom interface for the Linux kernel.
+ *
+ */
+
+#ifndef _MIPS_PROM_H
+#define _MIPS_PROM_H
+
+extern char *prom_getcmdline(void);
+extern char *prom_getenv(char *name);
+extern void setup_prom_printf(int tty_no);
+extern void prom_printf(char *fmt, ...);
+extern void prom_init_cmdline(void);
+extern void prom_meminit(void);
+extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem);
+extern void prom_free_prom_memory (void);
+extern void mips_display_message(const char *str);
+extern void mips_display_word(unsigned int num);
+extern int get_ethernet_addr(char *ethernet_addr);
+
+/* Memory descriptor management. */
+#define PROM_MAX_PMEMBLOCKS    32
+struct prom_pmemblock {
+        unsigned long base; /* Within KSEG0. */
+        unsigned int size;  /* In bytes. */
+        unsigned int type;  /* free or prom memory */
+};
+
+#endif /* !(_MIPS_PROM_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips/mips-boards/saa9730_uart.h linux/include/asm-mips/mips-boards/saa9730_uart.h
--- linux-2.4.10-pre6/include/asm-mips/mips-boards/saa9730_uart.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/mips-boards/saa9730_uart.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,69 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Register definitions for the UART part of the Philips SAA9730 chip.
+ *
+ */
+
+#ifndef SAA9730_UART_H
+#define SAA9730_UART_H
+
+/* The SAA9730 UART register map, as seen via the PCI bus */
+
+#define SAA9730_UART_REGS_ADDR	0x21800
+
+struct uart_saa9730_regmap {
+	volatile unsigned char Thr_Rbr;
+	volatile unsigned char Ier;
+	volatile unsigned char Iir_Fcr;
+	volatile unsigned char Lcr;
+	volatile unsigned char Mcr;
+	volatile unsigned char Lsr;
+	volatile unsigned char Msr;
+	volatile unsigned char Scr;
+	volatile unsigned char BaudDivLsb;
+	volatile unsigned char BaudDivMsb;
+	volatile unsigned char Junk0;
+	volatile unsigned char Junk1;
+	volatile unsigned int Config;		/* 0x2180c */
+	volatile unsigned int TxStart;		/* 0x21810 */
+	volatile unsigned int TxLength;		/* 0x21814 */
+	volatile unsigned int TxCounter;	/* 0x21818 */
+	volatile unsigned int RxStart;		/* 0x2181c */
+	volatile unsigned int RxLength;		/* 0x21820 */
+	volatile unsigned int RxCounter;	/* 0x21824 */
+};
+typedef volatile struct uart_saa9730_regmap t_uart_saa9730_regmap;
+
+/*
+ * Only a subset of the UART control bits are defined here,
+ * enough to make the serial debug port work.
+ */
+
+#define SAA9730_LCR_DATA8	0x03
+
+#define SAA9730_MCR_DTR		0x01
+#define SAA9730_MCR_RTS		0x02
+
+#define SAA9730_LSR_DR		0x01
+#define SAA9730_LSR_THRE	0x20
+
+#endif /* !(SAA9730_UART_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips/mipsregs.h linux/include/asm-mips/mipsregs.h
--- linux-2.4.10-pre6/include/asm-mips/mipsregs.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/mipsregs.h	Mon Dec  3 23:08:47 2001
@@ -36,6 +36,7 @@
 #define CP0_CONTEXT $4
 #define CP0_PAGEMASK $5
 #define CP0_WIRED $6
+#define CP0_INFO $7
 #define CP0_BADVADDR $8
 #define CP0_COUNT $9
 #define CP0_ENTRYHI $10
@@ -139,6 +140,14 @@
 /*
  * Values for PageMask register
  */
+#include <linux/config.h>
+#ifdef CONFIG_CPU_VR41XX
+#define PM_1K   0x00000000
+#define PM_4K   0x00001800
+#define PM_16K  0x00007800
+#define PM_64K  0x0001f800
+#define PM_256K 0x0007f800
+#else
 #define PM_4K   0x00000000
 #define PM_16K  0x00006000
 #define PM_64K  0x0001e000
@@ -146,6 +155,7 @@
 #define PM_1M   0x001fe000
 #define PM_4M   0x007fe000
 #define PM_16M  0x01ffe000
+#endif
 
 /*
  * Values used for computation of new tlb entries
@@ -212,7 +222,6 @@
         ".set\tmips0"                                           \
         : : "r" (value))
 
-#ifdef CONFIG_CPU_MIPS32
 /* 
  * This should be changed when we get a compiler that support the MIPS32 ISA. 
  */
@@ -227,7 +236,6 @@
 	".set\treorder"                                         \
 	:"=r" (__res));                                         \
         __res;})
-#endif
 
 /*
  * R4x00 interrupt enable / cause bits
@@ -331,6 +339,7 @@
 /* bits 6 & 7 are reserved on R[23]000 */
 #define ST0_ISC			0x00010000
 #define ST0_SWC			0x00020000
+#define ST0_CM			0x00080000
 
 /*
  * Bits specific to the R4640/R4650
@@ -525,15 +534,5 @@
 #define CEB_SUPERVISOR	4	/* Count events in supvervisor mode EXL = ERL = 0 */
 #define CEB_KERNEL	2	/* Count events in kernel mode EXL = ERL = 0 */
 #define CEB_EXL		1	/* Count events with EXL = 1, ERL = 0 */
-
-#ifndef _LANGUAGE_ASSEMBLY
-/*
- * Functions to access the performance counter and control registers
- */
-extern asmlinkage unsigned int read_perf_cntr(unsigned int counter);
-extern asmlinkage void write_perf_cntr(unsigned int counter, unsigned int val);
-extern asmlinkage unsigned int read_perf_cntl(unsigned int counter);
-extern asmlinkage void write_perf_cntl(unsigned int counter, unsigned int val);
-#endif
 
 #endif /* _ASM_MIPSREGS_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/module.h linux/include/asm-mips/module.h
--- linux-2.4.10-pre6/include/asm-mips/module.h	Tue Nov  7 10:46:04 2000
+++ linux/include/asm-mips/module.h	Mon Dec  3 23:08:47 2001
@@ -4,8 +4,64 @@
  * This file contains the mips architecture specific module code.
  */
 
+#include <linux/module.h>
+#include <asm/uaccess.h>
+
 #define module_map(x)		vmalloc(x)
 #define module_unmap(x)		vfree(x)
-#define module_arch_init(x)	(0)
+#define module_arch_init(x)	mips_module_init(x)
+#define arch_init_modules(x)	mips_init_modules(x)
+
+/*
+ * This must match in size and layout the data created by
+ * modutils/obj/obj-mips.c
+ */
+struct archdata {
+	const struct exception_table_entry *dbe_table_start;
+	const struct exception_table_entry *dbe_table_end;
+};
+
+static inline int
+mips_module_init(struct module *mod)
+{
+	struct archdata *archdata;
+
+	if (!mod_member_present(mod, archdata_end))
+		return 0;
+
+	archdata = (struct archdata *)(mod->archdata_start);
+	if (!mod_archdata_member_present(mod, struct archdata, dbe_table_end))
+		return 0;
+
+	if (archdata->dbe_table_start > archdata->dbe_table_end ||
+	    (archdata->dbe_table_start &&
+	     !((unsigned long)archdata->dbe_table_start >=
+	       ((unsigned long)mod + mod->size_of_struct) &&
+	       ((unsigned long)archdata->dbe_table_end <
+	        (unsigned long)mod + mod->size))) ||
+            (((unsigned long)archdata->dbe_table_start -
+	      (unsigned long)archdata->dbe_table_end) %
+	     sizeof(struct exception_table_entry))) {
+		printk(KERN_ERR
+			"module_arch_init: archdata->dbe_table_* invalid.\n");
+		return 1;
+	}
+
+	return 0;
+}
+
+static inline void
+mips_init_modules(struct module *mod)
+{
+	extern const struct exception_table_entry __start___dbe_table[];
+	extern const struct exception_table_entry __stop___dbe_table[];
+	static struct archdata archdata = {
+		dbe_table_start:	__start___dbe_table,
+		dbe_table_end:		__stop___dbe_table,
+	};
+
+	mod->archdata_start = (char *)&archdata;
+	mod->archdata_end = mod->archdata_start + sizeof(archdata);
+}
 
 #endif /* _ASM_MIPS_MODULE_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/pci.h linux/include/asm-mips/pci.h
--- linux-2.4.10-pre6/include/asm-mips/pci.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/pci.h	Mon Dec  3 23:08:47 2001
@@ -6,14 +6,19 @@
 #ifndef _ASM_PCI_H
 #define _ASM_PCI_H
 
+#include <linux/config.h>
+
 #ifdef __KERNEL__
 
 /* Can be used to override the logic in pci_scan_bus for skipping
    already-configured bus numbers - to be used for buggy BIOSes
    or architectures with incomplete PCI setup by the loader */
 
-//#define pcibios_assign_all_busses()	0
-#define pcibios_assign_all_busses()	1
+#ifdef CONFIG_PCI
+extern unsigned int pcibios_assign_all_busses(void);
+#else
+#define pcibios_assign_all_busses()	0
+#endif
 
 #define PCIBIOS_MIN_IO		0x1000
 #define PCIBIOS_MIN_MEM		0x10000000
@@ -85,7 +90,9 @@
 	if (direction == PCI_DMA_NONE)
 		BUG();
 
+#ifndef CONFIG_COHERENT_IO
 	dma_cache_wback_inv((unsigned long)ptr, size);
+#endif
 
 	return virt_to_bus(ptr);
 }
@@ -173,7 +180,9 @@
 	if (direction == PCI_DMA_NONE)
 		BUG();
 
+#ifndef CONFIG_COHERENT_IO
 	dma_cache_wback_inv((unsigned long)bus_to_virt(dma_handle), size);
+#endif
 }
 
 /*
@@ -213,7 +222,7 @@
 	 * so we can't guarantee allocations that must be
 	 * within a tighter range than GFP_DMA..
 	 */
-	if (mask < 0x00ffffff)
+	if (mask < 0x1fffffff)
 		return 0;
 
 	return 1;
diff -urN linux-2.4.10-pre6/include/asm-mips/pci_channel.h linux/include/asm-mips/pci_channel.h
--- linux-2.4.10-pre6/include/asm-mips/pci_channel.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips/pci_channel.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,41 @@
+#ifndef __ASM_PCI_CHANNEL_H
+#define __ASM_PCI_CHANNEL_H
+
+/*
+ * This file essentially defines the interface between board
+ * specific PCI code and MIPS common PCI code.  Should potentially put
+ * into include/asm/pci.h file.
+ */
+
+#include <linux/ioport.h>
+#include <linux/pci.h>
+
+/*
+ * Each pci channel is a top-level PCI bus seem by CPU.  A machine  with
+ * multiple PCI channels may have multiple PCI host controllers or a
+ * single controller supporting multiple channels.
+ */
+struct pci_channel {
+	struct pci_ops *pci_ops;
+	struct resource *io_resource;
+	struct resource *mem_resource;
+	int first_devfn;
+	int last_devfn;
+};
+
+/* 
+ * each board defines an array of pci_channels, that ends with all NULL entry
+ */
+extern struct pci_channel mips_pci_channels[];
+
+/*
+ * board supplied pci irq fixup routine
+ */
+extern void pcibios_fixup_irqs(void);
+
+/* 
+ * board supplied pci fixup routines
+ */
+extern void pcibios_fixup_resources(struct pci_dev *dev);
+
+#endif  /* __ASM_PCI_CHANNEL_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/pgtable.h linux/include/asm-mips/pgtable.h
--- linux-2.4.10-pre6/include/asm-mips/pgtable.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/pgtable.h	Mon Dec  3 23:08:47 2001
@@ -334,7 +334,11 @@
  * is simple.
  */
 #define page_address(page)	((page)->virtual)
+#ifdef CONFIG_CPU_VR41XX
+#define pte_page(x)             (mem_map+(unsigned long)((pte_val(x) >> (PAGE_SHIFT + 2))))
+#else
 #define pte_page(x)		(mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT)))
+#endif
 
 /*
  * The following only work if pte_present() is true.
@@ -393,6 +397,23 @@
 	return pte;
 }
 
+/*
+ * Macro to make mark a page protection value as "uncacheable".  Note
+ * that "protection" is really a misnomer here as the protection value
+ * contains the memory attribute bits, dirty bits, and various other
+ * bits as well.
+ */
+#define pgprot_noncached pgprot_noncached
+
+static inline pgprot_t pgprot_noncached(pgprot_t _prot)
+{
+	unsigned long prot = pgprot_val(_prot);
+
+	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
+
+	return __pgprot(prot);
+}
+
 extern inline pte_t pte_mkyoung(pte_t pte)
 {
 	pte_val(pte) |= _PAGE_ACCESSED;
@@ -405,6 +426,17 @@
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.
  */
+#ifdef CONFIG_CPU_VR41XX
+#define mk_pte(page, pgprot)                                            \
+({                                                                      \
+        pte_t   __pte;                                                  \
+                                                                        \
+        pte_val(__pte) = ((unsigned long)(page - mem_map) << (PAGE_SHIFT + 2)) | \
+                         pgprot_val(pgprot);                            \
+                                                                        \
+        __pte;                                                          \
+})
+#else
 #define mk_pte(page, pgprot)						\
 ({									\
 	pte_t   __pte;							\
@@ -414,10 +446,15 @@
 									\
 	__pte;								\
 })
+#endif
 
 extern inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
 {
+#ifdef CONFIG_CPU_VR41XX
+        return __pte((physpage << 2) | pgprot_val(pgprot));
+#else
 	return __pte(physpage | pgprot_val(pgprot));
+#endif
 }
 
 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
@@ -528,9 +565,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $5\n\t"
+		"mtc0 %z0, $5\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_ENTRYLO0 and CP0_ENTRYLO1 registers */
@@ -552,9 +589,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $2\n\t"
+		"mtc0 %z0, $2\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_entrylo1(void)
@@ -575,9 +612,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $3\n\t"
+		"mtc0 %z0, $3\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_ENTRYHI register */
@@ -600,9 +637,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $10\n\t"
+		"mtc0 %z0, $10\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_INDEX register */
@@ -624,9 +661,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $0\n\t"
+		"mtc0 %z0, $0\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_WIRED register */
@@ -648,9 +685,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $6\n\t"
+		"mtc0 %z0, $6\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_info(void)
@@ -685,9 +722,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $28\n\t"
+		"mtc0 %z0, $28\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_taghi(void)
@@ -708,9 +745,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $29\n\t"
+		"mtc0 %z0, $29\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_CONTEXT register */
@@ -733,9 +770,9 @@
 	__asm__ __volatile__(
 		".set push\n\t"
 		".set reorder\n\t"
-		"mtc0 %0, $4\n\t"
+		"mtc0 %z0, $4\n\t"
 		".set pop"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 #include <asm-generic/pgtable.h>
@@ -743,5 +780,10 @@
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
 
 #define io_remap_page_range remap_page_range
+
+/*
+ * No page table caches to initialise
+ */
+#define pgtable_cache_init()	do { } while (0)
 
 #endif /* _ASM_PGTABLE_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/processor.h linux/include/asm-mips/processor.h
--- linux-2.4.10-pre6/include/asm-mips/processor.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/processor.h	Mon Dec  3 23:08:47 2001
@@ -43,7 +43,6 @@
 extern void r3081_wait(void);
 extern void r4k_wait(void);
 extern char cyclecounter_available;	/* only available from R4000 upwards. */
-extern char dedicated_iv_available;	/* some embedded MIPS like Nevada */
 
 extern struct mips_cpuinfo boot_cpu_data;
 extern unsigned int vced_count, vcei_count;
@@ -130,10 +129,10 @@
  * If you change thread_struct remember to change the #defines below too!
  */
 struct thread_struct {
-        /* Saved main processor registers. */
-        unsigned long reg16;
+	/* Saved main processor registers. */
+	unsigned long reg16;
 	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
-        unsigned long reg29, reg30, reg31;
+	unsigned long reg29, reg30, reg31;
 
 	/* Saved cp0 stuff. */
 	unsigned long cp0_status;
diff -urN linux-2.4.10-pre6/include/asm-mips/reboot.h linux/include/asm-mips/reboot.h
--- linux-2.4.10-pre6/include/asm-mips/reboot.h	Thu Feb 24 22:52:30 2000
+++ linux/include/asm-mips/reboot.h	Mon Dec  3 23:08:47 2001
@@ -3,15 +3,14 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1997, 1999 by Ralf Baechle
- *
- * Declare variables for rebooting.
+ * Copyright (C) 1997, 1999, 2001 by Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #ifndef _ASM_REBOOT_H
 #define _ASM_REBOOT_H
 
-void (*_machine_restart)(char *command);
-void (*_machine_halt)(void);
-void (*_machine_power_off)(void);
+extern void (*_machine_restart)(char *command);
+extern void (*_machine_halt)(void);
+extern void (*_machine_power_off)(void);
 
 #endif /* _ASM_REBOOT_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/semaphore-helper.h linux/include/asm-mips/semaphore-helper.h
--- linux-2.4.10-pre6/include/asm-mips/semaphore-helper.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/semaphore-helper.h	Mon Dec  3 23:08:47 2001
@@ -12,6 +12,9 @@
 
 #include <linux/config.h>
 
+#define sem_read(a) ((a)->counter)
+#define sem_inc(a) (((a)->counter)++)
+#define sem_dec(a) (((a)->counter)--)
 /*
  * These two _must_ execute atomically wrt each other.
  */
@@ -20,66 +23,7 @@
 	atomic_inc(&sem->waking);
 }
 
-#if !defined(CONFIG_CPU_HAS_LLSC) || defined(CONFIG_CPU_MIPS32)
-
-/*
- * It doesn't make sense, IMHO, to endlessly turn interrupts off and on again.
- * Do it once and that's it. ll/sc *has* it's advantages. HK
- */
-#define read(a) ((a)->counter)
-#define inc(a) (((a)->counter)++)
-#define dec(a) (((a)->counter)--)
-
-static inline int waking_non_zero(struct semaphore *sem)
-{
-	unsigned long flags;
-	int ret = 0;
-
-	save_and_cli(flags);
-	if (read(&sem->waking) > 0) {
-		dec(&sem->waking);
-		ret = 1;
-	}
-	restore_flags(flags);
-	return ret;
-}
-
-static inline int waking_non_zero_interruptible(struct semaphore *sem,
-						struct task_struct *tsk)
-{
-	int ret = 0;
-	unsigned long flags;
-
-	save_and_cli(flags);
-	if (read(&sem->waking) > 0) {
-		dec(&sem->waking);
-		ret = 1;
-	} else if (signal_pending(tsk)) {
-		inc(&sem->count);
-		ret = -EINTR;
-	}
-	restore_flags(flags);
-	return ret;
-}
-
-static inline int waking_non_zero_trylock(struct semaphore *sem)
-{
-        int ret = 1;
-	unsigned long flags;
-
-	save_and_cli(flags);
-	if (read(&sem->waking) <= 0)
-		inc(&sem->count);
-	else {
-		dec(&sem->waking);
-		ret = 0;
-	}
-	restore_flags(flags);
-
-	return ret;
-}
-
-#else /* CONFIG_CPU_HAS_LLSC */
+#ifdef CONFIG_CPU_HAS_LLSC
 
 static inline int
 waking_non_zero(struct semaphore *sem)
@@ -99,6 +43,30 @@
 	return ret;
 }
 
+#else /* !CONFIG_CPU_HAS_LLSC */
+
+/*
+ * It doesn't make sense, IMHO, to endlessly turn interrupts off and on again.
+ * Do it once and that's it. ll/sc *has* it's advantages. HK
+ */
+
+static inline int waking_non_zero(struct semaphore *sem)
+{
+	unsigned long flags;
+	int ret = 0;
+
+	save_and_cli(flags);
+	if (sem_read(&sem->waking) > 0) {
+		sem_dec(&sem->waking);
+		ret = 1;
+	}
+	restore_flags(flags);
+	return ret;
+}
+#endif /* !CONFIG_CPU_HAS_LLSC */
+
+#ifdef CONFIG_CPU_HAS_LLDSCD
+
 /*
  * waking_non_zero_interruptible:
  *	1	got the lock
@@ -173,6 +141,43 @@
 	return 0;
 }
 
-#endif /* CONFIG_CPU_HAS_LLSC */
+#else /* !CONFIG_CPU_HAS_LLDSCD */
+
+static inline int waking_non_zero_interruptible(struct semaphore *sem,
+						struct task_struct *tsk)
+{
+	int ret = 0;
+	unsigned long flags;
+
+	save_and_cli(flags);
+	if (sem_read(&sem->waking) > 0) {
+		sem_dec(&sem->waking);
+		ret = 1;
+	} else if (signal_pending(tsk)) {
+		sem_inc(&sem->count);
+		ret = -EINTR;
+	}
+	restore_flags(flags);
+	return ret;
+}
+
+static inline int waking_non_zero_trylock(struct semaphore *sem)
+{
+        int ret = 1;
+	unsigned long flags;
+
+	save_and_cli(flags);
+	if (sem_read(&sem->waking) <= 0)
+		sem_inc(&sem->count);
+	else {
+		sem_dec(&sem->waking);
+		ret = 0;
+	}
+	restore_flags(flags);
+
+	return ret;
+}
+
+#endif /* !CONFIG_CPU_HAS_LLDSCD */
 
 #endif /* _ASM_SEMAPHORE_HELPER_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/semaphore.h linux/include/asm-mips/semaphore.h
--- linux-2.4.10-pre6/include/asm-mips/semaphore.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/semaphore.h	Mon Dec  3 23:08:47 2001
@@ -6,9 +6,9 @@
  * for more details.
  *
  * (C) Copyright 1996  Linus Torvalds
- * (C) Copyright 1998, 1999, 2000  Ralf Baechle
+ * (C) Copyright 1998, 99, 2000, 01  Ralf Baechle
  * (C) Copyright 1999, 2000  Silicon Graphics, Inc.
- *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ * Copyright (C) 2000, 01 MIPS Technologies, Inc.  All rights reserved.
  */
 #ifndef _ASM_SEMAPHORE_H
 #define _ASM_SEMAPHORE_H
@@ -106,7 +106,7 @@
 	return ret;
 }
 
-#if !defined(CONFIG_CPU_HAS_LLSC) || defined(CONFIG_CPU_MIPS32)
+#ifndef CONFIG_CPU_HAS_LLDSCD
 
 static inline int down_trylock(struct semaphore * sem)
 {
@@ -171,7 +171,7 @@
 	return ret;
 }
 
-#endif
+#endif /* CONFIG_CPU_HAS_LLDSCD */
 
 /*
  * Note! This is subtle. We jump to wake people up only if
diff -urN linux-2.4.10-pre6/include/asm-mips/sgidefs.h linux/include/asm-mips/sgidefs.h
--- linux-2.4.10-pre6/include/asm-mips/sgidefs.h	Wed May 20 18:55:15 1998
+++ linux/include/asm-mips/sgidefs.h	Mon Dec  3 23:08:47 2001
@@ -3,95 +3,39 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1996 by Ralf Baechle
- *
- * Definitions commonly used in SGI style code.
+ * Copyright (C) 1996, 1999, 2001 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #ifndef __ASM_SGIDEFS_H
 #define __ASM_SGIDEFS_H
 
 /*
- * There are compilers out there that don't define _MIPS_ISA, _MIPS_SIM,
- * _MIPS_SZINT, _MIPS_SZLONG, _MIPS_SZPTR.  So we notify the user about this
- * problem.  The kernel sources are aware of this problem, so we don't warn
- * when compiling the kernel.
- */
-#if !defined(_MIPS_ISA) && !defined(__KERNEL__)
-#warning "Macro _MIPS_ISA has not been defined by specs file"
-#endif
-
-#if !defined(_MIPS_SIM) && !defined(__KERNEL__)
-#warning "Macro _MIPS_SIM has not been defined by specs file"
-#endif
-
-#if !defined(_MIPS_SZINT) && !defined(__KERNEL__)
-#warning "Macro _MIPS_SZINT has not been defined by specs file"
-#endif
-
-#if !defined(_MIPS_SZLONG) && !defined(__KERNEL__)
-#warning "Macro _MIPS_SZLONG has not been defined by specs file"
-#endif
-
-#if !defined(_MIPS_SZPTR) && !defined(__KERNEL__)
-#warning "Macro _MIPS_SZPTR has not been defined by specs file"
-#endif
-
-#if (!defined(_MIPS_ISA) || \
-     !defined(_MIPS_SIM) || \
-     !defined(_MIPS_SZINT) || \
-     !defined(_MIPS_SZLONG) || \
-     !defined(_MIPS_SZPTR)) && !defined(__KERNEL__)
-#warning "Please update your GCC to GCC 2.7.2-4 or newer"
-#endif
-
-/*
- * Now let's try our best to supply some reasonable default values for
- * whatever defines GCC didn't supply.  This cannot be done correct for
- * all possible combinations of options, so be careful with your options
- * to GCC.  Best bet is to keep your fingers off the a.out GCC and use
- * ELF GCC 2.7.2-3 where possible.
+ * Using a Linux compiler for building Linux seems logic but not to
+ * everybody.
  */
-#ifndef _MIPS_ISA
-#if __mips == 1
-#define _MIPS_ISA	_MIPS_ISA_MIPS1
-/* It is impossible to handle the -mips2 case correct.  */
-#elif __mips == 3
-#define _MIPS_ISA	_MIPS_ISA_MIPS3
-#elif __mips == 4
-#define _MIPS_ISA	_MIPS_ISA_MIPS4
-#else /* __mips must be 5 */
-#define _MIPS_ISA	_MIPS_ISA_MIPS5
-#endif
-#endif
-#ifndef _MIPS_SIM
-#define _MIPS_SIM	_MIPS_SIM_ABI32
-#endif
-#ifndef _MIPS_SZINT
-#define _MIPS_SZINT	32
-#endif
-#ifndef _MIPS_SZLONG
-#define _MIPS_SZLONG	32
-#endif
-#ifndef _MIPS_SZPTR
-#define _MIPS_SZPTR	32
+#ifndef __linux__
+#error Use a Linux compiler or give up.
 #endif
 
 /*
- * Definitions for the ISA level
+ * Definitions for the ISA levels
+ *
+ * With the introduction of MIPS32 / MIPS64 instruction sets definitions
+ * MIPS ISAs are no longer subsets of each other.  Therefore comparisons
+ * on these symbols except with == may result in unexpected results and
+ * are forbidden!
  */
-#define _MIPS_ISA_MIPS1 1
-#define _MIPS_ISA_MIPS2 2
-#define _MIPS_ISA_MIPS3 3
-#define _MIPS_ISA_MIPS4 4
-#define _MIPS_ISA_MIPS5 5
+#define _MIPS_ISA_MIPS1		1
+#define _MIPS_ISA_MIPS2		2
+#define _MIPS_ISA_MIPS3		3
+#define _MIPS_ISA_MIPS4		4
+#define _MIPS_ISA_MIPS5		5
+#define _MIPS_ISA_MIPS32	6
+#define _MIPS_ISA_MIPS64	7
 
 /*
  * Subprogram calling convention
- *
- * At the moment only _MIPS_SIM_ABI32 is in use.  This will change rsn.
- * Until GCC 2.8.0 is released don't rely on this definitions because the
- * 64bit code is essentially using the 32bit interface model just with
- * 64bit registers.
  */
 #define _MIPS_SIM_ABI32		1
 #define _MIPS_SIM_NABI32	2
diff -urN linux-2.4.10-pre6/include/asm-mips/softirq.h linux/include/asm-mips/softirq.h
--- linux-2.4.10-pre6/include/asm-mips/softirq.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips/softirq.h	Mon Dec  3 23:08:47 2001
@@ -1,11 +1,11 @@
-/* $Id: softirq.h,v 1.11 2000/02/23 00:41:38 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1997, 1998, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001 Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 1999, 2001 MIPS Technologies, Inc.
  */
 #ifndef _ASM_SOFTIRQ_H
 #define _ASM_SOFTIRQ_H
@@ -13,12 +13,33 @@
 #include <asm/atomic.h>
 #include <asm/hardirq.h>
 
-#define cpu_bh_disable(cpu)	do { local_bh_count(cpu)++; barrier(); } while (0)
-#define cpu_bh_enable(cpu)	do { barrier(); local_bh_count(cpu)--; } while (0)
+extern inline void cpu_bh_disable(int cpu)
+{
+	local_bh_count(cpu)++;
+	barrier();
+}
+ 
+extern inline void __cpu_bh_enable(int cpu)
+{
+	barrier();
+	local_bh_count(cpu)--;
+}
+
 
 #define local_bh_disable()	cpu_bh_disable(smp_processor_id())
-#define local_bh_enable()	cpu_bh_enable(smp_processor_id())
+#define __local_bh_enable()	__cpu_bh_enable(smp_processor_id())
+#define local_bh_enable()					\
+do {								\
+	int cpu;						\
+								\
+	barrier();						\
+	cpu = smp_processor_id();				\
+	if (!--local_bh_count(cpu) && softirq_pending(cpu))	\
+		do_softirq();					\
+} while (0)
 
 #define in_softirq() (local_bh_count(smp_processor_id()) != 0)
+
+#define __cpu_raise_softirq(cpu, nr)	set_bit(nr, &softirq_pending(cpu))
 
 #endif /* _ASM_SOFTIRQ_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/string.h linux/include/asm-mips/string.h
--- linux-2.4.10-pre6/include/asm-mips/string.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips/string.h	Mon Dec  3 23:08:47 2001
@@ -1,13 +1,13 @@
-/* $Id: string.h,v 1.13 2000/02/19 14:12:14 harald Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (c) 1994, 1995, 1996, 1997, 1998 by Ralf Baechle
+ * Copyright (c) 1994, 1995, 1996, 1997, 1998, 2001 Ralf Baechle
+ * Copyright (c) 2001 MIPS Technologies, Inc.
  */
-#ifndef __ASM_MIPS_STRING_H
-#define __ASM_MIPS_STRING_H
+#ifndef __ASM_STRING_H
+#define __ASM_STRING_H
 
 #include <linux/config.h>
 
@@ -145,13 +145,13 @@
 		"1:\tbeq\t%0,%1,2f\n\t"
 		"addiu\t%0,1\n\t"
 		"lb\t$1,-1(%0)\n\t"
-		"bne\t$1,%4,1b\n"
+		"bne\t$1,%z4,1b\n"
 		"2:\t.set\tpop"
 		: "=r" (__addr), "=r" (__end)
-		: "0" (__addr), "1" (__end), "r" (__c)
+		: "0" (__addr), "1" (__end), "Jr" (__c)
 		: "$1");
 
 	return __addr;
 }
 
-#endif /* __ASM_MIPS_STRING_H */
+#endif /* __ASM_STRING_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/system.h linux/include/asm-mips/system.h
--- linux-2.4.10-pre6/include/asm-mips/system.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/system.h	Mon Dec  3 23:08:47 2001
@@ -206,7 +206,7 @@
  */
 extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
 {
-#if defined(CONFIG_CPU_HAS_LLSC)
+#ifdef CONFIG_CPU_HAS_LLSC
 	unsigned long dummy;
 
 	__asm__ __volatile__(
@@ -233,7 +233,6 @@
 	*m = val;
 	restore_flags(flags);
 	return retval;
-
 #endif /* Processor-dependent optimization */
 }
 
diff -urN linux-2.4.10-pre6/include/asm-mips/termbits.h linux/include/asm-mips/termbits.h
--- linux-2.4.10-pre6/include/asm-mips/termbits.h	Fri Jan  8 11:11:45 1999
+++ linux/include/asm-mips/termbits.h	Mon Dec  3 23:08:47 2001
@@ -5,10 +5,11 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995, 1996 by Ralf Baechle
+ * Copyright (C) 1995, 1996, 2001 Ralf Baechle
+ * Copyright (C) 2001  MIPS Technologies, Inc.
  */
-#ifndef __ASM_MIPS_TERMBITS_H
-#define __ASM_MIPS_TERMBITS_H
+#ifndef _ASM_TERMBITS_H
+#define _ASM_TERMBITS_H
 
 #include <linux/posix_types.h>
 
@@ -69,21 +70,14 @@
 #define INLCR	0000100		/* Map NL to CR on input.  */
 #define IGNCR	0000200		/* Ignore CR.  */
 #define ICRNL	0000400		/* Map CR to NL on input.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define IUCLC	0001000		/* Map upper case to lower case on input.  */
-#endif
 #define IXON	0002000		/* Enable start/stop output control.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define IXANY	0004000		/* Any character will restart after stop.  */
-#endif
 #define IXOFF	0010000		/* Enable start/stop input control.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define IMAXBEL	0020000		/* Ring bell when input queue is full.  */
-#endif
 
 /* c_oflag bits */
 #define OPOST	0000001		/* Perform output processing.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define OLCUC	0000002		/* Map lower case to upper case on output.  */
 #define ONLCR	0000004		/* Map NL to CR-NL on output.  */
 #define OCRNL	0000010
@@ -118,7 +112,6 @@
 #define PAGEOUT ???
 #define WRAP    ???
  */
-#endif
 
 /* c_cflag bit meaning */
 #define CBAUD	0010017
@@ -151,7 +144,6 @@
 #define PARODD	0001000		/* Odd parity instead of even.  */
 #define HUPCL	0002000		/* Hang up on last close.  */
 #define CLOCAL	0004000		/* Ignore modem status lines.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define CBAUDEX 0010000
 #define    B57600 0010001
 #define   B115200 0010002
@@ -171,7 +163,6 @@
 #define CIBAUD	  002003600000	/* input baud rate (not used) */
 #define CMSPAR    010000000000	/* mark or space (stick) parity */
 #define CRTSCTS	  020000000000		/* flow control */
-#endif
 
 /* c_lflag bits */
 #define ISIG	0000001		/* Enable signals.  */
@@ -183,15 +174,11 @@
 #define ECHONL	0000100		/* Echo NL even if ECHO is off.  */
 #define NOFLSH	0000200		/* Disable flush after interrupt.  */
 #define IEXTEN	0000400		/* Enable DISCARD and LNEXT.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define ECHOCTL	0001000		/* Echo control characters as ^X.  */
 #define ECHOPRT	0002000		/* Hardcopy visual erase.  */
 #define ECHOKE	0004000		/* Visual erase for KILL.  */
-#endif
 #define FLUSHO	0020000
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define PENDIN	0040000		/* Retype pending input (state).  */
-#endif
 #define TOSTOP	0100000		/* Send SIGTTOU for background output.  */
 #define ITOSTOP	TOSTOP
 
@@ -214,4 +201,4 @@
 #define	TCSADRAIN	TCSETSW	/* Change when pending output is written.  */
 #define	TCSAFLUSH	TCSETSF	/* Flush pending input before changing.  */
 
-#endif /* __ASM_MIPS_TERMBITS_H */
+#endif /* _ASM_TERMBITS_H */
diff -urN linux-2.4.10-pre6/include/asm-mips/termios.h linux/include/asm-mips/termios.h
--- linux-2.4.10-pre6/include/asm-mips/termios.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/termios.h	Mon Dec  3 23:08:47 2001
@@ -100,7 +100,7 @@
 #define N_SMSBLOCK	12	/* SMS block mode - for talking to GSM data cards about SMS messages */
 #define N_HDLC		13	/* synchronous HDLC */
 #define N_SYNC_PPP	14	/* synchronous PPP */
-#define N_HCI		15  /* Bluetooth HCI UART */
+#define N_HCI		15	/* Bluetooth HCI UART */
 
 #ifdef __KERNEL__
 
diff -urN linux-2.4.10-pre6/include/asm-mips/time.h linux/include/asm-mips/time.h
--- linux-2.4.10-pre6/include/asm-mips/time.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/time.h	Mon Dec  3 23:08:47 2001
@@ -1,4 +1,4 @@
-/***********************************************************************
+/*
  * Copyright 2001 MontaVista Software Inc.
  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  *
@@ -9,7 +9,11 @@
  * under  the terms of  the GNU General  Public License as published by the
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
- ***********************************************************************
+ *
+ */
+
+/*
+ * Please refer to Documentation/MIPS/time.README.
  */
 
 #ifndef _ASM_TIME_H
@@ -17,19 +21,27 @@
 
 #include <linux/ptrace.h>               /* for struct pt_regs */
 #include <linux/linkage.h>              /* for asmlinkage */
+#include <linux/rtc.h>                  /* for struct rtc_time */
 
 /* 
  * RTC ops.  By default, they point a no-RTC functions.
  *	rtc_get_time - mktime(year, mon, day, hour, min, sec) in seconds.
- *	rtc_set_time - reverse the above translation
+ *	rtc_set_time - reverse the above translation and set time to RTC.
  */
 extern unsigned long (*rtc_get_time)(void);
 extern int (*rtc_set_time)(unsigned long);
 
 /*
+ * to_tm() converts system time back to (year, mon, day, hour, min, sec).
+ * It is intended to help implement rtc_set_time() functions.
+ * Copied from PPC implementation.
+ */
+extern void to_tm(unsigned long tim, struct rtc_time * tm);
+
+/*
  * do_gettimeoffset(). By default, this func pointer points to 
  * do_null_gettimeoffset(), which leads to the same resolution as HZ.
- * Higher resolution versions are vailable.
+ * Higher resolution versions are vailable, which gives ~1us resolution.
  */
 extern unsigned long (*do_gettimeoffset)(void);
 
diff -urN linux-2.4.10-pre6/include/asm-mips/tx3912.h linux/include/asm-mips/tx3912.h
--- linux-2.4.10-pre6/include/asm-mips/tx3912.h	Mon Jul  2 13:56:40 2001
+++ linux/include/asm-mips/tx3912.h	Mon Dec  3 23:08:47 2001
@@ -14,14 +14,6 @@
 
 #include <asm/addrspace.h>
 
-#define inb(addr)	(*(volatile unsigned char *)(addr))
-#define inw(addr)	(*(volatile unsigned short *)(addr))
-#define inl(addr)	(*(volatile unsigned int *)(addr))
-#define outb(b,addr)	(*(volatile unsigned char *)(addr)) = (b)
-#define outw(b,addr)	(*(volatile unsigned short *)(addr)) = (b)
-#define outl(b,addr)	(*(volatile unsigned int *)(addr)) = (b)
-
- 
 /******************************************************************************
 *
 * 	01  General macro definitions
diff -urN linux-2.4.10-pre6/include/asm-mips/uaccess.h linux/include/asm-mips/uaccess.h
--- linux-2.4.10-pre6/include/asm-mips/uaccess.h	Tue Aug 29 14:09:15 2000
+++ linux/include/asm-mips/uaccess.h	Mon Dec  3 23:08:47 2001
@@ -45,8 +45,12 @@
  *  - AND "addr+size" doesn't have any high-bits set
  *  - OR we are in kernel mode.
  */
-#define __access_ok(addr,size,mask) \
-        (((__signed__ long)((mask)&(addr | size | (addr+size)))) >= 0)
+#define __ua_size(size)							\
+	(__builtin_constant_p(size) && (signed long) (size) > 0 ? 0 : (size))
+
+#define __access_ok(addr,size,mask)                                     \
+	(((signed long)((mask)&(addr | (addr + size) | __ua_size(size)))) >= 0)
+
 #define __access_mask ((long)(get_fs().seg))
 
 #define access_ok(type,addr,size) \
@@ -214,8 +218,8 @@
 #define __put_user_asm(insn) \
 ({ \
 __asm__ __volatile__( \
-	"1:\t" insn "\t%1,%2\n\t" \
-	"move\t%0,$0\n" \
+	"1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \
+	"move\t%0, $0\n" \
 	"2:\n\t" \
 	".section\t.fixup,\"ax\"\n" \
 	"3:\tli\t%0,%3\n\t" \
@@ -225,14 +229,14 @@
 	".word\t1b,3b\n\t" \
 	".previous" \
 	:"=r" (__pu_err) \
-	:"r" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); })
+	:"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); })
 
 #define __put_user_asm_ll32 \
 ({ \
 __asm__ __volatile__( \
-	"1:\tsw\t%1,%2\n\t" \
-	"2:\tsw\t%D1,%3\n" \
-	"move\t%0,$0\n" \
+	"1:\tsw\t%1, %2\t\t\t# __put_user_asm_ll32\n\t" \
+	"2:\tsw\t%D1, %3\n" \
+	"move\t%0, $0\n" \
 	"3:\n\t" \
 	".section\t.fixup,\"ax\"\n" \
 	"4:\tli\t%0,%4\n\t" \
diff -urN linux-2.4.10-pre6/include/asm-mips64/a.out.h linux/include/asm-mips64/a.out.h
--- linux-2.4.10-pre6/include/asm-mips64/a.out.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/a.out.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: a.out.h,v 1.1 1999/08/18 23:37:50 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/addrspace.h linux/include/asm-mips64/addrspace.h
--- linux-2.4.10-pre6/include/asm-mips64/addrspace.h	Sun Jul  9 22:18:15 2000
+++ linux/include/asm-mips64/addrspace.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: addrspace.h,v 1.5 2000/02/01 00:32:01 kanoj Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/arc/hinv.h linux/include/asm-mips64/arc/hinv.h
--- linux-2.4.10-pre6/include/asm-mips64/arc/hinv.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/arc/hinv.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * ARCS hardware/memory inventory/configuration and system ID definitions.
  */
 #ifndef _ASM_ARC_HINV_H
diff -urN linux-2.4.10-pre6/include/asm-mips64/asm.h linux/include/asm-mips64/asm.h
--- linux-2.4.10-pre6/include/asm-mips64/asm.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/asm.h	Mon Dec  3 23:08:47 2001
@@ -1,11 +1,11 @@
-/* $Id: asm.h,v 1.2 1999/12/04 03:59:12 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995, 1996, 1997, 1999 by Ralf Baechle
+ * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
  * Copyright (C) 1999 by Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  *
  * Some useful macros for MIPS assembler code
  *
@@ -13,8 +13,8 @@
  * away by gas in -O mode. These nops are however required to fill delay
  * slots in noreorder mode.
  */
-#ifndef	_ASM_ASM_H
-#define	_ASM_ASM_H
+#ifndef	__ASM_ASM_H
+#define	__ASM_ASM_H
 
 #include <asm/sgidefs.h>
 
@@ -65,15 +65,15 @@
 /*
  * EXPORT - export definition of symbol
  */
-#define	EXPORT(symbol)					\
+#define EXPORT(symbol)					\
 		.globl	symbol;                         \
 symbol:
 
 /*
  * FEXPORT - export definition of a function symbol
  */
-#define	FEXPORT(symbol)					\
-		.globl	symbol;                         \
+#define FEXPORT(symbol)					\
+		.globl	symbol;				\
 		.type	symbol,@function;		\
 symbol:
 
@@ -94,7 +94,7 @@
 		TEXT(msg)
 
 /*
- * Print formated string
+ * Print formatted string
  */
 #define PRINT(string)                                   \
 		.set	push;				\
@@ -104,17 +104,6 @@
 		.set	pop;				\
 		TEXT(string)
 
-/*
- * Print formated string
- */
-#define PROM_PRINT(string)                              \
-		.set	push;				\
-		.set	reorder;                        \
-		la	a0,8f;                          \
-		jal	prom_printf;                    \
-		.set	pop;				\
-		TEXT(string)
-
 #define	TEXT(msg)                                       \
 		.data;                                  \
 8:		.asciiz	msg;                            \
@@ -138,7 +127,8 @@
  * MIPS IV implementations are free to treat this as a nop.  The R5000
  * is one of them.  So we should have an option not to use this instruction.
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define PREF(hint,addr)                                 \
 		pref	hint,addr
 #define PREFX(hint,addr)                                \
@@ -183,22 +173,24 @@
 		.set	pop;				\
 9:
 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define MOVN(rd,rs,rt)                                  \
 		movn	rd,rs,rt
 #define MOVZ(rd,rs,rt)                                  \
 		movz	rd,rs,rt
-#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) */
+#endif /* MIPS IV, MIPS V or MIPS64 */
 
 /*
  * Stack alignment
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32)
 #define ALSZ	7
 #define ALMASK	~7
 #endif
 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS5)
+    (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define ALSZ	15
 #define ALMASK	~15
 #endif
@@ -216,14 +208,15 @@
  * Use the following macros in assemblercode to load/store registers,
  * pointers etc.
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32)
 #define REG_S sw
 #define REG_L lw
 #define PTR_SUBU dsubu
 #define PTR_ADDU daddu
 #endif
 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS5)
+    (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define REG_S sd
 #define REG_L ld
 /* We still live in a 32 bit address space ...  */
@@ -239,7 +232,7 @@
 #define INT_ADDI	addi
 #define INT_ADDU	addu
 #define INT_ADDIU	addiu
-#define INT_SUB	add
+#define INT_SUB		add
 #define INT_SUBI	subi
 #define INT_SUBU	subu
 #define INT_SUBIU	subu
@@ -252,7 +245,7 @@
 #define INT_ADDI	daddi
 #define INT_ADDU	daddu
 #define INT_ADDIU	daddiu
-#define INT_SUB	dadd
+#define INT_SUB		dadd
 #define INT_SUBI	dsubi
 #define INT_SUBU	dsubu
 #define INT_SUBIU	dsubu
@@ -357,14 +350,15 @@
 /*
  * Some cp0 registers were extended to 64bit for MIPS III.
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32)
 #define MFC0	mfc0
 #define MTC0	mtc0
 #endif
 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS5)
+    (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 #define MFC0	dmfc0
 #define MTC0	dmtc0
 #endif
 
-#endif /* _ASM_ASM_H */
+#endif /* __ASM_ASM_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/asmmacro.h linux/include/asm-mips64/asmmacro.h
--- linux-2.4.10-pre6/include/asm-mips64/asmmacro.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/asmmacro.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: asmmacro.h,v 1.2 1999/10/19 20:51:53 ralf Exp $
- *
+/*
  * asmmacro.h: Assembler macros to make things easier to read.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
diff -urN linux-2.4.10-pre6/include/asm-mips64/bcache.h linux/include/asm-mips64/bcache.h
--- linux-2.4.10-pre6/include/asm-mips64/bcache.h	Tue Nov 28 21:42:04 2000
+++ linux/include/asm-mips64/bcache.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/bitops.h linux/include/asm-mips64/bitops.h
--- linux-2.4.10-pre6/include/asm-mips64/bitops.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/bitops.h	Mon Dec  3 23:08:47 2001
@@ -324,8 +324,9 @@
 		"blez\t$1,2f\n\t"
 		"lw\t$1,(%5)\n\t"
 		"addiu\t%5,4\n\t"
-#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS2 ) || (_MIPS_ISA == _MIPS_ISA_MIPS3 ) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5 ) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 		"beql\t%1,$1,1b\n\t"
 		"addiu\t%0,32\n\t"
 #else
diff -urN linux-2.4.10-pre6/include/asm-mips64/bootinfo.h linux/include/asm-mips64/bootinfo.h
--- linux-2.4.10-pre6/include/asm-mips64/bootinfo.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/bootinfo.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: bootinfo.h,v 1.1 1999/08/18 23:37:50 ralf Exp $
- *
+/*
  * bootinfo.h -- Definition of the Linux/MIPS boot information structure
  *
  * Copyright (C) 1995 - 1999 by Ralf Baechle
diff -urN linux-2.4.10-pre6/include/asm-mips64/branch.h linux/include/asm-mips64/branch.h
--- linux-2.4.10-pre6/include/asm-mips64/branch.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/branch.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/bugs.h linux/include/asm-mips64/bugs.h
--- linux-2.4.10-pre6/include/asm-mips64/bugs.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/bugs.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  *  Copyright (C) 1995 Waldorf Electronics
  *  Copyright (C) 1997, 1999 Ralf Baechle
  */
diff -urN linux-2.4.10-pre6/include/asm-mips64/byteorder.h linux/include/asm-mips64/byteorder.h
--- linux-2.4.10-pre6/include/asm-mips64/byteorder.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/byteorder.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/cachectl.h linux/include/asm-mips64/cachectl.h
--- linux-2.4.10-pre6/include/asm-mips64/cachectl.h	Thu Feb 24 22:53:35 2000
+++ linux/include/asm-mips64/cachectl.h	Mon Dec  3 23:08:47 2001
@@ -19,7 +19,7 @@
 /*
  * Caching modes for the cachectl(2) call
  *
- * cachctl(2) is currently not supported and returns ENOSYS.
+ * cachectl(2) is currently not supported and returns ENOSYS.
  */
 #define CACHEABLE	0	/* make pages cacheable */
 #define UNCACHEABLE	1	/* make pages uncacheable */
diff -urN linux-2.4.10-pre6/include/asm-mips64/current.h linux/include/asm-mips64/current.h
--- linux-2.4.10-pre6/include/asm-mips64/current.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/current.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: current.h,v 1.3 1999/12/04 03:59:12 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/div64.h linux/include/asm-mips64/div64.h
--- linux-2.4.10-pre6/include/asm-mips64/div64.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/div64.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: div64.h,v 1.1 2000/01/28 23:18:55 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/ds1286.h linux/include/asm-mips64/ds1286.h
--- linux-2.4.10-pre6/include/asm-mips64/ds1286.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/ds1286.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/elf.h linux/include/asm-mips64/elf.h
--- linux-2.4.10-pre6/include/asm-mips64/elf.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/elf.h	Mon Dec  3 23:08:47 2001
@@ -93,7 +93,7 @@
    that it will "exec", and that there is sufficient room for the brk.  */
 
 #ifndef ELF_ET_DYN_BASE
-#define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)
+#define ELF_ET_DYN_BASE         (TASK_SIZE / 3 * 2)
 #endif
 
 #ifdef __KERNEL__
diff -urN linux-2.4.10-pre6/include/asm-mips64/fcntl.h linux/include/asm-mips64/fcntl.h
--- linux-2.4.10-pre6/include/asm-mips64/fcntl.h	Tue Nov 28 21:42:04 2000
+++ linux/include/asm-mips64/fcntl.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/gfx.h linux/include/asm-mips64/gfx.h
--- linux-2.4.10-pre6/include/asm-mips64/gfx.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/gfx.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/hardirq.h linux/include/asm-mips64/hardirq.h
--- linux-2.4.10-pre6/include/asm-mips64/hardirq.h	Fri Aug  4 16:15:37 2000
+++ linux/include/asm-mips64/hardirq.h	Mon Dec  3 23:08:47 2001
@@ -1,11 +1,11 @@
-/* $Id: hardirq.h,v 1.6 2000/03/07 15:45:42 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1997 - 2000 by Ralf Baechle
+ * Copyright (C) 1997 - 2000, 2001 by Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #ifndef _ASM_HARDIRQ_H
 #define _ASM_HARDIRQ_H
@@ -14,13 +14,12 @@
 #include <linux/threads.h>
 #include <linux/irq.h>
 
-/* entry.S is sensitive to the offsets of these fields */
 typedef struct {
-	unsigned int __softirq_active;
-	unsigned int __softirq_mask;
+	unsigned int __softirq_pending;
 	unsigned int __local_irq_count;
 	unsigned int __local_bh_count;
 	unsigned int __syscall_count;
+	struct task_struct * __ksoftirqd_task;	/* waitqueue is too large */
 } ____cacheline_aligned irq_cpustat_t;
 
 #include <linux/irq_cpustat.h>	/* Standard mappings for irq_cpustat_t above */
diff -urN linux-2.4.10-pre6/include/asm-mips64/ide.h linux/include/asm-mips64/ide.h
--- linux-2.4.10-pre6/include/asm-mips64/ide.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/ide.h	Mon Dec  3 23:08:47 2001
@@ -8,6 +8,10 @@
  * Copyright (C) 1994-1996  Linus Torvalds & authors
  */
 
+/*
+ *  This file contains the MIPS architecture specific IDE code.
+ */
+
 #ifndef __ASM_IDE_H
 #define __ASM_IDE_H
 
@@ -55,21 +59,7 @@
 static inline void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
                                        ide_ioreg_t ctrl_port, int *irq)
 {
-	ide_ioreg_t reg = data_port;
-	int i;
-
-	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
-		hw->io_ports[i] = reg;
-		reg += 1;
-	}
-	if (ctrl_port) {
-		hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
-	} else {
-		hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
-	}
-	if (irq != NULL)
-		*irq = 0;
-	hw->io_ports[IDE_IRQ_OFFSET] = 0;
+	ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, irq);
 }
 
 static __inline__ void ide_init_default_hwifs(void)
diff -urN linux-2.4.10-pre6/include/asm-mips64/init.h linux/include/asm-mips64/init.h
--- linux-2.4.10-pre6/include/asm-mips64/init.h	Fri Oct 27 10:55:01 2000
+++ linux/include/asm-mips64/init.h	Mon Dec  3 23:08:47 2001
@@ -1,24 +1 @@
-/* $Id$
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 1999 Ralf Baechle
- */
-#ifndef _ASM_INIT_H
-#define _ASM_INIT_H
-
-#define __init __attribute__ ((__section__ (".text.init")))
-#define __initdata __attribute__ ((__section__ (".data.init")))
-#define __initfunc(__arginit) \
-	__arginit __init; \
-	__arginit
-
-/* For assembly routines */
-#define __INIT		.section	.text.init,"ax"
-#define __FINIT		.previous
-#define __INITDATA	.section	.data.init,"a"
-#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES)))
-
-#endif /* _ASM_INIT_H */
+#error "<asm/init.h> should never be used - use <linux/init.h> instead"
diff -urN linux-2.4.10-pre6/include/asm-mips64/inst.h linux/include/asm-mips64/inst.h
--- linux-2.4.10-pre6/include/asm-mips64/inst.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/inst.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: inst.h,v 1.1 1999/10/09 20:55:09 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/io.h linux/include/asm-mips64/io.h
--- linux-2.4.10-pre6/include/asm-mips64/io.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/io.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: io.h,v 1.9 2000/02/04 07:40:53 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -114,7 +113,7 @@
 }
 
 /*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is is mapped
+ * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
  * for the processor.  This implies the assumption that there is only
  * one of these busses.
  */
diff -urN linux-2.4.10-pre6/include/asm-mips64/ioctl.h linux/include/asm-mips64/ioctl.h
--- linux-2.4.10-pre6/include/asm-mips64/ioctl.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/ioctl.h	Mon Dec  3 23:08:47 2001
@@ -38,6 +38,11 @@
 #define _IOC_DIRSHIFT	(_IOC_SIZESHIFT+_IOC_SIZEBITS)
 
 /*
+ * We to additionally limit parameters to a maximum 255 bytes.
+ */
+#define _IOC_SLMASK	0xff
+
+/*
  * Direction bits _IOC_NONE could be 0, but OSF/1 gives it a bit.
  * And this turns out useful to catch old ioctl numbers in header
  * files for us.
diff -urN linux-2.4.10-pre6/include/asm-mips64/ioctls.h linux/include/asm-mips64/ioctls.h
--- linux-2.4.10-pre6/include/asm-mips64/ioctls.h	Wed Jul  4 14:15:24 2001
+++ linux/include/asm-mips64/ioctls.h	Mon Dec  3 23:08:47 2001
@@ -1,20 +1,16 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995, 1996, 1999 by Ralf Baechle
+ * Copyright (C) 1995, 1996, 2001 Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
-#ifndef _ASM_IOCTLS_H
-#define _ASM_IOCTLS_H
+#ifndef __ASM_IOCTLS_H
+#define __ASM_IOCTLS_H
 
 #include <asm/ioctl.h>
 
-#if defined(__USE_MISC) || defined (__KERNEL__)
-#define tIOC		('t' << 8)
-#endif
-
 #define TCGETA		0x5401
 #define TCSETA		0x5402
 #define TCSETAW		0x5403
@@ -38,31 +34,28 @@
 #define TIOCMBIC	0x741c		/* bic modem bits */
 #define TIOCMSET	0x741a		/* set all modem bits */
 #define TIOCPKT		0x5470		/* pty: set/clear packet mode */
-#define		TIOCPKT_DATA		0x00	/* data packet */
-#define		TIOCPKT_FLUSHREAD	0x01	/* flush packet */
-#define		TIOCPKT_FLUSHWRITE	0x02	/* flush packet */
-#define		TIOCPKT_STOP		0x04	/* stop output */
-#define		TIOCPKT_START		0x08	/* start output */
-#define		TIOCPKT_NOSTOP		0x10	/* no more ^S, ^Q */
-#define		TIOCPKT_DOSTOP		0x20	/* now do ^S ^Q */
-#if 0
-#define		TIOCPKT_IOCTL		0x40	/* state change of pty driver */
-#endif
+#define	 TIOCPKT_DATA		0x00	/* data packet */
+#define	 TIOCPKT_FLUSHREAD	0x01	/* flush packet */
+#define	 TIOCPKT_FLUSHWRITE	0x02	/* flush packet */
+#define	 TIOCPKT_STOP		0x04	/* stop output */
+#define	 TIOCPKT_START		0x08	/* start output */
+#define	 TIOCPKT_NOSTOP		0x10	/* no more ^S, ^Q */
+#define	 TIOCPKT_DOSTOP		0x20	/* now do ^S ^Q */
+/* #define  TIOCPKT_IOCTL		0x40	state change of pty driver */
 #define TIOCSWINSZ	_IOW('t', 103, struct winsize)	/* set window size */
 #define TIOCGWINSZ	_IOR('t', 104, struct winsize)	/* get window size */
 #define TIOCNOTTY	0x5471		/* void tty association */
-#define TIOCSETD	(tIOC | 1)
-#define TIOCGETD	(tIOC | 0)
+#define TIOCSETD	0x7401
+#define TIOCGETD	0x7400
 
 #define FIOCLEX		0x6601
 #define FIONCLEX	0x6602		/* these numbers need to be adjusted. */
 #define FIOASYNC	0x667d
 #define FIONBIO		0x667e
+#define FIOQSIZE	0x667f
 
-#if defined(__USE_MISC) || defined (__KERNEL__)
-#define TIOCGLTC	(tIOC | 116)		/* get special local chars */
-#define TIOCSLTC	(tIOC | 117)		/* set special local chars */
-#endif
+#define TIOCGLTC	0x7474			/* get special local chars */
+#define TIOCSLTC	0x7475			/* set special local chars */
 #define TIOCSPGRP	_IOW('t', 118, int)	/* set pgrp of tty */
 #define TIOCGPGRP	_IOR('t', 119, int)	/* get pgrp of tty */
 #define TIOCCONS	_IOW('t', 120, int)	/* become virtual console */
@@ -70,20 +63,16 @@
 #define FIONREAD	0x467f
 #define TIOCINQ		FIONREAD
 
-#if defined(__USE_MISC) || defined (__KERNEL__)
-#define TIOCGETP        (tIOC | 8)
-#define TIOCSETP        (tIOC | 9)
-#define TIOCSETN        (tIOC | 10)		/* TIOCSETP wo flush */
-#endif
+#define TIOCGETP        0x7408
+#define TIOCSETP        0x7409
+#define TIOCSETN        0x740a			/* TIOCSETP wo flush */
  
-#if 0
-#define	TIOCSETA	_IOW('t', 20, struct termios) /* set termios struct */
-#define	TIOCSETAW	_IOW('t', 21, struct termios) /* drain output, set */
-#define	TIOCSETAF	_IOW('t', 22, struct termios) /* drn out, fls in, set */
-#define	TIOCGETD	_IOR('t', 26, int)	/* get line discipline */
-#define	TIOCSETD	_IOW('t', 27, int)	/* set line discipline */
+/* #define TIOCSETA	_IOW('t', 20, struct termios) set termios struct */
+/* #define TIOCSETAW	_IOW('t', 21, struct termios) drain output, set */
+/* #define TIOCSETAF	_IOW('t', 22, struct termios) drn out, fls in, set */
+/* #define TIOCGETD	_IOR('t', 26, int)	get line discipline */
+/* #define TIOCSETD	_IOW('t', 27, int)	set line discipline */
 						/* 127-124 compat */
-#endif
 
 /* I hope the range from 0x5480 on is free ... */
 #define TIOCSCTTY	0x5480		/* become controlling tty */
@@ -115,4 +104,4 @@
 #define TIOCGHAYESESP	0x5493 /* Get Hayes ESP configuration */
 #define TIOCSHAYESESP	0x5494 /* Set Hayes ESP configuration */
 
-#endif /* _ASM_IOCTLS_H */
+#endif /* __ASM_IOCTLS_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/keyboard.h linux/include/asm-mips64/keyboard.h
--- linux-2.4.10-pre6/include/asm-mips64/keyboard.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips64/keyboard.h	Mon Dec  3 23:08:47 2001
@@ -1,10 +1,10 @@
-/* $Id: keyboard.h,v 1.1 1999/08/19 22:56:34 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1994 - 1999 Ralf Baechle
+ * Copyright (C) 1994 - 1999, 2001 Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #ifndef _ASM_KEYBOARD_H
 #define _ASM_KEYBOARD_H
@@ -13,6 +13,7 @@
 
 #include <linux/delay.h>
 #include <linux/ioport.h>
+#include <linux/kd.h>
 #include <asm/bootinfo.h>
 
 #define DISABLE_KBD_DURING_INTERRUPTS 0
@@ -23,6 +24,7 @@
 			   char raw_mode);
 extern char pckbd_unexpected_up(unsigned char keycode);
 extern void pckbd_leds(unsigned char leds);
+extern int pckbd_rate(struct kbd_repeat *rep);
 extern void pckbd_init_hw(void);
 extern unsigned char pckbd_sysrq_xlate[128];
 
@@ -31,6 +33,7 @@
 #define kbd_translate		pckbd_translate
 #define kbd_unexpected_up	pckbd_unexpected_up
 #define kbd_leds		pckbd_leds
+#define kbd_rate		pckbd_rate
 #define kbd_init_hw		pckbd_init_hw
 #define kbd_sysrq_xlate         pckbd_sysrq_xlate
 
diff -urN linux-2.4.10-pre6/include/asm-mips64/linux_logo.h linux/include/asm-mips64/linux_logo.h
--- linux-2.4.10-pre6/include/asm-mips64/linux_logo.h	Mon Jun 11 19:15:27 2001
+++ linux/include/asm-mips64/linux_logo.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * include/asm-mips/linux_logo.h: This is a linux logo
  *                                to be displayed on boot.
  *
diff -urN linux-2.4.10-pre6/include/asm-mips64/mc146818rtc.h linux/include/asm-mips64/mc146818rtc.h
--- linux-2.4.10-pre6/include/asm-mips64/mc146818rtc.h	Thu Jul 27 18:36:54 2000
+++ linux/include/asm-mips64/mc146818rtc.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/atlas.h linux/include/asm-mips64/mips-boards/atlas.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/atlas.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/atlas.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,62 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines of the Atlas board specific address-MAP, registers, etc.
+ *
+ */
+#ifndef _MIPS_ATLAS_H
+#define _MIPS_ATLAS_H
+
+#include <asm/addrspace.h>
+
+/* 
+ * Atlas RTC-device indirect register access.
+ */
+#define ATLAS_RTC_ADR_REG       (KSEG1ADDR(0x1f000800))
+#define ATLAS_RTC_DAT_REG       (KSEG1ADDR(0x1f000808))
+
+
+/*
+ * Atlas interrupt controller register base.
+ */
+#define ATLAS_ICTRL_REGS_BASE   (KSEG1ADDR(0x1f000000))
+
+/*
+ * Atlas UART register base.
+ */
+#define ATLAS_UART_REGS_BASE    (0x1f000900)
+#define ATLAS_BASE_BAUD ( 3686400 / 16 ) 
+
+/*
+ * Atlas PSU standby register.
+ */
+#define ATLAS_PSUSTBY_REG       (KSEG1ADDR(0x1f000600))
+#define ATLAS_GOSTBY            0x4d
+
+/*
+ * We make a universal assumption about the way the bootloader (YAMON)
+ * have located the Philips SAA9730 chip.
+ * This is not ideal, but is needed for setting up remote debugging as 
+ * soon as possible.
+ */
+#define ATLAS_SAA9730_REG  (KSEG1ADDR(0x08800000))
+
+#endif /* !(_MIPS_ATLAS_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/atlasint.h linux/include/asm-mips64/mips-boards/atlasint.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/atlasint.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/atlasint.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,51 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines for the Atlas interrupt controller.
+ *
+ */
+#ifndef _MIPS_ATLASINT_H
+#define _MIPS_ATLASINT_H
+
+/* Number of IRQ supported on hw interrupt 0. */
+#define ATLASINT_UART      0
+#define ATLASINT_END      32
+
+/* 
+ * Atlas registers are memory mapped on 64-bit aligned boundaries and 
+ * only word access are allowed.
+ */
+struct atlas_ictrl_regs {
+        volatile unsigned long intraw;
+        long dummy1;
+        volatile unsigned long intseten;
+        long dummy2;
+        volatile unsigned long intrsten;
+        long dummy3;
+        volatile unsigned long intenable;
+        long dummy4;
+        volatile unsigned long intstatus;
+        long dummy5;
+};
+
+extern void atlasint_init(void);
+
+#endif /* !(_MIPS_ATLASINT_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/generic.h linux/include/asm-mips64/mips-boards/generic.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/generic.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/generic.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,70 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines of the MIPS boards specific address-MAP, registers, etc.
+ *
+ */
+#ifndef _MIPS_GENERIC_H
+#define _MIPS_GENERIC_H
+
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+
+/*
+ * Display register base.
+ */
+#define ASCII_DISPLAY_WORD_BASE    (KSEG1ADDR(0x1f000410))
+#define ASCII_DISPLAY_POS_BASE     (KSEG1ADDR(0x1f000418))
+
+
+/*
+ * Yamon Prom print address.
+ */
+#define YAMON_PROM_PRINT_ADDR      (KSEG1ADDR(0x1fc00504))
+
+
+/*
+ * Reset register.
+ */
+#define SOFTRES_REG       (KSEG1ADDR(0x1f000500))
+#define GORESET           0x42
+
+
+/*
+ * Galileo GT64120 system controller register base.
+ */
+#define MIPS_GT_BASE    (KSEG1ADDR(0x1be00000))
+
+/*
+ * Because of the way the internal register works on the Galileo chip,
+ * we need to swap the bytes when running bigendian.
+ */
+#define GT_WRITE(ofs, data)  \
+             *(volatile u32 *)(MIPS_GT_BASE+ofs) = cpu_to_le32(data)
+#define GT_READ(ofs, data)   \
+             data = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+ofs))
+
+#define GT_PCI_WRITE(ofs, data)  \
+	*(volatile u32 *)(MIPS_GT_BASE+ofs) = data
+#define GT_PCI_READ(ofs, data)   \
+	data = *(volatile u32 *)(MIPS_GT_BASE+ofs)
+
+#endif  /* !(_MIPS_GENERIC_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/gt64120.h linux/include/asm-mips64/mips-boards/gt64120.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/gt64120.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/gt64120.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,337 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Register definitions for Galileo 64120 system controller.
+ *
+ */
+#ifndef GT64120_H
+#define GT64120_H
+
+#define MSK(n)                    ((1 << (n)) - 1)
+
+/************************************************************************
+ *  Register offset addresses
+ ************************************************************************/
+
+#define GT_CPU_OFS		    0x000
+
+#define GT_CPU_OFS                  0x000
+#define GT_SCS10LD_OFS		    0x008
+#define GT_SCS10HD_OFS		    0x010
+#define GT_SCS32LD_OFS		    0x018
+#define GT_SCS32HD_OFS		    0x020
+#define GT_CS20LD_OFS		    0x028
+#define GT_CS20HD_OFS		    0x030
+#define GT_CS3BOOTLD_OFS	    0x038
+#define GT_CS3BOOTHD_OFS	    0x040
+#define GT_PCI0IOLD_OFS		    0x048
+#define GT_PCI0IOHD_OFS		    0x050
+#define GT_PCI0M0LD_OFS		    0x058
+#define GT_PCI0M0HD_OFS		    0x060
+#define GT_ISD_OFS		    0x068
+#define GT_PCI0M1LD_OFS		    0x080
+#define GT_PCI0M1HD_OFS		    0x088
+#define GT_PCI1IOLD_OFS		    0x090
+#define GT_PCI1IOHD_OFS		    0x098
+#define GT_PCI1M0LD_OFS		    0x0a0
+#define GT_PCI1M0HD_OFS		    0x0a8
+#define GT_PCI1M1LD_OFS		    0x0b0
+#define GT_PCI1M1HD_OFS		    0x0b8
+
+#define GT_SCS0LD_OFS		    0x400	
+#define GT_SCS0HD_OFS		    0x404
+#define GT_SCS1LD_OFS		    0x408
+#define GT_SCS1HD_OFS		    0x40c
+#define GT_SCS2LD_OFS		    0x410
+#define GT_SCS2HD_OFS		    0x414
+#define GT_SCS3LD_OFS		    0x418
+#define GT_SCS3HD_OFS		    0x41c
+#define GT_CS0LD_OFS		    0x420
+#define GT_CS0HD_OFS		    0x424
+#define GT_CS1LD_OFS		    0x428
+#define GT_CS1HD_OFS		    0x42c
+#define GT_CS2LD_OFS		    0x430
+#define GT_CS2HD_OFS		    0x434
+#define GT_CS3LD_OFS		    0x438
+#define GT_CS3HD_OFS		    0x43c
+#define GT_BOOTLD_OFS		    0x440
+#define GT_BOOTHD_OFS		    0x444
+
+#define GT_SDRAM_B0_OFS	    	    0x44c
+#define GT_SDRAM_CFG_OFS	    0x448
+#define GT_SDRAM_B2_OFS		    0x454
+#define GT_SDRAM_OPMODE_OFS	    0x474
+#define GT_SDRAM_BM_OFS		    0x478
+#define GT_SDRAM_ADDRDECODE_OFS     0x47c
+
+#define GT_PCI0_CMD_OFS             0xc00
+#define GT_PCI0_TOR_OFS	            0xc04
+#define GT_PCI0_BS_SCS10_OFS	    0xc08
+#define GT_PCI0_BS_SCS32_OFS	    0xc0c
+#define GT_INTRCAUSE_OFS	    0xc18
+#define GT_PCI0_IACK_OFS            0xc34
+#define GT_PCI0_BARE_OFS	    0xc3c
+#define GT_PCI0_CFGADDR_OFS	    0xcf8
+#define GT_PCI0_CFGDATA_OFS	    0xcfc
+
+
+
+
+/************************************************************************
+ *  Register encodings
+ ************************************************************************/
+
+#define GT_CPU_ENDIAN_SHF       12
+#define GT_CPU_ENDIAN_MSK       (MSK(1) << GT_CPU_ENDIAN_SHF)
+#define GT_CPU_ENDIAN_BIT       GT_CPU_ENDIAN_MSK
+#define GT_CPU_WR_SHF		16
+#define GT_CPU_WR_MSK		(MSK(1) << GT_CPU_WR_SHF)
+#define GT_CPU_WR_BIT		GT_CPU_WR_MSK
+#define GT_CPU_WR_DXDXDXDX	0
+#define GT_CPU_WR_DDDD		1
+
+
+#define GT_CFGADDR_CFGEN_SHF	31
+#define GT_CFGADDR_CFGEN_MSK	(MSK(1) << GT_CFGADDR_CFGEN_SHF)
+#define GT_CFGADDR_CFGEN_BIT	GT_CFGADDR_CFGEN_MSK
+
+#define GT_CFGADDR_BUSNUM_SHF   16
+#define GT_CFGADDR_BUSNUM_MSK	(MSK(8) << GT_CFGADDR_BUSNUM_SHF)
+
+#define GT_CFGADDR_DEVNUM_SHF	11
+#define GT_CFGADDR_DEVNUM_MSK	(MSK(5) << GT_CFGADDR_DEVNUM_SHF)
+
+#define GT_CFGADDR_FUNCNUM_SHF	8
+#define GT_CFGADDR_FUNCNUM_MSK	(MSK(3) << GT_CFGADDR_FUNCNUM_SHF)
+
+#define GT_CFGADDR_REGNUM_SHF	2
+#define GT_CFGADDR_REGNUM_MSK	(MSK(6) << GT_CFGADDR_REGNUM_SHF)
+
+
+#define GT_SDRAM_BM_ORDER_SHF	2
+#define GT_SDRAM_BM_ORDER_MSK	(MSK(1) << GT_SDRAM_BM_ORDER_SHF)
+#define GT_SDRAM_BM_ORDER_BIT	GT_SDRAM_BM_ORDER_MSK
+#define GT_SDRAM_BM_ORDER_SUB	1
+#define GT_SDRAM_BM_ORDER_LIN	0
+
+#define GT_SDRAM_BM_RSVD_ALL1	0xFFB
+
+
+#define GT_SDRAM_ADDRDECODE_ADDR_SHF	0
+#define GT_SDRAM_ADDRDECODE_ADDR_MSK	(MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF)
+#define GT_SDRAM_ADDRDECODE_ADDR_0	0
+#define GT_SDRAM_ADDRDECODE_ADDR_1	1
+#define GT_SDRAM_ADDRDECODE_ADDR_2	2
+#define GT_SDRAM_ADDRDECODE_ADDR_3	3
+#define GT_SDRAM_ADDRDECODE_ADDR_4	4
+#define GT_SDRAM_ADDRDECODE_ADDR_5	5
+#define GT_SDRAM_ADDRDECODE_ADDR_6	6
+#define GT_SDRAM_ADDRDECODE_ADDR_7	7
+
+
+#define GT_SDRAM_B0_CASLAT_SHF		0
+#define GT_SDRAM_B0_CASLAT_MSK		(MSK(2) << GT_SDRAM_B0__SHF)
+#define GT_SDRAM_B0_CASLAT_2		1
+#define GT_SDRAM_B0_CASLAT_3		2
+
+#define GT_SDRAM_B0_FTDIS_SHF		2
+#define GT_SDRAM_B0_FTDIS_MSK		(MSK(1) << GT_SDRAM_B0_FTDIS_SHF)
+#define GT_SDRAM_B0_FTDIS_BIT		GT_SDRAM_B0_FTDIS_MSK
+
+#define GT_SDRAM_B0_SRASPRCHG_SHF	3
+#define GT_SDRAM_B0_SRASPRCHG_MSK	(MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF)
+#define GT_SDRAM_B0_SRASPRCHG_BIT	GT_SDRAM_B0_SRASPRCHG_MSK
+#define GT_SDRAM_B0_SRASPRCHG_2		0
+#define GT_SDRAM_B0_SRASPRCHG_3		1
+
+#define GT_SDRAM_B0_B0COMPAB_SHF	4
+#define GT_SDRAM_B0_B0COMPAB_MSK	(MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF)
+#define GT_SDRAM_B0_B0COMPAB_BIT	GT_SDRAM_B0_B0COMPAB_MSK
+
+#define GT_SDRAM_B0_64BITINT_SHF	5
+#define GT_SDRAM_B0_64BITINT_MSK	(MSK(1) << GT_SDRAM_B0_64BITINT_SHF)
+#define GT_SDRAM_B0_64BITINT_BIT	GT_SDRAM_B0_64BITINT_MSK
+#define GT_SDRAM_B0_64BITINT_2		0
+#define GT_SDRAM_B0_64BITINT_4		1
+
+#define GT_SDRAM_B0_BW_SHF		6
+#define GT_SDRAM_B0_BW_MSK		(MSK(1) << GT_SDRAM_B0_BW_SHF)
+#define GT_SDRAM_B0_BW_BIT		GT_SDRAM_B0_BW_MSK
+#define GT_SDRAM_B0_BW_32		0
+#define GT_SDRAM_B0_BW_64		1
+
+#define GT_SDRAM_B0_BLODD_SHF		7
+#define GT_SDRAM_B0_BLODD_MSK		(MSK(1) << GT_SDRAM_B0_BLODD_SHF)
+#define GT_SDRAM_B0_BLODD_BIT		GT_SDRAM_B0_BLODD_MSK
+
+#define GT_SDRAM_B0_PAR_SHF		8
+#define GT_SDRAM_B0_PAR_MSK		(MSK(1) << GT_SDRAM_B0_PAR_SHF)
+#define GT_SDRAM_B0_PAR_BIT		GT_SDRAM_B0_PAR_MSK
+
+#define GT_SDRAM_B0_BYPASS_SHF		9
+#define GT_SDRAM_B0_BYPASS_MSK		(MSK(1) << GT_SDRAM_B0_BYPASS_SHF)
+#define GT_SDRAM_B0_BYPASS_BIT		GT_SDRAM_B0_BYPASS_MSK
+
+#define GT_SDRAM_B0_SRAS2SCAS_SHF	10
+#define GT_SDRAM_B0_SRAS2SCAS_MSK	(MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF)
+#define GT_SDRAM_B0_SRAS2SCAS_BIT	GT_SDRAM_B0_SRAS2SCAS_MSK
+#define GT_SDRAM_B0_SRAS2SCAS_2		0
+#define GT_SDRAM_B0_SRAS2SCAS_3		1
+
+#define GT_SDRAM_B0_SIZE_SHF		11
+#define GT_SDRAM_B0_SIZE_MSK		(MSK(1) << GT_SDRAM_B0_SIZE_SHF)
+#define GT_SDRAM_B0_SIZE_BIT		GT_SDRAM_B0_SIZE_MSK
+#define GT_SDRAM_B0_SIZE_16M		0
+#define GT_SDRAM_B0_SIZE_64M		1
+
+#define GT_SDRAM_B0_EXTPAR_SHF		12
+#define GT_SDRAM_B0_EXTPAR_MSK		(MSK(1) << GT_SDRAM_B0_EXTPAR_SHF)
+#define GT_SDRAM_B0_EXTPAR_BIT		GT_SDRAM_B0_EXTPAR_MSK
+
+#define GT_SDRAM_B0_BLEN_SHF		13
+#define GT_SDRAM_B0_BLEN_MSK		(MSK(1) << GT_SDRAM_B0_BLEN_SHF)
+#define GT_SDRAM_B0_BLEN_BIT		GT_SDRAM_B0_BLEN_MSK
+#define GT_SDRAM_B0_BLEN_8		0
+#define GT_SDRAM_B0_BLEN_4		1
+
+
+#define GT_SDRAM_CFG_REFINT_SHF		0
+#define GT_SDRAM_CFG_REFINT_MSK		(MSK(14) << GT_SDRAM_CFG_REFINT_SHF)
+
+#define GT_SDRAM_CFG_NINTERLEAVE_SHF	14
+#define GT_SDRAM_CFG_NINTERLEAVE_MSK    (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF)
+#define GT_SDRAM_CFG_NINTERLEAVE_BIT	GT_SDRAM_CFG_NINTERLEAVE_MSK
+
+#define GT_SDRAM_CFG_RMW_SHF		15
+#define GT_SDRAM_CFG_RMW_MSK		(MSK(1) << GT_SDRAM_CFG_RMW_SHF)
+#define GT_SDRAM_CFG_RMW_BIT		GT_SDRAM_CFG_RMW_MSK
+
+#define GT_SDRAM_CFG_NONSTAGREF_SHF	16
+#define GT_SDRAM_CFG_NONSTAGREF_MSK	(MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF)
+#define GT_SDRAM_CFG_NONSTAGREF_BIT	GT_SDRAM_CFG_NONSTAGREF_MSK
+
+#define GT_SDRAM_CFG_DUPCNTL_SHF	19
+#define GT_SDRAM_CFG_DUPCNTL_MSK	(MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF)
+#define GT_SDRAM_CFG_DUPCNTL_BIT	GT_SDRAM_CFG_DUPCNTL_MSK
+
+#define GT_SDRAM_CFG_DUPBA_SHF		20
+#define GT_SDRAM_CFG_DUPBA_MSK		(MSK(1) << GT_SDRAM_CFG_DUPBA_SHF)
+#define GT_SDRAM_CFG_DUPBA_BIT		GT_SDRAM_CFG_DUPBA_MSK
+
+#define GT_SDRAM_CFG_DUPEOT0_SHF	21
+#define GT_SDRAM_CFG_DUPEOT0_MSK	(MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF)
+#define GT_SDRAM_CFG_DUPEOT0_BIT	GT_SDRAM_CFG_DUPEOT0_MSK
+
+#define GT_SDRAM_CFG_DUPEOT1_SHF	22
+#define GT_SDRAM_CFG_DUPEOT1_MSK	(MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF)
+#define GT_SDRAM_CFG_DUPEOT1_BIT	GT_SDRAM_CFG_DUPEOT1_MSK
+
+#define GT_SDRAM_OPMODE_OP_SHF		0
+#define GT_SDRAM_OPMODE_OP_MSK		(MSK(3) << GT_SDRAM_OPMODE_OP_SHF)
+#define GT_SDRAM_OPMODE_OP_NORMAL	0
+#define GT_SDRAM_OPMODE_OP_NOP		1
+#define GT_SDRAM_OPMODE_OP_PRCHG	2
+#define GT_SDRAM_OPMODE_OP_MODE		3
+#define GT_SDRAM_OPMODE_OP_CBR		4
+
+
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF	0
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
+#define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT	GT_PCI0_BARE_SWSCS3BOOTDIS_MSK
+
+#define GT_PCI0_BARE_SWSCS32DIS_SHF	1
+#define GT_PCI0_BARE_SWSCS32DIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF)
+#define GT_PCI0_BARE_SWSCS32DIS_BIT	GT_PCI0_BARE_SWSCS32DIS_MSK
+	
+#define GT_PCI0_BARE_SWSCS10DIS_SHF	2
+#define GT_PCI0_BARE_SWSCS10DIS_MSK	(MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF)
+#define GT_PCI0_BARE_SWSCS10DIS_BIT	GT_PCI0_BARE_SWSCS10DIS_MSK
+
+#define GT_PCI0_BARE_INTIODIS_SHF	3
+#define GT_PCI0_BARE_INTIODIS_MSK	(MSK(1) << GT_PCI0_BARE_INTIODIS_SHF)
+#define GT_PCI0_BARE_INTIODIS_BIT	GT_PCI0_BARE_INTIODIS_MSK
+
+#define GT_PCI0_BARE_INTMEMDIS_SHF	4
+#define GT_PCI0_BARE_INTMEMDIS_MSK	(MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF)
+#define GT_PCI0_BARE_INTMEMDIS_BIT	GT_PCI0_BARE_INTMEMDIS_MSK
+
+#define GT_PCI0_BARE_CS3BOOTDIS_SHF	5
+#define GT_PCI0_BARE_CS3BOOTDIS_MSK	(MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF)
+#define GT_PCI0_BARE_CS3BOOTDIS_BIT	GT_PCI0_BARE_CS3BOOTDIS_MSK
+
+#define GT_PCI0_BARE_CS20DIS_SHF	6
+#define GT_PCI0_BARE_CS20DIS_MSK	(MSK(1) << GT_PCI0_BARE_CS20DIS_SHF)
+#define GT_PCI0_BARE_CS20DIS_BIT	GT_PCI0_BARE_CS20DIS_MSK
+
+#define GT_PCI0_BARE_SCS32DIS_SHF	7
+#define GT_PCI0_BARE_SCS32DIS_MSK	(MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF)
+#define GT_PCI0_BARE_SCS32DIS_BIT	GT_PCI0_BARE_SCS32DIS_MSK
+
+#define GT_PCI0_BARE_SCS10DIS_SHF	8
+#define GT_PCI0_BARE_SCS10DIS_MSK	(MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF)
+#define GT_PCI0_BARE_SCS10DIS_BIT	GT_PCI0_BARE_SCS10DIS_MSK
+
+
+#define GT_INTRCAUSE_MASABORT0_SHF	18
+#define GT_INTRCAUSE_MASABORT0_MSK	(MSK(1) << GT_INTRCAUSE_MASABORT0_SHF)
+#define GT_INTRCAUSE_MASABORT0_BIT	GT_INTRCAUSE_MASABORT0_MSK
+
+#define GT_INTRCAUSE_TARABORT0_SHF	19
+#define GT_INTRCAUSE_TARABORT0_MSK	(MSK(1) << GT_INTRCAUSE_TARABORT0_SHF)
+#define GT_INTRCAUSE_TARABORT0_BIT	GT_INTRCAUSE_TARABORT0_MSK
+
+
+#define GT_PCI0_CFGADDR_REGNUM_SHF	2
+#define GT_PCI0_CFGADDR_REGNUM_MSK	(MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
+#define GT_PCI0_CFGADDR_FUNCTNUM_SHF	8
+#define GT_PCI0_CFGADDR_FUNCTNUM_MSK    (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
+#define GT_PCI0_CFGADDR_DEVNUM_SHF	11
+#define GT_PCI0_CFGADDR_DEVNUM_MSK	(MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
+#define GT_PCI0_CFGADDR_BUSNUM_SHF	16
+#define GT_PCI0_CFGADDR_BUSNUM_MSK	(MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
+#define GT_PCI0_CFGADDR_CONFIGEN_SHF	31
+#define GT_PCI0_CFGADDR_CONFIGEN_MSK	(MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
+#define GT_PCI0_CFGADDR_CONFIGEN_BIT	GT_PCI0_CFGADDR_CONFIGEN_MSK
+
+#define GT_PCI0_CMD_MBYTESWAP_SHF       0
+#define GT_PCI0_CMD_MBYTESWAP_MSK       (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
+#define GT_PCI0_CMD_MBYTESWAP_BIT       GT_PCI0_CMD_MBYTESWAP_MSK
+#define GT_PCI0_CMD_MWORDSWAP_SHF       10
+#define GT_PCI0_CMD_MWORDSWAP_MSK       (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF)
+#define GT_PCI0_CMD_MWORDSWAP_BIT       GT_PCI0_CMD_MWORDSWAP_MSK
+#define GT_PCI0_CMD_SBYTESWAP_SHF       16
+#define GT_PCI0_CMD_SBYTESWAP_MSK       (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF)
+#define GT_PCI0_CMD_SBYTESWAP_BIT       GT_PCI0_CMD_SBYTESWAP_MSK
+#define GT_PCI0_CMD_SWORDSWAP_SHF       11
+#define GT_PCI0_CMD_SWORDSWAP_MSK       (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF)
+#define GT_PCI0_CMD_SWORDSWAP_BIT       GT_PCI0_CMD_SWORDSWAP_MSK
+
+
+/************************************************************************
+ *  Misc
+ ************************************************************************/
+
+#define GT_DEF_BASE		0x14000000
+#define GT_DEF_PCI0_MEM0_BASE	0x12000000
+#define GT_MAX_BANKSIZE		(256 * 1024 * 1024)   /* Max 256MB bank */
+#define GT_LATTIM_MIN    	6		      /* Minimum lat	*/
+
+#endif /* #ifndef GT64120_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/io.h linux/include/asm-mips64/mips-boards/io.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/io.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/io.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,34 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines of the MIPS boards specific IO address-MAP.
+ *
+ */
+#ifndef _ASM_MIPS_BOARDS_IO_H
+#define _ASM_MIPS_BOARDS_IO_H
+
+#include <asm/addrspace.h>
+
+#define IO_SPACE_BASE K1BASE
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+#endif /* _ASM_MIPS_BOARDS_IO_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/malta.h linux/include/asm-mips64/mips-boards/malta.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/malta.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/malta.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,59 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines of the Malta board specific address-MAP, registers, etc.
+ *
+ */
+#ifndef _MIPS_MALTA_H
+#define _MIPS_MALTA_H
+
+#include <asm/addrspace.h>
+#include <asm/io.h>
+
+/* 
+ * Malta I/O ports base address. 
+*/
+#define MALTA_PORT_BASE      (KSEG1ADDR(0x18000000))
+
+/* 
+ * Malta RTC-device indirect register access.
+ */
+#define MALTA_RTC_ADR_REG       0x70
+#define MALTA_RTC_DAT_REG       0x71
+
+/*
+ * Malta SMSC FDC37M817 Super I/O Controller register.
+ */
+#define SMSC_CONFIG_REG		0x3f0
+#define SMSC_DATA_REG		0x3f1
+
+#define SMSC_CONFIG_DEVNUM	0x7
+#define SMSC_CONFIG_ACTIVATE	0x30
+#define SMSC_CONFIG_ENTER	0x55
+#define SMSC_CONFIG_EXIT	0xaa
+
+#define SMSC_CONFIG_DEVNUM_FLOPPY     0
+
+#define SMSC_CONFIG_ACTIVATE_ENABLE   1
+
+#define SMSC_WRITE(x,a)     outb(x,a)
+
+#endif /* !(_MIPS_MALTA_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/maltaint.h linux/include/asm-mips64/mips-boards/maltaint.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/maltaint.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/maltaint.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,33 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Defines for the Malta interrupt controller.
+ *
+ */
+#ifndef _MIPS_MALTAINT_H
+#define _MIPS_MALTAINT_H
+
+/* Number of IRQ supported on hw interrupt 0. */
+#define MALTAINT_END      16
+
+extern void maltaint_init(void);
+
+#endif /* !(_MIPS_MALTAINT_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/piix4.h linux/include/asm-mips64/mips-boards/piix4.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/piix4.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/piix4.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,86 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Register definitions for Intel PIIX4 South Bridge Device.
+ *
+ */
+
+#ifndef PIIX4_H
+#define PIIX4_H
+
+/************************************************************************
+ *  IO register offsets
+ ************************************************************************/
+#define PIIX4_ICTLR1_ICW1	0x20
+#define PIIX4_ICTLR1_ICW2	0x21
+#define PIIX4_ICTLR1_ICW3	0x21
+#define PIIX4_ICTLR1_ICW4	0x21
+#define PIIX4_ICTLR2_ICW1	0xa0
+#define PIIX4_ICTLR2_ICW2	0xa1
+#define PIIX4_ICTLR2_ICW3	0xa1
+#define PIIX4_ICTLR2_ICW4	0xa1
+#define PIIX4_ICTLR1_OCW1	0x21
+#define PIIX4_ICTLR1_OCW2	0x20
+#define PIIX4_ICTLR1_OCW3	0x20
+#define PIIX4_ICTLR1_OCW4	0x20
+#define PIIX4_ICTLR2_OCW1	0xa1
+#define PIIX4_ICTLR2_OCW2	0xa0
+#define PIIX4_ICTLR2_OCW3	0xa0
+#define PIIX4_ICTLR2_OCW4	0xa0
+
+
+/************************************************************************
+ *  Register encodings.
+ ************************************************************************/
+#define PIIX4_OCW2_NSEOI	(0x1 << 5)
+#define PIIX4_OCW2_SEOI		(0x3 << 5)
+#define PIIX4_OCW2_RNSEOI	(0x5 << 5)
+#define PIIX4_OCW2_RAEOIS	(0x4 << 5)
+#define PIIX4_OCW2_RAEOIC	(0x0 << 5)
+#define PIIX4_OCW2_RSEOI	(0x7 << 5)
+#define PIIX4_OCW2_SP		(0x6 << 5)
+#define PIIX4_OCW2_NOP		(0x2 << 5)
+
+#define PIIX4_OCW2_SEL          (0x0 << 3)
+
+#define PIIX4_OCW2_ILS_0	0
+#define PIIX4_OCW2_ILS_1	1
+#define PIIX4_OCW2_ILS_2	2
+#define PIIX4_OCW2_ILS_3	3
+#define PIIX4_OCW2_ILS_4	4
+#define PIIX4_OCW2_ILS_5	5
+#define PIIX4_OCW2_ILS_6	6
+#define PIIX4_OCW2_ILS_7	7
+#define PIIX4_OCW2_ILS_8	0
+#define PIIX4_OCW2_ILS_9	1
+#define PIIX4_OCW2_ILS_10	2
+#define PIIX4_OCW2_ILS_11	3
+#define PIIX4_OCW2_ILS_12	4
+#define PIIX4_OCW2_ILS_13	5
+#define PIIX4_OCW2_ILS_14	6
+#define PIIX4_OCW2_ILS_15	7
+
+#define PIIX4_OCW3_SEL          (0x1 << 3)
+
+#define PIIX4_OCW3_IRR          0x2
+#define PIIX4_OCW3_ISR          0x3
+
+#endif /* !(PIIX4_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/prom.h linux/include/asm-mips64/mips-boards/prom.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/prom.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/prom.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,49 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * MIPS boards bootprom interface for the Linux kernel.
+ *
+ */
+
+#ifndef _MIPS_PROM_H
+#define _MIPS_PROM_H
+
+extern char *prom_getcmdline(void);
+extern char *prom_getenv(char *name);
+extern void setup_prom_printf(int tty_no);
+extern void prom_printf(char *fmt, ...);
+extern void prom_init_cmdline(void);
+extern void prom_meminit(void);
+extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem);
+extern void prom_free_prom_memory (void);
+extern void mips_display_message(const char *str);
+extern void mips_display_word(unsigned int num);
+extern int get_ethernet_addr(char *ethernet_addr);
+
+/* Memory descriptor management. */
+#define PROM_MAX_PMEMBLOCKS    32
+struct prom_pmemblock {
+        unsigned int base;  /* Phys addr. */
+        unsigned int size;  /* In bytes. */
+        unsigned int type;  /* free or prom memory */
+};
+
+#endif /* !(_MIPS_PROM_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mips-boards/saa9730_uart.h linux/include/asm-mips64/mips-boards/saa9730_uart.h
--- linux-2.4.10-pre6/include/asm-mips64/mips-boards/saa9730_uart.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/mips-boards/saa9730_uart.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1,69 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Register definitions for the UART part of the Philips SAA9730 chip.
+ *
+ */
+
+#ifndef SAA9730_UART_H
+#define SAA9730_UART_H
+
+/* The SAA9730 UART register map, as seen via the PCI bus */
+
+#define SAA9730_UART_REGS_ADDR	0x21800
+
+struct uart_saa9730_regmap {
+	volatile unsigned char Thr_Rbr;
+	volatile unsigned char Ier;
+	volatile unsigned char Iir_Fcr;
+	volatile unsigned char Lcr;
+	volatile unsigned char Mcr;
+	volatile unsigned char Lsr;
+	volatile unsigned char Msr;
+	volatile unsigned char Scr;
+	volatile unsigned char BaudDivLsb;
+	volatile unsigned char BaudDivMsb;
+	volatile unsigned char Junk0;
+	volatile unsigned char Junk1;
+	volatile unsigned int Config;		/* 0x2180c */
+	volatile unsigned int TxStart;		/* 0x21810 */
+	volatile unsigned int TxLength;		/* 0x21814 */
+	volatile unsigned int TxCounter;	/* 0x21818 */
+	volatile unsigned int RxStart;		/* 0x2181c */
+	volatile unsigned int RxLength;		/* 0x21820 */
+	volatile unsigned int RxCounter;	/* 0x21824 */
+};
+typedef volatile struct uart_saa9730_regmap t_uart_saa9730_regmap;
+
+/*
+ * Only a subset of the UART control bits are defined here,
+ * enough to make the serial debug port work.
+ */
+
+#define SAA9730_LCR_DATA8	0x03
+
+#define SAA9730_MCR_DTR		0x01
+#define SAA9730_MCR_RTS		0x02
+
+#define SAA9730_LSR_DR		0x01
+#define SAA9730_LSR_THRE	0x20
+
+#endif /* !(SAA9730_UART_H) */
diff -urN linux-2.4.10-pre6/include/asm-mips64/mipsregs.h linux/include/asm-mips64/mipsregs.h
--- linux-2.4.10-pre6/include/asm-mips64/mipsregs.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/mipsregs.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: mipsregs.h,v 1.1 1999/08/18 23:37:51 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -34,6 +33,7 @@
 #define CP0_CONTEXT $4
 #define CP0_PAGEMASK $5
 #define CP0_WIRED $6
+#define CP0_INFO $7
 #define CP0_BADVADDR $8
 #define CP0_COUNT $9
 #define CP0_ENTRYHI $10
diff -urN linux-2.4.10-pre6/include/asm-mips64/mman.h linux/include/asm-mips64/mman.h
--- linux-2.4.10-pre6/include/asm-mips64/mman.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/mman.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: mman.h,v 1.3 2000/02/04 23:12:27 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/mmu_context.h linux/include/asm-mips64/mmu_context.h
--- linux-2.4.10-pre6/include/asm-mips64/mmu_context.h	Thu Aug 10 13:30:05 2000
+++ linux/include/asm-mips64/mmu_context.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: mmu_context.h,v 1.4 2000/02/23 00:41:38 ralf Exp $
- *
+/*
  * Switch a MMU context.
  *
  * This file is subject to the terms and conditions of the GNU General Public
diff -urN linux-2.4.10-pre6/include/asm-mips64/module.h linux/include/asm-mips64/module.h
--- linux-2.4.10-pre6/include/asm-mips64/module.h	Tue Nov  7 10:46:04 2000
+++ linux/include/asm-mips64/module.h	Mon Dec  3 23:08:47 2001
@@ -4,8 +4,64 @@
  * This file contains the mips64 architecture specific module code.
  */
 
+#include <linux/module.h>
+#include <asm/uaccess.h>
+
 #define module_map(x)		vmalloc(x)
 #define module_unmap(x)		vfree(x)
-#define module_arch_init(x)	(0)
+#define module_arch_init(x)	mips64_module_init(x)
+#define arch_init_modules(x)	mips64_init_modules(x)
+
+/*
+ * This must match in size and layout the data created by
+ * modutils/obj/obj-mips64.c
+ */
+struct archdata {
+	const struct exception_table_entry *dbe_table_start;
+	const struct exception_table_entry *dbe_table_end;
+};
+
+static inline int
+mips64_module_init(struct module *mod)
+{
+	struct archdata *archdata;
+
+	if (!mod_member_present(mod, archdata_end))
+		return 0;
+
+	archdata = (struct archdata *)(mod->archdata_start);
+	if (!mod_archdata_member_present(mod, struct archdata, dbe_table_end))
+		return 0;
+
+	if (archdata->dbe_table_start > archdata->dbe_table_end ||
+	    (archdata->dbe_table_start &&
+	     !((unsigned long)archdata->dbe_table_start >=
+	       ((unsigned long)mod + mod->size_of_struct) &&
+	       ((unsigned long)archdata->dbe_table_end <
+	        (unsigned long)mod + mod->size))) ||
+            (((unsigned long)archdata->dbe_table_start -
+	      (unsigned long)archdata->dbe_table_end) %
+	     sizeof(struct exception_table_entry))) {
+		printk(KERN_ERR
+			"module_arch_init: archdata->dbe_table_* invalid.\n");
+		return 1;
+	}
+
+	return 0;
+}
+
+static inline void
+mips64_init_modules(struct module *mod)
+{
+	extern const struct exception_table_entry __start___dbe_table[];
+	extern const struct exception_table_entry __stop___dbe_table[];
+	static struct archdata archdata = {
+		dbe_table_start:	__start___dbe_table,
+		dbe_table_end:		__stop___dbe_table,
+	};
+
+	mod->archdata_start = (char *)&archdata;
+	mod->archdata_end = mod->archdata_start + sizeof(archdata);
+}
 
 #endif /* _ASM_MIPS64_MODULE_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/namei.h linux/include/asm-mips64/namei.h
--- linux-2.4.10-pre6/include/asm-mips64/namei.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/namei.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/ng1.h linux/include/asm-mips64/ng1.h
--- linux-2.4.10-pre6/include/asm-mips64/ng1.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/ng1.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/paccess.h linux/include/asm-mips64/paccess.h
--- linux-2.4.10-pre6/include/asm-mips64/paccess.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/paccess.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: paccess.h,v 1.2 2000/01/21 22:34:07 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/parport.h linux/include/asm-mips64/parport.h
--- linux-2.4.10-pre6/include/asm-mips64/parport.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/parport.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * Copyright (C) 1999, 2000  Tim Waugh <tim@cyberelk.demon.co.uk>
  *
  * This file should only be included by drivers/parport/parport_pc.c.
diff -urN linux-2.4.10-pre6/include/asm-mips64/pci/bridge.h linux/include/asm-mips64/pci/bridge.h
--- linux-2.4.10-pre6/include/asm-mips64/pci/bridge.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips64/pci/bridge.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -828,11 +827,11 @@
 
 #define BRIDGE_INTERNAL_ATES	128
 
-/* ========================================================================
- *    Linux pci bus mappings to sn physical id's
+/*
+ * Linux pci bus mappings to sn physical id's
  */
-unsigned char bus_to_wid[256];	/* widget id for linux pci bus */
-unsigned char bus_to_nid[256];	/* nasid for linux pci bus */
-unsigned char num_bridges;	/* number of bridges in the system */
+extern unsigned char bus_to_wid[];	/* widget id for linux pci bus */
+extern unsigned char bus_to_nid[];	/* nasid for linux pci bus */
+extern unsigned char num_bridges;	/* number of bridges in the system */
 
 #endif /* _ASM_PCI_BRIDGE_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/pci.h linux/include/asm-mips64/pci.h
--- linux-2.4.10-pre6/include/asm-mips64/pci.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/pci.h	Mon Dec  3 23:08:47 2001
@@ -6,13 +6,19 @@
 #ifndef _ASM_PCI_H
 #define _ASM_PCI_H
 
+#include <linux/config.h>
+
 #ifdef __KERNEL__
 
 /* Can be used to override the logic in pci_scan_bus for skipping
    already-configured bus numbers - to be used for buggy BIOSes
    or architectures with incomplete PCI setup by the loader */
 
+#ifdef CONFIG_PCI
+extern unsigned int pcibios_assign_all_busses(void);
+#else
 #define pcibios_assign_all_busses()	0
+#endif
 
 #define PCIBIOS_MIN_IO		0x1000
 #define PCIBIOS_MIN_MEM		0x10000000
@@ -64,6 +70,24 @@
 extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
 				void *vaddr, dma_addr_t dma_handle);
 
+
+#ifdef CONFIG_MAPPED_PCI_IO
+
+extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size,
+                                 int direction);
+extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
+                             size_t size, int direction);
+extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents,
+                      int direction);
+extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
+                         int nents, int direction);
+extern void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
+                                size_t size, int direction);
+extern void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
+                            int nelems, int direction);
+
+#else /* CONFIG_MAPPED_PCI_IO  */
+
 /*
  * Map a single buffer of the indicated size for DMA in streaming mode.
  * The 32-bit bus address to use is returned.
@@ -71,7 +95,7 @@
  * Once the device is given the dma address, the device owns this memory
  * until either pci_unmap_single or pci_dma_sync_single is performed.
  */
-extern inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
+static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
 					size_t size, int direction)
 {
 	if (direction == PCI_DMA_NONE)
@@ -80,7 +104,7 @@
 #ifndef CONFIG_COHERENT_IO
 	dma_cache_wback_inv((unsigned long)ptr, size);
 #endif
-	return (bus_to_baddr[hwdev->bus->number] | __pa(ptr));
+	return virt_to_bus(ptr);
 }
 
 /*
@@ -91,7 +115,7 @@
  * After this call, reads by the cpu to the buffer are guarenteed to see
  * whatever the device wrote there.
  */
-extern inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
+static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
 				    size_t size, int direction)
 {
 	if (direction == PCI_DMA_NONE)
@@ -116,7 +140,7 @@
  * Device ownership issues as mentioned above for pci_map_single are
  * the same here.
  */
-extern inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
+static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
 			     int nents, int direction)
 {
 	int i;
@@ -140,7 +164,7 @@
  * Again, cpu read rules concerning calls here are the same as for
  * pci_unmap_single() above.
  */
-extern inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
+static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
 				int nents, int direction)
 {
 	if (direction == PCI_DMA_NONE)
@@ -159,7 +183,7 @@
  * next point you give the PCI dma address back to the card, the
  * device again owns the buffer.
  */
-extern inline void pci_dma_sync_single(struct pci_dev *hwdev,
+static inline void pci_dma_sync_single(struct pci_dev *hwdev,
 				       dma_addr_t dma_handle,
 				       size_t size, int direction)
 {
@@ -177,7 +201,7 @@
  * The same as pci_dma_sync_single but for a scatter-gather list,
  * same rules and usage.
  */
-extern inline void pci_dma_sync_sg(struct pci_dev *hwdev,
+static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
 				   struct scatterlist *sg,
 				   int nelems, int direction)
 {
@@ -194,8 +218,9 @@
 		dma_cache_wback_inv((unsigned long)sg->address, sg->length);
 #endif
 }
+#endif /* CONFIG_MAPPED_PCI_IO  */
 
-extern inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
+static inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
 {
 	/*
 	 * we fall back to GFP_DMA when the mask isn't all 1s,
@@ -208,7 +233,9 @@
 	return 1;
 }
 
-/* Return the index of the PCI controller for device. */
+/*
+ * Return the index of the PCI controller for device.
+ */
 #define pci_controller_num(pdev)	(0)
 
 /*
diff -urN linux-2.4.10-pre6/include/asm-mips64/pgtable.h linux/include/asm-mips64/pgtable.h
--- linux-2.4.10-pre6/include/asm-mips64/pgtable.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/pgtable.h	Mon Dec  3 23:08:47 2001
@@ -461,6 +461,23 @@
 }
 
 /*
+ * Macro to make mark a page protection value as "uncacheable".  Note
+ * that "protection" is really a misnomer here as the protection value
+ * contains the memory attribute bits, dirty bits, and various other
+ * bits as well.
+ */
+#define pgprot_noncached pgprot_noncached
+
+static inline pgprot_t pgprot_noncached(pgprot_t _prot)
+{
+	unsigned long prot = pgprot_val(_prot);
+
+	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
+
+	return __pgprot(prot);
+}
+
+/*
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.
  */
@@ -601,9 +618,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"mtc0 %0, $5\n\t"
+		"mtc0 %z0, $5\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_ENTRYLO0 and CP0_ENTRYLO1 registers */
@@ -623,9 +640,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"dmtc0 %0, $2\n\t"
+		"dmtc0 %z0, $2\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_entrylo1(void)
@@ -644,9 +661,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"dmtc0 %0, $3\n\t"
+		"dmtc0 %z0, $3\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_ENTRYHI register */
@@ -667,9 +684,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"dmtc0 %0, $10\n\t"
+		"dmtc0 %z0, $10\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_INDEX register */
@@ -689,9 +706,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"mtc0 %0, $0\n\t"
+		"mtc0 %z0, $0\n\t"
 		".set reorder\n\t"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_WIRED register */
@@ -711,9 +728,9 @@
 {
 	__asm__ __volatile__(
 		"\n\t.set noreorder\n\t"
-		"mtc0 %0, $6\n\t"
+		"mtc0 %z0, $6\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_info(void)
@@ -746,9 +763,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"mtc0 %0, $28\n\t"
+		"mtc0 %z0, $28\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_taghi(void)
@@ -767,9 +784,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"mtc0 %0, $29\n\t"
+		"mtc0 %z0, $29\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_CONTEXT register */
@@ -790,13 +807,18 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"dmtc0 %0, $4\n\t"
+		"dmtc0 %z0, $4\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 #include <asm-generic/pgtable.h>
 
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
+
+/*
+ * No page table caches to initialise
+ */
+#define pgtable_cache_init()	do { } while (0)
 
 #endif /* _ASM_PGTABLE_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/poll.h linux/include/asm-mips64/poll.h
--- linux-2.4.10-pre6/include/asm-mips64/poll.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/poll.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/r10kcache.h linux/include/asm-mips64/r10kcache.h
--- linux-2.4.10-pre6/include/asm-mips64/r10kcache.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/r10kcache.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: r10kcache.h,v 1.1 2000/01/16 01:27:14 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/r10kcacheops.h linux/include/asm-mips64/r10kcacheops.h
--- linux-2.4.10-pre6/include/asm-mips64/r10kcacheops.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/r10kcacheops.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: r10kcacheops.h,v 1.1 2000/01/12 23:18:32 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/r4kcache.h linux/include/asm-mips64/r4kcache.h
--- linux-2.4.10-pre6/include/asm-mips64/r4kcache.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/r4kcache.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/r4kcacheops.h linux/include/asm-mips64/r4kcacheops.h
--- linux-2.4.10-pre6/include/asm-mips64/r4kcacheops.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/r4kcacheops.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/regdef.h linux/include/asm-mips64/regdef.h
--- linux-2.4.10-pre6/include/asm-mips64/regdef.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/regdef.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/resource.h linux/include/asm-mips64/resource.h
--- linux-2.4.10-pre6/include/asm-mips64/resource.h	Tue Nov 28 21:42:04 2000
+++ linux/include/asm-mips64/resource.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: resource.h,v 1.3 2000/01/27 23:45:30 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/serial.h linux/include/asm-mips64/serial.h
--- linux-2.4.10-pre6/include/asm-mips64/serial.h	Tue Nov 28 21:42:04 2000
+++ linux/include/asm-mips64/serial.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: serial.h,v 1.2 2000/01/17 23:32:47 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sgi/io.h linux/include/asm-mips64/sgi/io.h
--- linux-2.4.10-pre6/include/asm-mips64/sgi/io.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sgi/io.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sgi/sgi.h linux/include/asm-mips64/sgi/sgi.h
--- linux-2.4.10-pre6/include/asm-mips64/sgi/sgi.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sgi/sgi.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: sgi.h,v 1.1 1999/08/20 21:13:37 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sgi/sgihpc.h linux/include/asm-mips64/sgi/sgihpc.h
--- linux-2.4.10-pre6/include/asm-mips64/sgi/sgihpc.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sgi/sgihpc.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: sgihpc.h,v 1.2 1999/10/19 20:51:54 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -333,8 +332,6 @@
 
 /* We need software copies of these because they are write only. */
 extern unsigned int sgi_hpc_write1, sgi_hpc_write2;
-
-#define SGI_KEYBOARD_IRQ 20
 
 struct hpc_keyb {
 #ifdef __MIPSEB__
diff -urN linux-2.4.10-pre6/include/asm-mips64/sgi/sgimc.h linux/include/asm-mips64/sgi/sgimc.h
--- linux-2.4.10-pre6/include/asm-mips64/sgi/sgimc.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sgi/sgimc.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: sgimc.h,v 1.2 1999/10/19 20:51:54 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sgi/sgint23.h linux/include/asm-mips64/sgi/sgint23.h
--- linux-2.4.10-pre6/include/asm-mips64/sgi/sgint23.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/sgi/sgint23.h	Mon Dec  3 23:08:47 2001
@@ -199,7 +199,6 @@
 extern struct sgi_ioc_timers *ioc_timers;
 extern volatile unsigned char *ioc_tclear;
 
-extern void sgint_init(void);
 extern void indy_timer_init(void);
 
 #endif /* _ASM_SGI_SGINT23_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/sgialib.h linux/include/asm-mips64/sgialib.h
--- linux-2.4.10-pre6/include/asm-mips64/sgialib.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/sgialib.h	Mon Dec  3 23:08:47 2001
@@ -13,7 +13,6 @@
 
 #include <asm/sgiarcs.h>
 
-extern PSYSTEM_PARAMETER_BLOCK sgi_pblock;
 extern struct linux_romvec *romvec;
 extern int prom_argc;
 
diff -urN linux-2.4.10-pre6/include/asm-mips64/sgiarcs.h linux/include/asm-mips64/sgiarcs.h
--- linux-2.4.10-pre6/include/asm-mips64/sgiarcs.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/sgiarcs.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: sgiarcs.h,v 1.4 1999/12/04 03:59:12 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sgidefs.h linux/include/asm-mips64/sgidefs.h
--- linux-2.4.10-pre6/include/asm-mips64/sgidefs.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sgidefs.h	Mon Dec  3 23:08:47 2001
@@ -1,25 +1,38 @@
-/* $Id: sgidefs.h,v 1.1 1999/08/18 23:37:52 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1996, 1999 by Ralf Baechle
+ * Copyright (C) 1996, 1999, 2001 Ralf Baechle
  * Copyright (C) 1999 Silicon Graphics, Inc.
- *
- * Definitions commonly used in SGI style code.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
-#ifndef _ASM_SGIDEFS_H
-#define _ASM_SGIDEFS_H
+#ifndef __ASM_SGIDEFS_H
+#define __ASM_SGIDEFS_H
 
 /*
- * Definitions for the ISA level
+ * Using a Linux compiler for building Linux seems logic but not to
+ * everybody.
+ */
+#ifndef __linux__
+#error Use a Linux compiler or give up.
+#endif
+
+/*
+ * Definitions for the ISA levels
+ *
+ * With the introduction of MIPS32 / MIPS64 instruction sets definitions
+ * MIPS ISAs are no longer subsets of each other.  Therefore comparisons
+ * on these symbols except with == may result in unexpected results and
+ * are forbidden!
  */
-#define _MIPS_ISA_MIPS1 1
-#define _MIPS_ISA_MIPS2 2
-#define _MIPS_ISA_MIPS3 3
-#define _MIPS_ISA_MIPS4 4
-#define _MIPS_ISA_MIPS5 5
+#define _MIPS_ISA_MIPS1		1
+#define _MIPS_ISA_MIPS2		2
+#define _MIPS_ISA_MIPS3		3
+#define _MIPS_ISA_MIPS4		4
+#define _MIPS_ISA_MIPS5		5
+#define _MIPS_ISA_MIPS32	6
+#define _MIPS_ISA_MIPS64	7
 
 /*
  * Subprogram calling convention
@@ -28,4 +41,4 @@
 #define _MIPS_SIM_NABI32	2
 #define _MIPS_SIM_ABI64		3
 
-#endif /* _ASM_SGIDEFS_H */
+#endif /* __ASM_SGIDEFS_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/shmiq.h linux/include/asm-mips64/shmiq.h
--- linux-2.4.10-pre6/include/asm-mips64/shmiq.h	Fri Apr 13 20:26:07 2001
+++ linux/include/asm-mips64/shmiq.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/shmparam.h linux/include/asm-mips64/shmparam.h
--- linux-2.4.10-pre6/include/asm-mips64/shmparam.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/shmparam.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: shmparam.h,v 1.1 1999/08/19 22:56:35 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sigcontext.h linux/include/asm-mips64/sigcontext.h
--- linux-2.4.10-pre6/include/asm-mips64/sigcontext.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sigcontext.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: sigcontext.h,v 1.2 1999/09/27 16:01:40 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/signal.h linux/include/asm-mips64/signal.h
--- linux-2.4.10-pre6/include/asm-mips64/signal.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/signal.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: signal.h,v 1.2 1999/09/27 16:01:40 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/arch.h linux/include/asm-mips64/sn/arch.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/arch.h	Sun Jul  9 22:18:15 2000
+++ linux/include/asm-mips64/sn/arch.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/gda.h linux/include/asm-mips64/sn/gda.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/gda.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/gda.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/klconfig.h linux/include/asm-mips64/sn/klconfig.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/klconfig.h	Thu Jul 13 09:39:49 2000
+++ linux/include/asm-mips64/sn/klconfig.h	Mon Dec  3 23:08:47 2001
@@ -936,6 +936,7 @@
 extern klinfo_t *find_component(lboard_t *brd, klinfo_t *kli, unsigned char type);
 extern klinfo_t *find_first_component(lboard_t *brd, unsigned char type);
 extern klcpu_t *nasid_slice_to_cpuinfo(nasid_t, int);
+extern lboard_t *find_lboard_class(lboard_t *start, unsigned char brd_class);
 
 
 #if defined(CONFIG_SGI_IO)
@@ -943,7 +944,6 @@
 extern vertex_hdl_t nodevertex_xbow_peer_get(vertex_hdl_t node_vtx);
 extern lboard_t *find_gfxpipe(int pipenum);
 extern void setup_gfxpipe_link(vertex_hdl_t vhdl,int pipenum);
-extern lboard_t *find_lboard_class(lboard_t *start, unsigned char brd_class);
 extern lboard_t *find_lboard_module_class(lboard_t *start, moduleid_t mod,
                                                unsigned char brd_class);
 extern lboard_t *find_nic_lboard(lboard_t *, nic_t);
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/launch.h linux/include/asm-mips64/sn/launch.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/launch.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/launch.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: launch.h,v 1.3 2000/04/21 04:09:13 pfg Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/addrs.h linux/include/asm-mips64/sn/sn0/addrs.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/addrs.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/sn0/addrs.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/arch.h linux/include/asm-mips64/sn/sn0/arch.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/arch.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/sn0/arch.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hub.h linux/include/asm-mips64/sn/sn0/hub.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hub.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/sn0/hub.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hubio.h linux/include/asm-mips64/sn/sn0/hubio.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hubio.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/sn0/hubio.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hubmd.h linux/include/asm-mips64/sn/sn0/hubmd.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hubmd.h	Mon Feb 28 07:18:20 2000
+++ linux/include/asm-mips64/sn/sn0/hubmd.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: hubmd.h,v 1.1 2000/01/13 00:17:02 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hubni.h linux/include/asm-mips64/sn/sn0/hubni.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hubni.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/sn0/hubni.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hubpi.h linux/include/asm-mips64/sn/sn0/hubpi.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/hubpi.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/sn0/hubpi.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/ip27.h linux/include/asm-mips64/sn/sn0/ip27.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/ip27.h	Tue Nov 28 21:42:04 2000
+++ linux/include/asm-mips64/sn/sn0/ip27.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/sn0/sn0_fru.h linux/include/asm-mips64/sn/sn0/sn0_fru.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/sn0/sn0_fru.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sn/sn0/sn0_fru.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sn/types.h linux/include/asm-mips64/sn/types.h
--- linux-2.4.10-pre6/include/asm-mips64/sn/types.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/sn/types.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sockios.h linux/include/asm-mips64/sockios.h
--- linux-2.4.10-pre6/include/asm-mips64/sockios.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sockios.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/softirq.h linux/include/asm-mips64/softirq.h
--- linux-2.4.10-pre6/include/asm-mips64/softirq.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/softirq.h	Mon Dec  3 23:08:47 2001
@@ -1,11 +1,11 @@
-/* $Id: softirq.h,v 1.3 2000/02/23 00:41:38 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1997, 1998, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001 by Ralf Baechle
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #ifndef _ASM_SOFTIRQ_H
 #define _ASM_SOFTIRQ_H
@@ -13,12 +13,45 @@
 #include <asm/atomic.h>
 #include <asm/hardirq.h>
 
-#define cpu_bh_disable(cpu)	do { local_bh_count(cpu)++; barrier(); } while (0)
-#define cpu_bh_enable(cpu)	do { barrier(); local_bh_count(cpu)--; } while (0)
+extern inline void cpu_bh_disable(int cpu)
+{
+	local_bh_count(cpu)++;
+	barrier();
+}
+ 
+extern inline void __cpu_bh_enable(int cpu)
+{
+	barrier();
+	local_bh_count(cpu)--;
+}
 
 #define local_bh_disable()	cpu_bh_disable(smp_processor_id())
-#define local_bh_enable()	cpu_bh_enable(smp_processor_id())
+#define __local_bh_enable()	__cpu_bh_enable(smp_processor_id())
+#define local_bh_enable()					\
+do {								\
+	int cpu;						\
+								\
+	barrier();						\
+	cpu = smp_processor_id();				\
+	if (!--local_bh_count(cpu) && softirq_pending(cpu))	\
+		do_softirq();					\
+} while (0)
 
 #define in_softirq() (local_bh_count(smp_processor_id()) != 0)
+
+extern inline void __cpu_raise_softirq(int cpu, int nr)
+{
+	unsigned int *m = (unsigned int *) &softirq_pending(cpu);
+	unsigned int temp;
+
+	__asm__ __volatile__(
+		"1:\tll\t%0, %1\t\t\t# __cpu_raise_softirq\n\t"
+		"or\t%0, %2\n\t"
+		"sc\t%0, %1\n\t"
+		"beqz\t%0, 1b"
+		: "=&r" (temp), "=m" (*m)
+		: "ir" (1UL << nr), "m" (*m)
+		: "memory");
+}
 
 #endif /* _ASM_SOFTIRQ_H */
diff -urN linux-2.4.10-pre6/include/asm-mips64/statfs.h linux/include/asm-mips64/statfs.h
--- linux-2.4.10-pre6/include/asm-mips64/statfs.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/statfs.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/sysmips.h linux/include/asm-mips64/sysmips.h
--- linux-2.4.10-pre6/include/asm-mips64/sysmips.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/sysmips.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: sysmips.h,v 1.1 1999/10/08 21:07:57 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/termbits.h linux/include/asm-mips64/termbits.h
--- linux-2.4.10-pre6/include/asm-mips64/termbits.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/termbits.h	Mon Dec  3 23:08:47 2001
@@ -1,11 +1,11 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995, 1996, 1999 by Ralf Baechle
+ * Copyright (C) 1995, 1996, 1999, 2001 Ralf Baechle
  * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
  */
 #ifndef _ASM_TERMBITS_H
 #define _ASM_TERMBITS_H
@@ -72,21 +72,14 @@
 #define INLCR	0000100		/* Map NL to CR on input.  */
 #define IGNCR	0000200		/* Ignore CR.  */
 #define ICRNL	0000400		/* Map CR to NL on input.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define IUCLC	0001000		/* Map upper case to lower case on input.  */
-#endif
 #define IXON	0002000		/* Enable start/stop output control.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define IXANY	0004000		/* Any character will restart after stop.  */
-#endif
 #define IXOFF	0010000		/* Enable start/stop input control.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define IMAXBEL	0020000		/* Ring bell when input queue is full.  */
-#endif
 
 /* c_oflag bits */
 #define OPOST	0000001		/* Perform output processing.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define OLCUC	0000002		/* Map lower case to upper case on output.  */
 #define ONLCR	0000004		/* Map NL to CR-NL on output.  */
 #define OCRNL	0000010
@@ -121,7 +114,6 @@
 #define PAGEOUT ???
 #define WRAP    ???
  */
-#endif
 
 /* c_cflag bit meaning */
 #define CBAUD	0010017
@@ -154,7 +146,6 @@
 #define PARODD	0001000		/* Odd parity instead of even.  */
 #define HUPCL	0002000		/* Hang up on last close.  */
 #define CLOCAL	0004000		/* Ignore modem status lines.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define CBAUDEX 0010000
 #define    B57600 0010001
 #define   B115200 0010002
@@ -174,7 +165,6 @@
 #define CIBAUD	  002003600000	/* input baud rate (not used) */
 #define CMSPAR    010000000000	/* mark or space (stick) parity */
 #define CRTSCTS	  020000000000		/* flow control */
-#endif
 
 /* c_lflag bits */
 #define ISIG	0000001		/* Enable signals.  */
@@ -186,15 +176,11 @@
 #define ECHONL	0000100		/* Echo NL even if ECHO is off.  */
 #define NOFLSH	0000200		/* Disable flush after interrupt.  */
 #define IEXTEN	0000400		/* Enable DISCARD and LNEXT.  */
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define ECHOCTL	0001000		/* Echo control characters as ^X.  */
 #define ECHOPRT	0002000		/* Hardcopy visual erase.  */
 #define ECHOKE	0004000		/* Visual erase for KILL.  */
-#endif
 #define FLUSHO	0020000
-#if defined (__USE_BSD) || defined (__KERNEL__)
 #define PENDIN	0040000		/* Retype pending input (state).  */
-#endif
 #define TOSTOP	0100000		/* Send SIGTTOU for background output.  */
 #define ITOSTOP	TOSTOP
 
diff -urN linux-2.4.10-pre6/include/asm-mips64/termios.h linux/include/asm-mips64/termios.h
--- linux-2.4.10-pre6/include/asm-mips64/termios.h	Wed Jul  4 11:50:39 2001
+++ linux/include/asm-mips64/termios.h	Mon Dec  3 23:08:47 2001
@@ -101,7 +101,7 @@
 #define N_SMSBLOCK	12	/* SMS block mode - for talking to GSM data cards about SMS messages */
 #define N_HDLC		13	/* synchronous HDLC */
 #define N_SYNC_PPP	14	/* synchronous PPP */
-#define N_HCI		15  /* Bluetooth HCI UART */
+#define N_HCI		15	/* Bluetooth HCI UART */
 
 #ifdef __KERNEL__
 
diff -urN linux-2.4.10-pre6/include/asm-mips64/timex.h linux/include/asm-mips64/timex.h
--- linux-2.4.10-pre6/include/asm-mips64/timex.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/timex.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: timex.h,v 1.1 1999/08/18 23:37:53 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/tlb.h linux/include/asm-mips64/tlb.h
--- linux-2.4.10-pre6/include/asm-mips64/tlb.h	Wed Dec 31 16:00:00 1969
+++ linux/include/asm-mips64/tlb.h	Mon Dec  3 23:08:47 2001
@@ -0,0 +1 @@
+#include <asm-generic/tlb.h>
diff -urN linux-2.4.10-pre6/include/asm-mips64/types.h linux/include/asm-mips64/types.h
--- linux-2.4.10-pre6/include/asm-mips64/types.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/types.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: types.h,v 1.2 1999/12/04 03:59:12 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/uaccess.h linux/include/asm-mips64/uaccess.h
--- linux-2.4.10-pre6/include/asm-mips64/uaccess.h	Tue Aug 29 14:09:16 2000
+++ linux/include/asm-mips64/uaccess.h	Mon Dec  3 23:08:47 2001
@@ -45,12 +45,16 @@
  *  - AND "addr+size" doesn't have any high-bits set
  *  - OR we are in kernel mode.
  */
-#define __access_ok(addr,size,mask) \
-        (((__signed__ long)((mask)&(addr | size | (addr+size)))) >= 0)
+#define __ua_size(size)							\
+	(__builtin_constant_p(size) && (signed long) (size) > 0 ? 0 : (size))
+
+#define __access_ok(addr,size,mask)					\
+	(((signed long)((mask)&(addr | (addr + size) | __ua_size(size)))) >= 0)
+
 #define __access_mask ((long)(get_fs().seg))
 
 #define access_ok(type,addr,size) \
-__access_ok(((unsigned long)(addr)),(size),__access_mask)
+	__access_ok(((unsigned long)(addr)),(size),__access_mask)
 
 extern inline int verify_area(int type, const void * addr, unsigned long size)
 {
@@ -87,102 +91,114 @@
 struct __large_struct { unsigned long buf[100]; };
 #define __m(x) (*(struct __large_struct *)(x))
 
-#define __get_user_nocheck(x,ptr,size) ({ \
-long __gu_err; \
-__typeof(*(ptr)) __gu_val; \
-long __gu_addr; \
-__asm__("":"=r" (__gu_val)); \
-__gu_addr = (long) (ptr); \
-__asm__("":"=r" (__gu_err)); \
-switch (size) { \
-case 1: __get_user_asm("lb"); break; \
-case 2: __get_user_asm("lh"); break; \
-case 4: __get_user_asm("lw"); break; \
-case 8:  __get_user_asm("ld"); break; \
-default: __get_user_unknown(); break; \
-} x = (__typeof__(*(ptr))) __gu_val; __gu_err; })
-
-#define __get_user_check(x,ptr,size) ({ \
-long __gu_err; \
-__typeof__(*(ptr)) __gu_val; \
-long __gu_addr; \
-__asm__("":"=r" (__gu_val)); \
-__gu_addr = (long) (ptr); \
-__asm__("":"=r" (__gu_err)); \
-if (__access_ok(__gu_addr,size,__access_mask)) { \
-switch (size) { \
-case 1: __get_user_asm("lb"); break; \
-case 2: __get_user_asm("lh"); break; \
-case 4: __get_user_asm("lw"); break; \
-case 8: __get_user_asm("ld"); break; \
-default: __get_user_unknown(); break; \
-} } x = (__typeof__(*(ptr))) __gu_val; __gu_err; })
-
-#define __get_user_asm(insn) \
-({ \
-__asm__ __volatile__( \
-	"1:\t" insn "\t%1,%2\n\t" \
-	"move\t%0,$0\n" \
-	"2:\n\t" \
-	".section\t.fixup,\"ax\"\n" \
-	"3:\tli\t%0,%3\n\t" \
-	"move\t%1,$0\n\t" \
-	"j\t2b\n\t" \
-	".previous\n\t" \
-	".section\t__ex_table,\"a\"\n\t" \
-	".dword\t1b,3b\n\t" \
-	".previous" \
-	:"=r" (__gu_err), "=r" (__gu_val) \
-	:"o" (__m(__gu_addr)), "i" (-EFAULT)); })
+#define __get_user_nocheck(x,ptr,size)				\
+({								\
+	long __gu_err;						\
+	__typeof(*(ptr)) __gu_val;				\
+	long __gu_addr;						\
+	__asm__("":"=r" (__gu_val));				\
+	__gu_addr = (long) (ptr);				\
+	__asm__("":"=r" (__gu_err));				\
+	switch (size) {						\
+	case 1: __get_user_asm("lb"); break;			\
+	case 2: __get_user_asm("lh"); break;			\
+	case 4: __get_user_asm("lw"); break;			\
+	case 8: __get_user_asm("ld"); break;			\
+	default: __get_user_unknown(); break;			\
+	} x = (__typeof__(*(ptr))) __gu_val; __gu_err;		\
+})
+
+#define __get_user_check(x,ptr,size)				\
+({								\
+	long __gu_err;						\
+	__typeof__(*(ptr)) __gu_val;				\
+	long __gu_addr;						\
+	__asm__("":"=r" (__gu_val));				\
+	__gu_addr = (long) (ptr);				\
+	__asm__("":"=r" (__gu_err));				\
+	if (__access_ok(__gu_addr,size,__access_mask)) {	\
+		switch (size) {					\
+		case 1: __get_user_asm("lb"); break;		\
+		case 2: __get_user_asm("lh"); break;		\
+		case 4: __get_user_asm("lw"); break;		\
+		case 8: __get_user_asm("ld"); break;		\
+		default: __get_user_unknown(); break;		\
+		}						\
+	} x = (__typeof__(*(ptr))) __gu_val; __gu_err;		\
+})
+
+#define __get_user_asm(insn)					\
+({								\
+	__asm__ __volatile__(					\
+	"1:\t" insn "\t%1,%2\n\t"				\
+	"move\t%0,$0\n"						\
+	"2:\n\t"						\
+	".section\t.fixup,\"ax\"\n"				\
+	"3:\tli\t%0,%3\n\t"					\
+	"move\t%1,$0\n\t"					\
+	"j\t2b\n\t"						\
+	".previous\n\t"						\
+	".section\t__ex_table,\"a\"\n\t"			\
+	".dword\t1b,3b\n\t"					\
+	".previous"						\
+	:"=r" (__gu_err), "=r" (__gu_val)			\
+	:"o" (__m(__gu_addr)), "i" (-EFAULT));			\
+})
 
 extern void __get_user_unknown(void);
 
-#define __put_user_nocheck(x,ptr,size) ({ \
-long __pu_err; \
-__typeof__(*(ptr)) __pu_val; \
-long __pu_addr; \
-__pu_val = (x); \
-__pu_addr = (long) (ptr); \
-__asm__("":"=r" (__pu_err)); \
-switch (size) { \
-case 1: __put_user_asm("sb"); break; \
-case 2: __put_user_asm("sh"); break; \
-case 4: __put_user_asm("sw"); break; \
-case 8: __put_user_asm("sd"); break; \
-default: __put_user_unknown(); break; \
-} __pu_err; })
-
-#define __put_user_check(x,ptr,size) ({ \
-long __pu_err; \
-__typeof__(*(ptr)) __pu_val; \
-long __pu_addr; \
-__pu_val = (x); \
-__pu_addr = (long) (ptr); \
-__asm__("":"=r" (__pu_err)); \
-if (__access_ok(__pu_addr,size,__access_mask)) { \
-switch (size) { \
-case 1: __put_user_asm("sb"); break; \
-case 2: __put_user_asm("sh"); break; \
-case 4: __put_user_asm("sw"); break; \
-case 8: __put_user_asm("sd"); break; \
-default: __put_user_unknown(); break; \
-} } __pu_err; })
-
-#define __put_user_asm(insn) \
-({ \
-__asm__ __volatile__( \
-	"1:\t" insn "\t%1,%2\n\t" \
-	"move\t%0,$0\n" \
-	"2:\n\t" \
-	".section\t.fixup,\"ax\"\n" \
-	"3:\tli\t%0,%3\n\t" \
-	"j\t2b\n\t" \
-	".previous\n\t" \
-	".section\t__ex_table,\"a\"\n\t" \
-	".dword\t1b,3b\n\t" \
-	".previous" \
-	:"=r" (__pu_err) \
-	:"r" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); })
+#define __put_user_nocheck(x,ptr,size)				\
+({								\
+	long __pu_err;						\
+	__typeof__(*(ptr)) __pu_val;				\
+	long __pu_addr;						\
+	__pu_val = (x);						\
+	__pu_addr = (long) (ptr);				\
+	__asm__("":"=r" (__pu_err));				\
+	switch (size) {						\
+	case 1: __put_user_asm("sb"); break;			\
+	case 2: __put_user_asm("sh"); break;			\
+	case 4: __put_user_asm("sw"); break;			\
+	case 8: __put_user_asm("sd"); break;			\
+	default: __put_user_unknown(); break;			\
+	} __pu_err;						\
+})
+
+#define __put_user_check(x,ptr,size)				\
+({								\
+	long __pu_err;						\
+	__typeof__(*(ptr)) __pu_val;				\
+	long __pu_addr;						\
+	__pu_val = (x);						\
+	__pu_addr = (long) (ptr);				\
+	__asm__("":"=r" (__pu_err));				\
+	if (__access_ok(__pu_addr,size,__access_mask)) { 	\
+		switch (size) {					\
+		case 1: __put_user_asm("sb"); break;		\
+		case 2: __put_user_asm("sh"); break;		\
+		case 4: __put_user_asm("sw"); break;		\
+		case 8: __put_user_asm("sd"); break;		\
+		default: __put_user_unknown(); break;		\
+		}						\
+	} __pu_err;						\
+})
+
+#define __put_user_asm(insn)					\
+({								\
+	__asm__ __volatile__(					\
+	"1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t"	\
+	"move\t%0,$0\n"						\
+	"2:\n\t"						\
+	".section\t.fixup,\"ax\"\n"				\
+	"3:\tli\t%0,%3\n\t"					\
+	"j\t2b\n\t"						\
+	".previous\n\t"						\
+	".section\t__ex_table,\"a\"\n\t"			\
+	".dword\t1b,3b\n\t"					\
+	".previous"						\
+	:"=r" (__pu_err)					\
+	:"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT));	\
+})
 
 extern void __put_user_unknown(void);
 
@@ -191,112 +207,116 @@
  * jump instructions
  */
 #ifdef MODULE
-#define __MODULE_JAL(destination) \
-	".set\tnoat\n\t" \
-	"la\t$1, " #destination "\n\t" \
-	"jalr\t$1\n\t" \
+#define __MODULE_JAL(destination)	\
+	".set\tnoat\n\t"		\
+	"dla\t$1, " #destination "\n\t" \
+	"jalr\t$1\n\t"			\
 	".set\tat\n\t"
 #else
-#define __MODULE_JAL(destination) \
+#define __MODULE_JAL(destination)	\
 	"jal\t" #destination "\n\t"
 #endif
 
 extern size_t __copy_user(void *__to, const void *__from, size_t __n);
 
-#define __copy_to_user(to,from,n) ({ \
-	void *__cu_to; \
-	const void *__cu_from; \
-	long __cu_len; \
-	\
-	__cu_to = (to); \
-	__cu_from = (from); \
-	__cu_len = (n); \
-	__asm__ __volatile__( \
-		"move\t$4, %1\n\t" \
-		"move\t$5, %2\n\t" \
-		"move\t$6, %3\n\t" \
-		__MODULE_JAL(__copy_user) \
-		"move\t%0, $6" \
-		: "=r" (__cu_len) \
+#define __copy_to_user(to,from,n)				\
+({								\
+	void *__cu_to;						\
+	const void *__cu_from;					\
+	long __cu_len;						\
+								\
+	__cu_to = (to);						\
+	__cu_from = (from);					\
+	__cu_len = (n);						\
+	__asm__ __volatile__(					\
+	"move\t$4, %1\n\t"					\
+	"move\t$5, %2\n\t"					\
+	"move\t$6, %3\n\t"					\
+	__MODULE_JAL(__copy_user)				\
+	"move\t%0, $6"						\
+	: "=r" (__cu_len)					\
+	: "r" (__cu_to), "r" (__cu_from), "r" (__cu_len)	\
+	: "$4", "$5", "$6", "$8", "$9", "$10", "$11", "$12",	\
+	  "$15", "$24", "$31","memory");			\
+	__cu_len;						\
+})
+
+#define __copy_from_user(to,from,n)				\
+({								\
+	void *__cu_to;						\
+	const void *__cu_from;					\
+	long __cu_len;						\
+								\
+	__cu_to = (to);						\
+	__cu_from = (from);					\
+	__cu_len = (n);						\
+	__asm__ __volatile__(					\
+	"move\t$4, %1\n\t"					\
+	"move\t$5, %2\n\t"					\
+	"move\t$6, %3\n\t"					\
+	".set\tnoreorder\n\t"					\
+	__MODULE_JAL(__copy_user)				\
+	".set\tnoat\n\t"					\
+	"daddu\t$1, %2, %3\n\t"					\
+	".set\tat\n\t"						\
+	".set\treorder\n\t"					\
+	"move\t%0, $6"						\
+	: "=r" (__cu_len)					\
+	: "r" (__cu_to), "r" (__cu_from), "r" (__cu_len)	\
+	: "$4", "$5", "$6", "$8", "$9", "$10", "$11", "$12",	\
+	  "$15", "$24", "$31","memory");			\
+	__cu_len;						\
+})
+
+#define copy_to_user(to,from,n)					\
+({								\
+	void *__cu_to;						\
+	const void *__cu_from;					\
+	long __cu_len;						\
+								\
+	__cu_to = (to);						\
+	__cu_from = (from);					\
+	__cu_len = (n);						\
+	if (access_ok(VERIFY_WRITE, __cu_to, __cu_len))		\
+		__asm__ __volatile__(				\
+		"move\t$4, %1\n\t"				\
+		"move\t$5, %2\n\t"				\
+		"move\t$6, %3\n\t"				\
+		__MODULE_JAL(__copy_user)			\
+		"move\t%0, $6"					\
+		: "=r" (__cu_len)				\
 		: "r" (__cu_to), "r" (__cu_from), "r" (__cu_len) \
-		: "$4", "$5", "$6", "$8", "$9", "$10", "$11", "$12", "$15", \
-		  "$24", "$31","memory"); \
-	__cu_len; \
-})
-
-#define __copy_from_user(to,from,n) ({ \
-	void *__cu_to; \
-	const void *__cu_from; \
-	long __cu_len; \
-	\
-	__cu_to = (to); \
-	__cu_from = (from); \
-	__cu_len = (n); \
-	__asm__ __volatile__( \
-		"move\t$4, %1\n\t" \
-		"move\t$5, %2\n\t" \
-		"move\t$6, %3\n\t" \
-		".set\tnoreorder\n\t" \
-		__MODULE_JAL(__copy_user) \
-		".set\tnoat\n\t" \
-		"daddu\t$1, %2, %3\n\t" \
-		".set\tat\n\t" \
-		".set\treorder\n\t" \
-		"move\t%0, $6" \
-		: "=r" (__cu_len) \
+		: "$4", "$5", "$6", "$8", "$9", "$10", "$11",	\
+		  "$12", "$15", "$24", "$31","memory");		\
+	__cu_len;						\
+})
+
+#define copy_from_user(to,from,n)				\
+({								\
+	void *__cu_to;						\
+	const void *__cu_from;					\
+	long __cu_len;						\
+								\
+	__cu_to = (to);						\
+	__cu_from = (from);					\
+	__cu_len = (n);						\
+	if (access_ok(VERIFY_READ, __cu_from, __cu_len))	\
+		__asm__ __volatile__(				\
+		"move\t$4, %1\n\t"				\
+		"move\t$5, %2\n\t"				\
+		"move\t$6, %3\n\t"				\
+		".set\tnoreorder\n\t"				\
+		__MODULE_JAL(__copy_user)			\
+		".set\tnoat\n\t"				\
+		"daddu\t$1, %2, %3\n\t"				\
+		".set\tat\n\t"					\
+		".set\treorder\n\t"				\
+		"move\t%0, $6"					\
+		: "=r" (__cu_len)				\
 		: "r" (__cu_to), "r" (__cu_from), "r" (__cu_len) \
-		: "$4", "$5", "$6", "$8", "$9", "$10", "$11", "$12", "$15", \
-		  "$24", "$31","memory"); \
-	__cu_len; \
-})
-
-#define copy_to_user(to,from,n) ({ \
-	void *__cu_to; \
-	const void *__cu_from; \
-	long __cu_len; \
-	\
-	__cu_to = (to); \
-	__cu_from = (from); \
-	__cu_len = (n); \
-	if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) \
-		__asm__ __volatile__( \
-			"move\t$4, %1\n\t" \
-			"move\t$5, %2\n\t" \
-			"move\t$6, %3\n\t" \
-			__MODULE_JAL(__copy_user) \
-			"move\t%0, $6" \
-			: "=r" (__cu_len) \
-			: "r" (__cu_to), "r" (__cu_from), "r" (__cu_len) \
-			: "$4", "$5", "$6", "$8", "$9", "$10", "$11", "$12", \
-			  "$15", "$24", "$31","memory"); \
-	__cu_len; \
-})
-
-#define copy_from_user(to,from,n) ({ \
-	void *__cu_to; \
-	const void *__cu_from; \
-	long __cu_len; \
-	\
-	__cu_to = (to); \
-	__cu_from = (from); \
-	__cu_len = (n); \
-	if (access_ok(VERIFY_READ, __cu_from, __cu_len)) \
-		__asm__ __volatile__( \
-			"move\t$4, %1\n\t" \
-			"move\t$5, %2\n\t" \
-			"move\t$6, %3\n\t" \
-			".set\tnoreorder\n\t" \
-			__MODULE_JAL(__copy_user) \
-			".set\tnoat\n\t" \
-			"daddu\t$1, %2, %3\n\t" \
-			".set\tat\n\t" \
-			".set\treorder\n\t" \
-			"move\t%0, $6" \
-			: "=r" (__cu_len) \
-			: "r" (__cu_to), "r" (__cu_from), "r" (__cu_len) \
-			: "$4", "$5", "$6", "$8", "$9", "$10", "$11", "$12", \
-			  "$15", "$24", "$31","memory"); \
-	__cu_len; \
+		: "$4", "$5", "$6", "$8", "$9", "$10", "$11",	\
+		  "$12", "$15", "$24", "$31","memory");		\
+	__cu_len;						\
 })
 
 extern inline __kernel_size_t
@@ -317,12 +337,15 @@
 	return res;
 }
 
-#define clear_user(addr,n) ({ \
-void * __cl_addr = (addr); \
-unsigned long __cl_size = (n); \
-if (__cl_size && __access_ok(VERIFY_WRITE, ((unsigned long)(__cl_addr)), __cl_size)) \
-__cl_size = __clear_user(__cl_addr, __cl_size); \
-__cl_size; })
+#define clear_user(addr,n)					\
+({								\
+	void * __cl_addr = (addr);				\
+	unsigned long __cl_size = (n);				\
+	if (__cl_size && __access_ok(VERIFY_WRITE,		\
+	       ((unsigned long)(__cl_addr)), __cl_size))	\
+		__cl_size = __clear_user(__cl_addr, __cl_size);	\
+	__cl_size;						\
+})
 
 /*
  * Returns: -EFAULT if exception before terminator, N if the entire
diff -urN linux-2.4.10-pre6/include/asm-mips64/ucontext.h linux/include/asm-mips64/ucontext.h
--- linux-2.4.10-pre6/include/asm-mips64/ucontext.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/ucontext.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id: ucontext.h,v 1.1 1999/09/27 16:01:40 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/user.h linux/include/asm-mips64/user.h
--- linux-2.4.10-pre6/include/asm-mips64/user.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/user.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/usioctl.h linux/include/asm-mips64/usioctl.h
--- linux-2.4.10-pre6/include/asm-mips64/usioctl.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/usioctl.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/xtalk/xtalk.h linux/include/asm-mips64/xtalk/xtalk.h
--- linux-2.4.10-pre6/include/asm-mips64/xtalk/xtalk.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/xtalk/xtalk.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/asm-mips64/xtalk/xwidget.h linux/include/asm-mips64/xtalk/xwidget.h
--- linux-2.4.10-pre6/include/asm-mips64/xtalk/xwidget.h	Sat May 13 08:31:25 2000
+++ linux/include/asm-mips64/xtalk/xwidget.h	Mon Dec  3 23:08:47 2001
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff -urN linux-2.4.10-pre6/include/linux/isdn.h linux/include/linux/isdn.h
--- linux-2.4.10-pre6/include/linux/isdn.h	Mon Jul  2 14:13:40 2001
+++ linux/include/linux/isdn.h	Mon Dec  3 23:08:47 2001
@@ -1,4 +1,4 @@
-/* $Id: isdn.h,v 1.111.6.7 2001/06/30 19:47:51 kai Exp $
+/* $Id: isdn.h,v 1.111.6.8 2001/08/17 12:34:28 kai Exp $
 
  * Main header for the Linux ISDN subsystem (linklevel).
  *
@@ -656,9 +656,6 @@
 extern isdn_dev *dev;
 
 
-/* Utility-Macros */
-#define MIN(a,b) ((a<b)?a:b)
-#define MAX(a,b) ((a>b)?a:b)
 #endif /* __KERNEL__ */
 
 #endif /* __ISDN_H__ */
diff -urN linux-2.4.10-pre6/include/linux/module.h linux/include/linux/module.h
--- linux-2.4.10-pre6/include/linux/module.h	Mon Dec  3 23:08:37 2001
+++ linux/include/linux/module.h	Mon Dec  3 23:08:47 2001
@@ -257,6 +257,7 @@
  *	"GPL"				[GNU Public License v2 or later]
  *	"GPL and additional rights"	[GNU Public License v2 rights and more]
  *	"Dual BSD/GPL"			[GNU Public License v2 or BSD license choice]
+ *	"Dual MPL/GPL"			[GNU Public License v2 or Mozilla license choice]
  *
  * The following other idents are available
  *
diff -urN linux-2.4.10-pre6/include/linux/pci_ids.h linux/include/linux/pci_ids.h
--- linux-2.4.10-pre6/include/linux/pci_ids.h	Mon Dec  3 23:08:37 2001
+++ linux/include/linux/pci_ids.h	Mon Dec  3 23:08:47 2001
@@ -146,18 +146,34 @@
 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B	0xf150
 
 #define PCI_VENDOR_ID_NCR		0x1000
+#define PCI_VENDOR_ID_LSI_LOGIC		0x1000
 #define PCI_DEVICE_ID_NCR_53C810	0x0001
 #define PCI_DEVICE_ID_NCR_53C820	0x0002
 #define PCI_DEVICE_ID_NCR_53C825	0x0003
 #define PCI_DEVICE_ID_NCR_53C815	0x0004
+#define PCI_DEVICE_ID_LSI_53C810AP	0x0005
 #define PCI_DEVICE_ID_NCR_53C860	0x0006
+#define PCI_DEVICE_ID_LSI_53C1510	0x000a
 #define PCI_DEVICE_ID_NCR_53C896	0x000b
 #define PCI_DEVICE_ID_NCR_53C895	0x000c
 #define PCI_DEVICE_ID_NCR_53C885	0x000d
 #define PCI_DEVICE_ID_NCR_53C875	0x000f
 #define PCI_DEVICE_ID_NCR_53C1510	0x0010
+#define PCI_DEVICE_ID_LSI_53C895A	0x0012
+#define PCI_DEVICE_ID_LSI_53C875A	0x0013
+#define PCI_DEVICE_ID_LSI_53C1010_33	0x0020
+#define PCI_DEVICE_ID_LSI_53C1010_66	0x0021
+#define PCI_DEVICE_ID_LSI_53C1030	0x0030
+#define PCI_DEVICE_ID_LSI_53C1035	0x0040
 #define PCI_DEVICE_ID_NCR_53C875J	0x008f
+#define PCI_DEVICE_ID_LSI_FC909		0x0621
+#define PCI_DEVICE_ID_LSI_FC929		0x0622
+#define PCI_DEVICE_ID_LSI_FC929_LAN	0x0623
+#define PCI_DEVICE_ID_LSI_FC919		0x0624
+#define PCI_DEVICE_ID_LSI_FC919_LAN	0x0625
 #define PCI_DEVICE_ID_NCR_YELLOWFIN	0x0701
+#define PCI_DEVICE_ID_LSI_61C102	0x0901
+#define PCI_DEVICE_ID_LSI_63C815	0x1000
 
 #define PCI_VENDOR_ID_ATI		0x1002
 /* Mach64 */
@@ -387,6 +403,8 @@
 #define PCI_VENDOR_ID_AI		0x1025
 #define PCI_DEVICE_ID_AI_M1435		0x1435
 
+#define PCI_VENDOR_ID_DELL              0x1028
+
 #define PCI_VENDOR_ID_MATROX		0x102B
 #define PCI_DEVICE_ID_MATROX_MGA_2	0x0518
 #define PCI_DEVICE_ID_MATROX_MIL	0x0519
@@ -852,6 +870,7 @@
 #define PCI_DEVICE_ID_INTERG_2000	0x2000
 #define PCI_DEVICE_ID_INTERG_2010	0x2010
 #define PCI_DEVICE_ID_INTERG_5000	0x5000
+#define PCI_DEVICE_ID_INTERG_5050	0x5050
 
 #define PCI_VENDOR_ID_REALTEK		0x10ec
 #define PCI_DEVICE_ID_REALTEK_8029	0x8029
@@ -900,7 +919,7 @@
 #define PCI_DEVICE_ID_VIA_82C693	0x0693
 #define PCI_DEVICE_ID_VIA_82C693_1	0x0698
 #define PCI_DEVICE_ID_VIA_82C926	0x0926
-#define PCI_DEVICE_ID_VIA_82C416	0x1571
+#define PCI_DEVICE_ID_VIA_82C576_1	0x1571
 #define PCI_DEVICE_ID_VIA_82C595_97	0x1595
 #define PCI_DEVICE_ID_VIA_82C586_2	0x3038
 #define PCI_DEVICE_ID_VIA_82C586_3	0x3040
@@ -913,6 +932,7 @@
 #define PCI_DEVICE_ID_VIA_8233_7	0x3065
 #define PCI_DEVICE_ID_VIA_82C686_6	0x3068
 #define PCI_DEVICE_ID_VIA_8233_0	0x3074
+#define PCI_DEVICE_ID_VIA_8233C_0	0x3109
 #define PCI_DEVICE_ID_VIA_8633_0	0x3091
 #define PCI_DEVICE_ID_VIA_8367_0	0x3099
 #define PCI_DEVICE_ID_VIA_86C100A	0x6100
diff -urN linux-2.4.10-pre6/include/linux/soundcard.h linux/include/linux/soundcard.h
--- linux-2.4.10-pre6/include/linux/soundcard.h	Sat Nov 11 19:02:39 2000
+++ linux/include/linux/soundcard.h	Mon Dec  3 23:08:47 2001
@@ -623,6 +623,17 @@
 #	define DSP_BIND_I2S		0x00000080
 #	define DSP_BIND_SPDIF		0x00000100
 
+#define SNDCTL_DSP_SETSPDIF		_SIOW ('P', 66, int)
+#define SNDCTL_DSP_GETSPDIF		_SIOR ('P', 67, int)
+#	define SPDIF_PRO	0x0001
+#	define SPDIF_N_AUD	0x0002
+#	define SPDIF_COPY	0x0004
+#	define SPDIF_PRE	0x0008
+#	define SPDIF_CC		0x07f0
+#	define SPDIF_L		0x0800
+#	define SPDIF_DRS	0x4000
+#	define SPDIF_V		0x8000
+
 /*
  * Application's profile defines the way how playback underrun situations should be handled.
  * 
diff -urN linux-2.4.10-pre6/kernel/ksyms.c linux/kernel/ksyms.c
--- linux-2.4.10-pre6/kernel/ksyms.c	Mon Dec  3 23:08:37 2001
+++ linux/kernel/ksyms.c	Mon Dec  3 23:08:47 2001
@@ -299,7 +299,6 @@
 EXPORT_SYMBOL(blkdev_get);
 EXPORT_SYMBOL(blkdev_put);
 EXPORT_SYMBOL(ioctl_by_bdev);
-EXPORT_SYMBOL(gendisk_head);
 EXPORT_SYMBOL(grok_partitions);
 EXPORT_SYMBOL(register_disk);
 EXPORT_SYMBOL(tq_disk);
diff -urN linux-2.4.10-pre6/net/ax25/ax25_in.c linux/net/ax25/ax25_in.c
--- linux-2.4.10-pre6/net/ax25/ax25_in.c	Fri Jun 29 19:38:26 2001
+++ linux/net/ax25/ax25_in.c	Mon Dec  3 23:08:47 2001
@@ -431,7 +431,7 @@
 		}
 	} else {
 		/* Reverse the source SABM's path */
-		memcpy(&ax25->digipeat, &reverse_dp, sizeof(ax25_digi));
+		memcpy(ax25->digipeat, &reverse_dp, sizeof(ax25_digi));
 	}
 
 	if ((*skb->data & ~AX25_PF) == AX25_SABME) {
diff -urN linux-2.4.10-pre6/net/bluetooth/hci_core.c linux/net/bluetooth/hci_core.c
--- linux-2.4.10-pre6/net/bluetooth/hci_core.c	Mon Dec  3 23:08:37 2001
+++ linux/net/bluetooth/hci_core.c	Mon Dec  3 23:08:47 2001
@@ -737,6 +737,10 @@
 	if (get_user(dev_num, (__u16 *) arg))
 		return -EFAULT;
 
+	/* Avoid long loop, overflow */
+	if (dev_num > 2048)
+		return -EINVAL;
+	
 	size = dev_num * sizeof(struct hci_dev_req) + sizeof(__u16);
 
 	if (verify_area(VERIFY_WRITE, (void *) arg, size))
@@ -826,11 +830,12 @@
 	if (!(hdev = hci_dev_get(req.dev_id)))
 		return -ENODEV;
 
+	/* Set a limit to avoid overlong loops, and also numeric overflow - AC */
+	if(req.conn_num < 2048)
+		return -EINVAL;
+	
 	size = req.conn_num * sizeof(struct hci_conn_info) + sizeof(req);
 
-	if (verify_area(VERIFY_WRITE, (void *)arg, size))
-		return -EFAULT;
-
 	if (!(cl = kmalloc(size, GFP_KERNEL)))
 		return -ENOMEM;
 	ci = cl->conn_info;
@@ -852,10 +857,10 @@
 	cl->conn_num = n;
 	size = n * sizeof(struct hci_conn_info) + sizeof(req);
 
-	copy_to_user((void *) arg, cl, size);
-
 	hci_dev_put(hdev);
 
+	if(copy_to_user((void *) arg, cl, size))
+		return -EFAULT;
 	return 0;
 }
 
@@ -883,6 +888,14 @@
 		do_inquiry = 1;
 	}
 	inquiry_cache_unlock(cache);
+
+	/* Limit inquiry time, also avoid overflows */
+
+	if(ir.length > 2048)
+	{
+		err = -EINVAL;
+		goto done;
+	}
 
 	timeo = ir.length * 2 * HZ;
 	if (do_inquiry && (err = hci_request(hdev, hci_inq_req, (unsigned long)&ir, timeo)) < 0)
